LegalizeVectorTypes.cpp revision 5aa5d574f464ff9ff15a4c01360aaabc9bdc8a8f
1//===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file performs vector type splitting and scalarization for LegalizeTypes. 11// Scalarization is the act of changing a computation in an illegal one-element 12// vector type to be a computation in its scalar element type. For example, 13// implementing <1 x f32> arithmetic in a scalar f32 register. This is needed 14// as a base case when scalarizing vector arithmetic like <4 x f32>, which 15// eventually decomposes to scalars if the target doesn't support v4f32 or v2f32 16// types. 17// Splitting is the act of changing a computation in an invalid vector type to 18// be a computation in two vectors of half the size. For example, implementing 19// <128 x f32> operations in terms of two <64 x f32> operations. 20// 21//===----------------------------------------------------------------------===// 22 23#include "LegalizeTypes.h" 24#include "llvm/CodeGen/PseudoSourceValue.h" 25#include "llvm/Target/TargetData.h" 26#include "llvm/Support/ErrorHandling.h" 27#include "llvm/Support/raw_ostream.h" 28using namespace llvm; 29 30//===----------------------------------------------------------------------===// 31// Result Vector Scalarization: <1 x ty> -> ty. 32//===----------------------------------------------------------------------===// 33 34void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) { 35 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": "; 36 N->dump(&DAG); 37 dbgs() << "\n"); 38 SDValue R = SDValue(); 39 40 switch (N->getOpcode()) { 41 default: 42#ifndef NDEBUG 43 dbgs() << "ScalarizeVectorResult #" << ResNo << ": "; 44 N->dump(&DAG); 45 dbgs() << "\n"; 46 dbgs() << "Do not know how to scalarize the result of this operator!\n"; 47#endif 48 report_fatal_error("Do not know how to scalarize the result of this " 49 "operator!\n"); 50 51 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break; 52 case ISD::BUILD_VECTOR: R = N->getOperand(0); break; 53 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break; 54 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break; 55 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break; 56 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break; 57 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break; 58 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break; 59 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break; 60 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break; 61 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break; 62 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break; 63 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break; 64 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break; 65 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break; 66 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break; 67 case ISD::VSETCC: R = ScalarizeVecRes_VSETCC(N); break; 68 69 case ISD::ANY_EXTEND: 70 case ISD::CTLZ: 71 case ISD::CTPOP: 72 case ISD::CTTZ: 73 case ISD::FABS: 74 case ISD::FCEIL: 75 case ISD::FCOS: 76 case ISD::FEXP: 77 case ISD::FEXP2: 78 case ISD::FFLOOR: 79 case ISD::FLOG: 80 case ISD::FLOG10: 81 case ISD::FLOG2: 82 case ISD::FNEARBYINT: 83 case ISD::FNEG: 84 case ISD::FP_EXTEND: 85 case ISD::FP_TO_SINT: 86 case ISD::FP_TO_UINT: 87 case ISD::FRINT: 88 case ISD::FSIN: 89 case ISD::FSQRT: 90 case ISD::FTRUNC: 91 case ISD::SIGN_EXTEND: 92 case ISD::SINT_TO_FP: 93 case ISD::TRUNCATE: 94 case ISD::UINT_TO_FP: 95 case ISD::ZERO_EXTEND: 96 R = ScalarizeVecRes_UnaryOp(N); 97 break; 98 99 case ISD::ADD: 100 case ISD::AND: 101 case ISD::FADD: 102 case ISD::FDIV: 103 case ISD::FMUL: 104 case ISD::FPOW: 105 case ISD::FREM: 106 case ISD::FSUB: 107 case ISD::MUL: 108 case ISD::OR: 109 case ISD::SDIV: 110 case ISD::SREM: 111 case ISD::SUB: 112 case ISD::UDIV: 113 case ISD::UREM: 114 case ISD::XOR: 115 case ISD::SHL: 116 case ISD::SRA: 117 case ISD::SRL: 118 R = ScalarizeVecRes_BinOp(N); 119 break; 120 } 121 122 // If R is null, the sub-method took care of registering the result. 123 if (R.getNode()) 124 SetScalarizedVector(SDValue(N, ResNo), R); 125} 126 127SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) { 128 SDValue LHS = GetScalarizedVector(N->getOperand(0)); 129 SDValue RHS = GetScalarizedVector(N->getOperand(1)); 130 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), 131 LHS.getValueType(), LHS, RHS); 132} 133 134SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) { 135 EVT NewVT = N->getValueType(0).getVectorElementType(); 136 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), 137 NewVT, N->getOperand(0)); 138} 139 140SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) { 141 EVT NewVT = N->getValueType(0).getVectorElementType(); 142 SDValue Op0 = GetScalarizedVector(N->getOperand(0)); 143 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(), 144 Op0, DAG.getValueType(NewVT), 145 DAG.getValueType(Op0.getValueType()), 146 N->getOperand(3), 147 N->getOperand(4), 148 cast<CvtRndSatSDNode>(N)->getCvtCode()); 149} 150 151SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) { 152 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), 153 N->getValueType(0).getVectorElementType(), 154 N->getOperand(0), N->getOperand(1)); 155} 156 157SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) { 158 EVT NewVT = N->getValueType(0).getVectorElementType(); 159 SDValue Op = GetScalarizedVector(N->getOperand(0)); 160 return DAG.getNode(ISD::FP_ROUND, N->getDebugLoc(), 161 NewVT, Op, N->getOperand(1)); 162} 163 164SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) { 165 SDValue Op = GetScalarizedVector(N->getOperand(0)); 166 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(), 167 Op.getValueType(), Op, N->getOperand(1)); 168} 169 170SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) { 171 // The value to insert may have a wider type than the vector element type, 172 // so be sure to truncate it to the element type if necessary. 173 SDValue Op = N->getOperand(1); 174 EVT EltVT = N->getValueType(0).getVectorElementType(); 175 if (Op.getValueType() != EltVT) 176 // FIXME: Can this happen for floating point types? 177 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op); 178 return Op; 179} 180 181SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) { 182 assert(N->isUnindexed() && "Indexed vector load?"); 183 184 SDValue Result = DAG.getLoad(ISD::UNINDEXED, 185 N->getExtensionType(), 186 N->getValueType(0).getVectorElementType(), 187 N->getDebugLoc(), 188 N->getChain(), N->getBasePtr(), 189 DAG.getUNDEF(N->getBasePtr().getValueType()), 190 N->getPointerInfo(), 191 N->getMemoryVT().getVectorElementType(), 192 N->isVolatile(), N->isNonTemporal(), 193 N->getOriginalAlignment()); 194 195 // Legalized the chain result - switch anything that used the old chain to 196 // use the new one. 197 ReplaceValueWith(SDValue(N, 1), Result.getValue(1)); 198 return Result; 199} 200 201SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) { 202 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp. 203 EVT DestVT = N->getValueType(0).getVectorElementType(); 204 SDValue Op = GetScalarizedVector(N->getOperand(0)); 205 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op); 206} 207 208SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) { 209 EVT EltVT = N->getValueType(0).getVectorElementType(); 210 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); 211 SDValue LHS = GetScalarizedVector(N->getOperand(0)); 212 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT, 213 LHS, DAG.getValueType(ExtVT)); 214} 215 216SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) { 217 // If the operand is wider than the vector element type then it is implicitly 218 // truncated. Make that explicit here. 219 EVT EltVT = N->getValueType(0).getVectorElementType(); 220 SDValue InOp = N->getOperand(0); 221 if (InOp.getValueType() != EltVT) 222 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp); 223 return InOp; 224} 225 226SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) { 227 SDValue LHS = GetScalarizedVector(N->getOperand(1)); 228 return DAG.getNode(ISD::SELECT, N->getDebugLoc(), 229 LHS.getValueType(), N->getOperand(0), LHS, 230 GetScalarizedVector(N->getOperand(2))); 231} 232 233SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) { 234 SDValue LHS = GetScalarizedVector(N->getOperand(2)); 235 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(), 236 N->getOperand(0), N->getOperand(1), 237 LHS, GetScalarizedVector(N->getOperand(3)), 238 N->getOperand(4)); 239} 240 241SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) { 242 SDValue LHS = GetScalarizedVector(N->getOperand(0)); 243 SDValue RHS = GetScalarizedVector(N->getOperand(1)); 244 DebugLoc DL = N->getDebugLoc(); 245 246 // Turn it into a scalar SETCC. 247 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2)); 248} 249 250SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) { 251 return DAG.getUNDEF(N->getValueType(0).getVectorElementType()); 252} 253 254SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) { 255 // Figure out if the scalar is the LHS or RHS and return it. 256 SDValue Arg = N->getOperand(2).getOperand(0); 257 if (Arg.getOpcode() == ISD::UNDEF) 258 return DAG.getUNDEF(N->getValueType(0).getVectorElementType()); 259 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue(); 260 return GetScalarizedVector(N->getOperand(Op)); 261} 262 263SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) { 264 SDValue LHS = GetScalarizedVector(N->getOperand(0)); 265 SDValue RHS = GetScalarizedVector(N->getOperand(1)); 266 EVT NVT = N->getValueType(0).getVectorElementType(); 267 EVT SVT = TLI.getSetCCResultType(LHS.getValueType()); 268 DebugLoc DL = N->getDebugLoc(); 269 270 // Turn it into a scalar SETCC. 271 SDValue Res = DAG.getNode(ISD::SETCC, DL, SVT, LHS, RHS, N->getOperand(2)); 272 273 // VSETCC always returns a sign-extended value, while SETCC may not. The 274 // SETCC result type may not match the vector element type. Correct these. 275 if (NVT.bitsLE(SVT)) { 276 // The SETCC result type is bigger than the vector element type. 277 // Ensure the SETCC result is sign-extended. 278 if (TLI.getBooleanContents() != 279 TargetLowering::ZeroOrNegativeOneBooleanContent) 280 Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, SVT, Res, 281 DAG.getValueType(MVT::i1)); 282 // Truncate to the final type. 283 return DAG.getNode(ISD::TRUNCATE, DL, NVT, Res); 284 } 285 286 // The SETCC result type is smaller than the vector element type. 287 // If the SetCC result is not sign-extended, chop it down to MVT::i1. 288 if (TLI.getBooleanContents() != 289 TargetLowering::ZeroOrNegativeOneBooleanContent) 290 Res = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Res); 291 // Sign extend to the final type. 292 return DAG.getNode(ISD::SIGN_EXTEND, DL, NVT, Res); 293} 294 295 296//===----------------------------------------------------------------------===// 297// Operand Vector Scalarization <1 x ty> -> ty. 298//===----------------------------------------------------------------------===// 299 300bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) { 301 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": "; 302 N->dump(&DAG); 303 dbgs() << "\n"); 304 SDValue Res = SDValue(); 305 306 if (Res.getNode() == 0) { 307 switch (N->getOpcode()) { 308 default: 309#ifndef NDEBUG 310 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": "; 311 N->dump(&DAG); 312 dbgs() << "\n"; 313#endif 314 llvm_unreachable("Do not know how to scalarize this operator's operand!"); 315 case ISD::BITCAST: 316 Res = ScalarizeVecOp_BITCAST(N); 317 break; 318 case ISD::CONCAT_VECTORS: 319 Res = ScalarizeVecOp_CONCAT_VECTORS(N); 320 break; 321 case ISD::EXTRACT_VECTOR_ELT: 322 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N); 323 break; 324 case ISD::STORE: 325 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo); 326 break; 327 } 328 } 329 330 // If the result is null, the sub-method took care of registering results etc. 331 if (!Res.getNode()) return false; 332 333 // If the result is N, the sub-method updated N in place. Tell the legalizer 334 // core about this. 335 if (Res.getNode() == N) 336 return true; 337 338 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && 339 "Invalid operand expansion"); 340 341 ReplaceValueWith(SDValue(N, 0), Res); 342 return false; 343} 344 345/// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs 346/// to be scalarized, it must be <1 x ty>. Convert the element instead. 347SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) { 348 SDValue Elt = GetScalarizedVector(N->getOperand(0)); 349 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), 350 N->getValueType(0), Elt); 351} 352 353/// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one - 354/// use a BUILD_VECTOR instead. 355SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) { 356 SmallVector<SDValue, 8> Ops(N->getNumOperands()); 357 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) 358 Ops[i] = GetScalarizedVector(N->getOperand(i)); 359 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0), 360 &Ops[0], Ops.size()); 361} 362 363/// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to 364/// be scalarized, it must be <1 x ty>, so just return the element, ignoring the 365/// index. 366SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) { 367 SDValue Res = GetScalarizedVector(N->getOperand(0)); 368 if (Res.getValueType() != N->getValueType(0)) 369 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0), 370 Res); 371 return Res; 372} 373 374/// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be 375/// scalarized, it must be <1 x ty>. Just store the element. 376SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){ 377 assert(N->isUnindexed() && "Indexed store of one-element vector?"); 378 assert(OpNo == 1 && "Do not know how to scalarize this operand!"); 379 DebugLoc dl = N->getDebugLoc(); 380 381 if (N->isTruncatingStore()) 382 return DAG.getTruncStore(N->getChain(), dl, 383 GetScalarizedVector(N->getOperand(1)), 384 N->getBasePtr(), N->getPointerInfo(), 385 N->getMemoryVT().getVectorElementType(), 386 N->isVolatile(), N->isNonTemporal(), 387 N->getAlignment()); 388 389 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)), 390 N->getBasePtr(), N->getPointerInfo(), 391 N->isVolatile(), N->isNonTemporal(), 392 N->getOriginalAlignment()); 393} 394 395 396//===----------------------------------------------------------------------===// 397// Result Vector Splitting 398//===----------------------------------------------------------------------===// 399 400/// SplitVectorResult - This method is called when the specified result of the 401/// specified node is found to need vector splitting. At this point, the node 402/// may also have invalid operands or may have other results that need 403/// legalization, we just know that (at least) one result needs vector 404/// splitting. 405void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) { 406 DEBUG(dbgs() << "Split node result: "; 407 N->dump(&DAG); 408 dbgs() << "\n"); 409 SDValue Lo, Hi; 410 411 switch (N->getOpcode()) { 412 default: 413#ifndef NDEBUG 414 dbgs() << "SplitVectorResult #" << ResNo << ": "; 415 N->dump(&DAG); 416 dbgs() << "\n"; 417#endif 418 llvm_unreachable("Do not know how to split the result of this operator!"); 419 420 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break; 421 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break; 422 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; 423 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; 424 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break; 425 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break; 426 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break; 427 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break; 428 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break; 429 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break; 430 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break; 431 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break; 432 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break; 433 case ISD::LOAD: 434 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi); 435 break; 436 case ISD::SETCC: 437 case ISD::VSETCC: 438 SplitVecRes_SETCC(N, Lo, Hi); 439 break; 440 case ISD::VECTOR_SHUFFLE: 441 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi); 442 break; 443 444 case ISD::ANY_EXTEND: 445 case ISD::CONVERT_RNDSAT: 446 case ISD::CTLZ: 447 case ISD::CTPOP: 448 case ISD::CTTZ: 449 case ISD::FABS: 450 case ISD::FCEIL: 451 case ISD::FCOS: 452 case ISD::FEXP: 453 case ISD::FEXP2: 454 case ISD::FFLOOR: 455 case ISD::FLOG: 456 case ISD::FLOG10: 457 case ISD::FLOG2: 458 case ISD::FNEARBYINT: 459 case ISD::FNEG: 460 case ISD::FP_EXTEND: 461 case ISD::FP_ROUND: 462 case ISD::FP_TO_SINT: 463 case ISD::FP_TO_UINT: 464 case ISD::FRINT: 465 case ISD::FSIN: 466 case ISD::FSQRT: 467 case ISD::FTRUNC: 468 case ISD::SIGN_EXTEND: 469 case ISD::SINT_TO_FP: 470 case ISD::TRUNCATE: 471 case ISD::UINT_TO_FP: 472 case ISD::ZERO_EXTEND: 473 SplitVecRes_UnaryOp(N, Lo, Hi); 474 break; 475 476 case ISD::ADD: 477 case ISD::SUB: 478 case ISD::MUL: 479 case ISD::FADD: 480 case ISD::FSUB: 481 case ISD::FMUL: 482 case ISD::SDIV: 483 case ISD::UDIV: 484 case ISD::FDIV: 485 case ISD::FPOW: 486 case ISD::AND: 487 case ISD::OR: 488 case ISD::XOR: 489 case ISD::SHL: 490 case ISD::SRA: 491 case ISD::SRL: 492 case ISD::UREM: 493 case ISD::SREM: 494 case ISD::FREM: 495 SplitVecRes_BinOp(N, Lo, Hi); 496 break; 497 } 498 499 // If Lo/Hi is null, the sub-method took care of registering results etc. 500 if (Lo.getNode()) 501 SetSplitVector(SDValue(N, ResNo), Lo, Hi); 502} 503 504void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo, 505 SDValue &Hi) { 506 SDValue LHSLo, LHSHi; 507 GetSplitVector(N->getOperand(0), LHSLo, LHSHi); 508 SDValue RHSLo, RHSHi; 509 GetSplitVector(N->getOperand(1), RHSLo, RHSHi); 510 DebugLoc dl = N->getDebugLoc(); 511 512 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo); 513 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi); 514} 515 516void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, 517 SDValue &Hi) { 518 // We know the result is a vector. The input may be either a vector or a 519 // scalar value. 520 EVT LoVT, HiVT; 521 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 522 DebugLoc dl = N->getDebugLoc(); 523 524 SDValue InOp = N->getOperand(0); 525 EVT InVT = InOp.getValueType(); 526 527 // Handle some special cases efficiently. 528 switch (getTypeAction(InVT)) { 529 case TargetLowering::TypeLegal: 530 case TargetLowering::TypePromoteInteger: 531 case TargetLowering::TypeSoftenFloat: 532 case TargetLowering::TypeScalarizeVector: 533 case TargetLowering::TypeWidenVector: 534 break; 535 case TargetLowering::TypeExpandInteger: 536 case TargetLowering::TypeExpandFloat: 537 // A scalar to vector conversion, where the scalar needs expansion. 538 // If the vector is being split in two then we can just convert the 539 // expanded pieces. 540 if (LoVT == HiVT) { 541 GetExpandedOp(InOp, Lo, Hi); 542 if (TLI.isBigEndian()) 543 std::swap(Lo, Hi); 544 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); 545 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); 546 return; 547 } 548 break; 549 case TargetLowering::TypeSplitVector: 550 // If the input is a vector that needs to be split, convert each split 551 // piece of the input now. 552 GetSplitVector(InOp, Lo, Hi); 553 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); 554 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); 555 return; 556 } 557 558 // In the general case, convert the input to an integer and split it by hand. 559 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits()); 560 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits()); 561 if (TLI.isBigEndian()) 562 std::swap(LoIntVT, HiIntVT); 563 564 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi); 565 566 if (TLI.isBigEndian()) 567 std::swap(Lo, Hi); 568 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); 569 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); 570} 571 572void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, 573 SDValue &Hi) { 574 EVT LoVT, HiVT; 575 DebugLoc dl = N->getDebugLoc(); 576 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 577 unsigned LoNumElts = LoVT.getVectorNumElements(); 578 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts); 579 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size()); 580 581 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end()); 582 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size()); 583} 584 585void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, 586 SDValue &Hi) { 587 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS"); 588 DebugLoc dl = N->getDebugLoc(); 589 unsigned NumSubvectors = N->getNumOperands() / 2; 590 if (NumSubvectors == 1) { 591 Lo = N->getOperand(0); 592 Hi = N->getOperand(1); 593 return; 594 } 595 596 EVT LoVT, HiVT; 597 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 598 599 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors); 600 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size()); 601 602 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end()); 603 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size()); 604} 605 606void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, 607 SDValue &Hi) { 608 SDValue Vec = N->getOperand(0); 609 SDValue Idx = N->getOperand(1); 610 DebugLoc dl = N->getDebugLoc(); 611 612 EVT LoVT, HiVT; 613 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 614 615 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx); 616 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); 617 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec, 618 DAG.getIntPtrConstant(IdxVal + LoVT.getVectorNumElements())); 619} 620 621void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, 622 SDValue &Hi) { 623 DebugLoc dl = N->getDebugLoc(); 624 GetSplitVector(N->getOperand(0), Lo, Hi); 625 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1)); 626 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1)); 627} 628 629void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo, 630 SDValue &Hi) { 631 SDValue LHSLo, LHSHi; 632 GetSplitVector(N->getOperand(0), LHSLo, LHSHi); 633 DebugLoc dl = N->getDebugLoc(); 634 635 EVT LoVT, HiVT; 636 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT); 637 638 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, 639 DAG.getValueType(LoVT)); 640 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, 641 DAG.getValueType(HiVT)); 642} 643 644void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, 645 SDValue &Hi) { 646 SDValue Vec = N->getOperand(0); 647 SDValue Elt = N->getOperand(1); 648 SDValue Idx = N->getOperand(2); 649 DebugLoc dl = N->getDebugLoc(); 650 GetSplitVector(Vec, Lo, Hi); 651 652 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) { 653 unsigned IdxVal = CIdx->getZExtValue(); 654 unsigned LoNumElts = Lo.getValueType().getVectorNumElements(); 655 if (IdxVal < LoNumElts) 656 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, 657 Lo.getValueType(), Lo, Elt, Idx); 658 else 659 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt, 660 DAG.getIntPtrConstant(IdxVal - LoNumElts)); 661 return; 662 } 663 664 // Spill the vector to the stack. 665 EVT VecVT = Vec.getValueType(); 666 EVT EltVT = VecVT.getVectorElementType(); 667 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); 668 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, 669 MachinePointerInfo(), false, false, 0); 670 671 // Store the new element. This may be larger than the vector element type, 672 // so use a truncating store. 673 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx); 674 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext()); 675 unsigned Alignment = 676 TLI.getTargetData()->getPrefTypeAlignment(VecType); 677 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT, 678 false, false, 0); 679 680 // Load the Lo part from the stack slot. 681 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(), 682 false, false, 0); 683 684 // Increment the pointer to the other part. 685 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8; 686 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, 687 DAG.getIntPtrConstant(IncrementSize)); 688 689 // Load the Hi part from the stack slot. 690 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(), 691 false, false, MinAlign(Alignment, IncrementSize)); 692} 693 694void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, 695 SDValue &Hi) { 696 EVT LoVT, HiVT; 697 DebugLoc dl = N->getDebugLoc(); 698 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 699 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0)); 700 Hi = DAG.getUNDEF(HiVT); 701} 702 703void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, 704 SDValue &Hi) { 705 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!"); 706 EVT LoVT, HiVT; 707 DebugLoc dl = LD->getDebugLoc(); 708 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT); 709 710 ISD::LoadExtType ExtType = LD->getExtensionType(); 711 SDValue Ch = LD->getChain(); 712 SDValue Ptr = LD->getBasePtr(); 713 SDValue Offset = DAG.getUNDEF(Ptr.getValueType()); 714 EVT MemoryVT = LD->getMemoryVT(); 715 unsigned Alignment = LD->getOriginalAlignment(); 716 bool isVolatile = LD->isVolatile(); 717 bool isNonTemporal = LD->isNonTemporal(); 718 719 EVT LoMemVT, HiMemVT; 720 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT); 721 722 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, 723 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal, 724 Alignment); 725 726 unsigned IncrementSize = LoMemVT.getSizeInBits()/8; 727 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 728 DAG.getIntPtrConstant(IncrementSize)); 729 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, 730 LD->getPointerInfo().getWithOffset(IncrementSize), 731 HiMemVT, isVolatile, isNonTemporal, Alignment); 732 733 // Build a factor node to remember that this load is independent of the 734 // other one. 735 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1), 736 Hi.getValue(1)); 737 738 // Legalized the chain result - switch anything that used the old chain to 739 // use the new one. 740 ReplaceValueWith(SDValue(LD, 1), Ch); 741} 742 743void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) { 744 EVT LoVT, HiVT; 745 DebugLoc DL = N->getDebugLoc(); 746 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 747 748 // Split the input. 749 EVT InVT = N->getOperand(0).getValueType(); 750 SDValue LL, LH, RL, RH; 751 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(), 752 LoVT.getVectorNumElements()); 753 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0), 754 DAG.getIntPtrConstant(0)); 755 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0), 756 DAG.getIntPtrConstant(InNVT.getVectorNumElements())); 757 758 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1), 759 DAG.getIntPtrConstant(0)); 760 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1), 761 DAG.getIntPtrConstant(InNVT.getVectorNumElements())); 762 763 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2)); 764 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2)); 765} 766 767void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, 768 SDValue &Hi) { 769 // Get the dest types - they may not match the input types, e.g. int_to_fp. 770 EVT LoVT, HiVT; 771 DebugLoc dl = N->getDebugLoc(); 772 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 773 774 // Split the input. 775 EVT InVT = N->getOperand(0).getValueType(); 776 switch (getTypeAction(InVT)) { 777 default: llvm_unreachable("Unexpected type action!"); 778 case TargetLowering::TypeLegal: { 779 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(), 780 LoVT.getVectorNumElements()); 781 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0), 782 DAG.getIntPtrConstant(0)); 783 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0), 784 DAG.getIntPtrConstant(InNVT.getVectorNumElements())); 785 break; 786 } 787 case TargetLowering::TypePromoteInteger: { 788 SDValue InOp = GetPromotedInteger(N->getOperand(0)); 789 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), 790 InOp.getValueType().getVectorElementType(), 791 LoVT.getVectorNumElements()); 792 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, 793 DAG.getIntPtrConstant(0)); 794 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, 795 DAG.getIntPtrConstant(InNVT.getVectorNumElements())); 796 break; 797 } 798 case TargetLowering::TypeSplitVector: 799 GetSplitVector(N->getOperand(0), Lo, Hi); 800 break; 801 case TargetLowering::TypeWidenVector: { 802 // If the result needs to be split and the input needs to be widened, 803 // the two types must have different lengths. Use the widened result 804 // and extract from it to do the split. 805 SDValue InOp = GetWidenedVector(N->getOperand(0)); 806 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(), 807 LoVT.getVectorNumElements()); 808 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, 809 DAG.getIntPtrConstant(0)); 810 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, 811 DAG.getIntPtrConstant(InNVT.getVectorNumElements())); 812 break; 813 } 814 } 815 816 if (N->getOpcode() == ISD::FP_ROUND) { 817 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1)); 818 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1)); 819 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) { 820 SDValue DTyOpLo = DAG.getValueType(LoVT); 821 SDValue DTyOpHi = DAG.getValueType(HiVT); 822 SDValue STyOpLo = DAG.getValueType(Lo.getValueType()); 823 SDValue STyOpHi = DAG.getValueType(Hi.getValueType()); 824 SDValue RndOp = N->getOperand(3); 825 SDValue SatOp = N->getOperand(4); 826 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode(); 827 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp, 828 CvtCode); 829 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp, 830 CvtCode); 831 } else { 832 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo); 833 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi); 834 } 835} 836 837void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, 838 SDValue &Lo, SDValue &Hi) { 839 // The low and high parts of the original input give four input vectors. 840 SDValue Inputs[4]; 841 DebugLoc dl = N->getDebugLoc(); 842 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]); 843 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]); 844 EVT NewVT = Inputs[0].getValueType(); 845 unsigned NewElts = NewVT.getVectorNumElements(); 846 847 // If Lo or Hi uses elements from at most two of the four input vectors, then 848 // express it as a vector shuffle of those two inputs. Otherwise extract the 849 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR. 850 SmallVector<int, 16> Ops; 851 for (unsigned High = 0; High < 2; ++High) { 852 SDValue &Output = High ? Hi : Lo; 853 854 // Build a shuffle mask for the output, discovering on the fly which 855 // input vectors to use as shuffle operands (recorded in InputUsed). 856 // If building a suitable shuffle vector proves too hard, then bail 857 // out with useBuildVector set. 858 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered. 859 unsigned FirstMaskIdx = High * NewElts; 860 bool useBuildVector = false; 861 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) { 862 // The mask element. This indexes into the input. 863 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset); 864 865 // The input vector this mask element indexes into. 866 unsigned Input = (unsigned)Idx / NewElts; 867 868 if (Input >= array_lengthof(Inputs)) { 869 // The mask element does not index into any input vector. 870 Ops.push_back(-1); 871 continue; 872 } 873 874 // Turn the index into an offset from the start of the input vector. 875 Idx -= Input * NewElts; 876 877 // Find or create a shuffle vector operand to hold this input. 878 unsigned OpNo; 879 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) { 880 if (InputUsed[OpNo] == Input) { 881 // This input vector is already an operand. 882 break; 883 } else if (InputUsed[OpNo] == -1U) { 884 // Create a new operand for this input vector. 885 InputUsed[OpNo] = Input; 886 break; 887 } 888 } 889 890 if (OpNo >= array_lengthof(InputUsed)) { 891 // More than two input vectors used! Give up on trying to create a 892 // shuffle vector. Insert all elements into a BUILD_VECTOR instead. 893 useBuildVector = true; 894 break; 895 } 896 897 // Add the mask index for the new shuffle vector. 898 Ops.push_back(Idx + OpNo * NewElts); 899 } 900 901 if (useBuildVector) { 902 EVT EltVT = NewVT.getVectorElementType(); 903 SmallVector<SDValue, 16> SVOps; 904 905 // Extract the input elements by hand. 906 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) { 907 // The mask element. This indexes into the input. 908 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset); 909 910 // The input vector this mask element indexes into. 911 unsigned Input = (unsigned)Idx / NewElts; 912 913 if (Input >= array_lengthof(Inputs)) { 914 // The mask element is "undef" or indexes off the end of the input. 915 SVOps.push_back(DAG.getUNDEF(EltVT)); 916 continue; 917 } 918 919 // Turn the index into an offset from the start of the input vector. 920 Idx -= Input * NewElts; 921 922 // Extract the vector element by hand. 923 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, 924 Inputs[Input], DAG.getIntPtrConstant(Idx))); 925 } 926 927 // Construct the Lo/Hi output using a BUILD_VECTOR. 928 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size()); 929 } else if (InputUsed[0] == -1U) { 930 // No input vectors were used! The result is undefined. 931 Output = DAG.getUNDEF(NewVT); 932 } else { 933 SDValue Op0 = Inputs[InputUsed[0]]; 934 // If only one input was used, use an undefined vector for the other. 935 SDValue Op1 = InputUsed[1] == -1U ? 936 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]]; 937 // At least one input vector was used. Create a new shuffle vector. 938 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]); 939 } 940 941 Ops.clear(); 942 } 943} 944 945 946//===----------------------------------------------------------------------===// 947// Operand Vector Splitting 948//===----------------------------------------------------------------------===// 949 950/// SplitVectorOperand - This method is called when the specified operand of the 951/// specified node is found to need vector splitting. At this point, all of the 952/// result types of the node are known to be legal, but other operands of the 953/// node may need legalization as well as the specified one. 954bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) { 955 DEBUG(dbgs() << "Split node operand: "; 956 N->dump(&DAG); 957 dbgs() << "\n"); 958 SDValue Res = SDValue(); 959 960 if (Res.getNode() == 0) { 961 switch (N->getOpcode()) { 962 default: 963#ifndef NDEBUG 964 dbgs() << "SplitVectorOperand Op #" << OpNo << ": "; 965 N->dump(&DAG); 966 dbgs() << "\n"; 967#endif 968 llvm_unreachable("Do not know how to split this operator's operand!"); 969 970 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break; 971 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break; 972 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break; 973 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break; 974 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break; 975 case ISD::STORE: 976 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo); 977 break; 978 979 case ISD::CTTZ: 980 case ISD::CTLZ: 981 case ISD::CTPOP: 982 case ISD::FP_EXTEND: 983 case ISD::FP_TO_SINT: 984 case ISD::FP_TO_UINT: 985 case ISD::SINT_TO_FP: 986 case ISD::UINT_TO_FP: 987 case ISD::FTRUNC: 988 case ISD::TRUNCATE: 989 case ISD::SIGN_EXTEND: 990 case ISD::ZERO_EXTEND: 991 case ISD::ANY_EXTEND: 992 Res = SplitVecOp_UnaryOp(N); 993 break; 994 } 995 } 996 997 // If the result is null, the sub-method took care of registering results etc. 998 if (!Res.getNode()) return false; 999 1000 // If the result is N, the sub-method updated N in place. Tell the legalizer 1001 // core about this. 1002 if (Res.getNode() == N) 1003 return true; 1004 1005 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && 1006 "Invalid operand expansion"); 1007 1008 ReplaceValueWith(SDValue(N, 0), Res); 1009 return false; 1010} 1011 1012SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) { 1013 // The result has a legal vector type, but the input needs splitting. 1014 EVT ResVT = N->getValueType(0); 1015 SDValue Lo, Hi; 1016 DebugLoc dl = N->getDebugLoc(); 1017 GetSplitVector(N->getOperand(0), Lo, Hi); 1018 EVT InVT = Lo.getValueType(); 1019 1020 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(), 1021 InVT.getVectorNumElements()); 1022 1023 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo); 1024 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi); 1025 1026 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi); 1027} 1028 1029SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) { 1030 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will 1031 // end up being split all the way down to individual components. Convert the 1032 // split pieces into integers and reassemble. 1033 SDValue Lo, Hi; 1034 GetSplitVector(N->getOperand(0), Lo, Hi); 1035 Lo = BitConvertToInteger(Lo); 1036 Hi = BitConvertToInteger(Hi); 1037 1038 if (TLI.isBigEndian()) 1039 std::swap(Lo, Hi); 1040 1041 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0), 1042 JoinIntegers(Lo, Hi)); 1043} 1044 1045SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) { 1046 // We know that the extracted result type is legal. 1047 EVT SubVT = N->getValueType(0); 1048 SDValue Idx = N->getOperand(1); 1049 DebugLoc dl = N->getDebugLoc(); 1050 SDValue Lo, Hi; 1051 GetSplitVector(N->getOperand(0), Lo, Hi); 1052 1053 uint64_t LoElts = Lo.getValueType().getVectorNumElements(); 1054 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); 1055 1056 if (IdxVal < LoElts) { 1057 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts && 1058 "Extracted subvector crosses vector split!"); 1059 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx); 1060 } else { 1061 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi, 1062 DAG.getConstant(IdxVal - LoElts, Idx.getValueType())); 1063 } 1064} 1065 1066SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) { 1067 SDValue Vec = N->getOperand(0); 1068 SDValue Idx = N->getOperand(1); 1069 EVT VecVT = Vec.getValueType(); 1070 1071 if (isa<ConstantSDNode>(Idx)) { 1072 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); 1073 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!"); 1074 1075 SDValue Lo, Hi; 1076 GetSplitVector(Vec, Lo, Hi); 1077 1078 uint64_t LoElts = Lo.getValueType().getVectorNumElements(); 1079 1080 if (IdxVal < LoElts) 1081 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0); 1082 return SDValue(DAG.UpdateNodeOperands(N, Hi, 1083 DAG.getConstant(IdxVal - LoElts, 1084 Idx.getValueType())), 0); 1085 } 1086 1087 // Store the vector to the stack. 1088 EVT EltVT = VecVT.getVectorElementType(); 1089 DebugLoc dl = N->getDebugLoc(); 1090 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); 1091 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, 1092 MachinePointerInfo(), false, false, 0); 1093 1094 // Load back the required element. 1095 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx); 1096 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr, 1097 MachinePointerInfo(), EltVT, false, false, 0); 1098} 1099 1100SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) { 1101 assert(N->isUnindexed() && "Indexed store of vector?"); 1102 assert(OpNo == 1 && "Can only split the stored value"); 1103 DebugLoc DL = N->getDebugLoc(); 1104 1105 bool isTruncating = N->isTruncatingStore(); 1106 SDValue Ch = N->getChain(); 1107 SDValue Ptr = N->getBasePtr(); 1108 EVT MemoryVT = N->getMemoryVT(); 1109 unsigned Alignment = N->getOriginalAlignment(); 1110 bool isVol = N->isVolatile(); 1111 bool isNT = N->isNonTemporal(); 1112 SDValue Lo, Hi; 1113 GetSplitVector(N->getOperand(1), Lo, Hi); 1114 1115 EVT LoMemVT, HiMemVT; 1116 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT); 1117 1118 unsigned IncrementSize = LoMemVT.getSizeInBits()/8; 1119 1120 if (isTruncating) 1121 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), 1122 LoMemVT, isVol, isNT, Alignment); 1123 else 1124 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), 1125 isVol, isNT, Alignment); 1126 1127 // Increment the pointer to the other half. 1128 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr, 1129 DAG.getIntPtrConstant(IncrementSize)); 1130 1131 if (isTruncating) 1132 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr, 1133 N->getPointerInfo().getWithOffset(IncrementSize), 1134 HiMemVT, isVol, isNT, Alignment); 1135 else 1136 Hi = DAG.getStore(Ch, DL, Hi, Ptr, 1137 N->getPointerInfo().getWithOffset(IncrementSize), 1138 isVol, isNT, Alignment); 1139 1140 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi); 1141} 1142 1143SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) { 1144 DebugLoc DL = N->getDebugLoc(); 1145 1146 // The input operands all must have the same type, and we know the result the 1147 // result type is valid. Convert this to a buildvector which extracts all the 1148 // input elements. 1149 // TODO: If the input elements are power-two vectors, we could convert this to 1150 // a new CONCAT_VECTORS node with elements that are half-wide. 1151 SmallVector<SDValue, 32> Elts; 1152 EVT EltVT = N->getValueType(0).getVectorElementType(); 1153 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) { 1154 SDValue Op = N->getOperand(op); 1155 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements(); 1156 i != e; ++i) { 1157 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, 1158 Op, DAG.getIntPtrConstant(i))); 1159 1160 } 1161 } 1162 1163 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0), 1164 &Elts[0], Elts.size()); 1165} 1166 1167SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) { 1168 // The result has a legal vector type, but the input needs splitting. 1169 EVT ResVT = N->getValueType(0); 1170 SDValue Lo, Hi; 1171 DebugLoc DL = N->getDebugLoc(); 1172 GetSplitVector(N->getOperand(0), Lo, Hi); 1173 EVT InVT = Lo.getValueType(); 1174 1175 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(), 1176 InVT.getVectorNumElements()); 1177 1178 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1)); 1179 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1)); 1180 1181 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi); 1182} 1183 1184 1185 1186//===----------------------------------------------------------------------===// 1187// Result Vector Widening 1188//===----------------------------------------------------------------------===// 1189 1190void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) { 1191 DEBUG(dbgs() << "Widen node result " << ResNo << ": "; 1192 N->dump(&DAG); 1193 dbgs() << "\n"); 1194 1195 // See if the target wants to custom widen this node. 1196 if (CustomWidenLowerNode(N, N->getValueType(ResNo))) 1197 return; 1198 1199 SDValue Res = SDValue(); 1200 switch (N->getOpcode()) { 1201 default: 1202#ifndef NDEBUG 1203 dbgs() << "WidenVectorResult #" << ResNo << ": "; 1204 N->dump(&DAG); 1205 dbgs() << "\n"; 1206#endif 1207 llvm_unreachable("Do not know how to widen the result of this operator!"); 1208 1209 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break; 1210 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break; 1211 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break; 1212 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break; 1213 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break; 1214 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break; 1215 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break; 1216 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break; 1217 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break; 1218 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break; 1219 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break; 1220 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break; 1221 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break; 1222 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break; 1223 case ISD::VECTOR_SHUFFLE: 1224 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N)); 1225 break; 1226 case ISD::VSETCC: 1227 Res = WidenVecRes_VSETCC(N); 1228 break; 1229 1230 case ISD::ADD: 1231 case ISD::AND: 1232 case ISD::BSWAP: 1233 case ISD::FADD: 1234 case ISD::FCOPYSIGN: 1235 case ISD::FDIV: 1236 case ISD::FMUL: 1237 case ISD::FPOW: 1238 case ISD::FREM: 1239 case ISD::FSUB: 1240 case ISD::MUL: 1241 case ISD::MULHS: 1242 case ISD::MULHU: 1243 case ISD::OR: 1244 case ISD::SDIV: 1245 case ISD::SREM: 1246 case ISD::UDIV: 1247 case ISD::UREM: 1248 case ISD::SUB: 1249 case ISD::XOR: 1250 Res = WidenVecRes_Binary(N); 1251 break; 1252 1253 case ISD::FPOWI: 1254 Res = WidenVecRes_POWI(N); 1255 break; 1256 1257 case ISD::SHL: 1258 case ISD::SRA: 1259 case ISD::SRL: 1260 Res = WidenVecRes_Shift(N); 1261 break; 1262 1263 case ISD::ANY_EXTEND: 1264 case ISD::FP_EXTEND: 1265 case ISD::FP_ROUND: 1266 case ISD::FP_TO_SINT: 1267 case ISD::FP_TO_UINT: 1268 case ISD::SIGN_EXTEND: 1269 case ISD::SINT_TO_FP: 1270 case ISD::TRUNCATE: 1271 case ISD::UINT_TO_FP: 1272 case ISD::ZERO_EXTEND: 1273 Res = WidenVecRes_Convert(N); 1274 break; 1275 1276 case ISD::CTLZ: 1277 case ISD::CTPOP: 1278 case ISD::CTTZ: 1279 case ISD::FABS: 1280 case ISD::FCEIL: 1281 case ISD::FCOS: 1282 case ISD::FEXP: 1283 case ISD::FEXP2: 1284 case ISD::FFLOOR: 1285 case ISD::FLOG: 1286 case ISD::FLOG10: 1287 case ISD::FLOG2: 1288 case ISD::FNEARBYINT: 1289 case ISD::FNEG: 1290 case ISD::FRINT: 1291 case ISD::FSIN: 1292 case ISD::FSQRT: 1293 case ISD::FTRUNC: 1294 Res = WidenVecRes_Unary(N); 1295 break; 1296 } 1297 1298 // If Res is null, the sub-method took care of registering the result. 1299 if (Res.getNode()) 1300 SetWidenedVector(SDValue(N, ResNo), Res); 1301} 1302 1303SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) { 1304 // Binary op widening. 1305 unsigned Opcode = N->getOpcode(); 1306 DebugLoc dl = N->getDebugLoc(); 1307 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1308 EVT WidenEltVT = WidenVT.getVectorElementType(); 1309 EVT VT = WidenVT; 1310 unsigned NumElts = VT.getVectorNumElements(); 1311 while (!TLI.isTypeLegal(VT) && NumElts != 1) { 1312 NumElts = NumElts / 2; 1313 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts); 1314 } 1315 1316 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) { 1317 // Operation doesn't trap so just widen as normal. 1318 SDValue InOp1 = GetWidenedVector(N->getOperand(0)); 1319 SDValue InOp2 = GetWidenedVector(N->getOperand(1)); 1320 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2); 1321 } 1322 1323 // No legal vector version so unroll the vector operation and then widen. 1324 if (NumElts == 1) 1325 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements()); 1326 1327 // Since the operation can trap, apply operation on the original vector. 1328 EVT MaxVT = VT; 1329 SDValue InOp1 = GetWidenedVector(N->getOperand(0)); 1330 SDValue InOp2 = GetWidenedVector(N->getOperand(1)); 1331 unsigned CurNumElts = N->getValueType(0).getVectorNumElements(); 1332 1333 SmallVector<SDValue, 16> ConcatOps(CurNumElts); 1334 unsigned ConcatEnd = 0; // Current ConcatOps index. 1335 int Idx = 0; // Current Idx into input vectors. 1336 1337 // NumElts := greatest legal vector size (at most WidenVT) 1338 // while (orig. vector has unhandled elements) { 1339 // take munches of size NumElts from the beginning and add to ConcatOps 1340 // NumElts := next smaller supported vector size or 1 1341 // } 1342 while (CurNumElts != 0) { 1343 while (CurNumElts >= NumElts) { 1344 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1, 1345 DAG.getIntPtrConstant(Idx)); 1346 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2, 1347 DAG.getIntPtrConstant(Idx)); 1348 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2); 1349 Idx += NumElts; 1350 CurNumElts -= NumElts; 1351 } 1352 do { 1353 NumElts = NumElts / 2; 1354 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts); 1355 } while (!TLI.isTypeLegal(VT) && NumElts != 1); 1356 1357 if (NumElts == 1) { 1358 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) { 1359 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, 1360 InOp1, DAG.getIntPtrConstant(Idx)); 1361 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, 1362 InOp2, DAG.getIntPtrConstant(Idx)); 1363 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT, 1364 EOp1, EOp2); 1365 } 1366 CurNumElts = 0; 1367 } 1368 } 1369 1370 // Check to see if we have a single operation with the widen type. 1371 if (ConcatEnd == 1) { 1372 VT = ConcatOps[0].getValueType(); 1373 if (VT == WidenVT) 1374 return ConcatOps[0]; 1375 } 1376 1377 // while (Some element of ConcatOps is not of type MaxVT) { 1378 // From the end of ConcatOps, collect elements of the same type and put 1379 // them into an op of the next larger supported type 1380 // } 1381 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) { 1382 Idx = ConcatEnd - 1; 1383 VT = ConcatOps[Idx--].getValueType(); 1384 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT) 1385 Idx--; 1386 1387 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1; 1388 EVT NextVT; 1389 do { 1390 NextSize *= 2; 1391 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize); 1392 } while (!TLI.isTypeLegal(NextVT)); 1393 1394 if (!VT.isVector()) { 1395 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT 1396 SDValue VecOp = DAG.getUNDEF(NextVT); 1397 unsigned NumToInsert = ConcatEnd - Idx - 1; 1398 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) { 1399 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp, 1400 ConcatOps[OpIdx], DAG.getIntPtrConstant(i)); 1401 } 1402 ConcatOps[Idx+1] = VecOp; 1403 ConcatEnd = Idx + 2; 1404 } else { 1405 // Vector type, create a CONCAT_VECTORS of type NextVT 1406 SDValue undefVec = DAG.getUNDEF(VT); 1407 unsigned OpsToConcat = NextSize/VT.getVectorNumElements(); 1408 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat); 1409 unsigned RealVals = ConcatEnd - Idx - 1; 1410 unsigned SubConcatEnd = 0; 1411 unsigned SubConcatIdx = Idx + 1; 1412 while (SubConcatEnd < RealVals) 1413 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx]; 1414 while (SubConcatEnd < OpsToConcat) 1415 SubConcatOps[SubConcatEnd++] = undefVec; 1416 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl, 1417 NextVT, &SubConcatOps[0], 1418 OpsToConcat); 1419 ConcatEnd = SubConcatIdx + 1; 1420 } 1421 } 1422 1423 // Check to see if we have a single operation with the widen type. 1424 if (ConcatEnd == 1) { 1425 VT = ConcatOps[0].getValueType(); 1426 if (VT == WidenVT) 1427 return ConcatOps[0]; 1428 } 1429 1430 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT 1431 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements(); 1432 if (NumOps != ConcatEnd ) { 1433 SDValue UndefVal = DAG.getUNDEF(MaxVT); 1434 for (unsigned j = ConcatEnd; j < NumOps; ++j) 1435 ConcatOps[j] = UndefVal; 1436 } 1437 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps); 1438} 1439 1440SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) { 1441 SDValue InOp = N->getOperand(0); 1442 DebugLoc DL = N->getDebugLoc(); 1443 1444 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1445 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1446 1447 EVT InVT = InOp.getValueType(); 1448 EVT InEltVT = InVT.getVectorElementType(); 1449 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts); 1450 1451 unsigned Opcode = N->getOpcode(); 1452 unsigned InVTNumElts = InVT.getVectorNumElements(); 1453 1454 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) { 1455 InOp = GetWidenedVector(N->getOperand(0)); 1456 InVT = InOp.getValueType(); 1457 InVTNumElts = InVT.getVectorNumElements(); 1458 if (InVTNumElts == WidenNumElts) { 1459 if (N->getNumOperands() == 1) 1460 return DAG.getNode(Opcode, DL, WidenVT, InOp); 1461 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1)); 1462 } 1463 } 1464 1465 if (TLI.isTypeLegal(InWidenVT)) { 1466 // Because the result and the input are different vector types, widening 1467 // the result could create a legal type but widening the input might make 1468 // it an illegal type that might lead to repeatedly splitting the input 1469 // and then widening it. To avoid this, we widen the input only if 1470 // it results in a legal type. 1471 if (WidenNumElts % InVTNumElts == 0) { 1472 // Widen the input and call convert on the widened input vector. 1473 unsigned NumConcat = WidenNumElts/InVTNumElts; 1474 SmallVector<SDValue, 16> Ops(NumConcat); 1475 Ops[0] = InOp; 1476 SDValue UndefVal = DAG.getUNDEF(InVT); 1477 for (unsigned i = 1; i != NumConcat; ++i) 1478 Ops[i] = UndefVal; 1479 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT, 1480 &Ops[0], NumConcat); 1481 if (N->getNumOperands() == 1) 1482 return DAG.getNode(Opcode, DL, WidenVT, InVec); 1483 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1)); 1484 } 1485 1486 if (InVTNumElts % WidenNumElts == 0) { 1487 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT, 1488 InOp, DAG.getIntPtrConstant(0)); 1489 // Extract the input and convert the shorten input vector. 1490 if (N->getNumOperands() == 1) 1491 return DAG.getNode(Opcode, DL, WidenVT, InVal); 1492 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1)); 1493 } 1494 } 1495 1496 // Otherwise unroll into some nasty scalar code and rebuild the vector. 1497 SmallVector<SDValue, 16> Ops(WidenNumElts); 1498 EVT EltVT = WidenVT.getVectorElementType(); 1499 unsigned MinElts = std::min(InVTNumElts, WidenNumElts); 1500 unsigned i; 1501 for (i=0; i < MinElts; ++i) { 1502 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp, 1503 DAG.getIntPtrConstant(i)); 1504 if (N->getNumOperands() == 1) 1505 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val); 1506 else 1507 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1)); 1508 } 1509 1510 SDValue UndefVal = DAG.getUNDEF(EltVT); 1511 for (; i < WidenNumElts; ++i) 1512 Ops[i] = UndefVal; 1513 1514 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts); 1515} 1516 1517SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) { 1518 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1519 SDValue InOp = GetWidenedVector(N->getOperand(0)); 1520 SDValue ShOp = N->getOperand(1); 1521 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp); 1522} 1523 1524SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) { 1525 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1526 SDValue InOp = GetWidenedVector(N->getOperand(0)); 1527 SDValue ShOp = N->getOperand(1); 1528 1529 EVT ShVT = ShOp.getValueType(); 1530 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) { 1531 ShOp = GetWidenedVector(ShOp); 1532 ShVT = ShOp.getValueType(); 1533 } 1534 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(), 1535 ShVT.getVectorElementType(), 1536 WidenVT.getVectorNumElements()); 1537 if (ShVT != ShWidenVT) 1538 ShOp = ModifyToType(ShOp, ShWidenVT); 1539 1540 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp); 1541} 1542 1543SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) { 1544 // Unary op widening. 1545 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1546 SDValue InOp = GetWidenedVector(N->getOperand(0)); 1547 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp); 1548} 1549 1550SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) { 1551 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1552 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), 1553 cast<VTSDNode>(N->getOperand(1))->getVT() 1554 .getVectorElementType(), 1555 WidenVT.getVectorNumElements()); 1556 SDValue WidenLHS = GetWidenedVector(N->getOperand(0)); 1557 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), 1558 WidenVT, WidenLHS, DAG.getValueType(ExtVT)); 1559} 1560 1561SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) { 1562 SDValue InOp = N->getOperand(0); 1563 EVT InVT = InOp.getValueType(); 1564 EVT VT = N->getValueType(0); 1565 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1566 DebugLoc dl = N->getDebugLoc(); 1567 1568 switch (getTypeAction(InVT)) { 1569 default: 1570 assert(false && "Unknown type action!"); 1571 break; 1572 case TargetLowering::TypeLegal: 1573 break; 1574 case TargetLowering::TypePromoteInteger: 1575 // If the InOp is promoted to the same size, convert it. Otherwise, 1576 // fall out of the switch and widen the promoted input. 1577 InOp = GetPromotedInteger(InOp); 1578 InVT = InOp.getValueType(); 1579 if (WidenVT.bitsEq(InVT)) 1580 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp); 1581 break; 1582 case TargetLowering::TypeSoftenFloat: 1583 case TargetLowering::TypeExpandInteger: 1584 case TargetLowering::TypeExpandFloat: 1585 case TargetLowering::TypeScalarizeVector: 1586 case TargetLowering::TypeSplitVector: 1587 break; 1588 case TargetLowering::TypeWidenVector: 1589 // If the InOp is widened to the same size, convert it. Otherwise, fall 1590 // out of the switch and widen the widened input. 1591 InOp = GetWidenedVector(InOp); 1592 InVT = InOp.getValueType(); 1593 if (WidenVT.bitsEq(InVT)) 1594 // The input widens to the same size. Convert to the widen value. 1595 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp); 1596 break; 1597 } 1598 1599 unsigned WidenSize = WidenVT.getSizeInBits(); 1600 unsigned InSize = InVT.getSizeInBits(); 1601 // x86mmx is not an acceptable vector element type, so don't try. 1602 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) { 1603 // Determine new input vector type. The new input vector type will use 1604 // the same element type (if its a vector) or use the input type as a 1605 // vector. It is the same size as the type to widen to. 1606 EVT NewInVT; 1607 unsigned NewNumElts = WidenSize / InSize; 1608 if (InVT.isVector()) { 1609 EVT InEltVT = InVT.getVectorElementType(); 1610 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, 1611 WidenSize / InEltVT.getSizeInBits()); 1612 } else { 1613 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts); 1614 } 1615 1616 if (TLI.isTypeLegal(NewInVT)) { 1617 // Because the result and the input are different vector types, widening 1618 // the result could create a legal type but widening the input might make 1619 // it an illegal type that might lead to repeatedly splitting the input 1620 // and then widening it. To avoid this, we widen the input only if 1621 // it results in a legal type. 1622 SmallVector<SDValue, 16> Ops(NewNumElts); 1623 SDValue UndefVal = DAG.getUNDEF(InVT); 1624 Ops[0] = InOp; 1625 for (unsigned i = 1; i < NewNumElts; ++i) 1626 Ops[i] = UndefVal; 1627 1628 SDValue NewVec; 1629 if (InVT.isVector()) 1630 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, 1631 NewInVT, &Ops[0], NewNumElts); 1632 else 1633 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl, 1634 NewInVT, &Ops[0], NewNumElts); 1635 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec); 1636 } 1637 } 1638 1639 return CreateStackStoreLoad(InOp, WidenVT); 1640} 1641 1642SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) { 1643 DebugLoc dl = N->getDebugLoc(); 1644 // Build a vector with undefined for the new nodes. 1645 EVT VT = N->getValueType(0); 1646 EVT EltVT = VT.getVectorElementType(); 1647 unsigned NumElts = VT.getVectorNumElements(); 1648 1649 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1650 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1651 1652 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end()); 1653 NewOps.reserve(WidenNumElts); 1654 for (unsigned i = NumElts; i < WidenNumElts; ++i) 1655 NewOps.push_back(DAG.getUNDEF(EltVT)); 1656 1657 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size()); 1658} 1659 1660SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) { 1661 EVT InVT = N->getOperand(0).getValueType(); 1662 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1663 DebugLoc dl = N->getDebugLoc(); 1664 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1665 unsigned NumInElts = InVT.getVectorNumElements(); 1666 unsigned NumOperands = N->getNumOperands(); 1667 1668 bool InputWidened = false; // Indicates we need to widen the input. 1669 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) { 1670 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) { 1671 // Add undef vectors to widen to correct length. 1672 unsigned NumConcat = WidenVT.getVectorNumElements() / 1673 InVT.getVectorNumElements(); 1674 SDValue UndefVal = DAG.getUNDEF(InVT); 1675 SmallVector<SDValue, 16> Ops(NumConcat); 1676 for (unsigned i=0; i < NumOperands; ++i) 1677 Ops[i] = N->getOperand(i); 1678 for (unsigned i = NumOperands; i != NumConcat; ++i) 1679 Ops[i] = UndefVal; 1680 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat); 1681 } 1682 } else { 1683 InputWidened = true; 1684 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) { 1685 // The inputs and the result are widen to the same value. 1686 unsigned i; 1687 for (i=1; i < NumOperands; ++i) 1688 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 1689 break; 1690 1691 if (i == NumOperands) 1692 // Everything but the first operand is an UNDEF so just return the 1693 // widened first operand. 1694 return GetWidenedVector(N->getOperand(0)); 1695 1696 if (NumOperands == 2) { 1697 // Replace concat of two operands with a shuffle. 1698 SmallVector<int, 16> MaskOps(WidenNumElts, -1); 1699 for (unsigned i = 0; i < NumInElts; ++i) { 1700 MaskOps[i] = i; 1701 MaskOps[i + NumInElts] = i + WidenNumElts; 1702 } 1703 return DAG.getVectorShuffle(WidenVT, dl, 1704 GetWidenedVector(N->getOperand(0)), 1705 GetWidenedVector(N->getOperand(1)), 1706 &MaskOps[0]); 1707 } 1708 } 1709 } 1710 1711 // Fall back to use extracts and build vector. 1712 EVT EltVT = WidenVT.getVectorElementType(); 1713 SmallVector<SDValue, 16> Ops(WidenNumElts); 1714 unsigned Idx = 0; 1715 for (unsigned i=0; i < NumOperands; ++i) { 1716 SDValue InOp = N->getOperand(i); 1717 if (InputWidened) 1718 InOp = GetWidenedVector(InOp); 1719 for (unsigned j=0; j < NumInElts; ++j) 1720 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, 1721 DAG.getIntPtrConstant(j)); 1722 } 1723 SDValue UndefVal = DAG.getUNDEF(EltVT); 1724 for (; Idx < WidenNumElts; ++Idx) 1725 Ops[Idx] = UndefVal; 1726 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts); 1727} 1728 1729SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) { 1730 DebugLoc dl = N->getDebugLoc(); 1731 SDValue InOp = N->getOperand(0); 1732 SDValue RndOp = N->getOperand(3); 1733 SDValue SatOp = N->getOperand(4); 1734 1735 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1736 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1737 1738 EVT InVT = InOp.getValueType(); 1739 EVT InEltVT = InVT.getVectorElementType(); 1740 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts); 1741 1742 SDValue DTyOp = DAG.getValueType(WidenVT); 1743 SDValue STyOp = DAG.getValueType(InWidenVT); 1744 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode(); 1745 1746 unsigned InVTNumElts = InVT.getVectorNumElements(); 1747 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) { 1748 InOp = GetWidenedVector(InOp); 1749 InVT = InOp.getValueType(); 1750 InVTNumElts = InVT.getVectorNumElements(); 1751 if (InVTNumElts == WidenNumElts) 1752 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp, 1753 SatOp, CvtCode); 1754 } 1755 1756 if (TLI.isTypeLegal(InWidenVT)) { 1757 // Because the result and the input are different vector types, widening 1758 // the result could create a legal type but widening the input might make 1759 // it an illegal type that might lead to repeatedly splitting the input 1760 // and then widening it. To avoid this, we widen the input only if 1761 // it results in a legal type. 1762 if (WidenNumElts % InVTNumElts == 0) { 1763 // Widen the input and call convert on the widened input vector. 1764 unsigned NumConcat = WidenNumElts/InVTNumElts; 1765 SmallVector<SDValue, 16> Ops(NumConcat); 1766 Ops[0] = InOp; 1767 SDValue UndefVal = DAG.getUNDEF(InVT); 1768 for (unsigned i = 1; i != NumConcat; ++i) 1769 Ops[i] = UndefVal; 1770 1771 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat); 1772 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp, 1773 SatOp, CvtCode); 1774 } 1775 1776 if (InVTNumElts % WidenNumElts == 0) { 1777 // Extract the input and convert the shorten input vector. 1778 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp, 1779 DAG.getIntPtrConstant(0)); 1780 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp, 1781 SatOp, CvtCode); 1782 } 1783 } 1784 1785 // Otherwise unroll into some nasty scalar code and rebuild the vector. 1786 SmallVector<SDValue, 16> Ops(WidenNumElts); 1787 EVT EltVT = WidenVT.getVectorElementType(); 1788 DTyOp = DAG.getValueType(EltVT); 1789 STyOp = DAG.getValueType(InEltVT); 1790 1791 unsigned MinElts = std::min(InVTNumElts, WidenNumElts); 1792 unsigned i; 1793 for (i=0; i < MinElts; ++i) { 1794 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp, 1795 DAG.getIntPtrConstant(i)); 1796 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp, 1797 SatOp, CvtCode); 1798 } 1799 1800 SDValue UndefVal = DAG.getUNDEF(EltVT); 1801 for (; i < WidenNumElts; ++i) 1802 Ops[i] = UndefVal; 1803 1804 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts); 1805} 1806 1807SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) { 1808 EVT VT = N->getValueType(0); 1809 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1810 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1811 SDValue InOp = N->getOperand(0); 1812 SDValue Idx = N->getOperand(1); 1813 DebugLoc dl = N->getDebugLoc(); 1814 1815 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector) 1816 InOp = GetWidenedVector(InOp); 1817 1818 EVT InVT = InOp.getValueType(); 1819 1820 // Check if we can just return the input vector after widening. 1821 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); 1822 if (IdxVal == 0 && InVT == WidenVT) 1823 return InOp; 1824 1825 // Check if we can extract from the vector. 1826 unsigned InNumElts = InVT.getVectorNumElements(); 1827 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts) 1828 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx); 1829 1830 // We could try widening the input to the right length but for now, extract 1831 // the original elements, fill the rest with undefs and build a vector. 1832 SmallVector<SDValue, 16> Ops(WidenNumElts); 1833 EVT EltVT = VT.getVectorElementType(); 1834 unsigned NumElts = VT.getVectorNumElements(); 1835 unsigned i; 1836 for (i=0; i < NumElts; ++i) 1837 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, 1838 DAG.getIntPtrConstant(IdxVal+i)); 1839 1840 SDValue UndefVal = DAG.getUNDEF(EltVT); 1841 for (; i < WidenNumElts; ++i) 1842 Ops[i] = UndefVal; 1843 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts); 1844} 1845 1846SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) { 1847 SDValue InOp = GetWidenedVector(N->getOperand(0)); 1848 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(), 1849 InOp.getValueType(), InOp, 1850 N->getOperand(1), N->getOperand(2)); 1851} 1852 1853SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) { 1854 LoadSDNode *LD = cast<LoadSDNode>(N); 1855 ISD::LoadExtType ExtType = LD->getExtensionType(); 1856 1857 SDValue Result; 1858 SmallVector<SDValue, 16> LdChain; // Chain for the series of load 1859 if (ExtType != ISD::NON_EXTLOAD) 1860 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType); 1861 else 1862 Result = GenWidenVectorLoads(LdChain, LD); 1863 1864 // If we generate a single load, we can use that for the chain. Otherwise, 1865 // build a factor node to remember the multiple loads are independent and 1866 // chain to that. 1867 SDValue NewChain; 1868 if (LdChain.size() == 1) 1869 NewChain = LdChain[0]; 1870 else 1871 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other, 1872 &LdChain[0], LdChain.size()); 1873 1874 // Modified the chain - switch anything that used the old chain to use 1875 // the new one. 1876 ReplaceValueWith(SDValue(N, 1), NewChain); 1877 1878 return Result; 1879} 1880 1881SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) { 1882 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1883 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(), 1884 WidenVT, N->getOperand(0)); 1885} 1886 1887SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) { 1888 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1889 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1890 1891 SDValue Cond1 = N->getOperand(0); 1892 EVT CondVT = Cond1.getValueType(); 1893 if (CondVT.isVector()) { 1894 EVT CondEltVT = CondVT.getVectorElementType(); 1895 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(), 1896 CondEltVT, WidenNumElts); 1897 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector) 1898 Cond1 = GetWidenedVector(Cond1); 1899 1900 if (Cond1.getValueType() != CondWidenVT) 1901 Cond1 = ModifyToType(Cond1, CondWidenVT); 1902 } 1903 1904 SDValue InOp1 = GetWidenedVector(N->getOperand(1)); 1905 SDValue InOp2 = GetWidenedVector(N->getOperand(2)); 1906 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT); 1907 return DAG.getNode(ISD::SELECT, N->getDebugLoc(), 1908 WidenVT, Cond1, InOp1, InOp2); 1909} 1910 1911SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) { 1912 SDValue InOp1 = GetWidenedVector(N->getOperand(2)); 1913 SDValue InOp2 = GetWidenedVector(N->getOperand(3)); 1914 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), 1915 InOp1.getValueType(), N->getOperand(0), 1916 N->getOperand(1), InOp1, InOp2, N->getOperand(4)); 1917} 1918 1919SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) { 1920 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1921 SDValue InOp1 = GetWidenedVector(N->getOperand(0)); 1922 SDValue InOp2 = GetWidenedVector(N->getOperand(1)); 1923 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT, 1924 InOp1, InOp2, N->getOperand(2)); 1925} 1926 1927SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) { 1928 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1929 return DAG.getUNDEF(WidenVT); 1930} 1931 1932SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) { 1933 EVT VT = N->getValueType(0); 1934 DebugLoc dl = N->getDebugLoc(); 1935 1936 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1937 unsigned NumElts = VT.getVectorNumElements(); 1938 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1939 1940 SDValue InOp1 = GetWidenedVector(N->getOperand(0)); 1941 SDValue InOp2 = GetWidenedVector(N->getOperand(1)); 1942 1943 // Adjust mask based on new input vector length. 1944 SmallVector<int, 16> NewMask; 1945 for (unsigned i = 0; i != NumElts; ++i) { 1946 int Idx = N->getMaskElt(i); 1947 if (Idx < (int)NumElts) 1948 NewMask.push_back(Idx); 1949 else 1950 NewMask.push_back(Idx - NumElts + WidenNumElts); 1951 } 1952 for (unsigned i = NumElts; i != WidenNumElts; ++i) 1953 NewMask.push_back(-1); 1954 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]); 1955} 1956 1957SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) { 1958 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1959 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1960 1961 SDValue InOp1 = N->getOperand(0); 1962 EVT InVT = InOp1.getValueType(); 1963 assert(InVT.isVector() && "can not widen non vector type"); 1964 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(), 1965 InVT.getVectorElementType(), WidenNumElts); 1966 InOp1 = GetWidenedVector(InOp1); 1967 SDValue InOp2 = GetWidenedVector(N->getOperand(1)); 1968 1969 // Assume that the input and output will be widen appropriately. If not, 1970 // we will have to unroll it at some point. 1971 assert(InOp1.getValueType() == WidenInVT && 1972 InOp2.getValueType() == WidenInVT && 1973 "Input not widened to expected type!"); 1974 (void)WidenInVT; 1975 return DAG.getNode(ISD::VSETCC, N->getDebugLoc(), 1976 WidenVT, InOp1, InOp2, N->getOperand(2)); 1977} 1978 1979 1980//===----------------------------------------------------------------------===// 1981// Widen Vector Operand 1982//===----------------------------------------------------------------------===// 1983bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) { 1984 DEBUG(dbgs() << "Widen node operand " << ResNo << ": "; 1985 N->dump(&DAG); 1986 dbgs() << "\n"); 1987 SDValue Res = SDValue(); 1988 1989 switch (N->getOpcode()) { 1990 default: 1991#ifndef NDEBUG 1992 dbgs() << "WidenVectorOperand op #" << ResNo << ": "; 1993 N->dump(&DAG); 1994 dbgs() << "\n"; 1995#endif 1996 llvm_unreachable("Do not know how to widen this operator's operand!"); 1997 1998 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break; 1999 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break; 2000 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break; 2001 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break; 2002 case ISD::STORE: Res = WidenVecOp_STORE(N); break; 2003 2004 case ISD::FP_EXTEND: 2005 case ISD::FP_TO_SINT: 2006 case ISD::FP_TO_UINT: 2007 case ISD::SINT_TO_FP: 2008 case ISD::UINT_TO_FP: 2009 case ISD::TRUNCATE: 2010 case ISD::SIGN_EXTEND: 2011 case ISD::ZERO_EXTEND: 2012 case ISD::ANY_EXTEND: 2013 Res = WidenVecOp_Convert(N); 2014 break; 2015 } 2016 2017 // If Res is null, the sub-method took care of registering the result. 2018 if (!Res.getNode()) return false; 2019 2020 // If the result is N, the sub-method updated N in place. Tell the legalizer 2021 // core about this. 2022 if (Res.getNode() == N) 2023 return true; 2024 2025 2026 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && 2027 "Invalid operand expansion"); 2028 2029 ReplaceValueWith(SDValue(N, 0), Res); 2030 return false; 2031} 2032 2033SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) { 2034 // Since the result is legal and the input is illegal, it is unlikely 2035 // that we can fix the input to a legal type so unroll the convert 2036 // into some scalar code and create a nasty build vector. 2037 EVT VT = N->getValueType(0); 2038 EVT EltVT = VT.getVectorElementType(); 2039 DebugLoc dl = N->getDebugLoc(); 2040 unsigned NumElts = VT.getVectorNumElements(); 2041 SDValue InOp = N->getOperand(0); 2042 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector) 2043 InOp = GetWidenedVector(InOp); 2044 EVT InVT = InOp.getValueType(); 2045 EVT InEltVT = InVT.getVectorElementType(); 2046 2047 unsigned Opcode = N->getOpcode(); 2048 SmallVector<SDValue, 16> Ops(NumElts); 2049 for (unsigned i=0; i < NumElts; ++i) 2050 Ops[i] = DAG.getNode(Opcode, dl, EltVT, 2051 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp, 2052 DAG.getIntPtrConstant(i))); 2053 2054 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts); 2055} 2056 2057SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) { 2058 EVT VT = N->getValueType(0); 2059 SDValue InOp = GetWidenedVector(N->getOperand(0)); 2060 EVT InWidenVT = InOp.getValueType(); 2061 DebugLoc dl = N->getDebugLoc(); 2062 2063 // Check if we can convert between two legal vector types and extract. 2064 unsigned InWidenSize = InWidenVT.getSizeInBits(); 2065 unsigned Size = VT.getSizeInBits(); 2066 // x86mmx is not an acceptable vector element type, so don't try. 2067 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) { 2068 unsigned NewNumElts = InWidenSize / Size; 2069 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts); 2070 if (TLI.isTypeLegal(NewVT)) { 2071 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp); 2072 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp, 2073 DAG.getIntPtrConstant(0)); 2074 } 2075 } 2076 2077 return CreateStackStoreLoad(InOp, VT); 2078} 2079 2080SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) { 2081 // If the input vector is not legal, it is likely that we will not find a 2082 // legal vector of the same size. Replace the concatenate vector with a 2083 // nasty build vector. 2084 EVT VT = N->getValueType(0); 2085 EVT EltVT = VT.getVectorElementType(); 2086 DebugLoc dl = N->getDebugLoc(); 2087 unsigned NumElts = VT.getVectorNumElements(); 2088 SmallVector<SDValue, 16> Ops(NumElts); 2089 2090 EVT InVT = N->getOperand(0).getValueType(); 2091 unsigned NumInElts = InVT.getVectorNumElements(); 2092 2093 unsigned Idx = 0; 2094 unsigned NumOperands = N->getNumOperands(); 2095 for (unsigned i=0; i < NumOperands; ++i) { 2096 SDValue InOp = N->getOperand(i); 2097 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector) 2098 InOp = GetWidenedVector(InOp); 2099 for (unsigned j=0; j < NumInElts; ++j) 2100 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, 2101 DAG.getIntPtrConstant(j)); 2102 } 2103 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts); 2104} 2105 2106SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) { 2107 SDValue InOp = GetWidenedVector(N->getOperand(0)); 2108 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(), 2109 N->getValueType(0), InOp, N->getOperand(1)); 2110} 2111 2112SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) { 2113 SDValue InOp = GetWidenedVector(N->getOperand(0)); 2114 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), 2115 N->getValueType(0), InOp, N->getOperand(1)); 2116} 2117 2118SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) { 2119 // We have to widen the value but we want only to store the original 2120 // vector type. 2121 StoreSDNode *ST = cast<StoreSDNode>(N); 2122 2123 SmallVector<SDValue, 16> StChain; 2124 if (ST->isTruncatingStore()) 2125 GenWidenVectorTruncStores(StChain, ST); 2126 else 2127 GenWidenVectorStores(StChain, ST); 2128 2129 if (StChain.size() == 1) 2130 return StChain[0]; 2131 else 2132 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(), 2133 MVT::Other,&StChain[0],StChain.size()); 2134} 2135 2136//===----------------------------------------------------------------------===// 2137// Vector Widening Utilities 2138//===----------------------------------------------------------------------===// 2139 2140// Utility function to find the type to chop up a widen vector for load/store 2141// TLI: Target lowering used to determine legal types. 2142// Width: Width left need to load/store. 2143// WidenVT: The widen vector type to load to/store from 2144// Align: If 0, don't allow use of a wider type 2145// WidenEx: If Align is not 0, the amount additional we can load/store from. 2146 2147static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI, 2148 unsigned Width, EVT WidenVT, 2149 unsigned Align = 0, unsigned WidenEx = 0) { 2150 EVT WidenEltVT = WidenVT.getVectorElementType(); 2151 unsigned WidenWidth = WidenVT.getSizeInBits(); 2152 unsigned WidenEltWidth = WidenEltVT.getSizeInBits(); 2153 unsigned AlignInBits = Align*8; 2154 2155 // If we have one element to load/store, return it. 2156 EVT RetVT = WidenEltVT; 2157 if (Width == WidenEltWidth) 2158 return RetVT; 2159 2160 // See if there is larger legal integer than the element type to load/store 2161 unsigned VT; 2162 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE; 2163 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) { 2164 EVT MemVT((MVT::SimpleValueType) VT); 2165 unsigned MemVTWidth = MemVT.getSizeInBits(); 2166 if (MemVT.getSizeInBits() <= WidenEltWidth) 2167 break; 2168 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 && 2169 isPowerOf2_32(WidenWidth / MemVTWidth) && 2170 (MemVTWidth <= Width || 2171 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) { 2172 RetVT = MemVT; 2173 break; 2174 } 2175 } 2176 2177 // See if there is a larger vector type to load/store that has the same vector 2178 // element type and is evenly divisible with the WidenVT. 2179 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE; 2180 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) { 2181 EVT MemVT = (MVT::SimpleValueType) VT; 2182 unsigned MemVTWidth = MemVT.getSizeInBits(); 2183 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() && 2184 (WidenWidth % MemVTWidth) == 0 && 2185 isPowerOf2_32(WidenWidth / MemVTWidth) && 2186 (MemVTWidth <= Width || 2187 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) { 2188 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT) 2189 return MemVT; 2190 } 2191 } 2192 2193 return RetVT; 2194} 2195 2196// Builds a vector type from scalar loads 2197// VecTy: Resulting Vector type 2198// LDOps: Load operators to build a vector type 2199// [Start,End) the list of loads to use. 2200static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy, 2201 SmallVector<SDValue, 16>& LdOps, 2202 unsigned Start, unsigned End) { 2203 DebugLoc dl = LdOps[Start].getDebugLoc(); 2204 EVT LdTy = LdOps[Start].getValueType(); 2205 unsigned Width = VecTy.getSizeInBits(); 2206 unsigned NumElts = Width / LdTy.getSizeInBits(); 2207 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts); 2208 2209 unsigned Idx = 1; 2210 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]); 2211 2212 for (unsigned i = Start + 1; i != End; ++i) { 2213 EVT NewLdTy = LdOps[i].getValueType(); 2214 if (NewLdTy != LdTy) { 2215 NumElts = Width / NewLdTy.getSizeInBits(); 2216 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts); 2217 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp); 2218 // Readjust position and vector position based on new load type 2219 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits(); 2220 LdTy = NewLdTy; 2221 } 2222 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i], 2223 DAG.getIntPtrConstant(Idx++)); 2224 } 2225 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp); 2226} 2227 2228SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16> &LdChain, 2229 LoadSDNode *LD) { 2230 // The strategy assumes that we can efficiently load powers of two widths. 2231 // The routines chops the vector into the largest vector loads with the same 2232 // element type or scalar loads and then recombines it to the widen vector 2233 // type. 2234 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0)); 2235 unsigned WidenWidth = WidenVT.getSizeInBits(); 2236 EVT LdVT = LD->getMemoryVT(); 2237 DebugLoc dl = LD->getDebugLoc(); 2238 assert(LdVT.isVector() && WidenVT.isVector()); 2239 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType()); 2240 2241 // Load information 2242 SDValue Chain = LD->getChain(); 2243 SDValue BasePtr = LD->getBasePtr(); 2244 unsigned Align = LD->getAlignment(); 2245 bool isVolatile = LD->isVolatile(); 2246 bool isNonTemporal = LD->isNonTemporal(); 2247 2248 int LdWidth = LdVT.getSizeInBits(); 2249 int WidthDiff = WidenWidth - LdWidth; // Difference 2250 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads 2251 2252 // Find the vector type that can load from. 2253 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff); 2254 int NewVTWidth = NewVT.getSizeInBits(); 2255 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(), 2256 isVolatile, isNonTemporal, Align); 2257 LdChain.push_back(LdOp.getValue(1)); 2258 2259 // Check if we can load the element with one instruction 2260 if (LdWidth <= NewVTWidth) { 2261 if (!NewVT.isVector()) { 2262 unsigned NumElts = WidenWidth / NewVTWidth; 2263 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts); 2264 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp); 2265 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp); 2266 } 2267 if (NewVT == WidenVT) 2268 return LdOp; 2269 2270 assert(WidenWidth % NewVTWidth == 0); 2271 unsigned NumConcat = WidenWidth / NewVTWidth; 2272 SmallVector<SDValue, 16> ConcatOps(NumConcat); 2273 SDValue UndefVal = DAG.getUNDEF(NewVT); 2274 ConcatOps[0] = LdOp; 2275 for (unsigned i = 1; i != NumConcat; ++i) 2276 ConcatOps[i] = UndefVal; 2277 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], 2278 NumConcat); 2279 } 2280 2281 // Load vector by using multiple loads from largest vector to scalar 2282 SmallVector<SDValue, 16> LdOps; 2283 LdOps.push_back(LdOp); 2284 2285 LdWidth -= NewVTWidth; 2286 unsigned Offset = 0; 2287 2288 while (LdWidth > 0) { 2289 unsigned Increment = NewVTWidth / 8; 2290 Offset += Increment; 2291 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, 2292 DAG.getIntPtrConstant(Increment)); 2293 2294 if (LdWidth < NewVTWidth) { 2295 // Our current type we are using is too large, find a better size 2296 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff); 2297 NewVTWidth = NewVT.getSizeInBits(); 2298 } 2299 2300 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, 2301 LD->getPointerInfo().getWithOffset(Offset), 2302 isVolatile, 2303 isNonTemporal, MinAlign(Align, Increment)); 2304 LdChain.push_back(LdOp.getValue(1)); 2305 LdOps.push_back(LdOp); 2306 2307 LdWidth -= NewVTWidth; 2308 } 2309 2310 // Build the vector from the loads operations 2311 unsigned End = LdOps.size(); 2312 if (!LdOps[0].getValueType().isVector()) 2313 // All the loads are scalar loads. 2314 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End); 2315 2316 // If the load contains vectors, build the vector using concat vector. 2317 // All of the vectors used to loads are power of 2 and the scalars load 2318 // can be combined to make a power of 2 vector. 2319 SmallVector<SDValue, 16> ConcatOps(End); 2320 int i = End - 1; 2321 int Idx = End; 2322 EVT LdTy = LdOps[i].getValueType(); 2323 // First combine the scalar loads to a vector 2324 if (!LdTy.isVector()) { 2325 for (--i; i >= 0; --i) { 2326 LdTy = LdOps[i].getValueType(); 2327 if (LdTy.isVector()) 2328 break; 2329 } 2330 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End); 2331 } 2332 ConcatOps[--Idx] = LdOps[i]; 2333 for (--i; i >= 0; --i) { 2334 EVT NewLdTy = LdOps[i].getValueType(); 2335 if (NewLdTy != LdTy) { 2336 // Create a larger vector 2337 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy, 2338 &ConcatOps[Idx], End - Idx); 2339 Idx = End - 1; 2340 LdTy = NewLdTy; 2341 } 2342 ConcatOps[--Idx] = LdOps[i]; 2343 } 2344 2345 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx)) 2346 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, 2347 &ConcatOps[Idx], End - Idx); 2348 2349 // We need to fill the rest with undefs to build the vector 2350 unsigned NumOps = WidenWidth / LdTy.getSizeInBits(); 2351 SmallVector<SDValue, 16> WidenOps(NumOps); 2352 SDValue UndefVal = DAG.getUNDEF(LdTy); 2353 { 2354 unsigned i = 0; 2355 for (; i != End-Idx; ++i) 2356 WidenOps[i] = ConcatOps[Idx+i]; 2357 for (; i != NumOps; ++i) 2358 WidenOps[i] = UndefVal; 2359 } 2360 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps); 2361} 2362 2363SDValue 2364DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain, 2365 LoadSDNode * LD, 2366 ISD::LoadExtType ExtType) { 2367 // For extension loads, it may not be more efficient to chop up the vector 2368 // and then extended it. Instead, we unroll the load and build a new vector. 2369 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0)); 2370 EVT LdVT = LD->getMemoryVT(); 2371 DebugLoc dl = LD->getDebugLoc(); 2372 assert(LdVT.isVector() && WidenVT.isVector()); 2373 2374 // Load information 2375 SDValue Chain = LD->getChain(); 2376 SDValue BasePtr = LD->getBasePtr(); 2377 unsigned Align = LD->getAlignment(); 2378 bool isVolatile = LD->isVolatile(); 2379 bool isNonTemporal = LD->isNonTemporal(); 2380 2381 EVT EltVT = WidenVT.getVectorElementType(); 2382 EVT LdEltVT = LdVT.getVectorElementType(); 2383 unsigned NumElts = LdVT.getVectorNumElements(); 2384 2385 // Load each element and widen 2386 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 2387 SmallVector<SDValue, 16> Ops(WidenNumElts); 2388 unsigned Increment = LdEltVT.getSizeInBits() / 8; 2389 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, 2390 LD->getPointerInfo(), 2391 LdEltVT, isVolatile, isNonTemporal, Align); 2392 LdChain.push_back(Ops[0].getValue(1)); 2393 unsigned i = 0, Offset = Increment; 2394 for (i=1; i < NumElts; ++i, Offset += Increment) { 2395 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), 2396 BasePtr, DAG.getIntPtrConstant(Offset)); 2397 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr, 2398 LD->getPointerInfo().getWithOffset(Offset), LdEltVT, 2399 isVolatile, isNonTemporal, Align); 2400 LdChain.push_back(Ops[i].getValue(1)); 2401 } 2402 2403 // Fill the rest with undefs 2404 SDValue UndefVal = DAG.getUNDEF(EltVT); 2405 for (; i != WidenNumElts; ++i) 2406 Ops[i] = UndefVal; 2407 2408 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size()); 2409} 2410 2411 2412void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain, 2413 StoreSDNode *ST) { 2414 // The strategy assumes that we can efficiently store powers of two widths. 2415 // The routines chops the vector into the largest vector stores with the same 2416 // element type or scalar stores. 2417 SDValue Chain = ST->getChain(); 2418 SDValue BasePtr = ST->getBasePtr(); 2419 unsigned Align = ST->getAlignment(); 2420 bool isVolatile = ST->isVolatile(); 2421 bool isNonTemporal = ST->isNonTemporal(); 2422 SDValue ValOp = GetWidenedVector(ST->getValue()); 2423 DebugLoc dl = ST->getDebugLoc(); 2424 2425 EVT StVT = ST->getMemoryVT(); 2426 unsigned StWidth = StVT.getSizeInBits(); 2427 EVT ValVT = ValOp.getValueType(); 2428 unsigned ValWidth = ValVT.getSizeInBits(); 2429 EVT ValEltVT = ValVT.getVectorElementType(); 2430 unsigned ValEltWidth = ValEltVT.getSizeInBits(); 2431 assert(StVT.getVectorElementType() == ValEltVT); 2432 2433 int Idx = 0; // current index to store 2434 unsigned Offset = 0; // offset from base to store 2435 while (StWidth != 0) { 2436 // Find the largest vector type we can store with 2437 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT); 2438 unsigned NewVTWidth = NewVT.getSizeInBits(); 2439 unsigned Increment = NewVTWidth / 8; 2440 if (NewVT.isVector()) { 2441 unsigned NumVTElts = NewVT.getVectorNumElements(); 2442 do { 2443 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp, 2444 DAG.getIntPtrConstant(Idx)); 2445 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, 2446 ST->getPointerInfo().getWithOffset(Offset), 2447 isVolatile, isNonTemporal, 2448 MinAlign(Align, Offset))); 2449 StWidth -= NewVTWidth; 2450 Offset += Increment; 2451 Idx += NumVTElts; 2452 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, 2453 DAG.getIntPtrConstant(Increment)); 2454 } while (StWidth != 0 && StWidth >= NewVTWidth); 2455 } else { 2456 // Cast the vector to the scalar type we can store 2457 unsigned NumElts = ValWidth / NewVTWidth; 2458 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts); 2459 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp); 2460 // Readjust index position based on new vector type 2461 Idx = Idx * ValEltWidth / NewVTWidth; 2462 do { 2463 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp, 2464 DAG.getIntPtrConstant(Idx++)); 2465 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, 2466 ST->getPointerInfo().getWithOffset(Offset), 2467 isVolatile, isNonTemporal, 2468 MinAlign(Align, Offset))); 2469 StWidth -= NewVTWidth; 2470 Offset += Increment; 2471 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, 2472 DAG.getIntPtrConstant(Increment)); 2473 } while (StWidth != 0 && StWidth >= NewVTWidth); 2474 // Restore index back to be relative to the original widen element type 2475 Idx = Idx * NewVTWidth / ValEltWidth; 2476 } 2477 } 2478} 2479 2480void 2481DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain, 2482 StoreSDNode *ST) { 2483 // For extension loads, it may not be more efficient to truncate the vector 2484 // and then store it. Instead, we extract each element and then store it. 2485 SDValue Chain = ST->getChain(); 2486 SDValue BasePtr = ST->getBasePtr(); 2487 unsigned Align = ST->getAlignment(); 2488 bool isVolatile = ST->isVolatile(); 2489 bool isNonTemporal = ST->isNonTemporal(); 2490 SDValue ValOp = GetWidenedVector(ST->getValue()); 2491 DebugLoc dl = ST->getDebugLoc(); 2492 2493 EVT StVT = ST->getMemoryVT(); 2494 EVT ValVT = ValOp.getValueType(); 2495 2496 // It must be true that we the widen vector type is bigger than where 2497 // we need to store. 2498 assert(StVT.isVector() && ValOp.getValueType().isVector()); 2499 assert(StVT.bitsLT(ValOp.getValueType())); 2500 2501 // For truncating stores, we can not play the tricks of chopping legal 2502 // vector types and bit cast it to the right type. Instead, we unroll 2503 // the store. 2504 EVT StEltVT = StVT.getVectorElementType(); 2505 EVT ValEltVT = ValVT.getVectorElementType(); 2506 unsigned Increment = ValEltVT.getSizeInBits() / 8; 2507 unsigned NumElts = StVT.getVectorNumElements(); 2508 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp, 2509 DAG.getIntPtrConstant(0)); 2510 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr, 2511 ST->getPointerInfo(), StEltVT, 2512 isVolatile, isNonTemporal, Align)); 2513 unsigned Offset = Increment; 2514 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) { 2515 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), 2516 BasePtr, DAG.getIntPtrConstant(Offset)); 2517 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp, 2518 DAG.getIntPtrConstant(0)); 2519 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr, 2520 ST->getPointerInfo().getWithOffset(Offset), 2521 StEltVT, isVolatile, isNonTemporal, 2522 MinAlign(Align, Offset))); 2523 } 2524} 2525 2526/// Modifies a vector input (widen or narrows) to a vector of NVT. The 2527/// input vector must have the same element type as NVT. 2528SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) { 2529 // Note that InOp might have been widened so it might already have 2530 // the right width or it might need be narrowed. 2531 EVT InVT = InOp.getValueType(); 2532 assert(InVT.getVectorElementType() == NVT.getVectorElementType() && 2533 "input and widen element type must match"); 2534 DebugLoc dl = InOp.getDebugLoc(); 2535 2536 // Check if InOp already has the right width. 2537 if (InVT == NVT) 2538 return InOp; 2539 2540 unsigned InNumElts = InVT.getVectorNumElements(); 2541 unsigned WidenNumElts = NVT.getVectorNumElements(); 2542 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) { 2543 unsigned NumConcat = WidenNumElts / InNumElts; 2544 SmallVector<SDValue, 16> Ops(NumConcat); 2545 SDValue UndefVal = DAG.getUNDEF(InVT); 2546 Ops[0] = InOp; 2547 for (unsigned i = 1; i != NumConcat; ++i) 2548 Ops[i] = UndefVal; 2549 2550 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat); 2551 } 2552 2553 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts) 2554 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp, 2555 DAG.getIntPtrConstant(0)); 2556 2557 // Fall back to extract and build. 2558 SmallVector<SDValue, 16> Ops(WidenNumElts); 2559 EVT EltVT = NVT.getVectorElementType(); 2560 unsigned MinNumElts = std::min(WidenNumElts, InNumElts); 2561 unsigned Idx; 2562 for (Idx = 0; Idx < MinNumElts; ++Idx) 2563 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, 2564 DAG.getIntPtrConstant(Idx)); 2565 2566 SDValue UndefVal = DAG.getUNDEF(EltVT); 2567 for ( ; Idx < WidenNumElts; ++Idx) 2568 Ops[Idx] = UndefVal; 2569 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts); 2570} 2571