LegalizeVectorTypes.cpp revision bbfa5c02be2ef2a9ff965a4dcfe9e99665dcf0ef
1//===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file performs vector type splitting and scalarization for LegalizeTypes. 11// Scalarization is the act of changing a computation in an illegal one-element 12// vector type to be a computation in its scalar element type. For example, 13// implementing <1 x f32> arithmetic in a scalar f32 register. This is needed 14// as a base case when scalarizing vector arithmetic like <4 x f32>, which 15// eventually decomposes to scalars if the target doesn't support v4f32 or v2f32 16// types. 17// Splitting is the act of changing a computation in an invalid vector type to 18// be a computation in two vectors of half the size. For example, implementing 19// <128 x f32> operations in terms of two <64 x f32> operations. 20// 21//===----------------------------------------------------------------------===// 22 23#include "LegalizeTypes.h" 24#include "llvm/Target/TargetData.h" 25#include "llvm/Support/ErrorHandling.h" 26#include "llvm/Support/raw_ostream.h" 27using namespace llvm; 28 29//===----------------------------------------------------------------------===// 30// Result Vector Scalarization: <1 x ty> -> ty. 31//===----------------------------------------------------------------------===// 32 33void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) { 34 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": "; 35 N->dump(&DAG); 36 dbgs() << "\n"); 37 SDValue R = SDValue(); 38 39 switch (N->getOpcode()) { 40 default: 41#ifndef NDEBUG 42 dbgs() << "ScalarizeVectorResult #" << ResNo << ": "; 43 N->dump(&DAG); 44 dbgs() << "\n"; 45#endif 46 report_fatal_error("Do not know how to scalarize the result of this " 47 "operator!\n"); 48 49 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break; 50 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break; 51 case ISD::BUILD_VECTOR: R = N->getOperand(0); break; 52 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break; 53 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break; 54 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break; 55 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break; 56 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break; 57 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break; 58 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break; 59 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break; 60 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break; 61 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break; 62 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break; 63 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break; 64 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break; 65 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break; 66 case ISD::ANY_EXTEND: 67 case ISD::CTLZ: 68 case ISD::CTPOP: 69 case ISD::CTTZ: 70 case ISD::FABS: 71 case ISD::FCEIL: 72 case ISD::FCOS: 73 case ISD::FEXP: 74 case ISD::FEXP2: 75 case ISD::FFLOOR: 76 case ISD::FLOG: 77 case ISD::FLOG10: 78 case ISD::FLOG2: 79 case ISD::FNEARBYINT: 80 case ISD::FNEG: 81 case ISD::FP_EXTEND: 82 case ISD::FP_TO_SINT: 83 case ISD::FP_TO_UINT: 84 case ISD::FRINT: 85 case ISD::FSIN: 86 case ISD::FSQRT: 87 case ISD::FTRUNC: 88 case ISD::SIGN_EXTEND: 89 case ISD::SINT_TO_FP: 90 case ISD::TRUNCATE: 91 case ISD::UINT_TO_FP: 92 case ISD::ZERO_EXTEND: 93 R = ScalarizeVecRes_UnaryOp(N); 94 break; 95 96 case ISD::ADD: 97 case ISD::AND: 98 case ISD::FADD: 99 case ISD::FDIV: 100 case ISD::FMUL: 101 case ISD::FPOW: 102 case ISD::FREM: 103 case ISD::FSUB: 104 case ISD::MUL: 105 case ISD::OR: 106 case ISD::SDIV: 107 case ISD::SREM: 108 case ISD::SUB: 109 case ISD::UDIV: 110 case ISD::UREM: 111 case ISD::XOR: 112 case ISD::SHL: 113 case ISD::SRA: 114 case ISD::SRL: 115 R = ScalarizeVecRes_BinOp(N); 116 break; 117 } 118 119 // If R is null, the sub-method took care of registering the result. 120 if (R.getNode()) 121 SetScalarizedVector(SDValue(N, ResNo), R); 122} 123 124SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) { 125 SDValue LHS = GetScalarizedVector(N->getOperand(0)); 126 SDValue RHS = GetScalarizedVector(N->getOperand(1)); 127 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), 128 LHS.getValueType(), LHS, RHS); 129} 130 131SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N, 132 unsigned ResNo) { 133 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); 134 return GetScalarizedVector(Op); 135} 136 137SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) { 138 EVT NewVT = N->getValueType(0).getVectorElementType(); 139 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), 140 NewVT, N->getOperand(0)); 141} 142 143SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) { 144 EVT NewVT = N->getValueType(0).getVectorElementType(); 145 SDValue Op0 = GetScalarizedVector(N->getOperand(0)); 146 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(), 147 Op0, DAG.getValueType(NewVT), 148 DAG.getValueType(Op0.getValueType()), 149 N->getOperand(3), 150 N->getOperand(4), 151 cast<CvtRndSatSDNode>(N)->getCvtCode()); 152} 153 154SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) { 155 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), 156 N->getValueType(0).getVectorElementType(), 157 N->getOperand(0), N->getOperand(1)); 158} 159 160SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) { 161 EVT NewVT = N->getValueType(0).getVectorElementType(); 162 SDValue Op = GetScalarizedVector(N->getOperand(0)); 163 return DAG.getNode(ISD::FP_ROUND, N->getDebugLoc(), 164 NewVT, Op, N->getOperand(1)); 165} 166 167SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) { 168 SDValue Op = GetScalarizedVector(N->getOperand(0)); 169 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(), 170 Op.getValueType(), Op, N->getOperand(1)); 171} 172 173SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) { 174 // The value to insert may have a wider type than the vector element type, 175 // so be sure to truncate it to the element type if necessary. 176 SDValue Op = N->getOperand(1); 177 EVT EltVT = N->getValueType(0).getVectorElementType(); 178 if (Op.getValueType() != EltVT) 179 // FIXME: Can this happen for floating point types? 180 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op); 181 return Op; 182} 183 184SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) { 185 assert(N->isUnindexed() && "Indexed vector load?"); 186 187 SDValue Result = DAG.getLoad(ISD::UNINDEXED, 188 N->getExtensionType(), 189 N->getValueType(0).getVectorElementType(), 190 N->getDebugLoc(), 191 N->getChain(), N->getBasePtr(), 192 DAG.getUNDEF(N->getBasePtr().getValueType()), 193 N->getPointerInfo(), 194 N->getMemoryVT().getVectorElementType(), 195 N->isVolatile(), N->isNonTemporal(), 196 N->isInvariant(), N->getOriginalAlignment()); 197 198 // Legalized the chain result - switch anything that used the old chain to 199 // use the new one. 200 ReplaceValueWith(SDValue(N, 1), Result.getValue(1)); 201 return Result; 202} 203 204SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) { 205 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp. 206 EVT DestVT = N->getValueType(0).getVectorElementType(); 207 SDValue Op = GetScalarizedVector(N->getOperand(0)); 208 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op); 209} 210 211SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) { 212 EVT EltVT = N->getValueType(0).getVectorElementType(); 213 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); 214 SDValue LHS = GetScalarizedVector(N->getOperand(0)); 215 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT, 216 LHS, DAG.getValueType(ExtVT)); 217} 218 219SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) { 220 // If the operand is wider than the vector element type then it is implicitly 221 // truncated. Make that explicit here. 222 EVT EltVT = N->getValueType(0).getVectorElementType(); 223 SDValue InOp = N->getOperand(0); 224 if (InOp.getValueType() != EltVT) 225 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp); 226 return InOp; 227} 228 229SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) { 230 SDValue LHS = GetScalarizedVector(N->getOperand(1)); 231 return DAG.getNode(ISD::SELECT, N->getDebugLoc(), 232 LHS.getValueType(), N->getOperand(0), LHS, 233 GetScalarizedVector(N->getOperand(2))); 234} 235 236SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) { 237 SDValue LHS = GetScalarizedVector(N->getOperand(2)); 238 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(), 239 N->getOperand(0), N->getOperand(1), 240 LHS, GetScalarizedVector(N->getOperand(3)), 241 N->getOperand(4)); 242} 243 244SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) { 245 assert(N->getValueType(0).isVector() == 246 N->getOperand(0).getValueType().isVector() && 247 "Scalar/Vector type mismatch"); 248 249 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N); 250 251 SDValue LHS = GetScalarizedVector(N->getOperand(0)); 252 SDValue RHS = GetScalarizedVector(N->getOperand(1)); 253 DebugLoc DL = N->getDebugLoc(); 254 255 // Turn it into a scalar SETCC. 256 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2)); 257} 258 259SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) { 260 return DAG.getUNDEF(N->getValueType(0).getVectorElementType()); 261} 262 263SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) { 264 // Figure out if the scalar is the LHS or RHS and return it. 265 SDValue Arg = N->getOperand(2).getOperand(0); 266 if (Arg.getOpcode() == ISD::UNDEF) 267 return DAG.getUNDEF(N->getValueType(0).getVectorElementType()); 268 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue(); 269 return GetScalarizedVector(N->getOperand(Op)); 270} 271 272SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) { 273 assert(N->getValueType(0).isVector() && 274 N->getOperand(0).getValueType().isVector() && 275 "Operand types must be vectors"); 276 277 SDValue LHS = GetScalarizedVector(N->getOperand(0)); 278 SDValue RHS = GetScalarizedVector(N->getOperand(1)); 279 EVT NVT = N->getValueType(0).getVectorElementType(); 280 DebugLoc DL = N->getDebugLoc(); 281 282 // Turn it into a scalar SETCC. 283 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, 284 N->getOperand(2)); 285 // Vectors may have a different boolean contents to scalars. Promote the 286 // value appropriately. 287 ISD::NodeType ExtendCode = 288 TargetLowering::getExtendForContent(TLI.getBooleanContents(true)); 289 return DAG.getNode(ExtendCode, DL, NVT, Res); 290} 291 292 293//===----------------------------------------------------------------------===// 294// Operand Vector Scalarization <1 x ty> -> ty. 295//===----------------------------------------------------------------------===// 296 297bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) { 298 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": "; 299 N->dump(&DAG); 300 dbgs() << "\n"); 301 SDValue Res = SDValue(); 302 303 if (Res.getNode() == 0) { 304 switch (N->getOpcode()) { 305 default: 306#ifndef NDEBUG 307 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": "; 308 N->dump(&DAG); 309 dbgs() << "\n"; 310#endif 311 llvm_unreachable("Do not know how to scalarize this operator's operand!"); 312 case ISD::BITCAST: 313 Res = ScalarizeVecOp_BITCAST(N); 314 break; 315 case ISD::CONCAT_VECTORS: 316 Res = ScalarizeVecOp_CONCAT_VECTORS(N); 317 break; 318 case ISD::EXTRACT_VECTOR_ELT: 319 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N); 320 break; 321 case ISD::STORE: 322 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo); 323 break; 324 } 325 } 326 327 // If the result is null, the sub-method took care of registering results etc. 328 if (!Res.getNode()) return false; 329 330 // If the result is N, the sub-method updated N in place. Tell the legalizer 331 // core about this. 332 if (Res.getNode() == N) 333 return true; 334 335 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && 336 "Invalid operand expansion"); 337 338 ReplaceValueWith(SDValue(N, 0), Res); 339 return false; 340} 341 342/// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs 343/// to be scalarized, it must be <1 x ty>. Convert the element instead. 344SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) { 345 SDValue Elt = GetScalarizedVector(N->getOperand(0)); 346 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), 347 N->getValueType(0), Elt); 348} 349 350/// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one - 351/// use a BUILD_VECTOR instead. 352SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) { 353 SmallVector<SDValue, 8> Ops(N->getNumOperands()); 354 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) 355 Ops[i] = GetScalarizedVector(N->getOperand(i)); 356 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0), 357 &Ops[0], Ops.size()); 358} 359 360/// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to 361/// be scalarized, it must be <1 x ty>, so just return the element, ignoring the 362/// index. 363SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) { 364 SDValue Res = GetScalarizedVector(N->getOperand(0)); 365 if (Res.getValueType() != N->getValueType(0)) 366 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0), 367 Res); 368 return Res; 369} 370 371/// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be 372/// scalarized, it must be <1 x ty>. Just store the element. 373SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){ 374 assert(N->isUnindexed() && "Indexed store of one-element vector?"); 375 assert(OpNo == 1 && "Do not know how to scalarize this operand!"); 376 DebugLoc dl = N->getDebugLoc(); 377 378 if (N->isTruncatingStore()) 379 return DAG.getTruncStore(N->getChain(), dl, 380 GetScalarizedVector(N->getOperand(1)), 381 N->getBasePtr(), N->getPointerInfo(), 382 N->getMemoryVT().getVectorElementType(), 383 N->isVolatile(), N->isNonTemporal(), 384 N->getAlignment()); 385 386 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)), 387 N->getBasePtr(), N->getPointerInfo(), 388 N->isVolatile(), N->isNonTemporal(), 389 N->getOriginalAlignment()); 390} 391 392 393//===----------------------------------------------------------------------===// 394// Result Vector Splitting 395//===----------------------------------------------------------------------===// 396 397/// SplitVectorResult - This method is called when the specified result of the 398/// specified node is found to need vector splitting. At this point, the node 399/// may also have invalid operands or may have other results that need 400/// legalization, we just know that (at least) one result needs vector 401/// splitting. 402void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) { 403 DEBUG(dbgs() << "Split node result: "; 404 N->dump(&DAG); 405 dbgs() << "\n"); 406 SDValue Lo, Hi; 407 408 // See if the target wants to custom expand this node. 409 if (CustomLowerNode(N, N->getValueType(ResNo), true)) 410 return; 411 412 switch (N->getOpcode()) { 413 default: 414#ifndef NDEBUG 415 dbgs() << "SplitVectorResult #" << ResNo << ": "; 416 N->dump(&DAG); 417 dbgs() << "\n"; 418#endif 419 llvm_unreachable("Do not know how to split the result of this operator!"); 420 421 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; 422 case ISD::VSELECT: 423 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break; 424 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; 425 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; 426 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break; 427 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break; 428 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break; 429 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break; 430 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break; 431 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break; 432 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break; 433 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break; 434 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break; 435 case ISD::LOAD: 436 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi); 437 break; 438 case ISD::SETCC: 439 SplitVecRes_SETCC(N, Lo, Hi); 440 break; 441 case ISD::VECTOR_SHUFFLE: 442 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi); 443 break; 444 445 case ISD::ANY_EXTEND: 446 case ISD::CONVERT_RNDSAT: 447 case ISD::CTLZ: 448 case ISD::CTTZ: 449 case ISD::CTLZ_ZERO_UNDEF: 450 case ISD::CTTZ_ZERO_UNDEF: 451 case ISD::CTPOP: 452 case ISD::FABS: 453 case ISD::FCEIL: 454 case ISD::FCOS: 455 case ISD::FEXP: 456 case ISD::FEXP2: 457 case ISD::FFLOOR: 458 case ISD::FLOG: 459 case ISD::FLOG10: 460 case ISD::FLOG2: 461 case ISD::FNEARBYINT: 462 case ISD::FNEG: 463 case ISD::FP_EXTEND: 464 case ISD::FP_ROUND: 465 case ISD::FP_TO_SINT: 466 case ISD::FP_TO_UINT: 467 case ISD::FRINT: 468 case ISD::FSIN: 469 case ISD::FSQRT: 470 case ISD::FTRUNC: 471 case ISD::SIGN_EXTEND: 472 case ISD::SINT_TO_FP: 473 case ISD::TRUNCATE: 474 case ISD::UINT_TO_FP: 475 case ISD::ZERO_EXTEND: 476 SplitVecRes_UnaryOp(N, Lo, Hi); 477 break; 478 479 case ISD::ADD: 480 case ISD::SUB: 481 case ISD::MUL: 482 case ISD::FADD: 483 case ISD::FSUB: 484 case ISD::FMUL: 485 case ISD::SDIV: 486 case ISD::UDIV: 487 case ISD::FDIV: 488 case ISD::FPOW: 489 case ISD::AND: 490 case ISD::OR: 491 case ISD::XOR: 492 case ISD::SHL: 493 case ISD::SRA: 494 case ISD::SRL: 495 case ISD::UREM: 496 case ISD::SREM: 497 case ISD::FREM: 498 SplitVecRes_BinOp(N, Lo, Hi); 499 break; 500 } 501 502 // If Lo/Hi is null, the sub-method took care of registering results etc. 503 if (Lo.getNode()) 504 SetSplitVector(SDValue(N, ResNo), Lo, Hi); 505} 506 507void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo, 508 SDValue &Hi) { 509 SDValue LHSLo, LHSHi; 510 GetSplitVector(N->getOperand(0), LHSLo, LHSHi); 511 SDValue RHSLo, RHSHi; 512 GetSplitVector(N->getOperand(1), RHSLo, RHSHi); 513 DebugLoc dl = N->getDebugLoc(); 514 515 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo); 516 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi); 517} 518 519void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, 520 SDValue &Hi) { 521 // We know the result is a vector. The input may be either a vector or a 522 // scalar value. 523 EVT LoVT, HiVT; 524 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 525 DebugLoc dl = N->getDebugLoc(); 526 527 SDValue InOp = N->getOperand(0); 528 EVT InVT = InOp.getValueType(); 529 530 // Handle some special cases efficiently. 531 switch (getTypeAction(InVT)) { 532 case TargetLowering::TypeLegal: 533 case TargetLowering::TypePromoteInteger: 534 case TargetLowering::TypeSoftenFloat: 535 case TargetLowering::TypeScalarizeVector: 536 case TargetLowering::TypeWidenVector: 537 break; 538 case TargetLowering::TypeExpandInteger: 539 case TargetLowering::TypeExpandFloat: 540 // A scalar to vector conversion, where the scalar needs expansion. 541 // If the vector is being split in two then we can just convert the 542 // expanded pieces. 543 if (LoVT == HiVT) { 544 GetExpandedOp(InOp, Lo, Hi); 545 if (TLI.isBigEndian()) 546 std::swap(Lo, Hi); 547 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); 548 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); 549 return; 550 } 551 break; 552 case TargetLowering::TypeSplitVector: 553 // If the input is a vector that needs to be split, convert each split 554 // piece of the input now. 555 GetSplitVector(InOp, Lo, Hi); 556 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); 557 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); 558 return; 559 } 560 561 // In the general case, convert the input to an integer and split it by hand. 562 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits()); 563 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits()); 564 if (TLI.isBigEndian()) 565 std::swap(LoIntVT, HiIntVT); 566 567 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi); 568 569 if (TLI.isBigEndian()) 570 std::swap(Lo, Hi); 571 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); 572 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); 573} 574 575void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, 576 SDValue &Hi) { 577 EVT LoVT, HiVT; 578 DebugLoc dl = N->getDebugLoc(); 579 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 580 unsigned LoNumElts = LoVT.getVectorNumElements(); 581 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts); 582 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size()); 583 584 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end()); 585 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size()); 586} 587 588void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, 589 SDValue &Hi) { 590 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS"); 591 DebugLoc dl = N->getDebugLoc(); 592 unsigned NumSubvectors = N->getNumOperands() / 2; 593 if (NumSubvectors == 1) { 594 Lo = N->getOperand(0); 595 Hi = N->getOperand(1); 596 return; 597 } 598 599 EVT LoVT, HiVT; 600 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 601 602 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors); 603 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size()); 604 605 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end()); 606 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size()); 607} 608 609void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, 610 SDValue &Hi) { 611 SDValue Vec = N->getOperand(0); 612 SDValue Idx = N->getOperand(1); 613 DebugLoc dl = N->getDebugLoc(); 614 615 EVT LoVT, HiVT; 616 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 617 618 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx); 619 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); 620 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec, 621 DAG.getIntPtrConstant(IdxVal + LoVT.getVectorNumElements())); 622} 623 624void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, 625 SDValue &Hi) { 626 DebugLoc dl = N->getDebugLoc(); 627 GetSplitVector(N->getOperand(0), Lo, Hi); 628 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1)); 629 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1)); 630} 631 632void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo, 633 SDValue &Hi) { 634 SDValue LHSLo, LHSHi; 635 GetSplitVector(N->getOperand(0), LHSLo, LHSHi); 636 DebugLoc dl = N->getDebugLoc(); 637 638 EVT LoVT, HiVT; 639 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT); 640 641 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, 642 DAG.getValueType(LoVT)); 643 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, 644 DAG.getValueType(HiVT)); 645} 646 647void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, 648 SDValue &Hi) { 649 SDValue Vec = N->getOperand(0); 650 SDValue Elt = N->getOperand(1); 651 SDValue Idx = N->getOperand(2); 652 DebugLoc dl = N->getDebugLoc(); 653 GetSplitVector(Vec, Lo, Hi); 654 655 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) { 656 unsigned IdxVal = CIdx->getZExtValue(); 657 unsigned LoNumElts = Lo.getValueType().getVectorNumElements(); 658 if (IdxVal < LoNumElts) 659 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, 660 Lo.getValueType(), Lo, Elt, Idx); 661 else 662 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt, 663 DAG.getIntPtrConstant(IdxVal - LoNumElts)); 664 return; 665 } 666 667 // Spill the vector to the stack. 668 EVT VecVT = Vec.getValueType(); 669 EVT EltVT = VecVT.getVectorElementType(); 670 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); 671 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, 672 MachinePointerInfo(), false, false, 0); 673 674 // Store the new element. This may be larger than the vector element type, 675 // so use a truncating store. 676 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx); 677 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext()); 678 unsigned Alignment = 679 TLI.getTargetData()->getPrefTypeAlignment(VecType); 680 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT, 681 false, false, 0); 682 683 // Load the Lo part from the stack slot. 684 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(), 685 false, false, false, 0); 686 687 // Increment the pointer to the other part. 688 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8; 689 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, 690 DAG.getIntPtrConstant(IncrementSize)); 691 692 // Load the Hi part from the stack slot. 693 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(), 694 false, false, false, MinAlign(Alignment, IncrementSize)); 695} 696 697void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, 698 SDValue &Hi) { 699 EVT LoVT, HiVT; 700 DebugLoc dl = N->getDebugLoc(); 701 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 702 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0)); 703 Hi = DAG.getUNDEF(HiVT); 704} 705 706void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, 707 SDValue &Hi) { 708 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!"); 709 EVT LoVT, HiVT; 710 DebugLoc dl = LD->getDebugLoc(); 711 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT); 712 713 ISD::LoadExtType ExtType = LD->getExtensionType(); 714 SDValue Ch = LD->getChain(); 715 SDValue Ptr = LD->getBasePtr(); 716 SDValue Offset = DAG.getUNDEF(Ptr.getValueType()); 717 EVT MemoryVT = LD->getMemoryVT(); 718 unsigned Alignment = LD->getOriginalAlignment(); 719 bool isVolatile = LD->isVolatile(); 720 bool isNonTemporal = LD->isNonTemporal(); 721 bool isInvariant = LD->isInvariant(); 722 723 EVT LoMemVT, HiMemVT; 724 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT); 725 726 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, 727 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal, 728 isInvariant, Alignment); 729 730 unsigned IncrementSize = LoMemVT.getSizeInBits()/8; 731 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 732 DAG.getIntPtrConstant(IncrementSize)); 733 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, 734 LD->getPointerInfo().getWithOffset(IncrementSize), 735 HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignment); 736 737 // Build a factor node to remember that this load is independent of the 738 // other one. 739 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1), 740 Hi.getValue(1)); 741 742 // Legalized the chain result - switch anything that used the old chain to 743 // use the new one. 744 ReplaceValueWith(SDValue(LD, 1), Ch); 745} 746 747void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) { 748 assert(N->getValueType(0).isVector() && 749 N->getOperand(0).getValueType().isVector() && 750 "Operand types must be vectors"); 751 752 EVT LoVT, HiVT; 753 DebugLoc DL = N->getDebugLoc(); 754 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 755 756 // Split the input. 757 EVT InVT = N->getOperand(0).getValueType(); 758 SDValue LL, LH, RL, RH; 759 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(), 760 LoVT.getVectorNumElements()); 761 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0), 762 DAG.getIntPtrConstant(0)); 763 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0), 764 DAG.getIntPtrConstant(InNVT.getVectorNumElements())); 765 766 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1), 767 DAG.getIntPtrConstant(0)); 768 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1), 769 DAG.getIntPtrConstant(InNVT.getVectorNumElements())); 770 771 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2)); 772 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2)); 773} 774 775void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, 776 SDValue &Hi) { 777 // Get the dest types - they may not match the input types, e.g. int_to_fp. 778 EVT LoVT, HiVT; 779 DebugLoc dl = N->getDebugLoc(); 780 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); 781 782 // If the input also splits, handle it directly for a compile time speedup. 783 // Otherwise split it by hand. 784 EVT InVT = N->getOperand(0).getValueType(); 785 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) { 786 GetSplitVector(N->getOperand(0), Lo, Hi); 787 } else { 788 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(), 789 LoVT.getVectorNumElements()); 790 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0), 791 DAG.getIntPtrConstant(0)); 792 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0), 793 DAG.getIntPtrConstant(InNVT.getVectorNumElements())); 794 } 795 796 if (N->getOpcode() == ISD::FP_ROUND) { 797 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1)); 798 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1)); 799 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) { 800 SDValue DTyOpLo = DAG.getValueType(LoVT); 801 SDValue DTyOpHi = DAG.getValueType(HiVT); 802 SDValue STyOpLo = DAG.getValueType(Lo.getValueType()); 803 SDValue STyOpHi = DAG.getValueType(Hi.getValueType()); 804 SDValue RndOp = N->getOperand(3); 805 SDValue SatOp = N->getOperand(4); 806 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode(); 807 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp, 808 CvtCode); 809 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp, 810 CvtCode); 811 } else { 812 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo); 813 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi); 814 } 815} 816 817void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, 818 SDValue &Lo, SDValue &Hi) { 819 // The low and high parts of the original input give four input vectors. 820 SDValue Inputs[4]; 821 DebugLoc dl = N->getDebugLoc(); 822 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]); 823 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]); 824 EVT NewVT = Inputs[0].getValueType(); 825 unsigned NewElts = NewVT.getVectorNumElements(); 826 827 // If Lo or Hi uses elements from at most two of the four input vectors, then 828 // express it as a vector shuffle of those two inputs. Otherwise extract the 829 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR. 830 SmallVector<int, 16> Ops; 831 for (unsigned High = 0; High < 2; ++High) { 832 SDValue &Output = High ? Hi : Lo; 833 834 // Build a shuffle mask for the output, discovering on the fly which 835 // input vectors to use as shuffle operands (recorded in InputUsed). 836 // If building a suitable shuffle vector proves too hard, then bail 837 // out with useBuildVector set. 838 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered. 839 unsigned FirstMaskIdx = High * NewElts; 840 bool useBuildVector = false; 841 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) { 842 // The mask element. This indexes into the input. 843 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset); 844 845 // The input vector this mask element indexes into. 846 unsigned Input = (unsigned)Idx / NewElts; 847 848 if (Input >= array_lengthof(Inputs)) { 849 // The mask element does not index into any input vector. 850 Ops.push_back(-1); 851 continue; 852 } 853 854 // Turn the index into an offset from the start of the input vector. 855 Idx -= Input * NewElts; 856 857 // Find or create a shuffle vector operand to hold this input. 858 unsigned OpNo; 859 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) { 860 if (InputUsed[OpNo] == Input) { 861 // This input vector is already an operand. 862 break; 863 } else if (InputUsed[OpNo] == -1U) { 864 // Create a new operand for this input vector. 865 InputUsed[OpNo] = Input; 866 break; 867 } 868 } 869 870 if (OpNo >= array_lengthof(InputUsed)) { 871 // More than two input vectors used! Give up on trying to create a 872 // shuffle vector. Insert all elements into a BUILD_VECTOR instead. 873 useBuildVector = true; 874 break; 875 } 876 877 // Add the mask index for the new shuffle vector. 878 Ops.push_back(Idx + OpNo * NewElts); 879 } 880 881 if (useBuildVector) { 882 EVT EltVT = NewVT.getVectorElementType(); 883 SmallVector<SDValue, 16> SVOps; 884 885 // Extract the input elements by hand. 886 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) { 887 // The mask element. This indexes into the input. 888 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset); 889 890 // The input vector this mask element indexes into. 891 unsigned Input = (unsigned)Idx / NewElts; 892 893 if (Input >= array_lengthof(Inputs)) { 894 // The mask element is "undef" or indexes off the end of the input. 895 SVOps.push_back(DAG.getUNDEF(EltVT)); 896 continue; 897 } 898 899 // Turn the index into an offset from the start of the input vector. 900 Idx -= Input * NewElts; 901 902 // Extract the vector element by hand. 903 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, 904 Inputs[Input], DAG.getIntPtrConstant(Idx))); 905 } 906 907 // Construct the Lo/Hi output using a BUILD_VECTOR. 908 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size()); 909 } else if (InputUsed[0] == -1U) { 910 // No input vectors were used! The result is undefined. 911 Output = DAG.getUNDEF(NewVT); 912 } else { 913 SDValue Op0 = Inputs[InputUsed[0]]; 914 // If only one input was used, use an undefined vector for the other. 915 SDValue Op1 = InputUsed[1] == -1U ? 916 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]]; 917 // At least one input vector was used. Create a new shuffle vector. 918 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]); 919 } 920 921 Ops.clear(); 922 } 923} 924 925 926//===----------------------------------------------------------------------===// 927// Operand Vector Splitting 928//===----------------------------------------------------------------------===// 929 930/// SplitVectorOperand - This method is called when the specified operand of the 931/// specified node is found to need vector splitting. At this point, all of the 932/// result types of the node are known to be legal, but other operands of the 933/// node may need legalization as well as the specified one. 934bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) { 935 DEBUG(dbgs() << "Split node operand: "; 936 N->dump(&DAG); 937 dbgs() << "\n"); 938 SDValue Res = SDValue(); 939 940 if (Res.getNode() == 0) { 941 switch (N->getOpcode()) { 942 default: 943#ifndef NDEBUG 944 dbgs() << "SplitVectorOperand Op #" << OpNo << ": "; 945 N->dump(&DAG); 946 dbgs() << "\n"; 947#endif 948 llvm_unreachable("Do not know how to split this operator's operand!"); 949 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break; 950 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break; 951 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break; 952 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break; 953 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break; 954 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break; 955 case ISD::STORE: 956 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo); 957 break; 958 959 case ISD::CTTZ: 960 case ISD::CTLZ: 961 case ISD::CTPOP: 962 case ISD::FP_EXTEND: 963 case ISD::FP_TO_SINT: 964 case ISD::FP_TO_UINT: 965 case ISD::SINT_TO_FP: 966 case ISD::UINT_TO_FP: 967 case ISD::FTRUNC: 968 case ISD::TRUNCATE: 969 case ISD::SIGN_EXTEND: 970 case ISD::ZERO_EXTEND: 971 case ISD::ANY_EXTEND: 972 Res = SplitVecOp_UnaryOp(N); 973 break; 974 } 975 } 976 977 // If the result is null, the sub-method took care of registering results etc. 978 if (!Res.getNode()) return false; 979 980 // If the result is N, the sub-method updated N in place. Tell the legalizer 981 // core about this. 982 if (Res.getNode() == N) 983 return true; 984 985 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && 986 "Invalid operand expansion"); 987 988 ReplaceValueWith(SDValue(N, 0), Res); 989 return false; 990} 991 992SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) { 993 // The result has a legal vector type, but the input needs splitting. 994 EVT ResVT = N->getValueType(0); 995 SDValue Lo, Hi; 996 DebugLoc dl = N->getDebugLoc(); 997 GetSplitVector(N->getOperand(0), Lo, Hi); 998 EVT InVT = Lo.getValueType(); 999 1000 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(), 1001 InVT.getVectorNumElements()); 1002 1003 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo); 1004 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi); 1005 1006 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi); 1007} 1008 1009SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) { 1010 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will 1011 // end up being split all the way down to individual components. Convert the 1012 // split pieces into integers and reassemble. 1013 SDValue Lo, Hi; 1014 GetSplitVector(N->getOperand(0), Lo, Hi); 1015 Lo = BitConvertToInteger(Lo); 1016 Hi = BitConvertToInteger(Hi); 1017 1018 if (TLI.isBigEndian()) 1019 std::swap(Lo, Hi); 1020 1021 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0), 1022 JoinIntegers(Lo, Hi)); 1023} 1024 1025SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) { 1026 // We know that the extracted result type is legal. 1027 EVT SubVT = N->getValueType(0); 1028 SDValue Idx = N->getOperand(1); 1029 DebugLoc dl = N->getDebugLoc(); 1030 SDValue Lo, Hi; 1031 GetSplitVector(N->getOperand(0), Lo, Hi); 1032 1033 uint64_t LoElts = Lo.getValueType().getVectorNumElements(); 1034 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); 1035 1036 if (IdxVal < LoElts) { 1037 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts && 1038 "Extracted subvector crosses vector split!"); 1039 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx); 1040 } else { 1041 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi, 1042 DAG.getConstant(IdxVal - LoElts, Idx.getValueType())); 1043 } 1044} 1045 1046SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) { 1047 SDValue Vec = N->getOperand(0); 1048 SDValue Idx = N->getOperand(1); 1049 EVT VecVT = Vec.getValueType(); 1050 1051 if (isa<ConstantSDNode>(Idx)) { 1052 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); 1053 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!"); 1054 1055 SDValue Lo, Hi; 1056 GetSplitVector(Vec, Lo, Hi); 1057 1058 uint64_t LoElts = Lo.getValueType().getVectorNumElements(); 1059 1060 if (IdxVal < LoElts) 1061 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0); 1062 return SDValue(DAG.UpdateNodeOperands(N, Hi, 1063 DAG.getConstant(IdxVal - LoElts, 1064 Idx.getValueType())), 0); 1065 } 1066 1067 // Store the vector to the stack. 1068 EVT EltVT = VecVT.getVectorElementType(); 1069 DebugLoc dl = N->getDebugLoc(); 1070 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); 1071 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, 1072 MachinePointerInfo(), false, false, 0); 1073 1074 // Load back the required element. 1075 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx); 1076 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr, 1077 MachinePointerInfo(), EltVT, false, false, 0); 1078} 1079 1080SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) { 1081 assert(N->isUnindexed() && "Indexed store of vector?"); 1082 assert(OpNo == 1 && "Can only split the stored value"); 1083 DebugLoc DL = N->getDebugLoc(); 1084 1085 bool isTruncating = N->isTruncatingStore(); 1086 SDValue Ch = N->getChain(); 1087 SDValue Ptr = N->getBasePtr(); 1088 EVT MemoryVT = N->getMemoryVT(); 1089 unsigned Alignment = N->getOriginalAlignment(); 1090 bool isVol = N->isVolatile(); 1091 bool isNT = N->isNonTemporal(); 1092 SDValue Lo, Hi; 1093 GetSplitVector(N->getOperand(1), Lo, Hi); 1094 1095 EVT LoMemVT, HiMemVT; 1096 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT); 1097 1098 unsigned IncrementSize = LoMemVT.getSizeInBits()/8; 1099 1100 if (isTruncating) 1101 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), 1102 LoMemVT, isVol, isNT, Alignment); 1103 else 1104 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), 1105 isVol, isNT, Alignment); 1106 1107 // Increment the pointer to the other half. 1108 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr, 1109 DAG.getIntPtrConstant(IncrementSize)); 1110 1111 if (isTruncating) 1112 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr, 1113 N->getPointerInfo().getWithOffset(IncrementSize), 1114 HiMemVT, isVol, isNT, Alignment); 1115 else 1116 Hi = DAG.getStore(Ch, DL, Hi, Ptr, 1117 N->getPointerInfo().getWithOffset(IncrementSize), 1118 isVol, isNT, Alignment); 1119 1120 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi); 1121} 1122 1123SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) { 1124 DebugLoc DL = N->getDebugLoc(); 1125 1126 // The input operands all must have the same type, and we know the result the 1127 // result type is valid. Convert this to a buildvector which extracts all the 1128 // input elements. 1129 // TODO: If the input elements are power-two vectors, we could convert this to 1130 // a new CONCAT_VECTORS node with elements that are half-wide. 1131 SmallVector<SDValue, 32> Elts; 1132 EVT EltVT = N->getValueType(0).getVectorElementType(); 1133 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) { 1134 SDValue Op = N->getOperand(op); 1135 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements(); 1136 i != e; ++i) { 1137 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, 1138 Op, DAG.getIntPtrConstant(i))); 1139 1140 } 1141 } 1142 1143 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0), 1144 &Elts[0], Elts.size()); 1145} 1146 1147SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) { 1148 assert(N->getValueType(0).isVector() && 1149 N->getOperand(0).getValueType().isVector() && 1150 "Operand types must be vectors"); 1151 // The result has a legal vector type, but the input needs splitting. 1152 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; 1153 DebugLoc DL = N->getDebugLoc(); 1154 GetSplitVector(N->getOperand(0), Lo0, Hi0); 1155 GetSplitVector(N->getOperand(1), Lo1, Hi1); 1156 unsigned PartElements = Lo0.getValueType().getVectorNumElements(); 1157 EVT PartResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, PartElements); 1158 EVT WideResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 2*PartElements); 1159 1160 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2)); 1161 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2)); 1162 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes); 1163 return PromoteTargetBoolean(Con, N->getValueType(0)); 1164} 1165 1166 1167SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) { 1168 // The result has a legal vector type, but the input needs splitting. 1169 EVT ResVT = N->getValueType(0); 1170 SDValue Lo, Hi; 1171 DebugLoc DL = N->getDebugLoc(); 1172 GetSplitVector(N->getOperand(0), Lo, Hi); 1173 EVT InVT = Lo.getValueType(); 1174 1175 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(), 1176 InVT.getVectorNumElements()); 1177 1178 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1)); 1179 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1)); 1180 1181 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi); 1182} 1183 1184 1185 1186//===----------------------------------------------------------------------===// 1187// Result Vector Widening 1188//===----------------------------------------------------------------------===// 1189 1190void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) { 1191 DEBUG(dbgs() << "Widen node result " << ResNo << ": "; 1192 N->dump(&DAG); 1193 dbgs() << "\n"); 1194 1195 // See if the target wants to custom widen this node. 1196 if (CustomWidenLowerNode(N, N->getValueType(ResNo))) 1197 return; 1198 1199 SDValue Res = SDValue(); 1200 switch (N->getOpcode()) { 1201 default: 1202#ifndef NDEBUG 1203 dbgs() << "WidenVectorResult #" << ResNo << ": "; 1204 N->dump(&DAG); 1205 dbgs() << "\n"; 1206#endif 1207 llvm_unreachable("Do not know how to widen the result of this operator!"); 1208 1209 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break; 1210 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break; 1211 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break; 1212 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break; 1213 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break; 1214 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break; 1215 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break; 1216 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break; 1217 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break; 1218 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break; 1219 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break; 1220 case ISD::VSELECT: 1221 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break; 1222 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break; 1223 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break; 1224 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break; 1225 case ISD::VECTOR_SHUFFLE: 1226 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N)); 1227 break; 1228 case ISD::ADD: 1229 case ISD::AND: 1230 case ISD::BSWAP: 1231 case ISD::FADD: 1232 case ISD::FCOPYSIGN: 1233 case ISD::FDIV: 1234 case ISD::FMUL: 1235 case ISD::FPOW: 1236 case ISD::FREM: 1237 case ISD::FSUB: 1238 case ISD::MUL: 1239 case ISD::MULHS: 1240 case ISD::MULHU: 1241 case ISD::OR: 1242 case ISD::SDIV: 1243 case ISD::SREM: 1244 case ISD::UDIV: 1245 case ISD::UREM: 1246 case ISD::SUB: 1247 case ISD::XOR: 1248 Res = WidenVecRes_Binary(N); 1249 break; 1250 1251 case ISD::FPOWI: 1252 Res = WidenVecRes_POWI(N); 1253 break; 1254 1255 case ISD::SHL: 1256 case ISD::SRA: 1257 case ISD::SRL: 1258 Res = WidenVecRes_Shift(N); 1259 break; 1260 1261 case ISD::ANY_EXTEND: 1262 case ISD::FP_EXTEND: 1263 case ISD::FP_ROUND: 1264 case ISD::FP_TO_SINT: 1265 case ISD::FP_TO_UINT: 1266 case ISD::SIGN_EXTEND: 1267 case ISD::SINT_TO_FP: 1268 case ISD::TRUNCATE: 1269 case ISD::UINT_TO_FP: 1270 case ISD::ZERO_EXTEND: 1271 Res = WidenVecRes_Convert(N); 1272 break; 1273 1274 case ISD::CTLZ: 1275 case ISD::CTPOP: 1276 case ISD::CTTZ: 1277 case ISD::FABS: 1278 case ISD::FCEIL: 1279 case ISD::FCOS: 1280 case ISD::FEXP: 1281 case ISD::FEXP2: 1282 case ISD::FFLOOR: 1283 case ISD::FLOG: 1284 case ISD::FLOG10: 1285 case ISD::FLOG2: 1286 case ISD::FNEARBYINT: 1287 case ISD::FNEG: 1288 case ISD::FRINT: 1289 case ISD::FSIN: 1290 case ISD::FSQRT: 1291 case ISD::FTRUNC: 1292 Res = WidenVecRes_Unary(N); 1293 break; 1294 } 1295 1296 // If Res is null, the sub-method took care of registering the result. 1297 if (Res.getNode()) 1298 SetWidenedVector(SDValue(N, ResNo), Res); 1299} 1300 1301SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) { 1302 // Binary op widening. 1303 unsigned Opcode = N->getOpcode(); 1304 DebugLoc dl = N->getDebugLoc(); 1305 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1306 EVT WidenEltVT = WidenVT.getVectorElementType(); 1307 EVT VT = WidenVT; 1308 unsigned NumElts = VT.getVectorNumElements(); 1309 while (!TLI.isTypeLegal(VT) && NumElts != 1) { 1310 NumElts = NumElts / 2; 1311 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts); 1312 } 1313 1314 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) { 1315 // Operation doesn't trap so just widen as normal. 1316 SDValue InOp1 = GetWidenedVector(N->getOperand(0)); 1317 SDValue InOp2 = GetWidenedVector(N->getOperand(1)); 1318 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2); 1319 } 1320 1321 // No legal vector version so unroll the vector operation and then widen. 1322 if (NumElts == 1) 1323 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements()); 1324 1325 // Since the operation can trap, apply operation on the original vector. 1326 EVT MaxVT = VT; 1327 SDValue InOp1 = GetWidenedVector(N->getOperand(0)); 1328 SDValue InOp2 = GetWidenedVector(N->getOperand(1)); 1329 unsigned CurNumElts = N->getValueType(0).getVectorNumElements(); 1330 1331 SmallVector<SDValue, 16> ConcatOps(CurNumElts); 1332 unsigned ConcatEnd = 0; // Current ConcatOps index. 1333 int Idx = 0; // Current Idx into input vectors. 1334 1335 // NumElts := greatest legal vector size (at most WidenVT) 1336 // while (orig. vector has unhandled elements) { 1337 // take munches of size NumElts from the beginning and add to ConcatOps 1338 // NumElts := next smaller supported vector size or 1 1339 // } 1340 while (CurNumElts != 0) { 1341 while (CurNumElts >= NumElts) { 1342 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1, 1343 DAG.getIntPtrConstant(Idx)); 1344 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2, 1345 DAG.getIntPtrConstant(Idx)); 1346 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2); 1347 Idx += NumElts; 1348 CurNumElts -= NumElts; 1349 } 1350 do { 1351 NumElts = NumElts / 2; 1352 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts); 1353 } while (!TLI.isTypeLegal(VT) && NumElts != 1); 1354 1355 if (NumElts == 1) { 1356 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) { 1357 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, 1358 InOp1, DAG.getIntPtrConstant(Idx)); 1359 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, 1360 InOp2, DAG.getIntPtrConstant(Idx)); 1361 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT, 1362 EOp1, EOp2); 1363 } 1364 CurNumElts = 0; 1365 } 1366 } 1367 1368 // Check to see if we have a single operation with the widen type. 1369 if (ConcatEnd == 1) { 1370 VT = ConcatOps[0].getValueType(); 1371 if (VT == WidenVT) 1372 return ConcatOps[0]; 1373 } 1374 1375 // while (Some element of ConcatOps is not of type MaxVT) { 1376 // From the end of ConcatOps, collect elements of the same type and put 1377 // them into an op of the next larger supported type 1378 // } 1379 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) { 1380 Idx = ConcatEnd - 1; 1381 VT = ConcatOps[Idx--].getValueType(); 1382 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT) 1383 Idx--; 1384 1385 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1; 1386 EVT NextVT; 1387 do { 1388 NextSize *= 2; 1389 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize); 1390 } while (!TLI.isTypeLegal(NextVT)); 1391 1392 if (!VT.isVector()) { 1393 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT 1394 SDValue VecOp = DAG.getUNDEF(NextVT); 1395 unsigned NumToInsert = ConcatEnd - Idx - 1; 1396 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) { 1397 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp, 1398 ConcatOps[OpIdx], DAG.getIntPtrConstant(i)); 1399 } 1400 ConcatOps[Idx+1] = VecOp; 1401 ConcatEnd = Idx + 2; 1402 } else { 1403 // Vector type, create a CONCAT_VECTORS of type NextVT 1404 SDValue undefVec = DAG.getUNDEF(VT); 1405 unsigned OpsToConcat = NextSize/VT.getVectorNumElements(); 1406 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat); 1407 unsigned RealVals = ConcatEnd - Idx - 1; 1408 unsigned SubConcatEnd = 0; 1409 unsigned SubConcatIdx = Idx + 1; 1410 while (SubConcatEnd < RealVals) 1411 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx]; 1412 while (SubConcatEnd < OpsToConcat) 1413 SubConcatOps[SubConcatEnd++] = undefVec; 1414 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl, 1415 NextVT, &SubConcatOps[0], 1416 OpsToConcat); 1417 ConcatEnd = SubConcatIdx + 1; 1418 } 1419 } 1420 1421 // Check to see if we have a single operation with the widen type. 1422 if (ConcatEnd == 1) { 1423 VT = ConcatOps[0].getValueType(); 1424 if (VT == WidenVT) 1425 return ConcatOps[0]; 1426 } 1427 1428 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT 1429 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements(); 1430 if (NumOps != ConcatEnd ) { 1431 SDValue UndefVal = DAG.getUNDEF(MaxVT); 1432 for (unsigned j = ConcatEnd; j < NumOps; ++j) 1433 ConcatOps[j] = UndefVal; 1434 } 1435 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps); 1436} 1437 1438SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) { 1439 SDValue InOp = N->getOperand(0); 1440 DebugLoc DL = N->getDebugLoc(); 1441 1442 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1443 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1444 1445 EVT InVT = InOp.getValueType(); 1446 EVT InEltVT = InVT.getVectorElementType(); 1447 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts); 1448 1449 unsigned Opcode = N->getOpcode(); 1450 unsigned InVTNumElts = InVT.getVectorNumElements(); 1451 1452 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) { 1453 InOp = GetWidenedVector(N->getOperand(0)); 1454 InVT = InOp.getValueType(); 1455 InVTNumElts = InVT.getVectorNumElements(); 1456 if (InVTNumElts == WidenNumElts) { 1457 if (N->getNumOperands() == 1) 1458 return DAG.getNode(Opcode, DL, WidenVT, InOp); 1459 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1)); 1460 } 1461 } 1462 1463 if (TLI.isTypeLegal(InWidenVT)) { 1464 // Because the result and the input are different vector types, widening 1465 // the result could create a legal type but widening the input might make 1466 // it an illegal type that might lead to repeatedly splitting the input 1467 // and then widening it. To avoid this, we widen the input only if 1468 // it results in a legal type. 1469 if (WidenNumElts % InVTNumElts == 0) { 1470 // Widen the input and call convert on the widened input vector. 1471 unsigned NumConcat = WidenNumElts/InVTNumElts; 1472 SmallVector<SDValue, 16> Ops(NumConcat); 1473 Ops[0] = InOp; 1474 SDValue UndefVal = DAG.getUNDEF(InVT); 1475 for (unsigned i = 1; i != NumConcat; ++i) 1476 Ops[i] = UndefVal; 1477 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT, 1478 &Ops[0], NumConcat); 1479 if (N->getNumOperands() == 1) 1480 return DAG.getNode(Opcode, DL, WidenVT, InVec); 1481 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1)); 1482 } 1483 1484 if (InVTNumElts % WidenNumElts == 0) { 1485 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT, 1486 InOp, DAG.getIntPtrConstant(0)); 1487 // Extract the input and convert the shorten input vector. 1488 if (N->getNumOperands() == 1) 1489 return DAG.getNode(Opcode, DL, WidenVT, InVal); 1490 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1)); 1491 } 1492 } 1493 1494 // Otherwise unroll into some nasty scalar code and rebuild the vector. 1495 SmallVector<SDValue, 16> Ops(WidenNumElts); 1496 EVT EltVT = WidenVT.getVectorElementType(); 1497 unsigned MinElts = std::min(InVTNumElts, WidenNumElts); 1498 unsigned i; 1499 for (i=0; i < MinElts; ++i) { 1500 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp, 1501 DAG.getIntPtrConstant(i)); 1502 if (N->getNumOperands() == 1) 1503 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val); 1504 else 1505 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1)); 1506 } 1507 1508 SDValue UndefVal = DAG.getUNDEF(EltVT); 1509 for (; i < WidenNumElts; ++i) 1510 Ops[i] = UndefVal; 1511 1512 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts); 1513} 1514 1515SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) { 1516 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1517 SDValue InOp = GetWidenedVector(N->getOperand(0)); 1518 SDValue ShOp = N->getOperand(1); 1519 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp); 1520} 1521 1522SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) { 1523 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1524 SDValue InOp = GetWidenedVector(N->getOperand(0)); 1525 SDValue ShOp = N->getOperand(1); 1526 1527 EVT ShVT = ShOp.getValueType(); 1528 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) { 1529 ShOp = GetWidenedVector(ShOp); 1530 ShVT = ShOp.getValueType(); 1531 } 1532 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(), 1533 ShVT.getVectorElementType(), 1534 WidenVT.getVectorNumElements()); 1535 if (ShVT != ShWidenVT) 1536 ShOp = ModifyToType(ShOp, ShWidenVT); 1537 1538 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp); 1539} 1540 1541SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) { 1542 // Unary op widening. 1543 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1544 SDValue InOp = GetWidenedVector(N->getOperand(0)); 1545 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp); 1546} 1547 1548SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) { 1549 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1550 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), 1551 cast<VTSDNode>(N->getOperand(1))->getVT() 1552 .getVectorElementType(), 1553 WidenVT.getVectorNumElements()); 1554 SDValue WidenLHS = GetWidenedVector(N->getOperand(0)); 1555 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), 1556 WidenVT, WidenLHS, DAG.getValueType(ExtVT)); 1557} 1558 1559SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) { 1560 SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo); 1561 return GetWidenedVector(WidenVec); 1562} 1563 1564SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) { 1565 SDValue InOp = N->getOperand(0); 1566 EVT InVT = InOp.getValueType(); 1567 EVT VT = N->getValueType(0); 1568 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1569 DebugLoc dl = N->getDebugLoc(); 1570 1571 switch (getTypeAction(InVT)) { 1572 case TargetLowering::TypeLegal: 1573 break; 1574 case TargetLowering::TypePromoteInteger: 1575 // If the incoming type is a vector that is being promoted, then 1576 // we know that the elements are arranged differently and that we 1577 // must perform the conversion using a stack slot. 1578 if (InVT.isVector()) 1579 break; 1580 1581 // If the InOp is promoted to the same size, convert it. Otherwise, 1582 // fall out of the switch and widen the promoted input. 1583 InOp = GetPromotedInteger(InOp); 1584 InVT = InOp.getValueType(); 1585 if (WidenVT.bitsEq(InVT)) 1586 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp); 1587 break; 1588 case TargetLowering::TypeSoftenFloat: 1589 case TargetLowering::TypeExpandInteger: 1590 case TargetLowering::TypeExpandFloat: 1591 case TargetLowering::TypeScalarizeVector: 1592 case TargetLowering::TypeSplitVector: 1593 break; 1594 case TargetLowering::TypeWidenVector: 1595 // If the InOp is widened to the same size, convert it. Otherwise, fall 1596 // out of the switch and widen the widened input. 1597 InOp = GetWidenedVector(InOp); 1598 InVT = InOp.getValueType(); 1599 if (WidenVT.bitsEq(InVT)) 1600 // The input widens to the same size. Convert to the widen value. 1601 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp); 1602 break; 1603 } 1604 1605 unsigned WidenSize = WidenVT.getSizeInBits(); 1606 unsigned InSize = InVT.getSizeInBits(); 1607 // x86mmx is not an acceptable vector element type, so don't try. 1608 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) { 1609 // Determine new input vector type. The new input vector type will use 1610 // the same element type (if its a vector) or use the input type as a 1611 // vector. It is the same size as the type to widen to. 1612 EVT NewInVT; 1613 unsigned NewNumElts = WidenSize / InSize; 1614 if (InVT.isVector()) { 1615 EVT InEltVT = InVT.getVectorElementType(); 1616 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, 1617 WidenSize / InEltVT.getSizeInBits()); 1618 } else { 1619 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts); 1620 } 1621 1622 if (TLI.isTypeLegal(NewInVT)) { 1623 // Because the result and the input are different vector types, widening 1624 // the result could create a legal type but widening the input might make 1625 // it an illegal type that might lead to repeatedly splitting the input 1626 // and then widening it. To avoid this, we widen the input only if 1627 // it results in a legal type. 1628 SmallVector<SDValue, 16> Ops(NewNumElts); 1629 SDValue UndefVal = DAG.getUNDEF(InVT); 1630 Ops[0] = InOp; 1631 for (unsigned i = 1; i < NewNumElts; ++i) 1632 Ops[i] = UndefVal; 1633 1634 SDValue NewVec; 1635 if (InVT.isVector()) 1636 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, 1637 NewInVT, &Ops[0], NewNumElts); 1638 else 1639 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl, 1640 NewInVT, &Ops[0], NewNumElts); 1641 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec); 1642 } 1643 } 1644 1645 return CreateStackStoreLoad(InOp, WidenVT); 1646} 1647 1648SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) { 1649 DebugLoc dl = N->getDebugLoc(); 1650 // Build a vector with undefined for the new nodes. 1651 EVT VT = N->getValueType(0); 1652 EVT EltVT = VT.getVectorElementType(); 1653 unsigned NumElts = VT.getVectorNumElements(); 1654 1655 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1656 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1657 1658 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end()); 1659 NewOps.reserve(WidenNumElts); 1660 for (unsigned i = NumElts; i < WidenNumElts; ++i) 1661 NewOps.push_back(DAG.getUNDEF(EltVT)); 1662 1663 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size()); 1664} 1665 1666SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) { 1667 EVT InVT = N->getOperand(0).getValueType(); 1668 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1669 DebugLoc dl = N->getDebugLoc(); 1670 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1671 unsigned NumInElts = InVT.getVectorNumElements(); 1672 unsigned NumOperands = N->getNumOperands(); 1673 1674 bool InputWidened = false; // Indicates we need to widen the input. 1675 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) { 1676 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) { 1677 // Add undef vectors to widen to correct length. 1678 unsigned NumConcat = WidenVT.getVectorNumElements() / 1679 InVT.getVectorNumElements(); 1680 SDValue UndefVal = DAG.getUNDEF(InVT); 1681 SmallVector<SDValue, 16> Ops(NumConcat); 1682 for (unsigned i=0; i < NumOperands; ++i) 1683 Ops[i] = N->getOperand(i); 1684 for (unsigned i = NumOperands; i != NumConcat; ++i) 1685 Ops[i] = UndefVal; 1686 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat); 1687 } 1688 } else { 1689 InputWidened = true; 1690 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) { 1691 // The inputs and the result are widen to the same value. 1692 unsigned i; 1693 for (i=1; i < NumOperands; ++i) 1694 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 1695 break; 1696 1697 if (i == NumOperands) 1698 // Everything but the first operand is an UNDEF so just return the 1699 // widened first operand. 1700 return GetWidenedVector(N->getOperand(0)); 1701 1702 if (NumOperands == 2) { 1703 // Replace concat of two operands with a shuffle. 1704 SmallVector<int, 16> MaskOps(WidenNumElts, -1); 1705 for (unsigned i = 0; i < NumInElts; ++i) { 1706 MaskOps[i] = i; 1707 MaskOps[i + NumInElts] = i + WidenNumElts; 1708 } 1709 return DAG.getVectorShuffle(WidenVT, dl, 1710 GetWidenedVector(N->getOperand(0)), 1711 GetWidenedVector(N->getOperand(1)), 1712 &MaskOps[0]); 1713 } 1714 } 1715 } 1716 1717 // Fall back to use extracts and build vector. 1718 EVT EltVT = WidenVT.getVectorElementType(); 1719 SmallVector<SDValue, 16> Ops(WidenNumElts); 1720 unsigned Idx = 0; 1721 for (unsigned i=0; i < NumOperands; ++i) { 1722 SDValue InOp = N->getOperand(i); 1723 if (InputWidened) 1724 InOp = GetWidenedVector(InOp); 1725 for (unsigned j=0; j < NumInElts; ++j) 1726 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, 1727 DAG.getIntPtrConstant(j)); 1728 } 1729 SDValue UndefVal = DAG.getUNDEF(EltVT); 1730 for (; Idx < WidenNumElts; ++Idx) 1731 Ops[Idx] = UndefVal; 1732 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts); 1733} 1734 1735SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) { 1736 DebugLoc dl = N->getDebugLoc(); 1737 SDValue InOp = N->getOperand(0); 1738 SDValue RndOp = N->getOperand(3); 1739 SDValue SatOp = N->getOperand(4); 1740 1741 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1742 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1743 1744 EVT InVT = InOp.getValueType(); 1745 EVT InEltVT = InVT.getVectorElementType(); 1746 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts); 1747 1748 SDValue DTyOp = DAG.getValueType(WidenVT); 1749 SDValue STyOp = DAG.getValueType(InWidenVT); 1750 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode(); 1751 1752 unsigned InVTNumElts = InVT.getVectorNumElements(); 1753 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) { 1754 InOp = GetWidenedVector(InOp); 1755 InVT = InOp.getValueType(); 1756 InVTNumElts = InVT.getVectorNumElements(); 1757 if (InVTNumElts == WidenNumElts) 1758 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp, 1759 SatOp, CvtCode); 1760 } 1761 1762 if (TLI.isTypeLegal(InWidenVT)) { 1763 // Because the result and the input are different vector types, widening 1764 // the result could create a legal type but widening the input might make 1765 // it an illegal type that might lead to repeatedly splitting the input 1766 // and then widening it. To avoid this, we widen the input only if 1767 // it results in a legal type. 1768 if (WidenNumElts % InVTNumElts == 0) { 1769 // Widen the input and call convert on the widened input vector. 1770 unsigned NumConcat = WidenNumElts/InVTNumElts; 1771 SmallVector<SDValue, 16> Ops(NumConcat); 1772 Ops[0] = InOp; 1773 SDValue UndefVal = DAG.getUNDEF(InVT); 1774 for (unsigned i = 1; i != NumConcat; ++i) 1775 Ops[i] = UndefVal; 1776 1777 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat); 1778 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp, 1779 SatOp, CvtCode); 1780 } 1781 1782 if (InVTNumElts % WidenNumElts == 0) { 1783 // Extract the input and convert the shorten input vector. 1784 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp, 1785 DAG.getIntPtrConstant(0)); 1786 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp, 1787 SatOp, CvtCode); 1788 } 1789 } 1790 1791 // Otherwise unroll into some nasty scalar code and rebuild the vector. 1792 SmallVector<SDValue, 16> Ops(WidenNumElts); 1793 EVT EltVT = WidenVT.getVectorElementType(); 1794 DTyOp = DAG.getValueType(EltVT); 1795 STyOp = DAG.getValueType(InEltVT); 1796 1797 unsigned MinElts = std::min(InVTNumElts, WidenNumElts); 1798 unsigned i; 1799 for (i=0; i < MinElts; ++i) { 1800 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp, 1801 DAG.getIntPtrConstant(i)); 1802 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp, 1803 SatOp, CvtCode); 1804 } 1805 1806 SDValue UndefVal = DAG.getUNDEF(EltVT); 1807 for (; i < WidenNumElts; ++i) 1808 Ops[i] = UndefVal; 1809 1810 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts); 1811} 1812 1813SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) { 1814 EVT VT = N->getValueType(0); 1815 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1816 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1817 SDValue InOp = N->getOperand(0); 1818 SDValue Idx = N->getOperand(1); 1819 DebugLoc dl = N->getDebugLoc(); 1820 1821 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector) 1822 InOp = GetWidenedVector(InOp); 1823 1824 EVT InVT = InOp.getValueType(); 1825 1826 // Check if we can just return the input vector after widening. 1827 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); 1828 if (IdxVal == 0 && InVT == WidenVT) 1829 return InOp; 1830 1831 // Check if we can extract from the vector. 1832 unsigned InNumElts = InVT.getVectorNumElements(); 1833 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts) 1834 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx); 1835 1836 // We could try widening the input to the right length but for now, extract 1837 // the original elements, fill the rest with undefs and build a vector. 1838 SmallVector<SDValue, 16> Ops(WidenNumElts); 1839 EVT EltVT = VT.getVectorElementType(); 1840 unsigned NumElts = VT.getVectorNumElements(); 1841 unsigned i; 1842 for (i=0; i < NumElts; ++i) 1843 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, 1844 DAG.getIntPtrConstant(IdxVal+i)); 1845 1846 SDValue UndefVal = DAG.getUNDEF(EltVT); 1847 for (; i < WidenNumElts; ++i) 1848 Ops[i] = UndefVal; 1849 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts); 1850} 1851 1852SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) { 1853 SDValue InOp = GetWidenedVector(N->getOperand(0)); 1854 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(), 1855 InOp.getValueType(), InOp, 1856 N->getOperand(1), N->getOperand(2)); 1857} 1858 1859SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) { 1860 LoadSDNode *LD = cast<LoadSDNode>(N); 1861 ISD::LoadExtType ExtType = LD->getExtensionType(); 1862 1863 SDValue Result; 1864 SmallVector<SDValue, 16> LdChain; // Chain for the series of load 1865 if (ExtType != ISD::NON_EXTLOAD) 1866 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType); 1867 else 1868 Result = GenWidenVectorLoads(LdChain, LD); 1869 1870 // If we generate a single load, we can use that for the chain. Otherwise, 1871 // build a factor node to remember the multiple loads are independent and 1872 // chain to that. 1873 SDValue NewChain; 1874 if (LdChain.size() == 1) 1875 NewChain = LdChain[0]; 1876 else 1877 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other, 1878 &LdChain[0], LdChain.size()); 1879 1880 // Modified the chain - switch anything that used the old chain to use 1881 // the new one. 1882 ReplaceValueWith(SDValue(N, 1), NewChain); 1883 1884 return Result; 1885} 1886 1887SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) { 1888 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1889 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(), 1890 WidenVT, N->getOperand(0)); 1891} 1892 1893SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) { 1894 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1895 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1896 1897 SDValue Cond1 = N->getOperand(0); 1898 EVT CondVT = Cond1.getValueType(); 1899 if (CondVT.isVector()) { 1900 EVT CondEltVT = CondVT.getVectorElementType(); 1901 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(), 1902 CondEltVT, WidenNumElts); 1903 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector) 1904 Cond1 = GetWidenedVector(Cond1); 1905 1906 if (Cond1.getValueType() != CondWidenVT) 1907 Cond1 = ModifyToType(Cond1, CondWidenVT); 1908 } 1909 1910 SDValue InOp1 = GetWidenedVector(N->getOperand(1)); 1911 SDValue InOp2 = GetWidenedVector(N->getOperand(2)); 1912 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT); 1913 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), 1914 WidenVT, Cond1, InOp1, InOp2); 1915} 1916 1917SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) { 1918 SDValue InOp1 = GetWidenedVector(N->getOperand(2)); 1919 SDValue InOp2 = GetWidenedVector(N->getOperand(3)); 1920 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), 1921 InOp1.getValueType(), N->getOperand(0), 1922 N->getOperand(1), InOp1, InOp2, N->getOperand(4)); 1923} 1924 1925SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) { 1926 assert(N->getValueType(0).isVector() == 1927 N->getOperand(0).getValueType().isVector() && 1928 "Scalar/Vector type mismatch"); 1929 if (N->getValueType(0).isVector()) return WidenVecRes_VSETCC(N); 1930 1931 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1932 SDValue InOp1 = GetWidenedVector(N->getOperand(0)); 1933 SDValue InOp2 = GetWidenedVector(N->getOperand(1)); 1934 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT, 1935 InOp1, InOp2, N->getOperand(2)); 1936} 1937 1938SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) { 1939 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1940 return DAG.getUNDEF(WidenVT); 1941} 1942 1943SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) { 1944 EVT VT = N->getValueType(0); 1945 DebugLoc dl = N->getDebugLoc(); 1946 1947 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1948 unsigned NumElts = VT.getVectorNumElements(); 1949 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1950 1951 SDValue InOp1 = GetWidenedVector(N->getOperand(0)); 1952 SDValue InOp2 = GetWidenedVector(N->getOperand(1)); 1953 1954 // Adjust mask based on new input vector length. 1955 SmallVector<int, 16> NewMask; 1956 for (unsigned i = 0; i != NumElts; ++i) { 1957 int Idx = N->getMaskElt(i); 1958 if (Idx < (int)NumElts) 1959 NewMask.push_back(Idx); 1960 else 1961 NewMask.push_back(Idx - NumElts + WidenNumElts); 1962 } 1963 for (unsigned i = NumElts; i != WidenNumElts; ++i) 1964 NewMask.push_back(-1); 1965 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]); 1966} 1967 1968SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) { 1969 assert(N->getValueType(0).isVector() && 1970 N->getOperand(0).getValueType().isVector() && 1971 "Operands must be vectors"); 1972 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1973 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 1974 1975 SDValue InOp1 = N->getOperand(0); 1976 EVT InVT = InOp1.getValueType(); 1977 assert(InVT.isVector() && "can not widen non vector type"); 1978 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(), 1979 InVT.getVectorElementType(), WidenNumElts); 1980 InOp1 = GetWidenedVector(InOp1); 1981 SDValue InOp2 = GetWidenedVector(N->getOperand(1)); 1982 1983 // Assume that the input and output will be widen appropriately. If not, 1984 // we will have to unroll it at some point. 1985 assert(InOp1.getValueType() == WidenInVT && 1986 InOp2.getValueType() == WidenInVT && 1987 "Input not widened to expected type!"); 1988 (void)WidenInVT; 1989 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), 1990 WidenVT, InOp1, InOp2, N->getOperand(2)); 1991} 1992 1993 1994//===----------------------------------------------------------------------===// 1995// Widen Vector Operand 1996//===----------------------------------------------------------------------===// 1997bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) { 1998 DEBUG(dbgs() << "Widen node operand " << ResNo << ": "; 1999 N->dump(&DAG); 2000 dbgs() << "\n"); 2001 SDValue Res = SDValue(); 2002 2003 switch (N->getOpcode()) { 2004 default: 2005#ifndef NDEBUG 2006 dbgs() << "WidenVectorOperand op #" << ResNo << ": "; 2007 N->dump(&DAG); 2008 dbgs() << "\n"; 2009#endif 2010 llvm_unreachable("Do not know how to widen this operator's operand!"); 2011 2012 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break; 2013 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break; 2014 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break; 2015 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break; 2016 case ISD::STORE: Res = WidenVecOp_STORE(N); break; 2017 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break; 2018 2019 case ISD::FP_EXTEND: 2020 case ISD::FP_TO_SINT: 2021 case ISD::FP_TO_UINT: 2022 case ISD::SINT_TO_FP: 2023 case ISD::UINT_TO_FP: 2024 case ISD::TRUNCATE: 2025 case ISD::SIGN_EXTEND: 2026 case ISD::ZERO_EXTEND: 2027 case ISD::ANY_EXTEND: 2028 Res = WidenVecOp_Convert(N); 2029 break; 2030 } 2031 2032 // If Res is null, the sub-method took care of registering the result. 2033 if (!Res.getNode()) return false; 2034 2035 // If the result is N, the sub-method updated N in place. Tell the legalizer 2036 // core about this. 2037 if (Res.getNode() == N) 2038 return true; 2039 2040 2041 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && 2042 "Invalid operand expansion"); 2043 2044 ReplaceValueWith(SDValue(N, 0), Res); 2045 return false; 2046} 2047 2048SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) { 2049 // Since the result is legal and the input is illegal, it is unlikely 2050 // that we can fix the input to a legal type so unroll the convert 2051 // into some scalar code and create a nasty build vector. 2052 EVT VT = N->getValueType(0); 2053 EVT EltVT = VT.getVectorElementType(); 2054 DebugLoc dl = N->getDebugLoc(); 2055 unsigned NumElts = VT.getVectorNumElements(); 2056 SDValue InOp = N->getOperand(0); 2057 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector) 2058 InOp = GetWidenedVector(InOp); 2059 EVT InVT = InOp.getValueType(); 2060 EVT InEltVT = InVT.getVectorElementType(); 2061 2062 unsigned Opcode = N->getOpcode(); 2063 SmallVector<SDValue, 16> Ops(NumElts); 2064 for (unsigned i=0; i < NumElts; ++i) 2065 Ops[i] = DAG.getNode(Opcode, dl, EltVT, 2066 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp, 2067 DAG.getIntPtrConstant(i))); 2068 2069 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts); 2070} 2071 2072SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) { 2073 EVT VT = N->getValueType(0); 2074 SDValue InOp = GetWidenedVector(N->getOperand(0)); 2075 EVT InWidenVT = InOp.getValueType(); 2076 DebugLoc dl = N->getDebugLoc(); 2077 2078 // Check if we can convert between two legal vector types and extract. 2079 unsigned InWidenSize = InWidenVT.getSizeInBits(); 2080 unsigned Size = VT.getSizeInBits(); 2081 // x86mmx is not an acceptable vector element type, so don't try. 2082 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) { 2083 unsigned NewNumElts = InWidenSize / Size; 2084 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts); 2085 if (TLI.isTypeLegal(NewVT)) { 2086 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp); 2087 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp, 2088 DAG.getIntPtrConstant(0)); 2089 } 2090 } 2091 2092 return CreateStackStoreLoad(InOp, VT); 2093} 2094 2095SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) { 2096 // If the input vector is not legal, it is likely that we will not find a 2097 // legal vector of the same size. Replace the concatenate vector with a 2098 // nasty build vector. 2099 EVT VT = N->getValueType(0); 2100 EVT EltVT = VT.getVectorElementType(); 2101 DebugLoc dl = N->getDebugLoc(); 2102 unsigned NumElts = VT.getVectorNumElements(); 2103 SmallVector<SDValue, 16> Ops(NumElts); 2104 2105 EVT InVT = N->getOperand(0).getValueType(); 2106 unsigned NumInElts = InVT.getVectorNumElements(); 2107 2108 unsigned Idx = 0; 2109 unsigned NumOperands = N->getNumOperands(); 2110 for (unsigned i=0; i < NumOperands; ++i) { 2111 SDValue InOp = N->getOperand(i); 2112 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector) 2113 InOp = GetWidenedVector(InOp); 2114 for (unsigned j=0; j < NumInElts; ++j) 2115 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, 2116 DAG.getIntPtrConstant(j)); 2117 } 2118 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts); 2119} 2120 2121SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) { 2122 SDValue InOp = GetWidenedVector(N->getOperand(0)); 2123 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(), 2124 N->getValueType(0), InOp, N->getOperand(1)); 2125} 2126 2127SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) { 2128 SDValue InOp = GetWidenedVector(N->getOperand(0)); 2129 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), 2130 N->getValueType(0), InOp, N->getOperand(1)); 2131} 2132 2133SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) { 2134 // We have to widen the value but we want only to store the original 2135 // vector type. 2136 StoreSDNode *ST = cast<StoreSDNode>(N); 2137 2138 SmallVector<SDValue, 16> StChain; 2139 if (ST->isTruncatingStore()) 2140 GenWidenVectorTruncStores(StChain, ST); 2141 else 2142 GenWidenVectorStores(StChain, ST); 2143 2144 if (StChain.size() == 1) 2145 return StChain[0]; 2146 else 2147 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(), 2148 MVT::Other,&StChain[0],StChain.size()); 2149} 2150 2151SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) { 2152 SDValue InOp0 = GetWidenedVector(N->getOperand(0)); 2153 SDValue InOp1 = GetWidenedVector(N->getOperand(1)); 2154 DebugLoc dl = N->getDebugLoc(); 2155 2156 // WARNING: In this code we widen the compare instruction with garbage. 2157 // This garbage may contain denormal floats which may be slow. Is this a real 2158 // concern ? Should we zero the unused lanes if this is a float compare ? 2159 2160 // Get a new SETCC node to compare the newly widened operands. 2161 // Only some of the compared elements are legal. 2162 EVT SVT = TLI.getSetCCResultType(InOp0.getValueType()); 2163 SDValue WideSETCC = DAG.getNode(ISD::SETCC, N->getDebugLoc(), 2164 SVT, InOp0, InOp1, N->getOperand(2)); 2165 2166 // Extract the needed results from the result vector. 2167 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), 2168 SVT.getVectorElementType(), 2169 N->getValueType(0).getVectorNumElements()); 2170 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, 2171 ResVT, WideSETCC, DAG.getIntPtrConstant(0)); 2172 2173 return PromoteTargetBoolean(CC, N->getValueType(0)); 2174} 2175 2176 2177//===----------------------------------------------------------------------===// 2178// Vector Widening Utilities 2179//===----------------------------------------------------------------------===// 2180 2181// Utility function to find the type to chop up a widen vector for load/store 2182// TLI: Target lowering used to determine legal types. 2183// Width: Width left need to load/store. 2184// WidenVT: The widen vector type to load to/store from 2185// Align: If 0, don't allow use of a wider type 2186// WidenEx: If Align is not 0, the amount additional we can load/store from. 2187 2188static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI, 2189 unsigned Width, EVT WidenVT, 2190 unsigned Align = 0, unsigned WidenEx = 0) { 2191 EVT WidenEltVT = WidenVT.getVectorElementType(); 2192 unsigned WidenWidth = WidenVT.getSizeInBits(); 2193 unsigned WidenEltWidth = WidenEltVT.getSizeInBits(); 2194 unsigned AlignInBits = Align*8; 2195 2196 // If we have one element to load/store, return it. 2197 EVT RetVT = WidenEltVT; 2198 if (Width == WidenEltWidth) 2199 return RetVT; 2200 2201 // See if there is larger legal integer than the element type to load/store 2202 unsigned VT; 2203 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE; 2204 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) { 2205 EVT MemVT((MVT::SimpleValueType) VT); 2206 unsigned MemVTWidth = MemVT.getSizeInBits(); 2207 if (MemVT.getSizeInBits() <= WidenEltWidth) 2208 break; 2209 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 && 2210 isPowerOf2_32(WidenWidth / MemVTWidth) && 2211 (MemVTWidth <= Width || 2212 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) { 2213 RetVT = MemVT; 2214 break; 2215 } 2216 } 2217 2218 // See if there is a larger vector type to load/store that has the same vector 2219 // element type and is evenly divisible with the WidenVT. 2220 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE; 2221 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) { 2222 EVT MemVT = (MVT::SimpleValueType) VT; 2223 unsigned MemVTWidth = MemVT.getSizeInBits(); 2224 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() && 2225 (WidenWidth % MemVTWidth) == 0 && 2226 isPowerOf2_32(WidenWidth / MemVTWidth) && 2227 (MemVTWidth <= Width || 2228 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) { 2229 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT) 2230 return MemVT; 2231 } 2232 } 2233 2234 return RetVT; 2235} 2236 2237// Builds a vector type from scalar loads 2238// VecTy: Resulting Vector type 2239// LDOps: Load operators to build a vector type 2240// [Start,End) the list of loads to use. 2241static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy, 2242 SmallVector<SDValue, 16>& LdOps, 2243 unsigned Start, unsigned End) { 2244 DebugLoc dl = LdOps[Start].getDebugLoc(); 2245 EVT LdTy = LdOps[Start].getValueType(); 2246 unsigned Width = VecTy.getSizeInBits(); 2247 unsigned NumElts = Width / LdTy.getSizeInBits(); 2248 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts); 2249 2250 unsigned Idx = 1; 2251 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]); 2252 2253 for (unsigned i = Start + 1; i != End; ++i) { 2254 EVT NewLdTy = LdOps[i].getValueType(); 2255 if (NewLdTy != LdTy) { 2256 NumElts = Width / NewLdTy.getSizeInBits(); 2257 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts); 2258 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp); 2259 // Readjust position and vector position based on new load type 2260 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits(); 2261 LdTy = NewLdTy; 2262 } 2263 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i], 2264 DAG.getIntPtrConstant(Idx++)); 2265 } 2266 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp); 2267} 2268 2269SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16> &LdChain, 2270 LoadSDNode *LD) { 2271 // The strategy assumes that we can efficiently load powers of two widths. 2272 // The routines chops the vector into the largest vector loads with the same 2273 // element type or scalar loads and then recombines it to the widen vector 2274 // type. 2275 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0)); 2276 unsigned WidenWidth = WidenVT.getSizeInBits(); 2277 EVT LdVT = LD->getMemoryVT(); 2278 DebugLoc dl = LD->getDebugLoc(); 2279 assert(LdVT.isVector() && WidenVT.isVector()); 2280 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType()); 2281 2282 // Load information 2283 SDValue Chain = LD->getChain(); 2284 SDValue BasePtr = LD->getBasePtr(); 2285 unsigned Align = LD->getAlignment(); 2286 bool isVolatile = LD->isVolatile(); 2287 bool isNonTemporal = LD->isNonTemporal(); 2288 bool isInvariant = LD->isInvariant(); 2289 2290 int LdWidth = LdVT.getSizeInBits(); 2291 int WidthDiff = WidenWidth - LdWidth; // Difference 2292 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads 2293 2294 // Find the vector type that can load from. 2295 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff); 2296 int NewVTWidth = NewVT.getSizeInBits(); 2297 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(), 2298 isVolatile, isNonTemporal, isInvariant, Align); 2299 LdChain.push_back(LdOp.getValue(1)); 2300 2301 // Check if we can load the element with one instruction 2302 if (LdWidth <= NewVTWidth) { 2303 if (!NewVT.isVector()) { 2304 unsigned NumElts = WidenWidth / NewVTWidth; 2305 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts); 2306 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp); 2307 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp); 2308 } 2309 if (NewVT == WidenVT) 2310 return LdOp; 2311 2312 assert(WidenWidth % NewVTWidth == 0); 2313 unsigned NumConcat = WidenWidth / NewVTWidth; 2314 SmallVector<SDValue, 16> ConcatOps(NumConcat); 2315 SDValue UndefVal = DAG.getUNDEF(NewVT); 2316 ConcatOps[0] = LdOp; 2317 for (unsigned i = 1; i != NumConcat; ++i) 2318 ConcatOps[i] = UndefVal; 2319 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], 2320 NumConcat); 2321 } 2322 2323 // Load vector by using multiple loads from largest vector to scalar 2324 SmallVector<SDValue, 16> LdOps; 2325 LdOps.push_back(LdOp); 2326 2327 LdWidth -= NewVTWidth; 2328 unsigned Offset = 0; 2329 2330 while (LdWidth > 0) { 2331 unsigned Increment = NewVTWidth / 8; 2332 Offset += Increment; 2333 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, 2334 DAG.getIntPtrConstant(Increment)); 2335 2336 SDValue L; 2337 if (LdWidth < NewVTWidth) { 2338 // Our current type we are using is too large, find a better size 2339 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff); 2340 NewVTWidth = NewVT.getSizeInBits(); 2341 L = DAG.getLoad(NewVT, dl, Chain, BasePtr, 2342 LD->getPointerInfo().getWithOffset(Offset), 2343 isVolatile, 2344 isNonTemporal, isInvariant, 2345 MinAlign(Align, Increment)); 2346 LdChain.push_back(L.getValue(1)); 2347 if (L->getValueType(0).isVector()) { 2348 SmallVector<SDValue, 16> Loads; 2349 Loads.push_back(L); 2350 unsigned size = L->getValueSizeInBits(0); 2351 while (size < LdOp->getValueSizeInBits(0)) { 2352 Loads.push_back(DAG.getUNDEF(L->getValueType(0))); 2353 size += L->getValueSizeInBits(0); 2354 } 2355 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0), 2356 &Loads[0], Loads.size()); 2357 } 2358 } else { 2359 L = DAG.getLoad(NewVT, dl, Chain, BasePtr, 2360 LD->getPointerInfo().getWithOffset(Offset), isVolatile, 2361 isNonTemporal, isInvariant, MinAlign(Align, Increment)); 2362 LdChain.push_back(L.getValue(1)); 2363 } 2364 2365 LdOps.push_back(L); 2366 2367 2368 LdWidth -= NewVTWidth; 2369 } 2370 2371 // Build the vector from the loads operations 2372 unsigned End = LdOps.size(); 2373 if (!LdOps[0].getValueType().isVector()) 2374 // All the loads are scalar loads. 2375 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End); 2376 2377 // If the load contains vectors, build the vector using concat vector. 2378 // All of the vectors used to loads are power of 2 and the scalars load 2379 // can be combined to make a power of 2 vector. 2380 SmallVector<SDValue, 16> ConcatOps(End); 2381 int i = End - 1; 2382 int Idx = End; 2383 EVT LdTy = LdOps[i].getValueType(); 2384 // First combine the scalar loads to a vector 2385 if (!LdTy.isVector()) { 2386 for (--i; i >= 0; --i) { 2387 LdTy = LdOps[i].getValueType(); 2388 if (LdTy.isVector()) 2389 break; 2390 } 2391 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End); 2392 } 2393 ConcatOps[--Idx] = LdOps[i]; 2394 for (--i; i >= 0; --i) { 2395 EVT NewLdTy = LdOps[i].getValueType(); 2396 if (NewLdTy != LdTy) { 2397 // Create a larger vector 2398 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy, 2399 &ConcatOps[Idx], End - Idx); 2400 Idx = End - 1; 2401 LdTy = NewLdTy; 2402 } 2403 ConcatOps[--Idx] = LdOps[i]; 2404 } 2405 2406 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx)) 2407 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, 2408 &ConcatOps[Idx], End - Idx); 2409 2410 // We need to fill the rest with undefs to build the vector 2411 unsigned NumOps = WidenWidth / LdTy.getSizeInBits(); 2412 SmallVector<SDValue, 16> WidenOps(NumOps); 2413 SDValue UndefVal = DAG.getUNDEF(LdTy); 2414 { 2415 unsigned i = 0; 2416 for (; i != End-Idx; ++i) 2417 WidenOps[i] = ConcatOps[Idx+i]; 2418 for (; i != NumOps; ++i) 2419 WidenOps[i] = UndefVal; 2420 } 2421 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps); 2422} 2423 2424SDValue 2425DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain, 2426 LoadSDNode * LD, 2427 ISD::LoadExtType ExtType) { 2428 // For extension loads, it may not be more efficient to chop up the vector 2429 // and then extended it. Instead, we unroll the load and build a new vector. 2430 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0)); 2431 EVT LdVT = LD->getMemoryVT(); 2432 DebugLoc dl = LD->getDebugLoc(); 2433 assert(LdVT.isVector() && WidenVT.isVector()); 2434 2435 // Load information 2436 SDValue Chain = LD->getChain(); 2437 SDValue BasePtr = LD->getBasePtr(); 2438 unsigned Align = LD->getAlignment(); 2439 bool isVolatile = LD->isVolatile(); 2440 bool isNonTemporal = LD->isNonTemporal(); 2441 2442 EVT EltVT = WidenVT.getVectorElementType(); 2443 EVT LdEltVT = LdVT.getVectorElementType(); 2444 unsigned NumElts = LdVT.getVectorNumElements(); 2445 2446 // Load each element and widen 2447 unsigned WidenNumElts = WidenVT.getVectorNumElements(); 2448 SmallVector<SDValue, 16> Ops(WidenNumElts); 2449 unsigned Increment = LdEltVT.getSizeInBits() / 8; 2450 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, 2451 LD->getPointerInfo(), 2452 LdEltVT, isVolatile, isNonTemporal, Align); 2453 LdChain.push_back(Ops[0].getValue(1)); 2454 unsigned i = 0, Offset = Increment; 2455 for (i=1; i < NumElts; ++i, Offset += Increment) { 2456 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), 2457 BasePtr, DAG.getIntPtrConstant(Offset)); 2458 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr, 2459 LD->getPointerInfo().getWithOffset(Offset), LdEltVT, 2460 isVolatile, isNonTemporal, Align); 2461 LdChain.push_back(Ops[i].getValue(1)); 2462 } 2463 2464 // Fill the rest with undefs 2465 SDValue UndefVal = DAG.getUNDEF(EltVT); 2466 for (; i != WidenNumElts; ++i) 2467 Ops[i] = UndefVal; 2468 2469 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size()); 2470} 2471 2472 2473void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain, 2474 StoreSDNode *ST) { 2475 // The strategy assumes that we can efficiently store powers of two widths. 2476 // The routines chops the vector into the largest vector stores with the same 2477 // element type or scalar stores. 2478 SDValue Chain = ST->getChain(); 2479 SDValue BasePtr = ST->getBasePtr(); 2480 unsigned Align = ST->getAlignment(); 2481 bool isVolatile = ST->isVolatile(); 2482 bool isNonTemporal = ST->isNonTemporal(); 2483 SDValue ValOp = GetWidenedVector(ST->getValue()); 2484 DebugLoc dl = ST->getDebugLoc(); 2485 2486 EVT StVT = ST->getMemoryVT(); 2487 unsigned StWidth = StVT.getSizeInBits(); 2488 EVT ValVT = ValOp.getValueType(); 2489 unsigned ValWidth = ValVT.getSizeInBits(); 2490 EVT ValEltVT = ValVT.getVectorElementType(); 2491 unsigned ValEltWidth = ValEltVT.getSizeInBits(); 2492 assert(StVT.getVectorElementType() == ValEltVT); 2493 2494 int Idx = 0; // current index to store 2495 unsigned Offset = 0; // offset from base to store 2496 while (StWidth != 0) { 2497 // Find the largest vector type we can store with 2498 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT); 2499 unsigned NewVTWidth = NewVT.getSizeInBits(); 2500 unsigned Increment = NewVTWidth / 8; 2501 if (NewVT.isVector()) { 2502 unsigned NumVTElts = NewVT.getVectorNumElements(); 2503 do { 2504 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp, 2505 DAG.getIntPtrConstant(Idx)); 2506 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, 2507 ST->getPointerInfo().getWithOffset(Offset), 2508 isVolatile, isNonTemporal, 2509 MinAlign(Align, Offset))); 2510 StWidth -= NewVTWidth; 2511 Offset += Increment; 2512 Idx += NumVTElts; 2513 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, 2514 DAG.getIntPtrConstant(Increment)); 2515 } while (StWidth != 0 && StWidth >= NewVTWidth); 2516 } else { 2517 // Cast the vector to the scalar type we can store 2518 unsigned NumElts = ValWidth / NewVTWidth; 2519 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts); 2520 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp); 2521 // Readjust index position based on new vector type 2522 Idx = Idx * ValEltWidth / NewVTWidth; 2523 do { 2524 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp, 2525 DAG.getIntPtrConstant(Idx++)); 2526 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, 2527 ST->getPointerInfo().getWithOffset(Offset), 2528 isVolatile, isNonTemporal, 2529 MinAlign(Align, Offset))); 2530 StWidth -= NewVTWidth; 2531 Offset += Increment; 2532 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, 2533 DAG.getIntPtrConstant(Increment)); 2534 } while (StWidth != 0 && StWidth >= NewVTWidth); 2535 // Restore index back to be relative to the original widen element type 2536 Idx = Idx * NewVTWidth / ValEltWidth; 2537 } 2538 } 2539} 2540 2541void 2542DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain, 2543 StoreSDNode *ST) { 2544 // For extension loads, it may not be more efficient to truncate the vector 2545 // and then store it. Instead, we extract each element and then store it. 2546 SDValue Chain = ST->getChain(); 2547 SDValue BasePtr = ST->getBasePtr(); 2548 unsigned Align = ST->getAlignment(); 2549 bool isVolatile = ST->isVolatile(); 2550 bool isNonTemporal = ST->isNonTemporal(); 2551 SDValue ValOp = GetWidenedVector(ST->getValue()); 2552 DebugLoc dl = ST->getDebugLoc(); 2553 2554 EVT StVT = ST->getMemoryVT(); 2555 EVT ValVT = ValOp.getValueType(); 2556 2557 // It must be true that we the widen vector type is bigger than where 2558 // we need to store. 2559 assert(StVT.isVector() && ValOp.getValueType().isVector()); 2560 assert(StVT.bitsLT(ValOp.getValueType())); 2561 2562 // For truncating stores, we can not play the tricks of chopping legal 2563 // vector types and bit cast it to the right type. Instead, we unroll 2564 // the store. 2565 EVT StEltVT = StVT.getVectorElementType(); 2566 EVT ValEltVT = ValVT.getVectorElementType(); 2567 unsigned Increment = ValEltVT.getSizeInBits() / 8; 2568 unsigned NumElts = StVT.getVectorNumElements(); 2569 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp, 2570 DAG.getIntPtrConstant(0)); 2571 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr, 2572 ST->getPointerInfo(), StEltVT, 2573 isVolatile, isNonTemporal, Align)); 2574 unsigned Offset = Increment; 2575 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) { 2576 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), 2577 BasePtr, DAG.getIntPtrConstant(Offset)); 2578 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp, 2579 DAG.getIntPtrConstant(0)); 2580 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr, 2581 ST->getPointerInfo().getWithOffset(Offset), 2582 StEltVT, isVolatile, isNonTemporal, 2583 MinAlign(Align, Offset))); 2584 } 2585} 2586 2587/// Modifies a vector input (widen or narrows) to a vector of NVT. The 2588/// input vector must have the same element type as NVT. 2589SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) { 2590 // Note that InOp might have been widened so it might already have 2591 // the right width or it might need be narrowed. 2592 EVT InVT = InOp.getValueType(); 2593 assert(InVT.getVectorElementType() == NVT.getVectorElementType() && 2594 "input and widen element type must match"); 2595 DebugLoc dl = InOp.getDebugLoc(); 2596 2597 // Check if InOp already has the right width. 2598 if (InVT == NVT) 2599 return InOp; 2600 2601 unsigned InNumElts = InVT.getVectorNumElements(); 2602 unsigned WidenNumElts = NVT.getVectorNumElements(); 2603 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) { 2604 unsigned NumConcat = WidenNumElts / InNumElts; 2605 SmallVector<SDValue, 16> Ops(NumConcat); 2606 SDValue UndefVal = DAG.getUNDEF(InVT); 2607 Ops[0] = InOp; 2608 for (unsigned i = 1; i != NumConcat; ++i) 2609 Ops[i] = UndefVal; 2610 2611 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat); 2612 } 2613 2614 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts) 2615 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp, 2616 DAG.getIntPtrConstant(0)); 2617 2618 // Fall back to extract and build. 2619 SmallVector<SDValue, 16> Ops(WidenNumElts); 2620 EVT EltVT = NVT.getVectorElementType(); 2621 unsigned MinNumElts = std::min(WidenNumElts, InNumElts); 2622 unsigned Idx; 2623 for (Idx = 0; Idx < MinNumElts; ++Idx) 2624 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, 2625 DAG.getIntPtrConstant(Idx)); 2626 2627 SDValue UndefVal = DAG.getUNDEF(EltVT); 2628 for ( ; Idx < WidenNumElts; ++Idx) 2629 Ops[Idx] = UndefVal; 2630 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts); 2631} 2632