ScheduleDAGSDNodes.h revision 4c727204271067f3dbf50bd23098b2df8e1cc47a
1//===---- ScheduleDAGSDNodes.h - SDNode Scheduling --------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the ScheduleDAGSDNodes class, which implements 11// scheduling for an SDNode-based dependency graph. 12// 13//===----------------------------------------------------------------------===// 14 15#ifndef SCHEDULEDAGSDNODES_H 16#define SCHEDULEDAGSDNODES_H 17 18#include "llvm/CodeGen/ScheduleDAG.h" 19#include "llvm/CodeGen/SelectionDAG.h" 20 21namespace llvm { 22 /// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs. 23 /// 24 /// Edges between SUnits are initially based on edges in the SelectionDAG, 25 /// and additional edges can be added by the schedulers as heuristics. 26 /// SDNodes such as Constants, Registers, and a few others that are not 27 /// interesting to schedulers are not allocated SUnits. 28 /// 29 /// SDNodes with MVT::Glue operands are grouped along with the flagged 30 /// nodes into a single SUnit so that they are scheduled together. 31 /// 32 /// SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output 33 /// edges. Physical register dependence information is not carried in 34 /// the DAG and must be handled explicitly by schedulers. 35 /// 36 class ScheduleDAGSDNodes : public ScheduleDAG { 37 public: 38 SelectionDAG *DAG; // DAG of the current basic block 39 const InstrItineraryData *InstrItins; 40 41 explicit ScheduleDAGSDNodes(MachineFunction &mf); 42 43 virtual ~ScheduleDAGSDNodes() {} 44 45 /// Run - perform scheduling. 46 /// 47 void Run(SelectionDAG *dag, MachineBasicBlock *bb, 48 MachineBasicBlock::iterator insertPos); 49 50 /// isPassiveNode - Return true if the node is a non-scheduled leaf. 51 /// 52 static bool isPassiveNode(SDNode *Node) { 53 if (isa<ConstantSDNode>(Node)) return true; 54 if (isa<ConstantFPSDNode>(Node)) return true; 55 if (isa<RegisterSDNode>(Node)) return true; 56 if (isa<RegisterMaskSDNode>(Node)) return true; 57 if (isa<GlobalAddressSDNode>(Node)) return true; 58 if (isa<BasicBlockSDNode>(Node)) return true; 59 if (isa<FrameIndexSDNode>(Node)) return true; 60 if (isa<ConstantPoolSDNode>(Node)) return true; 61 if (isa<JumpTableSDNode>(Node)) return true; 62 if (isa<ExternalSymbolSDNode>(Node)) return true; 63 if (isa<BlockAddressSDNode>(Node)) return true; 64 if (Node->getOpcode() == ISD::EntryToken || 65 isa<MDNodeSDNode>(Node)) return true; 66 return false; 67 } 68 69 /// NewSUnit - Creates a new SUnit and return a ptr to it. 70 /// 71 SUnit *NewSUnit(SDNode *N); 72 73 /// Clone - Creates a clone of the specified SUnit. It does not copy the 74 /// predecessors / successors info nor the temporary scheduling states. 75 /// 76 SUnit *Clone(SUnit *N); 77 78 /// BuildSchedGraph - Build the SUnit graph from the selection dag that we 79 /// are input. This SUnit graph is similar to the SelectionDAG, but 80 /// excludes nodes that aren't interesting to scheduling, and represents 81 /// flagged together nodes with a single SUnit. 82 void BuildSchedGraph(AliasAnalysis *AA); 83 84 /// InitVRegCycleFlag - Set isVRegCycle if this node's single use is 85 /// CopyToReg and its only active data operands are CopyFromReg within a 86 /// single block loop. 87 /// 88 void InitVRegCycleFlag(SUnit *SU); 89 90 /// InitNumRegDefsLeft - Determine the # of regs defined by this node. 91 /// 92 void InitNumRegDefsLeft(SUnit *SU); 93 94 /// ComputeLatency - Compute node latency. 95 /// 96 virtual void ComputeLatency(SUnit *SU); 97 98 /// ComputeOperandLatency - Override dependence edge latency using 99 /// operand use/def information 100 /// 101 virtual void ComputeOperandLatency(SUnit *Def, SUnit *Use, 102 SDep& dep) const { } 103 104 virtual void ComputeOperandLatency(SDNode *Def, SDNode *Use, 105 unsigned OpIdx, SDep& dep) const; 106 107 virtual MachineBasicBlock *EmitSchedule(); 108 109 /// Schedule - Order nodes according to selected style, filling 110 /// in the Sequence member. 111 /// 112 virtual void Schedule() = 0; 113 114 /// VerifyScheduledSequence - Verify that all SUnits are scheduled and 115 /// consistent with the Sequence of scheduled instructions. 116 void VerifyScheduledSequence(bool isBottomUp); 117 118 virtual void dumpNode(const SUnit *SU) const; 119 120 virtual std::string getGraphNodeLabel(const SUnit *SU) const; 121 122 virtual std::string getDAGName() const; 123 124 virtual void getCustomGraphFeatures(GraphWriter<ScheduleDAG*> &GW) const; 125 126 /// RegDefIter - In place iteration over the values defined by an 127 /// SUnit. This does not need copies of the iterator or any other STLisms. 128 /// The iterator creates itself, rather than being provided by the SchedDAG. 129 class RegDefIter { 130 const ScheduleDAGSDNodes *SchedDAG; 131 const SDNode *Node; 132 unsigned DefIdx; 133 unsigned NodeNumDefs; 134 EVT ValueType; 135 public: 136 RegDefIter(const SUnit *SU, const ScheduleDAGSDNodes *SD); 137 138 bool IsValid() const { return Node != NULL; } 139 140 EVT GetValue() const { 141 assert(IsValid() && "bad iterator"); 142 return ValueType; 143 } 144 145 const SDNode *GetNode() const { 146 return Node; 147 } 148 149 unsigned GetIdx() const { 150 return DefIdx-1; 151 } 152 153 void Advance(); 154 private: 155 void InitNodeNumDefs(); 156 }; 157 158 private: 159 /// ClusterNeighboringLoads - Cluster loads from "near" addresses into 160 /// combined SUnits. 161 void ClusterNeighboringLoads(SDNode *Node); 162 /// ClusterNodes - Cluster certain nodes which should be scheduled together. 163 /// 164 void ClusterNodes(); 165 166 /// BuildSchedUnits, AddSchedEdges - Helper functions for BuildSchedGraph. 167 void BuildSchedUnits(); 168 void AddSchedEdges(); 169 }; 170} 171 172#endif 173