SelectionDAG.cpp revision 1b747ad8a0694b86e8d98a8b9a05ddfe74ec0cd3
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetOptions.h" 31#include "llvm/Target/TargetInstrInfo.h" 32#include "llvm/Target/TargetMachine.h" 33#include "llvm/Support/CommandLine.h" 34#include "llvm/Support/ErrorHandling.h" 35#include "llvm/Support/ManagedStatic.h" 36#include "llvm/Support/MathExtras.h" 37#include "llvm/Support/raw_ostream.h" 38#include "llvm/System/Mutex.h" 39#include "llvm/ADT/SetVector.h" 40#include "llvm/ADT/SmallPtrSet.h" 41#include "llvm/ADT/SmallSet.h" 42#include "llvm/ADT/SmallVector.h" 43#include "llvm/ADT/StringExtras.h" 44#include <algorithm> 45#include <cmath> 46using namespace llvm; 47 48/// makeVTList - Return an instance of the SDVTList struct initialized with the 49/// specified members. 50static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 51 SDVTList Res = {VTs, NumVTs}; 52 return Res; 53} 54 55static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 56 switch (VT.getSimpleVT()) { 57 default: llvm_unreachable("Unknown FP format"); 58 case EVT::f32: return &APFloat::IEEEsingle; 59 case EVT::f64: return &APFloat::IEEEdouble; 60 case EVT::f80: return &APFloat::x87DoubleExtended; 61 case EVT::f128: return &APFloat::IEEEquad; 62 case EVT::ppcf128: return &APFloat::PPCDoubleDouble; 63 } 64} 65 66SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 67 68//===----------------------------------------------------------------------===// 69// ConstantFPSDNode Class 70//===----------------------------------------------------------------------===// 71 72/// isExactlyValue - We don't rely on operator== working on double values, as 73/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 74/// As such, this method can be used to do an exact bit-for-bit comparison of 75/// two floating point values. 76bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 77 return getValueAPF().bitwiseIsEqual(V); 78} 79 80bool ConstantFPSDNode::isValueValidForType(EVT VT, 81 const APFloat& Val) { 82 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 83 84 // PPC long double cannot be converted to any other type. 85 if (VT == EVT::ppcf128 || 86 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 87 return false; 88 89 // convert modifies in place, so make a copy. 90 APFloat Val2 = APFloat(Val); 91 bool losesInfo; 92 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 93 &losesInfo); 94 return !losesInfo; 95} 96 97//===----------------------------------------------------------------------===// 98// ISD Namespace 99//===----------------------------------------------------------------------===// 100 101/// isBuildVectorAllOnes - Return true if the specified node is a 102/// BUILD_VECTOR where all of the elements are ~0 or undef. 103bool ISD::isBuildVectorAllOnes(const SDNode *N) { 104 // Look through a bit convert. 105 if (N->getOpcode() == ISD::BIT_CONVERT) 106 N = N->getOperand(0).getNode(); 107 108 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 109 110 unsigned i = 0, e = N->getNumOperands(); 111 112 // Skip over all of the undef values. 113 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 114 ++i; 115 116 // Do not accept an all-undef vector. 117 if (i == e) return false; 118 119 // Do not accept build_vectors that aren't all constants or which have non-~0 120 // elements. 121 SDValue NotZero = N->getOperand(i); 122 if (isa<ConstantSDNode>(NotZero)) { 123 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 124 return false; 125 } else if (isa<ConstantFPSDNode>(NotZero)) { 126 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 127 bitcastToAPInt().isAllOnesValue()) 128 return false; 129 } else 130 return false; 131 132 // Okay, we have at least one ~0 value, check to see if the rest match or are 133 // undefs. 134 for (++i; i != e; ++i) 135 if (N->getOperand(i) != NotZero && 136 N->getOperand(i).getOpcode() != ISD::UNDEF) 137 return false; 138 return true; 139} 140 141 142/// isBuildVectorAllZeros - Return true if the specified node is a 143/// BUILD_VECTOR where all of the elements are 0 or undef. 144bool ISD::isBuildVectorAllZeros(const SDNode *N) { 145 // Look through a bit convert. 146 if (N->getOpcode() == ISD::BIT_CONVERT) 147 N = N->getOperand(0).getNode(); 148 149 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 150 151 unsigned i = 0, e = N->getNumOperands(); 152 153 // Skip over all of the undef values. 154 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 155 ++i; 156 157 // Do not accept an all-undef vector. 158 if (i == e) return false; 159 160 // Do not accept build_vectors that aren't all constants or which have non-0 161 // elements. 162 SDValue Zero = N->getOperand(i); 163 if (isa<ConstantSDNode>(Zero)) { 164 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 165 return false; 166 } else if (isa<ConstantFPSDNode>(Zero)) { 167 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 168 return false; 169 } else 170 return false; 171 172 // Okay, we have at least one 0 value, check to see if the rest match or are 173 // undefs. 174 for (++i; i != e; ++i) 175 if (N->getOperand(i) != Zero && 176 N->getOperand(i).getOpcode() != ISD::UNDEF) 177 return false; 178 return true; 179} 180 181/// isScalarToVector - Return true if the specified node is a 182/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 183/// element is not an undef. 184bool ISD::isScalarToVector(const SDNode *N) { 185 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 186 return true; 187 188 if (N->getOpcode() != ISD::BUILD_VECTOR) 189 return false; 190 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 191 return false; 192 unsigned NumElems = N->getNumOperands(); 193 for (unsigned i = 1; i < NumElems; ++i) { 194 SDValue V = N->getOperand(i); 195 if (V.getOpcode() != ISD::UNDEF) 196 return false; 197 } 198 return true; 199} 200 201 202/// isDebugLabel - Return true if the specified node represents a debug 203/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 204bool ISD::isDebugLabel(const SDNode *N) { 205 SDValue Zero; 206 if (N->getOpcode() == ISD::DBG_LABEL) 207 return true; 208 if (N->isMachineOpcode() && 209 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 210 return true; 211 return false; 212} 213 214/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 215/// when given the operation for (X op Y). 216ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 217 // To perform this operation, we just need to swap the L and G bits of the 218 // operation. 219 unsigned OldL = (Operation >> 2) & 1; 220 unsigned OldG = (Operation >> 1) & 1; 221 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 222 (OldL << 1) | // New G bit 223 (OldG << 2)); // New L bit. 224} 225 226/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 227/// 'op' is a valid SetCC operation. 228ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 229 unsigned Operation = Op; 230 if (isInteger) 231 Operation ^= 7; // Flip L, G, E bits, but not U. 232 else 233 Operation ^= 15; // Flip all of the condition bits. 234 235 if (Operation > ISD::SETTRUE2) 236 Operation &= ~8; // Don't let N and U bits get set. 237 238 return ISD::CondCode(Operation); 239} 240 241 242/// isSignedOp - For an integer comparison, return 1 if the comparison is a 243/// signed operation and 2 if the result is an unsigned comparison. Return zero 244/// if the operation does not depend on the sign of the input (setne and seteq). 245static int isSignedOp(ISD::CondCode Opcode) { 246 switch (Opcode) { 247 default: llvm_unreachable("Illegal integer setcc operation!"); 248 case ISD::SETEQ: 249 case ISD::SETNE: return 0; 250 case ISD::SETLT: 251 case ISD::SETLE: 252 case ISD::SETGT: 253 case ISD::SETGE: return 1; 254 case ISD::SETULT: 255 case ISD::SETULE: 256 case ISD::SETUGT: 257 case ISD::SETUGE: return 2; 258 } 259} 260 261/// getSetCCOrOperation - Return the result of a logical OR between different 262/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 263/// returns SETCC_INVALID if it is not possible to represent the resultant 264/// comparison. 265ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 266 bool isInteger) { 267 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 268 // Cannot fold a signed integer setcc with an unsigned integer setcc. 269 return ISD::SETCC_INVALID; 270 271 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 272 273 // If the N and U bits get set then the resultant comparison DOES suddenly 274 // care about orderedness, and is true when ordered. 275 if (Op > ISD::SETTRUE2) 276 Op &= ~16; // Clear the U bit if the N bit is set. 277 278 // Canonicalize illegal integer setcc's. 279 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 280 Op = ISD::SETNE; 281 282 return ISD::CondCode(Op); 283} 284 285/// getSetCCAndOperation - Return the result of a logical AND between different 286/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 287/// function returns zero if it is not possible to represent the resultant 288/// comparison. 289ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 290 bool isInteger) { 291 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 292 // Cannot fold a signed setcc with an unsigned setcc. 293 return ISD::SETCC_INVALID; 294 295 // Combine all of the condition bits. 296 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 297 298 // Canonicalize illegal integer setcc's. 299 if (isInteger) { 300 switch (Result) { 301 default: break; 302 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 303 case ISD::SETOEQ: // SETEQ & SETU[LG]E 304 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 305 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 306 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 307 } 308 } 309 310 return Result; 311} 312 313const TargetMachine &SelectionDAG::getTarget() const { 314 return MF->getTarget(); 315} 316 317//===----------------------------------------------------------------------===// 318// SDNode Profile Support 319//===----------------------------------------------------------------------===// 320 321/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 322/// 323static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 324 ID.AddInteger(OpC); 325} 326 327/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 328/// solely with their pointer. 329static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 330 ID.AddPointer(VTList.VTs); 331} 332 333/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 334/// 335static void AddNodeIDOperands(FoldingSetNodeID &ID, 336 const SDValue *Ops, unsigned NumOps) { 337 for (; NumOps; --NumOps, ++Ops) { 338 ID.AddPointer(Ops->getNode()); 339 ID.AddInteger(Ops->getResNo()); 340 } 341} 342 343/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 344/// 345static void AddNodeIDOperands(FoldingSetNodeID &ID, 346 const SDUse *Ops, unsigned NumOps) { 347 for (; NumOps; --NumOps, ++Ops) { 348 ID.AddPointer(Ops->getNode()); 349 ID.AddInteger(Ops->getResNo()); 350 } 351} 352 353static void AddNodeIDNode(FoldingSetNodeID &ID, 354 unsigned short OpC, SDVTList VTList, 355 const SDValue *OpList, unsigned N) { 356 AddNodeIDOpcode(ID, OpC); 357 AddNodeIDValueTypes(ID, VTList); 358 AddNodeIDOperands(ID, OpList, N); 359} 360 361/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 362/// the NodeID data. 363static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 364 switch (N->getOpcode()) { 365 case ISD::TargetExternalSymbol: 366 case ISD::ExternalSymbol: 367 llvm_unreachable("Should only be used on nodes with operands"); 368 default: break; // Normal nodes don't need extra info. 369 case ISD::TargetConstant: 370 case ISD::Constant: 371 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 372 break; 373 case ISD::TargetConstantFP: 374 case ISD::ConstantFP: { 375 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 376 break; 377 } 378 case ISD::TargetGlobalAddress: 379 case ISD::GlobalAddress: 380 case ISD::TargetGlobalTLSAddress: 381 case ISD::GlobalTLSAddress: { 382 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 383 ID.AddPointer(GA->getGlobal()); 384 ID.AddInteger(GA->getOffset()); 385 ID.AddInteger(GA->getTargetFlags()); 386 break; 387 } 388 case ISD::BasicBlock: 389 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 390 break; 391 case ISD::Register: 392 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 393 break; 394 case ISD::DBG_STOPPOINT: { 395 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 396 ID.AddInteger(DSP->getLine()); 397 ID.AddInteger(DSP->getColumn()); 398 ID.AddPointer(DSP->getCompileUnit()); 399 break; 400 } 401 case ISD::SRCVALUE: 402 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 403 break; 404 case ISD::MEMOPERAND: { 405 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 406 MO.Profile(ID); 407 break; 408 } 409 case ISD::FrameIndex: 410 case ISD::TargetFrameIndex: 411 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 412 break; 413 case ISD::JumpTable: 414 case ISD::TargetJumpTable: 415 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 416 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 417 break; 418 case ISD::ConstantPool: 419 case ISD::TargetConstantPool: { 420 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 421 ID.AddInteger(CP->getAlignment()); 422 ID.AddInteger(CP->getOffset()); 423 if (CP->isMachineConstantPoolEntry()) 424 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 425 else 426 ID.AddPointer(CP->getConstVal()); 427 ID.AddInteger(CP->getTargetFlags()); 428 break; 429 } 430 case ISD::LOAD: { 431 const LoadSDNode *LD = cast<LoadSDNode>(N); 432 ID.AddInteger(LD->getMemoryVT().getRawBits()); 433 ID.AddInteger(LD->getRawSubclassData()); 434 break; 435 } 436 case ISD::STORE: { 437 const StoreSDNode *ST = cast<StoreSDNode>(N); 438 ID.AddInteger(ST->getMemoryVT().getRawBits()); 439 ID.AddInteger(ST->getRawSubclassData()); 440 break; 441 } 442 case ISD::ATOMIC_CMP_SWAP: 443 case ISD::ATOMIC_SWAP: 444 case ISD::ATOMIC_LOAD_ADD: 445 case ISD::ATOMIC_LOAD_SUB: 446 case ISD::ATOMIC_LOAD_AND: 447 case ISD::ATOMIC_LOAD_OR: 448 case ISD::ATOMIC_LOAD_XOR: 449 case ISD::ATOMIC_LOAD_NAND: 450 case ISD::ATOMIC_LOAD_MIN: 451 case ISD::ATOMIC_LOAD_MAX: 452 case ISD::ATOMIC_LOAD_UMIN: 453 case ISD::ATOMIC_LOAD_UMAX: { 454 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 455 ID.AddInteger(AT->getMemoryVT().getRawBits()); 456 ID.AddInteger(AT->getRawSubclassData()); 457 break; 458 } 459 case ISD::VECTOR_SHUFFLE: { 460 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 461 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 462 i != e; ++i) 463 ID.AddInteger(SVN->getMaskElt(i)); 464 break; 465 } 466 } // end switch (N->getOpcode()) 467} 468 469/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 470/// data. 471static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 472 AddNodeIDOpcode(ID, N->getOpcode()); 473 // Add the return value info. 474 AddNodeIDValueTypes(ID, N->getVTList()); 475 // Add the operand info. 476 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 477 478 // Handle SDNode leafs with special info. 479 AddNodeIDCustom(ID, N); 480} 481 482/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 483/// the CSE map that carries alignment, volatility, indexing mode, and 484/// extension/truncation information. 485/// 486static inline unsigned 487encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, 488 bool isVolatile, unsigned Alignment) { 489 assert((ConvType & 3) == ConvType && 490 "ConvType may not require more than 2 bits!"); 491 assert((AM & 7) == AM && 492 "AM may not require more than 3 bits!"); 493 return ConvType | 494 (AM << 2) | 495 (isVolatile << 5) | 496 ((Log2_32(Alignment) + 1) << 6); 497} 498 499//===----------------------------------------------------------------------===// 500// SelectionDAG Class 501//===----------------------------------------------------------------------===// 502 503/// doNotCSE - Return true if CSE should not be performed for this node. 504static bool doNotCSE(SDNode *N) { 505 if (N->getValueType(0) == EVT::Flag) 506 return true; // Never CSE anything that produces a flag. 507 508 switch (N->getOpcode()) { 509 default: break; 510 case ISD::HANDLENODE: 511 case ISD::DBG_LABEL: 512 case ISD::DBG_STOPPOINT: 513 case ISD::EH_LABEL: 514 case ISD::DECLARE: 515 return true; // Never CSE these nodes. 516 } 517 518 // Check that remaining values produced are not flags. 519 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 520 if (N->getValueType(i) == EVT::Flag) 521 return true; // Never CSE anything that produces a flag. 522 523 return false; 524} 525 526/// RemoveDeadNodes - This method deletes all unreachable nodes in the 527/// SelectionDAG. 528void SelectionDAG::RemoveDeadNodes() { 529 // Create a dummy node (which is not added to allnodes), that adds a reference 530 // to the root node, preventing it from being deleted. 531 HandleSDNode Dummy(getRoot()); 532 533 SmallVector<SDNode*, 128> DeadNodes; 534 535 // Add all obviously-dead nodes to the DeadNodes worklist. 536 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 537 if (I->use_empty()) 538 DeadNodes.push_back(I); 539 540 RemoveDeadNodes(DeadNodes); 541 542 // If the root changed (e.g. it was a dead load, update the root). 543 setRoot(Dummy.getValue()); 544} 545 546/// RemoveDeadNodes - This method deletes the unreachable nodes in the 547/// given list, and any nodes that become unreachable as a result. 548void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 549 DAGUpdateListener *UpdateListener) { 550 551 // Process the worklist, deleting the nodes and adding their uses to the 552 // worklist. 553 while (!DeadNodes.empty()) { 554 SDNode *N = DeadNodes.pop_back_val(); 555 556 if (UpdateListener) 557 UpdateListener->NodeDeleted(N, 0); 558 559 // Take the node out of the appropriate CSE map. 560 RemoveNodeFromCSEMaps(N); 561 562 // Next, brutally remove the operand list. This is safe to do, as there are 563 // no cycles in the graph. 564 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 565 SDUse &Use = *I++; 566 SDNode *Operand = Use.getNode(); 567 Use.set(SDValue()); 568 569 // Now that we removed this operand, see if there are no uses of it left. 570 if (Operand->use_empty()) 571 DeadNodes.push_back(Operand); 572 } 573 574 DeallocateNode(N); 575 } 576} 577 578void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 579 SmallVector<SDNode*, 16> DeadNodes(1, N); 580 RemoveDeadNodes(DeadNodes, UpdateListener); 581} 582 583void SelectionDAG::DeleteNode(SDNode *N) { 584 // First take this out of the appropriate CSE map. 585 RemoveNodeFromCSEMaps(N); 586 587 // Finally, remove uses due to operands of this node, remove from the 588 // AllNodes list, and delete the node. 589 DeleteNodeNotInCSEMaps(N); 590} 591 592void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 593 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 594 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 595 596 // Drop all of the operands and decrement used node's use counts. 597 N->DropOperands(); 598 599 DeallocateNode(N); 600} 601 602void SelectionDAG::DeallocateNode(SDNode *N) { 603 if (N->OperandsNeedDelete) 604 delete[] N->OperandList; 605 606 // Set the opcode to DELETED_NODE to help catch bugs when node 607 // memory is reallocated. 608 N->NodeType = ISD::DELETED_NODE; 609 610 NodeAllocator.Deallocate(AllNodes.remove(N)); 611} 612 613/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 614/// correspond to it. This is useful when we're about to delete or repurpose 615/// the node. We don't want future request for structurally identical nodes 616/// to return N anymore. 617bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 618 bool Erased = false; 619 switch (N->getOpcode()) { 620 case ISD::EntryToken: 621 llvm_unreachable("EntryToken should not be in CSEMaps!"); 622 return false; 623 case ISD::HANDLENODE: return false; // noop. 624 case ISD::CONDCODE: 625 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 626 "Cond code doesn't exist!"); 627 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 628 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 629 break; 630 case ISD::ExternalSymbol: 631 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 632 break; 633 case ISD::TargetExternalSymbol: { 634 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 635 Erased = TargetExternalSymbols.erase( 636 std::pair<std::string,unsigned char>(ESN->getSymbol(), 637 ESN->getTargetFlags())); 638 break; 639 } 640 case ISD::VALUETYPE: { 641 EVT VT = cast<VTSDNode>(N)->getVT(); 642 if (VT.isExtended()) { 643 Erased = ExtendedValueTypeNodes.erase(VT); 644 } else { 645 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 646 ValueTypeNodes[VT.getSimpleVT()] = 0; 647 } 648 break; 649 } 650 default: 651 // Remove it from the CSE Map. 652 Erased = CSEMap.RemoveNode(N); 653 break; 654 } 655#ifndef NDEBUG 656 // Verify that the node was actually in one of the CSE maps, unless it has a 657 // flag result (which cannot be CSE'd) or is one of the special cases that are 658 // not subject to CSE. 659 if (!Erased && N->getValueType(N->getNumValues()-1) != EVT::Flag && 660 !N->isMachineOpcode() && !doNotCSE(N)) { 661 N->dump(this); 662 cerr << "\n"; 663 llvm_unreachable("Node is not in map!"); 664 } 665#endif 666 return Erased; 667} 668 669/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 670/// maps and modified in place. Add it back to the CSE maps, unless an identical 671/// node already exists, in which case transfer all its users to the existing 672/// node. This transfer can potentially trigger recursive merging. 673/// 674void 675SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 676 DAGUpdateListener *UpdateListener) { 677 // For node types that aren't CSE'd, just act as if no identical node 678 // already exists. 679 if (!doNotCSE(N)) { 680 SDNode *Existing = CSEMap.GetOrInsertNode(N); 681 if (Existing != N) { 682 // If there was already an existing matching node, use ReplaceAllUsesWith 683 // to replace the dead one with the existing one. This can cause 684 // recursive merging of other unrelated nodes down the line. 685 ReplaceAllUsesWith(N, Existing, UpdateListener); 686 687 // N is now dead. Inform the listener if it exists and delete it. 688 if (UpdateListener) 689 UpdateListener->NodeDeleted(N, Existing); 690 DeleteNodeNotInCSEMaps(N); 691 return; 692 } 693 } 694 695 // If the node doesn't already exist, we updated it. Inform a listener if 696 // it exists. 697 if (UpdateListener) 698 UpdateListener->NodeUpdated(N); 699} 700 701/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 702/// were replaced with those specified. If this node is never memoized, 703/// return null, otherwise return a pointer to the slot it would take. If a 704/// node already exists with these operands, the slot will be non-null. 705SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 706 void *&InsertPos) { 707 if (doNotCSE(N)) 708 return 0; 709 710 SDValue Ops[] = { Op }; 711 FoldingSetNodeID ID; 712 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 713 AddNodeIDCustom(ID, N); 714 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 715} 716 717/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 718/// were replaced with those specified. If this node is never memoized, 719/// return null, otherwise return a pointer to the slot it would take. If a 720/// node already exists with these operands, the slot will be non-null. 721SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 722 SDValue Op1, SDValue Op2, 723 void *&InsertPos) { 724 if (doNotCSE(N)) 725 return 0; 726 727 SDValue Ops[] = { Op1, Op2 }; 728 FoldingSetNodeID ID; 729 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 730 AddNodeIDCustom(ID, N); 731 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 732} 733 734 735/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 736/// were replaced with those specified. If this node is never memoized, 737/// return null, otherwise return a pointer to the slot it would take. If a 738/// node already exists with these operands, the slot will be non-null. 739SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 740 const SDValue *Ops,unsigned NumOps, 741 void *&InsertPos) { 742 if (doNotCSE(N)) 743 return 0; 744 745 FoldingSetNodeID ID; 746 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 747 AddNodeIDCustom(ID, N); 748 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 749} 750 751/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 752void SelectionDAG::VerifyNode(SDNode *N) { 753 switch (N->getOpcode()) { 754 default: 755 break; 756 case ISD::BUILD_PAIR: { 757 EVT VT = N->getValueType(0); 758 assert(N->getNumValues() == 1 && "Too many results!"); 759 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 760 "Wrong return type!"); 761 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 762 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 763 "Mismatched operand types!"); 764 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 765 "Wrong operand type!"); 766 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 767 "Wrong return type size"); 768 break; 769 } 770 case ISD::BUILD_VECTOR: { 771 assert(N->getNumValues() == 1 && "Too many results!"); 772 assert(N->getValueType(0).isVector() && "Wrong return type!"); 773 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 774 "Wrong number of operands!"); 775 EVT EltVT = N->getValueType(0).getVectorElementType(); 776 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 777 assert((I->getValueType() == EltVT || 778 (EltVT.isInteger() && I->getValueType().isInteger() && 779 EltVT.bitsLE(I->getValueType()))) && 780 "Wrong operand type!"); 781 break; 782 } 783 } 784} 785 786/// getEVTAlignment - Compute the default alignment value for the 787/// given type. 788/// 789unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 790 const Type *Ty = VT == EVT::iPTR ? 791 PointerType::get(Type::Int8Ty, 0) : 792 VT.getTypeForEVT(); 793 794 return TLI.getTargetData()->getABITypeAlignment(Ty); 795} 796 797// EntryNode could meaningfully have debug info if we can find it... 798SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 799 : TLI(tli), FLI(fli), DW(0), 800 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(), 801 getVTList(EVT::Other)), Root(getEntryNode()) { 802 AllNodes.push_back(&EntryNode); 803} 804 805void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 806 DwarfWriter *dw) { 807 MF = &mf; 808 MMI = mmi; 809 DW = dw; 810 Context = &mf.getFunction()->getContext(); 811} 812 813SelectionDAG::~SelectionDAG() { 814 allnodes_clear(); 815} 816 817void SelectionDAG::allnodes_clear() { 818 assert(&*AllNodes.begin() == &EntryNode); 819 AllNodes.remove(AllNodes.begin()); 820 while (!AllNodes.empty()) 821 DeallocateNode(AllNodes.begin()); 822} 823 824void SelectionDAG::clear() { 825 allnodes_clear(); 826 OperandAllocator.Reset(); 827 CSEMap.clear(); 828 829 ExtendedValueTypeNodes.clear(); 830 ExternalSymbols.clear(); 831 TargetExternalSymbols.clear(); 832 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 833 static_cast<CondCodeSDNode*>(0)); 834 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 835 static_cast<SDNode*>(0)); 836 837 EntryNode.UseList = 0; 838 AllNodes.push_back(&EntryNode); 839 Root = getEntryNode(); 840} 841 842SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 843 if (Op.getValueType() == VT) return Op; 844 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 845 VT.getSizeInBits()); 846 return getNode(ISD::AND, DL, Op.getValueType(), Op, 847 getConstant(Imm, Op.getValueType())); 848} 849 850/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 851/// 852SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 853 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 854 SDValue NegOne = 855 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 856 return getNode(ISD::XOR, DL, VT, Val, NegOne); 857} 858 859SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 860 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 861 assert((EltVT.getSizeInBits() >= 64 || 862 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 863 "getConstant with a uint64_t value that doesn't fit in the type!"); 864 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 865} 866 867SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 868 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 869} 870 871SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 872 assert(VT.isInteger() && "Cannot create FP integer constant!"); 873 874 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 875 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 876 "APInt size does not match type size!"); 877 878 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 879 FoldingSetNodeID ID; 880 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 881 ID.AddPointer(&Val); 882 void *IP = 0; 883 SDNode *N = NULL; 884 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 885 if (!VT.isVector()) 886 return SDValue(N, 0); 887 if (!N) { 888 N = NodeAllocator.Allocate<ConstantSDNode>(); 889 new (N) ConstantSDNode(isT, &Val, EltVT); 890 CSEMap.InsertNode(N, IP); 891 AllNodes.push_back(N); 892 } 893 894 SDValue Result(N, 0); 895 if (VT.isVector()) { 896 SmallVector<SDValue, 8> Ops; 897 Ops.assign(VT.getVectorNumElements(), Result); 898 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 899 VT, &Ops[0], Ops.size()); 900 } 901 return Result; 902} 903 904SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 905 return getConstant(Val, TLI.getPointerTy(), isTarget); 906} 907 908 909SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 910 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 911} 912 913SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 914 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 915 916 EVT EltVT = 917 VT.isVector() ? VT.getVectorElementType() : VT; 918 919 // Do the map lookup using the actual bit pattern for the floating point 920 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 921 // we don't have issues with SNANs. 922 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 923 FoldingSetNodeID ID; 924 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 925 ID.AddPointer(&V); 926 void *IP = 0; 927 SDNode *N = NULL; 928 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 929 if (!VT.isVector()) 930 return SDValue(N, 0); 931 if (!N) { 932 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 933 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 934 CSEMap.InsertNode(N, IP); 935 AllNodes.push_back(N); 936 } 937 938 SDValue Result(N, 0); 939 if (VT.isVector()) { 940 SmallVector<SDValue, 8> Ops; 941 Ops.assign(VT.getVectorNumElements(), Result); 942 // FIXME DebugLoc info might be appropriate here 943 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 944 VT, &Ops[0], Ops.size()); 945 } 946 return Result; 947} 948 949SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 950 EVT EltVT = 951 VT.isVector() ? VT.getVectorElementType() : VT; 952 if (EltVT==EVT::f32) 953 return getConstantFP(APFloat((float)Val), VT, isTarget); 954 else 955 return getConstantFP(APFloat(Val), VT, isTarget); 956} 957 958SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 959 EVT VT, int64_t Offset, 960 bool isTargetGA, 961 unsigned char TargetFlags) { 962 assert((TargetFlags == 0 || isTargetGA) && 963 "Cannot set target flags on target-independent globals"); 964 965 // Truncate (with sign-extension) the offset value to the pointer size. 966 EVT PTy = TLI.getPointerTy(); 967 unsigned BitWidth = PTy.getSizeInBits(); 968 if (BitWidth < 64) 969 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 970 971 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 972 if (!GVar) { 973 // If GV is an alias then use the aliasee for determining thread-localness. 974 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 975 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 976 } 977 978 unsigned Opc; 979 if (GVar && GVar->isThreadLocal()) 980 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 981 else 982 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 983 984 FoldingSetNodeID ID; 985 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 986 ID.AddPointer(GV); 987 ID.AddInteger(Offset); 988 ID.AddInteger(TargetFlags); 989 void *IP = 0; 990 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 991 return SDValue(E, 0); 992 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 993 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags); 994 CSEMap.InsertNode(N, IP); 995 AllNodes.push_back(N); 996 return SDValue(N, 0); 997} 998 999SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1000 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1001 FoldingSetNodeID ID; 1002 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1003 ID.AddInteger(FI); 1004 void *IP = 0; 1005 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1006 return SDValue(E, 0); 1007 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1008 new (N) FrameIndexSDNode(FI, VT, isTarget); 1009 CSEMap.InsertNode(N, IP); 1010 AllNodes.push_back(N); 1011 return SDValue(N, 0); 1012} 1013 1014SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1015 unsigned char TargetFlags) { 1016 assert((TargetFlags == 0 || isTarget) && 1017 "Cannot set target flags on target-independent jump tables"); 1018 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1019 FoldingSetNodeID ID; 1020 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1021 ID.AddInteger(JTI); 1022 ID.AddInteger(TargetFlags); 1023 void *IP = 0; 1024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1025 return SDValue(E, 0); 1026 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1027 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags); 1028 CSEMap.InsertNode(N, IP); 1029 AllNodes.push_back(N); 1030 return SDValue(N, 0); 1031} 1032 1033SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1034 unsigned Alignment, int Offset, 1035 bool isTarget, 1036 unsigned char TargetFlags) { 1037 assert((TargetFlags == 0 || isTarget) && 1038 "Cannot set target flags on target-independent globals"); 1039 if (Alignment == 0) 1040 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1041 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1042 FoldingSetNodeID ID; 1043 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1044 ID.AddInteger(Alignment); 1045 ID.AddInteger(Offset); 1046 ID.AddPointer(C); 1047 ID.AddInteger(TargetFlags); 1048 void *IP = 0; 1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1050 return SDValue(E, 0); 1051 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1052 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1053 CSEMap.InsertNode(N, IP); 1054 AllNodes.push_back(N); 1055 return SDValue(N, 0); 1056} 1057 1058 1059SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1060 unsigned Alignment, int Offset, 1061 bool isTarget, 1062 unsigned char TargetFlags) { 1063 assert((TargetFlags == 0 || isTarget) && 1064 "Cannot set target flags on target-independent globals"); 1065 if (Alignment == 0) 1066 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1067 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1068 FoldingSetNodeID ID; 1069 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1070 ID.AddInteger(Alignment); 1071 ID.AddInteger(Offset); 1072 C->AddSelectionDAGCSEId(ID); 1073 ID.AddInteger(TargetFlags); 1074 void *IP = 0; 1075 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1076 return SDValue(E, 0); 1077 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1078 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1079 CSEMap.InsertNode(N, IP); 1080 AllNodes.push_back(N); 1081 return SDValue(N, 0); 1082} 1083 1084SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1085 FoldingSetNodeID ID; 1086 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(EVT::Other), 0, 0); 1087 ID.AddPointer(MBB); 1088 void *IP = 0; 1089 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1090 return SDValue(E, 0); 1091 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1092 new (N) BasicBlockSDNode(MBB); 1093 CSEMap.InsertNode(N, IP); 1094 AllNodes.push_back(N); 1095 return SDValue(N, 0); 1096} 1097 1098SDValue SelectionDAG::getValueType(EVT VT) { 1099 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1100 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1101 1102 SDNode *&N = VT.isExtended() ? 1103 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1104 1105 if (N) return SDValue(N, 0); 1106 N = NodeAllocator.Allocate<VTSDNode>(); 1107 new (N) VTSDNode(VT); 1108 AllNodes.push_back(N); 1109 return SDValue(N, 0); 1110} 1111 1112SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1113 SDNode *&N = ExternalSymbols[Sym]; 1114 if (N) return SDValue(N, 0); 1115 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1116 new (N) ExternalSymbolSDNode(false, Sym, 0, VT); 1117 AllNodes.push_back(N); 1118 return SDValue(N, 0); 1119} 1120 1121SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1122 unsigned char TargetFlags) { 1123 SDNode *&N = 1124 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1125 TargetFlags)]; 1126 if (N) return SDValue(N, 0); 1127 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1128 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1129 AllNodes.push_back(N); 1130 return SDValue(N, 0); 1131} 1132 1133SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1134 if ((unsigned)Cond >= CondCodeNodes.size()) 1135 CondCodeNodes.resize(Cond+1); 1136 1137 if (CondCodeNodes[Cond] == 0) { 1138 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1139 new (N) CondCodeSDNode(Cond); 1140 CondCodeNodes[Cond] = N; 1141 AllNodes.push_back(N); 1142 } 1143 return SDValue(CondCodeNodes[Cond], 0); 1144} 1145 1146// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1147// the shuffle mask M that point at N1 to point at N2, and indices that point 1148// N2 to point at N1. 1149static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1150 std::swap(N1, N2); 1151 int NElts = M.size(); 1152 for (int i = 0; i != NElts; ++i) { 1153 if (M[i] >= NElts) 1154 M[i] -= NElts; 1155 else if (M[i] >= 0) 1156 M[i] += NElts; 1157 } 1158} 1159 1160SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1161 SDValue N2, const int *Mask) { 1162 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1163 assert(VT.isVector() && N1.getValueType().isVector() && 1164 "Vector Shuffle VTs must be a vectors"); 1165 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1166 && "Vector Shuffle VTs must have same element type"); 1167 1168 // Canonicalize shuffle undef, undef -> undef 1169 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1170 return getUNDEF(VT); 1171 1172 // Validate that all indices in Mask are within the range of the elements 1173 // input to the shuffle. 1174 unsigned NElts = VT.getVectorNumElements(); 1175 SmallVector<int, 8> MaskVec; 1176 for (unsigned i = 0; i != NElts; ++i) { 1177 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1178 MaskVec.push_back(Mask[i]); 1179 } 1180 1181 // Canonicalize shuffle v, v -> v, undef 1182 if (N1 == N2) { 1183 N2 = getUNDEF(VT); 1184 for (unsigned i = 0; i != NElts; ++i) 1185 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1186 } 1187 1188 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1189 if (N1.getOpcode() == ISD::UNDEF) 1190 commuteShuffle(N1, N2, MaskVec); 1191 1192 // Canonicalize all index into lhs, -> shuffle lhs, undef 1193 // Canonicalize all index into rhs, -> shuffle rhs, undef 1194 bool AllLHS = true, AllRHS = true; 1195 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1196 for (unsigned i = 0; i != NElts; ++i) { 1197 if (MaskVec[i] >= (int)NElts) { 1198 if (N2Undef) 1199 MaskVec[i] = -1; 1200 else 1201 AllLHS = false; 1202 } else if (MaskVec[i] >= 0) { 1203 AllRHS = false; 1204 } 1205 } 1206 if (AllLHS && AllRHS) 1207 return getUNDEF(VT); 1208 if (AllLHS && !N2Undef) 1209 N2 = getUNDEF(VT); 1210 if (AllRHS) { 1211 N1 = getUNDEF(VT); 1212 commuteShuffle(N1, N2, MaskVec); 1213 } 1214 1215 // If Identity shuffle, or all shuffle in to undef, return that node. 1216 bool AllUndef = true; 1217 bool Identity = true; 1218 for (unsigned i = 0; i != NElts; ++i) { 1219 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1220 if (MaskVec[i] >= 0) AllUndef = false; 1221 } 1222 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1223 return N1; 1224 if (AllUndef) 1225 return getUNDEF(VT); 1226 1227 FoldingSetNodeID ID; 1228 SDValue Ops[2] = { N1, N2 }; 1229 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1230 for (unsigned i = 0; i != NElts; ++i) 1231 ID.AddInteger(MaskVec[i]); 1232 1233 void* IP = 0; 1234 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1235 return SDValue(E, 0); 1236 1237 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1238 // SDNode doesn't have access to it. This memory will be "leaked" when 1239 // the node is deallocated, but recovered when the NodeAllocator is released. 1240 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1241 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1242 1243 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>(); 1244 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1245 CSEMap.InsertNode(N, IP); 1246 AllNodes.push_back(N); 1247 return SDValue(N, 0); 1248} 1249 1250SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1251 SDValue Val, SDValue DTy, 1252 SDValue STy, SDValue Rnd, SDValue Sat, 1253 ISD::CvtCode Code) { 1254 // If the src and dest types are the same and the conversion is between 1255 // integer types of the same sign or two floats, no conversion is necessary. 1256 if (DTy == STy && 1257 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1258 return Val; 1259 1260 FoldingSetNodeID ID; 1261 void* IP = 0; 1262 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1263 return SDValue(E, 0); 1264 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1265 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1266 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code); 1267 CSEMap.InsertNode(N, IP); 1268 AllNodes.push_back(N); 1269 return SDValue(N, 0); 1270} 1271 1272SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1273 FoldingSetNodeID ID; 1274 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1275 ID.AddInteger(RegNo); 1276 void *IP = 0; 1277 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1278 return SDValue(E, 0); 1279 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1280 new (N) RegisterSDNode(RegNo, VT); 1281 CSEMap.InsertNode(N, IP); 1282 AllNodes.push_back(N); 1283 return SDValue(N, 0); 1284} 1285 1286SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root, 1287 unsigned Line, unsigned Col, 1288 Value *CU) { 1289 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1290 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1291 N->setDebugLoc(DL); 1292 AllNodes.push_back(N); 1293 return SDValue(N, 0); 1294} 1295 1296SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1297 SDValue Root, 1298 unsigned LabelID) { 1299 FoldingSetNodeID ID; 1300 SDValue Ops[] = { Root }; 1301 AddNodeIDNode(ID, Opcode, getVTList(EVT::Other), &Ops[0], 1); 1302 ID.AddInteger(LabelID); 1303 void *IP = 0; 1304 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1305 return SDValue(E, 0); 1306 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1307 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1308 CSEMap.InsertNode(N, IP); 1309 AllNodes.push_back(N); 1310 return SDValue(N, 0); 1311} 1312 1313SDValue SelectionDAG::getSrcValue(const Value *V) { 1314 assert((!V || isa<PointerType>(V->getType())) && 1315 "SrcValue is not a pointer?"); 1316 1317 FoldingSetNodeID ID; 1318 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(EVT::Other), 0, 0); 1319 ID.AddPointer(V); 1320 1321 void *IP = 0; 1322 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1323 return SDValue(E, 0); 1324 1325 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1326 new (N) SrcValueSDNode(V); 1327 CSEMap.InsertNode(N, IP); 1328 AllNodes.push_back(N); 1329 return SDValue(N, 0); 1330} 1331 1332SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1333#ifndef NDEBUG 1334 const Value *v = MO.getValue(); 1335 assert((!v || isa<PointerType>(v->getType())) && 1336 "SrcValue is not a pointer?"); 1337#endif 1338 1339 FoldingSetNodeID ID; 1340 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(EVT::Other), 0, 0); 1341 MO.Profile(ID); 1342 1343 void *IP = 0; 1344 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1345 return SDValue(E, 0); 1346 1347 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1348 new (N) MemOperandSDNode(MO); 1349 CSEMap.InsertNode(N, IP); 1350 AllNodes.push_back(N); 1351 return SDValue(N, 0); 1352} 1353 1354/// getShiftAmountOperand - Return the specified value casted to 1355/// the target's desired shift amount type. 1356SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1357 EVT OpTy = Op.getValueType(); 1358 EVT ShTy = TLI.getShiftAmountTy(); 1359 if (OpTy == ShTy || OpTy.isVector()) return Op; 1360 1361 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1362 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1363} 1364 1365/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1366/// specified value type. 1367SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1368 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1369 unsigned ByteSize = VT.getStoreSizeInBits()/8; 1370 const Type *Ty = VT.getTypeForEVT(); 1371 unsigned StackAlign = 1372 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1373 1374 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1375 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1376} 1377 1378/// CreateStackTemporary - Create a stack temporary suitable for holding 1379/// either of the specified value types. 1380SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1381 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1382 VT2.getStoreSizeInBits())/8; 1383 const Type *Ty1 = VT1.getTypeForEVT(); 1384 const Type *Ty2 = VT2.getTypeForEVT(); 1385 const TargetData *TD = TLI.getTargetData(); 1386 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1387 TD->getPrefTypeAlignment(Ty2)); 1388 1389 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1390 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1391 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1392} 1393 1394SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1395 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1396 // These setcc operations always fold. 1397 switch (Cond) { 1398 default: break; 1399 case ISD::SETFALSE: 1400 case ISD::SETFALSE2: return getConstant(0, VT); 1401 case ISD::SETTRUE: 1402 case ISD::SETTRUE2: return getConstant(1, VT); 1403 1404 case ISD::SETOEQ: 1405 case ISD::SETOGT: 1406 case ISD::SETOGE: 1407 case ISD::SETOLT: 1408 case ISD::SETOLE: 1409 case ISD::SETONE: 1410 case ISD::SETO: 1411 case ISD::SETUO: 1412 case ISD::SETUEQ: 1413 case ISD::SETUNE: 1414 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1415 break; 1416 } 1417 1418 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1419 const APInt &C2 = N2C->getAPIntValue(); 1420 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1421 const APInt &C1 = N1C->getAPIntValue(); 1422 1423 switch (Cond) { 1424 default: llvm_unreachable("Unknown integer setcc!"); 1425 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1426 case ISD::SETNE: return getConstant(C1 != C2, VT); 1427 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1428 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1429 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1430 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1431 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1432 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1433 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1434 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1435 } 1436 } 1437 } 1438 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1439 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1440 // No compile time operations on this type yet. 1441 if (N1C->getValueType(0) == EVT::ppcf128) 1442 return SDValue(); 1443 1444 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1445 switch (Cond) { 1446 default: break; 1447 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1448 return getUNDEF(VT); 1449 // fall through 1450 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1451 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1452 return getUNDEF(VT); 1453 // fall through 1454 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1455 R==APFloat::cmpLessThan, VT); 1456 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1457 return getUNDEF(VT); 1458 // fall through 1459 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1460 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1461 return getUNDEF(VT); 1462 // fall through 1463 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1464 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1465 return getUNDEF(VT); 1466 // fall through 1467 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1468 R==APFloat::cmpEqual, VT); 1469 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1470 return getUNDEF(VT); 1471 // fall through 1472 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1473 R==APFloat::cmpEqual, VT); 1474 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1475 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1476 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1477 R==APFloat::cmpEqual, VT); 1478 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1479 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1480 R==APFloat::cmpLessThan, VT); 1481 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1482 R==APFloat::cmpUnordered, VT); 1483 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1484 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1485 } 1486 } else { 1487 // Ensure that the constant occurs on the RHS. 1488 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1489 } 1490 } 1491 1492 // Could not fold it. 1493 return SDValue(); 1494} 1495 1496/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1497/// use this predicate to simplify operations downstream. 1498bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1499 // This predicate is not safe for vector operations. 1500 if (Op.getValueType().isVector()) 1501 return false; 1502 1503 unsigned BitWidth = Op.getValueSizeInBits(); 1504 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1505} 1506 1507/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1508/// this predicate to simplify operations downstream. Mask is known to be zero 1509/// for bits that V cannot have. 1510bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1511 unsigned Depth) const { 1512 APInt KnownZero, KnownOne; 1513 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1514 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1515 return (KnownZero & Mask) == Mask; 1516} 1517 1518/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1519/// known to be either zero or one and return them in the KnownZero/KnownOne 1520/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1521/// processing. 1522void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1523 APInt &KnownZero, APInt &KnownOne, 1524 unsigned Depth) const { 1525 unsigned BitWidth = Mask.getBitWidth(); 1526 assert(BitWidth == Op.getValueType().getSizeInBits() && 1527 "Mask size mismatches value type size!"); 1528 1529 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1530 if (Depth == 6 || Mask == 0) 1531 return; // Limit search depth. 1532 1533 APInt KnownZero2, KnownOne2; 1534 1535 switch (Op.getOpcode()) { 1536 case ISD::Constant: 1537 // We know all of the bits for a constant! 1538 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1539 KnownZero = ~KnownOne & Mask; 1540 return; 1541 case ISD::AND: 1542 // If either the LHS or the RHS are Zero, the result is zero. 1543 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1544 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1545 KnownZero2, KnownOne2, Depth+1); 1546 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1547 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1548 1549 // Output known-1 bits are only known if set in both the LHS & RHS. 1550 KnownOne &= KnownOne2; 1551 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1552 KnownZero |= KnownZero2; 1553 return; 1554 case ISD::OR: 1555 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1556 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1557 KnownZero2, KnownOne2, Depth+1); 1558 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1559 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1560 1561 // Output known-0 bits are only known if clear in both the LHS & RHS. 1562 KnownZero &= KnownZero2; 1563 // Output known-1 are known to be set if set in either the LHS | RHS. 1564 KnownOne |= KnownOne2; 1565 return; 1566 case ISD::XOR: { 1567 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1568 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1569 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1570 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1571 1572 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1573 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1574 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1575 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1576 KnownZero = KnownZeroOut; 1577 return; 1578 } 1579 case ISD::MUL: { 1580 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1581 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1582 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1583 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1584 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1585 1586 // If low bits are zero in either operand, output low known-0 bits. 1587 // Also compute a conserative estimate for high known-0 bits. 1588 // More trickiness is possible, but this is sufficient for the 1589 // interesting case of alignment computation. 1590 KnownOne.clear(); 1591 unsigned TrailZ = KnownZero.countTrailingOnes() + 1592 KnownZero2.countTrailingOnes(); 1593 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1594 KnownZero2.countLeadingOnes(), 1595 BitWidth) - BitWidth; 1596 1597 TrailZ = std::min(TrailZ, BitWidth); 1598 LeadZ = std::min(LeadZ, BitWidth); 1599 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1600 APInt::getHighBitsSet(BitWidth, LeadZ); 1601 KnownZero &= Mask; 1602 return; 1603 } 1604 case ISD::UDIV: { 1605 // For the purposes of computing leading zeros we can conservatively 1606 // treat a udiv as a logical right shift by the power of 2 known to 1607 // be less than the denominator. 1608 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1609 ComputeMaskedBits(Op.getOperand(0), 1610 AllOnes, KnownZero2, KnownOne2, Depth+1); 1611 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1612 1613 KnownOne2.clear(); 1614 KnownZero2.clear(); 1615 ComputeMaskedBits(Op.getOperand(1), 1616 AllOnes, KnownZero2, KnownOne2, Depth+1); 1617 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1618 if (RHSUnknownLeadingOnes != BitWidth) 1619 LeadZ = std::min(BitWidth, 1620 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1621 1622 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1623 return; 1624 } 1625 case ISD::SELECT: 1626 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1627 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1628 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1629 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1630 1631 // Only known if known in both the LHS and RHS. 1632 KnownOne &= KnownOne2; 1633 KnownZero &= KnownZero2; 1634 return; 1635 case ISD::SELECT_CC: 1636 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1637 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1638 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1639 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1640 1641 // Only known if known in both the LHS and RHS. 1642 KnownOne &= KnownOne2; 1643 KnownZero &= KnownZero2; 1644 return; 1645 case ISD::SADDO: 1646 case ISD::UADDO: 1647 case ISD::SSUBO: 1648 case ISD::USUBO: 1649 case ISD::SMULO: 1650 case ISD::UMULO: 1651 if (Op.getResNo() != 1) 1652 return; 1653 // The boolean result conforms to getBooleanContents. Fall through. 1654 case ISD::SETCC: 1655 // If we know the result of a setcc has the top bits zero, use this info. 1656 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1657 BitWidth > 1) 1658 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1659 return; 1660 case ISD::SHL: 1661 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1662 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1663 unsigned ShAmt = SA->getZExtValue(); 1664 1665 // If the shift count is an invalid immediate, don't do anything. 1666 if (ShAmt >= BitWidth) 1667 return; 1668 1669 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1670 KnownZero, KnownOne, Depth+1); 1671 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1672 KnownZero <<= ShAmt; 1673 KnownOne <<= ShAmt; 1674 // low bits known zero. 1675 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1676 } 1677 return; 1678 case ISD::SRL: 1679 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1680 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1681 unsigned ShAmt = SA->getZExtValue(); 1682 1683 // If the shift count is an invalid immediate, don't do anything. 1684 if (ShAmt >= BitWidth) 1685 return; 1686 1687 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1688 KnownZero, KnownOne, Depth+1); 1689 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1690 KnownZero = KnownZero.lshr(ShAmt); 1691 KnownOne = KnownOne.lshr(ShAmt); 1692 1693 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1694 KnownZero |= HighBits; // High bits known zero. 1695 } 1696 return; 1697 case ISD::SRA: 1698 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1699 unsigned ShAmt = SA->getZExtValue(); 1700 1701 // If the shift count is an invalid immediate, don't do anything. 1702 if (ShAmt >= BitWidth) 1703 return; 1704 1705 APInt InDemandedMask = (Mask << ShAmt); 1706 // If any of the demanded bits are produced by the sign extension, we also 1707 // demand the input sign bit. 1708 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1709 if (HighBits.getBoolValue()) 1710 InDemandedMask |= APInt::getSignBit(BitWidth); 1711 1712 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1713 Depth+1); 1714 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1715 KnownZero = KnownZero.lshr(ShAmt); 1716 KnownOne = KnownOne.lshr(ShAmt); 1717 1718 // Handle the sign bits. 1719 APInt SignBit = APInt::getSignBit(BitWidth); 1720 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1721 1722 if (KnownZero.intersects(SignBit)) { 1723 KnownZero |= HighBits; // New bits are known zero. 1724 } else if (KnownOne.intersects(SignBit)) { 1725 KnownOne |= HighBits; // New bits are known one. 1726 } 1727 } 1728 return; 1729 case ISD::SIGN_EXTEND_INREG: { 1730 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1731 unsigned EBits = EVT.getSizeInBits(); 1732 1733 // Sign extension. Compute the demanded bits in the result that are not 1734 // present in the input. 1735 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1736 1737 APInt InSignBit = APInt::getSignBit(EBits); 1738 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1739 1740 // If the sign extended bits are demanded, we know that the sign 1741 // bit is demanded. 1742 InSignBit.zext(BitWidth); 1743 if (NewBits.getBoolValue()) 1744 InputDemandedBits |= InSignBit; 1745 1746 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1747 KnownZero, KnownOne, Depth+1); 1748 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1749 1750 // If the sign bit of the input is known set or clear, then we know the 1751 // top bits of the result. 1752 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1753 KnownZero |= NewBits; 1754 KnownOne &= ~NewBits; 1755 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1756 KnownOne |= NewBits; 1757 KnownZero &= ~NewBits; 1758 } else { // Input sign bit unknown 1759 KnownZero &= ~NewBits; 1760 KnownOne &= ~NewBits; 1761 } 1762 return; 1763 } 1764 case ISD::CTTZ: 1765 case ISD::CTLZ: 1766 case ISD::CTPOP: { 1767 unsigned LowBits = Log2_32(BitWidth)+1; 1768 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1769 KnownOne.clear(); 1770 return; 1771 } 1772 case ISD::LOAD: { 1773 if (ISD::isZEXTLoad(Op.getNode())) { 1774 LoadSDNode *LD = cast<LoadSDNode>(Op); 1775 EVT VT = LD->getMemoryVT(); 1776 unsigned MemBits = VT.getSizeInBits(); 1777 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1778 } 1779 return; 1780 } 1781 case ISD::ZERO_EXTEND: { 1782 EVT InVT = Op.getOperand(0).getValueType(); 1783 unsigned InBits = InVT.getSizeInBits(); 1784 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1785 APInt InMask = Mask; 1786 InMask.trunc(InBits); 1787 KnownZero.trunc(InBits); 1788 KnownOne.trunc(InBits); 1789 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1790 KnownZero.zext(BitWidth); 1791 KnownOne.zext(BitWidth); 1792 KnownZero |= NewBits; 1793 return; 1794 } 1795 case ISD::SIGN_EXTEND: { 1796 EVT InVT = Op.getOperand(0).getValueType(); 1797 unsigned InBits = InVT.getSizeInBits(); 1798 APInt InSignBit = APInt::getSignBit(InBits); 1799 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1800 APInt InMask = Mask; 1801 InMask.trunc(InBits); 1802 1803 // If any of the sign extended bits are demanded, we know that the sign 1804 // bit is demanded. Temporarily set this bit in the mask for our callee. 1805 if (NewBits.getBoolValue()) 1806 InMask |= InSignBit; 1807 1808 KnownZero.trunc(InBits); 1809 KnownOne.trunc(InBits); 1810 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1811 1812 // Note if the sign bit is known to be zero or one. 1813 bool SignBitKnownZero = KnownZero.isNegative(); 1814 bool SignBitKnownOne = KnownOne.isNegative(); 1815 assert(!(SignBitKnownZero && SignBitKnownOne) && 1816 "Sign bit can't be known to be both zero and one!"); 1817 1818 // If the sign bit wasn't actually demanded by our caller, we don't 1819 // want it set in the KnownZero and KnownOne result values. Reset the 1820 // mask and reapply it to the result values. 1821 InMask = Mask; 1822 InMask.trunc(InBits); 1823 KnownZero &= InMask; 1824 KnownOne &= InMask; 1825 1826 KnownZero.zext(BitWidth); 1827 KnownOne.zext(BitWidth); 1828 1829 // If the sign bit is known zero or one, the top bits match. 1830 if (SignBitKnownZero) 1831 KnownZero |= NewBits; 1832 else if (SignBitKnownOne) 1833 KnownOne |= NewBits; 1834 return; 1835 } 1836 case ISD::ANY_EXTEND: { 1837 EVT InVT = Op.getOperand(0).getValueType(); 1838 unsigned InBits = InVT.getSizeInBits(); 1839 APInt InMask = Mask; 1840 InMask.trunc(InBits); 1841 KnownZero.trunc(InBits); 1842 KnownOne.trunc(InBits); 1843 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1844 KnownZero.zext(BitWidth); 1845 KnownOne.zext(BitWidth); 1846 return; 1847 } 1848 case ISD::TRUNCATE: { 1849 EVT InVT = Op.getOperand(0).getValueType(); 1850 unsigned InBits = InVT.getSizeInBits(); 1851 APInt InMask = Mask; 1852 InMask.zext(InBits); 1853 KnownZero.zext(InBits); 1854 KnownOne.zext(InBits); 1855 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1856 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1857 KnownZero.trunc(BitWidth); 1858 KnownOne.trunc(BitWidth); 1859 break; 1860 } 1861 case ISD::AssertZext: { 1862 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1863 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1864 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1865 KnownOne, Depth+1); 1866 KnownZero |= (~InMask) & Mask; 1867 return; 1868 } 1869 case ISD::FGETSIGN: 1870 // All bits are zero except the low bit. 1871 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1872 return; 1873 1874 case ISD::SUB: { 1875 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1876 // We know that the top bits of C-X are clear if X contains less bits 1877 // than C (i.e. no wrap-around can happen). For example, 20-X is 1878 // positive if we can prove that X is >= 0 and < 16. 1879 if (CLHS->getAPIntValue().isNonNegative()) { 1880 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1881 // NLZ can't be BitWidth with no sign bit 1882 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1883 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1884 Depth+1); 1885 1886 // If all of the MaskV bits are known to be zero, then we know the 1887 // output top bits are zero, because we now know that the output is 1888 // from [0-C]. 1889 if ((KnownZero2 & MaskV) == MaskV) { 1890 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1891 // Top bits known zero. 1892 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1893 } 1894 } 1895 } 1896 } 1897 // fall through 1898 case ISD::ADD: { 1899 // Output known-0 bits are known if clear or set in both the low clear bits 1900 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1901 // low 3 bits clear. 1902 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1903 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1904 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1905 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1906 1907 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1908 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1909 KnownZeroOut = std::min(KnownZeroOut, 1910 KnownZero2.countTrailingOnes()); 1911 1912 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1913 return; 1914 } 1915 case ISD::SREM: 1916 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1917 const APInt &RA = Rem->getAPIntValue(); 1918 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1919 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1920 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1921 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1922 1923 // If the sign bit of the first operand is zero, the sign bit of 1924 // the result is zero. If the first operand has no one bits below 1925 // the second operand's single 1 bit, its sign will be zero. 1926 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1927 KnownZero2 |= ~LowBits; 1928 1929 KnownZero |= KnownZero2 & Mask; 1930 1931 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1932 } 1933 } 1934 return; 1935 case ISD::UREM: { 1936 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1937 const APInt &RA = Rem->getAPIntValue(); 1938 if (RA.isPowerOf2()) { 1939 APInt LowBits = (RA - 1); 1940 APInt Mask2 = LowBits & Mask; 1941 KnownZero |= ~LowBits & Mask; 1942 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1943 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1944 break; 1945 } 1946 } 1947 1948 // Since the result is less than or equal to either operand, any leading 1949 // zero bits in either operand must also exist in the result. 1950 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1951 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1952 Depth+1); 1953 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1954 Depth+1); 1955 1956 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1957 KnownZero2.countLeadingOnes()); 1958 KnownOne.clear(); 1959 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1960 return; 1961 } 1962 default: 1963 // Allow the target to implement this method for its nodes. 1964 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1965 case ISD::INTRINSIC_WO_CHAIN: 1966 case ISD::INTRINSIC_W_CHAIN: 1967 case ISD::INTRINSIC_VOID: 1968 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1969 Depth); 1970 } 1971 return; 1972 } 1973} 1974 1975/// ComputeNumSignBits - Return the number of times the sign bit of the 1976/// register is replicated into the other bits. We know that at least 1 bit 1977/// is always equal to the sign bit (itself), but other cases can give us 1978/// information. For example, immediately after an "SRA X, 2", we know that 1979/// the top 3 bits are all equal to each other, so we return 3. 1980unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1981 EVT VT = Op.getValueType(); 1982 assert(VT.isInteger() && "Invalid VT!"); 1983 unsigned VTBits = VT.getSizeInBits(); 1984 unsigned Tmp, Tmp2; 1985 unsigned FirstAnswer = 1; 1986 1987 if (Depth == 6) 1988 return 1; // Limit search depth. 1989 1990 switch (Op.getOpcode()) { 1991 default: break; 1992 case ISD::AssertSext: 1993 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1994 return VTBits-Tmp+1; 1995 case ISD::AssertZext: 1996 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1997 return VTBits-Tmp; 1998 1999 case ISD::Constant: { 2000 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2001 // If negative, return # leading ones. 2002 if (Val.isNegative()) 2003 return Val.countLeadingOnes(); 2004 2005 // Return # leading zeros. 2006 return Val.countLeadingZeros(); 2007 } 2008 2009 case ISD::SIGN_EXTEND: 2010 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 2011 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2012 2013 case ISD::SIGN_EXTEND_INREG: 2014 // Max of the input and what this extends. 2015 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2016 Tmp = VTBits-Tmp+1; 2017 2018 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2019 return std::max(Tmp, Tmp2); 2020 2021 case ISD::SRA: 2022 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2023 // SRA X, C -> adds C sign bits. 2024 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2025 Tmp += C->getZExtValue(); 2026 if (Tmp > VTBits) Tmp = VTBits; 2027 } 2028 return Tmp; 2029 case ISD::SHL: 2030 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2031 // shl destroys sign bits. 2032 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2033 if (C->getZExtValue() >= VTBits || // Bad shift. 2034 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2035 return Tmp - C->getZExtValue(); 2036 } 2037 break; 2038 case ISD::AND: 2039 case ISD::OR: 2040 case ISD::XOR: // NOT is handled here. 2041 // Logical binary ops preserve the number of sign bits at the worst. 2042 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2043 if (Tmp != 1) { 2044 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2045 FirstAnswer = std::min(Tmp, Tmp2); 2046 // We computed what we know about the sign bits as our first 2047 // answer. Now proceed to the generic code that uses 2048 // ComputeMaskedBits, and pick whichever answer is better. 2049 } 2050 break; 2051 2052 case ISD::SELECT: 2053 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2054 if (Tmp == 1) return 1; // Early out. 2055 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2056 return std::min(Tmp, Tmp2); 2057 2058 case ISD::SADDO: 2059 case ISD::UADDO: 2060 case ISD::SSUBO: 2061 case ISD::USUBO: 2062 case ISD::SMULO: 2063 case ISD::UMULO: 2064 if (Op.getResNo() != 1) 2065 break; 2066 // The boolean result conforms to getBooleanContents. Fall through. 2067 case ISD::SETCC: 2068 // If setcc returns 0/-1, all bits are sign bits. 2069 if (TLI.getBooleanContents() == 2070 TargetLowering::ZeroOrNegativeOneBooleanContent) 2071 return VTBits; 2072 break; 2073 case ISD::ROTL: 2074 case ISD::ROTR: 2075 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2076 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2077 2078 // Handle rotate right by N like a rotate left by 32-N. 2079 if (Op.getOpcode() == ISD::ROTR) 2080 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2081 2082 // If we aren't rotating out all of the known-in sign bits, return the 2083 // number that are left. This handles rotl(sext(x), 1) for example. 2084 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2085 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2086 } 2087 break; 2088 case ISD::ADD: 2089 // Add can have at most one carry bit. Thus we know that the output 2090 // is, at worst, one more bit than the inputs. 2091 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2092 if (Tmp == 1) return 1; // Early out. 2093 2094 // Special case decrementing a value (ADD X, -1): 2095 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2096 if (CRHS->isAllOnesValue()) { 2097 APInt KnownZero, KnownOne; 2098 APInt Mask = APInt::getAllOnesValue(VTBits); 2099 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2100 2101 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2102 // sign bits set. 2103 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2104 return VTBits; 2105 2106 // If we are subtracting one from a positive number, there is no carry 2107 // out of the result. 2108 if (KnownZero.isNegative()) 2109 return Tmp; 2110 } 2111 2112 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2113 if (Tmp2 == 1) return 1; 2114 return std::min(Tmp, Tmp2)-1; 2115 break; 2116 2117 case ISD::SUB: 2118 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2119 if (Tmp2 == 1) return 1; 2120 2121 // Handle NEG. 2122 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2123 if (CLHS->isNullValue()) { 2124 APInt KnownZero, KnownOne; 2125 APInt Mask = APInt::getAllOnesValue(VTBits); 2126 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2127 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2128 // sign bits set. 2129 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2130 return VTBits; 2131 2132 // If the input is known to be positive (the sign bit is known clear), 2133 // the output of the NEG has the same number of sign bits as the input. 2134 if (KnownZero.isNegative()) 2135 return Tmp2; 2136 2137 // Otherwise, we treat this like a SUB. 2138 } 2139 2140 // Sub can have at most one carry bit. Thus we know that the output 2141 // is, at worst, one more bit than the inputs. 2142 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2143 if (Tmp == 1) return 1; // Early out. 2144 return std::min(Tmp, Tmp2)-1; 2145 break; 2146 case ISD::TRUNCATE: 2147 // FIXME: it's tricky to do anything useful for this, but it is an important 2148 // case for targets like X86. 2149 break; 2150 } 2151 2152 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2153 if (Op.getOpcode() == ISD::LOAD) { 2154 LoadSDNode *LD = cast<LoadSDNode>(Op); 2155 unsigned ExtType = LD->getExtensionType(); 2156 switch (ExtType) { 2157 default: break; 2158 case ISD::SEXTLOAD: // '17' bits known 2159 Tmp = LD->getMemoryVT().getSizeInBits(); 2160 return VTBits-Tmp+1; 2161 case ISD::ZEXTLOAD: // '16' bits known 2162 Tmp = LD->getMemoryVT().getSizeInBits(); 2163 return VTBits-Tmp; 2164 } 2165 } 2166 2167 // Allow the target to implement this method for its nodes. 2168 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2169 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2170 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2171 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2172 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2173 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2174 } 2175 2176 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2177 // use this information. 2178 APInt KnownZero, KnownOne; 2179 APInt Mask = APInt::getAllOnesValue(VTBits); 2180 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2181 2182 if (KnownZero.isNegative()) { // sign bit is 0 2183 Mask = KnownZero; 2184 } else if (KnownOne.isNegative()) { // sign bit is 1; 2185 Mask = KnownOne; 2186 } else { 2187 // Nothing known. 2188 return FirstAnswer; 2189 } 2190 2191 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2192 // the number of identical bits in the top of the input value. 2193 Mask = ~Mask; 2194 Mask <<= Mask.getBitWidth()-VTBits; 2195 // Return # leading zeros. We use 'min' here in case Val was zero before 2196 // shifting. We don't want to return '64' as for an i32 "0". 2197 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2198} 2199 2200 2201bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2202 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2203 if (!GA) return false; 2204 if (GA->getOffset() != 0) return false; 2205 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2206 if (!GV) return false; 2207 MachineModuleInfo *MMI = getMachineModuleInfo(); 2208 return MMI && MMI->hasDebugInfo(); 2209} 2210 2211 2212/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2213/// element of the result of the vector shuffle. 2214SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2215 unsigned i) { 2216 EVT VT = N->getValueType(0); 2217 DebugLoc dl = N->getDebugLoc(); 2218 if (N->getMaskElt(i) < 0) 2219 return getUNDEF(VT.getVectorElementType()); 2220 unsigned Index = N->getMaskElt(i); 2221 unsigned NumElems = VT.getVectorNumElements(); 2222 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2223 Index %= NumElems; 2224 2225 if (V.getOpcode() == ISD::BIT_CONVERT) { 2226 V = V.getOperand(0); 2227 EVT VVT = V.getValueType(); 2228 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2229 return SDValue(); 2230 } 2231 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2232 return (Index == 0) ? V.getOperand(0) 2233 : getUNDEF(VT.getVectorElementType()); 2234 if (V.getOpcode() == ISD::BUILD_VECTOR) 2235 return V.getOperand(Index); 2236 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2237 return getShuffleScalarElt(SVN, Index); 2238 return SDValue(); 2239} 2240 2241 2242/// getNode - Gets or creates the specified node. 2243/// 2244SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2245 FoldingSetNodeID ID; 2246 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2247 void *IP = 0; 2248 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2249 return SDValue(E, 0); 2250 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2251 new (N) SDNode(Opcode, DL, getVTList(VT)); 2252 CSEMap.InsertNode(N, IP); 2253 2254 AllNodes.push_back(N); 2255#ifndef NDEBUG 2256 VerifyNode(N); 2257#endif 2258 return SDValue(N, 0); 2259} 2260 2261SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2262 EVT VT, SDValue Operand) { 2263 // Constant fold unary operations with an integer constant operand. 2264 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2265 const APInt &Val = C->getAPIntValue(); 2266 unsigned BitWidth = VT.getSizeInBits(); 2267 switch (Opcode) { 2268 default: break; 2269 case ISD::SIGN_EXTEND: 2270 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2271 case ISD::ANY_EXTEND: 2272 case ISD::ZERO_EXTEND: 2273 case ISD::TRUNCATE: 2274 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2275 case ISD::UINT_TO_FP: 2276 case ISD::SINT_TO_FP: { 2277 const uint64_t zero[] = {0, 0}; 2278 // No compile time operations on this type. 2279 if (VT==EVT::ppcf128) 2280 break; 2281 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2282 (void)apf.convertFromAPInt(Val, 2283 Opcode==ISD::SINT_TO_FP, 2284 APFloat::rmNearestTiesToEven); 2285 return getConstantFP(apf, VT); 2286 } 2287 case ISD::BIT_CONVERT: 2288 if (VT == EVT::f32 && C->getValueType(0) == EVT::i32) 2289 return getConstantFP(Val.bitsToFloat(), VT); 2290 else if (VT == EVT::f64 && C->getValueType(0) == EVT::i64) 2291 return getConstantFP(Val.bitsToDouble(), VT); 2292 break; 2293 case ISD::BSWAP: 2294 return getConstant(Val.byteSwap(), VT); 2295 case ISD::CTPOP: 2296 return getConstant(Val.countPopulation(), VT); 2297 case ISD::CTLZ: 2298 return getConstant(Val.countLeadingZeros(), VT); 2299 case ISD::CTTZ: 2300 return getConstant(Val.countTrailingZeros(), VT); 2301 } 2302 } 2303 2304 // Constant fold unary operations with a floating point constant operand. 2305 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2306 APFloat V = C->getValueAPF(); // make copy 2307 if (VT != EVT::ppcf128 && Operand.getValueType() != EVT::ppcf128) { 2308 switch (Opcode) { 2309 case ISD::FNEG: 2310 V.changeSign(); 2311 return getConstantFP(V, VT); 2312 case ISD::FABS: 2313 V.clearSign(); 2314 return getConstantFP(V, VT); 2315 case ISD::FP_ROUND: 2316 case ISD::FP_EXTEND: { 2317 bool ignored; 2318 // This can return overflow, underflow, or inexact; we don't care. 2319 // FIXME need to be more flexible about rounding mode. 2320 (void)V.convert(*EVTToAPFloatSemantics(VT), 2321 APFloat::rmNearestTiesToEven, &ignored); 2322 return getConstantFP(V, VT); 2323 } 2324 case ISD::FP_TO_SINT: 2325 case ISD::FP_TO_UINT: { 2326 integerPart x[2]; 2327 bool ignored; 2328 assert(integerPartWidth >= 64); 2329 // FIXME need to be more flexible about rounding mode. 2330 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2331 Opcode==ISD::FP_TO_SINT, 2332 APFloat::rmTowardZero, &ignored); 2333 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2334 break; 2335 APInt api(VT.getSizeInBits(), 2, x); 2336 return getConstant(api, VT); 2337 } 2338 case ISD::BIT_CONVERT: 2339 if (VT == EVT::i32 && C->getValueType(0) == EVT::f32) 2340 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2341 else if (VT == EVT::i64 && C->getValueType(0) == EVT::f64) 2342 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2343 break; 2344 } 2345 } 2346 } 2347 2348 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2349 switch (Opcode) { 2350 case ISD::TokenFactor: 2351 case ISD::MERGE_VALUES: 2352 case ISD::CONCAT_VECTORS: 2353 return Operand; // Factor, merge or concat of one node? No need. 2354 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2355 case ISD::FP_EXTEND: 2356 assert(VT.isFloatingPoint() && 2357 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2358 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2359 if (Operand.getOpcode() == ISD::UNDEF) 2360 return getUNDEF(VT); 2361 break; 2362 case ISD::SIGN_EXTEND: 2363 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2364 "Invalid SIGN_EXTEND!"); 2365 if (Operand.getValueType() == VT) return Operand; // noop extension 2366 assert(Operand.getValueType().bitsLT(VT) 2367 && "Invalid sext node, dst < src!"); 2368 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2369 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2370 break; 2371 case ISD::ZERO_EXTEND: 2372 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2373 "Invalid ZERO_EXTEND!"); 2374 if (Operand.getValueType() == VT) return Operand; // noop extension 2375 assert(Operand.getValueType().bitsLT(VT) 2376 && "Invalid zext node, dst < src!"); 2377 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2378 return getNode(ISD::ZERO_EXTEND, DL, VT, 2379 Operand.getNode()->getOperand(0)); 2380 break; 2381 case ISD::ANY_EXTEND: 2382 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2383 "Invalid ANY_EXTEND!"); 2384 if (Operand.getValueType() == VT) return Operand; // noop extension 2385 assert(Operand.getValueType().bitsLT(VT) 2386 && "Invalid anyext node, dst < src!"); 2387 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2388 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2389 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2390 break; 2391 case ISD::TRUNCATE: 2392 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2393 "Invalid TRUNCATE!"); 2394 if (Operand.getValueType() == VT) return Operand; // noop truncate 2395 assert(Operand.getValueType().bitsGT(VT) 2396 && "Invalid truncate node, src < dst!"); 2397 if (OpOpcode == ISD::TRUNCATE) 2398 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2399 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2400 OpOpcode == ISD::ANY_EXTEND) { 2401 // If the source is smaller than the dest, we still need an extend. 2402 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2403 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2404 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2405 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2406 else 2407 return Operand.getNode()->getOperand(0); 2408 } 2409 break; 2410 case ISD::BIT_CONVERT: 2411 // Basic sanity checking. 2412 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2413 && "Cannot BIT_CONVERT between types of different sizes!"); 2414 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2415 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2416 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2417 if (OpOpcode == ISD::UNDEF) 2418 return getUNDEF(VT); 2419 break; 2420 case ISD::SCALAR_TO_VECTOR: 2421 assert(VT.isVector() && !Operand.getValueType().isVector() && 2422 (VT.getVectorElementType() == Operand.getValueType() || 2423 (VT.getVectorElementType().isInteger() && 2424 Operand.getValueType().isInteger() && 2425 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2426 "Illegal SCALAR_TO_VECTOR node!"); 2427 if (OpOpcode == ISD::UNDEF) 2428 return getUNDEF(VT); 2429 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2430 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2431 isa<ConstantSDNode>(Operand.getOperand(1)) && 2432 Operand.getConstantOperandVal(1) == 0 && 2433 Operand.getOperand(0).getValueType() == VT) 2434 return Operand.getOperand(0); 2435 break; 2436 case ISD::FNEG: 2437 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2438 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2439 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2440 Operand.getNode()->getOperand(0)); 2441 if (OpOpcode == ISD::FNEG) // --X -> X 2442 return Operand.getNode()->getOperand(0); 2443 break; 2444 case ISD::FABS: 2445 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2446 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2447 break; 2448 } 2449 2450 SDNode *N; 2451 SDVTList VTs = getVTList(VT); 2452 if (VT != EVT::Flag) { // Don't CSE flag producing nodes 2453 FoldingSetNodeID ID; 2454 SDValue Ops[1] = { Operand }; 2455 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2456 void *IP = 0; 2457 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2458 return SDValue(E, 0); 2459 N = NodeAllocator.Allocate<UnarySDNode>(); 2460 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2461 CSEMap.InsertNode(N, IP); 2462 } else { 2463 N = NodeAllocator.Allocate<UnarySDNode>(); 2464 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2465 } 2466 2467 AllNodes.push_back(N); 2468#ifndef NDEBUG 2469 VerifyNode(N); 2470#endif 2471 return SDValue(N, 0); 2472} 2473 2474SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2475 EVT VT, 2476 ConstantSDNode *Cst1, 2477 ConstantSDNode *Cst2) { 2478 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2479 2480 switch (Opcode) { 2481 case ISD::ADD: return getConstant(C1 + C2, VT); 2482 case ISD::SUB: return getConstant(C1 - C2, VT); 2483 case ISD::MUL: return getConstant(C1 * C2, VT); 2484 case ISD::UDIV: 2485 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2486 break; 2487 case ISD::UREM: 2488 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2489 break; 2490 case ISD::SDIV: 2491 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2492 break; 2493 case ISD::SREM: 2494 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2495 break; 2496 case ISD::AND: return getConstant(C1 & C2, VT); 2497 case ISD::OR: return getConstant(C1 | C2, VT); 2498 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2499 case ISD::SHL: return getConstant(C1 << C2, VT); 2500 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2501 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2502 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2503 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2504 default: break; 2505 } 2506 2507 return SDValue(); 2508} 2509 2510SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2511 SDValue N1, SDValue N2) { 2512 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2513 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2514 switch (Opcode) { 2515 default: break; 2516 case ISD::TokenFactor: 2517 assert(VT == EVT::Other && N1.getValueType() == EVT::Other && 2518 N2.getValueType() == EVT::Other && "Invalid token factor!"); 2519 // Fold trivial token factors. 2520 if (N1.getOpcode() == ISD::EntryToken) return N2; 2521 if (N2.getOpcode() == ISD::EntryToken) return N1; 2522 if (N1 == N2) return N1; 2523 break; 2524 case ISD::CONCAT_VECTORS: 2525 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2526 // one big BUILD_VECTOR. 2527 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2528 N2.getOpcode() == ISD::BUILD_VECTOR) { 2529 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2530 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2531 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2532 } 2533 break; 2534 case ISD::AND: 2535 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2536 N1.getValueType() == VT && "Binary operator types must match!"); 2537 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2538 // worth handling here. 2539 if (N2C && N2C->isNullValue()) 2540 return N2; 2541 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2542 return N1; 2543 break; 2544 case ISD::OR: 2545 case ISD::XOR: 2546 case ISD::ADD: 2547 case ISD::SUB: 2548 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2549 N1.getValueType() == VT && "Binary operator types must match!"); 2550 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2551 // it's worth handling here. 2552 if (N2C && N2C->isNullValue()) 2553 return N1; 2554 break; 2555 case ISD::UDIV: 2556 case ISD::UREM: 2557 case ISD::MULHU: 2558 case ISD::MULHS: 2559 case ISD::MUL: 2560 case ISD::SDIV: 2561 case ISD::SREM: 2562 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2563 // fall through 2564 case ISD::FADD: 2565 case ISD::FSUB: 2566 case ISD::FMUL: 2567 case ISD::FDIV: 2568 case ISD::FREM: 2569 if (UnsafeFPMath) { 2570 if (Opcode == ISD::FADD) { 2571 // 0+x --> x 2572 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2573 if (CFP->getValueAPF().isZero()) 2574 return N2; 2575 // x+0 --> x 2576 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2577 if (CFP->getValueAPF().isZero()) 2578 return N1; 2579 } else if (Opcode == ISD::FSUB) { 2580 // x-0 --> x 2581 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2582 if (CFP->getValueAPF().isZero()) 2583 return N1; 2584 } 2585 } 2586 assert(N1.getValueType() == N2.getValueType() && 2587 N1.getValueType() == VT && "Binary operator types must match!"); 2588 break; 2589 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2590 assert(N1.getValueType() == VT && 2591 N1.getValueType().isFloatingPoint() && 2592 N2.getValueType().isFloatingPoint() && 2593 "Invalid FCOPYSIGN!"); 2594 break; 2595 case ISD::SHL: 2596 case ISD::SRA: 2597 case ISD::SRL: 2598 case ISD::ROTL: 2599 case ISD::ROTR: 2600 assert(VT == N1.getValueType() && 2601 "Shift operators return type must be the same as their first arg"); 2602 assert(VT.isInteger() && N2.getValueType().isInteger() && 2603 "Shifts only work on integers"); 2604 2605 // Always fold shifts of i1 values so the code generator doesn't need to 2606 // handle them. Since we know the size of the shift has to be less than the 2607 // size of the value, the shift/rotate count is guaranteed to be zero. 2608 if (VT == EVT::i1) 2609 return N1; 2610 break; 2611 case ISD::FP_ROUND_INREG: { 2612 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2613 assert(VT == N1.getValueType() && "Not an inreg round!"); 2614 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2615 "Cannot FP_ROUND_INREG integer types"); 2616 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2617 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2618 break; 2619 } 2620 case ISD::FP_ROUND: 2621 assert(VT.isFloatingPoint() && 2622 N1.getValueType().isFloatingPoint() && 2623 VT.bitsLE(N1.getValueType()) && 2624 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2625 if (N1.getValueType() == VT) return N1; // noop conversion. 2626 break; 2627 case ISD::AssertSext: 2628 case ISD::AssertZext: { 2629 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2630 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2631 assert(VT.isInteger() && EVT.isInteger() && 2632 "Cannot *_EXTEND_INREG FP types"); 2633 assert(EVT.bitsLE(VT) && "Not extending!"); 2634 if (VT == EVT) return N1; // noop assertion. 2635 break; 2636 } 2637 case ISD::SIGN_EXTEND_INREG: { 2638 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2639 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2640 assert(VT.isInteger() && EVT.isInteger() && 2641 "Cannot *_EXTEND_INREG FP types"); 2642 assert(EVT.bitsLE(VT) && "Not extending!"); 2643 if (EVT == VT) return N1; // Not actually extending 2644 2645 if (N1C) { 2646 APInt Val = N1C->getAPIntValue(); 2647 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2648 Val <<= Val.getBitWidth()-FromBits; 2649 Val = Val.ashr(Val.getBitWidth()-FromBits); 2650 return getConstant(Val, VT); 2651 } 2652 break; 2653 } 2654 case ISD::EXTRACT_VECTOR_ELT: 2655 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2656 if (N1.getOpcode() == ISD::UNDEF) 2657 return getUNDEF(VT); 2658 2659 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2660 // expanding copies of large vectors from registers. 2661 if (N2C && 2662 N1.getOpcode() == ISD::CONCAT_VECTORS && 2663 N1.getNumOperands() > 0) { 2664 unsigned Factor = 2665 N1.getOperand(0).getValueType().getVectorNumElements(); 2666 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2667 N1.getOperand(N2C->getZExtValue() / Factor), 2668 getConstant(N2C->getZExtValue() % Factor, 2669 N2.getValueType())); 2670 } 2671 2672 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2673 // expanding large vector constants. 2674 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2675 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2676 EVT VEltTy = N1.getValueType().getVectorElementType(); 2677 if (Elt.getValueType() != VEltTy) { 2678 // If the vector element type is not legal, the BUILD_VECTOR operands 2679 // are promoted and implicitly truncated. Make that explicit here. 2680 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2681 } 2682 if (VT != VEltTy) { 2683 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2684 // result is implicitly extended. 2685 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2686 } 2687 return Elt; 2688 } 2689 2690 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2691 // operations are lowered to scalars. 2692 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2693 // If the indices are the same, return the inserted element. 2694 if (N1.getOperand(2) == N2) 2695 return N1.getOperand(1); 2696 // If the indices are known different, extract the element from 2697 // the original vector. 2698 else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2699 isa<ConstantSDNode>(N2)) 2700 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2701 } 2702 break; 2703 case ISD::EXTRACT_ELEMENT: 2704 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2705 assert(!N1.getValueType().isVector() && !VT.isVector() && 2706 (N1.getValueType().isInteger() == VT.isInteger()) && 2707 "Wrong types for EXTRACT_ELEMENT!"); 2708 2709 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2710 // 64-bit integers into 32-bit parts. Instead of building the extract of 2711 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2712 if (N1.getOpcode() == ISD::BUILD_PAIR) 2713 return N1.getOperand(N2C->getZExtValue()); 2714 2715 // EXTRACT_ELEMENT of a constant int is also very common. 2716 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2717 unsigned ElementSize = VT.getSizeInBits(); 2718 unsigned Shift = ElementSize * N2C->getZExtValue(); 2719 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2720 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2721 } 2722 break; 2723 case ISD::EXTRACT_SUBVECTOR: 2724 if (N1.getValueType() == VT) // Trivial extraction. 2725 return N1; 2726 break; 2727 } 2728 2729 if (N1C) { 2730 if (N2C) { 2731 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2732 if (SV.getNode()) return SV; 2733 } else { // Cannonicalize constant to RHS if commutative 2734 if (isCommutativeBinOp(Opcode)) { 2735 std::swap(N1C, N2C); 2736 std::swap(N1, N2); 2737 } 2738 } 2739 } 2740 2741 // Constant fold FP operations. 2742 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2743 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2744 if (N1CFP) { 2745 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2746 // Cannonicalize constant to RHS if commutative 2747 std::swap(N1CFP, N2CFP); 2748 std::swap(N1, N2); 2749 } else if (N2CFP && VT != EVT::ppcf128) { 2750 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2751 APFloat::opStatus s; 2752 switch (Opcode) { 2753 case ISD::FADD: 2754 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2755 if (s != APFloat::opInvalidOp) 2756 return getConstantFP(V1, VT); 2757 break; 2758 case ISD::FSUB: 2759 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2760 if (s!=APFloat::opInvalidOp) 2761 return getConstantFP(V1, VT); 2762 break; 2763 case ISD::FMUL: 2764 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2765 if (s!=APFloat::opInvalidOp) 2766 return getConstantFP(V1, VT); 2767 break; 2768 case ISD::FDIV: 2769 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2770 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2771 return getConstantFP(V1, VT); 2772 break; 2773 case ISD::FREM : 2774 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2775 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2776 return getConstantFP(V1, VT); 2777 break; 2778 case ISD::FCOPYSIGN: 2779 V1.copySign(V2); 2780 return getConstantFP(V1, VT); 2781 default: break; 2782 } 2783 } 2784 } 2785 2786 // Canonicalize an UNDEF to the RHS, even over a constant. 2787 if (N1.getOpcode() == ISD::UNDEF) { 2788 if (isCommutativeBinOp(Opcode)) { 2789 std::swap(N1, N2); 2790 } else { 2791 switch (Opcode) { 2792 case ISD::FP_ROUND_INREG: 2793 case ISD::SIGN_EXTEND_INREG: 2794 case ISD::SUB: 2795 case ISD::FSUB: 2796 case ISD::FDIV: 2797 case ISD::FREM: 2798 case ISD::SRA: 2799 return N1; // fold op(undef, arg2) -> undef 2800 case ISD::UDIV: 2801 case ISD::SDIV: 2802 case ISD::UREM: 2803 case ISD::SREM: 2804 case ISD::SRL: 2805 case ISD::SHL: 2806 if (!VT.isVector()) 2807 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2808 // For vectors, we can't easily build an all zero vector, just return 2809 // the LHS. 2810 return N2; 2811 } 2812 } 2813 } 2814 2815 // Fold a bunch of operators when the RHS is undef. 2816 if (N2.getOpcode() == ISD::UNDEF) { 2817 switch (Opcode) { 2818 case ISD::XOR: 2819 if (N1.getOpcode() == ISD::UNDEF) 2820 // Handle undef ^ undef -> 0 special case. This is a common 2821 // idiom (misuse). 2822 return getConstant(0, VT); 2823 // fallthrough 2824 case ISD::ADD: 2825 case ISD::ADDC: 2826 case ISD::ADDE: 2827 case ISD::SUB: 2828 case ISD::UDIV: 2829 case ISD::SDIV: 2830 case ISD::UREM: 2831 case ISD::SREM: 2832 return N2; // fold op(arg1, undef) -> undef 2833 case ISD::FADD: 2834 case ISD::FSUB: 2835 case ISD::FMUL: 2836 case ISD::FDIV: 2837 case ISD::FREM: 2838 if (UnsafeFPMath) 2839 return N2; 2840 break; 2841 case ISD::MUL: 2842 case ISD::AND: 2843 case ISD::SRL: 2844 case ISD::SHL: 2845 if (!VT.isVector()) 2846 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2847 // For vectors, we can't easily build an all zero vector, just return 2848 // the LHS. 2849 return N1; 2850 case ISD::OR: 2851 if (!VT.isVector()) 2852 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2853 // For vectors, we can't easily build an all one vector, just return 2854 // the LHS. 2855 return N1; 2856 case ISD::SRA: 2857 return N1; 2858 } 2859 } 2860 2861 // Memoize this node if possible. 2862 SDNode *N; 2863 SDVTList VTs = getVTList(VT); 2864 if (VT != EVT::Flag) { 2865 SDValue Ops[] = { N1, N2 }; 2866 FoldingSetNodeID ID; 2867 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2868 void *IP = 0; 2869 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2870 return SDValue(E, 0); 2871 N = NodeAllocator.Allocate<BinarySDNode>(); 2872 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2873 CSEMap.InsertNode(N, IP); 2874 } else { 2875 N = NodeAllocator.Allocate<BinarySDNode>(); 2876 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2877 } 2878 2879 AllNodes.push_back(N); 2880#ifndef NDEBUG 2881 VerifyNode(N); 2882#endif 2883 return SDValue(N, 0); 2884} 2885 2886SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2887 SDValue N1, SDValue N2, SDValue N3) { 2888 // Perform various simplifications. 2889 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2890 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2891 switch (Opcode) { 2892 case ISD::CONCAT_VECTORS: 2893 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2894 // one big BUILD_VECTOR. 2895 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2896 N2.getOpcode() == ISD::BUILD_VECTOR && 2897 N3.getOpcode() == ISD::BUILD_VECTOR) { 2898 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2899 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2900 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2901 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2902 } 2903 break; 2904 case ISD::SETCC: { 2905 // Use FoldSetCC to simplify SETCC's. 2906 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 2907 if (Simp.getNode()) return Simp; 2908 break; 2909 } 2910 case ISD::SELECT: 2911 if (N1C) { 2912 if (N1C->getZExtValue()) 2913 return N2; // select true, X, Y -> X 2914 else 2915 return N3; // select false, X, Y -> Y 2916 } 2917 2918 if (N2 == N3) return N2; // select C, X, X -> X 2919 break; 2920 case ISD::BRCOND: 2921 if (N2C) { 2922 if (N2C->getZExtValue()) // Unconditional branch 2923 return getNode(ISD::BR, DL, EVT::Other, N1, N3); 2924 else 2925 return N1; // Never-taken branch 2926 } 2927 break; 2928 case ISD::VECTOR_SHUFFLE: 2929 llvm_unreachable("should use getVectorShuffle constructor!"); 2930 break; 2931 case ISD::BIT_CONVERT: 2932 // Fold bit_convert nodes from a type to themselves. 2933 if (N1.getValueType() == VT) 2934 return N1; 2935 break; 2936 } 2937 2938 // Memoize node if it doesn't produce a flag. 2939 SDNode *N; 2940 SDVTList VTs = getVTList(VT); 2941 if (VT != EVT::Flag) { 2942 SDValue Ops[] = { N1, N2, N3 }; 2943 FoldingSetNodeID ID; 2944 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2945 void *IP = 0; 2946 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2947 return SDValue(E, 0); 2948 N = NodeAllocator.Allocate<TernarySDNode>(); 2949 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2950 CSEMap.InsertNode(N, IP); 2951 } else { 2952 N = NodeAllocator.Allocate<TernarySDNode>(); 2953 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2954 } 2955 AllNodes.push_back(N); 2956#ifndef NDEBUG 2957 VerifyNode(N); 2958#endif 2959 return SDValue(N, 0); 2960} 2961 2962SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2963 SDValue N1, SDValue N2, SDValue N3, 2964 SDValue N4) { 2965 SDValue Ops[] = { N1, N2, N3, N4 }; 2966 return getNode(Opcode, DL, VT, Ops, 4); 2967} 2968 2969SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2970 SDValue N1, SDValue N2, SDValue N3, 2971 SDValue N4, SDValue N5) { 2972 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2973 return getNode(Opcode, DL, VT, Ops, 5); 2974} 2975 2976/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 2977/// the incoming stack arguments to be loaded from the stack. 2978SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 2979 SmallVector<SDValue, 8> ArgChains; 2980 2981 // Include the original chain at the beginning of the list. When this is 2982 // used by target LowerCall hooks, this helps legalize find the 2983 // CALLSEQ_BEGIN node. 2984 ArgChains.push_back(Chain); 2985 2986 // Add a chain value for each stack argument. 2987 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 2988 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 2989 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 2990 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 2991 if (FI->getIndex() < 0) 2992 ArgChains.push_back(SDValue(L, 1)); 2993 2994 // Build a tokenfactor for all the chains. 2995 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), EVT::Other, 2996 &ArgChains[0], ArgChains.size()); 2997} 2998 2999/// getMemsetValue - Vectorized representation of the memset value 3000/// operand. 3001static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3002 DebugLoc dl) { 3003 unsigned NumBits = VT.isVector() ? 3004 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 3005 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3006 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3007 unsigned Shift = 8; 3008 for (unsigned i = NumBits; i > 8; i >>= 1) { 3009 Val = (Val << Shift) | Val; 3010 Shift <<= 1; 3011 } 3012 if (VT.isInteger()) 3013 return DAG.getConstant(Val, VT); 3014 return DAG.getConstantFP(APFloat(Val), VT); 3015 } 3016 3017 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3018 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3019 unsigned Shift = 8; 3020 for (unsigned i = NumBits; i > 8; i >>= 1) { 3021 Value = DAG.getNode(ISD::OR, dl, VT, 3022 DAG.getNode(ISD::SHL, dl, VT, Value, 3023 DAG.getConstant(Shift, 3024 TLI.getShiftAmountTy())), 3025 Value); 3026 Shift <<= 1; 3027 } 3028 3029 return Value; 3030} 3031 3032/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3033/// used when a memcpy is turned into a memset when the source is a constant 3034/// string ptr. 3035static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3036 const TargetLowering &TLI, 3037 std::string &Str, unsigned Offset) { 3038 // Handle vector with all elements zero. 3039 if (Str.empty()) { 3040 if (VT.isInteger()) 3041 return DAG.getConstant(0, VT); 3042 unsigned NumElts = VT.getVectorNumElements(); 3043 EVT EltVT = (VT.getVectorElementType() == EVT::f32) ? EVT::i32 : EVT::i64; 3044 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3045 DAG.getConstant(0, EVT::getVectorVT(EltVT, NumElts))); 3046 } 3047 3048 assert(!VT.isVector() && "Can't handle vector type here!"); 3049 unsigned NumBits = VT.getSizeInBits(); 3050 unsigned MSB = NumBits / 8; 3051 uint64_t Val = 0; 3052 if (TLI.isLittleEndian()) 3053 Offset = Offset + MSB - 1; 3054 for (unsigned i = 0; i != MSB; ++i) { 3055 Val = (Val << 8) | (unsigned char)Str[Offset]; 3056 Offset += TLI.isLittleEndian() ? -1 : 1; 3057 } 3058 return DAG.getConstant(Val, VT); 3059} 3060 3061/// getMemBasePlusOffset - Returns base and offset node for the 3062/// 3063static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3064 SelectionDAG &DAG) { 3065 EVT VT = Base.getValueType(); 3066 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3067 VT, Base, DAG.getConstant(Offset, VT)); 3068} 3069 3070/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3071/// 3072static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3073 unsigned SrcDelta = 0; 3074 GlobalAddressSDNode *G = NULL; 3075 if (Src.getOpcode() == ISD::GlobalAddress) 3076 G = cast<GlobalAddressSDNode>(Src); 3077 else if (Src.getOpcode() == ISD::ADD && 3078 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3079 Src.getOperand(1).getOpcode() == ISD::Constant) { 3080 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3081 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3082 } 3083 if (!G) 3084 return false; 3085 3086 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3087 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3088 return true; 3089 3090 return false; 3091} 3092 3093/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3094/// to replace the memset / memcpy is below the threshold. It also returns the 3095/// types of the sequence of memory ops to perform memset / memcpy. 3096static 3097bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps, 3098 SDValue Dst, SDValue Src, 3099 unsigned Limit, uint64_t Size, unsigned &Align, 3100 std::string &Str, bool &isSrcStr, 3101 SelectionDAG &DAG, 3102 const TargetLowering &TLI) { 3103 isSrcStr = isMemSrcFromString(Src, Str); 3104 bool isSrcConst = isa<ConstantSDNode>(Src); 3105 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 3106 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); 3107 if (VT != EVT::iAny) { 3108 unsigned NewAlign = (unsigned) 3109 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForEVT()); 3110 // If source is a string constant, this will require an unaligned load. 3111 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3112 if (Dst.getOpcode() != ISD::FrameIndex) { 3113 // Can't change destination alignment. It requires a unaligned store. 3114 if (AllowUnalign) 3115 VT = EVT::iAny; 3116 } else { 3117 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3118 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3119 if (MFI->isFixedObjectIndex(FI)) { 3120 // Can't change destination alignment. It requires a unaligned store. 3121 if (AllowUnalign) 3122 VT = EVT::iAny; 3123 } else { 3124 // Give the stack frame object a larger alignment if needed. 3125 if (MFI->getObjectAlignment(FI) < NewAlign) 3126 MFI->setObjectAlignment(FI, NewAlign); 3127 Align = NewAlign; 3128 } 3129 } 3130 } 3131 } 3132 3133 if (VT == EVT::iAny) { 3134 if (AllowUnalign) { 3135 VT = EVT::i64; 3136 } else { 3137 switch (Align & 7) { 3138 case 0: VT = EVT::i64; break; 3139 case 4: VT = EVT::i32; break; 3140 case 2: VT = EVT::i16; break; 3141 default: VT = EVT::i8; break; 3142 } 3143 } 3144 3145 EVT LVT = EVT::i64; 3146 while (!TLI.isTypeLegal(LVT)) 3147 LVT = (EVT::SimpleValueType)(LVT.getSimpleVT() - 1); 3148 assert(LVT.isInteger()); 3149 3150 if (VT.bitsGT(LVT)) 3151 VT = LVT; 3152 } 3153 3154 unsigned NumMemOps = 0; 3155 while (Size != 0) { 3156 unsigned VTSize = VT.getSizeInBits() / 8; 3157 while (VTSize > Size) { 3158 // For now, only use non-vector load / store's for the left-over pieces. 3159 if (VT.isVector()) { 3160 VT = EVT::i64; 3161 while (!TLI.isTypeLegal(VT)) 3162 VT = (EVT::SimpleValueType)(VT.getSimpleVT() - 1); 3163 VTSize = VT.getSizeInBits() / 8; 3164 } else { 3165 // This can result in a type that is not legal on the target, e.g. 3166 // 1 or 2 bytes on PPC. 3167 VT = (EVT::SimpleValueType)(VT.getSimpleVT() - 1); 3168 VTSize >>= 1; 3169 } 3170 } 3171 3172 if (++NumMemOps > Limit) 3173 return false; 3174 MemOps.push_back(VT); 3175 Size -= VTSize; 3176 } 3177 3178 return true; 3179} 3180 3181static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3182 SDValue Chain, SDValue Dst, 3183 SDValue Src, uint64_t Size, 3184 unsigned Align, bool AlwaysInline, 3185 const Value *DstSV, uint64_t DstSVOff, 3186 const Value *SrcSV, uint64_t SrcSVOff){ 3187 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3188 3189 // Expand memcpy to a series of load and store ops if the size operand falls 3190 // below a certain threshold. 3191 std::vector<EVT> MemOps; 3192 uint64_t Limit = -1ULL; 3193 if (!AlwaysInline) 3194 Limit = TLI.getMaxStoresPerMemcpy(); 3195 unsigned DstAlign = Align; // Destination alignment can change. 3196 std::string Str; 3197 bool CopyFromStr; 3198 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3199 Str, CopyFromStr, DAG, TLI)) 3200 return SDValue(); 3201 3202 3203 bool isZeroStr = CopyFromStr && Str.empty(); 3204 SmallVector<SDValue, 8> OutChains; 3205 unsigned NumMemOps = MemOps.size(); 3206 uint64_t SrcOff = 0, DstOff = 0; 3207 for (unsigned i = 0; i < NumMemOps; i++) { 3208 EVT VT = MemOps[i]; 3209 unsigned VTSize = VT.getSizeInBits() / 8; 3210 SDValue Value, Store; 3211 3212 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3213 // It's unlikely a store of a vector immediate can be done in a single 3214 // instruction. It would require a load from a constantpool first. 3215 // We also handle store a vector with all zero's. 3216 // FIXME: Handle other cases where store of vector immediate is done in 3217 // a single instruction. 3218 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3219 Store = DAG.getStore(Chain, dl, Value, 3220 getMemBasePlusOffset(Dst, DstOff, DAG), 3221 DstSV, DstSVOff + DstOff, false, DstAlign); 3222 } else { 3223 // The type might not be legal for the target. This should only happen 3224 // if the type is smaller than a legal type, as on PPC, so the right 3225 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3226 // to Load/Store if NVT==VT. 3227 // FIXME does the case above also need this? 3228 EVT NVT = TLI.getTypeToTransformTo(VT); 3229 assert(NVT.bitsGE(VT)); 3230 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3231 getMemBasePlusOffset(Src, SrcOff, DAG), 3232 SrcSV, SrcSVOff + SrcOff, VT, false, Align); 3233 Store = DAG.getTruncStore(Chain, dl, Value, 3234 getMemBasePlusOffset(Dst, DstOff, DAG), 3235 DstSV, DstSVOff + DstOff, VT, false, DstAlign); 3236 } 3237 OutChains.push_back(Store); 3238 SrcOff += VTSize; 3239 DstOff += VTSize; 3240 } 3241 3242 return DAG.getNode(ISD::TokenFactor, dl, EVT::Other, 3243 &OutChains[0], OutChains.size()); 3244} 3245 3246static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3247 SDValue Chain, SDValue Dst, 3248 SDValue Src, uint64_t Size, 3249 unsigned Align, bool AlwaysInline, 3250 const Value *DstSV, uint64_t DstSVOff, 3251 const Value *SrcSV, uint64_t SrcSVOff){ 3252 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3253 3254 // Expand memmove to a series of load and store ops if the size operand falls 3255 // below a certain threshold. 3256 std::vector<EVT> MemOps; 3257 uint64_t Limit = -1ULL; 3258 if (!AlwaysInline) 3259 Limit = TLI.getMaxStoresPerMemmove(); 3260 unsigned DstAlign = Align; // Destination alignment can change. 3261 std::string Str; 3262 bool CopyFromStr; 3263 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3264 Str, CopyFromStr, DAG, TLI)) 3265 return SDValue(); 3266 3267 uint64_t SrcOff = 0, DstOff = 0; 3268 3269 SmallVector<SDValue, 8> LoadValues; 3270 SmallVector<SDValue, 8> LoadChains; 3271 SmallVector<SDValue, 8> OutChains; 3272 unsigned NumMemOps = MemOps.size(); 3273 for (unsigned i = 0; i < NumMemOps; i++) { 3274 EVT VT = MemOps[i]; 3275 unsigned VTSize = VT.getSizeInBits() / 8; 3276 SDValue Value, Store; 3277 3278 Value = DAG.getLoad(VT, dl, Chain, 3279 getMemBasePlusOffset(Src, SrcOff, DAG), 3280 SrcSV, SrcSVOff + SrcOff, false, Align); 3281 LoadValues.push_back(Value); 3282 LoadChains.push_back(Value.getValue(1)); 3283 SrcOff += VTSize; 3284 } 3285 Chain = DAG.getNode(ISD::TokenFactor, dl, EVT::Other, 3286 &LoadChains[0], LoadChains.size()); 3287 OutChains.clear(); 3288 for (unsigned i = 0; i < NumMemOps; i++) { 3289 EVT VT = MemOps[i]; 3290 unsigned VTSize = VT.getSizeInBits() / 8; 3291 SDValue Value, Store; 3292 3293 Store = DAG.getStore(Chain, dl, LoadValues[i], 3294 getMemBasePlusOffset(Dst, DstOff, DAG), 3295 DstSV, DstSVOff + DstOff, false, DstAlign); 3296 OutChains.push_back(Store); 3297 DstOff += VTSize; 3298 } 3299 3300 return DAG.getNode(ISD::TokenFactor, dl, EVT::Other, 3301 &OutChains[0], OutChains.size()); 3302} 3303 3304static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3305 SDValue Chain, SDValue Dst, 3306 SDValue Src, uint64_t Size, 3307 unsigned Align, 3308 const Value *DstSV, uint64_t DstSVOff) { 3309 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3310 3311 // Expand memset to a series of load/store ops if the size operand 3312 // falls below a certain threshold. 3313 std::vector<EVT> MemOps; 3314 std::string Str; 3315 bool CopyFromStr; 3316 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3317 Size, Align, Str, CopyFromStr, DAG, TLI)) 3318 return SDValue(); 3319 3320 SmallVector<SDValue, 8> OutChains; 3321 uint64_t DstOff = 0; 3322 3323 unsigned NumMemOps = MemOps.size(); 3324 for (unsigned i = 0; i < NumMemOps; i++) { 3325 EVT VT = MemOps[i]; 3326 unsigned VTSize = VT.getSizeInBits() / 8; 3327 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3328 SDValue Store = DAG.getStore(Chain, dl, Value, 3329 getMemBasePlusOffset(Dst, DstOff, DAG), 3330 DstSV, DstSVOff + DstOff); 3331 OutChains.push_back(Store); 3332 DstOff += VTSize; 3333 } 3334 3335 return DAG.getNode(ISD::TokenFactor, dl, EVT::Other, 3336 &OutChains[0], OutChains.size()); 3337} 3338 3339SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3340 SDValue Src, SDValue Size, 3341 unsigned Align, bool AlwaysInline, 3342 const Value *DstSV, uint64_t DstSVOff, 3343 const Value *SrcSV, uint64_t SrcSVOff) { 3344 3345 // Check to see if we should lower the memcpy to loads and stores first. 3346 // For cases within the target-specified limits, this is the best choice. 3347 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3348 if (ConstantSize) { 3349 // Memcpy with size zero? Just return the original chain. 3350 if (ConstantSize->isNullValue()) 3351 return Chain; 3352 3353 SDValue Result = 3354 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3355 ConstantSize->getZExtValue(), 3356 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3357 if (Result.getNode()) 3358 return Result; 3359 } 3360 3361 // Then check to see if we should lower the memcpy with target-specific 3362 // code. If the target chooses to do this, this is the next best. 3363 SDValue Result = 3364 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3365 AlwaysInline, 3366 DstSV, DstSVOff, SrcSV, SrcSVOff); 3367 if (Result.getNode()) 3368 return Result; 3369 3370 // If we really need inline code and the target declined to provide it, 3371 // use a (potentially long) sequence of loads and stores. 3372 if (AlwaysInline) { 3373 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3374 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3375 ConstantSize->getZExtValue(), Align, true, 3376 DstSV, DstSVOff, SrcSV, SrcSVOff); 3377 } 3378 3379 // Emit a library call. 3380 TargetLowering::ArgListTy Args; 3381 TargetLowering::ArgListEntry Entry; 3382 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3383 Entry.Node = Dst; Args.push_back(Entry); 3384 Entry.Node = Src; Args.push_back(Entry); 3385 Entry.Node = Size; Args.push_back(Entry); 3386 // FIXME: pass in DebugLoc 3387 std::pair<SDValue,SDValue> CallResult = 3388 TLI.LowerCallTo(Chain, Type::VoidTy, 3389 false, false, false, false, 0, CallingConv::C, false, 3390 /*isReturnValueUsed=*/false, 3391 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3392 TLI.getPointerTy()), 3393 Args, *this, dl); 3394 return CallResult.second; 3395} 3396 3397SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3398 SDValue Src, SDValue Size, 3399 unsigned Align, 3400 const Value *DstSV, uint64_t DstSVOff, 3401 const Value *SrcSV, uint64_t SrcSVOff) { 3402 3403 // Check to see if we should lower the memmove to loads and stores first. 3404 // For cases within the target-specified limits, this is the best choice. 3405 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3406 if (ConstantSize) { 3407 // Memmove with size zero? Just return the original chain. 3408 if (ConstantSize->isNullValue()) 3409 return Chain; 3410 3411 SDValue Result = 3412 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3413 ConstantSize->getZExtValue(), 3414 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3415 if (Result.getNode()) 3416 return Result; 3417 } 3418 3419 // Then check to see if we should lower the memmove with target-specific 3420 // code. If the target chooses to do this, this is the next best. 3421 SDValue Result = 3422 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, 3423 DstSV, DstSVOff, SrcSV, SrcSVOff); 3424 if (Result.getNode()) 3425 return Result; 3426 3427 // Emit a library call. 3428 TargetLowering::ArgListTy Args; 3429 TargetLowering::ArgListEntry Entry; 3430 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3431 Entry.Node = Dst; Args.push_back(Entry); 3432 Entry.Node = Src; Args.push_back(Entry); 3433 Entry.Node = Size; Args.push_back(Entry); 3434 // FIXME: pass in DebugLoc 3435 std::pair<SDValue,SDValue> CallResult = 3436 TLI.LowerCallTo(Chain, Type::VoidTy, 3437 false, false, false, false, 0, CallingConv::C, false, 3438 /*isReturnValueUsed=*/false, 3439 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3440 TLI.getPointerTy()), 3441 Args, *this, dl); 3442 return CallResult.second; 3443} 3444 3445SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3446 SDValue Src, SDValue Size, 3447 unsigned Align, 3448 const Value *DstSV, uint64_t DstSVOff) { 3449 3450 // Check to see if we should lower the memset to stores first. 3451 // For cases within the target-specified limits, this is the best choice. 3452 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3453 if (ConstantSize) { 3454 // Memset with size zero? Just return the original chain. 3455 if (ConstantSize->isNullValue()) 3456 return Chain; 3457 3458 SDValue Result = 3459 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3460 Align, DstSV, DstSVOff); 3461 if (Result.getNode()) 3462 return Result; 3463 } 3464 3465 // Then check to see if we should lower the memset with target-specific 3466 // code. If the target chooses to do this, this is the next best. 3467 SDValue Result = 3468 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, 3469 DstSV, DstSVOff); 3470 if (Result.getNode()) 3471 return Result; 3472 3473 // Emit a library call. 3474 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3475 TargetLowering::ArgListTy Args; 3476 TargetLowering::ArgListEntry Entry; 3477 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3478 Args.push_back(Entry); 3479 // Extend or truncate the argument to be an i32 value for the call. 3480 if (Src.getValueType().bitsGT(EVT::i32)) 3481 Src = getNode(ISD::TRUNCATE, dl, EVT::i32, Src); 3482 else 3483 Src = getNode(ISD::ZERO_EXTEND, dl, EVT::i32, Src); 3484 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3485 Args.push_back(Entry); 3486 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3487 Args.push_back(Entry); 3488 // FIXME: pass in DebugLoc 3489 std::pair<SDValue,SDValue> CallResult = 3490 TLI.LowerCallTo(Chain, Type::VoidTy, 3491 false, false, false, false, 0, CallingConv::C, false, 3492 /*isReturnValueUsed=*/false, 3493 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3494 TLI.getPointerTy()), 3495 Args, *this, dl); 3496 return CallResult.second; 3497} 3498 3499SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3500 SDValue Chain, 3501 SDValue Ptr, SDValue Cmp, 3502 SDValue Swp, const Value* PtrVal, 3503 unsigned Alignment) { 3504 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3505 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3506 3507 EVT VT = Cmp.getValueType(); 3508 3509 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3510 Alignment = getEVTAlignment(MemVT); 3511 3512 SDVTList VTs = getVTList(VT, EVT::Other); 3513 FoldingSetNodeID ID; 3514 ID.AddInteger(MemVT.getRawBits()); 3515 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3516 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3517 void* IP = 0; 3518 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3519 return SDValue(E, 0); 3520 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3521 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3522 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3523 CSEMap.InsertNode(N, IP); 3524 AllNodes.push_back(N); 3525 return SDValue(N, 0); 3526} 3527 3528SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3529 SDValue Chain, 3530 SDValue Ptr, SDValue Val, 3531 const Value* PtrVal, 3532 unsigned Alignment) { 3533 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3534 Opcode == ISD::ATOMIC_LOAD_SUB || 3535 Opcode == ISD::ATOMIC_LOAD_AND || 3536 Opcode == ISD::ATOMIC_LOAD_OR || 3537 Opcode == ISD::ATOMIC_LOAD_XOR || 3538 Opcode == ISD::ATOMIC_LOAD_NAND || 3539 Opcode == ISD::ATOMIC_LOAD_MIN || 3540 Opcode == ISD::ATOMIC_LOAD_MAX || 3541 Opcode == ISD::ATOMIC_LOAD_UMIN || 3542 Opcode == ISD::ATOMIC_LOAD_UMAX || 3543 Opcode == ISD::ATOMIC_SWAP) && 3544 "Invalid Atomic Op"); 3545 3546 EVT VT = Val.getValueType(); 3547 3548 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3549 Alignment = getEVTAlignment(MemVT); 3550 3551 SDVTList VTs = getVTList(VT, EVT::Other); 3552 FoldingSetNodeID ID; 3553 ID.AddInteger(MemVT.getRawBits()); 3554 SDValue Ops[] = {Chain, Ptr, Val}; 3555 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3556 void* IP = 0; 3557 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3558 return SDValue(E, 0); 3559 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3560 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3561 Chain, Ptr, Val, PtrVal, Alignment); 3562 CSEMap.InsertNode(N, IP); 3563 AllNodes.push_back(N); 3564 return SDValue(N, 0); 3565} 3566 3567/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3568/// Allowed to return something different (and simpler) if Simplify is true. 3569SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3570 DebugLoc dl) { 3571 if (NumOps == 1) 3572 return Ops[0]; 3573 3574 SmallVector<EVT, 4> VTs; 3575 VTs.reserve(NumOps); 3576 for (unsigned i = 0; i < NumOps; ++i) 3577 VTs.push_back(Ops[i].getValueType()); 3578 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3579 Ops, NumOps); 3580} 3581 3582SDValue 3583SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3584 const EVT *VTs, unsigned NumVTs, 3585 const SDValue *Ops, unsigned NumOps, 3586 EVT MemVT, const Value *srcValue, int SVOff, 3587 unsigned Align, bool Vol, 3588 bool ReadMem, bool WriteMem) { 3589 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3590 MemVT, srcValue, SVOff, Align, Vol, 3591 ReadMem, WriteMem); 3592} 3593 3594SDValue 3595SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3596 const SDValue *Ops, unsigned NumOps, 3597 EVT MemVT, const Value *srcValue, int SVOff, 3598 unsigned Align, bool Vol, 3599 bool ReadMem, bool WriteMem) { 3600 // Memoize the node unless it returns a flag. 3601 MemIntrinsicSDNode *N; 3602 if (VTList.VTs[VTList.NumVTs-1] != EVT::Flag) { 3603 FoldingSetNodeID ID; 3604 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3605 void *IP = 0; 3606 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3607 return SDValue(E, 0); 3608 3609 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3610 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3611 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3612 CSEMap.InsertNode(N, IP); 3613 } else { 3614 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3615 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3616 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3617 } 3618 AllNodes.push_back(N); 3619 return SDValue(N, 0); 3620} 3621 3622SDValue 3623SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3624 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3625 SDValue Ptr, SDValue Offset, 3626 const Value *SV, int SVOffset, EVT EVT, 3627 bool isVolatile, unsigned Alignment) { 3628 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3629 Alignment = getEVTAlignment(VT); 3630 3631 if (VT == EVT) { 3632 ExtType = ISD::NON_EXTLOAD; 3633 } else if (ExtType == ISD::NON_EXTLOAD) { 3634 assert(VT == EVT && "Non-extending load from different memory type!"); 3635 } else { 3636 // Extending load. 3637 if (VT.isVector()) 3638 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3639 "Invalid vector extload!"); 3640 else 3641 assert(EVT.bitsLT(VT) && 3642 "Should only be an extending load, not truncating!"); 3643 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3644 "Cannot sign/zero extend a FP/Vector load!"); 3645 assert(VT.isInteger() == EVT.isInteger() && 3646 "Cannot convert from FP to Int or Int -> FP!"); 3647 } 3648 3649 bool Indexed = AM != ISD::UNINDEXED; 3650 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3651 "Unindexed load with an offset!"); 3652 3653 SDVTList VTs = Indexed ? 3654 getVTList(VT, Ptr.getValueType(), EVT::Other) : getVTList(VT, EVT::Other); 3655 SDValue Ops[] = { Chain, Ptr, Offset }; 3656 FoldingSetNodeID ID; 3657 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3658 ID.AddInteger(EVT.getRawBits()); 3659 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment)); 3660 void *IP = 0; 3661 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3662 return SDValue(E, 0); 3663 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3664 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset, 3665 Alignment, isVolatile); 3666 CSEMap.InsertNode(N, IP); 3667 AllNodes.push_back(N); 3668 return SDValue(N, 0); 3669} 3670 3671SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3672 SDValue Chain, SDValue Ptr, 3673 const Value *SV, int SVOffset, 3674 bool isVolatile, unsigned Alignment) { 3675 SDValue Undef = getUNDEF(Ptr.getValueType()); 3676 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3677 SV, SVOffset, VT, isVolatile, Alignment); 3678} 3679 3680SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3681 SDValue Chain, SDValue Ptr, 3682 const Value *SV, 3683 int SVOffset, EVT EVT, 3684 bool isVolatile, unsigned Alignment) { 3685 SDValue Undef = getUNDEF(Ptr.getValueType()); 3686 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3687 SV, SVOffset, EVT, isVolatile, Alignment); 3688} 3689 3690SDValue 3691SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3692 SDValue Offset, ISD::MemIndexedMode AM) { 3693 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3694 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3695 "Load is already a indexed load!"); 3696 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3697 LD->getChain(), Base, Offset, LD->getSrcValue(), 3698 LD->getSrcValueOffset(), LD->getMemoryVT(), 3699 LD->isVolatile(), LD->getAlignment()); 3700} 3701 3702SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3703 SDValue Ptr, const Value *SV, int SVOffset, 3704 bool isVolatile, unsigned Alignment) { 3705 EVT VT = Val.getValueType(); 3706 3707 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3708 Alignment = getEVTAlignment(VT); 3709 3710 SDVTList VTs = getVTList(EVT::Other); 3711 SDValue Undef = getUNDEF(Ptr.getValueType()); 3712 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3713 FoldingSetNodeID ID; 3714 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3715 ID.AddInteger(VT.getRawBits()); 3716 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, 3717 isVolatile, Alignment)); 3718 void *IP = 0; 3719 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3720 return SDValue(E, 0); 3721 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3722 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, 3723 VT, SV, SVOffset, Alignment, isVolatile); 3724 CSEMap.InsertNode(N, IP); 3725 AllNodes.push_back(N); 3726 return SDValue(N, 0); 3727} 3728 3729SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3730 SDValue Ptr, const Value *SV, 3731 int SVOffset, EVT SVT, 3732 bool isVolatile, unsigned Alignment) { 3733 EVT VT = Val.getValueType(); 3734 3735 if (VT == SVT) 3736 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3737 3738 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3739 assert(VT.isInteger() == SVT.isInteger() && 3740 "Can't do FP-INT conversion!"); 3741 3742 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3743 Alignment = getEVTAlignment(VT); 3744 3745 SDVTList VTs = getVTList(EVT::Other); 3746 SDValue Undef = getUNDEF(Ptr.getValueType()); 3747 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3748 FoldingSetNodeID ID; 3749 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3750 ID.AddInteger(SVT.getRawBits()); 3751 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, 3752 isVolatile, Alignment)); 3753 void *IP = 0; 3754 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3755 return SDValue(E, 0); 3756 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3757 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, 3758 SVT, SV, SVOffset, Alignment, isVolatile); 3759 CSEMap.InsertNode(N, IP); 3760 AllNodes.push_back(N); 3761 return SDValue(N, 0); 3762} 3763 3764SDValue 3765SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 3766 SDValue Offset, ISD::MemIndexedMode AM) { 3767 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3768 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3769 "Store is already a indexed store!"); 3770 SDVTList VTs = getVTList(Base.getValueType(), EVT::Other); 3771 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3772 FoldingSetNodeID ID; 3773 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3774 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3775 ID.AddInteger(ST->getRawSubclassData()); 3776 void *IP = 0; 3777 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3778 return SDValue(E, 0); 3779 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3780 new (N) StoreSDNode(Ops, dl, VTs, AM, 3781 ST->isTruncatingStore(), ST->getMemoryVT(), 3782 ST->getSrcValue(), ST->getSrcValueOffset(), 3783 ST->getAlignment(), ST->isVolatile()); 3784 CSEMap.InsertNode(N, IP); 3785 AllNodes.push_back(N); 3786 return SDValue(N, 0); 3787} 3788 3789SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 3790 SDValue Chain, SDValue Ptr, 3791 SDValue SV) { 3792 SDValue Ops[] = { Chain, Ptr, SV }; 3793 return getNode(ISD::VAARG, dl, getVTList(VT, EVT::Other), Ops, 3); 3794} 3795 3796SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3797 const SDUse *Ops, unsigned NumOps) { 3798 switch (NumOps) { 3799 case 0: return getNode(Opcode, DL, VT); 3800 case 1: return getNode(Opcode, DL, VT, Ops[0]); 3801 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 3802 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 3803 default: break; 3804 } 3805 3806 // Copy from an SDUse array into an SDValue array for use with 3807 // the regular getNode logic. 3808 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3809 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 3810} 3811 3812SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3813 const SDValue *Ops, unsigned NumOps) { 3814 switch (NumOps) { 3815 case 0: return getNode(Opcode, DL, VT); 3816 case 1: return getNode(Opcode, DL, VT, Ops[0]); 3817 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 3818 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 3819 default: break; 3820 } 3821 3822 switch (Opcode) { 3823 default: break; 3824 case ISD::SELECT_CC: { 3825 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3826 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3827 "LHS and RHS of condition must have same type!"); 3828 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3829 "True and False arms of SelectCC must have same type!"); 3830 assert(Ops[2].getValueType() == VT && 3831 "select_cc node must be of same type as true and false value!"); 3832 break; 3833 } 3834 case ISD::BR_CC: { 3835 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3836 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3837 "LHS/RHS of comparison should match types!"); 3838 break; 3839 } 3840 } 3841 3842 // Memoize nodes. 3843 SDNode *N; 3844 SDVTList VTs = getVTList(VT); 3845 3846 if (VT != EVT::Flag) { 3847 FoldingSetNodeID ID; 3848 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3849 void *IP = 0; 3850 3851 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3852 return SDValue(E, 0); 3853 3854 N = NodeAllocator.Allocate<SDNode>(); 3855 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 3856 CSEMap.InsertNode(N, IP); 3857 } else { 3858 N = NodeAllocator.Allocate<SDNode>(); 3859 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 3860 } 3861 3862 AllNodes.push_back(N); 3863#ifndef NDEBUG 3864 VerifyNode(N); 3865#endif 3866 return SDValue(N, 0); 3867} 3868 3869SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 3870 const std::vector<EVT> &ResultTys, 3871 const SDValue *Ops, unsigned NumOps) { 3872 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 3873 Ops, NumOps); 3874} 3875 3876SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 3877 const EVT *VTs, unsigned NumVTs, 3878 const SDValue *Ops, unsigned NumOps) { 3879 if (NumVTs == 1) 3880 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 3881 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 3882} 3883 3884SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3885 const SDValue *Ops, unsigned NumOps) { 3886 if (VTList.NumVTs == 1) 3887 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 3888 3889#if 0 3890 switch (Opcode) { 3891 // FIXME: figure out how to safely handle things like 3892 // int foo(int x) { return 1 << (x & 255); } 3893 // int bar() { return foo(256); } 3894 case ISD::SRA_PARTS: 3895 case ISD::SRL_PARTS: 3896 case ISD::SHL_PARTS: 3897 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3898 cast<VTSDNode>(N3.getOperand(1))->getVT() != EVT::i1) 3899 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 3900 else if (N3.getOpcode() == ISD::AND) 3901 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3902 // If the and is only masking out bits that cannot effect the shift, 3903 // eliminate the and. 3904 unsigned NumBits = VT.getSizeInBits()*2; 3905 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3906 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 3907 } 3908 break; 3909 } 3910#endif 3911 3912 // Memoize the node unless it returns a flag. 3913 SDNode *N; 3914 if (VTList.VTs[VTList.NumVTs-1] != EVT::Flag) { 3915 FoldingSetNodeID ID; 3916 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3917 void *IP = 0; 3918 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3919 return SDValue(E, 0); 3920 if (NumOps == 1) { 3921 N = NodeAllocator.Allocate<UnarySDNode>(); 3922 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 3923 } else if (NumOps == 2) { 3924 N = NodeAllocator.Allocate<BinarySDNode>(); 3925 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 3926 } else if (NumOps == 3) { 3927 N = NodeAllocator.Allocate<TernarySDNode>(); 3928 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 3929 } else { 3930 N = NodeAllocator.Allocate<SDNode>(); 3931 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 3932 } 3933 CSEMap.InsertNode(N, IP); 3934 } else { 3935 if (NumOps == 1) { 3936 N = NodeAllocator.Allocate<UnarySDNode>(); 3937 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 3938 } else if (NumOps == 2) { 3939 N = NodeAllocator.Allocate<BinarySDNode>(); 3940 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 3941 } else if (NumOps == 3) { 3942 N = NodeAllocator.Allocate<TernarySDNode>(); 3943 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 3944 } else { 3945 N = NodeAllocator.Allocate<SDNode>(); 3946 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 3947 } 3948 } 3949 AllNodes.push_back(N); 3950#ifndef NDEBUG 3951 VerifyNode(N); 3952#endif 3953 return SDValue(N, 0); 3954} 3955 3956SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 3957 return getNode(Opcode, DL, VTList, 0, 0); 3958} 3959 3960SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3961 SDValue N1) { 3962 SDValue Ops[] = { N1 }; 3963 return getNode(Opcode, DL, VTList, Ops, 1); 3964} 3965 3966SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3967 SDValue N1, SDValue N2) { 3968 SDValue Ops[] = { N1, N2 }; 3969 return getNode(Opcode, DL, VTList, Ops, 2); 3970} 3971 3972SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3973 SDValue N1, SDValue N2, SDValue N3) { 3974 SDValue Ops[] = { N1, N2, N3 }; 3975 return getNode(Opcode, DL, VTList, Ops, 3); 3976} 3977 3978SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3979 SDValue N1, SDValue N2, SDValue N3, 3980 SDValue N4) { 3981 SDValue Ops[] = { N1, N2, N3, N4 }; 3982 return getNode(Opcode, DL, VTList, Ops, 4); 3983} 3984 3985SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3986 SDValue N1, SDValue N2, SDValue N3, 3987 SDValue N4, SDValue N5) { 3988 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3989 return getNode(Opcode, DL, VTList, Ops, 5); 3990} 3991 3992SDVTList SelectionDAG::getVTList(EVT VT) { 3993 return makeVTList(SDNode::getValueTypeList(VT), 1); 3994} 3995 3996SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 3997 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3998 E = VTList.rend(); I != E; ++I) 3999 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4000 return *I; 4001 4002 EVT *Array = Allocator.Allocate<EVT>(2); 4003 Array[0] = VT1; 4004 Array[1] = VT2; 4005 SDVTList Result = makeVTList(Array, 2); 4006 VTList.push_back(Result); 4007 return Result; 4008} 4009 4010SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4011 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4012 E = VTList.rend(); I != E; ++I) 4013 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4014 I->VTs[2] == VT3) 4015 return *I; 4016 4017 EVT *Array = Allocator.Allocate<EVT>(3); 4018 Array[0] = VT1; 4019 Array[1] = VT2; 4020 Array[2] = VT3; 4021 SDVTList Result = makeVTList(Array, 3); 4022 VTList.push_back(Result); 4023 return Result; 4024} 4025 4026SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4027 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4028 E = VTList.rend(); I != E; ++I) 4029 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4030 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4031 return *I; 4032 4033 EVT *Array = Allocator.Allocate<EVT>(3); 4034 Array[0] = VT1; 4035 Array[1] = VT2; 4036 Array[2] = VT3; 4037 Array[3] = VT4; 4038 SDVTList Result = makeVTList(Array, 4); 4039 VTList.push_back(Result); 4040 return Result; 4041} 4042 4043SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4044 switch (NumVTs) { 4045 case 0: llvm_unreachable("Cannot have nodes without results!"); 4046 case 1: return getVTList(VTs[0]); 4047 case 2: return getVTList(VTs[0], VTs[1]); 4048 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4049 default: break; 4050 } 4051 4052 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4053 E = VTList.rend(); I != E; ++I) { 4054 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4055 continue; 4056 4057 bool NoMatch = false; 4058 for (unsigned i = 2; i != NumVTs; ++i) 4059 if (VTs[i] != I->VTs[i]) { 4060 NoMatch = true; 4061 break; 4062 } 4063 if (!NoMatch) 4064 return *I; 4065 } 4066 4067 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4068 std::copy(VTs, VTs+NumVTs, Array); 4069 SDVTList Result = makeVTList(Array, NumVTs); 4070 VTList.push_back(Result); 4071 return Result; 4072} 4073 4074 4075/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4076/// specified operands. If the resultant node already exists in the DAG, 4077/// this does not modify the specified node, instead it returns the node that 4078/// already exists. If the resultant node does not exist in the DAG, the 4079/// input node is returned. As a degenerate case, if you specify the same 4080/// input operands as the node already has, the input node is returned. 4081SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4082 SDNode *N = InN.getNode(); 4083 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4084 4085 // Check to see if there is no change. 4086 if (Op == N->getOperand(0)) return InN; 4087 4088 // See if the modified node already exists. 4089 void *InsertPos = 0; 4090 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4091 return SDValue(Existing, InN.getResNo()); 4092 4093 // Nope it doesn't. Remove the node from its current place in the maps. 4094 if (InsertPos) 4095 if (!RemoveNodeFromCSEMaps(N)) 4096 InsertPos = 0; 4097 4098 // Now we update the operands. 4099 N->OperandList[0].set(Op); 4100 4101 // If this gets put into a CSE map, add it. 4102 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4103 return InN; 4104} 4105 4106SDValue SelectionDAG:: 4107UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4108 SDNode *N = InN.getNode(); 4109 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4110 4111 // Check to see if there is no change. 4112 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4113 return InN; // No operands changed, just return the input node. 4114 4115 // See if the modified node already exists. 4116 void *InsertPos = 0; 4117 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4118 return SDValue(Existing, InN.getResNo()); 4119 4120 // Nope it doesn't. Remove the node from its current place in the maps. 4121 if (InsertPos) 4122 if (!RemoveNodeFromCSEMaps(N)) 4123 InsertPos = 0; 4124 4125 // Now we update the operands. 4126 if (N->OperandList[0] != Op1) 4127 N->OperandList[0].set(Op1); 4128 if (N->OperandList[1] != Op2) 4129 N->OperandList[1].set(Op2); 4130 4131 // If this gets put into a CSE map, add it. 4132 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4133 return InN; 4134} 4135 4136SDValue SelectionDAG:: 4137UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4138 SDValue Ops[] = { Op1, Op2, Op3 }; 4139 return UpdateNodeOperands(N, Ops, 3); 4140} 4141 4142SDValue SelectionDAG:: 4143UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4144 SDValue Op3, SDValue Op4) { 4145 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4146 return UpdateNodeOperands(N, Ops, 4); 4147} 4148 4149SDValue SelectionDAG:: 4150UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4151 SDValue Op3, SDValue Op4, SDValue Op5) { 4152 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4153 return UpdateNodeOperands(N, Ops, 5); 4154} 4155 4156SDValue SelectionDAG:: 4157UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4158 SDNode *N = InN.getNode(); 4159 assert(N->getNumOperands() == NumOps && 4160 "Update with wrong number of operands"); 4161 4162 // Check to see if there is no change. 4163 bool AnyChange = false; 4164 for (unsigned i = 0; i != NumOps; ++i) { 4165 if (Ops[i] != N->getOperand(i)) { 4166 AnyChange = true; 4167 break; 4168 } 4169 } 4170 4171 // No operands changed, just return the input node. 4172 if (!AnyChange) return InN; 4173 4174 // See if the modified node already exists. 4175 void *InsertPos = 0; 4176 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4177 return SDValue(Existing, InN.getResNo()); 4178 4179 // Nope it doesn't. Remove the node from its current place in the maps. 4180 if (InsertPos) 4181 if (!RemoveNodeFromCSEMaps(N)) 4182 InsertPos = 0; 4183 4184 // Now we update the operands. 4185 for (unsigned i = 0; i != NumOps; ++i) 4186 if (N->OperandList[i] != Ops[i]) 4187 N->OperandList[i].set(Ops[i]); 4188 4189 // If this gets put into a CSE map, add it. 4190 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4191 return InN; 4192} 4193 4194/// DropOperands - Release the operands and set this node to have 4195/// zero operands. 4196void SDNode::DropOperands() { 4197 // Unlike the code in MorphNodeTo that does this, we don't need to 4198 // watch for dead nodes here. 4199 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4200 SDUse &Use = *I++; 4201 Use.set(SDValue()); 4202 } 4203} 4204 4205/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4206/// machine opcode. 4207/// 4208SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4209 EVT VT) { 4210 SDVTList VTs = getVTList(VT); 4211 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4212} 4213 4214SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4215 EVT VT, SDValue Op1) { 4216 SDVTList VTs = getVTList(VT); 4217 SDValue Ops[] = { Op1 }; 4218 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4219} 4220 4221SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4222 EVT VT, SDValue Op1, 4223 SDValue Op2) { 4224 SDVTList VTs = getVTList(VT); 4225 SDValue Ops[] = { Op1, Op2 }; 4226 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4227} 4228 4229SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4230 EVT VT, SDValue Op1, 4231 SDValue Op2, SDValue Op3) { 4232 SDVTList VTs = getVTList(VT); 4233 SDValue Ops[] = { Op1, Op2, Op3 }; 4234 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4235} 4236 4237SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4238 EVT VT, const SDValue *Ops, 4239 unsigned NumOps) { 4240 SDVTList VTs = getVTList(VT); 4241 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4242} 4243 4244SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4245 EVT VT1, EVT VT2, const SDValue *Ops, 4246 unsigned NumOps) { 4247 SDVTList VTs = getVTList(VT1, VT2); 4248 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4249} 4250 4251SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4252 EVT VT1, EVT VT2) { 4253 SDVTList VTs = getVTList(VT1, VT2); 4254 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4255} 4256 4257SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4258 EVT VT1, EVT VT2, EVT VT3, 4259 const SDValue *Ops, unsigned NumOps) { 4260 SDVTList VTs = getVTList(VT1, VT2, VT3); 4261 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4262} 4263 4264SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4265 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4266 const SDValue *Ops, unsigned NumOps) { 4267 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4268 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4269} 4270 4271SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4272 EVT VT1, EVT VT2, 4273 SDValue Op1) { 4274 SDVTList VTs = getVTList(VT1, VT2); 4275 SDValue Ops[] = { Op1 }; 4276 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4277} 4278 4279SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4280 EVT VT1, EVT VT2, 4281 SDValue Op1, SDValue Op2) { 4282 SDVTList VTs = getVTList(VT1, VT2); 4283 SDValue Ops[] = { Op1, Op2 }; 4284 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4285} 4286 4287SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4288 EVT VT1, EVT VT2, 4289 SDValue Op1, SDValue Op2, 4290 SDValue Op3) { 4291 SDVTList VTs = getVTList(VT1, VT2); 4292 SDValue Ops[] = { Op1, Op2, Op3 }; 4293 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4294} 4295 4296SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4297 EVT VT1, EVT VT2, EVT VT3, 4298 SDValue Op1, SDValue Op2, 4299 SDValue Op3) { 4300 SDVTList VTs = getVTList(VT1, VT2, VT3); 4301 SDValue Ops[] = { Op1, Op2, Op3 }; 4302 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4303} 4304 4305SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4306 SDVTList VTs, const SDValue *Ops, 4307 unsigned NumOps) { 4308 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4309} 4310 4311SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4312 EVT VT) { 4313 SDVTList VTs = getVTList(VT); 4314 return MorphNodeTo(N, Opc, VTs, 0, 0); 4315} 4316 4317SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4318 EVT VT, SDValue Op1) { 4319 SDVTList VTs = getVTList(VT); 4320 SDValue Ops[] = { Op1 }; 4321 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4322} 4323 4324SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4325 EVT VT, SDValue Op1, 4326 SDValue Op2) { 4327 SDVTList VTs = getVTList(VT); 4328 SDValue Ops[] = { Op1, Op2 }; 4329 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4330} 4331 4332SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4333 EVT VT, SDValue Op1, 4334 SDValue Op2, SDValue Op3) { 4335 SDVTList VTs = getVTList(VT); 4336 SDValue Ops[] = { Op1, Op2, Op3 }; 4337 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4338} 4339 4340SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4341 EVT VT, const SDValue *Ops, 4342 unsigned NumOps) { 4343 SDVTList VTs = getVTList(VT); 4344 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4345} 4346 4347SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4348 EVT VT1, EVT VT2, const SDValue *Ops, 4349 unsigned NumOps) { 4350 SDVTList VTs = getVTList(VT1, VT2); 4351 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4352} 4353 4354SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4355 EVT VT1, EVT VT2) { 4356 SDVTList VTs = getVTList(VT1, VT2); 4357 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4358} 4359 4360SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4361 EVT VT1, EVT VT2, EVT VT3, 4362 const SDValue *Ops, unsigned NumOps) { 4363 SDVTList VTs = getVTList(VT1, VT2, VT3); 4364 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4365} 4366 4367SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4368 EVT VT1, EVT VT2, 4369 SDValue Op1) { 4370 SDVTList VTs = getVTList(VT1, VT2); 4371 SDValue Ops[] = { Op1 }; 4372 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4373} 4374 4375SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4376 EVT VT1, EVT VT2, 4377 SDValue Op1, SDValue Op2) { 4378 SDVTList VTs = getVTList(VT1, VT2); 4379 SDValue Ops[] = { Op1, Op2 }; 4380 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4381} 4382 4383SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4384 EVT VT1, EVT VT2, 4385 SDValue Op1, SDValue Op2, 4386 SDValue Op3) { 4387 SDVTList VTs = getVTList(VT1, VT2); 4388 SDValue Ops[] = { Op1, Op2, Op3 }; 4389 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4390} 4391 4392/// MorphNodeTo - These *mutate* the specified node to have the specified 4393/// return type, opcode, and operands. 4394/// 4395/// Note that MorphNodeTo returns the resultant node. If there is already a 4396/// node of the specified opcode and operands, it returns that node instead of 4397/// the current one. Note that the DebugLoc need not be the same. 4398/// 4399/// Using MorphNodeTo is faster than creating a new node and swapping it in 4400/// with ReplaceAllUsesWith both because it often avoids allocating a new 4401/// node, and because it doesn't require CSE recalculation for any of 4402/// the node's users. 4403/// 4404SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4405 SDVTList VTs, const SDValue *Ops, 4406 unsigned NumOps) { 4407 // If an identical node already exists, use it. 4408 void *IP = 0; 4409 if (VTs.VTs[VTs.NumVTs-1] != EVT::Flag) { 4410 FoldingSetNodeID ID; 4411 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4412 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4413 return ON; 4414 } 4415 4416 if (!RemoveNodeFromCSEMaps(N)) 4417 IP = 0; 4418 4419 // Start the morphing. 4420 N->NodeType = Opc; 4421 N->ValueList = VTs.VTs; 4422 N->NumValues = VTs.NumVTs; 4423 4424 // Clear the operands list, updating used nodes to remove this from their 4425 // use list. Keep track of any operands that become dead as a result. 4426 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4427 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4428 SDUse &Use = *I++; 4429 SDNode *Used = Use.getNode(); 4430 Use.set(SDValue()); 4431 if (Used->use_empty()) 4432 DeadNodeSet.insert(Used); 4433 } 4434 4435 // If NumOps is larger than the # of operands we currently have, reallocate 4436 // the operand list. 4437 if (NumOps > N->NumOperands) { 4438 if (N->OperandsNeedDelete) 4439 delete[] N->OperandList; 4440 4441 if (N->isMachineOpcode()) { 4442 // We're creating a final node that will live unmorphed for the 4443 // remainder of the current SelectionDAG iteration, so we can allocate 4444 // the operands directly out of a pool with no recycling metadata. 4445 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4446 N->OperandsNeedDelete = false; 4447 } else { 4448 N->OperandList = new SDUse[NumOps]; 4449 N->OperandsNeedDelete = true; 4450 } 4451 } 4452 4453 // Assign the new operands. 4454 N->NumOperands = NumOps; 4455 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4456 N->OperandList[i].setUser(N); 4457 N->OperandList[i].setInitial(Ops[i]); 4458 } 4459 4460 // Delete any nodes that are still dead after adding the uses for the 4461 // new operands. 4462 SmallVector<SDNode *, 16> DeadNodes; 4463 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4464 E = DeadNodeSet.end(); I != E; ++I) 4465 if ((*I)->use_empty()) 4466 DeadNodes.push_back(*I); 4467 RemoveDeadNodes(DeadNodes); 4468 4469 if (IP) 4470 CSEMap.InsertNode(N, IP); // Memoize the new node. 4471 return N; 4472} 4473 4474 4475/// getTargetNode - These are used for target selectors to create a new node 4476/// with specified return type(s), target opcode, and operands. 4477/// 4478/// Note that getTargetNode returns the resultant node. If there is already a 4479/// node of the specified opcode and operands, it returns that node instead of 4480/// the current one. 4481SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4482 return getNode(~Opcode, dl, VT).getNode(); 4483} 4484 4485SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4486 SDValue Op1) { 4487 return getNode(~Opcode, dl, VT, Op1).getNode(); 4488} 4489 4490SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4491 SDValue Op1, SDValue Op2) { 4492 return getNode(~Opcode, dl, VT, Op1, Op2).getNode(); 4493} 4494 4495SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4496 SDValue Op1, SDValue Op2, 4497 SDValue Op3) { 4498 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode(); 4499} 4500 4501SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4502 const SDValue *Ops, unsigned NumOps) { 4503 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode(); 4504} 4505 4506SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4507 EVT VT1, EVT VT2) { 4508 SDVTList VTs = getVTList(VT1, VT2); 4509 SDValue Op; 4510 return getNode(~Opcode, dl, VTs, &Op, 0).getNode(); 4511} 4512 4513SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4514 EVT VT2, SDValue Op1) { 4515 SDVTList VTs = getVTList(VT1, VT2); 4516 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode(); 4517} 4518 4519SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4520 EVT VT2, SDValue Op1, 4521 SDValue Op2) { 4522 SDVTList VTs = getVTList(VT1, VT2); 4523 SDValue Ops[] = { Op1, Op2 }; 4524 return getNode(~Opcode, dl, VTs, Ops, 2).getNode(); 4525} 4526 4527SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4528 EVT VT2, SDValue Op1, 4529 SDValue Op2, SDValue Op3) { 4530 SDVTList VTs = getVTList(VT1, VT2); 4531 SDValue Ops[] = { Op1, Op2, Op3 }; 4532 return getNode(~Opcode, dl, VTs, Ops, 3).getNode(); 4533} 4534 4535SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4536 EVT VT1, EVT VT2, 4537 const SDValue *Ops, unsigned NumOps) { 4538 SDVTList VTs = getVTList(VT1, VT2); 4539 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode(); 4540} 4541 4542SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4543 EVT VT1, EVT VT2, EVT VT3, 4544 SDValue Op1, SDValue Op2) { 4545 SDVTList VTs = getVTList(VT1, VT2, VT3); 4546 SDValue Ops[] = { Op1, Op2 }; 4547 return getNode(~Opcode, dl, VTs, Ops, 2).getNode(); 4548} 4549 4550SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4551 EVT VT1, EVT VT2, EVT VT3, 4552 SDValue Op1, SDValue Op2, 4553 SDValue Op3) { 4554 SDVTList VTs = getVTList(VT1, VT2, VT3); 4555 SDValue Ops[] = { Op1, Op2, Op3 }; 4556 return getNode(~Opcode, dl, VTs, Ops, 3).getNode(); 4557} 4558 4559SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4560 EVT VT1, EVT VT2, EVT VT3, 4561 const SDValue *Ops, unsigned NumOps) { 4562 SDVTList VTs = getVTList(VT1, VT2, VT3); 4563 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode(); 4564} 4565 4566SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4567 EVT VT2, EVT VT3, EVT VT4, 4568 const SDValue *Ops, unsigned NumOps) { 4569 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4570 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode(); 4571} 4572 4573SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4574 const std::vector<EVT> &ResultTys, 4575 const SDValue *Ops, unsigned NumOps) { 4576 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode(); 4577} 4578 4579/// getNodeIfExists - Get the specified node if it's already available, or 4580/// else return NULL. 4581SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4582 const SDValue *Ops, unsigned NumOps) { 4583 if (VTList.VTs[VTList.NumVTs-1] != EVT::Flag) { 4584 FoldingSetNodeID ID; 4585 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4586 void *IP = 0; 4587 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4588 return E; 4589 } 4590 return NULL; 4591} 4592 4593/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4594/// This can cause recursive merging of nodes in the DAG. 4595/// 4596/// This version assumes From has a single result value. 4597/// 4598void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4599 DAGUpdateListener *UpdateListener) { 4600 SDNode *From = FromN.getNode(); 4601 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4602 "Cannot replace with this method!"); 4603 assert(From != To.getNode() && "Cannot replace uses of with self"); 4604 4605 // Iterate over all the existing uses of From. New uses will be added 4606 // to the beginning of the use list, which we avoid visiting. 4607 // This specifically avoids visiting uses of From that arise while the 4608 // replacement is happening, because any such uses would be the result 4609 // of CSE: If an existing node looks like From after one of its operands 4610 // is replaced by To, we don't want to replace of all its users with To 4611 // too. See PR3018 for more info. 4612 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4613 while (UI != UE) { 4614 SDNode *User = *UI; 4615 4616 // This node is about to morph, remove its old self from the CSE maps. 4617 RemoveNodeFromCSEMaps(User); 4618 4619 // A user can appear in a use list multiple times, and when this 4620 // happens the uses are usually next to each other in the list. 4621 // To help reduce the number of CSE recomputations, process all 4622 // the uses of this user that we can find this way. 4623 do { 4624 SDUse &Use = UI.getUse(); 4625 ++UI; 4626 Use.set(To); 4627 } while (UI != UE && *UI == User); 4628 4629 // Now that we have modified User, add it back to the CSE maps. If it 4630 // already exists there, recursively merge the results together. 4631 AddModifiedNodeToCSEMaps(User, UpdateListener); 4632 } 4633} 4634 4635/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4636/// This can cause recursive merging of nodes in the DAG. 4637/// 4638/// This version assumes that for each value of From, there is a 4639/// corresponding value in To in the same position with the same type. 4640/// 4641void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4642 DAGUpdateListener *UpdateListener) { 4643#ifndef NDEBUG 4644 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 4645 assert((!From->hasAnyUseOfValue(i) || 4646 From->getValueType(i) == To->getValueType(i)) && 4647 "Cannot use this version of ReplaceAllUsesWith!"); 4648#endif 4649 4650 // Handle the trivial case. 4651 if (From == To) 4652 return; 4653 4654 // Iterate over just the existing users of From. See the comments in 4655 // the ReplaceAllUsesWith above. 4656 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4657 while (UI != UE) { 4658 SDNode *User = *UI; 4659 4660 // This node is about to morph, remove its old self from the CSE maps. 4661 RemoveNodeFromCSEMaps(User); 4662 4663 // A user can appear in a use list multiple times, and when this 4664 // happens the uses are usually next to each other in the list. 4665 // To help reduce the number of CSE recomputations, process all 4666 // the uses of this user that we can find this way. 4667 do { 4668 SDUse &Use = UI.getUse(); 4669 ++UI; 4670 Use.setNode(To); 4671 } while (UI != UE && *UI == User); 4672 4673 // Now that we have modified User, add it back to the CSE maps. If it 4674 // already exists there, recursively merge the results together. 4675 AddModifiedNodeToCSEMaps(User, UpdateListener); 4676 } 4677} 4678 4679/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4680/// This can cause recursive merging of nodes in the DAG. 4681/// 4682/// This version can replace From with any result values. To must match the 4683/// number and types of values returned by From. 4684void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4685 const SDValue *To, 4686 DAGUpdateListener *UpdateListener) { 4687 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4688 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4689 4690 // Iterate over just the existing users of From. See the comments in 4691 // the ReplaceAllUsesWith above. 4692 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4693 while (UI != UE) { 4694 SDNode *User = *UI; 4695 4696 // This node is about to morph, remove its old self from the CSE maps. 4697 RemoveNodeFromCSEMaps(User); 4698 4699 // A user can appear in a use list multiple times, and when this 4700 // happens the uses are usually next to each other in the list. 4701 // To help reduce the number of CSE recomputations, process all 4702 // the uses of this user that we can find this way. 4703 do { 4704 SDUse &Use = UI.getUse(); 4705 const SDValue &ToOp = To[Use.getResNo()]; 4706 ++UI; 4707 Use.set(ToOp); 4708 } while (UI != UE && *UI == User); 4709 4710 // Now that we have modified User, add it back to the CSE maps. If it 4711 // already exists there, recursively merge the results together. 4712 AddModifiedNodeToCSEMaps(User, UpdateListener); 4713 } 4714} 4715 4716/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4717/// uses of other values produced by From.getNode() alone. The Deleted 4718/// vector is handled the same way as for ReplaceAllUsesWith. 4719void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4720 DAGUpdateListener *UpdateListener){ 4721 // Handle the really simple, really trivial case efficiently. 4722 if (From == To) return; 4723 4724 // Handle the simple, trivial, case efficiently. 4725 if (From.getNode()->getNumValues() == 1) { 4726 ReplaceAllUsesWith(From, To, UpdateListener); 4727 return; 4728 } 4729 4730 // Iterate over just the existing users of From. See the comments in 4731 // the ReplaceAllUsesWith above. 4732 SDNode::use_iterator UI = From.getNode()->use_begin(), 4733 UE = From.getNode()->use_end(); 4734 while (UI != UE) { 4735 SDNode *User = *UI; 4736 bool UserRemovedFromCSEMaps = false; 4737 4738 // A user can appear in a use list multiple times, and when this 4739 // happens the uses are usually next to each other in the list. 4740 // To help reduce the number of CSE recomputations, process all 4741 // the uses of this user that we can find this way. 4742 do { 4743 SDUse &Use = UI.getUse(); 4744 4745 // Skip uses of different values from the same node. 4746 if (Use.getResNo() != From.getResNo()) { 4747 ++UI; 4748 continue; 4749 } 4750 4751 // If this node hasn't been modified yet, it's still in the CSE maps, 4752 // so remove its old self from the CSE maps. 4753 if (!UserRemovedFromCSEMaps) { 4754 RemoveNodeFromCSEMaps(User); 4755 UserRemovedFromCSEMaps = true; 4756 } 4757 4758 ++UI; 4759 Use.set(To); 4760 } while (UI != UE && *UI == User); 4761 4762 // We are iterating over all uses of the From node, so if a use 4763 // doesn't use the specific value, no changes are made. 4764 if (!UserRemovedFromCSEMaps) 4765 continue; 4766 4767 // Now that we have modified User, add it back to the CSE maps. If it 4768 // already exists there, recursively merge the results together. 4769 AddModifiedNodeToCSEMaps(User, UpdateListener); 4770 } 4771} 4772 4773namespace { 4774 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 4775 /// to record information about a use. 4776 struct UseMemo { 4777 SDNode *User; 4778 unsigned Index; 4779 SDUse *Use; 4780 }; 4781 4782 /// operator< - Sort Memos by User. 4783 bool operator<(const UseMemo &L, const UseMemo &R) { 4784 return (intptr_t)L.User < (intptr_t)R.User; 4785 } 4786} 4787 4788/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 4789/// uses of other values produced by From.getNode() alone. The same value 4790/// may appear in both the From and To list. The Deleted vector is 4791/// handled the same way as for ReplaceAllUsesWith. 4792void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 4793 const SDValue *To, 4794 unsigned Num, 4795 DAGUpdateListener *UpdateListener){ 4796 // Handle the simple, trivial case efficiently. 4797 if (Num == 1) 4798 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 4799 4800 // Read up all the uses and make records of them. This helps 4801 // processing new uses that are introduced during the 4802 // replacement process. 4803 SmallVector<UseMemo, 4> Uses; 4804 for (unsigned i = 0; i != Num; ++i) { 4805 unsigned FromResNo = From[i].getResNo(); 4806 SDNode *FromNode = From[i].getNode(); 4807 for (SDNode::use_iterator UI = FromNode->use_begin(), 4808 E = FromNode->use_end(); UI != E; ++UI) { 4809 SDUse &Use = UI.getUse(); 4810 if (Use.getResNo() == FromResNo) { 4811 UseMemo Memo = { *UI, i, &Use }; 4812 Uses.push_back(Memo); 4813 } 4814 } 4815 } 4816 4817 // Sort the uses, so that all the uses from a given User are together. 4818 std::sort(Uses.begin(), Uses.end()); 4819 4820 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 4821 UseIndex != UseIndexEnd; ) { 4822 // We know that this user uses some value of From. If it is the right 4823 // value, update it. 4824 SDNode *User = Uses[UseIndex].User; 4825 4826 // This node is about to morph, remove its old self from the CSE maps. 4827 RemoveNodeFromCSEMaps(User); 4828 4829 // The Uses array is sorted, so all the uses for a given User 4830 // are next to each other in the list. 4831 // To help reduce the number of CSE recomputations, process all 4832 // the uses of this user that we can find this way. 4833 do { 4834 unsigned i = Uses[UseIndex].Index; 4835 SDUse &Use = *Uses[UseIndex].Use; 4836 ++UseIndex; 4837 4838 Use.set(To[i]); 4839 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 4840 4841 // Now that we have modified User, add it back to the CSE maps. If it 4842 // already exists there, recursively merge the results together. 4843 AddModifiedNodeToCSEMaps(User, UpdateListener); 4844 } 4845} 4846 4847/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4848/// based on their topological order. It returns the maximum id and a vector 4849/// of the SDNodes* in assigned order by reference. 4850unsigned SelectionDAG::AssignTopologicalOrder() { 4851 4852 unsigned DAGSize = 0; 4853 4854 // SortedPos tracks the progress of the algorithm. Nodes before it are 4855 // sorted, nodes after it are unsorted. When the algorithm completes 4856 // it is at the end of the list. 4857 allnodes_iterator SortedPos = allnodes_begin(); 4858 4859 // Visit all the nodes. Move nodes with no operands to the front of 4860 // the list immediately. Annotate nodes that do have operands with their 4861 // operand count. Before we do this, the Node Id fields of the nodes 4862 // may contain arbitrary values. After, the Node Id fields for nodes 4863 // before SortedPos will contain the topological sort index, and the 4864 // Node Id fields for nodes At SortedPos and after will contain the 4865 // count of outstanding operands. 4866 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 4867 SDNode *N = I++; 4868 unsigned Degree = N->getNumOperands(); 4869 if (Degree == 0) { 4870 // A node with no uses, add it to the result array immediately. 4871 N->setNodeId(DAGSize++); 4872 allnodes_iterator Q = N; 4873 if (Q != SortedPos) 4874 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 4875 ++SortedPos; 4876 } else { 4877 // Temporarily use the Node Id as scratch space for the degree count. 4878 N->setNodeId(Degree); 4879 } 4880 } 4881 4882 // Visit all the nodes. As we iterate, moves nodes into sorted order, 4883 // such that by the time the end is reached all nodes will be sorted. 4884 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 4885 SDNode *N = I; 4886 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 4887 UI != UE; ++UI) { 4888 SDNode *P = *UI; 4889 unsigned Degree = P->getNodeId(); 4890 --Degree; 4891 if (Degree == 0) { 4892 // All of P's operands are sorted, so P may sorted now. 4893 P->setNodeId(DAGSize++); 4894 if (P != SortedPos) 4895 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 4896 ++SortedPos; 4897 } else { 4898 // Update P's outstanding operand count. 4899 P->setNodeId(Degree); 4900 } 4901 } 4902 } 4903 4904 assert(SortedPos == AllNodes.end() && 4905 "Topological sort incomplete!"); 4906 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 4907 "First node in topological sort is not the entry token!"); 4908 assert(AllNodes.front().getNodeId() == 0 && 4909 "First node in topological sort has non-zero id!"); 4910 assert(AllNodes.front().getNumOperands() == 0 && 4911 "First node in topological sort has operands!"); 4912 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 4913 "Last node in topologic sort has unexpected id!"); 4914 assert(AllNodes.back().use_empty() && 4915 "Last node in topologic sort has users!"); 4916 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 4917 return DAGSize; 4918} 4919 4920 4921 4922//===----------------------------------------------------------------------===// 4923// SDNode Class 4924//===----------------------------------------------------------------------===// 4925 4926HandleSDNode::~HandleSDNode() { 4927 DropOperands(); 4928} 4929 4930GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 4931 EVT VT, int64_t o, unsigned char TF) 4932 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)), 4933 Offset(o), TargetFlags(TF) { 4934 TheGlobal = const_cast<GlobalValue*>(GA); 4935} 4936 4937MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 4938 const Value *srcValue, int SVO, 4939 unsigned alignment, bool vol) 4940 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) { 4941 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment); 4942 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4943 assert(getAlignment() == alignment && "Alignment representation error!"); 4944 assert(isVolatile() == vol && "Volatile representation error!"); 4945} 4946 4947MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 4948 const SDValue *Ops, 4949 unsigned NumOps, EVT memvt, const Value *srcValue, 4950 int SVO, unsigned alignment, bool vol) 4951 : SDNode(Opc, dl, VTs, Ops, NumOps), 4952 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) { 4953 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment); 4954 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4955 assert(getAlignment() == alignment && "Alignment representation error!"); 4956 assert(isVolatile() == vol && "Volatile representation error!"); 4957} 4958 4959/// getMemOperand - Return a MachineMemOperand object describing the memory 4960/// reference performed by this memory reference. 4961MachineMemOperand MemSDNode::getMemOperand() const { 4962 int Flags = 0; 4963 if (isa<LoadSDNode>(this)) 4964 Flags = MachineMemOperand::MOLoad; 4965 else if (isa<StoreSDNode>(this)) 4966 Flags = MachineMemOperand::MOStore; 4967 else if (isa<AtomicSDNode>(this)) { 4968 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4969 } 4970 else { 4971 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 4972 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 4973 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 4974 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 4975 } 4976 4977 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4978 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4979 4980 // Check if the memory reference references a frame index 4981 const FrameIndexSDNode *FI = 4982 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 4983 if (!getSrcValue() && FI) 4984 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 4985 Flags, 0, Size, getAlignment()); 4986 else 4987 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4988 Size, getAlignment()); 4989} 4990 4991/// Profile - Gather unique data for the node. 4992/// 4993void SDNode::Profile(FoldingSetNodeID &ID) const { 4994 AddNodeIDNode(ID, this); 4995} 4996 4997static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 4998static EVT VTs[EVT::LAST_VALUETYPE]; 4999static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5000 5001/// getValueTypeList - Return a pointer to the specified value type. 5002/// 5003const EVT *SDNode::getValueTypeList(EVT VT) { 5004 sys::SmartScopedLock<true> Lock(*VTMutex); 5005 if (VT.isExtended()) { 5006 return &(*EVTs->insert(VT).first); 5007 } else { 5008 VTs[VT.getSimpleVT()] = VT; 5009 return &VTs[VT.getSimpleVT()]; 5010 } 5011} 5012 5013/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5014/// indicated value. This method ignores uses of other values defined by this 5015/// operation. 5016bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5017 assert(Value < getNumValues() && "Bad value!"); 5018 5019 // TODO: Only iterate over uses of a given value of the node 5020 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5021 if (UI.getUse().getResNo() == Value) { 5022 if (NUses == 0) 5023 return false; 5024 --NUses; 5025 } 5026 } 5027 5028 // Found exactly the right number of uses? 5029 return NUses == 0; 5030} 5031 5032 5033/// hasAnyUseOfValue - Return true if there are any use of the indicated 5034/// value. This method ignores uses of other values defined by this operation. 5035bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5036 assert(Value < getNumValues() && "Bad value!"); 5037 5038 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5039 if (UI.getUse().getResNo() == Value) 5040 return true; 5041 5042 return false; 5043} 5044 5045 5046/// isOnlyUserOf - Return true if this node is the only use of N. 5047/// 5048bool SDNode::isOnlyUserOf(SDNode *N) const { 5049 bool Seen = false; 5050 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5051 SDNode *User = *I; 5052 if (User == this) 5053 Seen = true; 5054 else 5055 return false; 5056 } 5057 5058 return Seen; 5059} 5060 5061/// isOperand - Return true if this node is an operand of N. 5062/// 5063bool SDValue::isOperandOf(SDNode *N) const { 5064 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5065 if (*this == N->getOperand(i)) 5066 return true; 5067 return false; 5068} 5069 5070bool SDNode::isOperandOf(SDNode *N) const { 5071 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5072 if (this == N->OperandList[i].getNode()) 5073 return true; 5074 return false; 5075} 5076 5077/// reachesChainWithoutSideEffects - Return true if this operand (which must 5078/// be a chain) reaches the specified operand without crossing any 5079/// side-effecting instructions. In practice, this looks through token 5080/// factors and non-volatile loads. In order to remain efficient, this only 5081/// looks a couple of nodes in, it does not do an exhaustive search. 5082bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5083 unsigned Depth) const { 5084 if (*this == Dest) return true; 5085 5086 // Don't search too deeply, we just want to be able to see through 5087 // TokenFactor's etc. 5088 if (Depth == 0) return false; 5089 5090 // If this is a token factor, all inputs to the TF happen in parallel. If any 5091 // of the operands of the TF reach dest, then we can do the xform. 5092 if (getOpcode() == ISD::TokenFactor) { 5093 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5094 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5095 return true; 5096 return false; 5097 } 5098 5099 // Loads don't have side effects, look through them. 5100 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5101 if (!Ld->isVolatile()) 5102 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5103 } 5104 return false; 5105} 5106 5107 5108static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 5109 SmallPtrSet<SDNode *, 32> &Visited) { 5110 if (found || !Visited.insert(N)) 5111 return; 5112 5113 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 5114 SDNode *Op = N->getOperand(i).getNode(); 5115 if (Op == P) { 5116 found = true; 5117 return; 5118 } 5119 findPredecessor(Op, P, found, Visited); 5120 } 5121} 5122 5123/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5124/// is either an operand of N or it can be reached by recursively traversing 5125/// up the operands. 5126/// NOTE: this is an expensive method. Use it carefully. 5127bool SDNode::isPredecessorOf(SDNode *N) const { 5128 SmallPtrSet<SDNode *, 32> Visited; 5129 bool found = false; 5130 findPredecessor(N, this, found, Visited); 5131 return found; 5132} 5133 5134uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5135 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5136 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5137} 5138 5139std::string SDNode::getOperationName(const SelectionDAG *G) const { 5140 switch (getOpcode()) { 5141 default: 5142 if (getOpcode() < ISD::BUILTIN_OP_END) 5143 return "<<Unknown DAG Node>>"; 5144 if (isMachineOpcode()) { 5145 if (G) 5146 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5147 if (getMachineOpcode() < TII->getNumOpcodes()) 5148 return TII->get(getMachineOpcode()).getName(); 5149 return "<<Unknown Machine Node>>"; 5150 } 5151 if (G) { 5152 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5153 const char *Name = TLI.getTargetNodeName(getOpcode()); 5154 if (Name) return Name; 5155 return "<<Unknown Target Node>>"; 5156 } 5157 return "<<Unknown Node>>"; 5158 5159#ifndef NDEBUG 5160 case ISD::DELETED_NODE: 5161 return "<<Deleted Node!>>"; 5162#endif 5163 case ISD::PREFETCH: return "Prefetch"; 5164 case ISD::MEMBARRIER: return "MemBarrier"; 5165 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5166 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5167 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5168 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5169 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5170 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5171 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5172 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5173 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5174 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5175 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5176 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5177 case ISD::PCMARKER: return "PCMarker"; 5178 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5179 case ISD::SRCVALUE: return "SrcValue"; 5180 case ISD::MEMOPERAND: return "MemOperand"; 5181 case ISD::EntryToken: return "EntryToken"; 5182 case ISD::TokenFactor: return "TokenFactor"; 5183 case ISD::AssertSext: return "AssertSext"; 5184 case ISD::AssertZext: return "AssertZext"; 5185 5186 case ISD::BasicBlock: return "BasicBlock"; 5187 case ISD::VALUETYPE: return "ValueType"; 5188 case ISD::Register: return "Register"; 5189 5190 case ISD::Constant: return "Constant"; 5191 case ISD::ConstantFP: return "ConstantFP"; 5192 case ISD::GlobalAddress: return "GlobalAddress"; 5193 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5194 case ISD::FrameIndex: return "FrameIndex"; 5195 case ISD::JumpTable: return "JumpTable"; 5196 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5197 case ISD::RETURNADDR: return "RETURNADDR"; 5198 case ISD::FRAMEADDR: return "FRAMEADDR"; 5199 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5200 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5201 case ISD::LSDAADDR: return "LSDAADDR"; 5202 case ISD::EHSELECTION: return "EHSELECTION"; 5203 case ISD::EH_RETURN: return "EH_RETURN"; 5204 case ISD::ConstantPool: return "ConstantPool"; 5205 case ISD::ExternalSymbol: return "ExternalSymbol"; 5206 case ISD::INTRINSIC_WO_CHAIN: { 5207 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5208 return Intrinsic::getName((Intrinsic::ID)IID); 5209 } 5210 case ISD::INTRINSIC_VOID: 5211 case ISD::INTRINSIC_W_CHAIN: { 5212 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5213 return Intrinsic::getName((Intrinsic::ID)IID); 5214 } 5215 5216 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5217 case ISD::TargetConstant: return "TargetConstant"; 5218 case ISD::TargetConstantFP:return "TargetConstantFP"; 5219 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5220 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5221 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5222 case ISD::TargetJumpTable: return "TargetJumpTable"; 5223 case ISD::TargetConstantPool: return "TargetConstantPool"; 5224 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5225 5226 case ISD::CopyToReg: return "CopyToReg"; 5227 case ISD::CopyFromReg: return "CopyFromReg"; 5228 case ISD::UNDEF: return "undef"; 5229 case ISD::MERGE_VALUES: return "merge_values"; 5230 case ISD::INLINEASM: return "inlineasm"; 5231 case ISD::DBG_LABEL: return "dbg_label"; 5232 case ISD::EH_LABEL: return "eh_label"; 5233 case ISD::DECLARE: return "declare"; 5234 case ISD::HANDLENODE: return "handlenode"; 5235 5236 // Unary operators 5237 case ISD::FABS: return "fabs"; 5238 case ISD::FNEG: return "fneg"; 5239 case ISD::FSQRT: return "fsqrt"; 5240 case ISD::FSIN: return "fsin"; 5241 case ISD::FCOS: return "fcos"; 5242 case ISD::FPOWI: return "fpowi"; 5243 case ISD::FPOW: return "fpow"; 5244 case ISD::FTRUNC: return "ftrunc"; 5245 case ISD::FFLOOR: return "ffloor"; 5246 case ISD::FCEIL: return "fceil"; 5247 case ISD::FRINT: return "frint"; 5248 case ISD::FNEARBYINT: return "fnearbyint"; 5249 5250 // Binary operators 5251 case ISD::ADD: return "add"; 5252 case ISD::SUB: return "sub"; 5253 case ISD::MUL: return "mul"; 5254 case ISD::MULHU: return "mulhu"; 5255 case ISD::MULHS: return "mulhs"; 5256 case ISD::SDIV: return "sdiv"; 5257 case ISD::UDIV: return "udiv"; 5258 case ISD::SREM: return "srem"; 5259 case ISD::UREM: return "urem"; 5260 case ISD::SMUL_LOHI: return "smul_lohi"; 5261 case ISD::UMUL_LOHI: return "umul_lohi"; 5262 case ISD::SDIVREM: return "sdivrem"; 5263 case ISD::UDIVREM: return "udivrem"; 5264 case ISD::AND: return "and"; 5265 case ISD::OR: return "or"; 5266 case ISD::XOR: return "xor"; 5267 case ISD::SHL: return "shl"; 5268 case ISD::SRA: return "sra"; 5269 case ISD::SRL: return "srl"; 5270 case ISD::ROTL: return "rotl"; 5271 case ISD::ROTR: return "rotr"; 5272 case ISD::FADD: return "fadd"; 5273 case ISD::FSUB: return "fsub"; 5274 case ISD::FMUL: return "fmul"; 5275 case ISD::FDIV: return "fdiv"; 5276 case ISD::FREM: return "frem"; 5277 case ISD::FCOPYSIGN: return "fcopysign"; 5278 case ISD::FGETSIGN: return "fgetsign"; 5279 5280 case ISD::SETCC: return "setcc"; 5281 case ISD::VSETCC: return "vsetcc"; 5282 case ISD::SELECT: return "select"; 5283 case ISD::SELECT_CC: return "select_cc"; 5284 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5285 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5286 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5287 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5288 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5289 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5290 case ISD::CARRY_FALSE: return "carry_false"; 5291 case ISD::ADDC: return "addc"; 5292 case ISD::ADDE: return "adde"; 5293 case ISD::SADDO: return "saddo"; 5294 case ISD::UADDO: return "uaddo"; 5295 case ISD::SSUBO: return "ssubo"; 5296 case ISD::USUBO: return "usubo"; 5297 case ISD::SMULO: return "smulo"; 5298 case ISD::UMULO: return "umulo"; 5299 case ISD::SUBC: return "subc"; 5300 case ISD::SUBE: return "sube"; 5301 case ISD::SHL_PARTS: return "shl_parts"; 5302 case ISD::SRA_PARTS: return "sra_parts"; 5303 case ISD::SRL_PARTS: return "srl_parts"; 5304 5305 // Conversion operators. 5306 case ISD::SIGN_EXTEND: return "sign_extend"; 5307 case ISD::ZERO_EXTEND: return "zero_extend"; 5308 case ISD::ANY_EXTEND: return "any_extend"; 5309 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5310 case ISD::TRUNCATE: return "truncate"; 5311 case ISD::FP_ROUND: return "fp_round"; 5312 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5313 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5314 case ISD::FP_EXTEND: return "fp_extend"; 5315 5316 case ISD::SINT_TO_FP: return "sint_to_fp"; 5317 case ISD::UINT_TO_FP: return "uint_to_fp"; 5318 case ISD::FP_TO_SINT: return "fp_to_sint"; 5319 case ISD::FP_TO_UINT: return "fp_to_uint"; 5320 case ISD::BIT_CONVERT: return "bit_convert"; 5321 5322 case ISD::CONVERT_RNDSAT: { 5323 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5324 default: llvm_unreachable("Unknown cvt code!"); 5325 case ISD::CVT_FF: return "cvt_ff"; 5326 case ISD::CVT_FS: return "cvt_fs"; 5327 case ISD::CVT_FU: return "cvt_fu"; 5328 case ISD::CVT_SF: return "cvt_sf"; 5329 case ISD::CVT_UF: return "cvt_uf"; 5330 case ISD::CVT_SS: return "cvt_ss"; 5331 case ISD::CVT_SU: return "cvt_su"; 5332 case ISD::CVT_US: return "cvt_us"; 5333 case ISD::CVT_UU: return "cvt_uu"; 5334 } 5335 } 5336 5337 // Control flow instructions 5338 case ISD::BR: return "br"; 5339 case ISD::BRIND: return "brind"; 5340 case ISD::BR_JT: return "br_jt"; 5341 case ISD::BRCOND: return "brcond"; 5342 case ISD::BR_CC: return "br_cc"; 5343 case ISD::CALLSEQ_START: return "callseq_start"; 5344 case ISD::CALLSEQ_END: return "callseq_end"; 5345 5346 // Other operators 5347 case ISD::LOAD: return "load"; 5348 case ISD::STORE: return "store"; 5349 case ISD::VAARG: return "vaarg"; 5350 case ISD::VACOPY: return "vacopy"; 5351 case ISD::VAEND: return "vaend"; 5352 case ISD::VASTART: return "vastart"; 5353 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5354 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5355 case ISD::BUILD_PAIR: return "build_pair"; 5356 case ISD::STACKSAVE: return "stacksave"; 5357 case ISD::STACKRESTORE: return "stackrestore"; 5358 case ISD::TRAP: return "trap"; 5359 5360 // Bit manipulation 5361 case ISD::BSWAP: return "bswap"; 5362 case ISD::CTPOP: return "ctpop"; 5363 case ISD::CTTZ: return "cttz"; 5364 case ISD::CTLZ: return "ctlz"; 5365 5366 // Debug info 5367 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5368 case ISD::DEBUG_LOC: return "debug_loc"; 5369 5370 // Trampolines 5371 case ISD::TRAMPOLINE: return "trampoline"; 5372 5373 case ISD::CONDCODE: 5374 switch (cast<CondCodeSDNode>(this)->get()) { 5375 default: llvm_unreachable("Unknown setcc condition!"); 5376 case ISD::SETOEQ: return "setoeq"; 5377 case ISD::SETOGT: return "setogt"; 5378 case ISD::SETOGE: return "setoge"; 5379 case ISD::SETOLT: return "setolt"; 5380 case ISD::SETOLE: return "setole"; 5381 case ISD::SETONE: return "setone"; 5382 5383 case ISD::SETO: return "seto"; 5384 case ISD::SETUO: return "setuo"; 5385 case ISD::SETUEQ: return "setue"; 5386 case ISD::SETUGT: return "setugt"; 5387 case ISD::SETUGE: return "setuge"; 5388 case ISD::SETULT: return "setult"; 5389 case ISD::SETULE: return "setule"; 5390 case ISD::SETUNE: return "setune"; 5391 5392 case ISD::SETEQ: return "seteq"; 5393 case ISD::SETGT: return "setgt"; 5394 case ISD::SETGE: return "setge"; 5395 case ISD::SETLT: return "setlt"; 5396 case ISD::SETLE: return "setle"; 5397 case ISD::SETNE: return "setne"; 5398 } 5399 } 5400} 5401 5402const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5403 switch (AM) { 5404 default: 5405 return ""; 5406 case ISD::PRE_INC: 5407 return "<pre-inc>"; 5408 case ISD::PRE_DEC: 5409 return "<pre-dec>"; 5410 case ISD::POST_INC: 5411 return "<post-inc>"; 5412 case ISD::POST_DEC: 5413 return "<post-dec>"; 5414 } 5415} 5416 5417std::string ISD::ArgFlagsTy::getArgFlagsString() { 5418 std::string S = "< "; 5419 5420 if (isZExt()) 5421 S += "zext "; 5422 if (isSExt()) 5423 S += "sext "; 5424 if (isInReg()) 5425 S += "inreg "; 5426 if (isSRet()) 5427 S += "sret "; 5428 if (isByVal()) 5429 S += "byval "; 5430 if (isNest()) 5431 S += "nest "; 5432 if (getByValAlign()) 5433 S += "byval-align:" + utostr(getByValAlign()) + " "; 5434 if (getOrigAlign()) 5435 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5436 if (getByValSize()) 5437 S += "byval-size:" + utostr(getByValSize()) + " "; 5438 return S + ">"; 5439} 5440 5441void SDNode::dump() const { dump(0); } 5442void SDNode::dump(const SelectionDAG *G) const { 5443 print(errs(), G); 5444} 5445 5446void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5447 OS << (void*)this << ": "; 5448 5449 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5450 if (i) OS << ","; 5451 if (getValueType(i) == EVT::Other) 5452 OS << "ch"; 5453 else 5454 OS << getValueType(i).getEVTString(); 5455 } 5456 OS << " = " << getOperationName(G); 5457} 5458 5459void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5460 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5461 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(this); 5462 OS << "<"; 5463 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5464 int Idx = SVN->getMaskElt(i); 5465 if (i) OS << ","; 5466 if (Idx < 0) 5467 OS << "u"; 5468 else 5469 OS << Idx; 5470 } 5471 OS << ">"; 5472 } 5473 5474 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5475 OS << '<' << CSDN->getAPIntValue() << '>'; 5476 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5477 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5478 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5479 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5480 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5481 else { 5482 OS << "<APFloat("; 5483 CSDN->getValueAPF().bitcastToAPInt().dump(); 5484 OS << ")>"; 5485 } 5486 } else if (const GlobalAddressSDNode *GADN = 5487 dyn_cast<GlobalAddressSDNode>(this)) { 5488 int64_t offset = GADN->getOffset(); 5489 OS << '<'; 5490 WriteAsOperand(OS, GADN->getGlobal()); 5491 OS << '>'; 5492 if (offset > 0) 5493 OS << " + " << offset; 5494 else 5495 OS << " " << offset; 5496 if (unsigned int TF = GADN->getTargetFlags()) 5497 OS << " [TF=" << TF << ']'; 5498 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5499 OS << "<" << FIDN->getIndex() << ">"; 5500 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5501 OS << "<" << JTDN->getIndex() << ">"; 5502 if (unsigned int TF = JTDN->getTargetFlags()) 5503 OS << " [TF=" << TF << ']'; 5504 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5505 int offset = CP->getOffset(); 5506 if (CP->isMachineConstantPoolEntry()) 5507 OS << "<" << *CP->getMachineCPVal() << ">"; 5508 else 5509 OS << "<" << *CP->getConstVal() << ">"; 5510 if (offset > 0) 5511 OS << " + " << offset; 5512 else 5513 OS << " " << offset; 5514 if (unsigned int TF = CP->getTargetFlags()) 5515 OS << " [TF=" << TF << ']'; 5516 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5517 OS << "<"; 5518 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5519 if (LBB) 5520 OS << LBB->getName() << " "; 5521 OS << (const void*)BBDN->getBasicBlock() << ">"; 5522 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5523 if (G && R->getReg() && 5524 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5525 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5526 } else { 5527 OS << " #" << R->getReg(); 5528 } 5529 } else if (const ExternalSymbolSDNode *ES = 5530 dyn_cast<ExternalSymbolSDNode>(this)) { 5531 OS << "'" << ES->getSymbol() << "'"; 5532 if (unsigned int TF = ES->getTargetFlags()) 5533 OS << " [TF=" << TF << ']'; 5534 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5535 if (M->getValue()) 5536 OS << "<" << M->getValue() << ">"; 5537 else 5538 OS << "<null>"; 5539 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5540 if (M->MO.getValue()) 5541 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5542 else 5543 OS << "<null:" << M->MO.getOffset() << ">"; 5544 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5545 OS << ":" << N->getVT().getEVTString(); 5546 } 5547 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5548 const Value *SrcValue = LD->getSrcValue(); 5549 int SrcOffset = LD->getSrcValueOffset(); 5550 OS << " <"; 5551 if (SrcValue) 5552 OS << SrcValue; 5553 else 5554 OS << "null"; 5555 OS << ":" << SrcOffset << ">"; 5556 5557 bool doExt = true; 5558 switch (LD->getExtensionType()) { 5559 default: doExt = false; break; 5560 case ISD::EXTLOAD: OS << " <anyext "; break; 5561 case ISD::SEXTLOAD: OS << " <sext "; break; 5562 case ISD::ZEXTLOAD: OS << " <zext "; break; 5563 } 5564 if (doExt) 5565 OS << LD->getMemoryVT().getEVTString() << ">"; 5566 5567 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5568 if (*AM) 5569 OS << " " << AM; 5570 if (LD->isVolatile()) 5571 OS << " <volatile>"; 5572 OS << " alignment=" << LD->getAlignment(); 5573 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5574 const Value *SrcValue = ST->getSrcValue(); 5575 int SrcOffset = ST->getSrcValueOffset(); 5576 OS << " <"; 5577 if (SrcValue) 5578 OS << SrcValue; 5579 else 5580 OS << "null"; 5581 OS << ":" << SrcOffset << ">"; 5582 5583 if (ST->isTruncatingStore()) 5584 OS << " <trunc " << ST->getMemoryVT().getEVTString() << ">"; 5585 5586 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5587 if (*AM) 5588 OS << " " << AM; 5589 if (ST->isVolatile()) 5590 OS << " <volatile>"; 5591 OS << " alignment=" << ST->getAlignment(); 5592 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5593 const Value *SrcValue = AT->getSrcValue(); 5594 int SrcOffset = AT->getSrcValueOffset(); 5595 OS << " <"; 5596 if (SrcValue) 5597 OS << SrcValue; 5598 else 5599 OS << "null"; 5600 OS << ":" << SrcOffset << ">"; 5601 if (AT->isVolatile()) 5602 OS << " <volatile>"; 5603 OS << " alignment=" << AT->getAlignment(); 5604 } 5605} 5606 5607void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5608 print_types(OS, G); 5609 OS << " "; 5610 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5611 if (i) OS << ", "; 5612 OS << (void*)getOperand(i).getNode(); 5613 if (unsigned RN = getOperand(i).getResNo()) 5614 OS << ":" << RN; 5615 } 5616 print_details(OS, G); 5617} 5618 5619static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5620 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5621 if (N->getOperand(i).getNode()->hasOneUse()) 5622 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5623 else 5624 cerr << "\n" << std::string(indent+2, ' ') 5625 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5626 5627 5628 cerr << "\n" << std::string(indent, ' '); 5629 N->dump(G); 5630} 5631 5632void SelectionDAG::dump() const { 5633 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5634 5635 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5636 I != E; ++I) { 5637 const SDNode *N = I; 5638 if (!N->hasOneUse() && N != getRoot().getNode()) 5639 DumpNodes(N, 2, this); 5640 } 5641 5642 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 5643 5644 cerr << "\n\n"; 5645} 5646 5647void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 5648 print_types(OS, G); 5649 print_details(OS, G); 5650} 5651 5652typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 5653static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 5654 const SelectionDAG *G, VisitedSDNodeSet &once) { 5655 if (!once.insert(N)) // If we've been here before, return now. 5656 return; 5657 // Dump the current SDNode, but don't end the line yet. 5658 OS << std::string(indent, ' '); 5659 N->printr(OS, G); 5660 // Having printed this SDNode, walk the children: 5661 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5662 const SDNode *child = N->getOperand(i).getNode(); 5663 if (i) OS << ","; 5664 OS << " "; 5665 if (child->getNumOperands() == 0) { 5666 // This child has no grandchildren; print it inline right here. 5667 child->printr(OS, G); 5668 once.insert(child); 5669 } else { // Just the address. FIXME: also print the child's opcode 5670 OS << (void*)child; 5671 if (unsigned RN = N->getOperand(i).getResNo()) 5672 OS << ":" << RN; 5673 } 5674 } 5675 OS << "\n"; 5676 // Dump children that have grandchildren on their own line(s). 5677 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5678 const SDNode *child = N->getOperand(i).getNode(); 5679 DumpNodesr(OS, child, indent+2, G, once); 5680 } 5681} 5682 5683void SDNode::dumpr() const { 5684 VisitedSDNodeSet once; 5685 DumpNodesr(errs(), this, 0, 0, once); 5686} 5687 5688 5689// getAddressSpace - Return the address space this GlobalAddress belongs to. 5690unsigned GlobalAddressSDNode::getAddressSpace() const { 5691 return getGlobal()->getType()->getAddressSpace(); 5692} 5693 5694 5695const Type *ConstantPoolSDNode::getType() const { 5696 if (isMachineConstantPoolEntry()) 5697 return Val.MachineCPVal->getType(); 5698 return Val.ConstVal->getType(); 5699} 5700 5701bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 5702 APInt &SplatUndef, 5703 unsigned &SplatBitSize, 5704 bool &HasAnyUndefs, 5705 unsigned MinSplatBits) { 5706 EVT VT = getValueType(0); 5707 assert(VT.isVector() && "Expected a vector type"); 5708 unsigned sz = VT.getSizeInBits(); 5709 if (MinSplatBits > sz) 5710 return false; 5711 5712 SplatValue = APInt(sz, 0); 5713 SplatUndef = APInt(sz, 0); 5714 5715 // Get the bits. Bits with undefined values (when the corresponding element 5716 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 5717 // in SplatValue. If any of the values are not constant, give up and return 5718 // false. 5719 unsigned int nOps = getNumOperands(); 5720 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 5721 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 5722 for (unsigned i = 0; i < nOps; ++i) { 5723 SDValue OpVal = getOperand(i); 5724 unsigned BitPos = i * EltBitSize; 5725 5726 if (OpVal.getOpcode() == ISD::UNDEF) 5727 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize); 5728 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 5729 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 5730 zextOrTrunc(sz) << BitPos); 5731 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 5732 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 5733 else 5734 return false; 5735 } 5736 5737 // The build_vector is all constants or undefs. Find the smallest element 5738 // size that splats the vector. 5739 5740 HasAnyUndefs = (SplatUndef != 0); 5741 while (sz > 8) { 5742 5743 unsigned HalfSize = sz / 2; 5744 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 5745 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 5746 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 5747 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 5748 5749 // If the two halves do not match (ignoring undef bits), stop here. 5750 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 5751 MinSplatBits > HalfSize) 5752 break; 5753 5754 SplatValue = HighValue | LowValue; 5755 SplatUndef = HighUndef & LowUndef; 5756 5757 sz = HalfSize; 5758 } 5759 5760 SplatBitSize = sz; 5761 return true; 5762} 5763 5764bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 5765 // Find the first non-undef value in the shuffle mask. 5766 unsigned i, e; 5767 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 5768 /* search */; 5769 5770 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 5771 5772 // Make sure all remaining elements are either undef or the same as the first 5773 // non-undef value. 5774 for (int Idx = Mask[i]; i != e; ++i) 5775 if (Mask[i] >= 0 && Mask[i] != Idx) 5776 return false; 5777 return true; 5778} 5779