SelectionDAG.cpp revision 1e559443a17d1b335f697551c6263ba60d5dd827
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "llvm/Constants.h" 17#include "llvm/Analysis/ValueTracking.h" 18#include "llvm/Function.h" 19#include "llvm/GlobalAlias.h" 20#include "llvm/GlobalVariable.h" 21#include "llvm/Intrinsics.h" 22#include "llvm/DerivedTypes.h" 23#include "llvm/Assembly/Writer.h" 24#include "llvm/CallingConv.h" 25#include "llvm/CodeGen/MachineBasicBlock.h" 26#include "llvm/CodeGen/MachineConstantPool.h" 27#include "llvm/CodeGen/MachineFrameInfo.h" 28#include "llvm/CodeGen/MachineModuleInfo.h" 29#include "llvm/CodeGen/PseudoSourceValue.h" 30#include "llvm/Target/TargetRegisterInfo.h" 31#include "llvm/Target/TargetData.h" 32#include "llvm/Target/TargetFrameInfo.h" 33#include "llvm/Target/TargetLowering.h" 34#include "llvm/Target/TargetOptions.h" 35#include "llvm/Target/TargetInstrInfo.h" 36#include "llvm/Target/TargetIntrinsicInfo.h" 37#include "llvm/Target/TargetMachine.h" 38#include "llvm/Support/CommandLine.h" 39#include "llvm/Support/Debug.h" 40#include "llvm/Support/ErrorHandling.h" 41#include "llvm/Support/ManagedStatic.h" 42#include "llvm/Support/MathExtras.h" 43#include "llvm/Support/raw_ostream.h" 44#include "llvm/System/Mutex.h" 45#include "llvm/ADT/SetVector.h" 46#include "llvm/ADT/SmallPtrSet.h" 47#include "llvm/ADT/SmallSet.h" 48#include "llvm/ADT/SmallVector.h" 49#include "llvm/ADT/StringExtras.h" 50#include <algorithm> 51#include <cmath> 52using namespace llvm; 53 54/// makeVTList - Return an instance of the SDVTList struct initialized with the 55/// specified members. 56static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 57 SDVTList Res = {VTs, NumVTs}; 58 return Res; 59} 60 61static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 62 switch (VT.getSimpleVT().SimpleTy) { 63 default: llvm_unreachable("Unknown FP format"); 64 case MVT::f32: return &APFloat::IEEEsingle; 65 case MVT::f64: return &APFloat::IEEEdouble; 66 case MVT::f80: return &APFloat::x87DoubleExtended; 67 case MVT::f128: return &APFloat::IEEEquad; 68 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 69 } 70} 71 72SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 73 74//===----------------------------------------------------------------------===// 75// ConstantFPSDNode Class 76//===----------------------------------------------------------------------===// 77 78/// isExactlyValue - We don't rely on operator== working on double values, as 79/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 80/// As such, this method can be used to do an exact bit-for-bit comparison of 81/// two floating point values. 82bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 83 return getValueAPF().bitwiseIsEqual(V); 84} 85 86bool ConstantFPSDNode::isValueValidForType(EVT VT, 87 const APFloat& Val) { 88 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 89 90 // PPC long double cannot be converted to any other type. 91 if (VT == MVT::ppcf128 || 92 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 93 return false; 94 95 // convert modifies in place, so make a copy. 96 APFloat Val2 = APFloat(Val); 97 bool losesInfo; 98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 99 &losesInfo); 100 return !losesInfo; 101} 102 103//===----------------------------------------------------------------------===// 104// ISD Namespace 105//===----------------------------------------------------------------------===// 106 107/// isBuildVectorAllOnes - Return true if the specified node is a 108/// BUILD_VECTOR where all of the elements are ~0 or undef. 109bool ISD::isBuildVectorAllOnes(const SDNode *N) { 110 // Look through a bit convert. 111 if (N->getOpcode() == ISD::BIT_CONVERT) 112 N = N->getOperand(0).getNode(); 113 114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 115 116 unsigned i = 0, e = N->getNumOperands(); 117 118 // Skip over all of the undef values. 119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 120 ++i; 121 122 // Do not accept an all-undef vector. 123 if (i == e) return false; 124 125 // Do not accept build_vectors that aren't all constants or which have non-~0 126 // elements. 127 SDValue NotZero = N->getOperand(i); 128 if (isa<ConstantSDNode>(NotZero)) { 129 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 130 return false; 131 } else if (isa<ConstantFPSDNode>(NotZero)) { 132 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 133 bitcastToAPInt().isAllOnesValue()) 134 return false; 135 } else 136 return false; 137 138 // Okay, we have at least one ~0 value, check to see if the rest match or are 139 // undefs. 140 for (++i; i != e; ++i) 141 if (N->getOperand(i) != NotZero && 142 N->getOperand(i).getOpcode() != ISD::UNDEF) 143 return false; 144 return true; 145} 146 147 148/// isBuildVectorAllZeros - Return true if the specified node is a 149/// BUILD_VECTOR where all of the elements are 0 or undef. 150bool ISD::isBuildVectorAllZeros(const SDNode *N) { 151 // Look through a bit convert. 152 if (N->getOpcode() == ISD::BIT_CONVERT) 153 N = N->getOperand(0).getNode(); 154 155 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 156 157 unsigned i = 0, e = N->getNumOperands(); 158 159 // Skip over all of the undef values. 160 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 161 ++i; 162 163 // Do not accept an all-undef vector. 164 if (i == e) return false; 165 166 // Do not accept build_vectors that aren't all constants or which have non-0 167 // elements. 168 SDValue Zero = N->getOperand(i); 169 if (isa<ConstantSDNode>(Zero)) { 170 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 171 return false; 172 } else if (isa<ConstantFPSDNode>(Zero)) { 173 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 174 return false; 175 } else 176 return false; 177 178 // Okay, we have at least one 0 value, check to see if the rest match or are 179 // undefs. 180 for (++i; i != e; ++i) 181 if (N->getOperand(i) != Zero && 182 N->getOperand(i).getOpcode() != ISD::UNDEF) 183 return false; 184 return true; 185} 186 187/// isScalarToVector - Return true if the specified node is a 188/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 189/// element is not an undef. 190bool ISD::isScalarToVector(const SDNode *N) { 191 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 192 return true; 193 194 if (N->getOpcode() != ISD::BUILD_VECTOR) 195 return false; 196 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 197 return false; 198 unsigned NumElems = N->getNumOperands(); 199 for (unsigned i = 1; i < NumElems; ++i) { 200 SDValue V = N->getOperand(i); 201 if (V.getOpcode() != ISD::UNDEF) 202 return false; 203 } 204 return true; 205} 206 207/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 208/// when given the operation for (X op Y). 209ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 210 // To perform this operation, we just need to swap the L and G bits of the 211 // operation. 212 unsigned OldL = (Operation >> 2) & 1; 213 unsigned OldG = (Operation >> 1) & 1; 214 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 215 (OldL << 1) | // New G bit 216 (OldG << 2)); // New L bit. 217} 218 219/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 220/// 'op' is a valid SetCC operation. 221ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 222 unsigned Operation = Op; 223 if (isInteger) 224 Operation ^= 7; // Flip L, G, E bits, but not U. 225 else 226 Operation ^= 15; // Flip all of the condition bits. 227 228 if (Operation > ISD::SETTRUE2) 229 Operation &= ~8; // Don't let N and U bits get set. 230 231 return ISD::CondCode(Operation); 232} 233 234 235/// isSignedOp - For an integer comparison, return 1 if the comparison is a 236/// signed operation and 2 if the result is an unsigned comparison. Return zero 237/// if the operation does not depend on the sign of the input (setne and seteq). 238static int isSignedOp(ISD::CondCode Opcode) { 239 switch (Opcode) { 240 default: llvm_unreachable("Illegal integer setcc operation!"); 241 case ISD::SETEQ: 242 case ISD::SETNE: return 0; 243 case ISD::SETLT: 244 case ISD::SETLE: 245 case ISD::SETGT: 246 case ISD::SETGE: return 1; 247 case ISD::SETULT: 248 case ISD::SETULE: 249 case ISD::SETUGT: 250 case ISD::SETUGE: return 2; 251 } 252} 253 254/// getSetCCOrOperation - Return the result of a logical OR between different 255/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 256/// returns SETCC_INVALID if it is not possible to represent the resultant 257/// comparison. 258ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 259 bool isInteger) { 260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 261 // Cannot fold a signed integer setcc with an unsigned integer setcc. 262 return ISD::SETCC_INVALID; 263 264 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 265 266 // If the N and U bits get set then the resultant comparison DOES suddenly 267 // care about orderedness, and is true when ordered. 268 if (Op > ISD::SETTRUE2) 269 Op &= ~16; // Clear the U bit if the N bit is set. 270 271 // Canonicalize illegal integer setcc's. 272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 273 Op = ISD::SETNE; 274 275 return ISD::CondCode(Op); 276} 277 278/// getSetCCAndOperation - Return the result of a logical AND between different 279/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 280/// function returns zero if it is not possible to represent the resultant 281/// comparison. 282ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 283 bool isInteger) { 284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 285 // Cannot fold a signed setcc with an unsigned setcc. 286 return ISD::SETCC_INVALID; 287 288 // Combine all of the condition bits. 289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 290 291 // Canonicalize illegal integer setcc's. 292 if (isInteger) { 293 switch (Result) { 294 default: break; 295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 296 case ISD::SETOEQ: // SETEQ & SETU[LG]E 297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 300 } 301 } 302 303 return Result; 304} 305 306const TargetMachine &SelectionDAG::getTarget() const { 307 return MF->getTarget(); 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 const SDValue *Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->getNode()); 332 ID.AddInteger(Ops->getResNo()); 333 } 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDUse *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346static void AddNodeIDNode(FoldingSetNodeID &ID, 347 unsigned short OpC, SDVTList VTList, 348 const SDValue *OpList, unsigned N) { 349 AddNodeIDOpcode(ID, OpC); 350 AddNodeIDValueTypes(ID, VTList); 351 AddNodeIDOperands(ID, OpList, N); 352} 353 354/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 355/// the NodeID data. 356static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 357 switch (N->getOpcode()) { 358 case ISD::TargetExternalSymbol: 359 case ISD::ExternalSymbol: 360 llvm_unreachable("Should only be used on nodes with operands"); 361 default: break; // Normal nodes don't need extra info. 362 case ISD::TargetConstant: 363 case ISD::Constant: 364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 365 break; 366 case ISD::TargetConstantFP: 367 case ISD::ConstantFP: { 368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 369 break; 370 } 371 case ISD::TargetGlobalAddress: 372 case ISD::GlobalAddress: 373 case ISD::TargetGlobalTLSAddress: 374 case ISD::GlobalTLSAddress: { 375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 376 ID.AddPointer(GA->getGlobal()); 377 ID.AddInteger(GA->getOffset()); 378 ID.AddInteger(GA->getTargetFlags()); 379 break; 380 } 381 case ISD::BasicBlock: 382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 383 break; 384 case ISD::Register: 385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 386 break; 387 388 case ISD::SRCVALUE: 389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 390 break; 391 case ISD::FrameIndex: 392 case ISD::TargetFrameIndex: 393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 394 break; 395 case ISD::JumpTable: 396 case ISD::TargetJumpTable: 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 399 break; 400 case ISD::ConstantPool: 401 case ISD::TargetConstantPool: { 402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 403 ID.AddInteger(CP->getAlignment()); 404 ID.AddInteger(CP->getOffset()); 405 if (CP->isMachineConstantPoolEntry()) 406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 407 else 408 ID.AddPointer(CP->getConstVal()); 409 ID.AddInteger(CP->getTargetFlags()); 410 break; 411 } 412 case ISD::LOAD: { 413 const LoadSDNode *LD = cast<LoadSDNode>(N); 414 ID.AddInteger(LD->getMemoryVT().getRawBits()); 415 ID.AddInteger(LD->getRawSubclassData()); 416 break; 417 } 418 case ISD::STORE: { 419 const StoreSDNode *ST = cast<StoreSDNode>(N); 420 ID.AddInteger(ST->getMemoryVT().getRawBits()); 421 ID.AddInteger(ST->getRawSubclassData()); 422 break; 423 } 424 case ISD::ATOMIC_CMP_SWAP: 425 case ISD::ATOMIC_SWAP: 426 case ISD::ATOMIC_LOAD_ADD: 427 case ISD::ATOMIC_LOAD_SUB: 428 case ISD::ATOMIC_LOAD_AND: 429 case ISD::ATOMIC_LOAD_OR: 430 case ISD::ATOMIC_LOAD_XOR: 431 case ISD::ATOMIC_LOAD_NAND: 432 case ISD::ATOMIC_LOAD_MIN: 433 case ISD::ATOMIC_LOAD_MAX: 434 case ISD::ATOMIC_LOAD_UMIN: 435 case ISD::ATOMIC_LOAD_UMAX: { 436 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 437 ID.AddInteger(AT->getMemoryVT().getRawBits()); 438 ID.AddInteger(AT->getRawSubclassData()); 439 break; 440 } 441 case ISD::VECTOR_SHUFFLE: { 442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 444 i != e; ++i) 445 ID.AddInteger(SVN->getMaskElt(i)); 446 break; 447 } 448 case ISD::TargetBlockAddress: 449 case ISD::BlockAddress: { 450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 452 break; 453 } 454 } // end switch (N->getOpcode()) 455} 456 457/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 458/// data. 459static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 460 AddNodeIDOpcode(ID, N->getOpcode()); 461 // Add the return value info. 462 AddNodeIDValueTypes(ID, N->getVTList()); 463 // Add the operand info. 464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 465 466 // Handle SDNode leafs with special info. 467 AddNodeIDCustom(ID, N); 468} 469 470/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 471/// the CSE map that carries volatility, indexing mode, and 472/// extension/truncation information. 473/// 474static inline unsigned 475encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile) { 476 assert((ConvType & 3) == ConvType && 477 "ConvType may not require more than 2 bits!"); 478 assert((AM & 7) == AM && 479 "AM may not require more than 3 bits!"); 480 return ConvType | 481 (AM << 2) | 482 (isVolatile << 5); 483} 484 485//===----------------------------------------------------------------------===// 486// SelectionDAG Class 487//===----------------------------------------------------------------------===// 488 489/// doNotCSE - Return true if CSE should not be performed for this node. 490static bool doNotCSE(SDNode *N) { 491 if (N->getValueType(0) == MVT::Flag) 492 return true; // Never CSE anything that produces a flag. 493 494 switch (N->getOpcode()) { 495 default: break; 496 case ISD::HANDLENODE: 497 case ISD::EH_LABEL: 498 return true; // Never CSE these nodes. 499 } 500 501 // Check that remaining values produced are not flags. 502 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 503 if (N->getValueType(i) == MVT::Flag) 504 return true; // Never CSE anything that produces a flag. 505 506 return false; 507} 508 509/// RemoveDeadNodes - This method deletes all unreachable nodes in the 510/// SelectionDAG. 511void SelectionDAG::RemoveDeadNodes() { 512 // Create a dummy node (which is not added to allnodes), that adds a reference 513 // to the root node, preventing it from being deleted. 514 HandleSDNode Dummy(getRoot()); 515 516 SmallVector<SDNode*, 128> DeadNodes; 517 518 // Add all obviously-dead nodes to the DeadNodes worklist. 519 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 520 if (I->use_empty()) 521 DeadNodes.push_back(I); 522 523 RemoveDeadNodes(DeadNodes); 524 525 // If the root changed (e.g. it was a dead load, update the root). 526 setRoot(Dummy.getValue()); 527} 528 529/// RemoveDeadNodes - This method deletes the unreachable nodes in the 530/// given list, and any nodes that become unreachable as a result. 531void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 532 DAGUpdateListener *UpdateListener) { 533 534 // Process the worklist, deleting the nodes and adding their uses to the 535 // worklist. 536 while (!DeadNodes.empty()) { 537 SDNode *N = DeadNodes.pop_back_val(); 538 539 if (UpdateListener) 540 UpdateListener->NodeDeleted(N, 0); 541 542 // Take the node out of the appropriate CSE map. 543 RemoveNodeFromCSEMaps(N); 544 545 // Next, brutally remove the operand list. This is safe to do, as there are 546 // no cycles in the graph. 547 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 548 SDUse &Use = *I++; 549 SDNode *Operand = Use.getNode(); 550 Use.set(SDValue()); 551 552 // Now that we removed this operand, see if there are no uses of it left. 553 if (Operand->use_empty()) 554 DeadNodes.push_back(Operand); 555 } 556 557 DeallocateNode(N); 558 } 559} 560 561void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 562 SmallVector<SDNode*, 16> DeadNodes(1, N); 563 RemoveDeadNodes(DeadNodes, UpdateListener); 564} 565 566void SelectionDAG::DeleteNode(SDNode *N) { 567 // First take this out of the appropriate CSE map. 568 RemoveNodeFromCSEMaps(N); 569 570 // Finally, remove uses due to operands of this node, remove from the 571 // AllNodes list, and delete the node. 572 DeleteNodeNotInCSEMaps(N); 573} 574 575void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 576 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 577 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 578 579 // Drop all of the operands and decrement used node's use counts. 580 N->DropOperands(); 581 582 DeallocateNode(N); 583} 584 585void SelectionDAG::DeallocateNode(SDNode *N) { 586 if (N->OperandsNeedDelete) 587 delete[] N->OperandList; 588 589 // Set the opcode to DELETED_NODE to help catch bugs when node 590 // memory is reallocated. 591 N->NodeType = ISD::DELETED_NODE; 592 593 NodeAllocator.Deallocate(AllNodes.remove(N)); 594 595 // Remove the ordering of this node. 596 Ordering->remove(N); 597} 598 599/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 600/// correspond to it. This is useful when we're about to delete or repurpose 601/// the node. We don't want future request for structurally identical nodes 602/// to return N anymore. 603bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 604 bool Erased = false; 605 switch (N->getOpcode()) { 606 case ISD::EntryToken: 607 llvm_unreachable("EntryToken should not be in CSEMaps!"); 608 return false; 609 case ISD::HANDLENODE: return false; // noop. 610 case ISD::CONDCODE: 611 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 612 "Cond code doesn't exist!"); 613 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 614 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 615 break; 616 case ISD::ExternalSymbol: 617 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 618 break; 619 case ISD::TargetExternalSymbol: { 620 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 621 Erased = TargetExternalSymbols.erase( 622 std::pair<std::string,unsigned char>(ESN->getSymbol(), 623 ESN->getTargetFlags())); 624 break; 625 } 626 case ISD::VALUETYPE: { 627 EVT VT = cast<VTSDNode>(N)->getVT(); 628 if (VT.isExtended()) { 629 Erased = ExtendedValueTypeNodes.erase(VT); 630 } else { 631 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 632 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 633 } 634 break; 635 } 636 default: 637 // Remove it from the CSE Map. 638 Erased = CSEMap.RemoveNode(N); 639 break; 640 } 641#ifndef NDEBUG 642 // Verify that the node was actually in one of the CSE maps, unless it has a 643 // flag result (which cannot be CSE'd) or is one of the special cases that are 644 // not subject to CSE. 645 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 646 !N->isMachineOpcode() && !doNotCSE(N)) { 647 N->dump(this); 648 dbgs() << "\n"; 649 llvm_unreachable("Node is not in map!"); 650 } 651#endif 652 return Erased; 653} 654 655/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 656/// maps and modified in place. Add it back to the CSE maps, unless an identical 657/// node already exists, in which case transfer all its users to the existing 658/// node. This transfer can potentially trigger recursive merging. 659/// 660void 661SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 662 DAGUpdateListener *UpdateListener) { 663 // For node types that aren't CSE'd, just act as if no identical node 664 // already exists. 665 if (!doNotCSE(N)) { 666 SDNode *Existing = CSEMap.GetOrInsertNode(N); 667 if (Existing != N) { 668 // If there was already an existing matching node, use ReplaceAllUsesWith 669 // to replace the dead one with the existing one. This can cause 670 // recursive merging of other unrelated nodes down the line. 671 ReplaceAllUsesWith(N, Existing, UpdateListener); 672 673 // N is now dead. Inform the listener if it exists and delete it. 674 if (UpdateListener) 675 UpdateListener->NodeDeleted(N, Existing); 676 DeleteNodeNotInCSEMaps(N); 677 return; 678 } 679 } 680 681 // If the node doesn't already exist, we updated it. Inform a listener if 682 // it exists. 683 if (UpdateListener) 684 UpdateListener->NodeUpdated(N); 685} 686 687/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 688/// were replaced with those specified. If this node is never memoized, 689/// return null, otherwise return a pointer to the slot it would take. If a 690/// node already exists with these operands, the slot will be non-null. 691SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 692 void *&InsertPos) { 693 if (doNotCSE(N)) 694 return 0; 695 696 SDValue Ops[] = { Op }; 697 FoldingSetNodeID ID; 698 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 699 AddNodeIDCustom(ID, N); 700 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 701 return Node; 702} 703 704/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 705/// were replaced with those specified. If this node is never memoized, 706/// return null, otherwise return a pointer to the slot it would take. If a 707/// node already exists with these operands, the slot will be non-null. 708SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 709 SDValue Op1, SDValue Op2, 710 void *&InsertPos) { 711 if (doNotCSE(N)) 712 return 0; 713 714 SDValue Ops[] = { Op1, Op2 }; 715 FoldingSetNodeID ID; 716 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 717 AddNodeIDCustom(ID, N); 718 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 719 return Node; 720} 721 722 723/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 724/// were replaced with those specified. If this node is never memoized, 725/// return null, otherwise return a pointer to the slot it would take. If a 726/// node already exists with these operands, the slot will be non-null. 727SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 728 const SDValue *Ops,unsigned NumOps, 729 void *&InsertPos) { 730 if (doNotCSE(N)) 731 return 0; 732 733 FoldingSetNodeID ID; 734 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 735 AddNodeIDCustom(ID, N); 736 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 737 return Node; 738} 739 740/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 741void SelectionDAG::VerifyNode(SDNode *N) { 742 switch (N->getOpcode()) { 743 default: 744 break; 745 case ISD::BUILD_PAIR: { 746 EVT VT = N->getValueType(0); 747 assert(N->getNumValues() == 1 && "Too many results!"); 748 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 749 "Wrong return type!"); 750 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 751 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 752 "Mismatched operand types!"); 753 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 754 "Wrong operand type!"); 755 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 756 "Wrong return type size"); 757 break; 758 } 759 case ISD::BUILD_VECTOR: { 760 assert(N->getNumValues() == 1 && "Too many results!"); 761 assert(N->getValueType(0).isVector() && "Wrong return type!"); 762 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 763 "Wrong number of operands!"); 764 EVT EltVT = N->getValueType(0).getVectorElementType(); 765 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 766 assert((I->getValueType() == EltVT || 767 (EltVT.isInteger() && I->getValueType().isInteger() && 768 EltVT.bitsLE(I->getValueType()))) && 769 "Wrong operand type!"); 770 break; 771 } 772 } 773} 774 775/// getEVTAlignment - Compute the default alignment value for the 776/// given type. 777/// 778unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 779 const Type *Ty = VT == MVT::iPTR ? 780 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 781 VT.getTypeForEVT(*getContext()); 782 783 return TLI.getTargetData()->getABITypeAlignment(Ty); 784} 785 786// EntryNode could meaningfully have debug info if we can find it... 787SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 788 : TLI(tli), FLI(fli), DW(0), 789 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(), 790 getVTList(MVT::Other)), 791 Root(getEntryNode()), Ordering(0) { 792 AllNodes.push_back(&EntryNode); 793 Ordering = new SDNodeOrdering(); 794} 795 796void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 797 DwarfWriter *dw) { 798 MF = &mf; 799 MMI = mmi; 800 DW = dw; 801 Context = &mf.getFunction()->getContext(); 802} 803 804SelectionDAG::~SelectionDAG() { 805 allnodes_clear(); 806 delete Ordering; 807} 808 809void SelectionDAG::allnodes_clear() { 810 assert(&*AllNodes.begin() == &EntryNode); 811 AllNodes.remove(AllNodes.begin()); 812 while (!AllNodes.empty()) 813 DeallocateNode(AllNodes.begin()); 814} 815 816void SelectionDAG::clear() { 817 allnodes_clear(); 818 OperandAllocator.Reset(); 819 CSEMap.clear(); 820 821 ExtendedValueTypeNodes.clear(); 822 ExternalSymbols.clear(); 823 TargetExternalSymbols.clear(); 824 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 825 static_cast<CondCodeSDNode*>(0)); 826 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 827 static_cast<SDNode*>(0)); 828 829 EntryNode.UseList = 0; 830 AllNodes.push_back(&EntryNode); 831 Root = getEntryNode(); 832 Ordering = new SDNodeOrdering(); 833} 834 835SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 836 return VT.bitsGT(Op.getValueType()) ? 837 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 838 getNode(ISD::TRUNCATE, DL, VT, Op); 839} 840 841SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 842 return VT.bitsGT(Op.getValueType()) ? 843 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 844 getNode(ISD::TRUNCATE, DL, VT, Op); 845} 846 847SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 848 assert(!VT.isVector() && 849 "getZeroExtendInReg should use the vector element type instead of " 850 "the vector type!"); 851 if (Op.getValueType() == VT) return Op; 852 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 853 APInt Imm = APInt::getLowBitsSet(BitWidth, 854 VT.getSizeInBits()); 855 return getNode(ISD::AND, DL, Op.getValueType(), Op, 856 getConstant(Imm, Op.getValueType())); 857} 858 859/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 860/// 861SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 862 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 863 SDValue NegOne = 864 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 865 return getNode(ISD::XOR, DL, VT, Val, NegOne); 866} 867 868SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 869 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 870 assert((EltVT.getSizeInBits() >= 64 || 871 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 872 "getConstant with a uint64_t value that doesn't fit in the type!"); 873 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 874} 875 876SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 877 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 878} 879 880SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 881 assert(VT.isInteger() && "Cannot create FP integer constant!"); 882 883 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 884 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 885 "APInt size does not match type size!"); 886 887 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 888 FoldingSetNodeID ID; 889 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 890 ID.AddPointer(&Val); 891 void *IP = 0; 892 SDNode *N = NULL; 893 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 894 if (!VT.isVector()) 895 return SDValue(N, 0); 896 897 if (!N) { 898 N = NodeAllocator.Allocate<ConstantSDNode>(); 899 new (N) ConstantSDNode(isT, &Val, EltVT); 900 CSEMap.InsertNode(N, IP); 901 AllNodes.push_back(N); 902 } 903 904 SDValue Result(N, 0); 905 if (VT.isVector()) { 906 SmallVector<SDValue, 8> Ops; 907 Ops.assign(VT.getVectorNumElements(), Result); 908 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 909 VT, &Ops[0], Ops.size()); 910 } 911 return Result; 912} 913 914SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 915 return getConstant(Val, TLI.getPointerTy(), isTarget); 916} 917 918 919SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 920 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 921} 922 923SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 924 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 925 926 EVT EltVT = 927 VT.isVector() ? VT.getVectorElementType() : VT; 928 929 // Do the map lookup using the actual bit pattern for the floating point 930 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 931 // we don't have issues with SNANs. 932 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 933 FoldingSetNodeID ID; 934 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 935 ID.AddPointer(&V); 936 void *IP = 0; 937 SDNode *N = NULL; 938 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 939 if (!VT.isVector()) 940 return SDValue(N, 0); 941 942 if (!N) { 943 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 944 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 945 CSEMap.InsertNode(N, IP); 946 AllNodes.push_back(N); 947 } 948 949 SDValue Result(N, 0); 950 if (VT.isVector()) { 951 SmallVector<SDValue, 8> Ops; 952 Ops.assign(VT.getVectorNumElements(), Result); 953 // FIXME DebugLoc info might be appropriate here 954 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 955 VT, &Ops[0], Ops.size()); 956 } 957 return Result; 958} 959 960SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 961 EVT EltVT = 962 VT.isVector() ? VT.getVectorElementType() : VT; 963 if (EltVT==MVT::f32) 964 return getConstantFP(APFloat((float)Val), VT, isTarget); 965 else 966 return getConstantFP(APFloat(Val), VT, isTarget); 967} 968 969SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 970 EVT VT, int64_t Offset, 971 bool isTargetGA, 972 unsigned char TargetFlags) { 973 assert((TargetFlags == 0 || isTargetGA) && 974 "Cannot set target flags on target-independent globals"); 975 976 // Truncate (with sign-extension) the offset value to the pointer size. 977 EVT PTy = TLI.getPointerTy(); 978 unsigned BitWidth = PTy.getSizeInBits(); 979 if (BitWidth < 64) 980 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 981 982 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 983 if (!GVar) { 984 // If GV is an alias then use the aliasee for determining thread-localness. 985 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 986 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 987 } 988 989 unsigned Opc; 990 if (GVar && GVar->isThreadLocal()) 991 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 992 else 993 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 994 995 FoldingSetNodeID ID; 996 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 997 ID.AddPointer(GV); 998 ID.AddInteger(Offset); 999 ID.AddInteger(TargetFlags); 1000 void *IP = 0; 1001 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1002 return SDValue(E, 0); 1003 1004 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 1005 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags); 1006 CSEMap.InsertNode(N, IP); 1007 AllNodes.push_back(N); 1008 return SDValue(N, 0); 1009} 1010 1011SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1012 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1013 FoldingSetNodeID ID; 1014 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1015 ID.AddInteger(FI); 1016 void *IP = 0; 1017 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1018 return SDValue(E, 0); 1019 1020 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1021 new (N) FrameIndexSDNode(FI, VT, isTarget); 1022 CSEMap.InsertNode(N, IP); 1023 AllNodes.push_back(N); 1024 return SDValue(N, 0); 1025} 1026 1027SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1028 unsigned char TargetFlags) { 1029 assert((TargetFlags == 0 || isTarget) && 1030 "Cannot set target flags on target-independent jump tables"); 1031 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1032 FoldingSetNodeID ID; 1033 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1034 ID.AddInteger(JTI); 1035 ID.AddInteger(TargetFlags); 1036 void *IP = 0; 1037 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1038 return SDValue(E, 0); 1039 1040 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1041 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags); 1042 CSEMap.InsertNode(N, IP); 1043 AllNodes.push_back(N); 1044 return SDValue(N, 0); 1045} 1046 1047SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1048 unsigned Alignment, int Offset, 1049 bool isTarget, 1050 unsigned char TargetFlags) { 1051 assert((TargetFlags == 0 || isTarget) && 1052 "Cannot set target flags on target-independent globals"); 1053 if (Alignment == 0) 1054 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1055 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1056 FoldingSetNodeID ID; 1057 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1058 ID.AddInteger(Alignment); 1059 ID.AddInteger(Offset); 1060 ID.AddPointer(C); 1061 ID.AddInteger(TargetFlags); 1062 void *IP = 0; 1063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1064 return SDValue(E, 0); 1065 1066 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1067 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1068 CSEMap.InsertNode(N, IP); 1069 AllNodes.push_back(N); 1070 return SDValue(N, 0); 1071} 1072 1073 1074SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1075 unsigned Alignment, int Offset, 1076 bool isTarget, 1077 unsigned char TargetFlags) { 1078 assert((TargetFlags == 0 || isTarget) && 1079 "Cannot set target flags on target-independent globals"); 1080 if (Alignment == 0) 1081 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1082 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1083 FoldingSetNodeID ID; 1084 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1085 ID.AddInteger(Alignment); 1086 ID.AddInteger(Offset); 1087 C->AddSelectionDAGCSEId(ID); 1088 ID.AddInteger(TargetFlags); 1089 void *IP = 0; 1090 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1091 return SDValue(E, 0); 1092 1093 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1094 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1095 CSEMap.InsertNode(N, IP); 1096 AllNodes.push_back(N); 1097 return SDValue(N, 0); 1098} 1099 1100SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1101 FoldingSetNodeID ID; 1102 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1103 ID.AddPointer(MBB); 1104 void *IP = 0; 1105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1106 return SDValue(E, 0); 1107 1108 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1109 new (N) BasicBlockSDNode(MBB); 1110 CSEMap.InsertNode(N, IP); 1111 AllNodes.push_back(N); 1112 return SDValue(N, 0); 1113} 1114 1115SDValue SelectionDAG::getValueType(EVT VT) { 1116 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1117 ValueTypeNodes.size()) 1118 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1119 1120 SDNode *&N = VT.isExtended() ? 1121 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1122 1123 if (N) return SDValue(N, 0); 1124 N = NodeAllocator.Allocate<VTSDNode>(); 1125 new (N) VTSDNode(VT); 1126 AllNodes.push_back(N); 1127 return SDValue(N, 0); 1128} 1129 1130SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1131 SDNode *&N = ExternalSymbols[Sym]; 1132 if (N) return SDValue(N, 0); 1133 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1134 new (N) ExternalSymbolSDNode(false, Sym, 0, VT); 1135 AllNodes.push_back(N); 1136 return SDValue(N, 0); 1137} 1138 1139SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1140 unsigned char TargetFlags) { 1141 SDNode *&N = 1142 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1143 TargetFlags)]; 1144 if (N) return SDValue(N, 0); 1145 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1146 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1147 AllNodes.push_back(N); 1148 return SDValue(N, 0); 1149} 1150 1151SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1152 if ((unsigned)Cond >= CondCodeNodes.size()) 1153 CondCodeNodes.resize(Cond+1); 1154 1155 if (CondCodeNodes[Cond] == 0) { 1156 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1157 new (N) CondCodeSDNode(Cond); 1158 CondCodeNodes[Cond] = N; 1159 AllNodes.push_back(N); 1160 } 1161 1162 return SDValue(CondCodeNodes[Cond], 0); 1163} 1164 1165// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1166// the shuffle mask M that point at N1 to point at N2, and indices that point 1167// N2 to point at N1. 1168static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1169 std::swap(N1, N2); 1170 int NElts = M.size(); 1171 for (int i = 0; i != NElts; ++i) { 1172 if (M[i] >= NElts) 1173 M[i] -= NElts; 1174 else if (M[i] >= 0) 1175 M[i] += NElts; 1176 } 1177} 1178 1179SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1180 SDValue N2, const int *Mask) { 1181 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1182 assert(VT.isVector() && N1.getValueType().isVector() && 1183 "Vector Shuffle VTs must be a vectors"); 1184 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1185 && "Vector Shuffle VTs must have same element type"); 1186 1187 // Canonicalize shuffle undef, undef -> undef 1188 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1189 return getUNDEF(VT); 1190 1191 // Validate that all indices in Mask are within the range of the elements 1192 // input to the shuffle. 1193 unsigned NElts = VT.getVectorNumElements(); 1194 SmallVector<int, 8> MaskVec; 1195 for (unsigned i = 0; i != NElts; ++i) { 1196 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1197 MaskVec.push_back(Mask[i]); 1198 } 1199 1200 // Canonicalize shuffle v, v -> v, undef 1201 if (N1 == N2) { 1202 N2 = getUNDEF(VT); 1203 for (unsigned i = 0; i != NElts; ++i) 1204 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1205 } 1206 1207 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1208 if (N1.getOpcode() == ISD::UNDEF) 1209 commuteShuffle(N1, N2, MaskVec); 1210 1211 // Canonicalize all index into lhs, -> shuffle lhs, undef 1212 // Canonicalize all index into rhs, -> shuffle rhs, undef 1213 bool AllLHS = true, AllRHS = true; 1214 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1215 for (unsigned i = 0; i != NElts; ++i) { 1216 if (MaskVec[i] >= (int)NElts) { 1217 if (N2Undef) 1218 MaskVec[i] = -1; 1219 else 1220 AllLHS = false; 1221 } else if (MaskVec[i] >= 0) { 1222 AllRHS = false; 1223 } 1224 } 1225 if (AllLHS && AllRHS) 1226 return getUNDEF(VT); 1227 if (AllLHS && !N2Undef) 1228 N2 = getUNDEF(VT); 1229 if (AllRHS) { 1230 N1 = getUNDEF(VT); 1231 commuteShuffle(N1, N2, MaskVec); 1232 } 1233 1234 // If Identity shuffle, or all shuffle in to undef, return that node. 1235 bool AllUndef = true; 1236 bool Identity = true; 1237 for (unsigned i = 0; i != NElts; ++i) { 1238 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1239 if (MaskVec[i] >= 0) AllUndef = false; 1240 } 1241 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1242 return N1; 1243 if (AllUndef) 1244 return getUNDEF(VT); 1245 1246 FoldingSetNodeID ID; 1247 SDValue Ops[2] = { N1, N2 }; 1248 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1249 for (unsigned i = 0; i != NElts; ++i) 1250 ID.AddInteger(MaskVec[i]); 1251 1252 void* IP = 0; 1253 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1254 return SDValue(E, 0); 1255 1256 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1257 // SDNode doesn't have access to it. This memory will be "leaked" when 1258 // the node is deallocated, but recovered when the NodeAllocator is released. 1259 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1260 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1261 1262 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>(); 1263 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1264 CSEMap.InsertNode(N, IP); 1265 AllNodes.push_back(N); 1266 return SDValue(N, 0); 1267} 1268 1269SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1270 SDValue Val, SDValue DTy, 1271 SDValue STy, SDValue Rnd, SDValue Sat, 1272 ISD::CvtCode Code) { 1273 // If the src and dest types are the same and the conversion is between 1274 // integer types of the same sign or two floats, no conversion is necessary. 1275 if (DTy == STy && 1276 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1277 return Val; 1278 1279 FoldingSetNodeID ID; 1280 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1281 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1282 void* IP = 0; 1283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1284 return SDValue(E, 0); 1285 1286 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1287 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code); 1288 CSEMap.InsertNode(N, IP); 1289 AllNodes.push_back(N); 1290 return SDValue(N, 0); 1291} 1292 1293SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1294 FoldingSetNodeID ID; 1295 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1296 ID.AddInteger(RegNo); 1297 void *IP = 0; 1298 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1299 return SDValue(E, 0); 1300 1301 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1302 new (N) RegisterSDNode(RegNo, VT); 1303 CSEMap.InsertNode(N, IP); 1304 AllNodes.push_back(N); 1305 return SDValue(N, 0); 1306} 1307 1308SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1309 SDValue Root, 1310 unsigned LabelID) { 1311 FoldingSetNodeID ID; 1312 SDValue Ops[] = { Root }; 1313 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1314 ID.AddInteger(LabelID); 1315 void *IP = 0; 1316 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1317 return SDValue(E, 0); 1318 1319 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1320 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1321 CSEMap.InsertNode(N, IP); 1322 AllNodes.push_back(N); 1323 return SDValue(N, 0); 1324} 1325 1326SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT, 1327 bool isTarget, 1328 unsigned char TargetFlags) { 1329 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1330 1331 FoldingSetNodeID ID; 1332 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1333 ID.AddPointer(BA); 1334 ID.AddInteger(TargetFlags); 1335 void *IP = 0; 1336 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1337 return SDValue(E, 0); 1338 1339 SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>(); 1340 new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1341 CSEMap.InsertNode(N, IP); 1342 AllNodes.push_back(N); 1343 return SDValue(N, 0); 1344} 1345 1346SDValue SelectionDAG::getSrcValue(const Value *V) { 1347 assert((!V || isa<PointerType>(V->getType())) && 1348 "SrcValue is not a pointer?"); 1349 1350 FoldingSetNodeID ID; 1351 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1352 ID.AddPointer(V); 1353 1354 void *IP = 0; 1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1356 return SDValue(E, 0); 1357 1358 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1359 new (N) SrcValueSDNode(V); 1360 CSEMap.InsertNode(N, IP); 1361 AllNodes.push_back(N); 1362 return SDValue(N, 0); 1363} 1364 1365/// getShiftAmountOperand - Return the specified value casted to 1366/// the target's desired shift amount type. 1367SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1368 EVT OpTy = Op.getValueType(); 1369 MVT ShTy = TLI.getShiftAmountTy(); 1370 if (OpTy == ShTy || OpTy.isVector()) return Op; 1371 1372 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1373 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1374} 1375 1376/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1377/// specified value type. 1378SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1379 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1380 unsigned ByteSize = VT.getStoreSize(); 1381 const Type *Ty = VT.getTypeForEVT(*getContext()); 1382 unsigned StackAlign = 1383 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1384 1385 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1386 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1387} 1388 1389/// CreateStackTemporary - Create a stack temporary suitable for holding 1390/// either of the specified value types. 1391SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1392 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1393 VT2.getStoreSizeInBits())/8; 1394 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1395 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1396 const TargetData *TD = TLI.getTargetData(); 1397 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1398 TD->getPrefTypeAlignment(Ty2)); 1399 1400 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1401 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1402 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1403} 1404 1405SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1406 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1407 // These setcc operations always fold. 1408 switch (Cond) { 1409 default: break; 1410 case ISD::SETFALSE: 1411 case ISD::SETFALSE2: return getConstant(0, VT); 1412 case ISD::SETTRUE: 1413 case ISD::SETTRUE2: return getConstant(1, VT); 1414 1415 case ISD::SETOEQ: 1416 case ISD::SETOGT: 1417 case ISD::SETOGE: 1418 case ISD::SETOLT: 1419 case ISD::SETOLE: 1420 case ISD::SETONE: 1421 case ISD::SETO: 1422 case ISD::SETUO: 1423 case ISD::SETUEQ: 1424 case ISD::SETUNE: 1425 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1426 break; 1427 } 1428 1429 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1430 const APInt &C2 = N2C->getAPIntValue(); 1431 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1432 const APInt &C1 = N1C->getAPIntValue(); 1433 1434 switch (Cond) { 1435 default: llvm_unreachable("Unknown integer setcc!"); 1436 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1437 case ISD::SETNE: return getConstant(C1 != C2, VT); 1438 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1439 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1440 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1441 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1442 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1443 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1444 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1445 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1446 } 1447 } 1448 } 1449 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1450 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1451 // No compile time operations on this type yet. 1452 if (N1C->getValueType(0) == MVT::ppcf128) 1453 return SDValue(); 1454 1455 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1456 switch (Cond) { 1457 default: break; 1458 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1459 return getUNDEF(VT); 1460 // fall through 1461 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1462 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1463 return getUNDEF(VT); 1464 // fall through 1465 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1466 R==APFloat::cmpLessThan, VT); 1467 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1468 return getUNDEF(VT); 1469 // fall through 1470 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1471 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1472 return getUNDEF(VT); 1473 // fall through 1474 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1475 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1476 return getUNDEF(VT); 1477 // fall through 1478 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1479 R==APFloat::cmpEqual, VT); 1480 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1481 return getUNDEF(VT); 1482 // fall through 1483 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1484 R==APFloat::cmpEqual, VT); 1485 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1486 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1487 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1488 R==APFloat::cmpEqual, VT); 1489 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1490 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1491 R==APFloat::cmpLessThan, VT); 1492 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1493 R==APFloat::cmpUnordered, VT); 1494 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1495 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1496 } 1497 } else { 1498 // Ensure that the constant occurs on the RHS. 1499 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1500 } 1501 } 1502 1503 // Could not fold it. 1504 return SDValue(); 1505} 1506 1507/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1508/// use this predicate to simplify operations downstream. 1509bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1510 // This predicate is not safe for vector operations. 1511 if (Op.getValueType().isVector()) 1512 return false; 1513 1514 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1515 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1516} 1517 1518/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1519/// this predicate to simplify operations downstream. Mask is known to be zero 1520/// for bits that V cannot have. 1521bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1522 unsigned Depth) const { 1523 APInt KnownZero, KnownOne; 1524 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1525 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1526 return (KnownZero & Mask) == Mask; 1527} 1528 1529/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1530/// known to be either zero or one and return them in the KnownZero/KnownOne 1531/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1532/// processing. 1533void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1534 APInt &KnownZero, APInt &KnownOne, 1535 unsigned Depth) const { 1536 unsigned BitWidth = Mask.getBitWidth(); 1537 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1538 "Mask size mismatches value type size!"); 1539 1540 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1541 if (Depth == 6 || Mask == 0) 1542 return; // Limit search depth. 1543 1544 APInt KnownZero2, KnownOne2; 1545 1546 switch (Op.getOpcode()) { 1547 case ISD::Constant: 1548 // We know all of the bits for a constant! 1549 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1550 KnownZero = ~KnownOne & Mask; 1551 return; 1552 case ISD::AND: 1553 // If either the LHS or the RHS are Zero, the result is zero. 1554 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1555 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1556 KnownZero2, KnownOne2, Depth+1); 1557 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1558 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1559 1560 // Output known-1 bits are only known if set in both the LHS & RHS. 1561 KnownOne &= KnownOne2; 1562 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1563 KnownZero |= KnownZero2; 1564 return; 1565 case ISD::OR: 1566 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1567 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1568 KnownZero2, KnownOne2, Depth+1); 1569 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1570 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1571 1572 // Output known-0 bits are only known if clear in both the LHS & RHS. 1573 KnownZero &= KnownZero2; 1574 // Output known-1 are known to be set if set in either the LHS | RHS. 1575 KnownOne |= KnownOne2; 1576 return; 1577 case ISD::XOR: { 1578 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1579 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1580 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1581 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1582 1583 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1584 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1585 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1586 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1587 KnownZero = KnownZeroOut; 1588 return; 1589 } 1590 case ISD::MUL: { 1591 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1592 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1593 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1594 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1595 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1596 1597 // If low bits are zero in either operand, output low known-0 bits. 1598 // Also compute a conserative estimate for high known-0 bits. 1599 // More trickiness is possible, but this is sufficient for the 1600 // interesting case of alignment computation. 1601 KnownOne.clear(); 1602 unsigned TrailZ = KnownZero.countTrailingOnes() + 1603 KnownZero2.countTrailingOnes(); 1604 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1605 KnownZero2.countLeadingOnes(), 1606 BitWidth) - BitWidth; 1607 1608 TrailZ = std::min(TrailZ, BitWidth); 1609 LeadZ = std::min(LeadZ, BitWidth); 1610 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1611 APInt::getHighBitsSet(BitWidth, LeadZ); 1612 KnownZero &= Mask; 1613 return; 1614 } 1615 case ISD::UDIV: { 1616 // For the purposes of computing leading zeros we can conservatively 1617 // treat a udiv as a logical right shift by the power of 2 known to 1618 // be less than the denominator. 1619 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1620 ComputeMaskedBits(Op.getOperand(0), 1621 AllOnes, KnownZero2, KnownOne2, Depth+1); 1622 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1623 1624 KnownOne2.clear(); 1625 KnownZero2.clear(); 1626 ComputeMaskedBits(Op.getOperand(1), 1627 AllOnes, KnownZero2, KnownOne2, Depth+1); 1628 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1629 if (RHSUnknownLeadingOnes != BitWidth) 1630 LeadZ = std::min(BitWidth, 1631 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1632 1633 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1634 return; 1635 } 1636 case ISD::SELECT: 1637 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1638 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1639 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1640 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1641 1642 // Only known if known in both the LHS and RHS. 1643 KnownOne &= KnownOne2; 1644 KnownZero &= KnownZero2; 1645 return; 1646 case ISD::SELECT_CC: 1647 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1648 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1649 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1650 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1651 1652 // Only known if known in both the LHS and RHS. 1653 KnownOne &= KnownOne2; 1654 KnownZero &= KnownZero2; 1655 return; 1656 case ISD::SADDO: 1657 case ISD::UADDO: 1658 case ISD::SSUBO: 1659 case ISD::USUBO: 1660 case ISD::SMULO: 1661 case ISD::UMULO: 1662 if (Op.getResNo() != 1) 1663 return; 1664 // The boolean result conforms to getBooleanContents. Fall through. 1665 case ISD::SETCC: 1666 // If we know the result of a setcc has the top bits zero, use this info. 1667 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1668 BitWidth > 1) 1669 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1670 return; 1671 case ISD::SHL: 1672 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1673 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1674 unsigned ShAmt = SA->getZExtValue(); 1675 1676 // If the shift count is an invalid immediate, don't do anything. 1677 if (ShAmt >= BitWidth) 1678 return; 1679 1680 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1681 KnownZero, KnownOne, Depth+1); 1682 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1683 KnownZero <<= ShAmt; 1684 KnownOne <<= ShAmt; 1685 // low bits known zero. 1686 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1687 } 1688 return; 1689 case ISD::SRL: 1690 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1691 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1692 unsigned ShAmt = SA->getZExtValue(); 1693 1694 // If the shift count is an invalid immediate, don't do anything. 1695 if (ShAmt >= BitWidth) 1696 return; 1697 1698 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1699 KnownZero, KnownOne, Depth+1); 1700 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1701 KnownZero = KnownZero.lshr(ShAmt); 1702 KnownOne = KnownOne.lshr(ShAmt); 1703 1704 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1705 KnownZero |= HighBits; // High bits known zero. 1706 } 1707 return; 1708 case ISD::SRA: 1709 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1710 unsigned ShAmt = SA->getZExtValue(); 1711 1712 // If the shift count is an invalid immediate, don't do anything. 1713 if (ShAmt >= BitWidth) 1714 return; 1715 1716 APInt InDemandedMask = (Mask << ShAmt); 1717 // If any of the demanded bits are produced by the sign extension, we also 1718 // demand the input sign bit. 1719 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1720 if (HighBits.getBoolValue()) 1721 InDemandedMask |= APInt::getSignBit(BitWidth); 1722 1723 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1724 Depth+1); 1725 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1726 KnownZero = KnownZero.lshr(ShAmt); 1727 KnownOne = KnownOne.lshr(ShAmt); 1728 1729 // Handle the sign bits. 1730 APInt SignBit = APInt::getSignBit(BitWidth); 1731 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1732 1733 if (KnownZero.intersects(SignBit)) { 1734 KnownZero |= HighBits; // New bits are known zero. 1735 } else if (KnownOne.intersects(SignBit)) { 1736 KnownOne |= HighBits; // New bits are known one. 1737 } 1738 } 1739 return; 1740 case ISD::SIGN_EXTEND_INREG: { 1741 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1742 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1743 1744 // Sign extension. Compute the demanded bits in the result that are not 1745 // present in the input. 1746 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1747 1748 APInt InSignBit = APInt::getSignBit(EBits); 1749 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1750 1751 // If the sign extended bits are demanded, we know that the sign 1752 // bit is demanded. 1753 InSignBit.zext(BitWidth); 1754 if (NewBits.getBoolValue()) 1755 InputDemandedBits |= InSignBit; 1756 1757 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1758 KnownZero, KnownOne, Depth+1); 1759 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1760 1761 // If the sign bit of the input is known set or clear, then we know the 1762 // top bits of the result. 1763 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1764 KnownZero |= NewBits; 1765 KnownOne &= ~NewBits; 1766 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1767 KnownOne |= NewBits; 1768 KnownZero &= ~NewBits; 1769 } else { // Input sign bit unknown 1770 KnownZero &= ~NewBits; 1771 KnownOne &= ~NewBits; 1772 } 1773 return; 1774 } 1775 case ISD::CTTZ: 1776 case ISD::CTLZ: 1777 case ISD::CTPOP: { 1778 unsigned LowBits = Log2_32(BitWidth)+1; 1779 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1780 KnownOne.clear(); 1781 return; 1782 } 1783 case ISD::LOAD: { 1784 if (ISD::isZEXTLoad(Op.getNode())) { 1785 LoadSDNode *LD = cast<LoadSDNode>(Op); 1786 EVT VT = LD->getMemoryVT(); 1787 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1788 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1789 } 1790 return; 1791 } 1792 case ISD::ZERO_EXTEND: { 1793 EVT InVT = Op.getOperand(0).getValueType(); 1794 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1795 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1796 APInt InMask = Mask; 1797 InMask.trunc(InBits); 1798 KnownZero.trunc(InBits); 1799 KnownOne.trunc(InBits); 1800 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1801 KnownZero.zext(BitWidth); 1802 KnownOne.zext(BitWidth); 1803 KnownZero |= NewBits; 1804 return; 1805 } 1806 case ISD::SIGN_EXTEND: { 1807 EVT InVT = Op.getOperand(0).getValueType(); 1808 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1809 APInt InSignBit = APInt::getSignBit(InBits); 1810 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1811 APInt InMask = Mask; 1812 InMask.trunc(InBits); 1813 1814 // If any of the sign extended bits are demanded, we know that the sign 1815 // bit is demanded. Temporarily set this bit in the mask for our callee. 1816 if (NewBits.getBoolValue()) 1817 InMask |= InSignBit; 1818 1819 KnownZero.trunc(InBits); 1820 KnownOne.trunc(InBits); 1821 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1822 1823 // Note if the sign bit is known to be zero or one. 1824 bool SignBitKnownZero = KnownZero.isNegative(); 1825 bool SignBitKnownOne = KnownOne.isNegative(); 1826 assert(!(SignBitKnownZero && SignBitKnownOne) && 1827 "Sign bit can't be known to be both zero and one!"); 1828 1829 // If the sign bit wasn't actually demanded by our caller, we don't 1830 // want it set in the KnownZero and KnownOne result values. Reset the 1831 // mask and reapply it to the result values. 1832 InMask = Mask; 1833 InMask.trunc(InBits); 1834 KnownZero &= InMask; 1835 KnownOne &= InMask; 1836 1837 KnownZero.zext(BitWidth); 1838 KnownOne.zext(BitWidth); 1839 1840 // If the sign bit is known zero or one, the top bits match. 1841 if (SignBitKnownZero) 1842 KnownZero |= NewBits; 1843 else if (SignBitKnownOne) 1844 KnownOne |= NewBits; 1845 return; 1846 } 1847 case ISD::ANY_EXTEND: { 1848 EVT InVT = Op.getOperand(0).getValueType(); 1849 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1850 APInt InMask = Mask; 1851 InMask.trunc(InBits); 1852 KnownZero.trunc(InBits); 1853 KnownOne.trunc(InBits); 1854 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1855 KnownZero.zext(BitWidth); 1856 KnownOne.zext(BitWidth); 1857 return; 1858 } 1859 case ISD::TRUNCATE: { 1860 EVT InVT = Op.getOperand(0).getValueType(); 1861 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1862 APInt InMask = Mask; 1863 InMask.zext(InBits); 1864 KnownZero.zext(InBits); 1865 KnownOne.zext(InBits); 1866 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1867 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1868 KnownZero.trunc(BitWidth); 1869 KnownOne.trunc(BitWidth); 1870 break; 1871 } 1872 case ISD::AssertZext: { 1873 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1874 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1875 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1876 KnownOne, Depth+1); 1877 KnownZero |= (~InMask) & Mask; 1878 return; 1879 } 1880 case ISD::FGETSIGN: 1881 // All bits are zero except the low bit. 1882 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1883 return; 1884 1885 case ISD::SUB: { 1886 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1887 // We know that the top bits of C-X are clear if X contains less bits 1888 // than C (i.e. no wrap-around can happen). For example, 20-X is 1889 // positive if we can prove that X is >= 0 and < 16. 1890 if (CLHS->getAPIntValue().isNonNegative()) { 1891 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1892 // NLZ can't be BitWidth with no sign bit 1893 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1894 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1895 Depth+1); 1896 1897 // If all of the MaskV bits are known to be zero, then we know the 1898 // output top bits are zero, because we now know that the output is 1899 // from [0-C]. 1900 if ((KnownZero2 & MaskV) == MaskV) { 1901 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1902 // Top bits known zero. 1903 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1904 } 1905 } 1906 } 1907 } 1908 // fall through 1909 case ISD::ADD: { 1910 // Output known-0 bits are known if clear or set in both the low clear bits 1911 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1912 // low 3 bits clear. 1913 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1914 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1915 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1916 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1917 1918 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1919 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1920 KnownZeroOut = std::min(KnownZeroOut, 1921 KnownZero2.countTrailingOnes()); 1922 1923 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1924 return; 1925 } 1926 case ISD::SREM: 1927 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1928 const APInt &RA = Rem->getAPIntValue().abs(); 1929 if (RA.isPowerOf2()) { 1930 APInt LowBits = RA - 1; 1931 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1932 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1933 1934 // The low bits of the first operand are unchanged by the srem. 1935 KnownZero = KnownZero2 & LowBits; 1936 KnownOne = KnownOne2 & LowBits; 1937 1938 // If the first operand is non-negative or has all low bits zero, then 1939 // the upper bits are all zero. 1940 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1941 KnownZero |= ~LowBits; 1942 1943 // If the first operand is negative and not all low bits are zero, then 1944 // the upper bits are all one. 1945 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1946 KnownOne |= ~LowBits; 1947 1948 KnownZero &= Mask; 1949 KnownOne &= Mask; 1950 1951 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1952 } 1953 } 1954 return; 1955 case ISD::UREM: { 1956 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1957 const APInt &RA = Rem->getAPIntValue(); 1958 if (RA.isPowerOf2()) { 1959 APInt LowBits = (RA - 1); 1960 APInt Mask2 = LowBits & Mask; 1961 KnownZero |= ~LowBits & Mask; 1962 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1963 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1964 break; 1965 } 1966 } 1967 1968 // Since the result is less than or equal to either operand, any leading 1969 // zero bits in either operand must also exist in the result. 1970 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1971 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1972 Depth+1); 1973 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1974 Depth+1); 1975 1976 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1977 KnownZero2.countLeadingOnes()); 1978 KnownOne.clear(); 1979 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1980 return; 1981 } 1982 default: 1983 // Allow the target to implement this method for its nodes. 1984 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1985 case ISD::INTRINSIC_WO_CHAIN: 1986 case ISD::INTRINSIC_W_CHAIN: 1987 case ISD::INTRINSIC_VOID: 1988 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1989 Depth); 1990 } 1991 return; 1992 } 1993} 1994 1995/// ComputeNumSignBits - Return the number of times the sign bit of the 1996/// register is replicated into the other bits. We know that at least 1 bit 1997/// is always equal to the sign bit (itself), but other cases can give us 1998/// information. For example, immediately after an "SRA X, 2", we know that 1999/// the top 3 bits are all equal to each other, so we return 3. 2000unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2001 EVT VT = Op.getValueType(); 2002 assert(VT.isInteger() && "Invalid VT!"); 2003 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2004 unsigned Tmp, Tmp2; 2005 unsigned FirstAnswer = 1; 2006 2007 if (Depth == 6) 2008 return 1; // Limit search depth. 2009 2010 switch (Op.getOpcode()) { 2011 default: break; 2012 case ISD::AssertSext: 2013 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2014 return VTBits-Tmp+1; 2015 case ISD::AssertZext: 2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2017 return VTBits-Tmp; 2018 2019 case ISD::Constant: { 2020 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2021 // If negative, return # leading ones. 2022 if (Val.isNegative()) 2023 return Val.countLeadingOnes(); 2024 2025 // Return # leading zeros. 2026 return Val.countLeadingZeros(); 2027 } 2028 2029 case ISD::SIGN_EXTEND: 2030 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2031 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2032 2033 case ISD::SIGN_EXTEND_INREG: 2034 // Max of the input and what this extends. 2035 Tmp = 2036 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2037 Tmp = VTBits-Tmp+1; 2038 2039 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2040 return std::max(Tmp, Tmp2); 2041 2042 case ISD::SRA: 2043 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2044 // SRA X, C -> adds C sign bits. 2045 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2046 Tmp += C->getZExtValue(); 2047 if (Tmp > VTBits) Tmp = VTBits; 2048 } 2049 return Tmp; 2050 case ISD::SHL: 2051 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2052 // shl destroys sign bits. 2053 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2054 if (C->getZExtValue() >= VTBits || // Bad shift. 2055 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2056 return Tmp - C->getZExtValue(); 2057 } 2058 break; 2059 case ISD::AND: 2060 case ISD::OR: 2061 case ISD::XOR: // NOT is handled here. 2062 // Logical binary ops preserve the number of sign bits at the worst. 2063 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2064 if (Tmp != 1) { 2065 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2066 FirstAnswer = std::min(Tmp, Tmp2); 2067 // We computed what we know about the sign bits as our first 2068 // answer. Now proceed to the generic code that uses 2069 // ComputeMaskedBits, and pick whichever answer is better. 2070 } 2071 break; 2072 2073 case ISD::SELECT: 2074 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2075 if (Tmp == 1) return 1; // Early out. 2076 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2077 return std::min(Tmp, Tmp2); 2078 2079 case ISD::SADDO: 2080 case ISD::UADDO: 2081 case ISD::SSUBO: 2082 case ISD::USUBO: 2083 case ISD::SMULO: 2084 case ISD::UMULO: 2085 if (Op.getResNo() != 1) 2086 break; 2087 // The boolean result conforms to getBooleanContents. Fall through. 2088 case ISD::SETCC: 2089 // If setcc returns 0/-1, all bits are sign bits. 2090 if (TLI.getBooleanContents() == 2091 TargetLowering::ZeroOrNegativeOneBooleanContent) 2092 return VTBits; 2093 break; 2094 case ISD::ROTL: 2095 case ISD::ROTR: 2096 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2097 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2098 2099 // Handle rotate right by N like a rotate left by 32-N. 2100 if (Op.getOpcode() == ISD::ROTR) 2101 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2102 2103 // If we aren't rotating out all of the known-in sign bits, return the 2104 // number that are left. This handles rotl(sext(x), 1) for example. 2105 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2106 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2107 } 2108 break; 2109 case ISD::ADD: 2110 // Add can have at most one carry bit. Thus we know that the output 2111 // is, at worst, one more bit than the inputs. 2112 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2113 if (Tmp == 1) return 1; // Early out. 2114 2115 // Special case decrementing a value (ADD X, -1): 2116 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2117 if (CRHS->isAllOnesValue()) { 2118 APInt KnownZero, KnownOne; 2119 APInt Mask = APInt::getAllOnesValue(VTBits); 2120 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2121 2122 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2123 // sign bits set. 2124 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2125 return VTBits; 2126 2127 // If we are subtracting one from a positive number, there is no carry 2128 // out of the result. 2129 if (KnownZero.isNegative()) 2130 return Tmp; 2131 } 2132 2133 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2134 if (Tmp2 == 1) return 1; 2135 return std::min(Tmp, Tmp2)-1; 2136 break; 2137 2138 case ISD::SUB: 2139 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2140 if (Tmp2 == 1) return 1; 2141 2142 // Handle NEG. 2143 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2144 if (CLHS->isNullValue()) { 2145 APInt KnownZero, KnownOne; 2146 APInt Mask = APInt::getAllOnesValue(VTBits); 2147 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2148 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2149 // sign bits set. 2150 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2151 return VTBits; 2152 2153 // If the input is known to be positive (the sign bit is known clear), 2154 // the output of the NEG has the same number of sign bits as the input. 2155 if (KnownZero.isNegative()) 2156 return Tmp2; 2157 2158 // Otherwise, we treat this like a SUB. 2159 } 2160 2161 // Sub can have at most one carry bit. Thus we know that the output 2162 // is, at worst, one more bit than the inputs. 2163 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2164 if (Tmp == 1) return 1; // Early out. 2165 return std::min(Tmp, Tmp2)-1; 2166 break; 2167 case ISD::TRUNCATE: 2168 // FIXME: it's tricky to do anything useful for this, but it is an important 2169 // case for targets like X86. 2170 break; 2171 } 2172 2173 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2174 if (Op.getOpcode() == ISD::LOAD) { 2175 LoadSDNode *LD = cast<LoadSDNode>(Op); 2176 unsigned ExtType = LD->getExtensionType(); 2177 switch (ExtType) { 2178 default: break; 2179 case ISD::SEXTLOAD: // '17' bits known 2180 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2181 return VTBits-Tmp+1; 2182 case ISD::ZEXTLOAD: // '16' bits known 2183 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2184 return VTBits-Tmp; 2185 } 2186 } 2187 2188 // Allow the target to implement this method for its nodes. 2189 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2190 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2191 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2192 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2193 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2194 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2195 } 2196 2197 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2198 // use this information. 2199 APInt KnownZero, KnownOne; 2200 APInt Mask = APInt::getAllOnesValue(VTBits); 2201 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2202 2203 if (KnownZero.isNegative()) { // sign bit is 0 2204 Mask = KnownZero; 2205 } else if (KnownOne.isNegative()) { // sign bit is 1; 2206 Mask = KnownOne; 2207 } else { 2208 // Nothing known. 2209 return FirstAnswer; 2210 } 2211 2212 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2213 // the number of identical bits in the top of the input value. 2214 Mask = ~Mask; 2215 Mask <<= Mask.getBitWidth()-VTBits; 2216 // Return # leading zeros. We use 'min' here in case Val was zero before 2217 // shifting. We don't want to return '64' as for an i32 "0". 2218 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2219} 2220 2221bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2222 // If we're told that NaNs won't happen, assume they won't. 2223 if (FiniteOnlyFPMath()) 2224 return true; 2225 2226 // If the value is a constant, we can obviously see if it is a NaN or not. 2227 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2228 return !C->getValueAPF().isNaN(); 2229 2230 // TODO: Recognize more cases here. 2231 2232 return false; 2233} 2234 2235bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2236 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2237 if (!GA) return false; 2238 if (GA->getOffset() != 0) return false; 2239 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2240 if (!GV) return false; 2241 MachineModuleInfo *MMI = getMachineModuleInfo(); 2242 return MMI && MMI->hasDebugInfo(); 2243} 2244 2245 2246/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2247/// element of the result of the vector shuffle. 2248SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2249 unsigned i) { 2250 EVT VT = N->getValueType(0); 2251 DebugLoc dl = N->getDebugLoc(); 2252 if (N->getMaskElt(i) < 0) 2253 return getUNDEF(VT.getVectorElementType()); 2254 unsigned Index = N->getMaskElt(i); 2255 unsigned NumElems = VT.getVectorNumElements(); 2256 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2257 Index %= NumElems; 2258 2259 if (V.getOpcode() == ISD::BIT_CONVERT) { 2260 V = V.getOperand(0); 2261 EVT VVT = V.getValueType(); 2262 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2263 return SDValue(); 2264 } 2265 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2266 return (Index == 0) ? V.getOperand(0) 2267 : getUNDEF(VT.getVectorElementType()); 2268 if (V.getOpcode() == ISD::BUILD_VECTOR) 2269 return V.getOperand(Index); 2270 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2271 return getShuffleScalarElt(SVN, Index); 2272 return SDValue(); 2273} 2274 2275 2276/// getNode - Gets or creates the specified node. 2277/// 2278SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2279 FoldingSetNodeID ID; 2280 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2281 void *IP = 0; 2282 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2283 return SDValue(E, 0); 2284 2285 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2286 new (N) SDNode(Opcode, DL, getVTList(VT)); 2287 CSEMap.InsertNode(N, IP); 2288 2289 AllNodes.push_back(N); 2290#ifndef NDEBUG 2291 VerifyNode(N); 2292#endif 2293 return SDValue(N, 0); 2294} 2295 2296SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2297 EVT VT, SDValue Operand) { 2298 // Constant fold unary operations with an integer constant operand. 2299 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2300 const APInt &Val = C->getAPIntValue(); 2301 unsigned BitWidth = VT.getSizeInBits(); 2302 switch (Opcode) { 2303 default: break; 2304 case ISD::SIGN_EXTEND: 2305 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2306 case ISD::ANY_EXTEND: 2307 case ISD::ZERO_EXTEND: 2308 case ISD::TRUNCATE: 2309 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2310 case ISD::UINT_TO_FP: 2311 case ISD::SINT_TO_FP: { 2312 const uint64_t zero[] = {0, 0}; 2313 // No compile time operations on this type. 2314 if (VT==MVT::ppcf128) 2315 break; 2316 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2317 (void)apf.convertFromAPInt(Val, 2318 Opcode==ISD::SINT_TO_FP, 2319 APFloat::rmNearestTiesToEven); 2320 return getConstantFP(apf, VT); 2321 } 2322 case ISD::BIT_CONVERT: 2323 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2324 return getConstantFP(Val.bitsToFloat(), VT); 2325 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2326 return getConstantFP(Val.bitsToDouble(), VT); 2327 break; 2328 case ISD::BSWAP: 2329 return getConstant(Val.byteSwap(), VT); 2330 case ISD::CTPOP: 2331 return getConstant(Val.countPopulation(), VT); 2332 case ISD::CTLZ: 2333 return getConstant(Val.countLeadingZeros(), VT); 2334 case ISD::CTTZ: 2335 return getConstant(Val.countTrailingZeros(), VT); 2336 } 2337 } 2338 2339 // Constant fold unary operations with a floating point constant operand. 2340 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2341 APFloat V = C->getValueAPF(); // make copy 2342 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2343 switch (Opcode) { 2344 case ISD::FNEG: 2345 V.changeSign(); 2346 return getConstantFP(V, VT); 2347 case ISD::FABS: 2348 V.clearSign(); 2349 return getConstantFP(V, VT); 2350 case ISD::FP_ROUND: 2351 case ISD::FP_EXTEND: { 2352 bool ignored; 2353 // This can return overflow, underflow, or inexact; we don't care. 2354 // FIXME need to be more flexible about rounding mode. 2355 (void)V.convert(*EVTToAPFloatSemantics(VT), 2356 APFloat::rmNearestTiesToEven, &ignored); 2357 return getConstantFP(V, VT); 2358 } 2359 case ISD::FP_TO_SINT: 2360 case ISD::FP_TO_UINT: { 2361 integerPart x[2]; 2362 bool ignored; 2363 assert(integerPartWidth >= 64); 2364 // FIXME need to be more flexible about rounding mode. 2365 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2366 Opcode==ISD::FP_TO_SINT, 2367 APFloat::rmTowardZero, &ignored); 2368 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2369 break; 2370 APInt api(VT.getSizeInBits(), 2, x); 2371 return getConstant(api, VT); 2372 } 2373 case ISD::BIT_CONVERT: 2374 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2375 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2376 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2377 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2378 break; 2379 } 2380 } 2381 } 2382 2383 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2384 switch (Opcode) { 2385 case ISD::TokenFactor: 2386 case ISD::MERGE_VALUES: 2387 case ISD::CONCAT_VECTORS: 2388 return Operand; // Factor, merge or concat of one node? No need. 2389 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2390 case ISD::FP_EXTEND: 2391 assert(VT.isFloatingPoint() && 2392 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2393 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2394 assert((!VT.isVector() || 2395 VT.getVectorNumElements() == 2396 Operand.getValueType().getVectorNumElements()) && 2397 "Vector element count mismatch!"); 2398 if (Operand.getOpcode() == ISD::UNDEF) 2399 return getUNDEF(VT); 2400 break; 2401 case ISD::SIGN_EXTEND: 2402 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2403 "Invalid SIGN_EXTEND!"); 2404 if (Operand.getValueType() == VT) return Operand; // noop extension 2405 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2406 "Invalid sext node, dst < src!"); 2407 assert((!VT.isVector() || 2408 VT.getVectorNumElements() == 2409 Operand.getValueType().getVectorNumElements()) && 2410 "Vector element count mismatch!"); 2411 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2412 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2413 break; 2414 case ISD::ZERO_EXTEND: 2415 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2416 "Invalid ZERO_EXTEND!"); 2417 if (Operand.getValueType() == VT) return Operand; // noop extension 2418 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2419 "Invalid zext node, dst < src!"); 2420 assert((!VT.isVector() || 2421 VT.getVectorNumElements() == 2422 Operand.getValueType().getVectorNumElements()) && 2423 "Vector element count mismatch!"); 2424 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2425 return getNode(ISD::ZERO_EXTEND, DL, VT, 2426 Operand.getNode()->getOperand(0)); 2427 break; 2428 case ISD::ANY_EXTEND: 2429 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2430 "Invalid ANY_EXTEND!"); 2431 if (Operand.getValueType() == VT) return Operand; // noop extension 2432 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2433 "Invalid anyext node, dst < src!"); 2434 assert((!VT.isVector() || 2435 VT.getVectorNumElements() == 2436 Operand.getValueType().getVectorNumElements()) && 2437 "Vector element count mismatch!"); 2438 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2439 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2440 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2441 break; 2442 case ISD::TRUNCATE: 2443 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2444 "Invalid TRUNCATE!"); 2445 if (Operand.getValueType() == VT) return Operand; // noop truncate 2446 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2447 "Invalid truncate node, src < dst!"); 2448 assert((!VT.isVector() || 2449 VT.getVectorNumElements() == 2450 Operand.getValueType().getVectorNumElements()) && 2451 "Vector element count mismatch!"); 2452 if (OpOpcode == ISD::TRUNCATE) 2453 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2454 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2455 OpOpcode == ISD::ANY_EXTEND) { 2456 // If the source is smaller than the dest, we still need an extend. 2457 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2458 .bitsLT(VT.getScalarType())) 2459 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2460 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2461 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2462 else 2463 return Operand.getNode()->getOperand(0); 2464 } 2465 break; 2466 case ISD::BIT_CONVERT: 2467 // Basic sanity checking. 2468 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2469 && "Cannot BIT_CONVERT between types of different sizes!"); 2470 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2471 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2472 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2473 if (OpOpcode == ISD::UNDEF) 2474 return getUNDEF(VT); 2475 break; 2476 case ISD::SCALAR_TO_VECTOR: 2477 assert(VT.isVector() && !Operand.getValueType().isVector() && 2478 (VT.getVectorElementType() == Operand.getValueType() || 2479 (VT.getVectorElementType().isInteger() && 2480 Operand.getValueType().isInteger() && 2481 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2482 "Illegal SCALAR_TO_VECTOR node!"); 2483 if (OpOpcode == ISD::UNDEF) 2484 return getUNDEF(VT); 2485 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2486 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2487 isa<ConstantSDNode>(Operand.getOperand(1)) && 2488 Operand.getConstantOperandVal(1) == 0 && 2489 Operand.getOperand(0).getValueType() == VT) 2490 return Operand.getOperand(0); 2491 break; 2492 case ISD::FNEG: 2493 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2494 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2495 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2496 Operand.getNode()->getOperand(0)); 2497 if (OpOpcode == ISD::FNEG) // --X -> X 2498 return Operand.getNode()->getOperand(0); 2499 break; 2500 case ISD::FABS: 2501 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2502 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2503 break; 2504 } 2505 2506 SDNode *N; 2507 SDVTList VTs = getVTList(VT); 2508 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2509 FoldingSetNodeID ID; 2510 SDValue Ops[1] = { Operand }; 2511 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2512 void *IP = 0; 2513 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2514 return SDValue(E, 0); 2515 2516 N = NodeAllocator.Allocate<UnarySDNode>(); 2517 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2518 CSEMap.InsertNode(N, IP); 2519 } else { 2520 N = NodeAllocator.Allocate<UnarySDNode>(); 2521 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2522 } 2523 2524 AllNodes.push_back(N); 2525#ifndef NDEBUG 2526 VerifyNode(N); 2527#endif 2528 return SDValue(N, 0); 2529} 2530 2531SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2532 EVT VT, 2533 ConstantSDNode *Cst1, 2534 ConstantSDNode *Cst2) { 2535 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2536 2537 switch (Opcode) { 2538 case ISD::ADD: return getConstant(C1 + C2, VT); 2539 case ISD::SUB: return getConstant(C1 - C2, VT); 2540 case ISD::MUL: return getConstant(C1 * C2, VT); 2541 case ISD::UDIV: 2542 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2543 break; 2544 case ISD::UREM: 2545 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2546 break; 2547 case ISD::SDIV: 2548 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2549 break; 2550 case ISD::SREM: 2551 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2552 break; 2553 case ISD::AND: return getConstant(C1 & C2, VT); 2554 case ISD::OR: return getConstant(C1 | C2, VT); 2555 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2556 case ISD::SHL: return getConstant(C1 << C2, VT); 2557 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2558 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2559 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2560 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2561 default: break; 2562 } 2563 2564 return SDValue(); 2565} 2566 2567SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2568 SDValue N1, SDValue N2) { 2569 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2570 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2571 switch (Opcode) { 2572 default: break; 2573 case ISD::TokenFactor: 2574 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2575 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2576 // Fold trivial token factors. 2577 if (N1.getOpcode() == ISD::EntryToken) return N2; 2578 if (N2.getOpcode() == ISD::EntryToken) return N1; 2579 if (N1 == N2) return N1; 2580 break; 2581 case ISD::CONCAT_VECTORS: 2582 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2583 // one big BUILD_VECTOR. 2584 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2585 N2.getOpcode() == ISD::BUILD_VECTOR) { 2586 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2587 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2588 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2589 } 2590 break; 2591 case ISD::AND: 2592 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2593 N1.getValueType() == VT && "Binary operator types must match!"); 2594 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2595 // worth handling here. 2596 if (N2C && N2C->isNullValue()) 2597 return N2; 2598 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2599 return N1; 2600 break; 2601 case ISD::OR: 2602 case ISD::XOR: 2603 case ISD::ADD: 2604 case ISD::SUB: 2605 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2606 N1.getValueType() == VT && "Binary operator types must match!"); 2607 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2608 // it's worth handling here. 2609 if (N2C && N2C->isNullValue()) 2610 return N1; 2611 break; 2612 case ISD::UDIV: 2613 case ISD::UREM: 2614 case ISD::MULHU: 2615 case ISD::MULHS: 2616 case ISD::MUL: 2617 case ISD::SDIV: 2618 case ISD::SREM: 2619 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2620 // fall through 2621 case ISD::FADD: 2622 case ISD::FSUB: 2623 case ISD::FMUL: 2624 case ISD::FDIV: 2625 case ISD::FREM: 2626 if (UnsafeFPMath) { 2627 if (Opcode == ISD::FADD) { 2628 // 0+x --> x 2629 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2630 if (CFP->getValueAPF().isZero()) 2631 return N2; 2632 // x+0 --> x 2633 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2634 if (CFP->getValueAPF().isZero()) 2635 return N1; 2636 } else if (Opcode == ISD::FSUB) { 2637 // x-0 --> x 2638 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2639 if (CFP->getValueAPF().isZero()) 2640 return N1; 2641 } 2642 } 2643 assert(N1.getValueType() == N2.getValueType() && 2644 N1.getValueType() == VT && "Binary operator types must match!"); 2645 break; 2646 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2647 assert(N1.getValueType() == VT && 2648 N1.getValueType().isFloatingPoint() && 2649 N2.getValueType().isFloatingPoint() && 2650 "Invalid FCOPYSIGN!"); 2651 break; 2652 case ISD::SHL: 2653 case ISD::SRA: 2654 case ISD::SRL: 2655 case ISD::ROTL: 2656 case ISD::ROTR: 2657 assert(VT == N1.getValueType() && 2658 "Shift operators return type must be the same as their first arg"); 2659 assert(VT.isInteger() && N2.getValueType().isInteger() && 2660 "Shifts only work on integers"); 2661 2662 // Always fold shifts of i1 values so the code generator doesn't need to 2663 // handle them. Since we know the size of the shift has to be less than the 2664 // size of the value, the shift/rotate count is guaranteed to be zero. 2665 if (VT == MVT::i1) 2666 return N1; 2667 if (N2C && N2C->isNullValue()) 2668 return N1; 2669 break; 2670 case ISD::FP_ROUND_INREG: { 2671 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2672 assert(VT == N1.getValueType() && "Not an inreg round!"); 2673 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2674 "Cannot FP_ROUND_INREG integer types"); 2675 assert(EVT.isVector() == VT.isVector() && 2676 "FP_ROUND_INREG type should be vector iff the operand " 2677 "type is vector!"); 2678 assert((!EVT.isVector() || 2679 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2680 "Vector element counts must match in FP_ROUND_INREG"); 2681 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2682 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2683 break; 2684 } 2685 case ISD::FP_ROUND: 2686 assert(VT.isFloatingPoint() && 2687 N1.getValueType().isFloatingPoint() && 2688 VT.bitsLE(N1.getValueType()) && 2689 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2690 if (N1.getValueType() == VT) return N1; // noop conversion. 2691 break; 2692 case ISD::AssertSext: 2693 case ISD::AssertZext: { 2694 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2695 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2696 assert(VT.isInteger() && EVT.isInteger() && 2697 "Cannot *_EXTEND_INREG FP types"); 2698 assert(!EVT.isVector() && 2699 "AssertSExt/AssertZExt type should be the vector element type " 2700 "rather than the vector type!"); 2701 assert(EVT.bitsLE(VT) && "Not extending!"); 2702 if (VT == EVT) return N1; // noop assertion. 2703 break; 2704 } 2705 case ISD::SIGN_EXTEND_INREG: { 2706 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2707 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2708 assert(VT.isInteger() && EVT.isInteger() && 2709 "Cannot *_EXTEND_INREG FP types"); 2710 assert(EVT.isVector() == VT.isVector() && 2711 "SIGN_EXTEND_INREG type should be vector iff the operand " 2712 "type is vector!"); 2713 assert((!EVT.isVector() || 2714 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2715 "Vector element counts must match in SIGN_EXTEND_INREG"); 2716 assert(EVT.bitsLE(VT) && "Not extending!"); 2717 if (EVT == VT) return N1; // Not actually extending 2718 2719 if (N1C) { 2720 APInt Val = N1C->getAPIntValue(); 2721 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2722 Val <<= Val.getBitWidth()-FromBits; 2723 Val = Val.ashr(Val.getBitWidth()-FromBits); 2724 return getConstant(Val, VT); 2725 } 2726 break; 2727 } 2728 case ISD::EXTRACT_VECTOR_ELT: 2729 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2730 if (N1.getOpcode() == ISD::UNDEF) 2731 return getUNDEF(VT); 2732 2733 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2734 // expanding copies of large vectors from registers. 2735 if (N2C && 2736 N1.getOpcode() == ISD::CONCAT_VECTORS && 2737 N1.getNumOperands() > 0) { 2738 unsigned Factor = 2739 N1.getOperand(0).getValueType().getVectorNumElements(); 2740 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2741 N1.getOperand(N2C->getZExtValue() / Factor), 2742 getConstant(N2C->getZExtValue() % Factor, 2743 N2.getValueType())); 2744 } 2745 2746 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2747 // expanding large vector constants. 2748 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2749 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2750 EVT VEltTy = N1.getValueType().getVectorElementType(); 2751 if (Elt.getValueType() != VEltTy) { 2752 // If the vector element type is not legal, the BUILD_VECTOR operands 2753 // are promoted and implicitly truncated. Make that explicit here. 2754 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2755 } 2756 if (VT != VEltTy) { 2757 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2758 // result is implicitly extended. 2759 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2760 } 2761 return Elt; 2762 } 2763 2764 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2765 // operations are lowered to scalars. 2766 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2767 // If the indices are the same, return the inserted element else 2768 // if the indices are known different, extract the element from 2769 // the original vector. 2770 if (N1.getOperand(2) == N2) { 2771 if (VT == N1.getOperand(1).getValueType()) 2772 return N1.getOperand(1); 2773 else 2774 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2775 } else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2776 isa<ConstantSDNode>(N2)) 2777 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2778 } 2779 break; 2780 case ISD::EXTRACT_ELEMENT: 2781 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2782 assert(!N1.getValueType().isVector() && !VT.isVector() && 2783 (N1.getValueType().isInteger() == VT.isInteger()) && 2784 "Wrong types for EXTRACT_ELEMENT!"); 2785 2786 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2787 // 64-bit integers into 32-bit parts. Instead of building the extract of 2788 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2789 if (N1.getOpcode() == ISD::BUILD_PAIR) 2790 return N1.getOperand(N2C->getZExtValue()); 2791 2792 // EXTRACT_ELEMENT of a constant int is also very common. 2793 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2794 unsigned ElementSize = VT.getSizeInBits(); 2795 unsigned Shift = ElementSize * N2C->getZExtValue(); 2796 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2797 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2798 } 2799 break; 2800 case ISD::EXTRACT_SUBVECTOR: 2801 if (N1.getValueType() == VT) // Trivial extraction. 2802 return N1; 2803 break; 2804 } 2805 2806 if (N1C) { 2807 if (N2C) { 2808 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2809 if (SV.getNode()) return SV; 2810 } else { // Cannonicalize constant to RHS if commutative 2811 if (isCommutativeBinOp(Opcode)) { 2812 std::swap(N1C, N2C); 2813 std::swap(N1, N2); 2814 } 2815 } 2816 } 2817 2818 // Constant fold FP operations. 2819 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2820 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2821 if (N1CFP) { 2822 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2823 // Cannonicalize constant to RHS if commutative 2824 std::swap(N1CFP, N2CFP); 2825 std::swap(N1, N2); 2826 } else if (N2CFP && VT != MVT::ppcf128) { 2827 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2828 APFloat::opStatus s; 2829 switch (Opcode) { 2830 case ISD::FADD: 2831 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2832 if (s != APFloat::opInvalidOp) 2833 return getConstantFP(V1, VT); 2834 break; 2835 case ISD::FSUB: 2836 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2837 if (s!=APFloat::opInvalidOp) 2838 return getConstantFP(V1, VT); 2839 break; 2840 case ISD::FMUL: 2841 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2842 if (s!=APFloat::opInvalidOp) 2843 return getConstantFP(V1, VT); 2844 break; 2845 case ISD::FDIV: 2846 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2847 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2848 return getConstantFP(V1, VT); 2849 break; 2850 case ISD::FREM : 2851 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2852 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2853 return getConstantFP(V1, VT); 2854 break; 2855 case ISD::FCOPYSIGN: 2856 V1.copySign(V2); 2857 return getConstantFP(V1, VT); 2858 default: break; 2859 } 2860 } 2861 } 2862 2863 // Canonicalize an UNDEF to the RHS, even over a constant. 2864 if (N1.getOpcode() == ISD::UNDEF) { 2865 if (isCommutativeBinOp(Opcode)) { 2866 std::swap(N1, N2); 2867 } else { 2868 switch (Opcode) { 2869 case ISD::FP_ROUND_INREG: 2870 case ISD::SIGN_EXTEND_INREG: 2871 case ISD::SUB: 2872 case ISD::FSUB: 2873 case ISD::FDIV: 2874 case ISD::FREM: 2875 case ISD::SRA: 2876 return N1; // fold op(undef, arg2) -> undef 2877 case ISD::UDIV: 2878 case ISD::SDIV: 2879 case ISD::UREM: 2880 case ISD::SREM: 2881 case ISD::SRL: 2882 case ISD::SHL: 2883 if (!VT.isVector()) 2884 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2885 // For vectors, we can't easily build an all zero vector, just return 2886 // the LHS. 2887 return N2; 2888 } 2889 } 2890 } 2891 2892 // Fold a bunch of operators when the RHS is undef. 2893 if (N2.getOpcode() == ISD::UNDEF) { 2894 switch (Opcode) { 2895 case ISD::XOR: 2896 if (N1.getOpcode() == ISD::UNDEF) 2897 // Handle undef ^ undef -> 0 special case. This is a common 2898 // idiom (misuse). 2899 return getConstant(0, VT); 2900 // fallthrough 2901 case ISD::ADD: 2902 case ISD::ADDC: 2903 case ISD::ADDE: 2904 case ISD::SUB: 2905 case ISD::UDIV: 2906 case ISD::SDIV: 2907 case ISD::UREM: 2908 case ISD::SREM: 2909 return N2; // fold op(arg1, undef) -> undef 2910 case ISD::FADD: 2911 case ISD::FSUB: 2912 case ISD::FMUL: 2913 case ISD::FDIV: 2914 case ISD::FREM: 2915 if (UnsafeFPMath) 2916 return N2; 2917 break; 2918 case ISD::MUL: 2919 case ISD::AND: 2920 case ISD::SRL: 2921 case ISD::SHL: 2922 if (!VT.isVector()) 2923 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2924 // For vectors, we can't easily build an all zero vector, just return 2925 // the LHS. 2926 return N1; 2927 case ISD::OR: 2928 if (!VT.isVector()) 2929 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2930 // For vectors, we can't easily build an all one vector, just return 2931 // the LHS. 2932 return N1; 2933 case ISD::SRA: 2934 return N1; 2935 } 2936 } 2937 2938 // Memoize this node if possible. 2939 SDNode *N; 2940 SDVTList VTs = getVTList(VT); 2941 if (VT != MVT::Flag) { 2942 SDValue Ops[] = { N1, N2 }; 2943 FoldingSetNodeID ID; 2944 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2945 void *IP = 0; 2946 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2947 return SDValue(E, 0); 2948 2949 N = NodeAllocator.Allocate<BinarySDNode>(); 2950 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2951 CSEMap.InsertNode(N, IP); 2952 } else { 2953 N = NodeAllocator.Allocate<BinarySDNode>(); 2954 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2955 } 2956 2957 AllNodes.push_back(N); 2958#ifndef NDEBUG 2959 VerifyNode(N); 2960#endif 2961 return SDValue(N, 0); 2962} 2963 2964SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2965 SDValue N1, SDValue N2, SDValue N3) { 2966 // Perform various simplifications. 2967 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2968 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2969 switch (Opcode) { 2970 case ISD::CONCAT_VECTORS: 2971 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2972 // one big BUILD_VECTOR. 2973 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2974 N2.getOpcode() == ISD::BUILD_VECTOR && 2975 N3.getOpcode() == ISD::BUILD_VECTOR) { 2976 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2977 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2978 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2979 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2980 } 2981 break; 2982 case ISD::SETCC: { 2983 // Use FoldSetCC to simplify SETCC's. 2984 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 2985 if (Simp.getNode()) return Simp; 2986 break; 2987 } 2988 case ISD::SELECT: 2989 if (N1C) { 2990 if (N1C->getZExtValue()) 2991 return N2; // select true, X, Y -> X 2992 else 2993 return N3; // select false, X, Y -> Y 2994 } 2995 2996 if (N2 == N3) return N2; // select C, X, X -> X 2997 break; 2998 case ISD::BRCOND: 2999 if (N2C) { 3000 if (N2C->getZExtValue()) // Unconditional branch 3001 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3002 else 3003 return N1; // Never-taken branch 3004 } 3005 break; 3006 case ISD::VECTOR_SHUFFLE: 3007 llvm_unreachable("should use getVectorShuffle constructor!"); 3008 break; 3009 case ISD::BIT_CONVERT: 3010 // Fold bit_convert nodes from a type to themselves. 3011 if (N1.getValueType() == VT) 3012 return N1; 3013 break; 3014 } 3015 3016 // Memoize node if it doesn't produce a flag. 3017 SDNode *N; 3018 SDVTList VTs = getVTList(VT); 3019 if (VT != MVT::Flag) { 3020 SDValue Ops[] = { N1, N2, N3 }; 3021 FoldingSetNodeID ID; 3022 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3023 void *IP = 0; 3024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3025 return SDValue(E, 0); 3026 3027 N = NodeAllocator.Allocate<TernarySDNode>(); 3028 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3029 CSEMap.InsertNode(N, IP); 3030 } else { 3031 N = NodeAllocator.Allocate<TernarySDNode>(); 3032 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3033 } 3034 3035 AllNodes.push_back(N); 3036#ifndef NDEBUG 3037 VerifyNode(N); 3038#endif 3039 return SDValue(N, 0); 3040} 3041 3042SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3043 SDValue N1, SDValue N2, SDValue N3, 3044 SDValue N4) { 3045 SDValue Ops[] = { N1, N2, N3, N4 }; 3046 return getNode(Opcode, DL, VT, Ops, 4); 3047} 3048 3049SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3050 SDValue N1, SDValue N2, SDValue N3, 3051 SDValue N4, SDValue N5) { 3052 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3053 return getNode(Opcode, DL, VT, Ops, 5); 3054} 3055 3056/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3057/// the incoming stack arguments to be loaded from the stack. 3058SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3059 SmallVector<SDValue, 8> ArgChains; 3060 3061 // Include the original chain at the beginning of the list. When this is 3062 // used by target LowerCall hooks, this helps legalize find the 3063 // CALLSEQ_BEGIN node. 3064 ArgChains.push_back(Chain); 3065 3066 // Add a chain value for each stack argument. 3067 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3068 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3069 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3070 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3071 if (FI->getIndex() < 0) 3072 ArgChains.push_back(SDValue(L, 1)); 3073 3074 // Build a tokenfactor for all the chains. 3075 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3076 &ArgChains[0], ArgChains.size()); 3077} 3078 3079/// getMemsetValue - Vectorized representation of the memset value 3080/// operand. 3081static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3082 DebugLoc dl) { 3083 unsigned NumBits = VT.isVector() ? 3084 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 3085 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3086 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3087 unsigned Shift = 8; 3088 for (unsigned i = NumBits; i > 8; i >>= 1) { 3089 Val = (Val << Shift) | Val; 3090 Shift <<= 1; 3091 } 3092 if (VT.isInteger()) 3093 return DAG.getConstant(Val, VT); 3094 return DAG.getConstantFP(APFloat(Val), VT); 3095 } 3096 3097 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3098 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3099 unsigned Shift = 8; 3100 for (unsigned i = NumBits; i > 8; i >>= 1) { 3101 Value = DAG.getNode(ISD::OR, dl, VT, 3102 DAG.getNode(ISD::SHL, dl, VT, Value, 3103 DAG.getConstant(Shift, 3104 TLI.getShiftAmountTy())), 3105 Value); 3106 Shift <<= 1; 3107 } 3108 3109 return Value; 3110} 3111 3112/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3113/// used when a memcpy is turned into a memset when the source is a constant 3114/// string ptr. 3115static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3116 const TargetLowering &TLI, 3117 std::string &Str, unsigned Offset) { 3118 // Handle vector with all elements zero. 3119 if (Str.empty()) { 3120 if (VT.isInteger()) 3121 return DAG.getConstant(0, VT); 3122 unsigned NumElts = VT.getVectorNumElements(); 3123 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3124 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3125 DAG.getConstant(0, 3126 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts))); 3127 } 3128 3129 assert(!VT.isVector() && "Can't handle vector type here!"); 3130 unsigned NumBits = VT.getSizeInBits(); 3131 unsigned MSB = NumBits / 8; 3132 uint64_t Val = 0; 3133 if (TLI.isLittleEndian()) 3134 Offset = Offset + MSB - 1; 3135 for (unsigned i = 0; i != MSB; ++i) { 3136 Val = (Val << 8) | (unsigned char)Str[Offset]; 3137 Offset += TLI.isLittleEndian() ? -1 : 1; 3138 } 3139 return DAG.getConstant(Val, VT); 3140} 3141 3142/// getMemBasePlusOffset - Returns base and offset node for the 3143/// 3144static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3145 SelectionDAG &DAG) { 3146 EVT VT = Base.getValueType(); 3147 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3148 VT, Base, DAG.getConstant(Offset, VT)); 3149} 3150 3151/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3152/// 3153static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3154 unsigned SrcDelta = 0; 3155 GlobalAddressSDNode *G = NULL; 3156 if (Src.getOpcode() == ISD::GlobalAddress) 3157 G = cast<GlobalAddressSDNode>(Src); 3158 else if (Src.getOpcode() == ISD::ADD && 3159 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3160 Src.getOperand(1).getOpcode() == ISD::Constant) { 3161 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3162 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3163 } 3164 if (!G) 3165 return false; 3166 3167 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3168 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3169 return true; 3170 3171 return false; 3172} 3173 3174/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3175/// to replace the memset / memcpy is below the threshold. It also returns the 3176/// types of the sequence of memory ops to perform memset / memcpy. 3177static 3178bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps, 3179 SDValue Dst, SDValue Src, 3180 unsigned Limit, uint64_t Size, unsigned &Align, 3181 std::string &Str, bool &isSrcStr, 3182 SelectionDAG &DAG, 3183 const TargetLowering &TLI) { 3184 isSrcStr = isMemSrcFromString(Src, Str); 3185 bool isSrcConst = isa<ConstantSDNode>(Src); 3186 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); 3187 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT); 3188 if (VT != MVT::iAny) { 3189 const Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3190 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3191 // If source is a string constant, this will require an unaligned load. 3192 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3193 if (Dst.getOpcode() != ISD::FrameIndex) { 3194 // Can't change destination alignment. It requires a unaligned store. 3195 if (AllowUnalign) 3196 VT = MVT::iAny; 3197 } else { 3198 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3199 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3200 if (MFI->isFixedObjectIndex(FI)) { 3201 // Can't change destination alignment. It requires a unaligned store. 3202 if (AllowUnalign) 3203 VT = MVT::iAny; 3204 } else { 3205 // Give the stack frame object a larger alignment if needed. 3206 if (MFI->getObjectAlignment(FI) < NewAlign) 3207 MFI->setObjectAlignment(FI, NewAlign); 3208 Align = NewAlign; 3209 } 3210 } 3211 } 3212 } 3213 3214 if (VT == MVT::iAny) { 3215 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) { 3216 VT = MVT::i64; 3217 } else { 3218 switch (Align & 7) { 3219 case 0: VT = MVT::i64; break; 3220 case 4: VT = MVT::i32; break; 3221 case 2: VT = MVT::i16; break; 3222 default: VT = MVT::i8; break; 3223 } 3224 } 3225 3226 MVT LVT = MVT::i64; 3227 while (!TLI.isTypeLegal(LVT)) 3228 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3229 assert(LVT.isInteger()); 3230 3231 if (VT.bitsGT(LVT)) 3232 VT = LVT; 3233 } 3234 3235 unsigned NumMemOps = 0; 3236 while (Size != 0) { 3237 unsigned VTSize = VT.getSizeInBits() / 8; 3238 while (VTSize > Size) { 3239 // For now, only use non-vector load / store's for the left-over pieces. 3240 if (VT.isVector()) { 3241 VT = MVT::i64; 3242 while (!TLI.isTypeLegal(VT)) 3243 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3244 VTSize = VT.getSizeInBits() / 8; 3245 } else { 3246 // This can result in a type that is not legal on the target, e.g. 3247 // 1 or 2 bytes on PPC. 3248 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3249 VTSize >>= 1; 3250 } 3251 } 3252 3253 if (++NumMemOps > Limit) 3254 return false; 3255 MemOps.push_back(VT); 3256 Size -= VTSize; 3257 } 3258 3259 return true; 3260} 3261 3262static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3263 SDValue Chain, SDValue Dst, 3264 SDValue Src, uint64_t Size, 3265 unsigned Align, bool AlwaysInline, 3266 const Value *DstSV, uint64_t DstSVOff, 3267 const Value *SrcSV, uint64_t SrcSVOff){ 3268 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3269 3270 // Expand memcpy to a series of load and store ops if the size operand falls 3271 // below a certain threshold. 3272 std::vector<EVT> MemOps; 3273 uint64_t Limit = -1ULL; 3274 if (!AlwaysInline) 3275 Limit = TLI.getMaxStoresPerMemcpy(); 3276 unsigned DstAlign = Align; // Destination alignment can change. 3277 std::string Str; 3278 bool CopyFromStr; 3279 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3280 Str, CopyFromStr, DAG, TLI)) 3281 return SDValue(); 3282 3283 3284 bool isZeroStr = CopyFromStr && Str.empty(); 3285 SmallVector<SDValue, 8> OutChains; 3286 unsigned NumMemOps = MemOps.size(); 3287 uint64_t SrcOff = 0, DstOff = 0; 3288 for (unsigned i = 0; i != NumMemOps; ++i) { 3289 EVT VT = MemOps[i]; 3290 unsigned VTSize = VT.getSizeInBits() / 8; 3291 SDValue Value, Store; 3292 3293 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3294 // It's unlikely a store of a vector immediate can be done in a single 3295 // instruction. It would require a load from a constantpool first. 3296 // We also handle store a vector with all zero's. 3297 // FIXME: Handle other cases where store of vector immediate is done in 3298 // a single instruction. 3299 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3300 Store = DAG.getStore(Chain, dl, Value, 3301 getMemBasePlusOffset(Dst, DstOff, DAG), 3302 DstSV, DstSVOff + DstOff, false, false, DstAlign); 3303 } else { 3304 // The type might not be legal for the target. This should only happen 3305 // if the type is smaller than a legal type, as on PPC, so the right 3306 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3307 // to Load/Store if NVT==VT. 3308 // FIXME does the case above also need this? 3309 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3310 assert(NVT.bitsGE(VT)); 3311 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3312 getMemBasePlusOffset(Src, SrcOff, DAG), 3313 SrcSV, SrcSVOff + SrcOff, VT, false, false, Align); 3314 Store = DAG.getTruncStore(Chain, dl, Value, 3315 getMemBasePlusOffset(Dst, DstOff, DAG), 3316 DstSV, DstSVOff + DstOff, VT, false, false, 3317 DstAlign); 3318 } 3319 OutChains.push_back(Store); 3320 SrcOff += VTSize; 3321 DstOff += VTSize; 3322 } 3323 3324 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3325 &OutChains[0], OutChains.size()); 3326} 3327 3328static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3329 SDValue Chain, SDValue Dst, 3330 SDValue Src, uint64_t Size, 3331 unsigned Align, bool AlwaysInline, 3332 const Value *DstSV, uint64_t DstSVOff, 3333 const Value *SrcSV, uint64_t SrcSVOff){ 3334 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3335 3336 // Expand memmove to a series of load and store ops if the size operand falls 3337 // below a certain threshold. 3338 std::vector<EVT> MemOps; 3339 uint64_t Limit = -1ULL; 3340 if (!AlwaysInline) 3341 Limit = TLI.getMaxStoresPerMemmove(); 3342 unsigned DstAlign = Align; // Destination alignment can change. 3343 std::string Str; 3344 bool CopyFromStr; 3345 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3346 Str, CopyFromStr, DAG, TLI)) 3347 return SDValue(); 3348 3349 uint64_t SrcOff = 0, DstOff = 0; 3350 3351 SmallVector<SDValue, 8> LoadValues; 3352 SmallVector<SDValue, 8> LoadChains; 3353 SmallVector<SDValue, 8> OutChains; 3354 unsigned NumMemOps = MemOps.size(); 3355 for (unsigned i = 0; i < NumMemOps; i++) { 3356 EVT VT = MemOps[i]; 3357 unsigned VTSize = VT.getSizeInBits() / 8; 3358 SDValue Value, Store; 3359 3360 Value = DAG.getLoad(VT, dl, Chain, 3361 getMemBasePlusOffset(Src, SrcOff, DAG), 3362 SrcSV, SrcSVOff + SrcOff, false, false, Align); 3363 LoadValues.push_back(Value); 3364 LoadChains.push_back(Value.getValue(1)); 3365 SrcOff += VTSize; 3366 } 3367 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3368 &LoadChains[0], LoadChains.size()); 3369 OutChains.clear(); 3370 for (unsigned i = 0; i < NumMemOps; i++) { 3371 EVT VT = MemOps[i]; 3372 unsigned VTSize = VT.getSizeInBits() / 8; 3373 SDValue Value, Store; 3374 3375 Store = DAG.getStore(Chain, dl, LoadValues[i], 3376 getMemBasePlusOffset(Dst, DstOff, DAG), 3377 DstSV, DstSVOff + DstOff, false, false, DstAlign); 3378 OutChains.push_back(Store); 3379 DstOff += VTSize; 3380 } 3381 3382 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3383 &OutChains[0], OutChains.size()); 3384} 3385 3386static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3387 SDValue Chain, SDValue Dst, 3388 SDValue Src, uint64_t Size, 3389 unsigned Align, 3390 const Value *DstSV, uint64_t DstSVOff) { 3391 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3392 3393 // Expand memset to a series of load/store ops if the size operand 3394 // falls below a certain threshold. 3395 std::vector<EVT> MemOps; 3396 std::string Str; 3397 bool CopyFromStr; 3398 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3399 Size, Align, Str, CopyFromStr, DAG, TLI)) 3400 return SDValue(); 3401 3402 SmallVector<SDValue, 8> OutChains; 3403 uint64_t DstOff = 0; 3404 3405 unsigned NumMemOps = MemOps.size(); 3406 for (unsigned i = 0; i < NumMemOps; i++) { 3407 EVT VT = MemOps[i]; 3408 unsigned VTSize = VT.getSizeInBits() / 8; 3409 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3410 SDValue Store = DAG.getStore(Chain, dl, Value, 3411 getMemBasePlusOffset(Dst, DstOff, DAG), 3412 DstSV, DstSVOff + DstOff, false, false, 0); 3413 OutChains.push_back(Store); 3414 DstOff += VTSize; 3415 } 3416 3417 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3418 &OutChains[0], OutChains.size()); 3419} 3420 3421SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3422 SDValue Src, SDValue Size, 3423 unsigned Align, bool AlwaysInline, 3424 const Value *DstSV, uint64_t DstSVOff, 3425 const Value *SrcSV, uint64_t SrcSVOff) { 3426 3427 // Check to see if we should lower the memcpy to loads and stores first. 3428 // For cases within the target-specified limits, this is the best choice. 3429 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3430 if (ConstantSize) { 3431 // Memcpy with size zero? Just return the original chain. 3432 if (ConstantSize->isNullValue()) 3433 return Chain; 3434 3435 SDValue Result = 3436 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3437 ConstantSize->getZExtValue(), 3438 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3439 if (Result.getNode()) 3440 return Result; 3441 } 3442 3443 // Then check to see if we should lower the memcpy with target-specific 3444 // code. If the target chooses to do this, this is the next best. 3445 SDValue Result = 3446 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3447 AlwaysInline, 3448 DstSV, DstSVOff, SrcSV, SrcSVOff); 3449 if (Result.getNode()) 3450 return Result; 3451 3452 // If we really need inline code and the target declined to provide it, 3453 // use a (potentially long) sequence of loads and stores. 3454 if (AlwaysInline) { 3455 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3456 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3457 ConstantSize->getZExtValue(), Align, true, 3458 DstSV, DstSVOff, SrcSV, SrcSVOff); 3459 } 3460 3461 // Emit a library call. 3462 TargetLowering::ArgListTy Args; 3463 TargetLowering::ArgListEntry Entry; 3464 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3465 Entry.Node = Dst; Args.push_back(Entry); 3466 Entry.Node = Src; Args.push_back(Entry); 3467 Entry.Node = Size; Args.push_back(Entry); 3468 // FIXME: pass in DebugLoc 3469 std::pair<SDValue,SDValue> CallResult = 3470 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3471 false, false, false, false, 0, 3472 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3473 /*isReturnValueUsed=*/false, 3474 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3475 TLI.getPointerTy()), 3476 Args, *this, dl, GetOrdering(Chain.getNode())); 3477 return CallResult.second; 3478} 3479 3480SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3481 SDValue Src, SDValue Size, 3482 unsigned Align, 3483 const Value *DstSV, uint64_t DstSVOff, 3484 const Value *SrcSV, uint64_t SrcSVOff) { 3485 3486 // Check to see if we should lower the memmove to loads and stores first. 3487 // For cases within the target-specified limits, this is the best choice. 3488 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3489 if (ConstantSize) { 3490 // Memmove with size zero? Just return the original chain. 3491 if (ConstantSize->isNullValue()) 3492 return Chain; 3493 3494 SDValue Result = 3495 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3496 ConstantSize->getZExtValue(), 3497 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3498 if (Result.getNode()) 3499 return Result; 3500 } 3501 3502 // Then check to see if we should lower the memmove with target-specific 3503 // code. If the target chooses to do this, this is the next best. 3504 SDValue Result = 3505 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, 3506 DstSV, DstSVOff, SrcSV, SrcSVOff); 3507 if (Result.getNode()) 3508 return Result; 3509 3510 // Emit a library call. 3511 TargetLowering::ArgListTy Args; 3512 TargetLowering::ArgListEntry Entry; 3513 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3514 Entry.Node = Dst; Args.push_back(Entry); 3515 Entry.Node = Src; Args.push_back(Entry); 3516 Entry.Node = Size; Args.push_back(Entry); 3517 // FIXME: pass in DebugLoc 3518 std::pair<SDValue,SDValue> CallResult = 3519 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3520 false, false, false, false, 0, 3521 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3522 /*isReturnValueUsed=*/false, 3523 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3524 TLI.getPointerTy()), 3525 Args, *this, dl, GetOrdering(Chain.getNode())); 3526 return CallResult.second; 3527} 3528 3529SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3530 SDValue Src, SDValue Size, 3531 unsigned Align, 3532 const Value *DstSV, uint64_t DstSVOff) { 3533 3534 // Check to see if we should lower the memset to stores first. 3535 // For cases within the target-specified limits, this is the best choice. 3536 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3537 if (ConstantSize) { 3538 // Memset with size zero? Just return the original chain. 3539 if (ConstantSize->isNullValue()) 3540 return Chain; 3541 3542 SDValue Result = 3543 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3544 Align, DstSV, DstSVOff); 3545 if (Result.getNode()) 3546 return Result; 3547 } 3548 3549 // Then check to see if we should lower the memset with target-specific 3550 // code. If the target chooses to do this, this is the next best. 3551 SDValue Result = 3552 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, 3553 DstSV, DstSVOff); 3554 if (Result.getNode()) 3555 return Result; 3556 3557 // Emit a library call. 3558 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3559 TargetLowering::ArgListTy Args; 3560 TargetLowering::ArgListEntry Entry; 3561 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3562 Args.push_back(Entry); 3563 // Extend or truncate the argument to be an i32 value for the call. 3564 if (Src.getValueType().bitsGT(MVT::i32)) 3565 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3566 else 3567 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3568 Entry.Node = Src; 3569 Entry.Ty = Type::getInt32Ty(*getContext()); 3570 Entry.isSExt = true; 3571 Args.push_back(Entry); 3572 Entry.Node = Size; 3573 Entry.Ty = IntPtrTy; 3574 Entry.isSExt = false; 3575 Args.push_back(Entry); 3576 // FIXME: pass in DebugLoc 3577 std::pair<SDValue,SDValue> CallResult = 3578 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3579 false, false, false, false, 0, 3580 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3581 /*isReturnValueUsed=*/false, 3582 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3583 TLI.getPointerTy()), 3584 Args, *this, dl, GetOrdering(Chain.getNode())); 3585 return CallResult.second; 3586} 3587 3588SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3589 SDValue Chain, 3590 SDValue Ptr, SDValue Cmp, 3591 SDValue Swp, const Value* PtrVal, 3592 unsigned Alignment) { 3593 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3594 Alignment = getEVTAlignment(MemVT); 3595 3596 // Check if the memory reference references a frame index 3597 if (!PtrVal) 3598 if (const FrameIndexSDNode *FI = 3599 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3600 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3601 3602 MachineFunction &MF = getMachineFunction(); 3603 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3604 3605 // For now, atomics are considered to be volatile always. 3606 Flags |= MachineMemOperand::MOVolatile; 3607 3608 MachineMemOperand *MMO = 3609 MF.getMachineMemOperand(PtrVal, Flags, 0, 3610 MemVT.getStoreSize(), Alignment); 3611 3612 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3613} 3614 3615SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3616 SDValue Chain, 3617 SDValue Ptr, SDValue Cmp, 3618 SDValue Swp, MachineMemOperand *MMO) { 3619 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3620 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3621 3622 EVT VT = Cmp.getValueType(); 3623 3624 SDVTList VTs = getVTList(VT, MVT::Other); 3625 FoldingSetNodeID ID; 3626 ID.AddInteger(MemVT.getRawBits()); 3627 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3628 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3629 void* IP = 0; 3630 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3631 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3632 return SDValue(E, 0); 3633 } 3634 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3635 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3636 CSEMap.InsertNode(N, IP); 3637 AllNodes.push_back(N); 3638 return SDValue(N, 0); 3639} 3640 3641SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3642 SDValue Chain, 3643 SDValue Ptr, SDValue Val, 3644 const Value* PtrVal, 3645 unsigned Alignment) { 3646 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3647 Alignment = getEVTAlignment(MemVT); 3648 3649 // Check if the memory reference references a frame index 3650 if (!PtrVal) 3651 if (const FrameIndexSDNode *FI = 3652 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3653 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3654 3655 MachineFunction &MF = getMachineFunction(); 3656 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3657 3658 // For now, atomics are considered to be volatile always. 3659 Flags |= MachineMemOperand::MOVolatile; 3660 3661 MachineMemOperand *MMO = 3662 MF.getMachineMemOperand(PtrVal, Flags, 0, 3663 MemVT.getStoreSize(), Alignment); 3664 3665 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3666} 3667 3668SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3669 SDValue Chain, 3670 SDValue Ptr, SDValue Val, 3671 MachineMemOperand *MMO) { 3672 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3673 Opcode == ISD::ATOMIC_LOAD_SUB || 3674 Opcode == ISD::ATOMIC_LOAD_AND || 3675 Opcode == ISD::ATOMIC_LOAD_OR || 3676 Opcode == ISD::ATOMIC_LOAD_XOR || 3677 Opcode == ISD::ATOMIC_LOAD_NAND || 3678 Opcode == ISD::ATOMIC_LOAD_MIN || 3679 Opcode == ISD::ATOMIC_LOAD_MAX || 3680 Opcode == ISD::ATOMIC_LOAD_UMIN || 3681 Opcode == ISD::ATOMIC_LOAD_UMAX || 3682 Opcode == ISD::ATOMIC_SWAP) && 3683 "Invalid Atomic Op"); 3684 3685 EVT VT = Val.getValueType(); 3686 3687 SDVTList VTs = getVTList(VT, MVT::Other); 3688 FoldingSetNodeID ID; 3689 ID.AddInteger(MemVT.getRawBits()); 3690 SDValue Ops[] = {Chain, Ptr, Val}; 3691 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3692 void* IP = 0; 3693 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3694 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3695 return SDValue(E, 0); 3696 } 3697 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3698 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO); 3699 CSEMap.InsertNode(N, IP); 3700 AllNodes.push_back(N); 3701 return SDValue(N, 0); 3702} 3703 3704/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3705/// Allowed to return something different (and simpler) if Simplify is true. 3706SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3707 DebugLoc dl) { 3708 if (NumOps == 1) 3709 return Ops[0]; 3710 3711 SmallVector<EVT, 4> VTs; 3712 VTs.reserve(NumOps); 3713 for (unsigned i = 0; i < NumOps; ++i) 3714 VTs.push_back(Ops[i].getValueType()); 3715 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3716 Ops, NumOps); 3717} 3718 3719SDValue 3720SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3721 const EVT *VTs, unsigned NumVTs, 3722 const SDValue *Ops, unsigned NumOps, 3723 EVT MemVT, const Value *srcValue, int SVOff, 3724 unsigned Align, bool Vol, 3725 bool ReadMem, bool WriteMem) { 3726 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3727 MemVT, srcValue, SVOff, Align, Vol, 3728 ReadMem, WriteMem); 3729} 3730 3731SDValue 3732SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3733 const SDValue *Ops, unsigned NumOps, 3734 EVT MemVT, const Value *srcValue, int SVOff, 3735 unsigned Align, bool Vol, 3736 bool ReadMem, bool WriteMem) { 3737 if (Align == 0) // Ensure that codegen never sees alignment 0 3738 Align = getEVTAlignment(MemVT); 3739 3740 MachineFunction &MF = getMachineFunction(); 3741 unsigned Flags = 0; 3742 if (WriteMem) 3743 Flags |= MachineMemOperand::MOStore; 3744 if (ReadMem) 3745 Flags |= MachineMemOperand::MOLoad; 3746 if (Vol) 3747 Flags |= MachineMemOperand::MOVolatile; 3748 MachineMemOperand *MMO = 3749 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3750 MemVT.getStoreSize(), Align); 3751 3752 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3753} 3754 3755SDValue 3756SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3757 const SDValue *Ops, unsigned NumOps, 3758 EVT MemVT, MachineMemOperand *MMO) { 3759 assert((Opcode == ISD::INTRINSIC_VOID || 3760 Opcode == ISD::INTRINSIC_W_CHAIN || 3761 (Opcode <= INT_MAX && 3762 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3763 "Opcode is not a memory-accessing opcode!"); 3764 3765 // Memoize the node unless it returns a flag. 3766 MemIntrinsicSDNode *N; 3767 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3768 FoldingSetNodeID ID; 3769 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3770 void *IP = 0; 3771 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3772 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3773 return SDValue(E, 0); 3774 } 3775 3776 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3777 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3778 CSEMap.InsertNode(N, IP); 3779 } else { 3780 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3781 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3782 } 3783 AllNodes.push_back(N); 3784 return SDValue(N, 0); 3785} 3786 3787SDValue 3788SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3789 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3790 SDValue Ptr, SDValue Offset, 3791 const Value *SV, int SVOffset, EVT MemVT, 3792 bool isVolatile, bool isNonTemporal, 3793 unsigned Alignment) { 3794 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3795 Alignment = getEVTAlignment(VT); 3796 3797 // Check if the memory reference references a frame index 3798 if (!SV) 3799 if (const FrameIndexSDNode *FI = 3800 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3801 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3802 3803 MachineFunction &MF = getMachineFunction(); 3804 unsigned Flags = MachineMemOperand::MOLoad; 3805 if (isVolatile) 3806 Flags |= MachineMemOperand::MOVolatile; 3807 if (isNonTemporal) 3808 Flags |= MachineMemOperand::MONonTemporal; 3809 MachineMemOperand *MMO = 3810 MF.getMachineMemOperand(SV, Flags, SVOffset, 3811 MemVT.getStoreSize(), Alignment); 3812 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3813} 3814 3815SDValue 3816SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3817 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3818 SDValue Ptr, SDValue Offset, EVT MemVT, 3819 MachineMemOperand *MMO) { 3820 if (VT == MemVT) { 3821 ExtType = ISD::NON_EXTLOAD; 3822 } else if (ExtType == ISD::NON_EXTLOAD) { 3823 assert(VT == MemVT && "Non-extending load from different memory type!"); 3824 } else { 3825 // Extending load. 3826 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3827 "Should only be an extending load, not truncating!"); 3828 assert(VT.isInteger() == MemVT.isInteger() && 3829 "Cannot convert from FP to Int or Int -> FP!"); 3830 assert(VT.isVector() == MemVT.isVector() && 3831 "Cannot use trunc store to convert to or from a vector!"); 3832 assert((!VT.isVector() || 3833 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3834 "Cannot use trunc store to change the number of vector elements!"); 3835 } 3836 3837 bool Indexed = AM != ISD::UNINDEXED; 3838 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3839 "Unindexed load with an offset!"); 3840 3841 SDVTList VTs = Indexed ? 3842 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3843 SDValue Ops[] = { Chain, Ptr, Offset }; 3844 FoldingSetNodeID ID; 3845 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3846 ID.AddInteger(MemVT.getRawBits()); 3847 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile())); 3848 void *IP = 0; 3849 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3850 cast<LoadSDNode>(E)->refineAlignment(MMO); 3851 return SDValue(E, 0); 3852 } 3853 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3854 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO); 3855 CSEMap.InsertNode(N, IP); 3856 AllNodes.push_back(N); 3857 return SDValue(N, 0); 3858} 3859 3860SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3861 SDValue Chain, SDValue Ptr, 3862 const Value *SV, int SVOffset, 3863 bool isVolatile, bool isNonTemporal, 3864 unsigned Alignment) { 3865 SDValue Undef = getUNDEF(Ptr.getValueType()); 3866 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3867 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3868} 3869 3870SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3871 SDValue Chain, SDValue Ptr, 3872 const Value *SV, 3873 int SVOffset, EVT MemVT, 3874 bool isVolatile, bool isNonTemporal, 3875 unsigned Alignment) { 3876 SDValue Undef = getUNDEF(Ptr.getValueType()); 3877 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3878 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3879} 3880 3881SDValue 3882SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3883 SDValue Offset, ISD::MemIndexedMode AM) { 3884 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3885 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3886 "Load is already a indexed load!"); 3887 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3888 LD->getChain(), Base, Offset, LD->getSrcValue(), 3889 LD->getSrcValueOffset(), LD->getMemoryVT(), 3890 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3891} 3892 3893SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3894 SDValue Ptr, const Value *SV, int SVOffset, 3895 bool isVolatile, bool isNonTemporal, 3896 unsigned Alignment) { 3897 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3898 Alignment = getEVTAlignment(Val.getValueType()); 3899 3900 // Check if the memory reference references a frame index 3901 if (!SV) 3902 if (const FrameIndexSDNode *FI = 3903 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3904 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3905 3906 MachineFunction &MF = getMachineFunction(); 3907 unsigned Flags = MachineMemOperand::MOStore; 3908 if (isVolatile) 3909 Flags |= MachineMemOperand::MOVolatile; 3910 if (isNonTemporal) 3911 Flags |= MachineMemOperand::MONonTemporal; 3912 MachineMemOperand *MMO = 3913 MF.getMachineMemOperand(SV, Flags, SVOffset, 3914 Val.getValueType().getStoreSize(), Alignment); 3915 3916 return getStore(Chain, dl, Val, Ptr, MMO); 3917} 3918 3919SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3920 SDValue Ptr, MachineMemOperand *MMO) { 3921 EVT VT = Val.getValueType(); 3922 SDVTList VTs = getVTList(MVT::Other); 3923 SDValue Undef = getUNDEF(Ptr.getValueType()); 3924 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3925 FoldingSetNodeID ID; 3926 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3927 ID.AddInteger(VT.getRawBits()); 3928 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile())); 3929 void *IP = 0; 3930 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3931 cast<StoreSDNode>(E)->refineAlignment(MMO); 3932 return SDValue(E, 0); 3933 } 3934 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3935 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO); 3936 CSEMap.InsertNode(N, IP); 3937 AllNodes.push_back(N); 3938 return SDValue(N, 0); 3939} 3940 3941SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3942 SDValue Ptr, const Value *SV, 3943 int SVOffset, EVT SVT, 3944 bool isVolatile, bool isNonTemporal, 3945 unsigned Alignment) { 3946 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3947 Alignment = getEVTAlignment(SVT); 3948 3949 // Check if the memory reference references a frame index 3950 if (!SV) 3951 if (const FrameIndexSDNode *FI = 3952 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3953 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3954 3955 MachineFunction &MF = getMachineFunction(); 3956 unsigned Flags = MachineMemOperand::MOStore; 3957 if (isVolatile) 3958 Flags |= MachineMemOperand::MOVolatile; 3959 if (isNonTemporal) 3960 Flags |= MachineMemOperand::MONonTemporal; 3961 MachineMemOperand *MMO = 3962 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 3963 3964 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 3965} 3966 3967SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3968 SDValue Ptr, EVT SVT, 3969 MachineMemOperand *MMO) { 3970 EVT VT = Val.getValueType(); 3971 3972 if (VT == SVT) 3973 return getStore(Chain, dl, Val, Ptr, MMO); 3974 3975 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 3976 "Should only be a truncating store, not extending!"); 3977 assert(VT.isInteger() == SVT.isInteger() && 3978 "Can't do FP-INT conversion!"); 3979 assert(VT.isVector() == SVT.isVector() && 3980 "Cannot use trunc store to convert to or from a vector!"); 3981 assert((!VT.isVector() || 3982 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 3983 "Cannot use trunc store to change the number of vector elements!"); 3984 3985 SDVTList VTs = getVTList(MVT::Other); 3986 SDValue Undef = getUNDEF(Ptr.getValueType()); 3987 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3988 FoldingSetNodeID ID; 3989 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3990 ID.AddInteger(SVT.getRawBits()); 3991 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile())); 3992 void *IP = 0; 3993 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3994 cast<StoreSDNode>(E)->refineAlignment(MMO); 3995 return SDValue(E, 0); 3996 } 3997 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3998 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO); 3999 CSEMap.InsertNode(N, IP); 4000 AllNodes.push_back(N); 4001 return SDValue(N, 0); 4002} 4003 4004SDValue 4005SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4006 SDValue Offset, ISD::MemIndexedMode AM) { 4007 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4008 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4009 "Store is already a indexed store!"); 4010 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4011 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4012 FoldingSetNodeID ID; 4013 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4014 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4015 ID.AddInteger(ST->getRawSubclassData()); 4016 void *IP = 0; 4017 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4018 return SDValue(E, 0); 4019 4020 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 4021 new (N) StoreSDNode(Ops, dl, VTs, AM, 4022 ST->isTruncatingStore(), ST->getMemoryVT(), 4023 ST->getMemOperand()); 4024 CSEMap.InsertNode(N, IP); 4025 AllNodes.push_back(N); 4026 return SDValue(N, 0); 4027} 4028 4029SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4030 SDValue Chain, SDValue Ptr, 4031 SDValue SV) { 4032 SDValue Ops[] = { Chain, Ptr, SV }; 4033 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4034} 4035 4036SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4037 const SDUse *Ops, unsigned NumOps) { 4038 switch (NumOps) { 4039 case 0: return getNode(Opcode, DL, VT); 4040 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4041 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4042 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4043 default: break; 4044 } 4045 4046 // Copy from an SDUse array into an SDValue array for use with 4047 // the regular getNode logic. 4048 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4049 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4050} 4051 4052SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4053 const SDValue *Ops, unsigned NumOps) { 4054 switch (NumOps) { 4055 case 0: return getNode(Opcode, DL, VT); 4056 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4057 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4058 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4059 default: break; 4060 } 4061 4062 switch (Opcode) { 4063 default: break; 4064 case ISD::SELECT_CC: { 4065 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4066 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4067 "LHS and RHS of condition must have same type!"); 4068 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4069 "True and False arms of SelectCC must have same type!"); 4070 assert(Ops[2].getValueType() == VT && 4071 "select_cc node must be of same type as true and false value!"); 4072 break; 4073 } 4074 case ISD::BR_CC: { 4075 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4076 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4077 "LHS/RHS of comparison should match types!"); 4078 break; 4079 } 4080 } 4081 4082 // Memoize nodes. 4083 SDNode *N; 4084 SDVTList VTs = getVTList(VT); 4085 4086 if (VT != MVT::Flag) { 4087 FoldingSetNodeID ID; 4088 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4089 void *IP = 0; 4090 4091 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4092 return SDValue(E, 0); 4093 4094 N = NodeAllocator.Allocate<SDNode>(); 4095 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4096 CSEMap.InsertNode(N, IP); 4097 } else { 4098 N = NodeAllocator.Allocate<SDNode>(); 4099 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4100 } 4101 4102 AllNodes.push_back(N); 4103#ifndef NDEBUG 4104 VerifyNode(N); 4105#endif 4106 return SDValue(N, 0); 4107} 4108 4109SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4110 const std::vector<EVT> &ResultTys, 4111 const SDValue *Ops, unsigned NumOps) { 4112 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4113 Ops, NumOps); 4114} 4115 4116SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4117 const EVT *VTs, unsigned NumVTs, 4118 const SDValue *Ops, unsigned NumOps) { 4119 if (NumVTs == 1) 4120 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4121 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4122} 4123 4124SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4125 const SDValue *Ops, unsigned NumOps) { 4126 if (VTList.NumVTs == 1) 4127 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4128 4129#if 0 4130 switch (Opcode) { 4131 // FIXME: figure out how to safely handle things like 4132 // int foo(int x) { return 1 << (x & 255); } 4133 // int bar() { return foo(256); } 4134 case ISD::SRA_PARTS: 4135 case ISD::SRL_PARTS: 4136 case ISD::SHL_PARTS: 4137 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4138 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4139 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4140 else if (N3.getOpcode() == ISD::AND) 4141 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4142 // If the and is only masking out bits that cannot effect the shift, 4143 // eliminate the and. 4144 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4145 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4146 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4147 } 4148 break; 4149 } 4150#endif 4151 4152 // Memoize the node unless it returns a flag. 4153 SDNode *N; 4154 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4155 FoldingSetNodeID ID; 4156 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4157 void *IP = 0; 4158 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4159 return SDValue(E, 0); 4160 4161 if (NumOps == 1) { 4162 N = NodeAllocator.Allocate<UnarySDNode>(); 4163 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4164 } else if (NumOps == 2) { 4165 N = NodeAllocator.Allocate<BinarySDNode>(); 4166 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4167 } else if (NumOps == 3) { 4168 N = NodeAllocator.Allocate<TernarySDNode>(); 4169 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4170 } else { 4171 N = NodeAllocator.Allocate<SDNode>(); 4172 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4173 } 4174 CSEMap.InsertNode(N, IP); 4175 } else { 4176 if (NumOps == 1) { 4177 N = NodeAllocator.Allocate<UnarySDNode>(); 4178 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4179 } else if (NumOps == 2) { 4180 N = NodeAllocator.Allocate<BinarySDNode>(); 4181 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4182 } else if (NumOps == 3) { 4183 N = NodeAllocator.Allocate<TernarySDNode>(); 4184 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4185 } else { 4186 N = NodeAllocator.Allocate<SDNode>(); 4187 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4188 } 4189 } 4190 AllNodes.push_back(N); 4191#ifndef NDEBUG 4192 VerifyNode(N); 4193#endif 4194 return SDValue(N, 0); 4195} 4196 4197SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4198 return getNode(Opcode, DL, VTList, 0, 0); 4199} 4200 4201SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4202 SDValue N1) { 4203 SDValue Ops[] = { N1 }; 4204 return getNode(Opcode, DL, VTList, Ops, 1); 4205} 4206 4207SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4208 SDValue N1, SDValue N2) { 4209 SDValue Ops[] = { N1, N2 }; 4210 return getNode(Opcode, DL, VTList, Ops, 2); 4211} 4212 4213SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4214 SDValue N1, SDValue N2, SDValue N3) { 4215 SDValue Ops[] = { N1, N2, N3 }; 4216 return getNode(Opcode, DL, VTList, Ops, 3); 4217} 4218 4219SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4220 SDValue N1, SDValue N2, SDValue N3, 4221 SDValue N4) { 4222 SDValue Ops[] = { N1, N2, N3, N4 }; 4223 return getNode(Opcode, DL, VTList, Ops, 4); 4224} 4225 4226SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4227 SDValue N1, SDValue N2, SDValue N3, 4228 SDValue N4, SDValue N5) { 4229 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4230 return getNode(Opcode, DL, VTList, Ops, 5); 4231} 4232 4233SDVTList SelectionDAG::getVTList(EVT VT) { 4234 return makeVTList(SDNode::getValueTypeList(VT), 1); 4235} 4236 4237SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4238 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4239 E = VTList.rend(); I != E; ++I) 4240 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4241 return *I; 4242 4243 EVT *Array = Allocator.Allocate<EVT>(2); 4244 Array[0] = VT1; 4245 Array[1] = VT2; 4246 SDVTList Result = makeVTList(Array, 2); 4247 VTList.push_back(Result); 4248 return Result; 4249} 4250 4251SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4252 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4253 E = VTList.rend(); I != E; ++I) 4254 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4255 I->VTs[2] == VT3) 4256 return *I; 4257 4258 EVT *Array = Allocator.Allocate<EVT>(3); 4259 Array[0] = VT1; 4260 Array[1] = VT2; 4261 Array[2] = VT3; 4262 SDVTList Result = makeVTList(Array, 3); 4263 VTList.push_back(Result); 4264 return Result; 4265} 4266 4267SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4268 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4269 E = VTList.rend(); I != E; ++I) 4270 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4271 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4272 return *I; 4273 4274 EVT *Array = Allocator.Allocate<EVT>(4); 4275 Array[0] = VT1; 4276 Array[1] = VT2; 4277 Array[2] = VT3; 4278 Array[3] = VT4; 4279 SDVTList Result = makeVTList(Array, 4); 4280 VTList.push_back(Result); 4281 return Result; 4282} 4283 4284SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4285 switch (NumVTs) { 4286 case 0: llvm_unreachable("Cannot have nodes without results!"); 4287 case 1: return getVTList(VTs[0]); 4288 case 2: return getVTList(VTs[0], VTs[1]); 4289 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4290 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4291 default: break; 4292 } 4293 4294 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4295 E = VTList.rend(); I != E; ++I) { 4296 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4297 continue; 4298 4299 bool NoMatch = false; 4300 for (unsigned i = 2; i != NumVTs; ++i) 4301 if (VTs[i] != I->VTs[i]) { 4302 NoMatch = true; 4303 break; 4304 } 4305 if (!NoMatch) 4306 return *I; 4307 } 4308 4309 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4310 std::copy(VTs, VTs+NumVTs, Array); 4311 SDVTList Result = makeVTList(Array, NumVTs); 4312 VTList.push_back(Result); 4313 return Result; 4314} 4315 4316 4317/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4318/// specified operands. If the resultant node already exists in the DAG, 4319/// this does not modify the specified node, instead it returns the node that 4320/// already exists. If the resultant node does not exist in the DAG, the 4321/// input node is returned. As a degenerate case, if you specify the same 4322/// input operands as the node already has, the input node is returned. 4323SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4324 SDNode *N = InN.getNode(); 4325 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4326 4327 // Check to see if there is no change. 4328 if (Op == N->getOperand(0)) return InN; 4329 4330 // See if the modified node already exists. 4331 void *InsertPos = 0; 4332 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4333 return SDValue(Existing, InN.getResNo()); 4334 4335 // Nope it doesn't. Remove the node from its current place in the maps. 4336 if (InsertPos) 4337 if (!RemoveNodeFromCSEMaps(N)) 4338 InsertPos = 0; 4339 4340 // Now we update the operands. 4341 N->OperandList[0].set(Op); 4342 4343 // If this gets put into a CSE map, add it. 4344 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4345 return InN; 4346} 4347 4348SDValue SelectionDAG:: 4349UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4350 SDNode *N = InN.getNode(); 4351 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4352 4353 // Check to see if there is no change. 4354 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4355 return InN; // No operands changed, just return the input node. 4356 4357 // See if the modified node already exists. 4358 void *InsertPos = 0; 4359 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4360 return SDValue(Existing, InN.getResNo()); 4361 4362 // Nope it doesn't. Remove the node from its current place in the maps. 4363 if (InsertPos) 4364 if (!RemoveNodeFromCSEMaps(N)) 4365 InsertPos = 0; 4366 4367 // Now we update the operands. 4368 if (N->OperandList[0] != Op1) 4369 N->OperandList[0].set(Op1); 4370 if (N->OperandList[1] != Op2) 4371 N->OperandList[1].set(Op2); 4372 4373 // If this gets put into a CSE map, add it. 4374 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4375 return InN; 4376} 4377 4378SDValue SelectionDAG:: 4379UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4380 SDValue Ops[] = { Op1, Op2, Op3 }; 4381 return UpdateNodeOperands(N, Ops, 3); 4382} 4383 4384SDValue SelectionDAG:: 4385UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4386 SDValue Op3, SDValue Op4) { 4387 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4388 return UpdateNodeOperands(N, Ops, 4); 4389} 4390 4391SDValue SelectionDAG:: 4392UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4393 SDValue Op3, SDValue Op4, SDValue Op5) { 4394 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4395 return UpdateNodeOperands(N, Ops, 5); 4396} 4397 4398SDValue SelectionDAG:: 4399UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4400 SDNode *N = InN.getNode(); 4401 assert(N->getNumOperands() == NumOps && 4402 "Update with wrong number of operands"); 4403 4404 // Check to see if there is no change. 4405 bool AnyChange = false; 4406 for (unsigned i = 0; i != NumOps; ++i) { 4407 if (Ops[i] != N->getOperand(i)) { 4408 AnyChange = true; 4409 break; 4410 } 4411 } 4412 4413 // No operands changed, just return the input node. 4414 if (!AnyChange) return InN; 4415 4416 // See if the modified node already exists. 4417 void *InsertPos = 0; 4418 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4419 return SDValue(Existing, InN.getResNo()); 4420 4421 // Nope it doesn't. Remove the node from its current place in the maps. 4422 if (InsertPos) 4423 if (!RemoveNodeFromCSEMaps(N)) 4424 InsertPos = 0; 4425 4426 // Now we update the operands. 4427 for (unsigned i = 0; i != NumOps; ++i) 4428 if (N->OperandList[i] != Ops[i]) 4429 N->OperandList[i].set(Ops[i]); 4430 4431 // If this gets put into a CSE map, add it. 4432 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4433 return InN; 4434} 4435 4436/// DropOperands - Release the operands and set this node to have 4437/// zero operands. 4438void SDNode::DropOperands() { 4439 // Unlike the code in MorphNodeTo that does this, we don't need to 4440 // watch for dead nodes here. 4441 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4442 SDUse &Use = *I++; 4443 Use.set(SDValue()); 4444 } 4445} 4446 4447/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4448/// machine opcode. 4449/// 4450SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4451 EVT VT) { 4452 SDVTList VTs = getVTList(VT); 4453 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4454} 4455 4456SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4457 EVT VT, SDValue Op1) { 4458 SDVTList VTs = getVTList(VT); 4459 SDValue Ops[] = { Op1 }; 4460 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4461} 4462 4463SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4464 EVT VT, SDValue Op1, 4465 SDValue Op2) { 4466 SDVTList VTs = getVTList(VT); 4467 SDValue Ops[] = { Op1, Op2 }; 4468 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4469} 4470 4471SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4472 EVT VT, SDValue Op1, 4473 SDValue Op2, SDValue Op3) { 4474 SDVTList VTs = getVTList(VT); 4475 SDValue Ops[] = { Op1, Op2, Op3 }; 4476 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4477} 4478 4479SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4480 EVT VT, const SDValue *Ops, 4481 unsigned NumOps) { 4482 SDVTList VTs = getVTList(VT); 4483 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4484} 4485 4486SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4487 EVT VT1, EVT VT2, const SDValue *Ops, 4488 unsigned NumOps) { 4489 SDVTList VTs = getVTList(VT1, VT2); 4490 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4491} 4492 4493SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4494 EVT VT1, EVT VT2) { 4495 SDVTList VTs = getVTList(VT1, VT2); 4496 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4497} 4498 4499SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4500 EVT VT1, EVT VT2, EVT VT3, 4501 const SDValue *Ops, unsigned NumOps) { 4502 SDVTList VTs = getVTList(VT1, VT2, VT3); 4503 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4504} 4505 4506SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4507 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4508 const SDValue *Ops, unsigned NumOps) { 4509 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4510 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4511} 4512 4513SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4514 EVT VT1, EVT VT2, 4515 SDValue Op1) { 4516 SDVTList VTs = getVTList(VT1, VT2); 4517 SDValue Ops[] = { Op1 }; 4518 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4519} 4520 4521SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4522 EVT VT1, EVT VT2, 4523 SDValue Op1, SDValue Op2) { 4524 SDVTList VTs = getVTList(VT1, VT2); 4525 SDValue Ops[] = { Op1, Op2 }; 4526 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4527} 4528 4529SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4530 EVT VT1, EVT VT2, 4531 SDValue Op1, SDValue Op2, 4532 SDValue Op3) { 4533 SDVTList VTs = getVTList(VT1, VT2); 4534 SDValue Ops[] = { Op1, Op2, Op3 }; 4535 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4536} 4537 4538SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4539 EVT VT1, EVT VT2, EVT VT3, 4540 SDValue Op1, SDValue Op2, 4541 SDValue Op3) { 4542 SDVTList VTs = getVTList(VT1, VT2, VT3); 4543 SDValue Ops[] = { Op1, Op2, Op3 }; 4544 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4545} 4546 4547SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4548 SDVTList VTs, const SDValue *Ops, 4549 unsigned NumOps) { 4550 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4551} 4552 4553SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4554 EVT VT) { 4555 SDVTList VTs = getVTList(VT); 4556 return MorphNodeTo(N, Opc, VTs, 0, 0); 4557} 4558 4559SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4560 EVT VT, SDValue Op1) { 4561 SDVTList VTs = getVTList(VT); 4562 SDValue Ops[] = { Op1 }; 4563 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4564} 4565 4566SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4567 EVT VT, SDValue Op1, 4568 SDValue Op2) { 4569 SDVTList VTs = getVTList(VT); 4570 SDValue Ops[] = { Op1, Op2 }; 4571 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4572} 4573 4574SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4575 EVT VT, SDValue Op1, 4576 SDValue Op2, SDValue Op3) { 4577 SDVTList VTs = getVTList(VT); 4578 SDValue Ops[] = { Op1, Op2, Op3 }; 4579 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4580} 4581 4582SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4583 EVT VT, const SDValue *Ops, 4584 unsigned NumOps) { 4585 SDVTList VTs = getVTList(VT); 4586 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4587} 4588 4589SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4590 EVT VT1, EVT VT2, const SDValue *Ops, 4591 unsigned NumOps) { 4592 SDVTList VTs = getVTList(VT1, VT2); 4593 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4594} 4595 4596SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4597 EVT VT1, EVT VT2) { 4598 SDVTList VTs = getVTList(VT1, VT2); 4599 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4600} 4601 4602SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4603 EVT VT1, EVT VT2, EVT VT3, 4604 const SDValue *Ops, unsigned NumOps) { 4605 SDVTList VTs = getVTList(VT1, VT2, VT3); 4606 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4607} 4608 4609SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4610 EVT VT1, EVT VT2, 4611 SDValue Op1) { 4612 SDVTList VTs = getVTList(VT1, VT2); 4613 SDValue Ops[] = { Op1 }; 4614 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4615} 4616 4617SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4618 EVT VT1, EVT VT2, 4619 SDValue Op1, SDValue Op2) { 4620 SDVTList VTs = getVTList(VT1, VT2); 4621 SDValue Ops[] = { Op1, Op2 }; 4622 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4623} 4624 4625SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4626 EVT VT1, EVT VT2, 4627 SDValue Op1, SDValue Op2, 4628 SDValue Op3) { 4629 SDVTList VTs = getVTList(VT1, VT2); 4630 SDValue Ops[] = { Op1, Op2, Op3 }; 4631 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4632} 4633 4634/// MorphNodeTo - These *mutate* the specified node to have the specified 4635/// return type, opcode, and operands. 4636/// 4637/// Note that MorphNodeTo returns the resultant node. If there is already a 4638/// node of the specified opcode and operands, it returns that node instead of 4639/// the current one. Note that the DebugLoc need not be the same. 4640/// 4641/// Using MorphNodeTo is faster than creating a new node and swapping it in 4642/// with ReplaceAllUsesWith both because it often avoids allocating a new 4643/// node, and because it doesn't require CSE recalculation for any of 4644/// the node's users. 4645/// 4646SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4647 SDVTList VTs, const SDValue *Ops, 4648 unsigned NumOps) { 4649 // If an identical node already exists, use it. 4650 void *IP = 0; 4651 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4652 FoldingSetNodeID ID; 4653 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4654 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4655 return ON; 4656 } 4657 4658 if (!RemoveNodeFromCSEMaps(N)) 4659 IP = 0; 4660 4661 // Start the morphing. 4662 N->NodeType = Opc; 4663 N->ValueList = VTs.VTs; 4664 N->NumValues = VTs.NumVTs; 4665 4666 // Clear the operands list, updating used nodes to remove this from their 4667 // use list. Keep track of any operands that become dead as a result. 4668 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4669 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4670 SDUse &Use = *I++; 4671 SDNode *Used = Use.getNode(); 4672 Use.set(SDValue()); 4673 if (Used->use_empty()) 4674 DeadNodeSet.insert(Used); 4675 } 4676 4677 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4678 // Initialize the memory references information. 4679 MN->setMemRefs(0, 0); 4680 // If NumOps is larger than the # of operands we can have in a 4681 // MachineSDNode, reallocate the operand list. 4682 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4683 if (MN->OperandsNeedDelete) 4684 delete[] MN->OperandList; 4685 if (NumOps > array_lengthof(MN->LocalOperands)) 4686 // We're creating a final node that will live unmorphed for the 4687 // remainder of the current SelectionDAG iteration, so we can allocate 4688 // the operands directly out of a pool with no recycling metadata. 4689 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4690 Ops, NumOps); 4691 else 4692 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4693 MN->OperandsNeedDelete = false; 4694 } else 4695 MN->InitOperands(MN->OperandList, Ops, NumOps); 4696 } else { 4697 // If NumOps is larger than the # of operands we currently have, reallocate 4698 // the operand list. 4699 if (NumOps > N->NumOperands) { 4700 if (N->OperandsNeedDelete) 4701 delete[] N->OperandList; 4702 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4703 N->OperandsNeedDelete = true; 4704 } else 4705 N->InitOperands(N->OperandList, Ops, NumOps); 4706 } 4707 4708 // Delete any nodes that are still dead after adding the uses for the 4709 // new operands. 4710 SmallVector<SDNode *, 16> DeadNodes; 4711 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4712 E = DeadNodeSet.end(); I != E; ++I) 4713 if ((*I)->use_empty()) 4714 DeadNodes.push_back(*I); 4715 RemoveDeadNodes(DeadNodes); 4716 4717 if (IP) 4718 CSEMap.InsertNode(N, IP); // Memoize the new node. 4719 return N; 4720} 4721 4722 4723/// getMachineNode - These are used for target selectors to create a new node 4724/// with specified return type(s), MachineInstr opcode, and operands. 4725/// 4726/// Note that getMachineNode returns the resultant node. If there is already a 4727/// node of the specified opcode and operands, it returns that node instead of 4728/// the current one. 4729MachineSDNode * 4730SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4731 SDVTList VTs = getVTList(VT); 4732 return getMachineNode(Opcode, dl, VTs, 0, 0); 4733} 4734 4735MachineSDNode * 4736SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4737 SDVTList VTs = getVTList(VT); 4738 SDValue Ops[] = { Op1 }; 4739 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4740} 4741 4742MachineSDNode * 4743SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4744 SDValue Op1, SDValue Op2) { 4745 SDVTList VTs = getVTList(VT); 4746 SDValue Ops[] = { Op1, Op2 }; 4747 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4748} 4749 4750MachineSDNode * 4751SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4752 SDValue Op1, SDValue Op2, SDValue Op3) { 4753 SDVTList VTs = getVTList(VT); 4754 SDValue Ops[] = { Op1, Op2, Op3 }; 4755 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4756} 4757 4758MachineSDNode * 4759SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4760 const SDValue *Ops, unsigned NumOps) { 4761 SDVTList VTs = getVTList(VT); 4762 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4763} 4764 4765MachineSDNode * 4766SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4767 SDVTList VTs = getVTList(VT1, VT2); 4768 return getMachineNode(Opcode, dl, VTs, 0, 0); 4769} 4770 4771MachineSDNode * 4772SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4773 EVT VT1, EVT VT2, SDValue Op1) { 4774 SDVTList VTs = getVTList(VT1, VT2); 4775 SDValue Ops[] = { Op1 }; 4776 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4777} 4778 4779MachineSDNode * 4780SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4781 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4782 SDVTList VTs = getVTList(VT1, VT2); 4783 SDValue Ops[] = { Op1, Op2 }; 4784 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4785} 4786 4787MachineSDNode * 4788SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4789 EVT VT1, EVT VT2, SDValue Op1, 4790 SDValue Op2, SDValue Op3) { 4791 SDVTList VTs = getVTList(VT1, VT2); 4792 SDValue Ops[] = { Op1, Op2, Op3 }; 4793 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4794} 4795 4796MachineSDNode * 4797SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4798 EVT VT1, EVT VT2, 4799 const SDValue *Ops, unsigned NumOps) { 4800 SDVTList VTs = getVTList(VT1, VT2); 4801 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4802} 4803 4804MachineSDNode * 4805SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4806 EVT VT1, EVT VT2, EVT VT3, 4807 SDValue Op1, SDValue Op2) { 4808 SDVTList VTs = getVTList(VT1, VT2, VT3); 4809 SDValue Ops[] = { Op1, Op2 }; 4810 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4811} 4812 4813MachineSDNode * 4814SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4815 EVT VT1, EVT VT2, EVT VT3, 4816 SDValue Op1, SDValue Op2, SDValue Op3) { 4817 SDVTList VTs = getVTList(VT1, VT2, VT3); 4818 SDValue Ops[] = { Op1, Op2, Op3 }; 4819 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4820} 4821 4822MachineSDNode * 4823SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4824 EVT VT1, EVT VT2, EVT VT3, 4825 const SDValue *Ops, unsigned NumOps) { 4826 SDVTList VTs = getVTList(VT1, VT2, VT3); 4827 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4828} 4829 4830MachineSDNode * 4831SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4832 EVT VT2, EVT VT3, EVT VT4, 4833 const SDValue *Ops, unsigned NumOps) { 4834 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4835 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4836} 4837 4838MachineSDNode * 4839SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4840 const std::vector<EVT> &ResultTys, 4841 const SDValue *Ops, unsigned NumOps) { 4842 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4843 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4844} 4845 4846MachineSDNode * 4847SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4848 const SDValue *Ops, unsigned NumOps) { 4849 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4850 MachineSDNode *N; 4851 void *IP; 4852 4853 if (DoCSE) { 4854 FoldingSetNodeID ID; 4855 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4856 IP = 0; 4857 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4858 return cast<MachineSDNode>(E); 4859 } 4860 4861 // Allocate a new MachineSDNode. 4862 N = NodeAllocator.Allocate<MachineSDNode>(); 4863 new (N) MachineSDNode(~Opcode, DL, VTs); 4864 4865 // Initialize the operands list. 4866 if (NumOps > array_lengthof(N->LocalOperands)) 4867 // We're creating a final node that will live unmorphed for the 4868 // remainder of the current SelectionDAG iteration, so we can allocate 4869 // the operands directly out of a pool with no recycling metadata. 4870 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4871 Ops, NumOps); 4872 else 4873 N->InitOperands(N->LocalOperands, Ops, NumOps); 4874 N->OperandsNeedDelete = false; 4875 4876 if (DoCSE) 4877 CSEMap.InsertNode(N, IP); 4878 4879 AllNodes.push_back(N); 4880#ifndef NDEBUG 4881 VerifyNode(N); 4882#endif 4883 return N; 4884} 4885 4886/// getTargetExtractSubreg - A convenience function for creating 4887/// TargetOpcode::EXTRACT_SUBREG nodes. 4888SDValue 4889SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4890 SDValue Operand) { 4891 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4892 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4893 VT, Operand, SRIdxVal); 4894 return SDValue(Subreg, 0); 4895} 4896 4897/// getTargetInsertSubreg - A convenience function for creating 4898/// TargetOpcode::INSERT_SUBREG nodes. 4899SDValue 4900SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4901 SDValue Operand, SDValue Subreg) { 4902 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4903 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4904 VT, Operand, Subreg, SRIdxVal); 4905 return SDValue(Result, 0); 4906} 4907 4908/// getNodeIfExists - Get the specified node if it's already available, or 4909/// else return NULL. 4910SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4911 const SDValue *Ops, unsigned NumOps) { 4912 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4913 FoldingSetNodeID ID; 4914 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4915 void *IP = 0; 4916 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4917 return E; 4918 } 4919 return NULL; 4920} 4921 4922/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4923/// This can cause recursive merging of nodes in the DAG. 4924/// 4925/// This version assumes From has a single result value. 4926/// 4927void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4928 DAGUpdateListener *UpdateListener) { 4929 SDNode *From = FromN.getNode(); 4930 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4931 "Cannot replace with this method!"); 4932 assert(From != To.getNode() && "Cannot replace uses of with self"); 4933 4934 // Iterate over all the existing uses of From. New uses will be added 4935 // to the beginning of the use list, which we avoid visiting. 4936 // This specifically avoids visiting uses of From that arise while the 4937 // replacement is happening, because any such uses would be the result 4938 // of CSE: If an existing node looks like From after one of its operands 4939 // is replaced by To, we don't want to replace of all its users with To 4940 // too. See PR3018 for more info. 4941 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4942 while (UI != UE) { 4943 SDNode *User = *UI; 4944 4945 // This node is about to morph, remove its old self from the CSE maps. 4946 RemoveNodeFromCSEMaps(User); 4947 4948 // A user can appear in a use list multiple times, and when this 4949 // happens the uses are usually next to each other in the list. 4950 // To help reduce the number of CSE recomputations, process all 4951 // the uses of this user that we can find this way. 4952 do { 4953 SDUse &Use = UI.getUse(); 4954 ++UI; 4955 Use.set(To); 4956 } while (UI != UE && *UI == User); 4957 4958 // Now that we have modified User, add it back to the CSE maps. If it 4959 // already exists there, recursively merge the results together. 4960 AddModifiedNodeToCSEMaps(User, UpdateListener); 4961 } 4962} 4963 4964/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4965/// This can cause recursive merging of nodes in the DAG. 4966/// 4967/// This version assumes that for each value of From, there is a 4968/// corresponding value in To in the same position with the same type. 4969/// 4970void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4971 DAGUpdateListener *UpdateListener) { 4972#ifndef NDEBUG 4973 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 4974 assert((!From->hasAnyUseOfValue(i) || 4975 From->getValueType(i) == To->getValueType(i)) && 4976 "Cannot use this version of ReplaceAllUsesWith!"); 4977#endif 4978 4979 // Handle the trivial case. 4980 if (From == To) 4981 return; 4982 4983 // Iterate over just the existing users of From. See the comments in 4984 // the ReplaceAllUsesWith above. 4985 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4986 while (UI != UE) { 4987 SDNode *User = *UI; 4988 4989 // This node is about to morph, remove its old self from the CSE maps. 4990 RemoveNodeFromCSEMaps(User); 4991 4992 // A user can appear in a use list multiple times, and when this 4993 // happens the uses are usually next to each other in the list. 4994 // To help reduce the number of CSE recomputations, process all 4995 // the uses of this user that we can find this way. 4996 do { 4997 SDUse &Use = UI.getUse(); 4998 ++UI; 4999 Use.setNode(To); 5000 } while (UI != UE && *UI == User); 5001 5002 // Now that we have modified User, add it back to the CSE maps. If it 5003 // already exists there, recursively merge the results together. 5004 AddModifiedNodeToCSEMaps(User, UpdateListener); 5005 } 5006} 5007 5008/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5009/// This can cause recursive merging of nodes in the DAG. 5010/// 5011/// This version can replace From with any result values. To must match the 5012/// number and types of values returned by From. 5013void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5014 const SDValue *To, 5015 DAGUpdateListener *UpdateListener) { 5016 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5017 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5018 5019 // Iterate over just the existing users of From. See the comments in 5020 // the ReplaceAllUsesWith above. 5021 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5022 while (UI != UE) { 5023 SDNode *User = *UI; 5024 5025 // This node is about to morph, remove its old self from the CSE maps. 5026 RemoveNodeFromCSEMaps(User); 5027 5028 // A user can appear in a use list multiple times, and when this 5029 // happens the uses are usually next to each other in the list. 5030 // To help reduce the number of CSE recomputations, process all 5031 // the uses of this user that we can find this way. 5032 do { 5033 SDUse &Use = UI.getUse(); 5034 const SDValue &ToOp = To[Use.getResNo()]; 5035 ++UI; 5036 Use.set(ToOp); 5037 } while (UI != UE && *UI == User); 5038 5039 // Now that we have modified User, add it back to the CSE maps. If it 5040 // already exists there, recursively merge the results together. 5041 AddModifiedNodeToCSEMaps(User, UpdateListener); 5042 } 5043} 5044 5045/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5046/// uses of other values produced by From.getNode() alone. The Deleted 5047/// vector is handled the same way as for ReplaceAllUsesWith. 5048void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5049 DAGUpdateListener *UpdateListener){ 5050 // Handle the really simple, really trivial case efficiently. 5051 if (From == To) return; 5052 5053 // Handle the simple, trivial, case efficiently. 5054 if (From.getNode()->getNumValues() == 1) { 5055 ReplaceAllUsesWith(From, To, UpdateListener); 5056 return; 5057 } 5058 5059 // Iterate over just the existing users of From. See the comments in 5060 // the ReplaceAllUsesWith above. 5061 SDNode::use_iterator UI = From.getNode()->use_begin(), 5062 UE = From.getNode()->use_end(); 5063 while (UI != UE) { 5064 SDNode *User = *UI; 5065 bool UserRemovedFromCSEMaps = false; 5066 5067 // A user can appear in a use list multiple times, and when this 5068 // happens the uses are usually next to each other in the list. 5069 // To help reduce the number of CSE recomputations, process all 5070 // the uses of this user that we can find this way. 5071 do { 5072 SDUse &Use = UI.getUse(); 5073 5074 // Skip uses of different values from the same node. 5075 if (Use.getResNo() != From.getResNo()) { 5076 ++UI; 5077 continue; 5078 } 5079 5080 // If this node hasn't been modified yet, it's still in the CSE maps, 5081 // so remove its old self from the CSE maps. 5082 if (!UserRemovedFromCSEMaps) { 5083 RemoveNodeFromCSEMaps(User); 5084 UserRemovedFromCSEMaps = true; 5085 } 5086 5087 ++UI; 5088 Use.set(To); 5089 } while (UI != UE && *UI == User); 5090 5091 // We are iterating over all uses of the From node, so if a use 5092 // doesn't use the specific value, no changes are made. 5093 if (!UserRemovedFromCSEMaps) 5094 continue; 5095 5096 // Now that we have modified User, add it back to the CSE maps. If it 5097 // already exists there, recursively merge the results together. 5098 AddModifiedNodeToCSEMaps(User, UpdateListener); 5099 } 5100} 5101 5102namespace { 5103 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5104 /// to record information about a use. 5105 struct UseMemo { 5106 SDNode *User; 5107 unsigned Index; 5108 SDUse *Use; 5109 }; 5110 5111 /// operator< - Sort Memos by User. 5112 bool operator<(const UseMemo &L, const UseMemo &R) { 5113 return (intptr_t)L.User < (intptr_t)R.User; 5114 } 5115} 5116 5117/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5118/// uses of other values produced by From.getNode() alone. The same value 5119/// may appear in both the From and To list. The Deleted vector is 5120/// handled the same way as for ReplaceAllUsesWith. 5121void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5122 const SDValue *To, 5123 unsigned Num, 5124 DAGUpdateListener *UpdateListener){ 5125 // Handle the simple, trivial case efficiently. 5126 if (Num == 1) 5127 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5128 5129 // Read up all the uses and make records of them. This helps 5130 // processing new uses that are introduced during the 5131 // replacement process. 5132 SmallVector<UseMemo, 4> Uses; 5133 for (unsigned i = 0; i != Num; ++i) { 5134 unsigned FromResNo = From[i].getResNo(); 5135 SDNode *FromNode = From[i].getNode(); 5136 for (SDNode::use_iterator UI = FromNode->use_begin(), 5137 E = FromNode->use_end(); UI != E; ++UI) { 5138 SDUse &Use = UI.getUse(); 5139 if (Use.getResNo() == FromResNo) { 5140 UseMemo Memo = { *UI, i, &Use }; 5141 Uses.push_back(Memo); 5142 } 5143 } 5144 } 5145 5146 // Sort the uses, so that all the uses from a given User are together. 5147 std::sort(Uses.begin(), Uses.end()); 5148 5149 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5150 UseIndex != UseIndexEnd; ) { 5151 // We know that this user uses some value of From. If it is the right 5152 // value, update it. 5153 SDNode *User = Uses[UseIndex].User; 5154 5155 // This node is about to morph, remove its old self from the CSE maps. 5156 RemoveNodeFromCSEMaps(User); 5157 5158 // The Uses array is sorted, so all the uses for a given User 5159 // are next to each other in the list. 5160 // To help reduce the number of CSE recomputations, process all 5161 // the uses of this user that we can find this way. 5162 do { 5163 unsigned i = Uses[UseIndex].Index; 5164 SDUse &Use = *Uses[UseIndex].Use; 5165 ++UseIndex; 5166 5167 Use.set(To[i]); 5168 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5169 5170 // Now that we have modified User, add it back to the CSE maps. If it 5171 // already exists there, recursively merge the results together. 5172 AddModifiedNodeToCSEMaps(User, UpdateListener); 5173 } 5174} 5175 5176/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5177/// based on their topological order. It returns the maximum id and a vector 5178/// of the SDNodes* in assigned order by reference. 5179unsigned SelectionDAG::AssignTopologicalOrder() { 5180 5181 unsigned DAGSize = 0; 5182 5183 // SortedPos tracks the progress of the algorithm. Nodes before it are 5184 // sorted, nodes after it are unsorted. When the algorithm completes 5185 // it is at the end of the list. 5186 allnodes_iterator SortedPos = allnodes_begin(); 5187 5188 // Visit all the nodes. Move nodes with no operands to the front of 5189 // the list immediately. Annotate nodes that do have operands with their 5190 // operand count. Before we do this, the Node Id fields of the nodes 5191 // may contain arbitrary values. After, the Node Id fields for nodes 5192 // before SortedPos will contain the topological sort index, and the 5193 // Node Id fields for nodes At SortedPos and after will contain the 5194 // count of outstanding operands. 5195 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5196 SDNode *N = I++; 5197 checkForCycles(N); 5198 unsigned Degree = N->getNumOperands(); 5199 if (Degree == 0) { 5200 // A node with no uses, add it to the result array immediately. 5201 N->setNodeId(DAGSize++); 5202 allnodes_iterator Q = N; 5203 if (Q != SortedPos) 5204 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5205 assert(SortedPos != AllNodes.end() && "Overran node list"); 5206 ++SortedPos; 5207 } else { 5208 // Temporarily use the Node Id as scratch space for the degree count. 5209 N->setNodeId(Degree); 5210 } 5211 } 5212 5213 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5214 // such that by the time the end is reached all nodes will be sorted. 5215 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5216 SDNode *N = I; 5217 checkForCycles(N); 5218 // N is in sorted position, so all its uses have one less operand 5219 // that needs to be sorted. 5220 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5221 UI != UE; ++UI) { 5222 SDNode *P = *UI; 5223 unsigned Degree = P->getNodeId(); 5224 assert(Degree != 0 && "Invalid node degree"); 5225 --Degree; 5226 if (Degree == 0) { 5227 // All of P's operands are sorted, so P may sorted now. 5228 P->setNodeId(DAGSize++); 5229 if (P != SortedPos) 5230 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5231 assert(SortedPos != AllNodes.end() && "Overran node list"); 5232 ++SortedPos; 5233 } else { 5234 // Update P's outstanding operand count. 5235 P->setNodeId(Degree); 5236 } 5237 } 5238 if (I == SortedPos) { 5239#ifndef NDEBUG 5240 SDNode *S = ++I; 5241 dbgs() << "Overran sorted position:\n"; 5242 S->dumprFull(); 5243#endif 5244 llvm_unreachable(0); 5245 } 5246 } 5247 5248 assert(SortedPos == AllNodes.end() && 5249 "Topological sort incomplete!"); 5250 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5251 "First node in topological sort is not the entry token!"); 5252 assert(AllNodes.front().getNodeId() == 0 && 5253 "First node in topological sort has non-zero id!"); 5254 assert(AllNodes.front().getNumOperands() == 0 && 5255 "First node in topological sort has operands!"); 5256 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5257 "Last node in topologic sort has unexpected id!"); 5258 assert(AllNodes.back().use_empty() && 5259 "Last node in topologic sort has users!"); 5260 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5261 return DAGSize; 5262} 5263 5264/// AssignOrdering - Assign an order to the SDNode. 5265void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5266 assert(SD && "Trying to assign an order to a null node!"); 5267 Ordering->add(SD, Order); 5268} 5269 5270/// GetOrdering - Get the order for the SDNode. 5271unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5272 assert(SD && "Trying to get the order of a null node!"); 5273 return Ordering->getOrder(SD); 5274} 5275 5276 5277//===----------------------------------------------------------------------===// 5278// SDNode Class 5279//===----------------------------------------------------------------------===// 5280 5281HandleSDNode::~HandleSDNode() { 5282 DropOperands(); 5283} 5284 5285GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5286 EVT VT, int64_t o, unsigned char TF) 5287 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)), 5288 Offset(o), TargetFlags(TF) { 5289 TheGlobal = const_cast<GlobalValue*>(GA); 5290} 5291 5292MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5293 MachineMemOperand *mmo) 5294 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5295 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile()); 5296 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5297 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5298} 5299 5300MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5301 const SDValue *Ops, unsigned NumOps, EVT memvt, 5302 MachineMemOperand *mmo) 5303 : SDNode(Opc, dl, VTs, Ops, NumOps), 5304 MemoryVT(memvt), MMO(mmo) { 5305 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile()); 5306 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5307 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5308} 5309 5310/// Profile - Gather unique data for the node. 5311/// 5312void SDNode::Profile(FoldingSetNodeID &ID) const { 5313 AddNodeIDNode(ID, this); 5314} 5315 5316namespace { 5317 struct EVTArray { 5318 std::vector<EVT> VTs; 5319 5320 EVTArray() { 5321 VTs.reserve(MVT::LAST_VALUETYPE); 5322 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5323 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5324 } 5325 }; 5326} 5327 5328static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5329static ManagedStatic<EVTArray> SimpleVTArray; 5330static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5331 5332/// getValueTypeList - Return a pointer to the specified value type. 5333/// 5334const EVT *SDNode::getValueTypeList(EVT VT) { 5335 if (VT.isExtended()) { 5336 sys::SmartScopedLock<true> Lock(*VTMutex); 5337 return &(*EVTs->insert(VT).first); 5338 } else { 5339 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5340 } 5341} 5342 5343/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5344/// indicated value. This method ignores uses of other values defined by this 5345/// operation. 5346bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5347 assert(Value < getNumValues() && "Bad value!"); 5348 5349 // TODO: Only iterate over uses of a given value of the node 5350 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5351 if (UI.getUse().getResNo() == Value) { 5352 if (NUses == 0) 5353 return false; 5354 --NUses; 5355 } 5356 } 5357 5358 // Found exactly the right number of uses? 5359 return NUses == 0; 5360} 5361 5362 5363/// hasAnyUseOfValue - Return true if there are any use of the indicated 5364/// value. This method ignores uses of other values defined by this operation. 5365bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5366 assert(Value < getNumValues() && "Bad value!"); 5367 5368 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5369 if (UI.getUse().getResNo() == Value) 5370 return true; 5371 5372 return false; 5373} 5374 5375 5376/// isOnlyUserOf - Return true if this node is the only use of N. 5377/// 5378bool SDNode::isOnlyUserOf(SDNode *N) const { 5379 bool Seen = false; 5380 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5381 SDNode *User = *I; 5382 if (User == this) 5383 Seen = true; 5384 else 5385 return false; 5386 } 5387 5388 return Seen; 5389} 5390 5391/// isOperand - Return true if this node is an operand of N. 5392/// 5393bool SDValue::isOperandOf(SDNode *N) const { 5394 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5395 if (*this == N->getOperand(i)) 5396 return true; 5397 return false; 5398} 5399 5400bool SDNode::isOperandOf(SDNode *N) const { 5401 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5402 if (this == N->OperandList[i].getNode()) 5403 return true; 5404 return false; 5405} 5406 5407/// reachesChainWithoutSideEffects - Return true if this operand (which must 5408/// be a chain) reaches the specified operand without crossing any 5409/// side-effecting instructions. In practice, this looks through token 5410/// factors and non-volatile loads. In order to remain efficient, this only 5411/// looks a couple of nodes in, it does not do an exhaustive search. 5412bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5413 unsigned Depth) const { 5414 if (*this == Dest) return true; 5415 5416 // Don't search too deeply, we just want to be able to see through 5417 // TokenFactor's etc. 5418 if (Depth == 0) return false; 5419 5420 // If this is a token factor, all inputs to the TF happen in parallel. If any 5421 // of the operands of the TF reach dest, then we can do the xform. 5422 if (getOpcode() == ISD::TokenFactor) { 5423 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5424 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5425 return true; 5426 return false; 5427 } 5428 5429 // Loads don't have side effects, look through them. 5430 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5431 if (!Ld->isVolatile()) 5432 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5433 } 5434 return false; 5435} 5436 5437/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5438/// is either an operand of N or it can be reached by traversing up the operands. 5439/// NOTE: this is an expensive method. Use it carefully. 5440bool SDNode::isPredecessorOf(SDNode *N) const { 5441 SmallPtrSet<SDNode *, 32> Visited; 5442 SmallVector<SDNode *, 16> Worklist; 5443 Worklist.push_back(N); 5444 5445 do { 5446 N = Worklist.pop_back_val(); 5447 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5448 SDNode *Op = N->getOperand(i).getNode(); 5449 if (Op == this) 5450 return true; 5451 if (Visited.insert(Op)) 5452 Worklist.push_back(Op); 5453 } 5454 } while (!Worklist.empty()); 5455 5456 return false; 5457} 5458 5459uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5460 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5461 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5462} 5463 5464std::string SDNode::getOperationName(const SelectionDAG *G) const { 5465 switch (getOpcode()) { 5466 default: 5467 if (getOpcode() < ISD::BUILTIN_OP_END) 5468 return "<<Unknown DAG Node>>"; 5469 if (isMachineOpcode()) { 5470 if (G) 5471 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5472 if (getMachineOpcode() < TII->getNumOpcodes()) 5473 return TII->get(getMachineOpcode()).getName(); 5474 return "<<Unknown Machine Node>>"; 5475 } 5476 if (G) { 5477 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5478 const char *Name = TLI.getTargetNodeName(getOpcode()); 5479 if (Name) return Name; 5480 return "<<Unknown Target Node>>"; 5481 } 5482 return "<<Unknown Node>>"; 5483 5484#ifndef NDEBUG 5485 case ISD::DELETED_NODE: 5486 return "<<Deleted Node!>>"; 5487#endif 5488 case ISD::PREFETCH: return "Prefetch"; 5489 case ISD::MEMBARRIER: return "MemBarrier"; 5490 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5491 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5492 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5493 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5494 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5495 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5496 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5497 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5498 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5499 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5500 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5501 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5502 case ISD::PCMARKER: return "PCMarker"; 5503 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5504 case ISD::SRCVALUE: return "SrcValue"; 5505 case ISD::EntryToken: return "EntryToken"; 5506 case ISD::TokenFactor: return "TokenFactor"; 5507 case ISD::AssertSext: return "AssertSext"; 5508 case ISD::AssertZext: return "AssertZext"; 5509 5510 case ISD::BasicBlock: return "BasicBlock"; 5511 case ISD::VALUETYPE: return "ValueType"; 5512 case ISD::Register: return "Register"; 5513 5514 case ISD::Constant: return "Constant"; 5515 case ISD::ConstantFP: return "ConstantFP"; 5516 case ISD::GlobalAddress: return "GlobalAddress"; 5517 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5518 case ISD::FrameIndex: return "FrameIndex"; 5519 case ISD::JumpTable: return "JumpTable"; 5520 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5521 case ISD::RETURNADDR: return "RETURNADDR"; 5522 case ISD::FRAMEADDR: return "FRAMEADDR"; 5523 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5524 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5525 case ISD::LSDAADDR: return "LSDAADDR"; 5526 case ISD::EHSELECTION: return "EHSELECTION"; 5527 case ISD::EH_RETURN: return "EH_RETURN"; 5528 case ISD::ConstantPool: return "ConstantPool"; 5529 case ISD::ExternalSymbol: return "ExternalSymbol"; 5530 case ISD::BlockAddress: return "BlockAddress"; 5531 case ISD::INTRINSIC_WO_CHAIN: 5532 case ISD::INTRINSIC_VOID: 5533 case ISD::INTRINSIC_W_CHAIN: { 5534 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5535 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5536 if (IID < Intrinsic::num_intrinsics) 5537 return Intrinsic::getName((Intrinsic::ID)IID); 5538 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5539 return TII->getName(IID); 5540 llvm_unreachable("Invalid intrinsic ID"); 5541 } 5542 5543 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5544 case ISD::TargetConstant: return "TargetConstant"; 5545 case ISD::TargetConstantFP:return "TargetConstantFP"; 5546 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5547 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5548 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5549 case ISD::TargetJumpTable: return "TargetJumpTable"; 5550 case ISD::TargetConstantPool: return "TargetConstantPool"; 5551 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5552 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5553 5554 case ISD::CopyToReg: return "CopyToReg"; 5555 case ISD::CopyFromReg: return "CopyFromReg"; 5556 case ISD::UNDEF: return "undef"; 5557 case ISD::MERGE_VALUES: return "merge_values"; 5558 case ISD::INLINEASM: return "inlineasm"; 5559 case ISD::EH_LABEL: return "eh_label"; 5560 case ISD::HANDLENODE: return "handlenode"; 5561 5562 // Unary operators 5563 case ISD::FABS: return "fabs"; 5564 case ISD::FNEG: return "fneg"; 5565 case ISD::FSQRT: return "fsqrt"; 5566 case ISD::FSIN: return "fsin"; 5567 case ISD::FCOS: return "fcos"; 5568 case ISD::FPOWI: return "fpowi"; 5569 case ISD::FPOW: return "fpow"; 5570 case ISD::FTRUNC: return "ftrunc"; 5571 case ISD::FFLOOR: return "ffloor"; 5572 case ISD::FCEIL: return "fceil"; 5573 case ISD::FRINT: return "frint"; 5574 case ISD::FNEARBYINT: return "fnearbyint"; 5575 5576 // Binary operators 5577 case ISD::ADD: return "add"; 5578 case ISD::SUB: return "sub"; 5579 case ISD::MUL: return "mul"; 5580 case ISD::MULHU: return "mulhu"; 5581 case ISD::MULHS: return "mulhs"; 5582 case ISD::SDIV: return "sdiv"; 5583 case ISD::UDIV: return "udiv"; 5584 case ISD::SREM: return "srem"; 5585 case ISD::UREM: return "urem"; 5586 case ISD::SMUL_LOHI: return "smul_lohi"; 5587 case ISD::UMUL_LOHI: return "umul_lohi"; 5588 case ISD::SDIVREM: return "sdivrem"; 5589 case ISD::UDIVREM: return "udivrem"; 5590 case ISD::AND: return "and"; 5591 case ISD::OR: return "or"; 5592 case ISD::XOR: return "xor"; 5593 case ISD::SHL: return "shl"; 5594 case ISD::SRA: return "sra"; 5595 case ISD::SRL: return "srl"; 5596 case ISD::ROTL: return "rotl"; 5597 case ISD::ROTR: return "rotr"; 5598 case ISD::FADD: return "fadd"; 5599 case ISD::FSUB: return "fsub"; 5600 case ISD::FMUL: return "fmul"; 5601 case ISD::FDIV: return "fdiv"; 5602 case ISD::FREM: return "frem"; 5603 case ISD::FCOPYSIGN: return "fcopysign"; 5604 case ISD::FGETSIGN: return "fgetsign"; 5605 5606 case ISD::SETCC: return "setcc"; 5607 case ISD::VSETCC: return "vsetcc"; 5608 case ISD::SELECT: return "select"; 5609 case ISD::SELECT_CC: return "select_cc"; 5610 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5611 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5612 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5613 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5614 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5615 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5616 case ISD::CARRY_FALSE: return "carry_false"; 5617 case ISD::ADDC: return "addc"; 5618 case ISD::ADDE: return "adde"; 5619 case ISD::SADDO: return "saddo"; 5620 case ISD::UADDO: return "uaddo"; 5621 case ISD::SSUBO: return "ssubo"; 5622 case ISD::USUBO: return "usubo"; 5623 case ISD::SMULO: return "smulo"; 5624 case ISD::UMULO: return "umulo"; 5625 case ISD::SUBC: return "subc"; 5626 case ISD::SUBE: return "sube"; 5627 case ISD::SHL_PARTS: return "shl_parts"; 5628 case ISD::SRA_PARTS: return "sra_parts"; 5629 case ISD::SRL_PARTS: return "srl_parts"; 5630 5631 // Conversion operators. 5632 case ISD::SIGN_EXTEND: return "sign_extend"; 5633 case ISD::ZERO_EXTEND: return "zero_extend"; 5634 case ISD::ANY_EXTEND: return "any_extend"; 5635 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5636 case ISD::TRUNCATE: return "truncate"; 5637 case ISD::FP_ROUND: return "fp_round"; 5638 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5639 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5640 case ISD::FP_EXTEND: return "fp_extend"; 5641 5642 case ISD::SINT_TO_FP: return "sint_to_fp"; 5643 case ISD::UINT_TO_FP: return "uint_to_fp"; 5644 case ISD::FP_TO_SINT: return "fp_to_sint"; 5645 case ISD::FP_TO_UINT: return "fp_to_uint"; 5646 case ISD::BIT_CONVERT: return "bit_convert"; 5647 5648 case ISD::CONVERT_RNDSAT: { 5649 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5650 default: llvm_unreachable("Unknown cvt code!"); 5651 case ISD::CVT_FF: return "cvt_ff"; 5652 case ISD::CVT_FS: return "cvt_fs"; 5653 case ISD::CVT_FU: return "cvt_fu"; 5654 case ISD::CVT_SF: return "cvt_sf"; 5655 case ISD::CVT_UF: return "cvt_uf"; 5656 case ISD::CVT_SS: return "cvt_ss"; 5657 case ISD::CVT_SU: return "cvt_su"; 5658 case ISD::CVT_US: return "cvt_us"; 5659 case ISD::CVT_UU: return "cvt_uu"; 5660 } 5661 } 5662 5663 // Control flow instructions 5664 case ISD::BR: return "br"; 5665 case ISD::BRIND: return "brind"; 5666 case ISD::BR_JT: return "br_jt"; 5667 case ISD::BRCOND: return "brcond"; 5668 case ISD::BR_CC: return "br_cc"; 5669 case ISD::CALLSEQ_START: return "callseq_start"; 5670 case ISD::CALLSEQ_END: return "callseq_end"; 5671 5672 // Other operators 5673 case ISD::LOAD: return "load"; 5674 case ISD::STORE: return "store"; 5675 case ISD::VAARG: return "vaarg"; 5676 case ISD::VACOPY: return "vacopy"; 5677 case ISD::VAEND: return "vaend"; 5678 case ISD::VASTART: return "vastart"; 5679 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5680 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5681 case ISD::BUILD_PAIR: return "build_pair"; 5682 case ISD::STACKSAVE: return "stacksave"; 5683 case ISD::STACKRESTORE: return "stackrestore"; 5684 case ISD::TRAP: return "trap"; 5685 5686 // Bit manipulation 5687 case ISD::BSWAP: return "bswap"; 5688 case ISD::CTPOP: return "ctpop"; 5689 case ISD::CTTZ: return "cttz"; 5690 case ISD::CTLZ: return "ctlz"; 5691 5692 // Trampolines 5693 case ISD::TRAMPOLINE: return "trampoline"; 5694 5695 case ISD::CONDCODE: 5696 switch (cast<CondCodeSDNode>(this)->get()) { 5697 default: llvm_unreachable("Unknown setcc condition!"); 5698 case ISD::SETOEQ: return "setoeq"; 5699 case ISD::SETOGT: return "setogt"; 5700 case ISD::SETOGE: return "setoge"; 5701 case ISD::SETOLT: return "setolt"; 5702 case ISD::SETOLE: return "setole"; 5703 case ISD::SETONE: return "setone"; 5704 5705 case ISD::SETO: return "seto"; 5706 case ISD::SETUO: return "setuo"; 5707 case ISD::SETUEQ: return "setue"; 5708 case ISD::SETUGT: return "setugt"; 5709 case ISD::SETUGE: return "setuge"; 5710 case ISD::SETULT: return "setult"; 5711 case ISD::SETULE: return "setule"; 5712 case ISD::SETUNE: return "setune"; 5713 5714 case ISD::SETEQ: return "seteq"; 5715 case ISD::SETGT: return "setgt"; 5716 case ISD::SETGE: return "setge"; 5717 case ISD::SETLT: return "setlt"; 5718 case ISD::SETLE: return "setle"; 5719 case ISD::SETNE: return "setne"; 5720 } 5721 } 5722} 5723 5724const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5725 switch (AM) { 5726 default: 5727 return ""; 5728 case ISD::PRE_INC: 5729 return "<pre-inc>"; 5730 case ISD::PRE_DEC: 5731 return "<pre-dec>"; 5732 case ISD::POST_INC: 5733 return "<post-inc>"; 5734 case ISD::POST_DEC: 5735 return "<post-dec>"; 5736 } 5737} 5738 5739std::string ISD::ArgFlagsTy::getArgFlagsString() { 5740 std::string S = "< "; 5741 5742 if (isZExt()) 5743 S += "zext "; 5744 if (isSExt()) 5745 S += "sext "; 5746 if (isInReg()) 5747 S += "inreg "; 5748 if (isSRet()) 5749 S += "sret "; 5750 if (isByVal()) 5751 S += "byval "; 5752 if (isNest()) 5753 S += "nest "; 5754 if (getByValAlign()) 5755 S += "byval-align:" + utostr(getByValAlign()) + " "; 5756 if (getOrigAlign()) 5757 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5758 if (getByValSize()) 5759 S += "byval-size:" + utostr(getByValSize()) + " "; 5760 return S + ">"; 5761} 5762 5763void SDNode::dump() const { dump(0); } 5764void SDNode::dump(const SelectionDAG *G) const { 5765 print(dbgs(), G); 5766} 5767 5768void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5769 OS << (void*)this << ": "; 5770 5771 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5772 if (i) OS << ","; 5773 if (getValueType(i) == MVT::Other) 5774 OS << "ch"; 5775 else 5776 OS << getValueType(i).getEVTString(); 5777 } 5778 OS << " = " << getOperationName(G); 5779} 5780 5781void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5782 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5783 if (!MN->memoperands_empty()) { 5784 OS << "<"; 5785 OS << "Mem:"; 5786 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5787 e = MN->memoperands_end(); i != e; ++i) { 5788 OS << **i; 5789 if (next(i) != e) 5790 OS << " "; 5791 } 5792 OS << ">"; 5793 } 5794 } else if (const ShuffleVectorSDNode *SVN = 5795 dyn_cast<ShuffleVectorSDNode>(this)) { 5796 OS << "<"; 5797 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5798 int Idx = SVN->getMaskElt(i); 5799 if (i) OS << ","; 5800 if (Idx < 0) 5801 OS << "u"; 5802 else 5803 OS << Idx; 5804 } 5805 OS << ">"; 5806 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5807 OS << '<' << CSDN->getAPIntValue() << '>'; 5808 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5809 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5810 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5811 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5812 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5813 else { 5814 OS << "<APFloat("; 5815 CSDN->getValueAPF().bitcastToAPInt().dump(); 5816 OS << ")>"; 5817 } 5818 } else if (const GlobalAddressSDNode *GADN = 5819 dyn_cast<GlobalAddressSDNode>(this)) { 5820 int64_t offset = GADN->getOffset(); 5821 OS << '<'; 5822 WriteAsOperand(OS, GADN->getGlobal()); 5823 OS << '>'; 5824 if (offset > 0) 5825 OS << " + " << offset; 5826 else 5827 OS << " " << offset; 5828 if (unsigned int TF = GADN->getTargetFlags()) 5829 OS << " [TF=" << TF << ']'; 5830 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5831 OS << "<" << FIDN->getIndex() << ">"; 5832 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5833 OS << "<" << JTDN->getIndex() << ">"; 5834 if (unsigned int TF = JTDN->getTargetFlags()) 5835 OS << " [TF=" << TF << ']'; 5836 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5837 int offset = CP->getOffset(); 5838 if (CP->isMachineConstantPoolEntry()) 5839 OS << "<" << *CP->getMachineCPVal() << ">"; 5840 else 5841 OS << "<" << *CP->getConstVal() << ">"; 5842 if (offset > 0) 5843 OS << " + " << offset; 5844 else 5845 OS << " " << offset; 5846 if (unsigned int TF = CP->getTargetFlags()) 5847 OS << " [TF=" << TF << ']'; 5848 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5849 OS << "<"; 5850 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5851 if (LBB) 5852 OS << LBB->getName() << " "; 5853 OS << (const void*)BBDN->getBasicBlock() << ">"; 5854 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5855 if (G && R->getReg() && 5856 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5857 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5858 } else { 5859 OS << " %reg" << R->getReg(); 5860 } 5861 } else if (const ExternalSymbolSDNode *ES = 5862 dyn_cast<ExternalSymbolSDNode>(this)) { 5863 OS << "'" << ES->getSymbol() << "'"; 5864 if (unsigned int TF = ES->getTargetFlags()) 5865 OS << " [TF=" << TF << ']'; 5866 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5867 if (M->getValue()) 5868 OS << "<" << M->getValue() << ">"; 5869 else 5870 OS << "<null>"; 5871 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5872 OS << ":" << N->getVT().getEVTString(); 5873 } 5874 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5875 OS << "<" << *LD->getMemOperand(); 5876 5877 bool doExt = true; 5878 switch (LD->getExtensionType()) { 5879 default: doExt = false; break; 5880 case ISD::EXTLOAD: OS << ", anyext"; break; 5881 case ISD::SEXTLOAD: OS << ", sext"; break; 5882 case ISD::ZEXTLOAD: OS << ", zext"; break; 5883 } 5884 if (doExt) 5885 OS << " from " << LD->getMemoryVT().getEVTString(); 5886 5887 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5888 if (*AM) 5889 OS << ", " << AM; 5890 5891 OS << ">"; 5892 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5893 OS << "<" << *ST->getMemOperand(); 5894 5895 if (ST->isTruncatingStore()) 5896 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5897 5898 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5899 if (*AM) 5900 OS << ", " << AM; 5901 5902 OS << ">"; 5903 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5904 OS << "<" << *M->getMemOperand() << ">"; 5905 } else if (const BlockAddressSDNode *BA = 5906 dyn_cast<BlockAddressSDNode>(this)) { 5907 OS << "<"; 5908 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5909 OS << ", "; 5910 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 5911 OS << ">"; 5912 if (unsigned int TF = BA->getTargetFlags()) 5913 OS << " [TF=" << TF << ']'; 5914 } 5915 5916 if (G) 5917 if (unsigned Order = G->GetOrdering(this)) 5918 OS << " [ORD=" << Order << ']'; 5919} 5920 5921void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5922 print_types(OS, G); 5923 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5924 if (i) OS << ", "; else OS << " "; 5925 OS << (void*)getOperand(i).getNode(); 5926 if (unsigned RN = getOperand(i).getResNo()) 5927 OS << ":" << RN; 5928 } 5929 print_details(OS, G); 5930} 5931 5932static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 5933 const SelectionDAG *G, unsigned depth, 5934 unsigned indent) 5935{ 5936 if (depth == 0) 5937 return; 5938 5939 OS.indent(indent); 5940 5941 N->print(OS, G); 5942 5943 if (depth < 1) 5944 return; 5945 5946 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5947 OS << '\n'; 5948 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 5949 } 5950} 5951 5952void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 5953 unsigned depth) const { 5954 printrWithDepthHelper(OS, this, G, depth, 0); 5955} 5956 5957void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 5958 // Don't print impossibly deep things. 5959 printrWithDepth(OS, G, 100); 5960} 5961 5962void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 5963 printrWithDepth(dbgs(), G, depth); 5964} 5965 5966void SDNode::dumprFull(const SelectionDAG *G) const { 5967 // Don't print impossibly deep things. 5968 dumprWithDepth(G, 100); 5969} 5970 5971static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5972 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5973 if (N->getOperand(i).getNode()->hasOneUse()) 5974 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5975 else 5976 dbgs() << "\n" << std::string(indent+2, ' ') 5977 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5978 5979 5980 dbgs() << "\n"; 5981 dbgs().indent(indent); 5982 N->dump(G); 5983} 5984 5985SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 5986 assert(N->getNumValues() == 1 && 5987 "Can't unroll a vector with multiple results!"); 5988 5989 EVT VT = N->getValueType(0); 5990 unsigned NE = VT.getVectorNumElements(); 5991 EVT EltVT = VT.getVectorElementType(); 5992 DebugLoc dl = N->getDebugLoc(); 5993 5994 SmallVector<SDValue, 8> Scalars; 5995 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 5996 5997 // If ResNE is 0, fully unroll the vector op. 5998 if (ResNE == 0) 5999 ResNE = NE; 6000 else if (NE > ResNE) 6001 NE = ResNE; 6002 6003 unsigned i; 6004 for (i= 0; i != NE; ++i) { 6005 for (unsigned j = 0; j != N->getNumOperands(); ++j) { 6006 SDValue Operand = N->getOperand(j); 6007 EVT OperandVT = Operand.getValueType(); 6008 if (OperandVT.isVector()) { 6009 // A vector operand; extract a single element. 6010 EVT OperandEltVT = OperandVT.getVectorElementType(); 6011 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6012 OperandEltVT, 6013 Operand, 6014 getConstant(i, MVT::i32)); 6015 } else { 6016 // A scalar operand; just use it as is. 6017 Operands[j] = Operand; 6018 } 6019 } 6020 6021 switch (N->getOpcode()) { 6022 default: 6023 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6024 &Operands[0], Operands.size())); 6025 break; 6026 case ISD::SHL: 6027 case ISD::SRA: 6028 case ISD::SRL: 6029 case ISD::ROTL: 6030 case ISD::ROTR: 6031 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6032 getShiftAmountOperand(Operands[1]))); 6033 break; 6034 case ISD::SIGN_EXTEND_INREG: 6035 case ISD::FP_ROUND_INREG: { 6036 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6037 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6038 Operands[0], 6039 getValueType(ExtVT))); 6040 } 6041 } 6042 } 6043 6044 for (; i < ResNE; ++i) 6045 Scalars.push_back(getUNDEF(EltVT)); 6046 6047 return getNode(ISD::BUILD_VECTOR, dl, 6048 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6049 &Scalars[0], Scalars.size()); 6050} 6051 6052 6053/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6054/// location that is 'Dist' units away from the location that the 'Base' load 6055/// is loading from. 6056bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6057 unsigned Bytes, int Dist) const { 6058 if (LD->getChain() != Base->getChain()) 6059 return false; 6060 EVT VT = LD->getValueType(0); 6061 if (VT.getSizeInBits() / 8 != Bytes) 6062 return false; 6063 6064 SDValue Loc = LD->getOperand(1); 6065 SDValue BaseLoc = Base->getOperand(1); 6066 if (Loc.getOpcode() == ISD::FrameIndex) { 6067 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6068 return false; 6069 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6070 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6071 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6072 int FS = MFI->getObjectSize(FI); 6073 int BFS = MFI->getObjectSize(BFI); 6074 if (FS != BFS || FS != (int)Bytes) return false; 6075 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6076 } 6077 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6078 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6079 if (V && (V->getSExtValue() == Dist*Bytes)) 6080 return true; 6081 } 6082 6083 GlobalValue *GV1 = NULL; 6084 GlobalValue *GV2 = NULL; 6085 int64_t Offset1 = 0; 6086 int64_t Offset2 = 0; 6087 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6088 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6089 if (isGA1 && isGA2 && GV1 == GV2) 6090 return Offset1 == (Offset2 + Dist*Bytes); 6091 return false; 6092} 6093 6094 6095/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6096/// it cannot be inferred. 6097unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6098 // If this is a GlobalAddress + cst, return the alignment. 6099 GlobalValue *GV; 6100 int64_t GVOffset = 0; 6101 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) 6102 return MinAlign(GV->getAlignment(), GVOffset); 6103 6104 // If this is a direct reference to a stack slot, use information about the 6105 // stack slot's alignment. 6106 int FrameIdx = 1 << 31; 6107 int64_t FrameOffset = 0; 6108 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6109 FrameIdx = FI->getIndex(); 6110 } else if (Ptr.getOpcode() == ISD::ADD && 6111 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6112 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6113 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6114 FrameOffset = Ptr.getConstantOperandVal(1); 6115 } 6116 6117 if (FrameIdx != (1 << 31)) { 6118 // FIXME: Handle FI+CST. 6119 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6120 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6121 FrameOffset); 6122 if (MFI.isFixedObjectIndex(FrameIdx)) { 6123 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6124 6125 // The alignment of the frame index can be determined from its offset from 6126 // the incoming frame position. If the frame object is at offset 32 and 6127 // the stack is guaranteed to be 16-byte aligned, then we know that the 6128 // object is 16-byte aligned. 6129 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6130 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6131 6132 // Finally, the frame object itself may have a known alignment. Factor 6133 // the alignment + offset into a new alignment. For example, if we know 6134 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6135 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6136 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6137 return std::max(Align, FIInfoAlign); 6138 } 6139 return FIInfoAlign; 6140 } 6141 6142 return 0; 6143} 6144 6145void SelectionDAG::dump() const { 6146 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6147 6148 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6149 I != E; ++I) { 6150 const SDNode *N = I; 6151 if (!N->hasOneUse() && N != getRoot().getNode()) 6152 DumpNodes(N, 2, this); 6153 } 6154 6155 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6156 6157 dbgs() << "\n\n"; 6158} 6159 6160void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6161 print_types(OS, G); 6162 print_details(OS, G); 6163} 6164 6165typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6166static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6167 const SelectionDAG *G, VisitedSDNodeSet &once) { 6168 if (!once.insert(N)) // If we've been here before, return now. 6169 return; 6170 6171 // Dump the current SDNode, but don't end the line yet. 6172 OS << std::string(indent, ' '); 6173 N->printr(OS, G); 6174 6175 // Having printed this SDNode, walk the children: 6176 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6177 const SDNode *child = N->getOperand(i).getNode(); 6178 6179 if (i) OS << ","; 6180 OS << " "; 6181 6182 if (child->getNumOperands() == 0) { 6183 // This child has no grandchildren; print it inline right here. 6184 child->printr(OS, G); 6185 once.insert(child); 6186 } else { // Just the address. FIXME: also print the child's opcode. 6187 OS << (void*)child; 6188 if (unsigned RN = N->getOperand(i).getResNo()) 6189 OS << ":" << RN; 6190 } 6191 } 6192 6193 OS << "\n"; 6194 6195 // Dump children that have grandchildren on their own line(s). 6196 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6197 const SDNode *child = N->getOperand(i).getNode(); 6198 DumpNodesr(OS, child, indent+2, G, once); 6199 } 6200} 6201 6202void SDNode::dumpr() const { 6203 VisitedSDNodeSet once; 6204 DumpNodesr(dbgs(), this, 0, 0, once); 6205} 6206 6207void SDNode::dumpr(const SelectionDAG *G) const { 6208 VisitedSDNodeSet once; 6209 DumpNodesr(dbgs(), this, 0, G, once); 6210} 6211 6212 6213// getAddressSpace - Return the address space this GlobalAddress belongs to. 6214unsigned GlobalAddressSDNode::getAddressSpace() const { 6215 return getGlobal()->getType()->getAddressSpace(); 6216} 6217 6218 6219const Type *ConstantPoolSDNode::getType() const { 6220 if (isMachineConstantPoolEntry()) 6221 return Val.MachineCPVal->getType(); 6222 return Val.ConstVal->getType(); 6223} 6224 6225bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6226 APInt &SplatUndef, 6227 unsigned &SplatBitSize, 6228 bool &HasAnyUndefs, 6229 unsigned MinSplatBits, 6230 bool isBigEndian) { 6231 EVT VT = getValueType(0); 6232 assert(VT.isVector() && "Expected a vector type"); 6233 unsigned sz = VT.getSizeInBits(); 6234 if (MinSplatBits > sz) 6235 return false; 6236 6237 SplatValue = APInt(sz, 0); 6238 SplatUndef = APInt(sz, 0); 6239 6240 // Get the bits. Bits with undefined values (when the corresponding element 6241 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6242 // in SplatValue. If any of the values are not constant, give up and return 6243 // false. 6244 unsigned int nOps = getNumOperands(); 6245 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6246 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6247 6248 for (unsigned j = 0; j < nOps; ++j) { 6249 unsigned i = isBigEndian ? nOps-1-j : j; 6250 SDValue OpVal = getOperand(i); 6251 unsigned BitPos = j * EltBitSize; 6252 6253 if (OpVal.getOpcode() == ISD::UNDEF) 6254 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6255 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6256 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6257 zextOrTrunc(sz) << BitPos); 6258 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6259 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6260 else 6261 return false; 6262 } 6263 6264 // The build_vector is all constants or undefs. Find the smallest element 6265 // size that splats the vector. 6266 6267 HasAnyUndefs = (SplatUndef != 0); 6268 while (sz > 8) { 6269 6270 unsigned HalfSize = sz / 2; 6271 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6272 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6273 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6274 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6275 6276 // If the two halves do not match (ignoring undef bits), stop here. 6277 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6278 MinSplatBits > HalfSize) 6279 break; 6280 6281 SplatValue = HighValue | LowValue; 6282 SplatUndef = HighUndef & LowUndef; 6283 6284 sz = HalfSize; 6285 } 6286 6287 SplatBitSize = sz; 6288 return true; 6289} 6290 6291bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6292 // Find the first non-undef value in the shuffle mask. 6293 unsigned i, e; 6294 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6295 /* search */; 6296 6297 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6298 6299 // Make sure all remaining elements are either undef or the same as the first 6300 // non-undef value. 6301 for (int Idx = Mask[i]; i != e; ++i) 6302 if (Mask[i] >= 0 && Mask[i] != Idx) 6303 return false; 6304 return true; 6305} 6306 6307static void checkForCyclesHelper(const SDNode *N, 6308 std::set<const SDNode *> &visited) { 6309 if (visited.find(N) != visited.end()) { 6310 dbgs() << "Offending node:\n"; 6311 N->dumprFull(); 6312 assert(0 && "Detected cycle in SelectionDAG"); 6313 } 6314 6315 std::set<const SDNode*>::iterator i; 6316 bool inserted; 6317 6318 tie(i, inserted) = visited.insert(N); 6319 assert(inserted && "Missed cycle"); 6320 6321 for(unsigned i = 0; i < N->getNumOperands(); ++i) { 6322 checkForCyclesHelper(N->getOperand(i).getNode(), visited); 6323 } 6324 visited.erase(i); 6325} 6326 6327void llvm::checkForCycles(const llvm::SDNode *N) { 6328#ifdef XDEBUG 6329 assert(N && "Checking nonexistant SDNode"); 6330 std::set<const SDNode *> visited; 6331 checkForCyclesHelper(N, visited); 6332#endif 6333} 6334 6335void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6336 checkForCycles(DAG->getRoot().getNode()); 6337} 6338