SelectionDAG.cpp revision 28873106309db515d58889a4c4fa3e0a92d1b60e
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/GlobalAlias.h" 16#include "llvm/GlobalVariable.h" 17#include "llvm/Intrinsics.h" 18#include "llvm/DerivedTypes.h" 19#include "llvm/Assembly/Writer.h" 20#include "llvm/CallingConv.h" 21#include "llvm/CodeGen/MachineBasicBlock.h" 22#include "llvm/CodeGen/MachineConstantPool.h" 23#include "llvm/CodeGen/MachineFrameInfo.h" 24#include "llvm/CodeGen/MachineModuleInfo.h" 25#include "llvm/CodeGen/PseudoSourceValue.h" 26#include "llvm/Support/MathExtras.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetInstrInfo.h" 31#include "llvm/Target/TargetMachine.h" 32#include "llvm/ADT/SetVector.h" 33#include "llvm/ADT/SmallPtrSet.h" 34#include "llvm/ADT/SmallSet.h" 35#include "llvm/ADT/SmallVector.h" 36#include "llvm/ADT/StringExtras.h" 37#include <algorithm> 38#include <cmath> 39using namespace llvm; 40 41/// makeVTList - Return an instance of the SDVTList struct initialized with the 42/// specified members. 43static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 44 SDVTList Res = {VTs, NumVTs}; 45 return Res; 46} 47 48static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 49 switch (VT.getSimpleVT()) { 50 default: assert(0 && "Unknown FP format"); 51 case MVT::f32: return &APFloat::IEEEsingle; 52 case MVT::f64: return &APFloat::IEEEdouble; 53 case MVT::f80: return &APFloat::x87DoubleExtended; 54 case MVT::f128: return &APFloat::IEEEquad; 55 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 56 } 57} 58 59SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 60 61//===----------------------------------------------------------------------===// 62// ConstantFPSDNode Class 63//===----------------------------------------------------------------------===// 64 65/// isExactlyValue - We don't rely on operator== working on double values, as 66/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 67/// As such, this method can be used to do an exact bit-for-bit comparison of 68/// two floating point values. 69bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 70 return Value.bitwiseIsEqual(V); 71} 72 73bool ConstantFPSDNode::isValueValidForType(MVT VT, 74 const APFloat& Val) { 75 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 76 77 // PPC long double cannot be converted to any other type. 78 if (VT == MVT::ppcf128 || 79 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 80 return false; 81 82 // convert modifies in place, so make a copy. 83 APFloat Val2 = APFloat(Val); 84 return Val2.convert(*MVTToAPFloatSemantics(VT), 85 APFloat::rmNearestTiesToEven) == APFloat::opOK; 86} 87 88//===----------------------------------------------------------------------===// 89// ISD Namespace 90//===----------------------------------------------------------------------===// 91 92/// isBuildVectorAllOnes - Return true if the specified node is a 93/// BUILD_VECTOR where all of the elements are ~0 or undef. 94bool ISD::isBuildVectorAllOnes(const SDNode *N) { 95 // Look through a bit convert. 96 if (N->getOpcode() == ISD::BIT_CONVERT) 97 N = N->getOperand(0).Val; 98 99 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 100 101 unsigned i = 0, e = N->getNumOperands(); 102 103 // Skip over all of the undef values. 104 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 105 ++i; 106 107 // Do not accept an all-undef vector. 108 if (i == e) return false; 109 110 // Do not accept build_vectors that aren't all constants or which have non-~0 111 // elements. 112 SDOperand NotZero = N->getOperand(i); 113 if (isa<ConstantSDNode>(NotZero)) { 114 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 115 return false; 116 } else if (isa<ConstantFPSDNode>(NotZero)) { 117 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 118 convertToAPInt().isAllOnesValue()) 119 return false; 120 } else 121 return false; 122 123 // Okay, we have at least one ~0 value, check to see if the rest match or are 124 // undefs. 125 for (++i; i != e; ++i) 126 if (N->getOperand(i) != NotZero && 127 N->getOperand(i).getOpcode() != ISD::UNDEF) 128 return false; 129 return true; 130} 131 132 133/// isBuildVectorAllZeros - Return true if the specified node is a 134/// BUILD_VECTOR where all of the elements are 0 or undef. 135bool ISD::isBuildVectorAllZeros(const SDNode *N) { 136 // Look through a bit convert. 137 if (N->getOpcode() == ISD::BIT_CONVERT) 138 N = N->getOperand(0).Val; 139 140 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 141 142 unsigned i = 0, e = N->getNumOperands(); 143 144 // Skip over all of the undef values. 145 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 146 ++i; 147 148 // Do not accept an all-undef vector. 149 if (i == e) return false; 150 151 // Do not accept build_vectors that aren't all constants or which have non-~0 152 // elements. 153 SDOperand Zero = N->getOperand(i); 154 if (isa<ConstantSDNode>(Zero)) { 155 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 156 return false; 157 } else if (isa<ConstantFPSDNode>(Zero)) { 158 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 159 return false; 160 } else 161 return false; 162 163 // Okay, we have at least one ~0 value, check to see if the rest match or are 164 // undefs. 165 for (++i; i != e; ++i) 166 if (N->getOperand(i) != Zero && 167 N->getOperand(i).getOpcode() != ISD::UNDEF) 168 return false; 169 return true; 170} 171 172/// isScalarToVector - Return true if the specified node is a 173/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 174/// element is not an undef. 175bool ISD::isScalarToVector(const SDNode *N) { 176 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 177 return true; 178 179 if (N->getOpcode() != ISD::BUILD_VECTOR) 180 return false; 181 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 182 return false; 183 unsigned NumElems = N->getNumOperands(); 184 for (unsigned i = 1; i < NumElems; ++i) { 185 SDOperand V = N->getOperand(i); 186 if (V.getOpcode() != ISD::UNDEF) 187 return false; 188 } 189 return true; 190} 191 192 193/// isDebugLabel - Return true if the specified node represents a debug 194/// label (i.e. ISD::LABEL or TargetInstrInfo::LABEL node and third operand 195/// is 0). 196bool ISD::isDebugLabel(const SDNode *N) { 197 SDOperand Zero; 198 if (N->getOpcode() == ISD::LABEL) 199 Zero = N->getOperand(2); 200 else if (N->isTargetOpcode() && 201 N->getTargetOpcode() == TargetInstrInfo::LABEL) 202 // Chain moved to last operand. 203 Zero = N->getOperand(1); 204 else 205 return false; 206 return isa<ConstantSDNode>(Zero) && cast<ConstantSDNode>(Zero)->isNullValue(); 207} 208 209/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 210/// when given the operation for (X op Y). 211ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 212 // To perform this operation, we just need to swap the L and G bits of the 213 // operation. 214 unsigned OldL = (Operation >> 2) & 1; 215 unsigned OldG = (Operation >> 1) & 1; 216 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 217 (OldL << 1) | // New G bit 218 (OldG << 2)); // New L bit. 219} 220 221/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 222/// 'op' is a valid SetCC operation. 223ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 224 unsigned Operation = Op; 225 if (isInteger) 226 Operation ^= 7; // Flip L, G, E bits, but not U. 227 else 228 Operation ^= 15; // Flip all of the condition bits. 229 if (Operation > ISD::SETTRUE2) 230 Operation &= ~8; // Don't let N and U bits get set. 231 return ISD::CondCode(Operation); 232} 233 234 235/// isSignedOp - For an integer comparison, return 1 if the comparison is a 236/// signed operation and 2 if the result is an unsigned comparison. Return zero 237/// if the operation does not depend on the sign of the input (setne and seteq). 238static int isSignedOp(ISD::CondCode Opcode) { 239 switch (Opcode) { 240 default: assert(0 && "Illegal integer setcc operation!"); 241 case ISD::SETEQ: 242 case ISD::SETNE: return 0; 243 case ISD::SETLT: 244 case ISD::SETLE: 245 case ISD::SETGT: 246 case ISD::SETGE: return 1; 247 case ISD::SETULT: 248 case ISD::SETULE: 249 case ISD::SETUGT: 250 case ISD::SETUGE: return 2; 251 } 252} 253 254/// getSetCCOrOperation - Return the result of a logical OR between different 255/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 256/// returns SETCC_INVALID if it is not possible to represent the resultant 257/// comparison. 258ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 259 bool isInteger) { 260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 261 // Cannot fold a signed integer setcc with an unsigned integer setcc. 262 return ISD::SETCC_INVALID; 263 264 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 265 266 // If the N and U bits get set then the resultant comparison DOES suddenly 267 // care about orderedness, and is true when ordered. 268 if (Op > ISD::SETTRUE2) 269 Op &= ~16; // Clear the U bit if the N bit is set. 270 271 // Canonicalize illegal integer setcc's. 272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 273 Op = ISD::SETNE; 274 275 return ISD::CondCode(Op); 276} 277 278/// getSetCCAndOperation - Return the result of a logical AND between different 279/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 280/// function returns zero if it is not possible to represent the resultant 281/// comparison. 282ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 283 bool isInteger) { 284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 285 // Cannot fold a signed setcc with an unsigned setcc. 286 return ISD::SETCC_INVALID; 287 288 // Combine all of the condition bits. 289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 290 291 // Canonicalize illegal integer setcc's. 292 if (isInteger) { 293 switch (Result) { 294 default: break; 295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 296 case ISD::SETOEQ: // SETEQ & SETU[LG]E 297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 300 } 301 } 302 303 return Result; 304} 305 306const TargetMachine &SelectionDAG::getTarget() const { 307 return TLI.getTargetMachine(); 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 SDOperandPtr Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->Val); 332 ID.AddInteger(Ops->ResNo); 333 } 334} 335 336static void AddNodeIDNode(FoldingSetNodeID &ID, 337 unsigned short OpC, SDVTList VTList, 338 SDOperandPtr OpList, unsigned N) { 339 AddNodeIDOpcode(ID, OpC); 340 AddNodeIDValueTypes(ID, VTList); 341 AddNodeIDOperands(ID, OpList, N); 342} 343 344 345/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 346/// data. 347static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) { 348 AddNodeIDOpcode(ID, N->getOpcode()); 349 // Add the return value info. 350 AddNodeIDValueTypes(ID, N->getVTList()); 351 // Add the operand info. 352 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 353 354 // Handle SDNode leafs with special info. 355 switch (N->getOpcode()) { 356 default: break; // Normal nodes don't need extra info. 357 case ISD::ARG_FLAGS: 358 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 359 break; 360 case ISD::TargetConstant: 361 case ISD::Constant: 362 ID.Add(cast<ConstantSDNode>(N)->getAPIntValue()); 363 break; 364 case ISD::TargetConstantFP: 365 case ISD::ConstantFP: { 366 ID.Add(cast<ConstantFPSDNode>(N)->getValueAPF()); 367 break; 368 } 369 case ISD::TargetGlobalAddress: 370 case ISD::GlobalAddress: 371 case ISD::TargetGlobalTLSAddress: 372 case ISD::GlobalTLSAddress: { 373 GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 374 ID.AddPointer(GA->getGlobal()); 375 ID.AddInteger(GA->getOffset()); 376 break; 377 } 378 case ISD::BasicBlock: 379 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 380 break; 381 case ISD::Register: 382 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 383 break; 384 case ISD::SRCVALUE: 385 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 386 break; 387 case ISD::MEMOPERAND: { 388 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 389 ID.AddPointer(MO.getValue()); 390 ID.AddInteger(MO.getFlags()); 391 ID.AddInteger(MO.getOffset()); 392 ID.AddInteger(MO.getSize()); 393 ID.AddInteger(MO.getAlignment()); 394 break; 395 } 396 case ISD::FrameIndex: 397 case ISD::TargetFrameIndex: 398 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 399 break; 400 case ISD::JumpTable: 401 case ISD::TargetJumpTable: 402 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 403 break; 404 case ISD::ConstantPool: 405 case ISD::TargetConstantPool: { 406 ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 407 ID.AddInteger(CP->getAlignment()); 408 ID.AddInteger(CP->getOffset()); 409 if (CP->isMachineConstantPoolEntry()) 410 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 411 else 412 ID.AddPointer(CP->getConstVal()); 413 break; 414 } 415 case ISD::LOAD: { 416 LoadSDNode *LD = cast<LoadSDNode>(N); 417 ID.AddInteger(LD->getAddressingMode()); 418 ID.AddInteger(LD->getExtensionType()); 419 ID.AddInteger(LD->getMemoryVT().getRawBits()); 420 ID.AddInteger(LD->getAlignment()); 421 ID.AddInteger(LD->isVolatile()); 422 break; 423 } 424 case ISD::STORE: { 425 StoreSDNode *ST = cast<StoreSDNode>(N); 426 ID.AddInteger(ST->getAddressingMode()); 427 ID.AddInteger(ST->isTruncatingStore()); 428 ID.AddInteger(ST->getMemoryVT().getRawBits()); 429 ID.AddInteger(ST->getAlignment()); 430 ID.AddInteger(ST->isVolatile()); 431 break; 432 } 433 case ISD::ATOMIC_CMP_SWAP: 434 case ISD::ATOMIC_LOAD_ADD: 435 case ISD::ATOMIC_SWAP: 436 case ISD::ATOMIC_LOAD_SUB: 437 case ISD::ATOMIC_LOAD_AND: 438 case ISD::ATOMIC_LOAD_OR: 439 case ISD::ATOMIC_LOAD_XOR: 440 case ISD::ATOMIC_LOAD_NAND: 441 case ISD::ATOMIC_LOAD_MIN: 442 case ISD::ATOMIC_LOAD_MAX: 443 case ISD::ATOMIC_LOAD_UMIN: 444 case ISD::ATOMIC_LOAD_UMAX: { 445 AtomicSDNode *AT = cast<AtomicSDNode>(N); 446 ID.AddInteger(AT->getAlignment()); 447 ID.AddInteger(AT->isVolatile()); 448 break; 449 } 450 } // end switch (N->getOpcode()) 451} 452 453//===----------------------------------------------------------------------===// 454// SelectionDAG Class 455//===----------------------------------------------------------------------===// 456 457/// RemoveDeadNodes - This method deletes all unreachable nodes in the 458/// SelectionDAG. 459void SelectionDAG::RemoveDeadNodes() { 460 // Create a dummy node (which is not added to allnodes), that adds a reference 461 // to the root node, preventing it from being deleted. 462 HandleSDNode Dummy(getRoot()); 463 464 SmallVector<SDNode*, 128> DeadNodes; 465 466 // Add all obviously-dead nodes to the DeadNodes worklist. 467 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 468 if (I->use_empty()) 469 DeadNodes.push_back(I); 470 471 // Process the worklist, deleting the nodes and adding their uses to the 472 // worklist. 473 while (!DeadNodes.empty()) { 474 SDNode *N = DeadNodes.back(); 475 DeadNodes.pop_back(); 476 477 // Take the node out of the appropriate CSE map. 478 RemoveNodeFromCSEMaps(N); 479 480 // Next, brutally remove the operand list. This is safe to do, as there are 481 // no cycles in the graph. 482 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 483 SDNode *Operand = I->getVal(); 484 Operand->removeUser(std::distance(N->op_begin(), I), N); 485 486 // Now that we removed this operand, see if there are no uses of it left. 487 if (Operand->use_empty()) 488 DeadNodes.push_back(Operand); 489 } 490 if (N->OperandsNeedDelete) { 491 delete[] N->OperandList; 492 } 493 N->OperandList = 0; 494 N->NumOperands = 0; 495 496 // Finally, remove N itself. 497 AllNodes.erase(N); 498 } 499 500 // If the root changed (e.g. it was a dead load, update the root). 501 setRoot(Dummy.getValue()); 502} 503 504void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 505 SmallVector<SDNode*, 16> DeadNodes; 506 DeadNodes.push_back(N); 507 508 // Process the worklist, deleting the nodes and adding their uses to the 509 // worklist. 510 while (!DeadNodes.empty()) { 511 SDNode *N = DeadNodes.back(); 512 DeadNodes.pop_back(); 513 514 if (UpdateListener) 515 UpdateListener->NodeDeleted(N, 0); 516 517 // Take the node out of the appropriate CSE map. 518 RemoveNodeFromCSEMaps(N); 519 520 // Next, brutally remove the operand list. This is safe to do, as there are 521 // no cycles in the graph. 522 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 523 SDNode *Operand = I->getVal(); 524 Operand->removeUser(std::distance(N->op_begin(), I), N); 525 526 // Now that we removed this operand, see if there are no uses of it left. 527 if (Operand->use_empty()) 528 DeadNodes.push_back(Operand); 529 } 530 if (N->OperandsNeedDelete) { 531 delete[] N->OperandList; 532 } 533 N->OperandList = 0; 534 N->NumOperands = 0; 535 536 // Finally, remove N itself. 537 AllNodes.erase(N); 538 } 539} 540 541void SelectionDAG::DeleteNode(SDNode *N) { 542 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 543 544 // First take this out of the appropriate CSE map. 545 RemoveNodeFromCSEMaps(N); 546 547 // Finally, remove uses due to operands of this node, remove from the 548 // AllNodes list, and delete the node. 549 DeleteNodeNotInCSEMaps(N); 550} 551 552void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 553 554 // Remove it from the AllNodes list. 555 AllNodes.remove(N); 556 557 // Drop all of the operands and decrement used nodes use counts. 558 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 559 I->getVal()->removeUser(std::distance(N->op_begin(), I), N); 560 if (N->OperandsNeedDelete) { 561 delete[] N->OperandList; 562 } 563 N->OperandList = 0; 564 N->NumOperands = 0; 565 566 delete N; 567} 568 569/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 570/// correspond to it. This is useful when we're about to delete or repurpose 571/// the node. We don't want future request for structurally identical nodes 572/// to return N anymore. 573void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 574 bool Erased = false; 575 switch (N->getOpcode()) { 576 case ISD::HANDLENODE: return; // noop. 577 case ISD::STRING: 578 Erased = StringNodes.erase(cast<StringSDNode>(N)->getValue()); 579 break; 580 case ISD::CONDCODE: 581 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 582 "Cond code doesn't exist!"); 583 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 584 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 585 break; 586 case ISD::ExternalSymbol: 587 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 588 break; 589 case ISD::TargetExternalSymbol: 590 Erased = 591 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 592 break; 593 case ISD::VALUETYPE: { 594 MVT VT = cast<VTSDNode>(N)->getVT(); 595 if (VT.isExtended()) { 596 Erased = ExtendedValueTypeNodes.erase(VT); 597 } else { 598 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 599 ValueTypeNodes[VT.getSimpleVT()] = 0; 600 } 601 break; 602 } 603 default: 604 // Remove it from the CSE Map. 605 Erased = CSEMap.RemoveNode(N); 606 break; 607 } 608#ifndef NDEBUG 609 // Verify that the node was actually in one of the CSE maps, unless it has a 610 // flag result (which cannot be CSE'd) or is one of the special cases that are 611 // not subject to CSE. 612 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 613 !N->isTargetOpcode()) { 614 N->dump(this); 615 cerr << "\n"; 616 assert(0 && "Node is not in map!"); 617 } 618#endif 619} 620 621/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 622/// has been taken out and modified in some way. If the specified node already 623/// exists in the CSE maps, do not modify the maps, but return the existing node 624/// instead. If it doesn't exist, add it and return null. 625/// 626SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 627 assert(N->getNumOperands() && "This is a leaf node!"); 628 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 629 return 0; // Never add these nodes. 630 631 // Check that remaining values produced are not flags. 632 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 633 if (N->getValueType(i) == MVT::Flag) 634 return 0; // Never CSE anything that produces a flag. 635 636 SDNode *New = CSEMap.GetOrInsertNode(N); 637 if (New != N) return New; // Node already existed. 638 return 0; 639} 640 641/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 642/// were replaced with those specified. If this node is never memoized, 643/// return null, otherwise return a pointer to the slot it would take. If a 644/// node already exists with these operands, the slot will be non-null. 645SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDOperand Op, 646 void *&InsertPos) { 647 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 648 return 0; // Never add these nodes. 649 650 // Check that remaining values produced are not flags. 651 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 652 if (N->getValueType(i) == MVT::Flag) 653 return 0; // Never CSE anything that produces a flag. 654 655 SDOperand Ops[] = { Op }; 656 FoldingSetNodeID ID; 657 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 658 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 659} 660 661/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 662/// were replaced with those specified. If this node is never memoized, 663/// return null, otherwise return a pointer to the slot it would take. If a 664/// node already exists with these operands, the slot will be non-null. 665SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 666 SDOperand Op1, SDOperand Op2, 667 void *&InsertPos) { 668 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 669 return 0; // Never add these nodes. 670 671 // Check that remaining values produced are not flags. 672 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 673 if (N->getValueType(i) == MVT::Flag) 674 return 0; // Never CSE anything that produces a flag. 675 676 SDOperand Ops[] = { Op1, Op2 }; 677 FoldingSetNodeID ID; 678 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 679 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 680} 681 682 683/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 684/// were replaced with those specified. If this node is never memoized, 685/// return null, otherwise return a pointer to the slot it would take. If a 686/// node already exists with these operands, the slot will be non-null. 687SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 688 SDOperandPtr Ops,unsigned NumOps, 689 void *&InsertPos) { 690 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 691 return 0; // Never add these nodes. 692 693 // Check that remaining values produced are not flags. 694 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 695 if (N->getValueType(i) == MVT::Flag) 696 return 0; // Never CSE anything that produces a flag. 697 698 FoldingSetNodeID ID; 699 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 700 701 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { 702 ID.AddInteger(LD->getAddressingMode()); 703 ID.AddInteger(LD->getExtensionType()); 704 ID.AddInteger(LD->getMemoryVT().getRawBits()); 705 ID.AddInteger(LD->getAlignment()); 706 ID.AddInteger(LD->isVolatile()); 707 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { 708 ID.AddInteger(ST->getAddressingMode()); 709 ID.AddInteger(ST->isTruncatingStore()); 710 ID.AddInteger(ST->getMemoryVT().getRawBits()); 711 ID.AddInteger(ST->getAlignment()); 712 ID.AddInteger(ST->isVolatile()); 713 } 714 715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 716} 717 718 719SelectionDAG::~SelectionDAG() { 720 while (!AllNodes.empty()) { 721 SDNode *N = AllNodes.begin(); 722 N->SetNextInBucket(0); 723 if (N->OperandsNeedDelete) { 724 delete [] N->OperandList; 725 } 726 N->OperandList = 0; 727 N->NumOperands = 0; 728 AllNodes.pop_front(); 729 } 730} 731 732SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT VT) { 733 if (Op.getValueType() == VT) return Op; 734 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 735 VT.getSizeInBits()); 736 return getNode(ISD::AND, Op.getValueType(), Op, 737 getConstant(Imm, Op.getValueType())); 738} 739 740SDOperand SelectionDAG::getString(const std::string &Val) { 741 StringSDNode *&N = StringNodes[Val]; 742 if (!N) { 743 N = new StringSDNode(Val); 744 AllNodes.push_back(N); 745 } 746 return SDOperand(N, 0); 747} 748 749SDOperand SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 750 MVT EltVT = 751 VT.isVector() ? VT.getVectorElementType() : VT; 752 753 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 754} 755 756SDOperand SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 757 assert(VT.isInteger() && "Cannot create FP integer constant!"); 758 759 MVT EltVT = 760 VT.isVector() ? VT.getVectorElementType() : VT; 761 762 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 763 "APInt size does not match type size!"); 764 765 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 766 FoldingSetNodeID ID; 767 AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0); 768 ID.Add(Val); 769 void *IP = 0; 770 SDNode *N = NULL; 771 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 772 if (!VT.isVector()) 773 return SDOperand(N, 0); 774 if (!N) { 775 N = new ConstantSDNode(isT, Val, EltVT); 776 CSEMap.InsertNode(N, IP); 777 AllNodes.push_back(N); 778 } 779 780 SDOperand Result(N, 0); 781 if (VT.isVector()) { 782 SmallVector<SDOperand, 8> Ops; 783 Ops.assign(VT.getVectorNumElements(), Result); 784 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 785 } 786 return Result; 787} 788 789SDOperand SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 790 return getConstant(Val, TLI.getPointerTy(), isTarget); 791} 792 793 794SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 795 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 796 797 MVT EltVT = 798 VT.isVector() ? VT.getVectorElementType() : VT; 799 800 // Do the map lookup using the actual bit pattern for the floating point 801 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 802 // we don't have issues with SNANs. 803 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 804 FoldingSetNodeID ID; 805 AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0); 806 ID.Add(V); 807 void *IP = 0; 808 SDNode *N = NULL; 809 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 810 if (!VT.isVector()) 811 return SDOperand(N, 0); 812 if (!N) { 813 N = new ConstantFPSDNode(isTarget, V, EltVT); 814 CSEMap.InsertNode(N, IP); 815 AllNodes.push_back(N); 816 } 817 818 SDOperand Result(N, 0); 819 if (VT.isVector()) { 820 SmallVector<SDOperand, 8> Ops; 821 Ops.assign(VT.getVectorNumElements(), Result); 822 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 823 } 824 return Result; 825} 826 827SDOperand SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 828 MVT EltVT = 829 VT.isVector() ? VT.getVectorElementType() : VT; 830 if (EltVT==MVT::f32) 831 return getConstantFP(APFloat((float)Val), VT, isTarget); 832 else 833 return getConstantFP(APFloat(Val), VT, isTarget); 834} 835 836SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 837 MVT VT, int Offset, 838 bool isTargetGA) { 839 unsigned Opc; 840 841 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 842 if (!GVar) { 843 // If GV is an alias then use the aliasee for determining thread-localness. 844 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 845 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal()); 846 } 847 848 if (GVar && GVar->isThreadLocal()) 849 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 850 else 851 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 852 853 FoldingSetNodeID ID; 854 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 855 ID.AddPointer(GV); 856 ID.AddInteger(Offset); 857 void *IP = 0; 858 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 859 return SDOperand(E, 0); 860 SDNode *N = new GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 861 CSEMap.InsertNode(N, IP); 862 AllNodes.push_back(N); 863 return SDOperand(N, 0); 864} 865 866SDOperand SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 867 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 868 FoldingSetNodeID ID; 869 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 870 ID.AddInteger(FI); 871 void *IP = 0; 872 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 873 return SDOperand(E, 0); 874 SDNode *N = new FrameIndexSDNode(FI, VT, isTarget); 875 CSEMap.InsertNode(N, IP); 876 AllNodes.push_back(N); 877 return SDOperand(N, 0); 878} 879 880SDOperand SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 881 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 882 FoldingSetNodeID ID; 883 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 884 ID.AddInteger(JTI); 885 void *IP = 0; 886 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 887 return SDOperand(E, 0); 888 SDNode *N = new JumpTableSDNode(JTI, VT, isTarget); 889 CSEMap.InsertNode(N, IP); 890 AllNodes.push_back(N); 891 return SDOperand(N, 0); 892} 893 894SDOperand SelectionDAG::getConstantPool(Constant *C, MVT VT, 895 unsigned Alignment, int Offset, 896 bool isTarget) { 897 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 898 FoldingSetNodeID ID; 899 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 900 ID.AddInteger(Alignment); 901 ID.AddInteger(Offset); 902 ID.AddPointer(C); 903 void *IP = 0; 904 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 905 return SDOperand(E, 0); 906 SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 907 CSEMap.InsertNode(N, IP); 908 AllNodes.push_back(N); 909 return SDOperand(N, 0); 910} 911 912 913SDOperand SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 914 unsigned Alignment, int Offset, 915 bool isTarget) { 916 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 917 FoldingSetNodeID ID; 918 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 919 ID.AddInteger(Alignment); 920 ID.AddInteger(Offset); 921 C->AddSelectionDAGCSEId(ID); 922 void *IP = 0; 923 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 924 return SDOperand(E, 0); 925 SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 926 CSEMap.InsertNode(N, IP); 927 AllNodes.push_back(N); 928 return SDOperand(N, 0); 929} 930 931 932SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 933 FoldingSetNodeID ID; 934 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), (SDOperand*)0, 0); 935 ID.AddPointer(MBB); 936 void *IP = 0; 937 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 938 return SDOperand(E, 0); 939 SDNode *N = new BasicBlockSDNode(MBB); 940 CSEMap.InsertNode(N, IP); 941 AllNodes.push_back(N); 942 return SDOperand(N, 0); 943} 944 945SDOperand SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 946 FoldingSetNodeID ID; 947 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), (SDOperand*)0, 0); 948 ID.AddInteger(Flags.getRawBits()); 949 void *IP = 0; 950 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 951 return SDOperand(E, 0); 952 SDNode *N = new ARG_FLAGSSDNode(Flags); 953 CSEMap.InsertNode(N, IP); 954 AllNodes.push_back(N); 955 return SDOperand(N, 0); 956} 957 958SDOperand SelectionDAG::getValueType(MVT VT) { 959 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 960 ValueTypeNodes.resize(VT.getSimpleVT()+1); 961 962 SDNode *&N = VT.isExtended() ? 963 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 964 965 if (N) return SDOperand(N, 0); 966 N = new VTSDNode(VT); 967 AllNodes.push_back(N); 968 return SDOperand(N, 0); 969} 970 971SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 972 SDNode *&N = ExternalSymbols[Sym]; 973 if (N) return SDOperand(N, 0); 974 N = new ExternalSymbolSDNode(false, Sym, VT); 975 AllNodes.push_back(N); 976 return SDOperand(N, 0); 977} 978 979SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 980 SDNode *&N = TargetExternalSymbols[Sym]; 981 if (N) return SDOperand(N, 0); 982 N = new ExternalSymbolSDNode(true, Sym, VT); 983 AllNodes.push_back(N); 984 return SDOperand(N, 0); 985} 986 987SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) { 988 if ((unsigned)Cond >= CondCodeNodes.size()) 989 CondCodeNodes.resize(Cond+1); 990 991 if (CondCodeNodes[Cond] == 0) { 992 CondCodeNodes[Cond] = new CondCodeSDNode(Cond); 993 AllNodes.push_back(CondCodeNodes[Cond]); 994 } 995 return SDOperand(CondCodeNodes[Cond], 0); 996} 997 998SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 999 FoldingSetNodeID ID; 1000 AddNodeIDNode(ID, ISD::Register, getVTList(VT), (SDOperand*)0, 0); 1001 ID.AddInteger(RegNo); 1002 void *IP = 0; 1003 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1004 return SDOperand(E, 0); 1005 SDNode *N = new RegisterSDNode(RegNo, VT); 1006 CSEMap.InsertNode(N, IP); 1007 AllNodes.push_back(N); 1008 return SDOperand(N, 0); 1009} 1010 1011SDOperand SelectionDAG::getSrcValue(const Value *V) { 1012 assert((!V || isa<PointerType>(V->getType())) && 1013 "SrcValue is not a pointer?"); 1014 1015 FoldingSetNodeID ID; 1016 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), (SDOperand*)0, 0); 1017 ID.AddPointer(V); 1018 1019 void *IP = 0; 1020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1021 return SDOperand(E, 0); 1022 1023 SDNode *N = new SrcValueSDNode(V); 1024 CSEMap.InsertNode(N, IP); 1025 AllNodes.push_back(N); 1026 return SDOperand(N, 0); 1027} 1028 1029SDOperand SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1030 const Value *v = MO.getValue(); 1031 assert((!v || isa<PointerType>(v->getType())) && 1032 "SrcValue is not a pointer?"); 1033 1034 FoldingSetNodeID ID; 1035 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), (SDOperand*)0, 0); 1036 ID.AddPointer(v); 1037 ID.AddInteger(MO.getFlags()); 1038 ID.AddInteger(MO.getOffset()); 1039 ID.AddInteger(MO.getSize()); 1040 ID.AddInteger(MO.getAlignment()); 1041 1042 void *IP = 0; 1043 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1044 return SDOperand(E, 0); 1045 1046 SDNode *N = new MemOperandSDNode(MO); 1047 CSEMap.InsertNode(N, IP); 1048 AllNodes.push_back(N); 1049 return SDOperand(N, 0); 1050} 1051 1052/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1053/// specified value type. 1054SDOperand SelectionDAG::CreateStackTemporary(MVT VT) { 1055 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1056 unsigned ByteSize = VT.getSizeInBits()/8; 1057 const Type *Ty = VT.getTypeForMVT(); 1058 unsigned StackAlign = (unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty); 1059 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1060 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1061} 1062 1063 1064SDOperand SelectionDAG::FoldSetCC(MVT VT, SDOperand N1, 1065 SDOperand N2, ISD::CondCode Cond) { 1066 // These setcc operations always fold. 1067 switch (Cond) { 1068 default: break; 1069 case ISD::SETFALSE: 1070 case ISD::SETFALSE2: return getConstant(0, VT); 1071 case ISD::SETTRUE: 1072 case ISD::SETTRUE2: return getConstant(1, VT); 1073 1074 case ISD::SETOEQ: 1075 case ISD::SETOGT: 1076 case ISD::SETOGE: 1077 case ISD::SETOLT: 1078 case ISD::SETOLE: 1079 case ISD::SETONE: 1080 case ISD::SETO: 1081 case ISD::SETUO: 1082 case ISD::SETUEQ: 1083 case ISD::SETUNE: 1084 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1085 break; 1086 } 1087 1088 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 1089 const APInt &C2 = N2C->getAPIntValue(); 1090 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 1091 const APInt &C1 = N1C->getAPIntValue(); 1092 1093 switch (Cond) { 1094 default: assert(0 && "Unknown integer setcc!"); 1095 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1096 case ISD::SETNE: return getConstant(C1 != C2, VT); 1097 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1098 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1099 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1100 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1101 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1102 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1103 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1104 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1105 } 1106 } 1107 } 1108 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) { 1109 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 1110 // No compile time operations on this type yet. 1111 if (N1C->getValueType(0) == MVT::ppcf128) 1112 return SDOperand(); 1113 1114 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1115 switch (Cond) { 1116 default: break; 1117 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1118 return getNode(ISD::UNDEF, VT); 1119 // fall through 1120 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1121 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1122 return getNode(ISD::UNDEF, VT); 1123 // fall through 1124 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1125 R==APFloat::cmpLessThan, VT); 1126 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1127 return getNode(ISD::UNDEF, VT); 1128 // fall through 1129 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1130 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1131 return getNode(ISD::UNDEF, VT); 1132 // fall through 1133 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1134 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1135 return getNode(ISD::UNDEF, VT); 1136 // fall through 1137 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1138 R==APFloat::cmpEqual, VT); 1139 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1140 return getNode(ISD::UNDEF, VT); 1141 // fall through 1142 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1143 R==APFloat::cmpEqual, VT); 1144 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1145 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1146 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1147 R==APFloat::cmpEqual, VT); 1148 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1149 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1150 R==APFloat::cmpLessThan, VT); 1151 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1152 R==APFloat::cmpUnordered, VT); 1153 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1154 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1155 } 1156 } else { 1157 // Ensure that the constant occurs on the RHS. 1158 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1159 } 1160 } 1161 1162 // Could not fold it. 1163 return SDOperand(); 1164} 1165 1166/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1167/// use this predicate to simplify operations downstream. 1168bool SelectionDAG::SignBitIsZero(SDOperand Op, unsigned Depth) const { 1169 unsigned BitWidth = Op.getValueSizeInBits(); 1170 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1171} 1172 1173/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1174/// this predicate to simplify operations downstream. Mask is known to be zero 1175/// for bits that V cannot have. 1176bool SelectionDAG::MaskedValueIsZero(SDOperand Op, const APInt &Mask, 1177 unsigned Depth) const { 1178 APInt KnownZero, KnownOne; 1179 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1180 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1181 return (KnownZero & Mask) == Mask; 1182} 1183 1184/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1185/// known to be either zero or one and return them in the KnownZero/KnownOne 1186/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1187/// processing. 1188void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask, 1189 APInt &KnownZero, APInt &KnownOne, 1190 unsigned Depth) const { 1191 unsigned BitWidth = Mask.getBitWidth(); 1192 assert(BitWidth == Op.getValueType().getSizeInBits() && 1193 "Mask size mismatches value type size!"); 1194 1195 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1196 if (Depth == 6 || Mask == 0) 1197 return; // Limit search depth. 1198 1199 APInt KnownZero2, KnownOne2; 1200 1201 switch (Op.getOpcode()) { 1202 case ISD::Constant: 1203 // We know all of the bits for a constant! 1204 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1205 KnownZero = ~KnownOne & Mask; 1206 return; 1207 case ISD::AND: 1208 // If either the LHS or the RHS are Zero, the result is zero. 1209 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1210 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1211 KnownZero2, KnownOne2, Depth+1); 1212 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1213 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1214 1215 // Output known-1 bits are only known if set in both the LHS & RHS. 1216 KnownOne &= KnownOne2; 1217 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1218 KnownZero |= KnownZero2; 1219 return; 1220 case ISD::OR: 1221 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1222 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1223 KnownZero2, KnownOne2, Depth+1); 1224 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1225 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1226 1227 // Output known-0 bits are only known if clear in both the LHS & RHS. 1228 KnownZero &= KnownZero2; 1229 // Output known-1 are known to be set if set in either the LHS | RHS. 1230 KnownOne |= KnownOne2; 1231 return; 1232 case ISD::XOR: { 1233 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1234 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1235 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1236 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1237 1238 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1239 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1240 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1241 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1242 KnownZero = KnownZeroOut; 1243 return; 1244 } 1245 case ISD::MUL: { 1246 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1247 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1248 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1249 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1250 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1251 1252 // If low bits are zero in either operand, output low known-0 bits. 1253 // Also compute a conserative estimate for high known-0 bits. 1254 // More trickiness is possible, but this is sufficient for the 1255 // interesting case of alignment computation. 1256 KnownOne.clear(); 1257 unsigned TrailZ = KnownZero.countTrailingOnes() + 1258 KnownZero2.countTrailingOnes(); 1259 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1260 KnownZero2.countLeadingOnes(), 1261 BitWidth) - BitWidth; 1262 1263 TrailZ = std::min(TrailZ, BitWidth); 1264 LeadZ = std::min(LeadZ, BitWidth); 1265 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1266 APInt::getHighBitsSet(BitWidth, LeadZ); 1267 KnownZero &= Mask; 1268 return; 1269 } 1270 case ISD::UDIV: { 1271 // For the purposes of computing leading zeros we can conservatively 1272 // treat a udiv as a logical right shift by the power of 2 known to 1273 // be less than the denominator. 1274 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1275 ComputeMaskedBits(Op.getOperand(0), 1276 AllOnes, KnownZero2, KnownOne2, Depth+1); 1277 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1278 1279 KnownOne2.clear(); 1280 KnownZero2.clear(); 1281 ComputeMaskedBits(Op.getOperand(1), 1282 AllOnes, KnownZero2, KnownOne2, Depth+1); 1283 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1284 if (RHSUnknownLeadingOnes != BitWidth) 1285 LeadZ = std::min(BitWidth, 1286 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1287 1288 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1289 return; 1290 } 1291 case ISD::SELECT: 1292 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1293 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1294 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1295 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1296 1297 // Only known if known in both the LHS and RHS. 1298 KnownOne &= KnownOne2; 1299 KnownZero &= KnownZero2; 1300 return; 1301 case ISD::SELECT_CC: 1302 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1303 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1304 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1305 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1306 1307 // Only known if known in both the LHS and RHS. 1308 KnownOne &= KnownOne2; 1309 KnownZero &= KnownZero2; 1310 return; 1311 case ISD::SETCC: 1312 // If we know the result of a setcc has the top bits zero, use this info. 1313 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult && 1314 BitWidth > 1) 1315 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1316 return; 1317 case ISD::SHL: 1318 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1319 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1320 unsigned ShAmt = SA->getValue(); 1321 1322 // If the shift count is an invalid immediate, don't do anything. 1323 if (ShAmt >= BitWidth) 1324 return; 1325 1326 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1327 KnownZero, KnownOne, Depth+1); 1328 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1329 KnownZero <<= ShAmt; 1330 KnownOne <<= ShAmt; 1331 // low bits known zero. 1332 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1333 } 1334 return; 1335 case ISD::SRL: 1336 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1337 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1338 unsigned ShAmt = SA->getValue(); 1339 1340 // If the shift count is an invalid immediate, don't do anything. 1341 if (ShAmt >= BitWidth) 1342 return; 1343 1344 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1345 KnownZero, KnownOne, Depth+1); 1346 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1347 KnownZero = KnownZero.lshr(ShAmt); 1348 KnownOne = KnownOne.lshr(ShAmt); 1349 1350 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1351 KnownZero |= HighBits; // High bits known zero. 1352 } 1353 return; 1354 case ISD::SRA: 1355 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1356 unsigned ShAmt = SA->getValue(); 1357 1358 // If the shift count is an invalid immediate, don't do anything. 1359 if (ShAmt >= BitWidth) 1360 return; 1361 1362 APInt InDemandedMask = (Mask << ShAmt); 1363 // If any of the demanded bits are produced by the sign extension, we also 1364 // demand the input sign bit. 1365 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1366 if (HighBits.getBoolValue()) 1367 InDemandedMask |= APInt::getSignBit(BitWidth); 1368 1369 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1370 Depth+1); 1371 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1372 KnownZero = KnownZero.lshr(ShAmt); 1373 KnownOne = KnownOne.lshr(ShAmt); 1374 1375 // Handle the sign bits. 1376 APInt SignBit = APInt::getSignBit(BitWidth); 1377 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1378 1379 if (KnownZero.intersects(SignBit)) { 1380 KnownZero |= HighBits; // New bits are known zero. 1381 } else if (KnownOne.intersects(SignBit)) { 1382 KnownOne |= HighBits; // New bits are known one. 1383 } 1384 } 1385 return; 1386 case ISD::SIGN_EXTEND_INREG: { 1387 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1388 unsigned EBits = EVT.getSizeInBits(); 1389 1390 // Sign extension. Compute the demanded bits in the result that are not 1391 // present in the input. 1392 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1393 1394 APInt InSignBit = APInt::getSignBit(EBits); 1395 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1396 1397 // If the sign extended bits are demanded, we know that the sign 1398 // bit is demanded. 1399 InSignBit.zext(BitWidth); 1400 if (NewBits.getBoolValue()) 1401 InputDemandedBits |= InSignBit; 1402 1403 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1404 KnownZero, KnownOne, Depth+1); 1405 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1406 1407 // If the sign bit of the input is known set or clear, then we know the 1408 // top bits of the result. 1409 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1410 KnownZero |= NewBits; 1411 KnownOne &= ~NewBits; 1412 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1413 KnownOne |= NewBits; 1414 KnownZero &= ~NewBits; 1415 } else { // Input sign bit unknown 1416 KnownZero &= ~NewBits; 1417 KnownOne &= ~NewBits; 1418 } 1419 return; 1420 } 1421 case ISD::CTTZ: 1422 case ISD::CTLZ: 1423 case ISD::CTPOP: { 1424 unsigned LowBits = Log2_32(BitWidth)+1; 1425 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1426 KnownOne.clear(); 1427 return; 1428 } 1429 case ISD::LOAD: { 1430 if (ISD::isZEXTLoad(Op.Val)) { 1431 LoadSDNode *LD = cast<LoadSDNode>(Op); 1432 MVT VT = LD->getMemoryVT(); 1433 unsigned MemBits = VT.getSizeInBits(); 1434 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1435 } 1436 return; 1437 } 1438 case ISD::ZERO_EXTEND: { 1439 MVT InVT = Op.getOperand(0).getValueType(); 1440 unsigned InBits = InVT.getSizeInBits(); 1441 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1442 APInt InMask = Mask; 1443 InMask.trunc(InBits); 1444 KnownZero.trunc(InBits); 1445 KnownOne.trunc(InBits); 1446 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1447 KnownZero.zext(BitWidth); 1448 KnownOne.zext(BitWidth); 1449 KnownZero |= NewBits; 1450 return; 1451 } 1452 case ISD::SIGN_EXTEND: { 1453 MVT InVT = Op.getOperand(0).getValueType(); 1454 unsigned InBits = InVT.getSizeInBits(); 1455 APInt InSignBit = APInt::getSignBit(InBits); 1456 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1457 APInt InMask = Mask; 1458 InMask.trunc(InBits); 1459 1460 // If any of the sign extended bits are demanded, we know that the sign 1461 // bit is demanded. Temporarily set this bit in the mask for our callee. 1462 if (NewBits.getBoolValue()) 1463 InMask |= InSignBit; 1464 1465 KnownZero.trunc(InBits); 1466 KnownOne.trunc(InBits); 1467 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1468 1469 // Note if the sign bit is known to be zero or one. 1470 bool SignBitKnownZero = KnownZero.isNegative(); 1471 bool SignBitKnownOne = KnownOne.isNegative(); 1472 assert(!(SignBitKnownZero && SignBitKnownOne) && 1473 "Sign bit can't be known to be both zero and one!"); 1474 1475 // If the sign bit wasn't actually demanded by our caller, we don't 1476 // want it set in the KnownZero and KnownOne result values. Reset the 1477 // mask and reapply it to the result values. 1478 InMask = Mask; 1479 InMask.trunc(InBits); 1480 KnownZero &= InMask; 1481 KnownOne &= InMask; 1482 1483 KnownZero.zext(BitWidth); 1484 KnownOne.zext(BitWidth); 1485 1486 // If the sign bit is known zero or one, the top bits match. 1487 if (SignBitKnownZero) 1488 KnownZero |= NewBits; 1489 else if (SignBitKnownOne) 1490 KnownOne |= NewBits; 1491 return; 1492 } 1493 case ISD::ANY_EXTEND: { 1494 MVT InVT = Op.getOperand(0).getValueType(); 1495 unsigned InBits = InVT.getSizeInBits(); 1496 APInt InMask = Mask; 1497 InMask.trunc(InBits); 1498 KnownZero.trunc(InBits); 1499 KnownOne.trunc(InBits); 1500 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1501 KnownZero.zext(BitWidth); 1502 KnownOne.zext(BitWidth); 1503 return; 1504 } 1505 case ISD::TRUNCATE: { 1506 MVT InVT = Op.getOperand(0).getValueType(); 1507 unsigned InBits = InVT.getSizeInBits(); 1508 APInt InMask = Mask; 1509 InMask.zext(InBits); 1510 KnownZero.zext(InBits); 1511 KnownOne.zext(InBits); 1512 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1513 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1514 KnownZero.trunc(BitWidth); 1515 KnownOne.trunc(BitWidth); 1516 break; 1517 } 1518 case ISD::AssertZext: { 1519 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1520 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1521 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1522 KnownOne, Depth+1); 1523 KnownZero |= (~InMask) & Mask; 1524 return; 1525 } 1526 case ISD::FGETSIGN: 1527 // All bits are zero except the low bit. 1528 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1529 return; 1530 1531 case ISD::SUB: { 1532 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1533 // We know that the top bits of C-X are clear if X contains less bits 1534 // than C (i.e. no wrap-around can happen). For example, 20-X is 1535 // positive if we can prove that X is >= 0 and < 16. 1536 if (CLHS->getAPIntValue().isNonNegative()) { 1537 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1538 // NLZ can't be BitWidth with no sign bit 1539 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1540 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1541 Depth+1); 1542 1543 // If all of the MaskV bits are known to be zero, then we know the 1544 // output top bits are zero, because we now know that the output is 1545 // from [0-C]. 1546 if ((KnownZero2 & MaskV) == MaskV) { 1547 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1548 // Top bits known zero. 1549 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1550 } 1551 } 1552 } 1553 } 1554 // fall through 1555 case ISD::ADD: { 1556 // Output known-0 bits are known if clear or set in both the low clear bits 1557 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1558 // low 3 bits clear. 1559 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1560 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1561 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1562 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1563 1564 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1565 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1566 KnownZeroOut = std::min(KnownZeroOut, 1567 KnownZero2.countTrailingOnes()); 1568 1569 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1570 return; 1571 } 1572 case ISD::SREM: 1573 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1574 APInt RA = Rem->getAPIntValue(); 1575 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1576 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1577 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1578 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1579 1580 // The sign of a remainder is equal to the sign of the first 1581 // operand (zero being positive). 1582 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1583 KnownZero2 |= ~LowBits; 1584 else if (KnownOne2[BitWidth-1]) 1585 KnownOne2 |= ~LowBits; 1586 1587 KnownZero |= KnownZero2 & Mask; 1588 KnownOne |= KnownOne2 & Mask; 1589 1590 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1591 } 1592 } 1593 return; 1594 case ISD::UREM: { 1595 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1596 APInt RA = Rem->getAPIntValue(); 1597 if (RA.isPowerOf2()) { 1598 APInt LowBits = (RA - 1); 1599 APInt Mask2 = LowBits & Mask; 1600 KnownZero |= ~LowBits & Mask; 1601 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1602 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1603 break; 1604 } 1605 } 1606 1607 // Since the result is less than or equal to either operand, any leading 1608 // zero bits in either operand must also exist in the result. 1609 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1610 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1611 Depth+1); 1612 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1613 Depth+1); 1614 1615 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1616 KnownZero2.countLeadingOnes()); 1617 KnownOne.clear(); 1618 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1619 return; 1620 } 1621 default: 1622 // Allow the target to implement this method for its nodes. 1623 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1624 case ISD::INTRINSIC_WO_CHAIN: 1625 case ISD::INTRINSIC_W_CHAIN: 1626 case ISD::INTRINSIC_VOID: 1627 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1628 } 1629 return; 1630 } 1631} 1632 1633/// ComputeNumSignBits - Return the number of times the sign bit of the 1634/// register is replicated into the other bits. We know that at least 1 bit 1635/// is always equal to the sign bit (itself), but other cases can give us 1636/// information. For example, immediately after an "SRA X, 2", we know that 1637/// the top 3 bits are all equal to each other, so we return 3. 1638unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{ 1639 MVT VT = Op.getValueType(); 1640 assert(VT.isInteger() && "Invalid VT!"); 1641 unsigned VTBits = VT.getSizeInBits(); 1642 unsigned Tmp, Tmp2; 1643 unsigned FirstAnswer = 1; 1644 1645 if (Depth == 6) 1646 return 1; // Limit search depth. 1647 1648 switch (Op.getOpcode()) { 1649 default: break; 1650 case ISD::AssertSext: 1651 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1652 return VTBits-Tmp+1; 1653 case ISD::AssertZext: 1654 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1655 return VTBits-Tmp; 1656 1657 case ISD::Constant: { 1658 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1659 // If negative, return # leading ones. 1660 if (Val.isNegative()) 1661 return Val.countLeadingOnes(); 1662 1663 // Return # leading zeros. 1664 return Val.countLeadingZeros(); 1665 } 1666 1667 case ISD::SIGN_EXTEND: 1668 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1669 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1670 1671 case ISD::SIGN_EXTEND_INREG: 1672 // Max of the input and what this extends. 1673 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1674 Tmp = VTBits-Tmp+1; 1675 1676 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1677 return std::max(Tmp, Tmp2); 1678 1679 case ISD::SRA: 1680 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1681 // SRA X, C -> adds C sign bits. 1682 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1683 Tmp += C->getValue(); 1684 if (Tmp > VTBits) Tmp = VTBits; 1685 } 1686 return Tmp; 1687 case ISD::SHL: 1688 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1689 // shl destroys sign bits. 1690 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1691 if (C->getValue() >= VTBits || // Bad shift. 1692 C->getValue() >= Tmp) break; // Shifted all sign bits out. 1693 return Tmp - C->getValue(); 1694 } 1695 break; 1696 case ISD::AND: 1697 case ISD::OR: 1698 case ISD::XOR: // NOT is handled here. 1699 // Logical binary ops preserve the number of sign bits at the worst. 1700 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1701 if (Tmp != 1) { 1702 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1703 FirstAnswer = std::min(Tmp, Tmp2); 1704 // We computed what we know about the sign bits as our first 1705 // answer. Now proceed to the generic code that uses 1706 // ComputeMaskedBits, and pick whichever answer is better. 1707 } 1708 break; 1709 1710 case ISD::SELECT: 1711 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1712 if (Tmp == 1) return 1; // Early out. 1713 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1714 return std::min(Tmp, Tmp2); 1715 1716 case ISD::SETCC: 1717 // If setcc returns 0/-1, all bits are sign bits. 1718 if (TLI.getSetCCResultContents() == 1719 TargetLowering::ZeroOrNegativeOneSetCCResult) 1720 return VTBits; 1721 break; 1722 case ISD::ROTL: 1723 case ISD::ROTR: 1724 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1725 unsigned RotAmt = C->getValue() & (VTBits-1); 1726 1727 // Handle rotate right by N like a rotate left by 32-N. 1728 if (Op.getOpcode() == ISD::ROTR) 1729 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1730 1731 // If we aren't rotating out all of the known-in sign bits, return the 1732 // number that are left. This handles rotl(sext(x), 1) for example. 1733 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1734 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1735 } 1736 break; 1737 case ISD::ADD: 1738 // Add can have at most one carry bit. Thus we know that the output 1739 // is, at worst, one more bit than the inputs. 1740 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1741 if (Tmp == 1) return 1; // Early out. 1742 1743 // Special case decrementing a value (ADD X, -1): 1744 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1745 if (CRHS->isAllOnesValue()) { 1746 APInt KnownZero, KnownOne; 1747 APInt Mask = APInt::getAllOnesValue(VTBits); 1748 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 1749 1750 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1751 // sign bits set. 1752 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1753 return VTBits; 1754 1755 // If we are subtracting one from a positive number, there is no carry 1756 // out of the result. 1757 if (KnownZero.isNegative()) 1758 return Tmp; 1759 } 1760 1761 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1762 if (Tmp2 == 1) return 1; 1763 return std::min(Tmp, Tmp2)-1; 1764 break; 1765 1766 case ISD::SUB: 1767 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1768 if (Tmp2 == 1) return 1; 1769 1770 // Handle NEG. 1771 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1772 if (CLHS->isNullValue()) { 1773 APInt KnownZero, KnownOne; 1774 APInt Mask = APInt::getAllOnesValue(VTBits); 1775 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1776 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1777 // sign bits set. 1778 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1779 return VTBits; 1780 1781 // If the input is known to be positive (the sign bit is known clear), 1782 // the output of the NEG has the same number of sign bits as the input. 1783 if (KnownZero.isNegative()) 1784 return Tmp2; 1785 1786 // Otherwise, we treat this like a SUB. 1787 } 1788 1789 // Sub can have at most one carry bit. Thus we know that the output 1790 // is, at worst, one more bit than the inputs. 1791 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1792 if (Tmp == 1) return 1; // Early out. 1793 return std::min(Tmp, Tmp2)-1; 1794 break; 1795 case ISD::TRUNCATE: 1796 // FIXME: it's tricky to do anything useful for this, but it is an important 1797 // case for targets like X86. 1798 break; 1799 } 1800 1801 // Handle LOADX separately here. EXTLOAD case will fallthrough. 1802 if (Op.getOpcode() == ISD::LOAD) { 1803 LoadSDNode *LD = cast<LoadSDNode>(Op); 1804 unsigned ExtType = LD->getExtensionType(); 1805 switch (ExtType) { 1806 default: break; 1807 case ISD::SEXTLOAD: // '17' bits known 1808 Tmp = LD->getMemoryVT().getSizeInBits(); 1809 return VTBits-Tmp+1; 1810 case ISD::ZEXTLOAD: // '16' bits known 1811 Tmp = LD->getMemoryVT().getSizeInBits(); 1812 return VTBits-Tmp; 1813 } 1814 } 1815 1816 // Allow the target to implement this method for its nodes. 1817 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 1818 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 1819 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 1820 Op.getOpcode() == ISD::INTRINSIC_VOID) { 1821 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 1822 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 1823 } 1824 1825 // Finally, if we can prove that the top bits of the result are 0's or 1's, 1826 // use this information. 1827 APInt KnownZero, KnownOne; 1828 APInt Mask = APInt::getAllOnesValue(VTBits); 1829 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1830 1831 if (KnownZero.isNegative()) { // sign bit is 0 1832 Mask = KnownZero; 1833 } else if (KnownOne.isNegative()) { // sign bit is 1; 1834 Mask = KnownOne; 1835 } else { 1836 // Nothing known. 1837 return FirstAnswer; 1838 } 1839 1840 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 1841 // the number of identical bits in the top of the input value. 1842 Mask = ~Mask; 1843 Mask <<= Mask.getBitWidth()-VTBits; 1844 // Return # leading zeros. We use 'min' here in case Val was zero before 1845 // shifting. We don't want to return '64' as for an i32 "0". 1846 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 1847} 1848 1849 1850bool SelectionDAG::isVerifiedDebugInfoDesc(SDOperand Op) const { 1851 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 1852 if (!GA) return false; 1853 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 1854 if (!GV) return false; 1855 MachineModuleInfo *MMI = getMachineModuleInfo(); 1856 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV); 1857} 1858 1859 1860/// getShuffleScalarElt - Returns the scalar element that will make up the ith 1861/// element of the result of the vector shuffle. 1862SDOperand SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned Idx) { 1863 MVT VT = N->getValueType(0); 1864 SDOperand PermMask = N->getOperand(2); 1865 unsigned NumElems = PermMask.getNumOperands(); 1866 SDOperand V = (Idx < NumElems) ? N->getOperand(0) : N->getOperand(1); 1867 Idx %= NumElems; 1868 1869 if (V.getOpcode() == ISD::BIT_CONVERT) { 1870 V = V.getOperand(0); 1871 if (V.getValueType().getVectorNumElements() != NumElems) 1872 return SDOperand(); 1873 } 1874 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 1875 return (Idx == 0) ? V.getOperand(0) 1876 : getNode(ISD::UNDEF, VT.getVectorElementType()); 1877 if (V.getOpcode() == ISD::BUILD_VECTOR) 1878 return V.getOperand(Idx); 1879 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) { 1880 SDOperand Elt = PermMask.getOperand(Idx); 1881 if (Elt.getOpcode() == ISD::UNDEF) 1882 return getNode(ISD::UNDEF, VT.getVectorElementType()); 1883 return getShuffleScalarElt(V.Val,cast<ConstantSDNode>(Elt)->getValue()); 1884 } 1885 return SDOperand(); 1886} 1887 1888 1889/// getNode - Gets or creates the specified node. 1890/// 1891SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT) { 1892 FoldingSetNodeID ID; 1893 AddNodeIDNode(ID, Opcode, getVTList(VT), (SDOperand*)0, 0); 1894 void *IP = 0; 1895 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1896 return SDOperand(E, 0); 1897 SDNode *N = new SDNode(Opcode, SDNode::getSDVTList(VT)); 1898 CSEMap.InsertNode(N, IP); 1899 1900 AllNodes.push_back(N); 1901 return SDOperand(N, 0); 1902} 1903 1904SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, SDOperand Operand) { 1905 // Constant fold unary operations with an integer constant operand. 1906 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 1907 const APInt &Val = C->getAPIntValue(); 1908 unsigned BitWidth = VT.getSizeInBits(); 1909 switch (Opcode) { 1910 default: break; 1911 case ISD::SIGN_EXTEND: 1912 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 1913 case ISD::ANY_EXTEND: 1914 case ISD::ZERO_EXTEND: 1915 case ISD::TRUNCATE: 1916 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 1917 case ISD::UINT_TO_FP: 1918 case ISD::SINT_TO_FP: { 1919 const uint64_t zero[] = {0, 0}; 1920 // No compile time operations on this type. 1921 if (VT==MVT::ppcf128) 1922 break; 1923 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 1924 (void)apf.convertFromAPInt(Val, 1925 Opcode==ISD::SINT_TO_FP, 1926 APFloat::rmNearestTiesToEven); 1927 return getConstantFP(apf, VT); 1928 } 1929 case ISD::BIT_CONVERT: 1930 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 1931 return getConstantFP(Val.bitsToFloat(), VT); 1932 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 1933 return getConstantFP(Val.bitsToDouble(), VT); 1934 break; 1935 case ISD::BSWAP: 1936 return getConstant(Val.byteSwap(), VT); 1937 case ISD::CTPOP: 1938 return getConstant(Val.countPopulation(), VT); 1939 case ISD::CTLZ: 1940 return getConstant(Val.countLeadingZeros(), VT); 1941 case ISD::CTTZ: 1942 return getConstant(Val.countTrailingZeros(), VT); 1943 } 1944 } 1945 1946 // Constant fold unary operations with a floating point constant operand. 1947 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) { 1948 APFloat V = C->getValueAPF(); // make copy 1949 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 1950 switch (Opcode) { 1951 case ISD::FNEG: 1952 V.changeSign(); 1953 return getConstantFP(V, VT); 1954 case ISD::FABS: 1955 V.clearSign(); 1956 return getConstantFP(V, VT); 1957 case ISD::FP_ROUND: 1958 case ISD::FP_EXTEND: 1959 // This can return overflow, underflow, or inexact; we don't care. 1960 // FIXME need to be more flexible about rounding mode. 1961 (void)V.convert(*MVTToAPFloatSemantics(VT), 1962 APFloat::rmNearestTiesToEven); 1963 return getConstantFP(V, VT); 1964 case ISD::FP_TO_SINT: 1965 case ISD::FP_TO_UINT: { 1966 integerPart x; 1967 assert(integerPartWidth >= 64); 1968 // FIXME need to be more flexible about rounding mode. 1969 APFloat::opStatus s = V.convertToInteger(&x, 64U, 1970 Opcode==ISD::FP_TO_SINT, 1971 APFloat::rmTowardZero); 1972 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 1973 break; 1974 return getConstant(x, VT); 1975 } 1976 case ISD::BIT_CONVERT: 1977 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 1978 return getConstant((uint32_t)V.convertToAPInt().getZExtValue(), VT); 1979 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 1980 return getConstant(V.convertToAPInt().getZExtValue(), VT); 1981 break; 1982 } 1983 } 1984 } 1985 1986 unsigned OpOpcode = Operand.Val->getOpcode(); 1987 switch (Opcode) { 1988 case ISD::TokenFactor: 1989 case ISD::MERGE_VALUES: 1990 return Operand; // Factor or merge of one node? No need. 1991 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 1992 case ISD::FP_EXTEND: 1993 assert(VT.isFloatingPoint() && 1994 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 1995 if (Operand.getValueType() == VT) return Operand; // noop conversion. 1996 if (Operand.getOpcode() == ISD::UNDEF) 1997 return getNode(ISD::UNDEF, VT); 1998 break; 1999 case ISD::SIGN_EXTEND: 2000 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2001 "Invalid SIGN_EXTEND!"); 2002 if (Operand.getValueType() == VT) return Operand; // noop extension 2003 assert(Operand.getValueType().bitsLT(VT) 2004 && "Invalid sext node, dst < src!"); 2005 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2006 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2007 break; 2008 case ISD::ZERO_EXTEND: 2009 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2010 "Invalid ZERO_EXTEND!"); 2011 if (Operand.getValueType() == VT) return Operand; // noop extension 2012 assert(Operand.getValueType().bitsLT(VT) 2013 && "Invalid zext node, dst < src!"); 2014 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2015 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 2016 break; 2017 case ISD::ANY_EXTEND: 2018 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2019 "Invalid ANY_EXTEND!"); 2020 if (Operand.getValueType() == VT) return Operand; // noop extension 2021 assert(Operand.getValueType().bitsLT(VT) 2022 && "Invalid anyext node, dst < src!"); 2023 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2024 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2025 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2026 break; 2027 case ISD::TRUNCATE: 2028 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2029 "Invalid TRUNCATE!"); 2030 if (Operand.getValueType() == VT) return Operand; // noop truncate 2031 assert(Operand.getValueType().bitsGT(VT) 2032 && "Invalid truncate node, src < dst!"); 2033 if (OpOpcode == ISD::TRUNCATE) 2034 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 2035 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2036 OpOpcode == ISD::ANY_EXTEND) { 2037 // If the source is smaller than the dest, we still need an extend. 2038 if (Operand.Val->getOperand(0).getValueType().bitsLT(VT)) 2039 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2040 else if (Operand.Val->getOperand(0).getValueType().bitsGT(VT)) 2041 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 2042 else 2043 return Operand.Val->getOperand(0); 2044 } 2045 break; 2046 case ISD::BIT_CONVERT: 2047 // Basic sanity checking. 2048 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2049 && "Cannot BIT_CONVERT between types of different sizes!"); 2050 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2051 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2052 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2053 if (OpOpcode == ISD::UNDEF) 2054 return getNode(ISD::UNDEF, VT); 2055 break; 2056 case ISD::SCALAR_TO_VECTOR: 2057 assert(VT.isVector() && !Operand.getValueType().isVector() && 2058 VT.getVectorElementType() == Operand.getValueType() && 2059 "Illegal SCALAR_TO_VECTOR node!"); 2060 if (OpOpcode == ISD::UNDEF) 2061 return getNode(ISD::UNDEF, VT); 2062 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2063 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2064 isa<ConstantSDNode>(Operand.getOperand(1)) && 2065 Operand.getConstantOperandVal(1) == 0 && 2066 Operand.getOperand(0).getValueType() == VT) 2067 return Operand.getOperand(0); 2068 break; 2069 case ISD::FNEG: 2070 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2071 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1), 2072 Operand.Val->getOperand(0)); 2073 if (OpOpcode == ISD::FNEG) // --X -> X 2074 return Operand.Val->getOperand(0); 2075 break; 2076 case ISD::FABS: 2077 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2078 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 2079 break; 2080 } 2081 2082 SDNode *N; 2083 SDVTList VTs = getVTList(VT); 2084 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2085 FoldingSetNodeID ID; 2086 SDOperand Ops[1] = { Operand }; 2087 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2088 void *IP = 0; 2089 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2090 return SDOperand(E, 0); 2091 N = new UnarySDNode(Opcode, VTs, Operand); 2092 CSEMap.InsertNode(N, IP); 2093 } else { 2094 N = new UnarySDNode(Opcode, VTs, Operand); 2095 } 2096 AllNodes.push_back(N); 2097 return SDOperand(N, 0); 2098} 2099 2100 2101 2102SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2103 SDOperand N1, SDOperand N2) { 2104 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 2105 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 2106 switch (Opcode) { 2107 default: break; 2108 case ISD::TokenFactor: 2109 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2110 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2111 // Fold trivial token factors. 2112 if (N1.getOpcode() == ISD::EntryToken) return N2; 2113 if (N2.getOpcode() == ISD::EntryToken) return N1; 2114 break; 2115 case ISD::AND: 2116 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2117 N1.getValueType() == VT && "Binary operator types must match!"); 2118 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2119 // worth handling here. 2120 if (N2C && N2C->isNullValue()) 2121 return N2; 2122 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2123 return N1; 2124 break; 2125 case ISD::OR: 2126 case ISD::XOR: 2127 case ISD::ADD: 2128 case ISD::SUB: 2129 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2130 N1.getValueType() == VT && "Binary operator types must match!"); 2131 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2132 // it's worth handling here. 2133 if (N2C && N2C->isNullValue()) 2134 return N1; 2135 break; 2136 case ISD::UDIV: 2137 case ISD::UREM: 2138 case ISD::MULHU: 2139 case ISD::MULHS: 2140 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2141 // fall through 2142 case ISD::MUL: 2143 case ISD::SDIV: 2144 case ISD::SREM: 2145 case ISD::FADD: 2146 case ISD::FSUB: 2147 case ISD::FMUL: 2148 case ISD::FDIV: 2149 case ISD::FREM: 2150 assert(N1.getValueType() == N2.getValueType() && 2151 N1.getValueType() == VT && "Binary operator types must match!"); 2152 break; 2153 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2154 assert(N1.getValueType() == VT && 2155 N1.getValueType().isFloatingPoint() && 2156 N2.getValueType().isFloatingPoint() && 2157 "Invalid FCOPYSIGN!"); 2158 break; 2159 case ISD::SHL: 2160 case ISD::SRA: 2161 case ISD::SRL: 2162 case ISD::ROTL: 2163 case ISD::ROTR: 2164 assert(VT == N1.getValueType() && 2165 "Shift operators return type must be the same as their first arg"); 2166 assert(VT.isInteger() && N2.getValueType().isInteger() && 2167 VT != MVT::i1 && "Shifts only work on integers"); 2168 break; 2169 case ISD::FP_ROUND_INREG: { 2170 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2171 assert(VT == N1.getValueType() && "Not an inreg round!"); 2172 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2173 "Cannot FP_ROUND_INREG integer types"); 2174 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2175 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2176 break; 2177 } 2178 case ISD::FP_ROUND: 2179 assert(VT.isFloatingPoint() && 2180 N1.getValueType().isFloatingPoint() && 2181 VT.bitsLE(N1.getValueType()) && 2182 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2183 if (N1.getValueType() == VT) return N1; // noop conversion. 2184 break; 2185 case ISD::AssertSext: 2186 case ISD::AssertZext: { 2187 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2188 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2189 assert(VT.isInteger() && EVT.isInteger() && 2190 "Cannot *_EXTEND_INREG FP types"); 2191 assert(EVT.bitsLE(VT) && "Not extending!"); 2192 if (VT == EVT) return N1; // noop assertion. 2193 break; 2194 } 2195 case ISD::SIGN_EXTEND_INREG: { 2196 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2197 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2198 assert(VT.isInteger() && EVT.isInteger() && 2199 "Cannot *_EXTEND_INREG FP types"); 2200 assert(EVT.bitsLE(VT) && "Not extending!"); 2201 if (EVT == VT) return N1; // Not actually extending 2202 2203 if (N1C) { 2204 APInt Val = N1C->getAPIntValue(); 2205 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2206 Val <<= Val.getBitWidth()-FromBits; 2207 Val = Val.ashr(Val.getBitWidth()-FromBits); 2208 return getConstant(Val, VT); 2209 } 2210 break; 2211 } 2212 case ISD::EXTRACT_VECTOR_ELT: 2213 assert(N2C && "Bad EXTRACT_VECTOR_ELT!"); 2214 2215 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2216 if (N1.getOpcode() == ISD::UNDEF) 2217 return getNode(ISD::UNDEF, VT); 2218 2219 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2220 // expanding copies of large vectors from registers. 2221 if (N1.getOpcode() == ISD::CONCAT_VECTORS && 2222 N1.getNumOperands() > 0) { 2223 unsigned Factor = 2224 N1.getOperand(0).getValueType().getVectorNumElements(); 2225 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2226 N1.getOperand(N2C->getValue() / Factor), 2227 getConstant(N2C->getValue() % Factor, N2.getValueType())); 2228 } 2229 2230 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2231 // expanding large vector constants. 2232 if (N1.getOpcode() == ISD::BUILD_VECTOR) 2233 return N1.getOperand(N2C->getValue()); 2234 2235 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2236 // operations are lowered to scalars. 2237 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) 2238 if (ConstantSDNode *IEC = dyn_cast<ConstantSDNode>(N1.getOperand(2))) { 2239 if (IEC == N2C) 2240 return N1.getOperand(1); 2241 else 2242 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2243 } 2244 break; 2245 case ISD::EXTRACT_ELEMENT: 2246 assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2247 assert(!N1.getValueType().isVector() && 2248 N1.getValueType().isInteger() && 2249 !VT.isVector() && VT.isInteger() && 2250 "EXTRACT_ELEMENT only applies to integers!"); 2251 2252 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2253 // 64-bit integers into 32-bit parts. Instead of building the extract of 2254 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2255 if (N1.getOpcode() == ISD::BUILD_PAIR) 2256 return N1.getOperand(N2C->getValue()); 2257 2258 // EXTRACT_ELEMENT of a constant int is also very common. 2259 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2260 unsigned ElementSize = VT.getSizeInBits(); 2261 unsigned Shift = ElementSize * N2C->getValue(); 2262 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2263 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2264 } 2265 break; 2266 case ISD::EXTRACT_SUBVECTOR: 2267 if (N1.getValueType() == VT) // Trivial extraction. 2268 return N1; 2269 break; 2270 } 2271 2272 if (N1C) { 2273 if (N2C) { 2274 APInt C1 = N1C->getAPIntValue(), C2 = N2C->getAPIntValue(); 2275 switch (Opcode) { 2276 case ISD::ADD: return getConstant(C1 + C2, VT); 2277 case ISD::SUB: return getConstant(C1 - C2, VT); 2278 case ISD::MUL: return getConstant(C1 * C2, VT); 2279 case ISD::UDIV: 2280 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2281 break; 2282 case ISD::UREM : 2283 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2284 break; 2285 case ISD::SDIV : 2286 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2287 break; 2288 case ISD::SREM : 2289 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2290 break; 2291 case ISD::AND : return getConstant(C1 & C2, VT); 2292 case ISD::OR : return getConstant(C1 | C2, VT); 2293 case ISD::XOR : return getConstant(C1 ^ C2, VT); 2294 case ISD::SHL : return getConstant(C1 << C2, VT); 2295 case ISD::SRL : return getConstant(C1.lshr(C2), VT); 2296 case ISD::SRA : return getConstant(C1.ashr(C2), VT); 2297 case ISD::ROTL : return getConstant(C1.rotl(C2), VT); 2298 case ISD::ROTR : return getConstant(C1.rotr(C2), VT); 2299 default: break; 2300 } 2301 } else { // Cannonicalize constant to RHS if commutative 2302 if (isCommutativeBinOp(Opcode)) { 2303 std::swap(N1C, N2C); 2304 std::swap(N1, N2); 2305 } 2306 } 2307 } 2308 2309 // Constant fold FP operations. 2310 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 2311 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 2312 if (N1CFP) { 2313 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2314 // Cannonicalize constant to RHS if commutative 2315 std::swap(N1CFP, N2CFP); 2316 std::swap(N1, N2); 2317 } else if (N2CFP && VT != MVT::ppcf128) { 2318 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2319 APFloat::opStatus s; 2320 switch (Opcode) { 2321 case ISD::FADD: 2322 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2323 if (s != APFloat::opInvalidOp) 2324 return getConstantFP(V1, VT); 2325 break; 2326 case ISD::FSUB: 2327 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2328 if (s!=APFloat::opInvalidOp) 2329 return getConstantFP(V1, VT); 2330 break; 2331 case ISD::FMUL: 2332 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2333 if (s!=APFloat::opInvalidOp) 2334 return getConstantFP(V1, VT); 2335 break; 2336 case ISD::FDIV: 2337 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2338 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2339 return getConstantFP(V1, VT); 2340 break; 2341 case ISD::FREM : 2342 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2343 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2344 return getConstantFP(V1, VT); 2345 break; 2346 case ISD::FCOPYSIGN: 2347 V1.copySign(V2); 2348 return getConstantFP(V1, VT); 2349 default: break; 2350 } 2351 } 2352 } 2353 2354 // Canonicalize an UNDEF to the RHS, even over a constant. 2355 if (N1.getOpcode() == ISD::UNDEF) { 2356 if (isCommutativeBinOp(Opcode)) { 2357 std::swap(N1, N2); 2358 } else { 2359 switch (Opcode) { 2360 case ISD::FP_ROUND_INREG: 2361 case ISD::SIGN_EXTEND_INREG: 2362 case ISD::SUB: 2363 case ISD::FSUB: 2364 case ISD::FDIV: 2365 case ISD::FREM: 2366 case ISD::SRA: 2367 return N1; // fold op(undef, arg2) -> undef 2368 case ISD::UDIV: 2369 case ISD::SDIV: 2370 case ISD::UREM: 2371 case ISD::SREM: 2372 case ISD::SRL: 2373 case ISD::SHL: 2374 if (!VT.isVector()) 2375 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2376 // For vectors, we can't easily build an all zero vector, just return 2377 // the LHS. 2378 return N2; 2379 } 2380 } 2381 } 2382 2383 // Fold a bunch of operators when the RHS is undef. 2384 if (N2.getOpcode() == ISD::UNDEF) { 2385 switch (Opcode) { 2386 case ISD::XOR: 2387 if (N1.getOpcode() == ISD::UNDEF) 2388 // Handle undef ^ undef -> 0 special case. This is a common 2389 // idiom (misuse). 2390 return getConstant(0, VT); 2391 // fallthrough 2392 case ISD::ADD: 2393 case ISD::ADDC: 2394 case ISD::ADDE: 2395 case ISD::SUB: 2396 case ISD::FADD: 2397 case ISD::FSUB: 2398 case ISD::FMUL: 2399 case ISD::FDIV: 2400 case ISD::FREM: 2401 case ISD::UDIV: 2402 case ISD::SDIV: 2403 case ISD::UREM: 2404 case ISD::SREM: 2405 return N2; // fold op(arg1, undef) -> undef 2406 case ISD::MUL: 2407 case ISD::AND: 2408 case ISD::SRL: 2409 case ISD::SHL: 2410 if (!VT.isVector()) 2411 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2412 // For vectors, we can't easily build an all zero vector, just return 2413 // the LHS. 2414 return N1; 2415 case ISD::OR: 2416 if (!VT.isVector()) 2417 return getConstant(VT.getIntegerVTBitMask(), VT); 2418 // For vectors, we can't easily build an all one vector, just return 2419 // the LHS. 2420 return N1; 2421 case ISD::SRA: 2422 return N1; 2423 } 2424 } 2425 2426 // Memoize this node if possible. 2427 SDNode *N; 2428 SDVTList VTs = getVTList(VT); 2429 if (VT != MVT::Flag) { 2430 SDOperand Ops[] = { N1, N2 }; 2431 FoldingSetNodeID ID; 2432 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2433 void *IP = 0; 2434 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2435 return SDOperand(E, 0); 2436 N = new BinarySDNode(Opcode, VTs, N1, N2); 2437 CSEMap.InsertNode(N, IP); 2438 } else { 2439 N = new BinarySDNode(Opcode, VTs, N1, N2); 2440 } 2441 2442 AllNodes.push_back(N); 2443 return SDOperand(N, 0); 2444} 2445 2446SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2447 SDOperand N1, SDOperand N2, SDOperand N3) { 2448 // Perform various simplifications. 2449 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 2450 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 2451 switch (Opcode) { 2452 case ISD::SETCC: { 2453 // Use FoldSetCC to simplify SETCC's. 2454 SDOperand Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2455 if (Simp.Val) return Simp; 2456 break; 2457 } 2458 case ISD::SELECT: 2459 if (N1C) { 2460 if (N1C->getValue()) 2461 return N2; // select true, X, Y -> X 2462 else 2463 return N3; // select false, X, Y -> Y 2464 } 2465 2466 if (N2 == N3) return N2; // select C, X, X -> X 2467 break; 2468 case ISD::BRCOND: 2469 if (N2C) { 2470 if (N2C->getValue()) // Unconditional branch 2471 return getNode(ISD::BR, MVT::Other, N1, N3); 2472 else 2473 return N1; // Never-taken branch 2474 } 2475 break; 2476 case ISD::VECTOR_SHUFFLE: 2477 assert(VT == N1.getValueType() && VT == N2.getValueType() && 2478 VT.isVector() && N3.getValueType().isVector() && 2479 N3.getOpcode() == ISD::BUILD_VECTOR && 2480 VT.getVectorNumElements() == N3.getNumOperands() && 2481 "Illegal VECTOR_SHUFFLE node!"); 2482 break; 2483 case ISD::BIT_CONVERT: 2484 // Fold bit_convert nodes from a type to themselves. 2485 if (N1.getValueType() == VT) 2486 return N1; 2487 break; 2488 } 2489 2490 // Memoize node if it doesn't produce a flag. 2491 SDNode *N; 2492 SDVTList VTs = getVTList(VT); 2493 if (VT != MVT::Flag) { 2494 SDOperand Ops[] = { N1, N2, N3 }; 2495 FoldingSetNodeID ID; 2496 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2497 void *IP = 0; 2498 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2499 return SDOperand(E, 0); 2500 N = new TernarySDNode(Opcode, VTs, N1, N2, N3); 2501 CSEMap.InsertNode(N, IP); 2502 } else { 2503 N = new TernarySDNode(Opcode, VTs, N1, N2, N3); 2504 } 2505 AllNodes.push_back(N); 2506 return SDOperand(N, 0); 2507} 2508 2509SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2510 SDOperand N1, SDOperand N2, SDOperand N3, 2511 SDOperand N4) { 2512 SDOperand Ops[] = { N1, N2, N3, N4 }; 2513 return getNode(Opcode, VT, Ops, 4); 2514} 2515 2516SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2517 SDOperand N1, SDOperand N2, SDOperand N3, 2518 SDOperand N4, SDOperand N5) { 2519 SDOperand Ops[] = { N1, N2, N3, N4, N5 }; 2520 return getNode(Opcode, VT, Ops, 5); 2521} 2522 2523/// getMemsetValue - Vectorized representation of the memset value 2524/// operand. 2525static SDOperand getMemsetValue(SDOperand Value, MVT VT, SelectionDAG &DAG) { 2526 unsigned NumBits = VT.isVector() ? 2527 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2528 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2529 APInt Val = APInt(NumBits, C->getValue() & 255); 2530 unsigned Shift = 8; 2531 for (unsigned i = NumBits; i > 8; i >>= 1) { 2532 Val = (Val << Shift) | Val; 2533 Shift <<= 1; 2534 } 2535 if (VT.isInteger()) 2536 return DAG.getConstant(Val, VT); 2537 return DAG.getConstantFP(APFloat(Val), VT); 2538 } 2539 2540 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2541 unsigned Shift = 8; 2542 for (unsigned i = NumBits; i > 8; i >>= 1) { 2543 Value = DAG.getNode(ISD::OR, VT, 2544 DAG.getNode(ISD::SHL, VT, Value, 2545 DAG.getConstant(Shift, MVT::i8)), Value); 2546 Shift <<= 1; 2547 } 2548 2549 return Value; 2550} 2551 2552/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2553/// used when a memcpy is turned into a memset when the source is a constant 2554/// string ptr. 2555static SDOperand getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2556 const TargetLowering &TLI, 2557 std::string &Str, unsigned Offset) { 2558 assert(!VT.isVector() && "Can't handle vector type here!"); 2559 unsigned NumBits = VT.getSizeInBits(); 2560 unsigned MSB = NumBits / 8; 2561 uint64_t Val = 0; 2562 if (TLI.isLittleEndian()) 2563 Offset = Offset + MSB - 1; 2564 for (unsigned i = 0; i != MSB; ++i) { 2565 Val = (Val << 8) | (unsigned char)Str[Offset]; 2566 Offset += TLI.isLittleEndian() ? -1 : 1; 2567 } 2568 return DAG.getConstant(Val, VT); 2569} 2570 2571/// getMemBasePlusOffset - Returns base and offset node for the 2572/// 2573static SDOperand getMemBasePlusOffset(SDOperand Base, unsigned Offset, 2574 SelectionDAG &DAG) { 2575 MVT VT = Base.getValueType(); 2576 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2577} 2578 2579/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2580/// 2581static bool isMemSrcFromString(SDOperand Src, std::string &Str, 2582 uint64_t &SrcOff) { 2583 unsigned SrcDelta = 0; 2584 GlobalAddressSDNode *G = NULL; 2585 if (Src.getOpcode() == ISD::GlobalAddress) 2586 G = cast<GlobalAddressSDNode>(Src); 2587 else if (Src.getOpcode() == ISD::ADD && 2588 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2589 Src.getOperand(1).getOpcode() == ISD::Constant) { 2590 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2591 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getValue(); 2592 } 2593 if (!G) 2594 return false; 2595 2596 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2597 if (GV && GV->isConstant()) { 2598 Str = GV->getStringValue(false); 2599 if (!Str.empty()) { 2600 SrcOff += SrcDelta; 2601 return true; 2602 } 2603 } 2604 2605 return false; 2606} 2607 2608/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2609/// to replace the memset / memcpy is below the threshold. It also returns the 2610/// types of the sequence of memory ops to perform memset / memcpy. 2611static 2612bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2613 SDOperand Dst, SDOperand Src, 2614 unsigned Limit, uint64_t Size, unsigned &Align, 2615 SelectionDAG &DAG, 2616 const TargetLowering &TLI) { 2617 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 2618 2619 std::string Str; 2620 uint64_t SrcOff = 0; 2621 bool isSrcStr = isMemSrcFromString(Src, Str, SrcOff); 2622 bool isSrcConst = isa<ConstantSDNode>(Src); 2623 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 2624 if (VT != MVT::iAny) { 2625 unsigned NewAlign = (unsigned) 2626 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 2627 // If source is a string constant, this will require an unaligned load. 2628 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 2629 if (Dst.getOpcode() != ISD::FrameIndex) { 2630 // Can't change destination alignment. It requires a unaligned store. 2631 if (AllowUnalign) 2632 VT = MVT::iAny; 2633 } else { 2634 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 2635 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2636 if (MFI->isFixedObjectIndex(FI)) { 2637 // Can't change destination alignment. It requires a unaligned store. 2638 if (AllowUnalign) 2639 VT = MVT::iAny; 2640 } else { 2641 // Give the stack frame object a larger alignment if needed. 2642 if (MFI->getObjectAlignment(FI) < NewAlign) 2643 MFI->setObjectAlignment(FI, NewAlign); 2644 Align = NewAlign; 2645 } 2646 } 2647 } 2648 } 2649 2650 if (VT == MVT::iAny) { 2651 if (AllowUnalign) { 2652 VT = MVT::i64; 2653 } else { 2654 switch (Align & 7) { 2655 case 0: VT = MVT::i64; break; 2656 case 4: VT = MVT::i32; break; 2657 case 2: VT = MVT::i16; break; 2658 default: VT = MVT::i8; break; 2659 } 2660 } 2661 2662 MVT LVT = MVT::i64; 2663 while (!TLI.isTypeLegal(LVT)) 2664 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 2665 assert(LVT.isInteger()); 2666 2667 if (VT.bitsGT(LVT)) 2668 VT = LVT; 2669 } 2670 2671 unsigned NumMemOps = 0; 2672 while (Size != 0) { 2673 unsigned VTSize = VT.getSizeInBits() / 8; 2674 while (VTSize > Size) { 2675 // For now, only use non-vector load / store's for the left-over pieces. 2676 if (VT.isVector()) { 2677 VT = MVT::i64; 2678 while (!TLI.isTypeLegal(VT)) 2679 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2680 VTSize = VT.getSizeInBits() / 8; 2681 } else { 2682 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2683 VTSize >>= 1; 2684 } 2685 } 2686 2687 if (++NumMemOps > Limit) 2688 return false; 2689 MemOps.push_back(VT); 2690 Size -= VTSize; 2691 } 2692 2693 return true; 2694} 2695 2696static SDOperand getMemcpyLoadsAndStores(SelectionDAG &DAG, 2697 SDOperand Chain, SDOperand Dst, 2698 SDOperand Src, uint64_t Size, 2699 unsigned Align, bool AlwaysInline, 2700 const Value *DstSV, uint64_t DstSVOff, 2701 const Value *SrcSV, uint64_t SrcSVOff){ 2702 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2703 2704 // Expand memcpy to a series of load and store ops if the size operand falls 2705 // below a certain threshold. 2706 std::vector<MVT> MemOps; 2707 uint64_t Limit = -1; 2708 if (!AlwaysInline) 2709 Limit = TLI.getMaxStoresPerMemcpy(); 2710 unsigned DstAlign = Align; // Destination alignment can change. 2711 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2712 DAG, TLI)) 2713 return SDOperand(); 2714 2715 std::string Str; 2716 uint64_t SrcOff = 0, DstOff = 0; 2717 bool CopyFromStr = isMemSrcFromString(Src, Str, SrcOff); 2718 2719 SmallVector<SDOperand, 8> OutChains; 2720 unsigned NumMemOps = MemOps.size(); 2721 for (unsigned i = 0; i < NumMemOps; i++) { 2722 MVT VT = MemOps[i]; 2723 unsigned VTSize = VT.getSizeInBits() / 8; 2724 SDOperand Value, Store; 2725 2726 if (CopyFromStr && !VT.isVector()) { 2727 // It's unlikely a store of a vector immediate can be done in a single 2728 // instruction. It would require a load from a constantpool first. 2729 // FIXME: Handle cases where store of vector immediate is done in a 2730 // single instruction. 2731 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 2732 Store = DAG.getStore(Chain, Value, 2733 getMemBasePlusOffset(Dst, DstOff, DAG), 2734 DstSV, DstSVOff + DstOff); 2735 } else { 2736 Value = DAG.getLoad(VT, Chain, 2737 getMemBasePlusOffset(Src, SrcOff, DAG), 2738 SrcSV, SrcSVOff + SrcOff, false, Align); 2739 Store = DAG.getStore(Chain, Value, 2740 getMemBasePlusOffset(Dst, DstOff, DAG), 2741 DstSV, DstSVOff + DstOff, false, DstAlign); 2742 } 2743 OutChains.push_back(Store); 2744 SrcOff += VTSize; 2745 DstOff += VTSize; 2746 } 2747 2748 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2749 &OutChains[0], OutChains.size()); 2750} 2751 2752static SDOperand getMemmoveLoadsAndStores(SelectionDAG &DAG, 2753 SDOperand Chain, SDOperand Dst, 2754 SDOperand Src, uint64_t Size, 2755 unsigned Align, bool AlwaysInline, 2756 const Value *DstSV, uint64_t DstSVOff, 2757 const Value *SrcSV, uint64_t SrcSVOff){ 2758 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2759 2760 // Expand memmove to a series of load and store ops if the size operand falls 2761 // below a certain threshold. 2762 std::vector<MVT> MemOps; 2763 uint64_t Limit = -1; 2764 if (!AlwaysInline) 2765 Limit = TLI.getMaxStoresPerMemmove(); 2766 unsigned DstAlign = Align; // Destination alignment can change. 2767 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2768 DAG, TLI)) 2769 return SDOperand(); 2770 2771 uint64_t SrcOff = 0, DstOff = 0; 2772 2773 SmallVector<SDOperand, 8> LoadValues; 2774 SmallVector<SDOperand, 8> LoadChains; 2775 SmallVector<SDOperand, 8> OutChains; 2776 unsigned NumMemOps = MemOps.size(); 2777 for (unsigned i = 0; i < NumMemOps; i++) { 2778 MVT VT = MemOps[i]; 2779 unsigned VTSize = VT.getSizeInBits() / 8; 2780 SDOperand Value, Store; 2781 2782 Value = DAG.getLoad(VT, Chain, 2783 getMemBasePlusOffset(Src, SrcOff, DAG), 2784 SrcSV, SrcSVOff + SrcOff, false, Align); 2785 LoadValues.push_back(Value); 2786 LoadChains.push_back(Value.getValue(1)); 2787 SrcOff += VTSize; 2788 } 2789 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 2790 &LoadChains[0], LoadChains.size()); 2791 OutChains.clear(); 2792 for (unsigned i = 0; i < NumMemOps; i++) { 2793 MVT VT = MemOps[i]; 2794 unsigned VTSize = VT.getSizeInBits() / 8; 2795 SDOperand Value, Store; 2796 2797 Store = DAG.getStore(Chain, LoadValues[i], 2798 getMemBasePlusOffset(Dst, DstOff, DAG), 2799 DstSV, DstSVOff + DstOff, false, DstAlign); 2800 OutChains.push_back(Store); 2801 DstOff += VTSize; 2802 } 2803 2804 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2805 &OutChains[0], OutChains.size()); 2806} 2807 2808static SDOperand getMemsetStores(SelectionDAG &DAG, 2809 SDOperand Chain, SDOperand Dst, 2810 SDOperand Src, uint64_t Size, 2811 unsigned Align, 2812 const Value *DstSV, uint64_t DstSVOff) { 2813 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2814 2815 // Expand memset to a series of load/store ops if the size operand 2816 // falls below a certain threshold. 2817 std::vector<MVT> MemOps; 2818 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 2819 Size, Align, DAG, TLI)) 2820 return SDOperand(); 2821 2822 SmallVector<SDOperand, 8> OutChains; 2823 uint64_t DstOff = 0; 2824 2825 unsigned NumMemOps = MemOps.size(); 2826 for (unsigned i = 0; i < NumMemOps; i++) { 2827 MVT VT = MemOps[i]; 2828 unsigned VTSize = VT.getSizeInBits() / 8; 2829 SDOperand Value = getMemsetValue(Src, VT, DAG); 2830 SDOperand Store = DAG.getStore(Chain, Value, 2831 getMemBasePlusOffset(Dst, DstOff, DAG), 2832 DstSV, DstSVOff + DstOff); 2833 OutChains.push_back(Store); 2834 DstOff += VTSize; 2835 } 2836 2837 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2838 &OutChains[0], OutChains.size()); 2839} 2840 2841SDOperand SelectionDAG::getMemcpy(SDOperand Chain, SDOperand Dst, 2842 SDOperand Src, SDOperand Size, 2843 unsigned Align, bool AlwaysInline, 2844 const Value *DstSV, uint64_t DstSVOff, 2845 const Value *SrcSV, uint64_t SrcSVOff) { 2846 2847 // Check to see if we should lower the memcpy to loads and stores first. 2848 // For cases within the target-specified limits, this is the best choice. 2849 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2850 if (ConstantSize) { 2851 // Memcpy with size zero? Just return the original chain. 2852 if (ConstantSize->isNullValue()) 2853 return Chain; 2854 2855 SDOperand Result = 2856 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), 2857 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 2858 if (Result.Val) 2859 return Result; 2860 } 2861 2862 // Then check to see if we should lower the memcpy with target-specific 2863 // code. If the target chooses to do this, this is the next best. 2864 SDOperand Result = 2865 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 2866 AlwaysInline, 2867 DstSV, DstSVOff, SrcSV, SrcSVOff); 2868 if (Result.Val) 2869 return Result; 2870 2871 // If we really need inline code and the target declined to provide it, 2872 // use a (potentially long) sequence of loads and stores. 2873 if (AlwaysInline) { 2874 assert(ConstantSize && "AlwaysInline requires a constant size!"); 2875 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 2876 ConstantSize->getValue(), Align, true, 2877 DstSV, DstSVOff, SrcSV, SrcSVOff); 2878 } 2879 2880 // Emit a library call. 2881 TargetLowering::ArgListTy Args; 2882 TargetLowering::ArgListEntry Entry; 2883 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 2884 Entry.Node = Dst; Args.push_back(Entry); 2885 Entry.Node = Src; Args.push_back(Entry); 2886 Entry.Node = Size; Args.push_back(Entry); 2887 std::pair<SDOperand,SDOperand> CallResult = 2888 TLI.LowerCallTo(Chain, Type::VoidTy, 2889 false, false, false, CallingConv::C, false, 2890 getExternalSymbol("memcpy", TLI.getPointerTy()), 2891 Args, *this); 2892 return CallResult.second; 2893} 2894 2895SDOperand SelectionDAG::getMemmove(SDOperand Chain, SDOperand Dst, 2896 SDOperand Src, SDOperand Size, 2897 unsigned Align, 2898 const Value *DstSV, uint64_t DstSVOff, 2899 const Value *SrcSV, uint64_t SrcSVOff) { 2900 2901 // Check to see if we should lower the memmove to loads and stores first. 2902 // For cases within the target-specified limits, this is the best choice. 2903 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2904 if (ConstantSize) { 2905 // Memmove with size zero? Just return the original chain. 2906 if (ConstantSize->isNullValue()) 2907 return Chain; 2908 2909 SDOperand Result = 2910 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), 2911 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 2912 if (Result.Val) 2913 return Result; 2914 } 2915 2916 // Then check to see if we should lower the memmove with target-specific 2917 // code. If the target chooses to do this, this is the next best. 2918 SDOperand Result = 2919 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 2920 DstSV, DstSVOff, SrcSV, SrcSVOff); 2921 if (Result.Val) 2922 return Result; 2923 2924 // Emit a library call. 2925 TargetLowering::ArgListTy Args; 2926 TargetLowering::ArgListEntry Entry; 2927 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 2928 Entry.Node = Dst; Args.push_back(Entry); 2929 Entry.Node = Src; Args.push_back(Entry); 2930 Entry.Node = Size; Args.push_back(Entry); 2931 std::pair<SDOperand,SDOperand> CallResult = 2932 TLI.LowerCallTo(Chain, Type::VoidTy, 2933 false, false, false, CallingConv::C, false, 2934 getExternalSymbol("memmove", TLI.getPointerTy()), 2935 Args, *this); 2936 return CallResult.second; 2937} 2938 2939SDOperand SelectionDAG::getMemset(SDOperand Chain, SDOperand Dst, 2940 SDOperand Src, SDOperand Size, 2941 unsigned Align, 2942 const Value *DstSV, uint64_t DstSVOff) { 2943 2944 // Check to see if we should lower the memset to stores first. 2945 // For cases within the target-specified limits, this is the best choice. 2946 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2947 if (ConstantSize) { 2948 // Memset with size zero? Just return the original chain. 2949 if (ConstantSize->isNullValue()) 2950 return Chain; 2951 2952 SDOperand Result = 2953 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align, 2954 DstSV, DstSVOff); 2955 if (Result.Val) 2956 return Result; 2957 } 2958 2959 // Then check to see if we should lower the memset with target-specific 2960 // code. If the target chooses to do this, this is the next best. 2961 SDOperand Result = 2962 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 2963 DstSV, DstSVOff); 2964 if (Result.Val) 2965 return Result; 2966 2967 // Emit a library call. 2968 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 2969 TargetLowering::ArgListTy Args; 2970 TargetLowering::ArgListEntry Entry; 2971 Entry.Node = Dst; Entry.Ty = IntPtrTy; 2972 Args.push_back(Entry); 2973 // Extend or truncate the argument to be an i32 value for the call. 2974 if (Src.getValueType().bitsGT(MVT::i32)) 2975 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 2976 else 2977 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 2978 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 2979 Args.push_back(Entry); 2980 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 2981 Args.push_back(Entry); 2982 std::pair<SDOperand,SDOperand> CallResult = 2983 TLI.LowerCallTo(Chain, Type::VoidTy, 2984 false, false, false, CallingConv::C, false, 2985 getExternalSymbol("memset", TLI.getPointerTy()), 2986 Args, *this); 2987 return CallResult.second; 2988} 2989 2990SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, 2991 SDOperand Ptr, SDOperand Cmp, 2992 SDOperand Swp, MVT VT, const Value* PtrVal, 2993 unsigned Alignment) { 2994 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 2995 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 2996 SDVTList VTs = getVTList(Cmp.getValueType(), MVT::Other); 2997 FoldingSetNodeID ID; 2998 SDOperand Ops[] = {Chain, Ptr, Cmp, Swp}; 2999 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3000 ID.AddInteger(VT.getRawBits()); 3001 void* IP = 0; 3002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3003 return SDOperand(E, 0); 3004 SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, VT, 3005 PtrVal, Alignment); 3006 CSEMap.InsertNode(N, IP); 3007 AllNodes.push_back(N); 3008 return SDOperand(N, 0); 3009} 3010 3011SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, 3012 SDOperand Ptr, SDOperand Val, 3013 MVT VT, const Value* PtrVal, 3014 unsigned Alignment) { 3015 assert(( Opcode == ISD::ATOMIC_LOAD_ADD || Opcode == ISD::ATOMIC_LOAD_SUB 3016 || Opcode == ISD::ATOMIC_SWAP || Opcode == ISD::ATOMIC_LOAD_AND 3017 || Opcode == ISD::ATOMIC_LOAD_OR || Opcode == ISD::ATOMIC_LOAD_XOR 3018 || Opcode == ISD::ATOMIC_LOAD_NAND 3019 || Opcode == ISD::ATOMIC_LOAD_MIN || Opcode == ISD::ATOMIC_LOAD_MAX 3020 || Opcode == ISD::ATOMIC_LOAD_UMIN || Opcode == ISD::ATOMIC_LOAD_UMAX) 3021 && "Invalid Atomic Op"); 3022 SDVTList VTs = getVTList(Val.getValueType(), MVT::Other); 3023 FoldingSetNodeID ID; 3024 SDOperand Ops[] = {Chain, Ptr, Val}; 3025 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3026 ID.AddInteger(VT.getRawBits()); 3027 void* IP = 0; 3028 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3029 return SDOperand(E, 0); 3030 SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, VT, 3031 PtrVal, Alignment); 3032 CSEMap.InsertNode(N, IP); 3033 AllNodes.push_back(N); 3034 return SDOperand(N, 0); 3035} 3036 3037SDOperand 3038SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3039 MVT VT, SDOperand Chain, 3040 SDOperand Ptr, SDOperand Offset, 3041 const Value *SV, int SVOffset, MVT EVT, 3042 bool isVolatile, unsigned Alignment) { 3043 if (Alignment == 0) { // Ensure that codegen never sees alignment 0 3044 const Type *Ty = 0; 3045 if (VT != MVT::iPTR) { 3046 Ty = VT.getTypeForMVT(); 3047 } else if (SV) { 3048 const PointerType *PT = dyn_cast<PointerType>(SV->getType()); 3049 assert(PT && "Value for load must be a pointer"); 3050 Ty = PT->getElementType(); 3051 } 3052 assert(Ty && "Could not get type information for load"); 3053 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty); 3054 } 3055 3056 if (VT == EVT) { 3057 ExtType = ISD::NON_EXTLOAD; 3058 } else if (ExtType == ISD::NON_EXTLOAD) { 3059 assert(VT == EVT && "Non-extending load from different memory type!"); 3060 } else { 3061 // Extending load. 3062 if (VT.isVector()) 3063 assert(EVT == VT.getVectorElementType() && "Invalid vector extload!"); 3064 else 3065 assert(EVT.bitsLT(VT) && 3066 "Should only be an extending load, not truncating!"); 3067 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3068 "Cannot sign/zero extend a FP/Vector load!"); 3069 assert(VT.isInteger() == EVT.isInteger() && 3070 "Cannot convert from FP to Int or Int -> FP!"); 3071 } 3072 3073 bool Indexed = AM != ISD::UNINDEXED; 3074 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3075 "Unindexed load with an offset!"); 3076 3077 SDVTList VTs = Indexed ? 3078 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3079 SDOperand Ops[] = { Chain, Ptr, Offset }; 3080 FoldingSetNodeID ID; 3081 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3082 ID.AddInteger(AM); 3083 ID.AddInteger(ExtType); 3084 ID.AddInteger(EVT.getRawBits()); 3085 ID.AddInteger(Alignment); 3086 ID.AddInteger(isVolatile); 3087 void *IP = 0; 3088 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3089 return SDOperand(E, 0); 3090 SDNode *N = new LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3091 Alignment, isVolatile); 3092 CSEMap.InsertNode(N, IP); 3093 AllNodes.push_back(N); 3094 return SDOperand(N, 0); 3095} 3096 3097SDOperand SelectionDAG::getLoad(MVT VT, 3098 SDOperand Chain, SDOperand Ptr, 3099 const Value *SV, int SVOffset, 3100 bool isVolatile, unsigned Alignment) { 3101 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3102 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3103 SV, SVOffset, VT, isVolatile, Alignment); 3104} 3105 3106SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3107 SDOperand Chain, SDOperand Ptr, 3108 const Value *SV, 3109 int SVOffset, MVT EVT, 3110 bool isVolatile, unsigned Alignment) { 3111 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3112 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3113 SV, SVOffset, EVT, isVolatile, Alignment); 3114} 3115 3116SDOperand 3117SelectionDAG::getIndexedLoad(SDOperand OrigLoad, SDOperand Base, 3118 SDOperand Offset, ISD::MemIndexedMode AM) { 3119 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3120 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3121 "Load is already a indexed load!"); 3122 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3123 LD->getChain(), Base, Offset, LD->getSrcValue(), 3124 LD->getSrcValueOffset(), LD->getMemoryVT(), 3125 LD->isVolatile(), LD->getAlignment()); 3126} 3127 3128SDOperand SelectionDAG::getStore(SDOperand Chain, SDOperand Val, 3129 SDOperand Ptr, const Value *SV, int SVOffset, 3130 bool isVolatile, unsigned Alignment) { 3131 MVT VT = Val.getValueType(); 3132 3133 if (Alignment == 0) { // Ensure that codegen never sees alignment 0 3134 const Type *Ty = 0; 3135 if (VT != MVT::iPTR) { 3136 Ty = VT.getTypeForMVT(); 3137 } else if (SV) { 3138 const PointerType *PT = dyn_cast<PointerType>(SV->getType()); 3139 assert(PT && "Value for store must be a pointer"); 3140 Ty = PT->getElementType(); 3141 } 3142 assert(Ty && "Could not get type information for store"); 3143 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty); 3144 } 3145 SDVTList VTs = getVTList(MVT::Other); 3146 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3147 SDOperand Ops[] = { Chain, Val, Ptr, Undef }; 3148 FoldingSetNodeID ID; 3149 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3150 ID.AddInteger(ISD::UNINDEXED); 3151 ID.AddInteger(false); 3152 ID.AddInteger(VT.getRawBits()); 3153 ID.AddInteger(Alignment); 3154 ID.AddInteger(isVolatile); 3155 void *IP = 0; 3156 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3157 return SDOperand(E, 0); 3158 SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3159 VT, SV, SVOffset, Alignment, isVolatile); 3160 CSEMap.InsertNode(N, IP); 3161 AllNodes.push_back(N); 3162 return SDOperand(N, 0); 3163} 3164 3165SDOperand SelectionDAG::getTruncStore(SDOperand Chain, SDOperand Val, 3166 SDOperand Ptr, const Value *SV, 3167 int SVOffset, MVT SVT, 3168 bool isVolatile, unsigned Alignment) { 3169 MVT VT = Val.getValueType(); 3170 3171 if (VT == SVT) 3172 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3173 3174 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3175 assert(VT.isInteger() == SVT.isInteger() && 3176 "Can't do FP-INT conversion!"); 3177 3178 if (Alignment == 0) { // Ensure that codegen never sees alignment 0 3179 const Type *Ty = 0; 3180 if (VT != MVT::iPTR) { 3181 Ty = VT.getTypeForMVT(); 3182 } else if (SV) { 3183 const PointerType *PT = dyn_cast<PointerType>(SV->getType()); 3184 assert(PT && "Value for store must be a pointer"); 3185 Ty = PT->getElementType(); 3186 } 3187 assert(Ty && "Could not get type information for store"); 3188 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty); 3189 } 3190 SDVTList VTs = getVTList(MVT::Other); 3191 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3192 SDOperand Ops[] = { Chain, Val, Ptr, Undef }; 3193 FoldingSetNodeID ID; 3194 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3195 ID.AddInteger(ISD::UNINDEXED); 3196 ID.AddInteger(1); 3197 ID.AddInteger(SVT.getRawBits()); 3198 ID.AddInteger(Alignment); 3199 ID.AddInteger(isVolatile); 3200 void *IP = 0; 3201 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3202 return SDOperand(E, 0); 3203 SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3204 SVT, SV, SVOffset, Alignment, isVolatile); 3205 CSEMap.InsertNode(N, IP); 3206 AllNodes.push_back(N); 3207 return SDOperand(N, 0); 3208} 3209 3210SDOperand 3211SelectionDAG::getIndexedStore(SDOperand OrigStore, SDOperand Base, 3212 SDOperand Offset, ISD::MemIndexedMode AM) { 3213 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3214 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3215 "Store is already a indexed store!"); 3216 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3217 SDOperand Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3218 FoldingSetNodeID ID; 3219 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3220 ID.AddInteger(AM); 3221 ID.AddInteger(ST->isTruncatingStore()); 3222 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3223 ID.AddInteger(ST->getAlignment()); 3224 ID.AddInteger(ST->isVolatile()); 3225 void *IP = 0; 3226 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3227 return SDOperand(E, 0); 3228 SDNode *N = new StoreSDNode(Ops, VTs, AM, 3229 ST->isTruncatingStore(), ST->getMemoryVT(), 3230 ST->getSrcValue(), ST->getSrcValueOffset(), 3231 ST->getAlignment(), ST->isVolatile()); 3232 CSEMap.InsertNode(N, IP); 3233 AllNodes.push_back(N); 3234 return SDOperand(N, 0); 3235} 3236 3237SDOperand SelectionDAG::getVAArg(MVT VT, 3238 SDOperand Chain, SDOperand Ptr, 3239 SDOperand SV) { 3240 SDOperand Ops[] = { Chain, Ptr, SV }; 3241 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 3242} 3243 3244SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 3245 SDOperandPtr Ops, unsigned NumOps) { 3246 switch (NumOps) { 3247 case 0: return getNode(Opcode, VT); 3248 case 1: return getNode(Opcode, VT, Ops[0]); 3249 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3250 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3251 default: break; 3252 } 3253 3254 switch (Opcode) { 3255 default: break; 3256 case ISD::SELECT_CC: { 3257 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3258 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3259 "LHS and RHS of condition must have same type!"); 3260 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3261 "True and False arms of SelectCC must have same type!"); 3262 assert(Ops[2].getValueType() == VT && 3263 "select_cc node must be of same type as true and false value!"); 3264 break; 3265 } 3266 case ISD::BR_CC: { 3267 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3268 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3269 "LHS/RHS of comparison should match types!"); 3270 break; 3271 } 3272 } 3273 3274 // Memoize nodes. 3275 SDNode *N; 3276 SDVTList VTs = getVTList(VT); 3277 if (VT != MVT::Flag) { 3278 FoldingSetNodeID ID; 3279 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3280 void *IP = 0; 3281 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3282 return SDOperand(E, 0); 3283 N = new SDNode(Opcode, VTs, Ops, NumOps); 3284 CSEMap.InsertNode(N, IP); 3285 } else { 3286 N = new SDNode(Opcode, VTs, Ops, NumOps); 3287 } 3288 AllNodes.push_back(N); 3289 return SDOperand(N, 0); 3290} 3291 3292SDOperand SelectionDAG::getNode(unsigned Opcode, 3293 std::vector<MVT> &ResultTys, 3294 SDOperandPtr Ops, unsigned NumOps) { 3295 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(), 3296 Ops, NumOps); 3297} 3298 3299SDOperand SelectionDAG::getNode(unsigned Opcode, 3300 const MVT *VTs, unsigned NumVTs, 3301 SDOperandPtr Ops, unsigned NumOps) { 3302 if (NumVTs == 1) 3303 return getNode(Opcode, VTs[0], Ops, NumOps); 3304 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps); 3305} 3306 3307SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3308 SDOperandPtr Ops, unsigned NumOps) { 3309 if (VTList.NumVTs == 1) 3310 return getNode(Opcode, VTList.VTs[0], Ops, NumOps); 3311 3312 switch (Opcode) { 3313 // FIXME: figure out how to safely handle things like 3314 // int foo(int x) { return 1 << (x & 255); } 3315 // int bar() { return foo(256); } 3316#if 0 3317 case ISD::SRA_PARTS: 3318 case ISD::SRL_PARTS: 3319 case ISD::SHL_PARTS: 3320 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3321 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3322 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3323 else if (N3.getOpcode() == ISD::AND) 3324 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3325 // If the and is only masking out bits that cannot effect the shift, 3326 // eliminate the and. 3327 unsigned NumBits = VT.getSizeInBits()*2; 3328 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3329 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3330 } 3331 break; 3332#endif 3333 } 3334 3335 // Memoize the node unless it returns a flag. 3336 SDNode *N; 3337 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3338 FoldingSetNodeID ID; 3339 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3340 void *IP = 0; 3341 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3342 return SDOperand(E, 0); 3343 if (NumOps == 1) 3344 N = new UnarySDNode(Opcode, VTList, Ops[0]); 3345 else if (NumOps == 2) 3346 N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3347 else if (NumOps == 3) 3348 N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3349 else 3350 N = new SDNode(Opcode, VTList, Ops, NumOps); 3351 CSEMap.InsertNode(N, IP); 3352 } else { 3353 if (NumOps == 1) 3354 N = new UnarySDNode(Opcode, VTList, Ops[0]); 3355 else if (NumOps == 2) 3356 N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3357 else if (NumOps == 3) 3358 N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3359 else 3360 N = new SDNode(Opcode, VTList, Ops, NumOps); 3361 } 3362 AllNodes.push_back(N); 3363 return SDOperand(N, 0); 3364} 3365 3366SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 3367 return getNode(Opcode, VTList, (SDOperand*)0, 0); 3368} 3369 3370SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3371 SDOperand N1) { 3372 SDOperand Ops[] = { N1 }; 3373 return getNode(Opcode, VTList, Ops, 1); 3374} 3375 3376SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3377 SDOperand N1, SDOperand N2) { 3378 SDOperand Ops[] = { N1, N2 }; 3379 return getNode(Opcode, VTList, Ops, 2); 3380} 3381 3382SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3383 SDOperand N1, SDOperand N2, SDOperand N3) { 3384 SDOperand Ops[] = { N1, N2, N3 }; 3385 return getNode(Opcode, VTList, Ops, 3); 3386} 3387 3388SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3389 SDOperand N1, SDOperand N2, SDOperand N3, 3390 SDOperand N4) { 3391 SDOperand Ops[] = { N1, N2, N3, N4 }; 3392 return getNode(Opcode, VTList, Ops, 4); 3393} 3394 3395SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3396 SDOperand N1, SDOperand N2, SDOperand N3, 3397 SDOperand N4, SDOperand N5) { 3398 SDOperand Ops[] = { N1, N2, N3, N4, N5 }; 3399 return getNode(Opcode, VTList, Ops, 5); 3400} 3401 3402SDVTList SelectionDAG::getVTList(MVT VT) { 3403 return makeVTList(SDNode::getValueTypeList(VT), 1); 3404} 3405 3406SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 3407 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(), 3408 E = VTList.end(); I != E; ++I) { 3409 if (I->size() == 2 && (*I)[0] == VT1 && (*I)[1] == VT2) 3410 return makeVTList(&(*I)[0], 2); 3411 } 3412 std::vector<MVT> V; 3413 V.push_back(VT1); 3414 V.push_back(VT2); 3415 VTList.push_front(V); 3416 return makeVTList(&(*VTList.begin())[0], 2); 3417} 3418SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, 3419 MVT VT3) { 3420 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(), 3421 E = VTList.end(); I != E; ++I) { 3422 if (I->size() == 3 && (*I)[0] == VT1 && (*I)[1] == VT2 && 3423 (*I)[2] == VT3) 3424 return makeVTList(&(*I)[0], 3); 3425 } 3426 std::vector<MVT> V; 3427 V.push_back(VT1); 3428 V.push_back(VT2); 3429 V.push_back(VT3); 3430 VTList.push_front(V); 3431 return makeVTList(&(*VTList.begin())[0], 3); 3432} 3433 3434SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 3435 switch (NumVTs) { 3436 case 0: assert(0 && "Cannot have nodes without results!"); 3437 case 1: return getVTList(VTs[0]); 3438 case 2: return getVTList(VTs[0], VTs[1]); 3439 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 3440 default: break; 3441 } 3442 3443 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(), 3444 E = VTList.end(); I != E; ++I) { 3445 if (I->size() != NumVTs || VTs[0] != (*I)[0] || VTs[1] != (*I)[1]) continue; 3446 3447 bool NoMatch = false; 3448 for (unsigned i = 2; i != NumVTs; ++i) 3449 if (VTs[i] != (*I)[i]) { 3450 NoMatch = true; 3451 break; 3452 } 3453 if (!NoMatch) 3454 return makeVTList(&*I->begin(), NumVTs); 3455 } 3456 3457 VTList.push_front(std::vector<MVT>(VTs, VTs+NumVTs)); 3458 return makeVTList(&*VTList.begin()->begin(), NumVTs); 3459} 3460 3461 3462/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 3463/// specified operands. If the resultant node already exists in the DAG, 3464/// this does not modify the specified node, instead it returns the node that 3465/// already exists. If the resultant node does not exist in the DAG, the 3466/// input node is returned. As a degenerate case, if you specify the same 3467/// input operands as the node already has, the input node is returned. 3468SDOperand SelectionDAG:: 3469UpdateNodeOperands(SDOperand InN, SDOperand Op) { 3470 SDNode *N = InN.Val; 3471 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 3472 3473 // Check to see if there is no change. 3474 if (Op == N->getOperand(0)) return InN; 3475 3476 // See if the modified node already exists. 3477 void *InsertPos = 0; 3478 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 3479 return SDOperand(Existing, InN.ResNo); 3480 3481 // Nope it doesn't. Remove the node from it's current place in the maps. 3482 if (InsertPos) 3483 RemoveNodeFromCSEMaps(N); 3484 3485 // Now we update the operands. 3486 N->OperandList[0].getVal()->removeUser(0, N); 3487 N->OperandList[0] = Op; 3488 N->OperandList[0].setUser(N); 3489 Op.Val->addUser(0, N); 3490 3491 // If this gets put into a CSE map, add it. 3492 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3493 return InN; 3494} 3495 3496SDOperand SelectionDAG:: 3497UpdateNodeOperands(SDOperand InN, SDOperand Op1, SDOperand Op2) { 3498 SDNode *N = InN.Val; 3499 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 3500 3501 // Check to see if there is no change. 3502 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 3503 return InN; // No operands changed, just return the input node. 3504 3505 // See if the modified node already exists. 3506 void *InsertPos = 0; 3507 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 3508 return SDOperand(Existing, InN.ResNo); 3509 3510 // Nope it doesn't. Remove the node from it's current place in the maps. 3511 if (InsertPos) 3512 RemoveNodeFromCSEMaps(N); 3513 3514 // Now we update the operands. 3515 if (N->OperandList[0] != Op1) { 3516 N->OperandList[0].getVal()->removeUser(0, N); 3517 N->OperandList[0] = Op1; 3518 N->OperandList[0].setUser(N); 3519 Op1.Val->addUser(0, N); 3520 } 3521 if (N->OperandList[1] != Op2) { 3522 N->OperandList[1].getVal()->removeUser(1, N); 3523 N->OperandList[1] = Op2; 3524 N->OperandList[1].setUser(N); 3525 Op2.Val->addUser(1, N); 3526 } 3527 3528 // If this gets put into a CSE map, add it. 3529 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3530 return InN; 3531} 3532 3533SDOperand SelectionDAG:: 3534UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, SDOperand Op3) { 3535 SDOperand Ops[] = { Op1, Op2, Op3 }; 3536 return UpdateNodeOperands(N, Ops, 3); 3537} 3538 3539SDOperand SelectionDAG:: 3540UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, 3541 SDOperand Op3, SDOperand Op4) { 3542 SDOperand Ops[] = { Op1, Op2, Op3, Op4 }; 3543 return UpdateNodeOperands(N, Ops, 4); 3544} 3545 3546SDOperand SelectionDAG:: 3547UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, 3548 SDOperand Op3, SDOperand Op4, SDOperand Op5) { 3549 SDOperand Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 3550 return UpdateNodeOperands(N, Ops, 5); 3551} 3552 3553SDOperand SelectionDAG:: 3554UpdateNodeOperands(SDOperand InN, SDOperandPtr Ops, unsigned NumOps) { 3555 SDNode *N = InN.Val; 3556 assert(N->getNumOperands() == NumOps && 3557 "Update with wrong number of operands"); 3558 3559 // Check to see if there is no change. 3560 bool AnyChange = false; 3561 for (unsigned i = 0; i != NumOps; ++i) { 3562 if (Ops[i] != N->getOperand(i)) { 3563 AnyChange = true; 3564 break; 3565 } 3566 } 3567 3568 // No operands changed, just return the input node. 3569 if (!AnyChange) return InN; 3570 3571 // See if the modified node already exists. 3572 void *InsertPos = 0; 3573 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 3574 return SDOperand(Existing, InN.ResNo); 3575 3576 // Nope it doesn't. Remove the node from its current place in the maps. 3577 if (InsertPos) 3578 RemoveNodeFromCSEMaps(N); 3579 3580 // Now we update the operands. 3581 for (unsigned i = 0; i != NumOps; ++i) { 3582 if (N->OperandList[i] != Ops[i]) { 3583 N->OperandList[i].getVal()->removeUser(i, N); 3584 N->OperandList[i] = Ops[i]; 3585 N->OperandList[i].setUser(N); 3586 Ops[i].Val->addUser(i, N); 3587 } 3588 } 3589 3590 // If this gets put into a CSE map, add it. 3591 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3592 return InN; 3593} 3594 3595/// MorphNodeTo - This frees the operands of the current node, resets the 3596/// opcode, types, and operands to the specified value. This should only be 3597/// used by the SelectionDAG class. 3598void SDNode::MorphNodeTo(unsigned Opc, SDVTList L, 3599 SDOperandPtr Ops, unsigned NumOps) { 3600 NodeType = Opc; 3601 ValueList = L.VTs; 3602 NumValues = L.NumVTs; 3603 3604 // Clear the operands list, updating used nodes to remove this from their 3605 // use list. 3606 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) 3607 I->getVal()->removeUser(std::distance(op_begin(), I), this); 3608 3609 // If NumOps is larger than the # of operands we currently have, reallocate 3610 // the operand list. 3611 if (NumOps > NumOperands) { 3612 if (OperandsNeedDelete) { 3613 delete [] OperandList; 3614 } 3615 OperandList = new SDUse[NumOps]; 3616 OperandsNeedDelete = true; 3617 } 3618 3619 // Assign the new operands. 3620 NumOperands = NumOps; 3621 3622 for (unsigned i = 0, e = NumOps; i != e; ++i) { 3623 OperandList[i] = Ops[i]; 3624 OperandList[i].setUser(this); 3625 SDNode *N = OperandList[i].getVal(); 3626 N->addUser(i, this); 3627 ++N->UsesSize; 3628 } 3629} 3630 3631/// SelectNodeTo - These are used for target selectors to *mutate* the 3632/// specified node to have the specified return type, Target opcode, and 3633/// operands. Note that target opcodes are stored as 3634/// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field. 3635/// 3636/// Note that SelectNodeTo returns the resultant node. If there is already a 3637/// node of the specified opcode and operands, it returns that node instead of 3638/// the current one. 3639SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3640 MVT VT) { 3641 SDVTList VTs = getVTList(VT); 3642 FoldingSetNodeID ID; 3643 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, (SDOperand*)0, 0); 3644 void *IP = 0; 3645 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3646 return ON; 3647 3648 RemoveNodeFromCSEMaps(N); 3649 3650 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, SDOperandPtr(), 0); 3651 3652 CSEMap.InsertNode(N, IP); 3653 return N; 3654} 3655 3656SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3657 MVT VT, SDOperand Op1) { 3658 // If an identical node already exists, use it. 3659 SDVTList VTs = getVTList(VT); 3660 SDOperand Ops[] = { Op1 }; 3661 3662 FoldingSetNodeID ID; 3663 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1); 3664 void *IP = 0; 3665 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3666 return ON; 3667 3668 RemoveNodeFromCSEMaps(N); 3669 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1); 3670 CSEMap.InsertNode(N, IP); 3671 return N; 3672} 3673 3674SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3675 MVT VT, SDOperand Op1, 3676 SDOperand Op2) { 3677 // If an identical node already exists, use it. 3678 SDVTList VTs = getVTList(VT); 3679 SDOperand Ops[] = { Op1, Op2 }; 3680 3681 FoldingSetNodeID ID; 3682 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3683 void *IP = 0; 3684 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3685 return ON; 3686 3687 RemoveNodeFromCSEMaps(N); 3688 3689 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3690 3691 CSEMap.InsertNode(N, IP); // Memoize the new node. 3692 return N; 3693} 3694 3695SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3696 MVT VT, SDOperand Op1, 3697 SDOperand Op2, SDOperand Op3) { 3698 // If an identical node already exists, use it. 3699 SDVTList VTs = getVTList(VT); 3700 SDOperand Ops[] = { Op1, Op2, Op3 }; 3701 FoldingSetNodeID ID; 3702 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3703 void *IP = 0; 3704 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3705 return ON; 3706 3707 RemoveNodeFromCSEMaps(N); 3708 3709 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3710 3711 CSEMap.InsertNode(N, IP); // Memoize the new node. 3712 return N; 3713} 3714 3715SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3716 MVT VT, SDOperandPtr Ops, 3717 unsigned NumOps) { 3718 // If an identical node already exists, use it. 3719 SDVTList VTs = getVTList(VT); 3720 FoldingSetNodeID ID; 3721 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps); 3722 void *IP = 0; 3723 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3724 return ON; 3725 3726 RemoveNodeFromCSEMaps(N); 3727 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps); 3728 3729 CSEMap.InsertNode(N, IP); // Memoize the new node. 3730 return N; 3731} 3732 3733SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3734 MVT VT1, MVT VT2, 3735 SDOperand Op1, SDOperand Op2) { 3736 SDVTList VTs = getVTList(VT1, VT2); 3737 FoldingSetNodeID ID; 3738 SDOperand Ops[] = { Op1, Op2 }; 3739 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3740 void *IP = 0; 3741 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3742 return ON; 3743 3744 RemoveNodeFromCSEMaps(N); 3745 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3746 CSEMap.InsertNode(N, IP); // Memoize the new node. 3747 return N; 3748} 3749 3750SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3751 MVT VT1, MVT VT2, 3752 SDOperand Op1, SDOperand Op2, 3753 SDOperand Op3) { 3754 // If an identical node already exists, use it. 3755 SDVTList VTs = getVTList(VT1, VT2); 3756 SDOperand Ops[] = { Op1, Op2, Op3 }; 3757 FoldingSetNodeID ID; 3758 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3759 void *IP = 0; 3760 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3761 return ON; 3762 3763 RemoveNodeFromCSEMaps(N); 3764 3765 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3766 CSEMap.InsertNode(N, IP); // Memoize the new node. 3767 return N; 3768} 3769 3770 3771/// getTargetNode - These are used for target selectors to create a new node 3772/// with specified return type(s), target opcode, and operands. 3773/// 3774/// Note that getTargetNode returns the resultant node. If there is already a 3775/// node of the specified opcode and operands, it returns that node instead of 3776/// the current one. 3777SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 3778 return getNode(ISD::BUILTIN_OP_END+Opcode, VT).Val; 3779} 3780SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDOperand Op1) { 3781 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1).Val; 3782} 3783SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 3784 SDOperand Op1, SDOperand Op2) { 3785 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2).Val; 3786} 3787SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 3788 SDOperand Op1, SDOperand Op2, 3789 SDOperand Op3) { 3790 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3).Val; 3791} 3792SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 3793 SDOperandPtr Ops, unsigned NumOps) { 3794 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops, NumOps).Val; 3795} 3796SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 3797 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3798 SDOperand Op; 3799 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op, 0).Val; 3800} 3801SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3802 MVT VT2, SDOperand Op1) { 3803 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3804 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op1, 1).Val; 3805} 3806SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3807 MVT VT2, SDOperand Op1, 3808 SDOperand Op2) { 3809 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3810 SDOperand Ops[] = { Op1, Op2 }; 3811 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 2).Val; 3812} 3813SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3814 MVT VT2, SDOperand Op1, 3815 SDOperand Op2, SDOperand Op3) { 3816 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3817 SDOperand Ops[] = { Op1, Op2, Op3 }; 3818 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 3).Val; 3819} 3820SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 3821 SDOperandPtr Ops, unsigned NumOps) { 3822 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3823 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, NumOps).Val; 3824} 3825SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 3826 SDOperand Op1, SDOperand Op2) { 3827 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 3828 SDOperand Ops[] = { Op1, Op2 }; 3829 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 2).Val; 3830} 3831SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 3832 SDOperand Op1, SDOperand Op2, 3833 SDOperand Op3) { 3834 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 3835 SDOperand Ops[] = { Op1, Op2, Op3 }; 3836 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 3).Val; 3837} 3838SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 3839 SDOperandPtr Ops, unsigned NumOps) { 3840 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 3841 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, NumOps).Val; 3842} 3843SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3844 MVT VT2, MVT VT3, MVT VT4, 3845 SDOperandPtr Ops, unsigned NumOps) { 3846 std::vector<MVT> VTList; 3847 VTList.push_back(VT1); 3848 VTList.push_back(VT2); 3849 VTList.push_back(VT3); 3850 VTList.push_back(VT4); 3851 const MVT *VTs = getNodeValueTypes(VTList); 3852 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 4, Ops, NumOps).Val; 3853} 3854SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 3855 std::vector<MVT> &ResultTys, 3856 SDOperandPtr Ops, unsigned NumOps) { 3857 const MVT *VTs = getNodeValueTypes(ResultTys); 3858 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, ResultTys.size(), 3859 Ops, NumOps).Val; 3860} 3861 3862/// getNodeIfExists - Get the specified node if it's already available, or 3863/// else return NULL. 3864SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 3865 SDOperandPtr Ops, unsigned NumOps) { 3866 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3867 FoldingSetNodeID ID; 3868 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3869 void *IP = 0; 3870 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3871 return E; 3872 } 3873 return NULL; 3874} 3875 3876 3877/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 3878/// This can cause recursive merging of nodes in the DAG. 3879/// 3880/// This version assumes From has a single result value. 3881/// 3882void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand To, 3883 DAGUpdateListener *UpdateListener) { 3884 SDNode *From = FromN.Val; 3885 assert(From->getNumValues() == 1 && FromN.ResNo == 0 && 3886 "Cannot replace with this method!"); 3887 assert(From != To.Val && "Cannot replace uses of with self"); 3888 3889 while (!From->use_empty()) { 3890 SDNode::use_iterator UI = From->use_begin(); 3891 SDNode *U = UI->getUser(); 3892 3893 // This node is about to morph, remove its old self from the CSE maps. 3894 RemoveNodeFromCSEMaps(U); 3895 int operandNum = 0; 3896 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 3897 I != E; ++I, ++operandNum) 3898 if (I->getVal() == From) { 3899 From->removeUser(operandNum, U); 3900 *I = To; 3901 I->setUser(U); 3902 To.Val->addUser(operandNum, U); 3903 } 3904 3905 // Now that we have modified U, add it back to the CSE maps. If it already 3906 // exists there, recursively merge the results together. 3907 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 3908 ReplaceAllUsesWith(U, Existing, UpdateListener); 3909 // U is now dead. Inform the listener if it exists and delete it. 3910 if (UpdateListener) 3911 UpdateListener->NodeDeleted(U, Existing); 3912 DeleteNodeNotInCSEMaps(U); 3913 } else { 3914 // If the node doesn't already exist, we updated it. Inform a listener if 3915 // it exists. 3916 if (UpdateListener) 3917 UpdateListener->NodeUpdated(U); 3918 } 3919 } 3920} 3921 3922/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 3923/// This can cause recursive merging of nodes in the DAG. 3924/// 3925/// This version assumes From/To have matching types and numbers of result 3926/// values. 3927/// 3928void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 3929 DAGUpdateListener *UpdateListener) { 3930 assert(From != To && "Cannot replace uses of with self"); 3931 assert(From->getNumValues() == To->getNumValues() && 3932 "Cannot use this version of ReplaceAllUsesWith!"); 3933 if (From->getNumValues() == 1) // If possible, use the faster version. 3934 return ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0), 3935 UpdateListener); 3936 3937 while (!From->use_empty()) { 3938 SDNode::use_iterator UI = From->use_begin(); 3939 SDNode *U = UI->getUser(); 3940 3941 // This node is about to morph, remove its old self from the CSE maps. 3942 RemoveNodeFromCSEMaps(U); 3943 int operandNum = 0; 3944 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 3945 I != E; ++I, ++operandNum) 3946 if (I->getVal() == From) { 3947 From->removeUser(operandNum, U); 3948 I->getVal() = To; 3949 To->addUser(operandNum, U); 3950 } 3951 3952 // Now that we have modified U, add it back to the CSE maps. If it already 3953 // exists there, recursively merge the results together. 3954 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 3955 ReplaceAllUsesWith(U, Existing, UpdateListener); 3956 // U is now dead. Inform the listener if it exists and delete it. 3957 if (UpdateListener) 3958 UpdateListener->NodeDeleted(U, Existing); 3959 DeleteNodeNotInCSEMaps(U); 3960 } else { 3961 // If the node doesn't already exist, we updated it. Inform a listener if 3962 // it exists. 3963 if (UpdateListener) 3964 UpdateListener->NodeUpdated(U); 3965 } 3966 } 3967} 3968 3969/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 3970/// This can cause recursive merging of nodes in the DAG. 3971/// 3972/// This version can replace From with any result values. To must match the 3973/// number and types of values returned by From. 3974void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 3975 SDOperandPtr To, 3976 DAGUpdateListener *UpdateListener) { 3977 if (From->getNumValues() == 1) // Handle the simple case efficiently. 3978 return ReplaceAllUsesWith(SDOperand(From, 0), To[0], UpdateListener); 3979 3980 while (!From->use_empty()) { 3981 SDNode::use_iterator UI = From->use_begin(); 3982 SDNode *U = UI->getUser(); 3983 3984 // This node is about to morph, remove its old self from the CSE maps. 3985 RemoveNodeFromCSEMaps(U); 3986 int operandNum = 0; 3987 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 3988 I != E; ++I, ++operandNum) 3989 if (I->getVal() == From) { 3990 const SDOperand &ToOp = To[I->getSDOperand().ResNo]; 3991 From->removeUser(operandNum, U); 3992 *I = ToOp; 3993 I->setUser(U); 3994 ToOp.Val->addUser(operandNum, U); 3995 } 3996 3997 // Now that we have modified U, add it back to the CSE maps. If it already 3998 // exists there, recursively merge the results together. 3999 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4000 ReplaceAllUsesWith(U, Existing, UpdateListener); 4001 // U is now dead. Inform the listener if it exists and delete it. 4002 if (UpdateListener) 4003 UpdateListener->NodeDeleted(U, Existing); 4004 DeleteNodeNotInCSEMaps(U); 4005 } else { 4006 // If the node doesn't already exist, we updated it. Inform a listener if 4007 // it exists. 4008 if (UpdateListener) 4009 UpdateListener->NodeUpdated(U); 4010 } 4011 } 4012} 4013 4014namespace { 4015 /// ChainedSetUpdaterListener - This class is a DAGUpdateListener that removes 4016 /// any deleted nodes from the set passed into its constructor and recursively 4017 /// notifies another update listener if specified. 4018 class ChainedSetUpdaterListener : 4019 public SelectionDAG::DAGUpdateListener { 4020 SmallSetVector<SDNode*, 16> &Set; 4021 SelectionDAG::DAGUpdateListener *Chain; 4022 public: 4023 ChainedSetUpdaterListener(SmallSetVector<SDNode*, 16> &set, 4024 SelectionDAG::DAGUpdateListener *chain) 4025 : Set(set), Chain(chain) {} 4026 4027 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4028 Set.remove(N); 4029 if (Chain) Chain->NodeDeleted(N, E); 4030 } 4031 virtual void NodeUpdated(SDNode *N) { 4032 if (Chain) Chain->NodeUpdated(N); 4033 } 4034 }; 4035} 4036 4037/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4038/// uses of other values produced by From.Val alone. The Deleted vector is 4039/// handled the same way as for ReplaceAllUsesWith. 4040void SelectionDAG::ReplaceAllUsesOfValueWith(SDOperand From, SDOperand To, 4041 DAGUpdateListener *UpdateListener){ 4042 assert(From != To && "Cannot replace a value with itself"); 4043 4044 // Handle the simple, trivial, case efficiently. 4045 if (From.Val->getNumValues() == 1) { 4046 ReplaceAllUsesWith(From, To, UpdateListener); 4047 return; 4048 } 4049 4050 if (From.use_empty()) return; 4051 4052 // Get all of the users of From.Val. We want these in a nice, 4053 // deterministically ordered and uniqued set, so we use a SmallSetVector. 4054 SmallSetVector<SDNode*, 16> Users; 4055 for (SDNode::use_iterator UI = From.Val->use_begin(), 4056 E = From.Val->use_end(); UI != E; ++UI) { 4057 SDNode *User = UI->getUser(); 4058 if (!Users.count(User)) 4059 Users.insert(User); 4060 } 4061 4062 // When one of the recursive merges deletes nodes from the graph, we need to 4063 // make sure that UpdateListener is notified *and* that the node is removed 4064 // from Users if present. CSUL does this. 4065 ChainedSetUpdaterListener CSUL(Users, UpdateListener); 4066 4067 while (!Users.empty()) { 4068 // We know that this user uses some value of From. If it is the right 4069 // value, update it. 4070 SDNode *User = Users.back(); 4071 Users.pop_back(); 4072 4073 // Scan for an operand that matches From. 4074 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4075 for (; Op != E; ++Op) 4076 if (*Op == From) break; 4077 4078 // If there are no matches, the user must use some other result of From. 4079 if (Op == E) continue; 4080 4081 // Okay, we know this user needs to be updated. Remove its old self 4082 // from the CSE maps. 4083 RemoveNodeFromCSEMaps(User); 4084 4085 // Update all operands that match "From" in case there are multiple uses. 4086 for (; Op != E; ++Op) { 4087 if (*Op == From) { 4088 From.Val->removeUser(Op-User->op_begin(), User); 4089 *Op = To; 4090 Op->setUser(User); 4091 To.Val->addUser(Op-User->op_begin(), User); 4092 } 4093 } 4094 4095 // Now that we have modified User, add it back to the CSE maps. If it 4096 // already exists there, recursively merge the results together. 4097 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4098 if (!Existing) { 4099 if (UpdateListener) UpdateListener->NodeUpdated(User); 4100 continue; // Continue on to next user. 4101 } 4102 4103 // If there was already an existing matching node, use ReplaceAllUsesWith 4104 // to replace the dead one with the existing one. This can cause 4105 // recursive merging of other unrelated nodes down the line. The merging 4106 // can cause deletion of nodes that used the old value. To handle this, we 4107 // use CSUL to remove them from the Users set. 4108 ReplaceAllUsesWith(User, Existing, &CSUL); 4109 4110 // User is now dead. Notify a listener if present. 4111 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4112 DeleteNodeNotInCSEMaps(User); 4113 } 4114} 4115 4116/// AssignNodeIds - Assign a unique node id for each node in the DAG based on 4117/// their allnodes order. It returns the maximum id. 4118unsigned SelectionDAG::AssignNodeIds() { 4119 unsigned Id = 0; 4120 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I){ 4121 SDNode *N = I; 4122 N->setNodeId(Id++); 4123 } 4124 return Id; 4125} 4126 4127/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4128/// based on their topological order. It returns the maximum id and a vector 4129/// of the SDNodes* in assigned order by reference. 4130unsigned SelectionDAG::AssignTopologicalOrder(std::vector<SDNode*> &TopOrder) { 4131 unsigned DAGSize = AllNodes.size(); 4132 std::vector<unsigned> InDegree(DAGSize); 4133 std::vector<SDNode*> Sources; 4134 4135 // Use a two pass approach to avoid using a std::map which is slow. 4136 unsigned Id = 0; 4137 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I){ 4138 SDNode *N = I; 4139 N->setNodeId(Id++); 4140 unsigned Degree = N->use_size(); 4141 InDegree[N->getNodeId()] = Degree; 4142 if (Degree == 0) 4143 Sources.push_back(N); 4144 } 4145 4146 TopOrder.clear(); 4147 while (!Sources.empty()) { 4148 SDNode *N = Sources.back(); 4149 Sources.pop_back(); 4150 TopOrder.push_back(N); 4151 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 4152 SDNode *P = I->getVal(); 4153 unsigned Degree = --InDegree[P->getNodeId()]; 4154 if (Degree == 0) 4155 Sources.push_back(P); 4156 } 4157 } 4158 4159 // Second pass, assign the actual topological order as node ids. 4160 Id = 0; 4161 for (std::vector<SDNode*>::iterator TI = TopOrder.begin(),TE = TopOrder.end(); 4162 TI != TE; ++TI) 4163 (*TI)->setNodeId(Id++); 4164 4165 return Id; 4166} 4167 4168 4169 4170//===----------------------------------------------------------------------===// 4171// SDNode Class 4172//===----------------------------------------------------------------------===// 4173 4174// Out-of-line virtual method to give class a home. 4175void SDNode::ANCHOR() {} 4176void UnarySDNode::ANCHOR() {} 4177void BinarySDNode::ANCHOR() {} 4178void TernarySDNode::ANCHOR() {} 4179void HandleSDNode::ANCHOR() {} 4180void StringSDNode::ANCHOR() {} 4181void ConstantSDNode::ANCHOR() {} 4182void ConstantFPSDNode::ANCHOR() {} 4183void GlobalAddressSDNode::ANCHOR() {} 4184void FrameIndexSDNode::ANCHOR() {} 4185void JumpTableSDNode::ANCHOR() {} 4186void ConstantPoolSDNode::ANCHOR() {} 4187void BasicBlockSDNode::ANCHOR() {} 4188void SrcValueSDNode::ANCHOR() {} 4189void MemOperandSDNode::ANCHOR() {} 4190void RegisterSDNode::ANCHOR() {} 4191void ExternalSymbolSDNode::ANCHOR() {} 4192void CondCodeSDNode::ANCHOR() {} 4193void ARG_FLAGSSDNode::ANCHOR() {} 4194void VTSDNode::ANCHOR() {} 4195void MemSDNode::ANCHOR() {} 4196void LoadSDNode::ANCHOR() {} 4197void StoreSDNode::ANCHOR() {} 4198void AtomicSDNode::ANCHOR() {} 4199 4200HandleSDNode::~HandleSDNode() { 4201 SDVTList VTs = { 0, 0 }; 4202 MorphNodeTo(ISD::HANDLENODE, VTs, SDOperandPtr(), 0); // Drops operand uses. 4203} 4204 4205GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 4206 MVT VT, int o) 4207 : SDNode(isa<GlobalVariable>(GA) && 4208 cast<GlobalVariable>(GA)->isThreadLocal() ? 4209 // Thread Local 4210 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 4211 // Non Thread Local 4212 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 4213 getSDVTList(VT)), Offset(o) { 4214 TheGlobal = const_cast<GlobalValue*>(GA); 4215} 4216 4217/// getMemOperand - Return a MachineMemOperand object describing the memory 4218/// reference performed by this atomic. 4219MachineMemOperand AtomicSDNode::getMemOperand() const { 4220 int Size = (getVT().getSizeInBits() + 7) >> 3; 4221 int Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4222 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4223 4224 // Check if the atomic references a frame index 4225 const FrameIndexSDNode *FI = 4226 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val); 4227 if (!getSrcValue() && FI) 4228 return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags, 4229 FI->getIndex(), Size, getAlignment()); 4230 else 4231 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4232 Size, getAlignment()); 4233} 4234 4235/// getMemOperand - Return a MachineMemOperand object describing the memory 4236/// reference performed by this load or store. 4237MachineMemOperand LSBaseSDNode::getMemOperand() const { 4238 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4239 int Flags = 4240 getOpcode() == ISD::LOAD ? MachineMemOperand::MOLoad : 4241 MachineMemOperand::MOStore; 4242 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4243 4244 // Check if the load references a frame index, and does not have 4245 // an SV attached. 4246 const FrameIndexSDNode *FI = 4247 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val); 4248 if (!getSrcValue() && FI) 4249 return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags, 4250 FI->getIndex(), Size, getAlignment()); 4251 else 4252 return MachineMemOperand(getSrcValue(), Flags, 4253 getSrcValueOffset(), Size, getAlignment()); 4254} 4255 4256/// Profile - Gather unique data for the node. 4257/// 4258void SDNode::Profile(FoldingSetNodeID &ID) { 4259 AddNodeIDNode(ID, this); 4260} 4261 4262/// getValueTypeList - Return a pointer to the specified value type. 4263/// 4264const MVT *SDNode::getValueTypeList(MVT VT) { 4265 if (VT.isExtended()) { 4266 static std::set<MVT, MVT::compareRawBits> EVTs; 4267 return &(*EVTs.insert(VT).first); 4268 } else { 4269 static MVT VTs[MVT::LAST_VALUETYPE]; 4270 VTs[VT.getSimpleVT()] = VT; 4271 return &VTs[VT.getSimpleVT()]; 4272 } 4273} 4274 4275/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 4276/// indicated value. This method ignores uses of other values defined by this 4277/// operation. 4278bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 4279 assert(Value < getNumValues() && "Bad value!"); 4280 4281 // If there is only one value, this is easy. 4282 if (getNumValues() == 1) 4283 return use_size() == NUses; 4284 if (use_size() < NUses) return false; 4285 4286 SDOperand TheValue(const_cast<SDNode *>(this), Value); 4287 4288 SmallPtrSet<SDNode*, 32> UsersHandled; 4289 4290 // TODO: Only iterate over uses of a given value of the node 4291 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4292 if (*UI == TheValue) { 4293 if (NUses == 0) 4294 return false; 4295 --NUses; 4296 } 4297 } 4298 4299 // Found exactly the right number of uses? 4300 return NUses == 0; 4301} 4302 4303 4304/// hasAnyUseOfValue - Return true if there are any use of the indicated 4305/// value. This method ignores uses of other values defined by this operation. 4306bool SDNode::hasAnyUseOfValue(unsigned Value) const { 4307 assert(Value < getNumValues() && "Bad value!"); 4308 4309 if (use_empty()) return false; 4310 4311 SDOperand TheValue(const_cast<SDNode *>(this), Value); 4312 4313 SmallPtrSet<SDNode*, 32> UsersHandled; 4314 4315 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4316 SDNode *User = UI->getUser(); 4317 if (User->getNumOperands() == 1 || 4318 UsersHandled.insert(User)) // First time we've seen this? 4319 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 4320 if (User->getOperand(i) == TheValue) { 4321 return true; 4322 } 4323 } 4324 4325 return false; 4326} 4327 4328 4329/// isOnlyUseOf - Return true if this node is the only use of N. 4330/// 4331bool SDNode::isOnlyUseOf(SDNode *N) const { 4332 bool Seen = false; 4333 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 4334 SDNode *User = I->getUser(); 4335 if (User == this) 4336 Seen = true; 4337 else 4338 return false; 4339 } 4340 4341 return Seen; 4342} 4343 4344/// isOperand - Return true if this node is an operand of N. 4345/// 4346bool SDOperand::isOperandOf(SDNode *N) const { 4347 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4348 if (*this == N->getOperand(i)) 4349 return true; 4350 return false; 4351} 4352 4353bool SDNode::isOperandOf(SDNode *N) const { 4354 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 4355 if (this == N->OperandList[i].getVal()) 4356 return true; 4357 return false; 4358} 4359 4360/// reachesChainWithoutSideEffects - Return true if this operand (which must 4361/// be a chain) reaches the specified operand without crossing any 4362/// side-effecting instructions. In practice, this looks through token 4363/// factors and non-volatile loads. In order to remain efficient, this only 4364/// looks a couple of nodes in, it does not do an exhaustive search. 4365bool SDOperand::reachesChainWithoutSideEffects(SDOperand Dest, 4366 unsigned Depth) const { 4367 if (*this == Dest) return true; 4368 4369 // Don't search too deeply, we just want to be able to see through 4370 // TokenFactor's etc. 4371 if (Depth == 0) return false; 4372 4373 // If this is a token factor, all inputs to the TF happen in parallel. If any 4374 // of the operands of the TF reach dest, then we can do the xform. 4375 if (getOpcode() == ISD::TokenFactor) { 4376 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 4377 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 4378 return true; 4379 return false; 4380 } 4381 4382 // Loads don't have side effects, look through them. 4383 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 4384 if (!Ld->isVolatile()) 4385 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 4386 } 4387 return false; 4388} 4389 4390 4391static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 4392 SmallPtrSet<SDNode *, 32> &Visited) { 4393 if (found || !Visited.insert(N)) 4394 return; 4395 4396 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 4397 SDNode *Op = N->getOperand(i).Val; 4398 if (Op == P) { 4399 found = true; 4400 return; 4401 } 4402 findPredecessor(Op, P, found, Visited); 4403 } 4404} 4405 4406/// isPredecessorOf - Return true if this node is a predecessor of N. This node 4407/// is either an operand of N or it can be reached by recursively traversing 4408/// up the operands. 4409/// NOTE: this is an expensive method. Use it carefully. 4410bool SDNode::isPredecessorOf(SDNode *N) const { 4411 SmallPtrSet<SDNode *, 32> Visited; 4412 bool found = false; 4413 findPredecessor(N, this, found, Visited); 4414 return found; 4415} 4416 4417uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 4418 assert(Num < NumOperands && "Invalid child # of SDNode!"); 4419 return cast<ConstantSDNode>(OperandList[Num])->getValue(); 4420} 4421 4422std::string SDNode::getOperationName(const SelectionDAG *G) const { 4423 switch (getOpcode()) { 4424 default: 4425 if (getOpcode() < ISD::BUILTIN_OP_END) 4426 return "<<Unknown DAG Node>>"; 4427 else { 4428 if (G) { 4429 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 4430 if (getOpcode()-ISD::BUILTIN_OP_END < TII->getNumOpcodes()) 4431 return TII->get(getOpcode()-ISD::BUILTIN_OP_END).getName(); 4432 4433 TargetLowering &TLI = G->getTargetLoweringInfo(); 4434 const char *Name = 4435 TLI.getTargetNodeName(getOpcode()); 4436 if (Name) return Name; 4437 } 4438 4439 return "<<Unknown Target Node>>"; 4440 } 4441 4442 case ISD::PREFETCH: return "Prefetch"; 4443 case ISD::MEMBARRIER: return "MemBarrier"; 4444 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 4445 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 4446 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 4447 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 4448 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 4449 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 4450 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 4451 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 4452 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 4453 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 4454 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 4455 case ISD::ATOMIC_SWAP: return "AtomicSWAP"; 4456 case ISD::PCMARKER: return "PCMarker"; 4457 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 4458 case ISD::SRCVALUE: return "SrcValue"; 4459 case ISD::MEMOPERAND: return "MemOperand"; 4460 case ISD::EntryToken: return "EntryToken"; 4461 case ISD::TokenFactor: return "TokenFactor"; 4462 case ISD::AssertSext: return "AssertSext"; 4463 case ISD::AssertZext: return "AssertZext"; 4464 4465 case ISD::STRING: return "String"; 4466 case ISD::BasicBlock: return "BasicBlock"; 4467 case ISD::ARG_FLAGS: return "ArgFlags"; 4468 case ISD::VALUETYPE: return "ValueType"; 4469 case ISD::Register: return "Register"; 4470 4471 case ISD::Constant: return "Constant"; 4472 case ISD::ConstantFP: return "ConstantFP"; 4473 case ISD::GlobalAddress: return "GlobalAddress"; 4474 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 4475 case ISD::FrameIndex: return "FrameIndex"; 4476 case ISD::JumpTable: return "JumpTable"; 4477 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 4478 case ISD::RETURNADDR: return "RETURNADDR"; 4479 case ISD::FRAMEADDR: return "FRAMEADDR"; 4480 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 4481 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 4482 case ISD::EHSELECTION: return "EHSELECTION"; 4483 case ISD::EH_RETURN: return "EH_RETURN"; 4484 case ISD::ConstantPool: return "ConstantPool"; 4485 case ISD::ExternalSymbol: return "ExternalSymbol"; 4486 case ISD::INTRINSIC_WO_CHAIN: { 4487 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getValue(); 4488 return Intrinsic::getName((Intrinsic::ID)IID); 4489 } 4490 case ISD::INTRINSIC_VOID: 4491 case ISD::INTRINSIC_W_CHAIN: { 4492 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getValue(); 4493 return Intrinsic::getName((Intrinsic::ID)IID); 4494 } 4495 4496 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 4497 case ISD::TargetConstant: return "TargetConstant"; 4498 case ISD::TargetConstantFP:return "TargetConstantFP"; 4499 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 4500 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 4501 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 4502 case ISD::TargetJumpTable: return "TargetJumpTable"; 4503 case ISD::TargetConstantPool: return "TargetConstantPool"; 4504 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 4505 4506 case ISD::CopyToReg: return "CopyToReg"; 4507 case ISD::CopyFromReg: return "CopyFromReg"; 4508 case ISD::UNDEF: return "undef"; 4509 case ISD::MERGE_VALUES: return "merge_values"; 4510 case ISD::INLINEASM: return "inlineasm"; 4511 case ISD::LABEL: return "label"; 4512 case ISD::DECLARE: return "declare"; 4513 case ISD::HANDLENODE: return "handlenode"; 4514 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 4515 case ISD::CALL: return "call"; 4516 4517 // Unary operators 4518 case ISD::FABS: return "fabs"; 4519 case ISD::FNEG: return "fneg"; 4520 case ISD::FSQRT: return "fsqrt"; 4521 case ISD::FSIN: return "fsin"; 4522 case ISD::FCOS: return "fcos"; 4523 case ISD::FPOWI: return "fpowi"; 4524 case ISD::FPOW: return "fpow"; 4525 4526 // Binary operators 4527 case ISD::ADD: return "add"; 4528 case ISD::SUB: return "sub"; 4529 case ISD::MUL: return "mul"; 4530 case ISD::MULHU: return "mulhu"; 4531 case ISD::MULHS: return "mulhs"; 4532 case ISD::SDIV: return "sdiv"; 4533 case ISD::UDIV: return "udiv"; 4534 case ISD::SREM: return "srem"; 4535 case ISD::UREM: return "urem"; 4536 case ISD::SMUL_LOHI: return "smul_lohi"; 4537 case ISD::UMUL_LOHI: return "umul_lohi"; 4538 case ISD::SDIVREM: return "sdivrem"; 4539 case ISD::UDIVREM: return "divrem"; 4540 case ISD::AND: return "and"; 4541 case ISD::OR: return "or"; 4542 case ISD::XOR: return "xor"; 4543 case ISD::SHL: return "shl"; 4544 case ISD::SRA: return "sra"; 4545 case ISD::SRL: return "srl"; 4546 case ISD::ROTL: return "rotl"; 4547 case ISD::ROTR: return "rotr"; 4548 case ISD::FADD: return "fadd"; 4549 case ISD::FSUB: return "fsub"; 4550 case ISD::FMUL: return "fmul"; 4551 case ISD::FDIV: return "fdiv"; 4552 case ISD::FREM: return "frem"; 4553 case ISD::FCOPYSIGN: return "fcopysign"; 4554 case ISD::FGETSIGN: return "fgetsign"; 4555 4556 case ISD::SETCC: return "setcc"; 4557 case ISD::VSETCC: return "vsetcc"; 4558 case ISD::SELECT: return "select"; 4559 case ISD::SELECT_CC: return "select_cc"; 4560 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 4561 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 4562 case ISD::CONCAT_VECTORS: return "concat_vectors"; 4563 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 4564 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 4565 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 4566 case ISD::CARRY_FALSE: return "carry_false"; 4567 case ISD::ADDC: return "addc"; 4568 case ISD::ADDE: return "adde"; 4569 case ISD::SUBC: return "subc"; 4570 case ISD::SUBE: return "sube"; 4571 case ISD::SHL_PARTS: return "shl_parts"; 4572 case ISD::SRA_PARTS: return "sra_parts"; 4573 case ISD::SRL_PARTS: return "srl_parts"; 4574 4575 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 4576 case ISD::INSERT_SUBREG: return "insert_subreg"; 4577 4578 // Conversion operators. 4579 case ISD::SIGN_EXTEND: return "sign_extend"; 4580 case ISD::ZERO_EXTEND: return "zero_extend"; 4581 case ISD::ANY_EXTEND: return "any_extend"; 4582 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 4583 case ISD::TRUNCATE: return "truncate"; 4584 case ISD::FP_ROUND: return "fp_round"; 4585 case ISD::FLT_ROUNDS_: return "flt_rounds"; 4586 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 4587 case ISD::FP_EXTEND: return "fp_extend"; 4588 4589 case ISD::SINT_TO_FP: return "sint_to_fp"; 4590 case ISD::UINT_TO_FP: return "uint_to_fp"; 4591 case ISD::FP_TO_SINT: return "fp_to_sint"; 4592 case ISD::FP_TO_UINT: return "fp_to_uint"; 4593 case ISD::BIT_CONVERT: return "bit_convert"; 4594 4595 // Control flow instructions 4596 case ISD::BR: return "br"; 4597 case ISD::BRIND: return "brind"; 4598 case ISD::BR_JT: return "br_jt"; 4599 case ISD::BRCOND: return "brcond"; 4600 case ISD::BR_CC: return "br_cc"; 4601 case ISD::RET: return "ret"; 4602 case ISD::CALLSEQ_START: return "callseq_start"; 4603 case ISD::CALLSEQ_END: return "callseq_end"; 4604 4605 // Other operators 4606 case ISD::LOAD: return "load"; 4607 case ISD::STORE: return "store"; 4608 case ISD::VAARG: return "vaarg"; 4609 case ISD::VACOPY: return "vacopy"; 4610 case ISD::VAEND: return "vaend"; 4611 case ISD::VASTART: return "vastart"; 4612 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 4613 case ISD::EXTRACT_ELEMENT: return "extract_element"; 4614 case ISD::BUILD_PAIR: return "build_pair"; 4615 case ISD::STACKSAVE: return "stacksave"; 4616 case ISD::STACKRESTORE: return "stackrestore"; 4617 case ISD::TRAP: return "trap"; 4618 4619 // Bit manipulation 4620 case ISD::BSWAP: return "bswap"; 4621 case ISD::CTPOP: return "ctpop"; 4622 case ISD::CTTZ: return "cttz"; 4623 case ISD::CTLZ: return "ctlz"; 4624 4625 // Debug info 4626 case ISD::LOCATION: return "location"; 4627 case ISD::DEBUG_LOC: return "debug_loc"; 4628 4629 // Trampolines 4630 case ISD::TRAMPOLINE: return "trampoline"; 4631 4632 case ISD::CONDCODE: 4633 switch (cast<CondCodeSDNode>(this)->get()) { 4634 default: assert(0 && "Unknown setcc condition!"); 4635 case ISD::SETOEQ: return "setoeq"; 4636 case ISD::SETOGT: return "setogt"; 4637 case ISD::SETOGE: return "setoge"; 4638 case ISD::SETOLT: return "setolt"; 4639 case ISD::SETOLE: return "setole"; 4640 case ISD::SETONE: return "setone"; 4641 4642 case ISD::SETO: return "seto"; 4643 case ISD::SETUO: return "setuo"; 4644 case ISD::SETUEQ: return "setue"; 4645 case ISD::SETUGT: return "setugt"; 4646 case ISD::SETUGE: return "setuge"; 4647 case ISD::SETULT: return "setult"; 4648 case ISD::SETULE: return "setule"; 4649 case ISD::SETUNE: return "setune"; 4650 4651 case ISD::SETEQ: return "seteq"; 4652 case ISD::SETGT: return "setgt"; 4653 case ISD::SETGE: return "setge"; 4654 case ISD::SETLT: return "setlt"; 4655 case ISD::SETLE: return "setle"; 4656 case ISD::SETNE: return "setne"; 4657 } 4658 } 4659} 4660 4661const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 4662 switch (AM) { 4663 default: 4664 return ""; 4665 case ISD::PRE_INC: 4666 return "<pre-inc>"; 4667 case ISD::PRE_DEC: 4668 return "<pre-dec>"; 4669 case ISD::POST_INC: 4670 return "<post-inc>"; 4671 case ISD::POST_DEC: 4672 return "<post-dec>"; 4673 } 4674} 4675 4676std::string ISD::ArgFlagsTy::getArgFlagsString() { 4677 std::string S = "< "; 4678 4679 if (isZExt()) 4680 S += "zext "; 4681 if (isSExt()) 4682 S += "sext "; 4683 if (isInReg()) 4684 S += "inreg "; 4685 if (isSRet()) 4686 S += "sret "; 4687 if (isByVal()) 4688 S += "byval "; 4689 if (isNest()) 4690 S += "nest "; 4691 if (getByValAlign()) 4692 S += "byval-align:" + utostr(getByValAlign()) + " "; 4693 if (getOrigAlign()) 4694 S += "orig-align:" + utostr(getOrigAlign()) + " "; 4695 if (getByValSize()) 4696 S += "byval-size:" + utostr(getByValSize()) + " "; 4697 return S + ">"; 4698} 4699 4700void SDNode::dump() const { dump(0); } 4701void SDNode::dump(const SelectionDAG *G) const { 4702 cerr << (void*)this << ": "; 4703 4704 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 4705 if (i) cerr << ","; 4706 if (getValueType(i) == MVT::Other) 4707 cerr << "ch"; 4708 else 4709 cerr << getValueType(i).getMVTString(); 4710 } 4711 cerr << " = " << getOperationName(G); 4712 4713 cerr << " "; 4714 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 4715 if (i) cerr << ", "; 4716 cerr << (void*)getOperand(i).Val; 4717 if (unsigned RN = getOperand(i).ResNo) 4718 cerr << ":" << RN; 4719 } 4720 4721 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 4722 SDNode *Mask = getOperand(2).Val; 4723 cerr << "<"; 4724 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 4725 if (i) cerr << ","; 4726 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 4727 cerr << "u"; 4728 else 4729 cerr << cast<ConstantSDNode>(Mask->getOperand(i))->getValue(); 4730 } 4731 cerr << ">"; 4732 } 4733 4734 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 4735 cerr << "<" << CSDN->getValue() << ">"; 4736 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 4737 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 4738 cerr << "<" << CSDN->getValueAPF().convertToFloat() << ">"; 4739 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 4740 cerr << "<" << CSDN->getValueAPF().convertToDouble() << ">"; 4741 else { 4742 cerr << "<APFloat("; 4743 CSDN->getValueAPF().convertToAPInt().dump(); 4744 cerr << ")>"; 4745 } 4746 } else if (const GlobalAddressSDNode *GADN = 4747 dyn_cast<GlobalAddressSDNode>(this)) { 4748 int offset = GADN->getOffset(); 4749 cerr << "<"; 4750 WriteAsOperand(*cerr.stream(), GADN->getGlobal()) << ">"; 4751 if (offset > 0) 4752 cerr << " + " << offset; 4753 else 4754 cerr << " " << offset; 4755 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 4756 cerr << "<" << FIDN->getIndex() << ">"; 4757 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 4758 cerr << "<" << JTDN->getIndex() << ">"; 4759 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 4760 int offset = CP->getOffset(); 4761 if (CP->isMachineConstantPoolEntry()) 4762 cerr << "<" << *CP->getMachineCPVal() << ">"; 4763 else 4764 cerr << "<" << *CP->getConstVal() << ">"; 4765 if (offset > 0) 4766 cerr << " + " << offset; 4767 else 4768 cerr << " " << offset; 4769 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 4770 cerr << "<"; 4771 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 4772 if (LBB) 4773 cerr << LBB->getName() << " "; 4774 cerr << (const void*)BBDN->getBasicBlock() << ">"; 4775 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 4776 if (G && R->getReg() && 4777 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 4778 cerr << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 4779 } else { 4780 cerr << " #" << R->getReg(); 4781 } 4782 } else if (const ExternalSymbolSDNode *ES = 4783 dyn_cast<ExternalSymbolSDNode>(this)) { 4784 cerr << "'" << ES->getSymbol() << "'"; 4785 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 4786 if (M->getValue()) 4787 cerr << "<" << M->getValue() << ">"; 4788 else 4789 cerr << "<null>"; 4790 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 4791 if (M->MO.getValue()) 4792 cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 4793 else 4794 cerr << "<null:" << M->MO.getOffset() << ">"; 4795 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 4796 cerr << N->getArgFlags().getArgFlagsString(); 4797 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 4798 cerr << ":" << N->getVT().getMVTString(); 4799 } 4800 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 4801 const Value *SrcValue = LD->getSrcValue(); 4802 int SrcOffset = LD->getSrcValueOffset(); 4803 cerr << " <"; 4804 if (SrcValue) 4805 cerr << SrcValue; 4806 else 4807 cerr << "null"; 4808 cerr << ":" << SrcOffset << ">"; 4809 4810 bool doExt = true; 4811 switch (LD->getExtensionType()) { 4812 default: doExt = false; break; 4813 case ISD::EXTLOAD: 4814 cerr << " <anyext "; 4815 break; 4816 case ISD::SEXTLOAD: 4817 cerr << " <sext "; 4818 break; 4819 case ISD::ZEXTLOAD: 4820 cerr << " <zext "; 4821 break; 4822 } 4823 if (doExt) 4824 cerr << LD->getMemoryVT().getMVTString() << ">"; 4825 4826 const char *AM = getIndexedModeName(LD->getAddressingMode()); 4827 if (*AM) 4828 cerr << " " << AM; 4829 if (LD->isVolatile()) 4830 cerr << " <volatile>"; 4831 cerr << " alignment=" << LD->getAlignment(); 4832 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 4833 const Value *SrcValue = ST->getSrcValue(); 4834 int SrcOffset = ST->getSrcValueOffset(); 4835 cerr << " <"; 4836 if (SrcValue) 4837 cerr << SrcValue; 4838 else 4839 cerr << "null"; 4840 cerr << ":" << SrcOffset << ">"; 4841 4842 if (ST->isTruncatingStore()) 4843 cerr << " <trunc " 4844 << ST->getMemoryVT().getMVTString() << ">"; 4845 4846 const char *AM = getIndexedModeName(ST->getAddressingMode()); 4847 if (*AM) 4848 cerr << " " << AM; 4849 if (ST->isVolatile()) 4850 cerr << " <volatile>"; 4851 cerr << " alignment=" << ST->getAlignment(); 4852 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 4853 const Value *SrcValue = AT->getSrcValue(); 4854 int SrcOffset = AT->getSrcValueOffset(); 4855 cerr << " <"; 4856 if (SrcValue) 4857 cerr << SrcValue; 4858 else 4859 cerr << "null"; 4860 cerr << ":" << SrcOffset << ">"; 4861 if (AT->isVolatile()) 4862 cerr << " <volatile>"; 4863 cerr << " alignment=" << AT->getAlignment(); 4864 } 4865} 4866 4867static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 4868 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4869 if (N->getOperand(i).Val->hasOneUse()) 4870 DumpNodes(N->getOperand(i).Val, indent+2, G); 4871 else 4872 cerr << "\n" << std::string(indent+2, ' ') 4873 << (void*)N->getOperand(i).Val << ": <multiple use>"; 4874 4875 4876 cerr << "\n" << std::string(indent, ' '); 4877 N->dump(G); 4878} 4879 4880void SelectionDAG::dump() const { 4881 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 4882 std::vector<const SDNode*> Nodes; 4883 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 4884 I != E; ++I) 4885 Nodes.push_back(I); 4886 4887 std::sort(Nodes.begin(), Nodes.end()); 4888 4889 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 4890 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 4891 DumpNodes(Nodes[i], 2, this); 4892 } 4893 4894 if (getRoot().Val) DumpNodes(getRoot().Val, 2, this); 4895 4896 cerr << "\n\n"; 4897} 4898 4899const Type *ConstantPoolSDNode::getType() const { 4900 if (isMachineConstantPoolEntry()) 4901 return Val.MachineCPVal->getType(); 4902 return Val.ConstVal->getType(); 4903} 4904