SelectionDAG.cpp revision 35b4707edb32008b1a7976dcbf3920b1160fc1c6
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/Function.h" 17#include "llvm/GlobalAlias.h" 18#include "llvm/GlobalVariable.h" 19#include "llvm/Intrinsics.h" 20#include "llvm/DerivedTypes.h" 21#include "llvm/Assembly/Writer.h" 22#include "llvm/CallingConv.h" 23#include "llvm/CodeGen/MachineBasicBlock.h" 24#include "llvm/CodeGen/MachineConstantPool.h" 25#include "llvm/CodeGen/MachineFrameInfo.h" 26#include "llvm/CodeGen/MachineModuleInfo.h" 27#include "llvm/CodeGen/PseudoSourceValue.h" 28#include "llvm/Target/TargetRegisterInfo.h" 29#include "llvm/Target/TargetData.h" 30#include "llvm/Target/TargetLowering.h" 31#include "llvm/Target/TargetOptions.h" 32#include "llvm/Target/TargetInstrInfo.h" 33#include "llvm/Target/TargetMachine.h" 34#include "llvm/Support/CommandLine.h" 35#include "llvm/Support/ErrorHandling.h" 36#include "llvm/Support/ManagedStatic.h" 37#include "llvm/Support/MathExtras.h" 38#include "llvm/Support/raw_ostream.h" 39#include "llvm/System/Mutex.h" 40#include "llvm/ADT/SetVector.h" 41#include "llvm/ADT/SmallPtrSet.h" 42#include "llvm/ADT/SmallSet.h" 43#include "llvm/ADT/SmallVector.h" 44#include "llvm/ADT/StringExtras.h" 45#include <algorithm> 46#include <cmath> 47using namespace llvm; 48 49/// makeVTList - Return an instance of the SDVTList struct initialized with the 50/// specified members. 51static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 52 SDVTList Res = {VTs, NumVTs}; 53 return Res; 54} 55 56static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 57 switch (VT.getSimpleVT().SimpleTy) { 58 default: llvm_unreachable("Unknown FP format"); 59 case MVT::f32: return &APFloat::IEEEsingle; 60 case MVT::f64: return &APFloat::IEEEdouble; 61 case MVT::f80: return &APFloat::x87DoubleExtended; 62 case MVT::f128: return &APFloat::IEEEquad; 63 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 64 } 65} 66 67SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 68 69//===----------------------------------------------------------------------===// 70// ConstantFPSDNode Class 71//===----------------------------------------------------------------------===// 72 73/// isExactlyValue - We don't rely on operator== working on double values, as 74/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 75/// As such, this method can be used to do an exact bit-for-bit comparison of 76/// two floating point values. 77bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 78 return getValueAPF().bitwiseIsEqual(V); 79} 80 81bool ConstantFPSDNode::isValueValidForType(EVT VT, 82 const APFloat& Val) { 83 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 84 85 // PPC long double cannot be converted to any other type. 86 if (VT == MVT::ppcf128 || 87 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 88 return false; 89 90 // convert modifies in place, so make a copy. 91 APFloat Val2 = APFloat(Val); 92 bool losesInfo; 93 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 94 &losesInfo); 95 return !losesInfo; 96} 97 98//===----------------------------------------------------------------------===// 99// ISD Namespace 100//===----------------------------------------------------------------------===// 101 102/// isBuildVectorAllOnes - Return true if the specified node is a 103/// BUILD_VECTOR where all of the elements are ~0 or undef. 104bool ISD::isBuildVectorAllOnes(const SDNode *N) { 105 // Look through a bit convert. 106 if (N->getOpcode() == ISD::BIT_CONVERT) 107 N = N->getOperand(0).getNode(); 108 109 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 110 111 unsigned i = 0, e = N->getNumOperands(); 112 113 // Skip over all of the undef values. 114 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 115 ++i; 116 117 // Do not accept an all-undef vector. 118 if (i == e) return false; 119 120 // Do not accept build_vectors that aren't all constants or which have non-~0 121 // elements. 122 SDValue NotZero = N->getOperand(i); 123 if (isa<ConstantSDNode>(NotZero)) { 124 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 125 return false; 126 } else if (isa<ConstantFPSDNode>(NotZero)) { 127 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 128 bitcastToAPInt().isAllOnesValue()) 129 return false; 130 } else 131 return false; 132 133 // Okay, we have at least one ~0 value, check to see if the rest match or are 134 // undefs. 135 for (++i; i != e; ++i) 136 if (N->getOperand(i) != NotZero && 137 N->getOperand(i).getOpcode() != ISD::UNDEF) 138 return false; 139 return true; 140} 141 142 143/// isBuildVectorAllZeros - Return true if the specified node is a 144/// BUILD_VECTOR where all of the elements are 0 or undef. 145bool ISD::isBuildVectorAllZeros(const SDNode *N) { 146 // Look through a bit convert. 147 if (N->getOpcode() == ISD::BIT_CONVERT) 148 N = N->getOperand(0).getNode(); 149 150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 151 152 unsigned i = 0, e = N->getNumOperands(); 153 154 // Skip over all of the undef values. 155 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 156 ++i; 157 158 // Do not accept an all-undef vector. 159 if (i == e) return false; 160 161 // Do not accept build_vectors that aren't all constants or which have non-0 162 // elements. 163 SDValue Zero = N->getOperand(i); 164 if (isa<ConstantSDNode>(Zero)) { 165 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 166 return false; 167 } else if (isa<ConstantFPSDNode>(Zero)) { 168 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 169 return false; 170 } else 171 return false; 172 173 // Okay, we have at least one 0 value, check to see if the rest match or are 174 // undefs. 175 for (++i; i != e; ++i) 176 if (N->getOperand(i) != Zero && 177 N->getOperand(i).getOpcode() != ISD::UNDEF) 178 return false; 179 return true; 180} 181 182/// isScalarToVector - Return true if the specified node is a 183/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 184/// element is not an undef. 185bool ISD::isScalarToVector(const SDNode *N) { 186 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 187 return true; 188 189 if (N->getOpcode() != ISD::BUILD_VECTOR) 190 return false; 191 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 192 return false; 193 unsigned NumElems = N->getNumOperands(); 194 for (unsigned i = 1; i < NumElems; ++i) { 195 SDValue V = N->getOperand(i); 196 if (V.getOpcode() != ISD::UNDEF) 197 return false; 198 } 199 return true; 200} 201 202 203/// isDebugLabel - Return true if the specified node represents a debug 204/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 205bool ISD::isDebugLabel(const SDNode *N) { 206 SDValue Zero; 207 if (N->getOpcode() == ISD::DBG_LABEL) 208 return true; 209 if (N->isMachineOpcode() && 210 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 211 return true; 212 return false; 213} 214 215/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 216/// when given the operation for (X op Y). 217ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 218 // To perform this operation, we just need to swap the L and G bits of the 219 // operation. 220 unsigned OldL = (Operation >> 2) & 1; 221 unsigned OldG = (Operation >> 1) & 1; 222 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 223 (OldL << 1) | // New G bit 224 (OldG << 2)); // New L bit. 225} 226 227/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 228/// 'op' is a valid SetCC operation. 229ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 230 unsigned Operation = Op; 231 if (isInteger) 232 Operation ^= 7; // Flip L, G, E bits, but not U. 233 else 234 Operation ^= 15; // Flip all of the condition bits. 235 236 if (Operation > ISD::SETTRUE2) 237 Operation &= ~8; // Don't let N and U bits get set. 238 239 return ISD::CondCode(Operation); 240} 241 242 243/// isSignedOp - For an integer comparison, return 1 if the comparison is a 244/// signed operation and 2 if the result is an unsigned comparison. Return zero 245/// if the operation does not depend on the sign of the input (setne and seteq). 246static int isSignedOp(ISD::CondCode Opcode) { 247 switch (Opcode) { 248 default: llvm_unreachable("Illegal integer setcc operation!"); 249 case ISD::SETEQ: 250 case ISD::SETNE: return 0; 251 case ISD::SETLT: 252 case ISD::SETLE: 253 case ISD::SETGT: 254 case ISD::SETGE: return 1; 255 case ISD::SETULT: 256 case ISD::SETULE: 257 case ISD::SETUGT: 258 case ISD::SETUGE: return 2; 259 } 260} 261 262/// getSetCCOrOperation - Return the result of a logical OR between different 263/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 264/// returns SETCC_INVALID if it is not possible to represent the resultant 265/// comparison. 266ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 267 bool isInteger) { 268 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 269 // Cannot fold a signed integer setcc with an unsigned integer setcc. 270 return ISD::SETCC_INVALID; 271 272 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 273 274 // If the N and U bits get set then the resultant comparison DOES suddenly 275 // care about orderedness, and is true when ordered. 276 if (Op > ISD::SETTRUE2) 277 Op &= ~16; // Clear the U bit if the N bit is set. 278 279 // Canonicalize illegal integer setcc's. 280 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 281 Op = ISD::SETNE; 282 283 return ISD::CondCode(Op); 284} 285 286/// getSetCCAndOperation - Return the result of a logical AND between different 287/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 288/// function returns zero if it is not possible to represent the resultant 289/// comparison. 290ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 291 bool isInteger) { 292 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 293 // Cannot fold a signed setcc with an unsigned setcc. 294 return ISD::SETCC_INVALID; 295 296 // Combine all of the condition bits. 297 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 298 299 // Canonicalize illegal integer setcc's. 300 if (isInteger) { 301 switch (Result) { 302 default: break; 303 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 304 case ISD::SETOEQ: // SETEQ & SETU[LG]E 305 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 306 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 307 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 308 } 309 } 310 311 return Result; 312} 313 314const TargetMachine &SelectionDAG::getTarget() const { 315 return MF->getTarget(); 316} 317 318//===----------------------------------------------------------------------===// 319// SDNode Profile Support 320//===----------------------------------------------------------------------===// 321 322/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 323/// 324static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 325 ID.AddInteger(OpC); 326} 327 328/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 329/// solely with their pointer. 330static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 331 ID.AddPointer(VTList.VTs); 332} 333 334/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 335/// 336static void AddNodeIDOperands(FoldingSetNodeID &ID, 337 const SDValue *Ops, unsigned NumOps) { 338 for (; NumOps; --NumOps, ++Ops) { 339 ID.AddPointer(Ops->getNode()); 340 ID.AddInteger(Ops->getResNo()); 341 } 342} 343 344/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 345/// 346static void AddNodeIDOperands(FoldingSetNodeID &ID, 347 const SDUse *Ops, unsigned NumOps) { 348 for (; NumOps; --NumOps, ++Ops) { 349 ID.AddPointer(Ops->getNode()); 350 ID.AddInteger(Ops->getResNo()); 351 } 352} 353 354static void AddNodeIDNode(FoldingSetNodeID &ID, 355 unsigned short OpC, SDVTList VTList, 356 const SDValue *OpList, unsigned N) { 357 AddNodeIDOpcode(ID, OpC); 358 AddNodeIDValueTypes(ID, VTList); 359 AddNodeIDOperands(ID, OpList, N); 360} 361 362/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 363/// the NodeID data. 364static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 365 switch (N->getOpcode()) { 366 case ISD::TargetExternalSymbol: 367 case ISD::ExternalSymbol: 368 llvm_unreachable("Should only be used on nodes with operands"); 369 default: break; // Normal nodes don't need extra info. 370 case ISD::TargetConstant: 371 case ISD::Constant: 372 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 373 break; 374 case ISD::TargetConstantFP: 375 case ISD::ConstantFP: { 376 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 377 break; 378 } 379 case ISD::TargetGlobalAddress: 380 case ISD::GlobalAddress: 381 case ISD::TargetGlobalTLSAddress: 382 case ISD::GlobalTLSAddress: { 383 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 384 ID.AddPointer(GA->getGlobal()); 385 ID.AddInteger(GA->getOffset()); 386 ID.AddInteger(GA->getTargetFlags()); 387 break; 388 } 389 case ISD::BasicBlock: 390 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 391 break; 392 case ISD::Register: 393 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 394 break; 395 case ISD::DBG_STOPPOINT: { 396 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 397 ID.AddInteger(DSP->getLine()); 398 ID.AddInteger(DSP->getColumn()); 399 ID.AddPointer(DSP->getCompileUnit()); 400 break; 401 } 402 case ISD::SRCVALUE: 403 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 404 break; 405 case ISD::MEMOPERAND: { 406 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 407 MO.Profile(ID); 408 break; 409 } 410 case ISD::FrameIndex: 411 case ISD::TargetFrameIndex: 412 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 413 break; 414 case ISD::JumpTable: 415 case ISD::TargetJumpTable: 416 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 417 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 418 break; 419 case ISD::ConstantPool: 420 case ISD::TargetConstantPool: { 421 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 422 ID.AddInteger(CP->getAlignment()); 423 ID.AddInteger(CP->getOffset()); 424 if (CP->isMachineConstantPoolEntry()) 425 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 426 else 427 ID.AddPointer(CP->getConstVal()); 428 ID.AddInteger(CP->getTargetFlags()); 429 break; 430 } 431 case ISD::LOAD: { 432 const LoadSDNode *LD = cast<LoadSDNode>(N); 433 ID.AddInteger(LD->getMemoryVT().getRawBits()); 434 ID.AddInteger(LD->getRawSubclassData()); 435 break; 436 } 437 case ISD::STORE: { 438 const StoreSDNode *ST = cast<StoreSDNode>(N); 439 ID.AddInteger(ST->getMemoryVT().getRawBits()); 440 ID.AddInteger(ST->getRawSubclassData()); 441 break; 442 } 443 case ISD::ATOMIC_CMP_SWAP: 444 case ISD::ATOMIC_SWAP: 445 case ISD::ATOMIC_LOAD_ADD: 446 case ISD::ATOMIC_LOAD_SUB: 447 case ISD::ATOMIC_LOAD_AND: 448 case ISD::ATOMIC_LOAD_OR: 449 case ISD::ATOMIC_LOAD_XOR: 450 case ISD::ATOMIC_LOAD_NAND: 451 case ISD::ATOMIC_LOAD_MIN: 452 case ISD::ATOMIC_LOAD_MAX: 453 case ISD::ATOMIC_LOAD_UMIN: 454 case ISD::ATOMIC_LOAD_UMAX: { 455 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 456 ID.AddInteger(AT->getMemoryVT().getRawBits()); 457 ID.AddInteger(AT->getRawSubclassData()); 458 break; 459 } 460 case ISD::VECTOR_SHUFFLE: { 461 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 462 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 463 i != e; ++i) 464 ID.AddInteger(SVN->getMaskElt(i)); 465 break; 466 } 467 } // end switch (N->getOpcode()) 468} 469 470/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 471/// data. 472static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 473 AddNodeIDOpcode(ID, N->getOpcode()); 474 // Add the return value info. 475 AddNodeIDValueTypes(ID, N->getVTList()); 476 // Add the operand info. 477 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 478 479 // Handle SDNode leafs with special info. 480 AddNodeIDCustom(ID, N); 481} 482 483/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 484/// the CSE map that carries alignment, volatility, indexing mode, and 485/// extension/truncation information. 486/// 487static inline unsigned 488encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, 489 bool isVolatile, unsigned Alignment) { 490 assert((ConvType & 3) == ConvType && 491 "ConvType may not require more than 2 bits!"); 492 assert((AM & 7) == AM && 493 "AM may not require more than 3 bits!"); 494 return ConvType | 495 (AM << 2) | 496 (isVolatile << 5) | 497 ((Log2_32(Alignment) + 1) << 6); 498} 499 500//===----------------------------------------------------------------------===// 501// SelectionDAG Class 502//===----------------------------------------------------------------------===// 503 504/// doNotCSE - Return true if CSE should not be performed for this node. 505static bool doNotCSE(SDNode *N) { 506 if (N->getValueType(0) == MVT::Flag) 507 return true; // Never CSE anything that produces a flag. 508 509 switch (N->getOpcode()) { 510 default: break; 511 case ISD::HANDLENODE: 512 case ISD::DBG_LABEL: 513 case ISD::DBG_STOPPOINT: 514 case ISD::EH_LABEL: 515 case ISD::DECLARE: 516 return true; // Never CSE these nodes. 517 } 518 519 // Check that remaining values produced are not flags. 520 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 521 if (N->getValueType(i) == MVT::Flag) 522 return true; // Never CSE anything that produces a flag. 523 524 return false; 525} 526 527/// RemoveDeadNodes - This method deletes all unreachable nodes in the 528/// SelectionDAG. 529void SelectionDAG::RemoveDeadNodes() { 530 // Create a dummy node (which is not added to allnodes), that adds a reference 531 // to the root node, preventing it from being deleted. 532 HandleSDNode Dummy(getRoot()); 533 534 SmallVector<SDNode*, 128> DeadNodes; 535 536 // Add all obviously-dead nodes to the DeadNodes worklist. 537 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 538 if (I->use_empty()) 539 DeadNodes.push_back(I); 540 541 RemoveDeadNodes(DeadNodes); 542 543 // If the root changed (e.g. it was a dead load, update the root). 544 setRoot(Dummy.getValue()); 545} 546 547/// RemoveDeadNodes - This method deletes the unreachable nodes in the 548/// given list, and any nodes that become unreachable as a result. 549void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 550 DAGUpdateListener *UpdateListener) { 551 552 // Process the worklist, deleting the nodes and adding their uses to the 553 // worklist. 554 while (!DeadNodes.empty()) { 555 SDNode *N = DeadNodes.pop_back_val(); 556 557 if (UpdateListener) 558 UpdateListener->NodeDeleted(N, 0); 559 560 // Take the node out of the appropriate CSE map. 561 RemoveNodeFromCSEMaps(N); 562 563 // Next, brutally remove the operand list. This is safe to do, as there are 564 // no cycles in the graph. 565 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 566 SDUse &Use = *I++; 567 SDNode *Operand = Use.getNode(); 568 Use.set(SDValue()); 569 570 // Now that we removed this operand, see if there are no uses of it left. 571 if (Operand->use_empty()) 572 DeadNodes.push_back(Operand); 573 } 574 575 DeallocateNode(N); 576 } 577} 578 579void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 580 SmallVector<SDNode*, 16> DeadNodes(1, N); 581 RemoveDeadNodes(DeadNodes, UpdateListener); 582} 583 584void SelectionDAG::DeleteNode(SDNode *N) { 585 // First take this out of the appropriate CSE map. 586 RemoveNodeFromCSEMaps(N); 587 588 // Finally, remove uses due to operands of this node, remove from the 589 // AllNodes list, and delete the node. 590 DeleteNodeNotInCSEMaps(N); 591} 592 593void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 594 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 595 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 596 597 // Drop all of the operands and decrement used node's use counts. 598 N->DropOperands(); 599 600 DeallocateNode(N); 601} 602 603void SelectionDAG::DeallocateNode(SDNode *N) { 604 if (N->OperandsNeedDelete) 605 delete[] N->OperandList; 606 607 // Set the opcode to DELETED_NODE to help catch bugs when node 608 // memory is reallocated. 609 N->NodeType = ISD::DELETED_NODE; 610 611 NodeAllocator.Deallocate(AllNodes.remove(N)); 612} 613 614/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 615/// correspond to it. This is useful when we're about to delete or repurpose 616/// the node. We don't want future request for structurally identical nodes 617/// to return N anymore. 618bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 619 bool Erased = false; 620 switch (N->getOpcode()) { 621 case ISD::EntryToken: 622 llvm_unreachable("EntryToken should not be in CSEMaps!"); 623 return false; 624 case ISD::HANDLENODE: return false; // noop. 625 case ISD::CONDCODE: 626 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 627 "Cond code doesn't exist!"); 628 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 629 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 630 break; 631 case ISD::ExternalSymbol: 632 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 633 break; 634 case ISD::TargetExternalSymbol: { 635 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 636 Erased = TargetExternalSymbols.erase( 637 std::pair<std::string,unsigned char>(ESN->getSymbol(), 638 ESN->getTargetFlags())); 639 break; 640 } 641 case ISD::VALUETYPE: { 642 EVT VT = cast<VTSDNode>(N)->getVT(); 643 if (VT.isExtended()) { 644 Erased = ExtendedValueTypeNodes.erase(VT); 645 } else { 646 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 647 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 648 } 649 break; 650 } 651 default: 652 // Remove it from the CSE Map. 653 Erased = CSEMap.RemoveNode(N); 654 break; 655 } 656#ifndef NDEBUG 657 // Verify that the node was actually in one of the CSE maps, unless it has a 658 // flag result (which cannot be CSE'd) or is one of the special cases that are 659 // not subject to CSE. 660 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 661 !N->isMachineOpcode() && !doNotCSE(N)) { 662 N->dump(this); 663 cerr << "\n"; 664 llvm_unreachable("Node is not in map!"); 665 } 666#endif 667 return Erased; 668} 669 670/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 671/// maps and modified in place. Add it back to the CSE maps, unless an identical 672/// node already exists, in which case transfer all its users to the existing 673/// node. This transfer can potentially trigger recursive merging. 674/// 675void 676SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 677 DAGUpdateListener *UpdateListener) { 678 // For node types that aren't CSE'd, just act as if no identical node 679 // already exists. 680 if (!doNotCSE(N)) { 681 SDNode *Existing = CSEMap.GetOrInsertNode(N); 682 if (Existing != N) { 683 // If there was already an existing matching node, use ReplaceAllUsesWith 684 // to replace the dead one with the existing one. This can cause 685 // recursive merging of other unrelated nodes down the line. 686 ReplaceAllUsesWith(N, Existing, UpdateListener); 687 688 // N is now dead. Inform the listener if it exists and delete it. 689 if (UpdateListener) 690 UpdateListener->NodeDeleted(N, Existing); 691 DeleteNodeNotInCSEMaps(N); 692 return; 693 } 694 } 695 696 // If the node doesn't already exist, we updated it. Inform a listener if 697 // it exists. 698 if (UpdateListener) 699 UpdateListener->NodeUpdated(N); 700} 701 702/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 703/// were replaced with those specified. If this node is never memoized, 704/// return null, otherwise return a pointer to the slot it would take. If a 705/// node already exists with these operands, the slot will be non-null. 706SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 707 void *&InsertPos) { 708 if (doNotCSE(N)) 709 return 0; 710 711 SDValue Ops[] = { Op }; 712 FoldingSetNodeID ID; 713 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 714 AddNodeIDCustom(ID, N); 715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 716} 717 718/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 719/// were replaced with those specified. If this node is never memoized, 720/// return null, otherwise return a pointer to the slot it would take. If a 721/// node already exists with these operands, the slot will be non-null. 722SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 723 SDValue Op1, SDValue Op2, 724 void *&InsertPos) { 725 if (doNotCSE(N)) 726 return 0; 727 728 SDValue Ops[] = { Op1, Op2 }; 729 FoldingSetNodeID ID; 730 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 731 AddNodeIDCustom(ID, N); 732 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 733} 734 735 736/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 737/// were replaced with those specified. If this node is never memoized, 738/// return null, otherwise return a pointer to the slot it would take. If a 739/// node already exists with these operands, the slot will be non-null. 740SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 741 const SDValue *Ops,unsigned NumOps, 742 void *&InsertPos) { 743 if (doNotCSE(N)) 744 return 0; 745 746 FoldingSetNodeID ID; 747 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 748 AddNodeIDCustom(ID, N); 749 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 750} 751 752/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 753void SelectionDAG::VerifyNode(SDNode *N) { 754 switch (N->getOpcode()) { 755 default: 756 break; 757 case ISD::BUILD_PAIR: { 758 EVT VT = N->getValueType(0); 759 assert(N->getNumValues() == 1 && "Too many results!"); 760 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 761 "Wrong return type!"); 762 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 763 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 764 "Mismatched operand types!"); 765 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 766 "Wrong operand type!"); 767 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 768 "Wrong return type size"); 769 break; 770 } 771 case ISD::BUILD_VECTOR: { 772 assert(N->getNumValues() == 1 && "Too many results!"); 773 assert(N->getValueType(0).isVector() && "Wrong return type!"); 774 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 775 "Wrong number of operands!"); 776 EVT EltVT = N->getValueType(0).getVectorElementType(); 777 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 778 assert((I->getValueType() == EltVT || 779 (EltVT.isInteger() && I->getValueType().isInteger() && 780 EltVT.bitsLE(I->getValueType()))) && 781 "Wrong operand type!"); 782 break; 783 } 784 } 785} 786 787/// getEVTAlignment - Compute the default alignment value for the 788/// given type. 789/// 790unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 791 const Type *Ty = VT == MVT::iPTR ? 792 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 793 VT.getTypeForEVT(*getContext()); 794 795 return TLI.getTargetData()->getABITypeAlignment(Ty); 796} 797 798// EntryNode could meaningfully have debug info if we can find it... 799SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 800 : TLI(tli), FLI(fli), DW(0), 801 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(), 802 getVTList(MVT::Other)), Root(getEntryNode()) { 803 AllNodes.push_back(&EntryNode); 804} 805 806void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 807 DwarfWriter *dw) { 808 MF = &mf; 809 MMI = mmi; 810 DW = dw; 811 Context = &mf.getFunction()->getContext(); 812} 813 814SelectionDAG::~SelectionDAG() { 815 allnodes_clear(); 816} 817 818void SelectionDAG::allnodes_clear() { 819 assert(&*AllNodes.begin() == &EntryNode); 820 AllNodes.remove(AllNodes.begin()); 821 while (!AllNodes.empty()) 822 DeallocateNode(AllNodes.begin()); 823} 824 825void SelectionDAG::clear() { 826 allnodes_clear(); 827 OperandAllocator.Reset(); 828 CSEMap.clear(); 829 830 ExtendedValueTypeNodes.clear(); 831 ExternalSymbols.clear(); 832 TargetExternalSymbols.clear(); 833 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 834 static_cast<CondCodeSDNode*>(0)); 835 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 836 static_cast<SDNode*>(0)); 837 838 EntryNode.UseList = 0; 839 AllNodes.push_back(&EntryNode); 840 Root = getEntryNode(); 841} 842 843SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 844 if (Op.getValueType() == VT) return Op; 845 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 846 VT.getSizeInBits()); 847 return getNode(ISD::AND, DL, Op.getValueType(), Op, 848 getConstant(Imm, Op.getValueType())); 849} 850 851/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 852/// 853SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 854 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 855 SDValue NegOne = 856 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 857 return getNode(ISD::XOR, DL, VT, Val, NegOne); 858} 859 860SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 861 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 862 assert((EltVT.getSizeInBits() >= 64 || 863 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 864 "getConstant with a uint64_t value that doesn't fit in the type!"); 865 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 866} 867 868SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 869 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 870} 871 872SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 873 assert(VT.isInteger() && "Cannot create FP integer constant!"); 874 875 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 876 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 877 "APInt size does not match type size!"); 878 879 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 880 FoldingSetNodeID ID; 881 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 882 ID.AddPointer(&Val); 883 void *IP = 0; 884 SDNode *N = NULL; 885 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 886 if (!VT.isVector()) 887 return SDValue(N, 0); 888 if (!N) { 889 N = NodeAllocator.Allocate<ConstantSDNode>(); 890 new (N) ConstantSDNode(isT, &Val, EltVT); 891 CSEMap.InsertNode(N, IP); 892 AllNodes.push_back(N); 893 } 894 895 SDValue Result(N, 0); 896 if (VT.isVector()) { 897 SmallVector<SDValue, 8> Ops; 898 Ops.assign(VT.getVectorNumElements(), Result); 899 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 900 VT, &Ops[0], Ops.size()); 901 } 902 return Result; 903} 904 905SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 906 return getConstant(Val, TLI.getPointerTy(), isTarget); 907} 908 909 910SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 911 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 912} 913 914SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 915 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 916 917 EVT EltVT = 918 VT.isVector() ? VT.getVectorElementType() : VT; 919 920 // Do the map lookup using the actual bit pattern for the floating point 921 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 922 // we don't have issues with SNANs. 923 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 924 FoldingSetNodeID ID; 925 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 926 ID.AddPointer(&V); 927 void *IP = 0; 928 SDNode *N = NULL; 929 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 930 if (!VT.isVector()) 931 return SDValue(N, 0); 932 if (!N) { 933 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 934 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 935 CSEMap.InsertNode(N, IP); 936 AllNodes.push_back(N); 937 } 938 939 SDValue Result(N, 0); 940 if (VT.isVector()) { 941 SmallVector<SDValue, 8> Ops; 942 Ops.assign(VT.getVectorNumElements(), Result); 943 // FIXME DebugLoc info might be appropriate here 944 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 945 VT, &Ops[0], Ops.size()); 946 } 947 return Result; 948} 949 950SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 951 EVT EltVT = 952 VT.isVector() ? VT.getVectorElementType() : VT; 953 if (EltVT==MVT::f32) 954 return getConstantFP(APFloat((float)Val), VT, isTarget); 955 else 956 return getConstantFP(APFloat(Val), VT, isTarget); 957} 958 959SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 960 EVT VT, int64_t Offset, 961 bool isTargetGA, 962 unsigned char TargetFlags) { 963 assert((TargetFlags == 0 || isTargetGA) && 964 "Cannot set target flags on target-independent globals"); 965 966 // Truncate (with sign-extension) the offset value to the pointer size. 967 EVT PTy = TLI.getPointerTy(); 968 unsigned BitWidth = PTy.getSizeInBits(); 969 if (BitWidth < 64) 970 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 971 972 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 973 if (!GVar) { 974 // If GV is an alias then use the aliasee for determining thread-localness. 975 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 976 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 977 } 978 979 unsigned Opc; 980 if (GVar && GVar->isThreadLocal()) 981 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 982 else 983 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 984 985 FoldingSetNodeID ID; 986 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 987 ID.AddPointer(GV); 988 ID.AddInteger(Offset); 989 ID.AddInteger(TargetFlags); 990 void *IP = 0; 991 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 992 return SDValue(E, 0); 993 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 994 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags); 995 CSEMap.InsertNode(N, IP); 996 AllNodes.push_back(N); 997 return SDValue(N, 0); 998} 999 1000SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1001 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1002 FoldingSetNodeID ID; 1003 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1004 ID.AddInteger(FI); 1005 void *IP = 0; 1006 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1007 return SDValue(E, 0); 1008 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1009 new (N) FrameIndexSDNode(FI, VT, isTarget); 1010 CSEMap.InsertNode(N, IP); 1011 AllNodes.push_back(N); 1012 return SDValue(N, 0); 1013} 1014 1015SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1016 unsigned char TargetFlags) { 1017 assert((TargetFlags == 0 || isTarget) && 1018 "Cannot set target flags on target-independent jump tables"); 1019 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1020 FoldingSetNodeID ID; 1021 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1022 ID.AddInteger(JTI); 1023 ID.AddInteger(TargetFlags); 1024 void *IP = 0; 1025 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1026 return SDValue(E, 0); 1027 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1028 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags); 1029 CSEMap.InsertNode(N, IP); 1030 AllNodes.push_back(N); 1031 return SDValue(N, 0); 1032} 1033 1034SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1035 unsigned Alignment, int Offset, 1036 bool isTarget, 1037 unsigned char TargetFlags) { 1038 assert((TargetFlags == 0 || isTarget) && 1039 "Cannot set target flags on target-independent globals"); 1040 if (Alignment == 0) 1041 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1042 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1043 FoldingSetNodeID ID; 1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1045 ID.AddInteger(Alignment); 1046 ID.AddInteger(Offset); 1047 ID.AddPointer(C); 1048 ID.AddInteger(TargetFlags); 1049 void *IP = 0; 1050 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1051 return SDValue(E, 0); 1052 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1053 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1054 CSEMap.InsertNode(N, IP); 1055 AllNodes.push_back(N); 1056 return SDValue(N, 0); 1057} 1058 1059 1060SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1061 unsigned Alignment, int Offset, 1062 bool isTarget, 1063 unsigned char TargetFlags) { 1064 assert((TargetFlags == 0 || isTarget) && 1065 "Cannot set target flags on target-independent globals"); 1066 if (Alignment == 0) 1067 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1068 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1069 FoldingSetNodeID ID; 1070 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1071 ID.AddInteger(Alignment); 1072 ID.AddInteger(Offset); 1073 C->AddSelectionDAGCSEId(ID); 1074 ID.AddInteger(TargetFlags); 1075 void *IP = 0; 1076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1077 return SDValue(E, 0); 1078 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1079 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1080 CSEMap.InsertNode(N, IP); 1081 AllNodes.push_back(N); 1082 return SDValue(N, 0); 1083} 1084 1085SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1086 FoldingSetNodeID ID; 1087 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1088 ID.AddPointer(MBB); 1089 void *IP = 0; 1090 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1091 return SDValue(E, 0); 1092 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1093 new (N) BasicBlockSDNode(MBB); 1094 CSEMap.InsertNode(N, IP); 1095 AllNodes.push_back(N); 1096 return SDValue(N, 0); 1097} 1098 1099SDValue SelectionDAG::getValueType(EVT VT) { 1100 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1101 ValueTypeNodes.size()) 1102 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1103 1104 SDNode *&N = VT.isExtended() ? 1105 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1106 1107 if (N) return SDValue(N, 0); 1108 N = NodeAllocator.Allocate<VTSDNode>(); 1109 new (N) VTSDNode(VT); 1110 AllNodes.push_back(N); 1111 return SDValue(N, 0); 1112} 1113 1114SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1115 SDNode *&N = ExternalSymbols[Sym]; 1116 if (N) return SDValue(N, 0); 1117 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1118 new (N) ExternalSymbolSDNode(false, Sym, 0, VT); 1119 AllNodes.push_back(N); 1120 return SDValue(N, 0); 1121} 1122 1123SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1124 unsigned char TargetFlags) { 1125 SDNode *&N = 1126 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1127 TargetFlags)]; 1128 if (N) return SDValue(N, 0); 1129 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1130 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1131 AllNodes.push_back(N); 1132 return SDValue(N, 0); 1133} 1134 1135SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1136 if ((unsigned)Cond >= CondCodeNodes.size()) 1137 CondCodeNodes.resize(Cond+1); 1138 1139 if (CondCodeNodes[Cond] == 0) { 1140 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1141 new (N) CondCodeSDNode(Cond); 1142 CondCodeNodes[Cond] = N; 1143 AllNodes.push_back(N); 1144 } 1145 return SDValue(CondCodeNodes[Cond], 0); 1146} 1147 1148// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1149// the shuffle mask M that point at N1 to point at N2, and indices that point 1150// N2 to point at N1. 1151static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1152 std::swap(N1, N2); 1153 int NElts = M.size(); 1154 for (int i = 0; i != NElts; ++i) { 1155 if (M[i] >= NElts) 1156 M[i] -= NElts; 1157 else if (M[i] >= 0) 1158 M[i] += NElts; 1159 } 1160} 1161 1162SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1163 SDValue N2, const int *Mask) { 1164 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1165 assert(VT.isVector() && N1.getValueType().isVector() && 1166 "Vector Shuffle VTs must be a vectors"); 1167 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1168 && "Vector Shuffle VTs must have same element type"); 1169 1170 // Canonicalize shuffle undef, undef -> undef 1171 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1172 return getUNDEF(VT); 1173 1174 // Validate that all indices in Mask are within the range of the elements 1175 // input to the shuffle. 1176 unsigned NElts = VT.getVectorNumElements(); 1177 SmallVector<int, 8> MaskVec; 1178 for (unsigned i = 0; i != NElts; ++i) { 1179 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1180 MaskVec.push_back(Mask[i]); 1181 } 1182 1183 // Canonicalize shuffle v, v -> v, undef 1184 if (N1 == N2) { 1185 N2 = getUNDEF(VT); 1186 for (unsigned i = 0; i != NElts; ++i) 1187 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1188 } 1189 1190 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1191 if (N1.getOpcode() == ISD::UNDEF) 1192 commuteShuffle(N1, N2, MaskVec); 1193 1194 // Canonicalize all index into lhs, -> shuffle lhs, undef 1195 // Canonicalize all index into rhs, -> shuffle rhs, undef 1196 bool AllLHS = true, AllRHS = true; 1197 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1198 for (unsigned i = 0; i != NElts; ++i) { 1199 if (MaskVec[i] >= (int)NElts) { 1200 if (N2Undef) 1201 MaskVec[i] = -1; 1202 else 1203 AllLHS = false; 1204 } else if (MaskVec[i] >= 0) { 1205 AllRHS = false; 1206 } 1207 } 1208 if (AllLHS && AllRHS) 1209 return getUNDEF(VT); 1210 if (AllLHS && !N2Undef) 1211 N2 = getUNDEF(VT); 1212 if (AllRHS) { 1213 N1 = getUNDEF(VT); 1214 commuteShuffle(N1, N2, MaskVec); 1215 } 1216 1217 // If Identity shuffle, or all shuffle in to undef, return that node. 1218 bool AllUndef = true; 1219 bool Identity = true; 1220 for (unsigned i = 0; i != NElts; ++i) { 1221 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1222 if (MaskVec[i] >= 0) AllUndef = false; 1223 } 1224 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1225 return N1; 1226 if (AllUndef) 1227 return getUNDEF(VT); 1228 1229 FoldingSetNodeID ID; 1230 SDValue Ops[2] = { N1, N2 }; 1231 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1232 for (unsigned i = 0; i != NElts; ++i) 1233 ID.AddInteger(MaskVec[i]); 1234 1235 void* IP = 0; 1236 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1237 return SDValue(E, 0); 1238 1239 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1240 // SDNode doesn't have access to it. This memory will be "leaked" when 1241 // the node is deallocated, but recovered when the NodeAllocator is released. 1242 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1243 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1244 1245 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>(); 1246 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1247 CSEMap.InsertNode(N, IP); 1248 AllNodes.push_back(N); 1249 return SDValue(N, 0); 1250} 1251 1252SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1253 SDValue Val, SDValue DTy, 1254 SDValue STy, SDValue Rnd, SDValue Sat, 1255 ISD::CvtCode Code) { 1256 // If the src and dest types are the same and the conversion is between 1257 // integer types of the same sign or two floats, no conversion is necessary. 1258 if (DTy == STy && 1259 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1260 return Val; 1261 1262 FoldingSetNodeID ID; 1263 void* IP = 0; 1264 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1265 return SDValue(E, 0); 1266 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1267 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1268 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code); 1269 CSEMap.InsertNode(N, IP); 1270 AllNodes.push_back(N); 1271 return SDValue(N, 0); 1272} 1273 1274SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1275 FoldingSetNodeID ID; 1276 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1277 ID.AddInteger(RegNo); 1278 void *IP = 0; 1279 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1280 return SDValue(E, 0); 1281 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1282 new (N) RegisterSDNode(RegNo, VT); 1283 CSEMap.InsertNode(N, IP); 1284 AllNodes.push_back(N); 1285 return SDValue(N, 0); 1286} 1287 1288SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root, 1289 unsigned Line, unsigned Col, 1290 Value *CU) { 1291 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1292 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1293 N->setDebugLoc(DL); 1294 AllNodes.push_back(N); 1295 return SDValue(N, 0); 1296} 1297 1298SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1299 SDValue Root, 1300 unsigned LabelID) { 1301 FoldingSetNodeID ID; 1302 SDValue Ops[] = { Root }; 1303 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1304 ID.AddInteger(LabelID); 1305 void *IP = 0; 1306 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1307 return SDValue(E, 0); 1308 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1309 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1310 CSEMap.InsertNode(N, IP); 1311 AllNodes.push_back(N); 1312 return SDValue(N, 0); 1313} 1314 1315SDValue SelectionDAG::getSrcValue(const Value *V) { 1316 assert((!V || isa<PointerType>(V->getType())) && 1317 "SrcValue is not a pointer?"); 1318 1319 FoldingSetNodeID ID; 1320 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1321 ID.AddPointer(V); 1322 1323 void *IP = 0; 1324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1325 return SDValue(E, 0); 1326 1327 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1328 new (N) SrcValueSDNode(V); 1329 CSEMap.InsertNode(N, IP); 1330 AllNodes.push_back(N); 1331 return SDValue(N, 0); 1332} 1333 1334SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1335#ifndef NDEBUG 1336 const Value *v = MO.getValue(); 1337 assert((!v || isa<PointerType>(v->getType())) && 1338 "SrcValue is not a pointer?"); 1339#endif 1340 1341 FoldingSetNodeID ID; 1342 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1343 MO.Profile(ID); 1344 1345 void *IP = 0; 1346 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1347 return SDValue(E, 0); 1348 1349 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1350 new (N) MemOperandSDNode(MO); 1351 CSEMap.InsertNode(N, IP); 1352 AllNodes.push_back(N); 1353 return SDValue(N, 0); 1354} 1355 1356/// getShiftAmountOperand - Return the specified value casted to 1357/// the target's desired shift amount type. 1358SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1359 EVT OpTy = Op.getValueType(); 1360 MVT ShTy = TLI.getShiftAmountTy(); 1361 if (OpTy == ShTy || OpTy.isVector()) return Op; 1362 1363 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1364 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1365} 1366 1367/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1368/// specified value type. 1369SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1370 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1371 unsigned ByteSize = VT.getStoreSizeInBits()/8; 1372 const Type *Ty = VT.getTypeForEVT(*getContext()); 1373 unsigned StackAlign = 1374 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1375 1376 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1377 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1378} 1379 1380/// CreateStackTemporary - Create a stack temporary suitable for holding 1381/// either of the specified value types. 1382SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1383 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1384 VT2.getStoreSizeInBits())/8; 1385 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1386 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1387 const TargetData *TD = TLI.getTargetData(); 1388 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1389 TD->getPrefTypeAlignment(Ty2)); 1390 1391 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1392 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1393 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1394} 1395 1396SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1397 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1398 // These setcc operations always fold. 1399 switch (Cond) { 1400 default: break; 1401 case ISD::SETFALSE: 1402 case ISD::SETFALSE2: return getConstant(0, VT); 1403 case ISD::SETTRUE: 1404 case ISD::SETTRUE2: return getConstant(1, VT); 1405 1406 case ISD::SETOEQ: 1407 case ISD::SETOGT: 1408 case ISD::SETOGE: 1409 case ISD::SETOLT: 1410 case ISD::SETOLE: 1411 case ISD::SETONE: 1412 case ISD::SETO: 1413 case ISD::SETUO: 1414 case ISD::SETUEQ: 1415 case ISD::SETUNE: 1416 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1417 break; 1418 } 1419 1420 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1421 const APInt &C2 = N2C->getAPIntValue(); 1422 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1423 const APInt &C1 = N1C->getAPIntValue(); 1424 1425 switch (Cond) { 1426 default: llvm_unreachable("Unknown integer setcc!"); 1427 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1428 case ISD::SETNE: return getConstant(C1 != C2, VT); 1429 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1430 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1431 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1432 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1433 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1434 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1435 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1436 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1437 } 1438 } 1439 } 1440 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1441 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1442 // No compile time operations on this type yet. 1443 if (N1C->getValueType(0) == MVT::ppcf128) 1444 return SDValue(); 1445 1446 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1447 switch (Cond) { 1448 default: break; 1449 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1450 return getUNDEF(VT); 1451 // fall through 1452 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1453 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1454 return getUNDEF(VT); 1455 // fall through 1456 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1457 R==APFloat::cmpLessThan, VT); 1458 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1459 return getUNDEF(VT); 1460 // fall through 1461 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1462 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1463 return getUNDEF(VT); 1464 // fall through 1465 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1466 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1467 return getUNDEF(VT); 1468 // fall through 1469 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1470 R==APFloat::cmpEqual, VT); 1471 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1472 return getUNDEF(VT); 1473 // fall through 1474 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1475 R==APFloat::cmpEqual, VT); 1476 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1477 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1478 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1479 R==APFloat::cmpEqual, VT); 1480 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1481 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1482 R==APFloat::cmpLessThan, VT); 1483 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1484 R==APFloat::cmpUnordered, VT); 1485 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1486 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1487 } 1488 } else { 1489 // Ensure that the constant occurs on the RHS. 1490 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1491 } 1492 } 1493 1494 // Could not fold it. 1495 return SDValue(); 1496} 1497 1498/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1499/// use this predicate to simplify operations downstream. 1500bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1501 // This predicate is not safe for vector operations. 1502 if (Op.getValueType().isVector()) 1503 return false; 1504 1505 unsigned BitWidth = Op.getValueSizeInBits(); 1506 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1507} 1508 1509/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1510/// this predicate to simplify operations downstream. Mask is known to be zero 1511/// for bits that V cannot have. 1512bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1513 unsigned Depth) const { 1514 APInt KnownZero, KnownOne; 1515 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1516 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1517 return (KnownZero & Mask) == Mask; 1518} 1519 1520/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1521/// known to be either zero or one and return them in the KnownZero/KnownOne 1522/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1523/// processing. 1524void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1525 APInt &KnownZero, APInt &KnownOne, 1526 unsigned Depth) const { 1527 unsigned BitWidth = Mask.getBitWidth(); 1528 assert(BitWidth == Op.getValueType().getSizeInBits() && 1529 "Mask size mismatches value type size!"); 1530 1531 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1532 if (Depth == 6 || Mask == 0) 1533 return; // Limit search depth. 1534 1535 APInt KnownZero2, KnownOne2; 1536 1537 switch (Op.getOpcode()) { 1538 case ISD::Constant: 1539 // We know all of the bits for a constant! 1540 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1541 KnownZero = ~KnownOne & Mask; 1542 return; 1543 case ISD::AND: 1544 // If either the LHS or the RHS are Zero, the result is zero. 1545 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1546 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1547 KnownZero2, KnownOne2, Depth+1); 1548 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1549 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1550 1551 // Output known-1 bits are only known if set in both the LHS & RHS. 1552 KnownOne &= KnownOne2; 1553 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1554 KnownZero |= KnownZero2; 1555 return; 1556 case ISD::OR: 1557 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1558 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1559 KnownZero2, KnownOne2, Depth+1); 1560 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1561 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1562 1563 // Output known-0 bits are only known if clear in both the LHS & RHS. 1564 KnownZero &= KnownZero2; 1565 // Output known-1 are known to be set if set in either the LHS | RHS. 1566 KnownOne |= KnownOne2; 1567 return; 1568 case ISD::XOR: { 1569 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1570 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1571 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1572 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1573 1574 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1575 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1576 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1577 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1578 KnownZero = KnownZeroOut; 1579 return; 1580 } 1581 case ISD::MUL: { 1582 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1583 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1584 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1585 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1586 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1587 1588 // If low bits are zero in either operand, output low known-0 bits. 1589 // Also compute a conserative estimate for high known-0 bits. 1590 // More trickiness is possible, but this is sufficient for the 1591 // interesting case of alignment computation. 1592 KnownOne.clear(); 1593 unsigned TrailZ = KnownZero.countTrailingOnes() + 1594 KnownZero2.countTrailingOnes(); 1595 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1596 KnownZero2.countLeadingOnes(), 1597 BitWidth) - BitWidth; 1598 1599 TrailZ = std::min(TrailZ, BitWidth); 1600 LeadZ = std::min(LeadZ, BitWidth); 1601 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1602 APInt::getHighBitsSet(BitWidth, LeadZ); 1603 KnownZero &= Mask; 1604 return; 1605 } 1606 case ISD::UDIV: { 1607 // For the purposes of computing leading zeros we can conservatively 1608 // treat a udiv as a logical right shift by the power of 2 known to 1609 // be less than the denominator. 1610 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1611 ComputeMaskedBits(Op.getOperand(0), 1612 AllOnes, KnownZero2, KnownOne2, Depth+1); 1613 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1614 1615 KnownOne2.clear(); 1616 KnownZero2.clear(); 1617 ComputeMaskedBits(Op.getOperand(1), 1618 AllOnes, KnownZero2, KnownOne2, Depth+1); 1619 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1620 if (RHSUnknownLeadingOnes != BitWidth) 1621 LeadZ = std::min(BitWidth, 1622 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1623 1624 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1625 return; 1626 } 1627 case ISD::SELECT: 1628 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1629 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1630 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1631 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1632 1633 // Only known if known in both the LHS and RHS. 1634 KnownOne &= KnownOne2; 1635 KnownZero &= KnownZero2; 1636 return; 1637 case ISD::SELECT_CC: 1638 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1639 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1640 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1641 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1642 1643 // Only known if known in both the LHS and RHS. 1644 KnownOne &= KnownOne2; 1645 KnownZero &= KnownZero2; 1646 return; 1647 case ISD::SADDO: 1648 case ISD::UADDO: 1649 case ISD::SSUBO: 1650 case ISD::USUBO: 1651 case ISD::SMULO: 1652 case ISD::UMULO: 1653 if (Op.getResNo() != 1) 1654 return; 1655 // The boolean result conforms to getBooleanContents. Fall through. 1656 case ISD::SETCC: 1657 // If we know the result of a setcc has the top bits zero, use this info. 1658 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1659 BitWidth > 1) 1660 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1661 return; 1662 case ISD::SHL: 1663 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1664 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1665 unsigned ShAmt = SA->getZExtValue(); 1666 1667 // If the shift count is an invalid immediate, don't do anything. 1668 if (ShAmt >= BitWidth) 1669 return; 1670 1671 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1672 KnownZero, KnownOne, Depth+1); 1673 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1674 KnownZero <<= ShAmt; 1675 KnownOne <<= ShAmt; 1676 // low bits known zero. 1677 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1678 } 1679 return; 1680 case ISD::SRL: 1681 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1682 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1683 unsigned ShAmt = SA->getZExtValue(); 1684 1685 // If the shift count is an invalid immediate, don't do anything. 1686 if (ShAmt >= BitWidth) 1687 return; 1688 1689 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1690 KnownZero, KnownOne, Depth+1); 1691 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1692 KnownZero = KnownZero.lshr(ShAmt); 1693 KnownOne = KnownOne.lshr(ShAmt); 1694 1695 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1696 KnownZero |= HighBits; // High bits known zero. 1697 } 1698 return; 1699 case ISD::SRA: 1700 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1701 unsigned ShAmt = SA->getZExtValue(); 1702 1703 // If the shift count is an invalid immediate, don't do anything. 1704 if (ShAmt >= BitWidth) 1705 return; 1706 1707 APInt InDemandedMask = (Mask << ShAmt); 1708 // If any of the demanded bits are produced by the sign extension, we also 1709 // demand the input sign bit. 1710 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1711 if (HighBits.getBoolValue()) 1712 InDemandedMask |= APInt::getSignBit(BitWidth); 1713 1714 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1715 Depth+1); 1716 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1717 KnownZero = KnownZero.lshr(ShAmt); 1718 KnownOne = KnownOne.lshr(ShAmt); 1719 1720 // Handle the sign bits. 1721 APInt SignBit = APInt::getSignBit(BitWidth); 1722 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1723 1724 if (KnownZero.intersects(SignBit)) { 1725 KnownZero |= HighBits; // New bits are known zero. 1726 } else if (KnownOne.intersects(SignBit)) { 1727 KnownOne |= HighBits; // New bits are known one. 1728 } 1729 } 1730 return; 1731 case ISD::SIGN_EXTEND_INREG: { 1732 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1733 unsigned EBits = EVT.getSizeInBits(); 1734 1735 // Sign extension. Compute the demanded bits in the result that are not 1736 // present in the input. 1737 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1738 1739 APInt InSignBit = APInt::getSignBit(EBits); 1740 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1741 1742 // If the sign extended bits are demanded, we know that the sign 1743 // bit is demanded. 1744 InSignBit.zext(BitWidth); 1745 if (NewBits.getBoolValue()) 1746 InputDemandedBits |= InSignBit; 1747 1748 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1749 KnownZero, KnownOne, Depth+1); 1750 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1751 1752 // If the sign bit of the input is known set or clear, then we know the 1753 // top bits of the result. 1754 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1755 KnownZero |= NewBits; 1756 KnownOne &= ~NewBits; 1757 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1758 KnownOne |= NewBits; 1759 KnownZero &= ~NewBits; 1760 } else { // Input sign bit unknown 1761 KnownZero &= ~NewBits; 1762 KnownOne &= ~NewBits; 1763 } 1764 return; 1765 } 1766 case ISD::CTTZ: 1767 case ISD::CTLZ: 1768 case ISD::CTPOP: { 1769 unsigned LowBits = Log2_32(BitWidth)+1; 1770 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1771 KnownOne.clear(); 1772 return; 1773 } 1774 case ISD::LOAD: { 1775 if (ISD::isZEXTLoad(Op.getNode())) { 1776 LoadSDNode *LD = cast<LoadSDNode>(Op); 1777 EVT VT = LD->getMemoryVT(); 1778 unsigned MemBits = VT.getSizeInBits(); 1779 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1780 } 1781 return; 1782 } 1783 case ISD::ZERO_EXTEND: { 1784 EVT InVT = Op.getOperand(0).getValueType(); 1785 unsigned InBits = InVT.getSizeInBits(); 1786 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1787 APInt InMask = Mask; 1788 InMask.trunc(InBits); 1789 KnownZero.trunc(InBits); 1790 KnownOne.trunc(InBits); 1791 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1792 KnownZero.zext(BitWidth); 1793 KnownOne.zext(BitWidth); 1794 KnownZero |= NewBits; 1795 return; 1796 } 1797 case ISD::SIGN_EXTEND: { 1798 EVT InVT = Op.getOperand(0).getValueType(); 1799 unsigned InBits = InVT.getSizeInBits(); 1800 APInt InSignBit = APInt::getSignBit(InBits); 1801 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1802 APInt InMask = Mask; 1803 InMask.trunc(InBits); 1804 1805 // If any of the sign extended bits are demanded, we know that the sign 1806 // bit is demanded. Temporarily set this bit in the mask for our callee. 1807 if (NewBits.getBoolValue()) 1808 InMask |= InSignBit; 1809 1810 KnownZero.trunc(InBits); 1811 KnownOne.trunc(InBits); 1812 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1813 1814 // Note if the sign bit is known to be zero or one. 1815 bool SignBitKnownZero = KnownZero.isNegative(); 1816 bool SignBitKnownOne = KnownOne.isNegative(); 1817 assert(!(SignBitKnownZero && SignBitKnownOne) && 1818 "Sign bit can't be known to be both zero and one!"); 1819 1820 // If the sign bit wasn't actually demanded by our caller, we don't 1821 // want it set in the KnownZero and KnownOne result values. Reset the 1822 // mask and reapply it to the result values. 1823 InMask = Mask; 1824 InMask.trunc(InBits); 1825 KnownZero &= InMask; 1826 KnownOne &= InMask; 1827 1828 KnownZero.zext(BitWidth); 1829 KnownOne.zext(BitWidth); 1830 1831 // If the sign bit is known zero or one, the top bits match. 1832 if (SignBitKnownZero) 1833 KnownZero |= NewBits; 1834 else if (SignBitKnownOne) 1835 KnownOne |= NewBits; 1836 return; 1837 } 1838 case ISD::ANY_EXTEND: { 1839 EVT InVT = Op.getOperand(0).getValueType(); 1840 unsigned InBits = InVT.getSizeInBits(); 1841 APInt InMask = Mask; 1842 InMask.trunc(InBits); 1843 KnownZero.trunc(InBits); 1844 KnownOne.trunc(InBits); 1845 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1846 KnownZero.zext(BitWidth); 1847 KnownOne.zext(BitWidth); 1848 return; 1849 } 1850 case ISD::TRUNCATE: { 1851 EVT InVT = Op.getOperand(0).getValueType(); 1852 unsigned InBits = InVT.getSizeInBits(); 1853 APInt InMask = Mask; 1854 InMask.zext(InBits); 1855 KnownZero.zext(InBits); 1856 KnownOne.zext(InBits); 1857 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1858 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1859 KnownZero.trunc(BitWidth); 1860 KnownOne.trunc(BitWidth); 1861 break; 1862 } 1863 case ISD::AssertZext: { 1864 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1865 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1866 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1867 KnownOne, Depth+1); 1868 KnownZero |= (~InMask) & Mask; 1869 return; 1870 } 1871 case ISD::FGETSIGN: 1872 // All bits are zero except the low bit. 1873 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1874 return; 1875 1876 case ISD::SUB: { 1877 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1878 // We know that the top bits of C-X are clear if X contains less bits 1879 // than C (i.e. no wrap-around can happen). For example, 20-X is 1880 // positive if we can prove that X is >= 0 and < 16. 1881 if (CLHS->getAPIntValue().isNonNegative()) { 1882 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1883 // NLZ can't be BitWidth with no sign bit 1884 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1885 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1886 Depth+1); 1887 1888 // If all of the MaskV bits are known to be zero, then we know the 1889 // output top bits are zero, because we now know that the output is 1890 // from [0-C]. 1891 if ((KnownZero2 & MaskV) == MaskV) { 1892 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1893 // Top bits known zero. 1894 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1895 } 1896 } 1897 } 1898 } 1899 // fall through 1900 case ISD::ADD: { 1901 // Output known-0 bits are known if clear or set in both the low clear bits 1902 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1903 // low 3 bits clear. 1904 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1905 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1906 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1907 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1908 1909 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1910 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1911 KnownZeroOut = std::min(KnownZeroOut, 1912 KnownZero2.countTrailingOnes()); 1913 1914 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1915 return; 1916 } 1917 case ISD::SREM: 1918 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1919 const APInt &RA = Rem->getAPIntValue(); 1920 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1921 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1922 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1923 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1924 1925 // If the sign bit of the first operand is zero, the sign bit of 1926 // the result is zero. If the first operand has no one bits below 1927 // the second operand's single 1 bit, its sign will be zero. 1928 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1929 KnownZero2 |= ~LowBits; 1930 1931 KnownZero |= KnownZero2 & Mask; 1932 1933 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1934 } 1935 } 1936 return; 1937 case ISD::UREM: { 1938 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1939 const APInt &RA = Rem->getAPIntValue(); 1940 if (RA.isPowerOf2()) { 1941 APInt LowBits = (RA - 1); 1942 APInt Mask2 = LowBits & Mask; 1943 KnownZero |= ~LowBits & Mask; 1944 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1945 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1946 break; 1947 } 1948 } 1949 1950 // Since the result is less than or equal to either operand, any leading 1951 // zero bits in either operand must also exist in the result. 1952 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1953 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1954 Depth+1); 1955 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1956 Depth+1); 1957 1958 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1959 KnownZero2.countLeadingOnes()); 1960 KnownOne.clear(); 1961 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1962 return; 1963 } 1964 default: 1965 // Allow the target to implement this method for its nodes. 1966 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1967 case ISD::INTRINSIC_WO_CHAIN: 1968 case ISD::INTRINSIC_W_CHAIN: 1969 case ISD::INTRINSIC_VOID: 1970 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1971 Depth); 1972 } 1973 return; 1974 } 1975} 1976 1977/// ComputeNumSignBits - Return the number of times the sign bit of the 1978/// register is replicated into the other bits. We know that at least 1 bit 1979/// is always equal to the sign bit (itself), but other cases can give us 1980/// information. For example, immediately after an "SRA X, 2", we know that 1981/// the top 3 bits are all equal to each other, so we return 3. 1982unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1983 EVT VT = Op.getValueType(); 1984 assert(VT.isInteger() && "Invalid VT!"); 1985 unsigned VTBits = VT.getSizeInBits(); 1986 unsigned Tmp, Tmp2; 1987 unsigned FirstAnswer = 1; 1988 1989 if (Depth == 6) 1990 return 1; // Limit search depth. 1991 1992 switch (Op.getOpcode()) { 1993 default: break; 1994 case ISD::AssertSext: 1995 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1996 return VTBits-Tmp+1; 1997 case ISD::AssertZext: 1998 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1999 return VTBits-Tmp; 2000 2001 case ISD::Constant: { 2002 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2003 // If negative, return # leading ones. 2004 if (Val.isNegative()) 2005 return Val.countLeadingOnes(); 2006 2007 // Return # leading zeros. 2008 return Val.countLeadingZeros(); 2009 } 2010 2011 case ISD::SIGN_EXTEND: 2012 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 2013 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2014 2015 case ISD::SIGN_EXTEND_INREG: 2016 // Max of the input and what this extends. 2017 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2018 Tmp = VTBits-Tmp+1; 2019 2020 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2021 return std::max(Tmp, Tmp2); 2022 2023 case ISD::SRA: 2024 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2025 // SRA X, C -> adds C sign bits. 2026 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2027 Tmp += C->getZExtValue(); 2028 if (Tmp > VTBits) Tmp = VTBits; 2029 } 2030 return Tmp; 2031 case ISD::SHL: 2032 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2033 // shl destroys sign bits. 2034 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2035 if (C->getZExtValue() >= VTBits || // Bad shift. 2036 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2037 return Tmp - C->getZExtValue(); 2038 } 2039 break; 2040 case ISD::AND: 2041 case ISD::OR: 2042 case ISD::XOR: // NOT is handled here. 2043 // Logical binary ops preserve the number of sign bits at the worst. 2044 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2045 if (Tmp != 1) { 2046 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2047 FirstAnswer = std::min(Tmp, Tmp2); 2048 // We computed what we know about the sign bits as our first 2049 // answer. Now proceed to the generic code that uses 2050 // ComputeMaskedBits, and pick whichever answer is better. 2051 } 2052 break; 2053 2054 case ISD::SELECT: 2055 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2056 if (Tmp == 1) return 1; // Early out. 2057 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2058 return std::min(Tmp, Tmp2); 2059 2060 case ISD::SADDO: 2061 case ISD::UADDO: 2062 case ISD::SSUBO: 2063 case ISD::USUBO: 2064 case ISD::SMULO: 2065 case ISD::UMULO: 2066 if (Op.getResNo() != 1) 2067 break; 2068 // The boolean result conforms to getBooleanContents. Fall through. 2069 case ISD::SETCC: 2070 // If setcc returns 0/-1, all bits are sign bits. 2071 if (TLI.getBooleanContents() == 2072 TargetLowering::ZeroOrNegativeOneBooleanContent) 2073 return VTBits; 2074 break; 2075 case ISD::ROTL: 2076 case ISD::ROTR: 2077 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2078 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2079 2080 // Handle rotate right by N like a rotate left by 32-N. 2081 if (Op.getOpcode() == ISD::ROTR) 2082 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2083 2084 // If we aren't rotating out all of the known-in sign bits, return the 2085 // number that are left. This handles rotl(sext(x), 1) for example. 2086 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2087 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2088 } 2089 break; 2090 case ISD::ADD: 2091 // Add can have at most one carry bit. Thus we know that the output 2092 // is, at worst, one more bit than the inputs. 2093 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2094 if (Tmp == 1) return 1; // Early out. 2095 2096 // Special case decrementing a value (ADD X, -1): 2097 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2098 if (CRHS->isAllOnesValue()) { 2099 APInt KnownZero, KnownOne; 2100 APInt Mask = APInt::getAllOnesValue(VTBits); 2101 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2102 2103 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2104 // sign bits set. 2105 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2106 return VTBits; 2107 2108 // If we are subtracting one from a positive number, there is no carry 2109 // out of the result. 2110 if (KnownZero.isNegative()) 2111 return Tmp; 2112 } 2113 2114 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2115 if (Tmp2 == 1) return 1; 2116 return std::min(Tmp, Tmp2)-1; 2117 break; 2118 2119 case ISD::SUB: 2120 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2121 if (Tmp2 == 1) return 1; 2122 2123 // Handle NEG. 2124 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2125 if (CLHS->isNullValue()) { 2126 APInt KnownZero, KnownOne; 2127 APInt Mask = APInt::getAllOnesValue(VTBits); 2128 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2129 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2130 // sign bits set. 2131 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2132 return VTBits; 2133 2134 // If the input is known to be positive (the sign bit is known clear), 2135 // the output of the NEG has the same number of sign bits as the input. 2136 if (KnownZero.isNegative()) 2137 return Tmp2; 2138 2139 // Otherwise, we treat this like a SUB. 2140 } 2141 2142 // Sub can have at most one carry bit. Thus we know that the output 2143 // is, at worst, one more bit than the inputs. 2144 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2145 if (Tmp == 1) return 1; // Early out. 2146 return std::min(Tmp, Tmp2)-1; 2147 break; 2148 case ISD::TRUNCATE: 2149 // FIXME: it's tricky to do anything useful for this, but it is an important 2150 // case for targets like X86. 2151 break; 2152 } 2153 2154 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2155 if (Op.getOpcode() == ISD::LOAD) { 2156 LoadSDNode *LD = cast<LoadSDNode>(Op); 2157 unsigned ExtType = LD->getExtensionType(); 2158 switch (ExtType) { 2159 default: break; 2160 case ISD::SEXTLOAD: // '17' bits known 2161 Tmp = LD->getMemoryVT().getSizeInBits(); 2162 return VTBits-Tmp+1; 2163 case ISD::ZEXTLOAD: // '16' bits known 2164 Tmp = LD->getMemoryVT().getSizeInBits(); 2165 return VTBits-Tmp; 2166 } 2167 } 2168 2169 // Allow the target to implement this method for its nodes. 2170 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2171 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2172 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2173 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2174 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2175 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2176 } 2177 2178 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2179 // use this information. 2180 APInt KnownZero, KnownOne; 2181 APInt Mask = APInt::getAllOnesValue(VTBits); 2182 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2183 2184 if (KnownZero.isNegative()) { // sign bit is 0 2185 Mask = KnownZero; 2186 } else if (KnownOne.isNegative()) { // sign bit is 1; 2187 Mask = KnownOne; 2188 } else { 2189 // Nothing known. 2190 return FirstAnswer; 2191 } 2192 2193 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2194 // the number of identical bits in the top of the input value. 2195 Mask = ~Mask; 2196 Mask <<= Mask.getBitWidth()-VTBits; 2197 // Return # leading zeros. We use 'min' here in case Val was zero before 2198 // shifting. We don't want to return '64' as for an i32 "0". 2199 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2200} 2201 2202 2203bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2204 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2205 if (!GA) return false; 2206 if (GA->getOffset() != 0) return false; 2207 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2208 if (!GV) return false; 2209 MachineModuleInfo *MMI = getMachineModuleInfo(); 2210 return MMI && MMI->hasDebugInfo(); 2211} 2212 2213 2214/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2215/// element of the result of the vector shuffle. 2216SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2217 unsigned i) { 2218 EVT VT = N->getValueType(0); 2219 DebugLoc dl = N->getDebugLoc(); 2220 if (N->getMaskElt(i) < 0) 2221 return getUNDEF(VT.getVectorElementType()); 2222 unsigned Index = N->getMaskElt(i); 2223 unsigned NumElems = VT.getVectorNumElements(); 2224 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2225 Index %= NumElems; 2226 2227 if (V.getOpcode() == ISD::BIT_CONVERT) { 2228 V = V.getOperand(0); 2229 EVT VVT = V.getValueType(); 2230 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2231 return SDValue(); 2232 } 2233 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2234 return (Index == 0) ? V.getOperand(0) 2235 : getUNDEF(VT.getVectorElementType()); 2236 if (V.getOpcode() == ISD::BUILD_VECTOR) 2237 return V.getOperand(Index); 2238 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2239 return getShuffleScalarElt(SVN, Index); 2240 return SDValue(); 2241} 2242 2243 2244/// getNode - Gets or creates the specified node. 2245/// 2246SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2247 FoldingSetNodeID ID; 2248 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2249 void *IP = 0; 2250 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2251 return SDValue(E, 0); 2252 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2253 new (N) SDNode(Opcode, DL, getVTList(VT)); 2254 CSEMap.InsertNode(N, IP); 2255 2256 AllNodes.push_back(N); 2257#ifndef NDEBUG 2258 VerifyNode(N); 2259#endif 2260 return SDValue(N, 0); 2261} 2262 2263SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2264 EVT VT, SDValue Operand) { 2265 // Constant fold unary operations with an integer constant operand. 2266 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2267 const APInt &Val = C->getAPIntValue(); 2268 unsigned BitWidth = VT.getSizeInBits(); 2269 switch (Opcode) { 2270 default: break; 2271 case ISD::SIGN_EXTEND: 2272 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2273 case ISD::ANY_EXTEND: 2274 case ISD::ZERO_EXTEND: 2275 case ISD::TRUNCATE: 2276 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2277 case ISD::UINT_TO_FP: 2278 case ISD::SINT_TO_FP: { 2279 const uint64_t zero[] = {0, 0}; 2280 // No compile time operations on this type. 2281 if (VT==MVT::ppcf128) 2282 break; 2283 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2284 (void)apf.convertFromAPInt(Val, 2285 Opcode==ISD::SINT_TO_FP, 2286 APFloat::rmNearestTiesToEven); 2287 return getConstantFP(apf, VT); 2288 } 2289 case ISD::BIT_CONVERT: 2290 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2291 return getConstantFP(Val.bitsToFloat(), VT); 2292 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2293 return getConstantFP(Val.bitsToDouble(), VT); 2294 break; 2295 case ISD::BSWAP: 2296 return getConstant(Val.byteSwap(), VT); 2297 case ISD::CTPOP: 2298 return getConstant(Val.countPopulation(), VT); 2299 case ISD::CTLZ: 2300 return getConstant(Val.countLeadingZeros(), VT); 2301 case ISD::CTTZ: 2302 return getConstant(Val.countTrailingZeros(), VT); 2303 } 2304 } 2305 2306 // Constant fold unary operations with a floating point constant operand. 2307 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2308 APFloat V = C->getValueAPF(); // make copy 2309 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2310 switch (Opcode) { 2311 case ISD::FNEG: 2312 V.changeSign(); 2313 return getConstantFP(V, VT); 2314 case ISD::FABS: 2315 V.clearSign(); 2316 return getConstantFP(V, VT); 2317 case ISD::FP_ROUND: 2318 case ISD::FP_EXTEND: { 2319 bool ignored; 2320 // This can return overflow, underflow, or inexact; we don't care. 2321 // FIXME need to be more flexible about rounding mode. 2322 (void)V.convert(*EVTToAPFloatSemantics(VT), 2323 APFloat::rmNearestTiesToEven, &ignored); 2324 return getConstantFP(V, VT); 2325 } 2326 case ISD::FP_TO_SINT: 2327 case ISD::FP_TO_UINT: { 2328 integerPart x[2]; 2329 bool ignored; 2330 assert(integerPartWidth >= 64); 2331 // FIXME need to be more flexible about rounding mode. 2332 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2333 Opcode==ISD::FP_TO_SINT, 2334 APFloat::rmTowardZero, &ignored); 2335 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2336 break; 2337 APInt api(VT.getSizeInBits(), 2, x); 2338 return getConstant(api, VT); 2339 } 2340 case ISD::BIT_CONVERT: 2341 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2342 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2343 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2344 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2345 break; 2346 } 2347 } 2348 } 2349 2350 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2351 switch (Opcode) { 2352 case ISD::TokenFactor: 2353 case ISD::MERGE_VALUES: 2354 case ISD::CONCAT_VECTORS: 2355 return Operand; // Factor, merge or concat of one node? No need. 2356 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2357 case ISD::FP_EXTEND: 2358 assert(VT.isFloatingPoint() && 2359 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2360 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2361 if (Operand.getOpcode() == ISD::UNDEF) 2362 return getUNDEF(VT); 2363 break; 2364 case ISD::SIGN_EXTEND: 2365 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2366 "Invalid SIGN_EXTEND!"); 2367 if (Operand.getValueType() == VT) return Operand; // noop extension 2368 assert(Operand.getValueType().bitsLT(VT) 2369 && "Invalid sext node, dst < src!"); 2370 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2371 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2372 break; 2373 case ISD::ZERO_EXTEND: 2374 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2375 "Invalid ZERO_EXTEND!"); 2376 if (Operand.getValueType() == VT) return Operand; // noop extension 2377 assert(Operand.getValueType().bitsLT(VT) 2378 && "Invalid zext node, dst < src!"); 2379 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2380 return getNode(ISD::ZERO_EXTEND, DL, VT, 2381 Operand.getNode()->getOperand(0)); 2382 break; 2383 case ISD::ANY_EXTEND: 2384 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2385 "Invalid ANY_EXTEND!"); 2386 if (Operand.getValueType() == VT) return Operand; // noop extension 2387 assert(Operand.getValueType().bitsLT(VT) 2388 && "Invalid anyext node, dst < src!"); 2389 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2390 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2391 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2392 break; 2393 case ISD::TRUNCATE: 2394 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2395 "Invalid TRUNCATE!"); 2396 if (Operand.getValueType() == VT) return Operand; // noop truncate 2397 assert(Operand.getValueType().bitsGT(VT) 2398 && "Invalid truncate node, src < dst!"); 2399 if (OpOpcode == ISD::TRUNCATE) 2400 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2401 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2402 OpOpcode == ISD::ANY_EXTEND) { 2403 // If the source is smaller than the dest, we still need an extend. 2404 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2405 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2406 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2407 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2408 else 2409 return Operand.getNode()->getOperand(0); 2410 } 2411 break; 2412 case ISD::BIT_CONVERT: 2413 // Basic sanity checking. 2414 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2415 && "Cannot BIT_CONVERT between types of different sizes!"); 2416 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2417 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2418 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2419 if (OpOpcode == ISD::UNDEF) 2420 return getUNDEF(VT); 2421 break; 2422 case ISD::SCALAR_TO_VECTOR: 2423 assert(VT.isVector() && !Operand.getValueType().isVector() && 2424 (VT.getVectorElementType() == Operand.getValueType() || 2425 (VT.getVectorElementType().isInteger() && 2426 Operand.getValueType().isInteger() && 2427 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2428 "Illegal SCALAR_TO_VECTOR node!"); 2429 if (OpOpcode == ISD::UNDEF) 2430 return getUNDEF(VT); 2431 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2432 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2433 isa<ConstantSDNode>(Operand.getOperand(1)) && 2434 Operand.getConstantOperandVal(1) == 0 && 2435 Operand.getOperand(0).getValueType() == VT) 2436 return Operand.getOperand(0); 2437 break; 2438 case ISD::FNEG: 2439 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2440 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2441 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2442 Operand.getNode()->getOperand(0)); 2443 if (OpOpcode == ISD::FNEG) // --X -> X 2444 return Operand.getNode()->getOperand(0); 2445 break; 2446 case ISD::FABS: 2447 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2448 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2449 break; 2450 } 2451 2452 SDNode *N; 2453 SDVTList VTs = getVTList(VT); 2454 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2455 FoldingSetNodeID ID; 2456 SDValue Ops[1] = { Operand }; 2457 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2458 void *IP = 0; 2459 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2460 return SDValue(E, 0); 2461 N = NodeAllocator.Allocate<UnarySDNode>(); 2462 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2463 CSEMap.InsertNode(N, IP); 2464 } else { 2465 N = NodeAllocator.Allocate<UnarySDNode>(); 2466 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2467 } 2468 2469 AllNodes.push_back(N); 2470#ifndef NDEBUG 2471 VerifyNode(N); 2472#endif 2473 return SDValue(N, 0); 2474} 2475 2476SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2477 EVT VT, 2478 ConstantSDNode *Cst1, 2479 ConstantSDNode *Cst2) { 2480 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2481 2482 switch (Opcode) { 2483 case ISD::ADD: return getConstant(C1 + C2, VT); 2484 case ISD::SUB: return getConstant(C1 - C2, VT); 2485 case ISD::MUL: return getConstant(C1 * C2, VT); 2486 case ISD::UDIV: 2487 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2488 break; 2489 case ISD::UREM: 2490 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2491 break; 2492 case ISD::SDIV: 2493 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2494 break; 2495 case ISD::SREM: 2496 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2497 break; 2498 case ISD::AND: return getConstant(C1 & C2, VT); 2499 case ISD::OR: return getConstant(C1 | C2, VT); 2500 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2501 case ISD::SHL: return getConstant(C1 << C2, VT); 2502 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2503 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2504 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2505 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2506 default: break; 2507 } 2508 2509 return SDValue(); 2510} 2511 2512SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2513 SDValue N1, SDValue N2) { 2514 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2515 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2516 switch (Opcode) { 2517 default: break; 2518 case ISD::TokenFactor: 2519 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2520 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2521 // Fold trivial token factors. 2522 if (N1.getOpcode() == ISD::EntryToken) return N2; 2523 if (N2.getOpcode() == ISD::EntryToken) return N1; 2524 if (N1 == N2) return N1; 2525 break; 2526 case ISD::CONCAT_VECTORS: 2527 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2528 // one big BUILD_VECTOR. 2529 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2530 N2.getOpcode() == ISD::BUILD_VECTOR) { 2531 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2532 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2533 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2534 } 2535 break; 2536 case ISD::AND: 2537 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2538 N1.getValueType() == VT && "Binary operator types must match!"); 2539 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2540 // worth handling here. 2541 if (N2C && N2C->isNullValue()) 2542 return N2; 2543 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2544 return N1; 2545 break; 2546 case ISD::OR: 2547 case ISD::XOR: 2548 case ISD::ADD: 2549 case ISD::SUB: 2550 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2551 N1.getValueType() == VT && "Binary operator types must match!"); 2552 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2553 // it's worth handling here. 2554 if (N2C && N2C->isNullValue()) 2555 return N1; 2556 break; 2557 case ISD::UDIV: 2558 case ISD::UREM: 2559 case ISD::MULHU: 2560 case ISD::MULHS: 2561 case ISD::MUL: 2562 case ISD::SDIV: 2563 case ISD::SREM: 2564 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2565 // fall through 2566 case ISD::FADD: 2567 case ISD::FSUB: 2568 case ISD::FMUL: 2569 case ISD::FDIV: 2570 case ISD::FREM: 2571 if (UnsafeFPMath) { 2572 if (Opcode == ISD::FADD) { 2573 // 0+x --> x 2574 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2575 if (CFP->getValueAPF().isZero()) 2576 return N2; 2577 // x+0 --> x 2578 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2579 if (CFP->getValueAPF().isZero()) 2580 return N1; 2581 } else if (Opcode == ISD::FSUB) { 2582 // x-0 --> x 2583 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2584 if (CFP->getValueAPF().isZero()) 2585 return N1; 2586 } 2587 } 2588 assert(N1.getValueType() == N2.getValueType() && 2589 N1.getValueType() == VT && "Binary operator types must match!"); 2590 break; 2591 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2592 assert(N1.getValueType() == VT && 2593 N1.getValueType().isFloatingPoint() && 2594 N2.getValueType().isFloatingPoint() && 2595 "Invalid FCOPYSIGN!"); 2596 break; 2597 case ISD::SHL: 2598 case ISD::SRA: 2599 case ISD::SRL: 2600 case ISD::ROTL: 2601 case ISD::ROTR: 2602 assert(VT == N1.getValueType() && 2603 "Shift operators return type must be the same as their first arg"); 2604 assert(VT.isInteger() && N2.getValueType().isInteger() && 2605 "Shifts only work on integers"); 2606 2607 // Always fold shifts of i1 values so the code generator doesn't need to 2608 // handle them. Since we know the size of the shift has to be less than the 2609 // size of the value, the shift/rotate count is guaranteed to be zero. 2610 if (VT == MVT::i1) 2611 return N1; 2612 break; 2613 case ISD::FP_ROUND_INREG: { 2614 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2615 assert(VT == N1.getValueType() && "Not an inreg round!"); 2616 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2617 "Cannot FP_ROUND_INREG integer types"); 2618 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2619 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2620 break; 2621 } 2622 case ISD::FP_ROUND: 2623 assert(VT.isFloatingPoint() && 2624 N1.getValueType().isFloatingPoint() && 2625 VT.bitsLE(N1.getValueType()) && 2626 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2627 if (N1.getValueType() == VT) return N1; // noop conversion. 2628 break; 2629 case ISD::AssertSext: 2630 case ISD::AssertZext: { 2631 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2632 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2633 assert(VT.isInteger() && EVT.isInteger() && 2634 "Cannot *_EXTEND_INREG FP types"); 2635 assert(EVT.bitsLE(VT) && "Not extending!"); 2636 if (VT == EVT) return N1; // noop assertion. 2637 break; 2638 } 2639 case ISD::SIGN_EXTEND_INREG: { 2640 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2641 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2642 assert(VT.isInteger() && EVT.isInteger() && 2643 "Cannot *_EXTEND_INREG FP types"); 2644 assert(EVT.bitsLE(VT) && "Not extending!"); 2645 if (EVT == VT) return N1; // Not actually extending 2646 2647 if (N1C) { 2648 APInt Val = N1C->getAPIntValue(); 2649 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2650 Val <<= Val.getBitWidth()-FromBits; 2651 Val = Val.ashr(Val.getBitWidth()-FromBits); 2652 return getConstant(Val, VT); 2653 } 2654 break; 2655 } 2656 case ISD::EXTRACT_VECTOR_ELT: 2657 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2658 if (N1.getOpcode() == ISD::UNDEF) 2659 return getUNDEF(VT); 2660 2661 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2662 // expanding copies of large vectors from registers. 2663 if (N2C && 2664 N1.getOpcode() == ISD::CONCAT_VECTORS && 2665 N1.getNumOperands() > 0) { 2666 unsigned Factor = 2667 N1.getOperand(0).getValueType().getVectorNumElements(); 2668 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2669 N1.getOperand(N2C->getZExtValue() / Factor), 2670 getConstant(N2C->getZExtValue() % Factor, 2671 N2.getValueType())); 2672 } 2673 2674 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2675 // expanding large vector constants. 2676 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2677 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2678 EVT VEltTy = N1.getValueType().getVectorElementType(); 2679 if (Elt.getValueType() != VEltTy) { 2680 // If the vector element type is not legal, the BUILD_VECTOR operands 2681 // are promoted and implicitly truncated. Make that explicit here. 2682 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2683 } 2684 if (VT != VEltTy) { 2685 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2686 // result is implicitly extended. 2687 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2688 } 2689 return Elt; 2690 } 2691 2692 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2693 // operations are lowered to scalars. 2694 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2695 // If the indices are the same, return the inserted element. 2696 if (N1.getOperand(2) == N2) 2697 return N1.getOperand(1); 2698 // If the indices are known different, extract the element from 2699 // the original vector. 2700 else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2701 isa<ConstantSDNode>(N2)) 2702 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2703 } 2704 break; 2705 case ISD::EXTRACT_ELEMENT: 2706 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2707 assert(!N1.getValueType().isVector() && !VT.isVector() && 2708 (N1.getValueType().isInteger() == VT.isInteger()) && 2709 "Wrong types for EXTRACT_ELEMENT!"); 2710 2711 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2712 // 64-bit integers into 32-bit parts. Instead of building the extract of 2713 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2714 if (N1.getOpcode() == ISD::BUILD_PAIR) 2715 return N1.getOperand(N2C->getZExtValue()); 2716 2717 // EXTRACT_ELEMENT of a constant int is also very common. 2718 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2719 unsigned ElementSize = VT.getSizeInBits(); 2720 unsigned Shift = ElementSize * N2C->getZExtValue(); 2721 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2722 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2723 } 2724 break; 2725 case ISD::EXTRACT_SUBVECTOR: 2726 if (N1.getValueType() == VT) // Trivial extraction. 2727 return N1; 2728 break; 2729 } 2730 2731 if (N1C) { 2732 if (N2C) { 2733 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2734 if (SV.getNode()) return SV; 2735 } else { // Cannonicalize constant to RHS if commutative 2736 if (isCommutativeBinOp(Opcode)) { 2737 std::swap(N1C, N2C); 2738 std::swap(N1, N2); 2739 } 2740 } 2741 } 2742 2743 // Constant fold FP operations. 2744 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2745 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2746 if (N1CFP) { 2747 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2748 // Cannonicalize constant to RHS if commutative 2749 std::swap(N1CFP, N2CFP); 2750 std::swap(N1, N2); 2751 } else if (N2CFP && VT != MVT::ppcf128) { 2752 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2753 APFloat::opStatus s; 2754 switch (Opcode) { 2755 case ISD::FADD: 2756 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2757 if (s != APFloat::opInvalidOp) 2758 return getConstantFP(V1, VT); 2759 break; 2760 case ISD::FSUB: 2761 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2762 if (s!=APFloat::opInvalidOp) 2763 return getConstantFP(V1, VT); 2764 break; 2765 case ISD::FMUL: 2766 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2767 if (s!=APFloat::opInvalidOp) 2768 return getConstantFP(V1, VT); 2769 break; 2770 case ISD::FDIV: 2771 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2772 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2773 return getConstantFP(V1, VT); 2774 break; 2775 case ISD::FREM : 2776 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2777 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2778 return getConstantFP(V1, VT); 2779 break; 2780 case ISD::FCOPYSIGN: 2781 V1.copySign(V2); 2782 return getConstantFP(V1, VT); 2783 default: break; 2784 } 2785 } 2786 } 2787 2788 // Canonicalize an UNDEF to the RHS, even over a constant. 2789 if (N1.getOpcode() == ISD::UNDEF) { 2790 if (isCommutativeBinOp(Opcode)) { 2791 std::swap(N1, N2); 2792 } else { 2793 switch (Opcode) { 2794 case ISD::FP_ROUND_INREG: 2795 case ISD::SIGN_EXTEND_INREG: 2796 case ISD::SUB: 2797 case ISD::FSUB: 2798 case ISD::FDIV: 2799 case ISD::FREM: 2800 case ISD::SRA: 2801 return N1; // fold op(undef, arg2) -> undef 2802 case ISD::UDIV: 2803 case ISD::SDIV: 2804 case ISD::UREM: 2805 case ISD::SREM: 2806 case ISD::SRL: 2807 case ISD::SHL: 2808 if (!VT.isVector()) 2809 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2810 // For vectors, we can't easily build an all zero vector, just return 2811 // the LHS. 2812 return N2; 2813 } 2814 } 2815 } 2816 2817 // Fold a bunch of operators when the RHS is undef. 2818 if (N2.getOpcode() == ISD::UNDEF) { 2819 switch (Opcode) { 2820 case ISD::XOR: 2821 if (N1.getOpcode() == ISD::UNDEF) 2822 // Handle undef ^ undef -> 0 special case. This is a common 2823 // idiom (misuse). 2824 return getConstant(0, VT); 2825 // fallthrough 2826 case ISD::ADD: 2827 case ISD::ADDC: 2828 case ISD::ADDE: 2829 case ISD::SUB: 2830 case ISD::UDIV: 2831 case ISD::SDIV: 2832 case ISD::UREM: 2833 case ISD::SREM: 2834 return N2; // fold op(arg1, undef) -> undef 2835 case ISD::FADD: 2836 case ISD::FSUB: 2837 case ISD::FMUL: 2838 case ISD::FDIV: 2839 case ISD::FREM: 2840 if (UnsafeFPMath) 2841 return N2; 2842 break; 2843 case ISD::MUL: 2844 case ISD::AND: 2845 case ISD::SRL: 2846 case ISD::SHL: 2847 if (!VT.isVector()) 2848 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2849 // For vectors, we can't easily build an all zero vector, just return 2850 // the LHS. 2851 return N1; 2852 case ISD::OR: 2853 if (!VT.isVector()) 2854 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2855 // For vectors, we can't easily build an all one vector, just return 2856 // the LHS. 2857 return N1; 2858 case ISD::SRA: 2859 return N1; 2860 } 2861 } 2862 2863 // Memoize this node if possible. 2864 SDNode *N; 2865 SDVTList VTs = getVTList(VT); 2866 if (VT != MVT::Flag) { 2867 SDValue Ops[] = { N1, N2 }; 2868 FoldingSetNodeID ID; 2869 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2870 void *IP = 0; 2871 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2872 return SDValue(E, 0); 2873 N = NodeAllocator.Allocate<BinarySDNode>(); 2874 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2875 CSEMap.InsertNode(N, IP); 2876 } else { 2877 N = NodeAllocator.Allocate<BinarySDNode>(); 2878 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2879 } 2880 2881 AllNodes.push_back(N); 2882#ifndef NDEBUG 2883 VerifyNode(N); 2884#endif 2885 return SDValue(N, 0); 2886} 2887 2888SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2889 SDValue N1, SDValue N2, SDValue N3) { 2890 // Perform various simplifications. 2891 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2892 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2893 switch (Opcode) { 2894 case ISD::CONCAT_VECTORS: 2895 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2896 // one big BUILD_VECTOR. 2897 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2898 N2.getOpcode() == ISD::BUILD_VECTOR && 2899 N3.getOpcode() == ISD::BUILD_VECTOR) { 2900 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2901 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2902 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2903 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2904 } 2905 break; 2906 case ISD::SETCC: { 2907 // Use FoldSetCC to simplify SETCC's. 2908 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 2909 if (Simp.getNode()) return Simp; 2910 break; 2911 } 2912 case ISD::SELECT: 2913 if (N1C) { 2914 if (N1C->getZExtValue()) 2915 return N2; // select true, X, Y -> X 2916 else 2917 return N3; // select false, X, Y -> Y 2918 } 2919 2920 if (N2 == N3) return N2; // select C, X, X -> X 2921 break; 2922 case ISD::BRCOND: 2923 if (N2C) { 2924 if (N2C->getZExtValue()) // Unconditional branch 2925 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 2926 else 2927 return N1; // Never-taken branch 2928 } 2929 break; 2930 case ISD::VECTOR_SHUFFLE: 2931 llvm_unreachable("should use getVectorShuffle constructor!"); 2932 break; 2933 case ISD::BIT_CONVERT: 2934 // Fold bit_convert nodes from a type to themselves. 2935 if (N1.getValueType() == VT) 2936 return N1; 2937 break; 2938 } 2939 2940 // Memoize node if it doesn't produce a flag. 2941 SDNode *N; 2942 SDVTList VTs = getVTList(VT); 2943 if (VT != MVT::Flag) { 2944 SDValue Ops[] = { N1, N2, N3 }; 2945 FoldingSetNodeID ID; 2946 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2947 void *IP = 0; 2948 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2949 return SDValue(E, 0); 2950 N = NodeAllocator.Allocate<TernarySDNode>(); 2951 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2952 CSEMap.InsertNode(N, IP); 2953 } else { 2954 N = NodeAllocator.Allocate<TernarySDNode>(); 2955 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2956 } 2957 AllNodes.push_back(N); 2958#ifndef NDEBUG 2959 VerifyNode(N); 2960#endif 2961 return SDValue(N, 0); 2962} 2963 2964SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2965 SDValue N1, SDValue N2, SDValue N3, 2966 SDValue N4) { 2967 SDValue Ops[] = { N1, N2, N3, N4 }; 2968 return getNode(Opcode, DL, VT, Ops, 4); 2969} 2970 2971SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2972 SDValue N1, SDValue N2, SDValue N3, 2973 SDValue N4, SDValue N5) { 2974 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2975 return getNode(Opcode, DL, VT, Ops, 5); 2976} 2977 2978/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 2979/// the incoming stack arguments to be loaded from the stack. 2980SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 2981 SmallVector<SDValue, 8> ArgChains; 2982 2983 // Include the original chain at the beginning of the list. When this is 2984 // used by target LowerCall hooks, this helps legalize find the 2985 // CALLSEQ_BEGIN node. 2986 ArgChains.push_back(Chain); 2987 2988 // Add a chain value for each stack argument. 2989 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 2990 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 2991 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 2992 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 2993 if (FI->getIndex() < 0) 2994 ArgChains.push_back(SDValue(L, 1)); 2995 2996 // Build a tokenfactor for all the chains. 2997 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 2998 &ArgChains[0], ArgChains.size()); 2999} 3000 3001/// getMemsetValue - Vectorized representation of the memset value 3002/// operand. 3003static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3004 DebugLoc dl) { 3005 unsigned NumBits = VT.isVector() ? 3006 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 3007 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3008 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3009 unsigned Shift = 8; 3010 for (unsigned i = NumBits; i > 8; i >>= 1) { 3011 Val = (Val << Shift) | Val; 3012 Shift <<= 1; 3013 } 3014 if (VT.isInteger()) 3015 return DAG.getConstant(Val, VT); 3016 return DAG.getConstantFP(APFloat(Val), VT); 3017 } 3018 3019 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3020 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3021 unsigned Shift = 8; 3022 for (unsigned i = NumBits; i > 8; i >>= 1) { 3023 Value = DAG.getNode(ISD::OR, dl, VT, 3024 DAG.getNode(ISD::SHL, dl, VT, Value, 3025 DAG.getConstant(Shift, 3026 TLI.getShiftAmountTy())), 3027 Value); 3028 Shift <<= 1; 3029 } 3030 3031 return Value; 3032} 3033 3034/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3035/// used when a memcpy is turned into a memset when the source is a constant 3036/// string ptr. 3037static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3038 const TargetLowering &TLI, 3039 std::string &Str, unsigned Offset) { 3040 // Handle vector with all elements zero. 3041 if (Str.empty()) { 3042 if (VT.isInteger()) 3043 return DAG.getConstant(0, VT); 3044 unsigned NumElts = VT.getVectorNumElements(); 3045 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3046 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3047 DAG.getConstant(0, 3048 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts))); 3049 } 3050 3051 assert(!VT.isVector() && "Can't handle vector type here!"); 3052 unsigned NumBits = VT.getSizeInBits(); 3053 unsigned MSB = NumBits / 8; 3054 uint64_t Val = 0; 3055 if (TLI.isLittleEndian()) 3056 Offset = Offset + MSB - 1; 3057 for (unsigned i = 0; i != MSB; ++i) { 3058 Val = (Val << 8) | (unsigned char)Str[Offset]; 3059 Offset += TLI.isLittleEndian() ? -1 : 1; 3060 } 3061 return DAG.getConstant(Val, VT); 3062} 3063 3064/// getMemBasePlusOffset - Returns base and offset node for the 3065/// 3066static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3067 SelectionDAG &DAG) { 3068 EVT VT = Base.getValueType(); 3069 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3070 VT, Base, DAG.getConstant(Offset, VT)); 3071} 3072 3073/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3074/// 3075static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3076 unsigned SrcDelta = 0; 3077 GlobalAddressSDNode *G = NULL; 3078 if (Src.getOpcode() == ISD::GlobalAddress) 3079 G = cast<GlobalAddressSDNode>(Src); 3080 else if (Src.getOpcode() == ISD::ADD && 3081 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3082 Src.getOperand(1).getOpcode() == ISD::Constant) { 3083 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3084 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3085 } 3086 if (!G) 3087 return false; 3088 3089 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3090 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3091 return true; 3092 3093 return false; 3094} 3095 3096/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3097/// to replace the memset / memcpy is below the threshold. It also returns the 3098/// types of the sequence of memory ops to perform memset / memcpy. 3099static 3100bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps, 3101 SDValue Dst, SDValue Src, 3102 unsigned Limit, uint64_t Size, unsigned &Align, 3103 std::string &Str, bool &isSrcStr, 3104 SelectionDAG &DAG, 3105 const TargetLowering &TLI) { 3106 isSrcStr = isMemSrcFromString(Src, Str); 3107 bool isSrcConst = isa<ConstantSDNode>(Src); 3108 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 3109 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); 3110 if (VT != MVT::iAny) { 3111 unsigned NewAlign = (unsigned) 3112 TLI.getTargetData()->getABITypeAlignment( 3113 VT.getTypeForEVT(*DAG.getContext())); 3114 // If source is a string constant, this will require an unaligned load. 3115 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3116 if (Dst.getOpcode() != ISD::FrameIndex) { 3117 // Can't change destination alignment. It requires a unaligned store. 3118 if (AllowUnalign) 3119 VT = MVT::iAny; 3120 } else { 3121 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3122 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3123 if (MFI->isFixedObjectIndex(FI)) { 3124 // Can't change destination alignment. It requires a unaligned store. 3125 if (AllowUnalign) 3126 VT = MVT::iAny; 3127 } else { 3128 // Give the stack frame object a larger alignment if needed. 3129 if (MFI->getObjectAlignment(FI) < NewAlign) 3130 MFI->setObjectAlignment(FI, NewAlign); 3131 Align = NewAlign; 3132 } 3133 } 3134 } 3135 } 3136 3137 if (VT == MVT::iAny) { 3138 if (AllowUnalign) { 3139 VT = MVT::i64; 3140 } else { 3141 switch (Align & 7) { 3142 case 0: VT = MVT::i64; break; 3143 case 4: VT = MVT::i32; break; 3144 case 2: VT = MVT::i16; break; 3145 default: VT = MVT::i8; break; 3146 } 3147 } 3148 3149 MVT LVT = MVT::i64; 3150 while (!TLI.isTypeLegal(LVT)) 3151 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3152 assert(LVT.isInteger()); 3153 3154 if (VT.bitsGT(LVT)) 3155 VT = LVT; 3156 } 3157 3158 unsigned NumMemOps = 0; 3159 while (Size != 0) { 3160 unsigned VTSize = VT.getSizeInBits() / 8; 3161 while (VTSize > Size) { 3162 // For now, only use non-vector load / store's for the left-over pieces. 3163 if (VT.isVector()) { 3164 VT = MVT::i64; 3165 while (!TLI.isTypeLegal(VT)) 3166 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3167 VTSize = VT.getSizeInBits() / 8; 3168 } else { 3169 // This can result in a type that is not legal on the target, e.g. 3170 // 1 or 2 bytes on PPC. 3171 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3172 VTSize >>= 1; 3173 } 3174 } 3175 3176 if (++NumMemOps > Limit) 3177 return false; 3178 MemOps.push_back(VT); 3179 Size -= VTSize; 3180 } 3181 3182 return true; 3183} 3184 3185static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3186 SDValue Chain, SDValue Dst, 3187 SDValue Src, uint64_t Size, 3188 unsigned Align, bool AlwaysInline, 3189 const Value *DstSV, uint64_t DstSVOff, 3190 const Value *SrcSV, uint64_t SrcSVOff){ 3191 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3192 3193 // Expand memcpy to a series of load and store ops if the size operand falls 3194 // below a certain threshold. 3195 std::vector<EVT> MemOps; 3196 uint64_t Limit = -1ULL; 3197 if (!AlwaysInline) 3198 Limit = TLI.getMaxStoresPerMemcpy(); 3199 unsigned DstAlign = Align; // Destination alignment can change. 3200 std::string Str; 3201 bool CopyFromStr; 3202 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3203 Str, CopyFromStr, DAG, TLI)) 3204 return SDValue(); 3205 3206 3207 bool isZeroStr = CopyFromStr && Str.empty(); 3208 SmallVector<SDValue, 8> OutChains; 3209 unsigned NumMemOps = MemOps.size(); 3210 uint64_t SrcOff = 0, DstOff = 0; 3211 for (unsigned i = 0; i < NumMemOps; i++) { 3212 EVT VT = MemOps[i]; 3213 unsigned VTSize = VT.getSizeInBits() / 8; 3214 SDValue Value, Store; 3215 3216 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3217 // It's unlikely a store of a vector immediate can be done in a single 3218 // instruction. It would require a load from a constantpool first. 3219 // We also handle store a vector with all zero's. 3220 // FIXME: Handle other cases where store of vector immediate is done in 3221 // a single instruction. 3222 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3223 Store = DAG.getStore(Chain, dl, Value, 3224 getMemBasePlusOffset(Dst, DstOff, DAG), 3225 DstSV, DstSVOff + DstOff, false, DstAlign); 3226 } else { 3227 // The type might not be legal for the target. This should only happen 3228 // if the type is smaller than a legal type, as on PPC, so the right 3229 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3230 // to Load/Store if NVT==VT. 3231 // FIXME does the case above also need this? 3232 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3233 assert(NVT.bitsGE(VT)); 3234 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3235 getMemBasePlusOffset(Src, SrcOff, DAG), 3236 SrcSV, SrcSVOff + SrcOff, VT, false, Align); 3237 Store = DAG.getTruncStore(Chain, dl, Value, 3238 getMemBasePlusOffset(Dst, DstOff, DAG), 3239 DstSV, DstSVOff + DstOff, VT, false, DstAlign); 3240 } 3241 OutChains.push_back(Store); 3242 SrcOff += VTSize; 3243 DstOff += VTSize; 3244 } 3245 3246 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3247 &OutChains[0], OutChains.size()); 3248} 3249 3250static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3251 SDValue Chain, SDValue Dst, 3252 SDValue Src, uint64_t Size, 3253 unsigned Align, bool AlwaysInline, 3254 const Value *DstSV, uint64_t DstSVOff, 3255 const Value *SrcSV, uint64_t SrcSVOff){ 3256 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3257 3258 // Expand memmove to a series of load and store ops if the size operand falls 3259 // below a certain threshold. 3260 std::vector<EVT> MemOps; 3261 uint64_t Limit = -1ULL; 3262 if (!AlwaysInline) 3263 Limit = TLI.getMaxStoresPerMemmove(); 3264 unsigned DstAlign = Align; // Destination alignment can change. 3265 std::string Str; 3266 bool CopyFromStr; 3267 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3268 Str, CopyFromStr, DAG, TLI)) 3269 return SDValue(); 3270 3271 uint64_t SrcOff = 0, DstOff = 0; 3272 3273 SmallVector<SDValue, 8> LoadValues; 3274 SmallVector<SDValue, 8> LoadChains; 3275 SmallVector<SDValue, 8> OutChains; 3276 unsigned NumMemOps = MemOps.size(); 3277 for (unsigned i = 0; i < NumMemOps; i++) { 3278 EVT VT = MemOps[i]; 3279 unsigned VTSize = VT.getSizeInBits() / 8; 3280 SDValue Value, Store; 3281 3282 Value = DAG.getLoad(VT, dl, Chain, 3283 getMemBasePlusOffset(Src, SrcOff, DAG), 3284 SrcSV, SrcSVOff + SrcOff, false, Align); 3285 LoadValues.push_back(Value); 3286 LoadChains.push_back(Value.getValue(1)); 3287 SrcOff += VTSize; 3288 } 3289 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3290 &LoadChains[0], LoadChains.size()); 3291 OutChains.clear(); 3292 for (unsigned i = 0; i < NumMemOps; i++) { 3293 EVT VT = MemOps[i]; 3294 unsigned VTSize = VT.getSizeInBits() / 8; 3295 SDValue Value, Store; 3296 3297 Store = DAG.getStore(Chain, dl, LoadValues[i], 3298 getMemBasePlusOffset(Dst, DstOff, DAG), 3299 DstSV, DstSVOff + DstOff, false, DstAlign); 3300 OutChains.push_back(Store); 3301 DstOff += VTSize; 3302 } 3303 3304 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3305 &OutChains[0], OutChains.size()); 3306} 3307 3308static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3309 SDValue Chain, SDValue Dst, 3310 SDValue Src, uint64_t Size, 3311 unsigned Align, 3312 const Value *DstSV, uint64_t DstSVOff) { 3313 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3314 3315 // Expand memset to a series of load/store ops if the size operand 3316 // falls below a certain threshold. 3317 std::vector<EVT> MemOps; 3318 std::string Str; 3319 bool CopyFromStr; 3320 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3321 Size, Align, Str, CopyFromStr, DAG, TLI)) 3322 return SDValue(); 3323 3324 SmallVector<SDValue, 8> OutChains; 3325 uint64_t DstOff = 0; 3326 3327 unsigned NumMemOps = MemOps.size(); 3328 for (unsigned i = 0; i < NumMemOps; i++) { 3329 EVT VT = MemOps[i]; 3330 unsigned VTSize = VT.getSizeInBits() / 8; 3331 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3332 SDValue Store = DAG.getStore(Chain, dl, Value, 3333 getMemBasePlusOffset(Dst, DstOff, DAG), 3334 DstSV, DstSVOff + DstOff); 3335 OutChains.push_back(Store); 3336 DstOff += VTSize; 3337 } 3338 3339 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3340 &OutChains[0], OutChains.size()); 3341} 3342 3343SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3344 SDValue Src, SDValue Size, 3345 unsigned Align, bool AlwaysInline, 3346 const Value *DstSV, uint64_t DstSVOff, 3347 const Value *SrcSV, uint64_t SrcSVOff) { 3348 3349 // Check to see if we should lower the memcpy to loads and stores first. 3350 // For cases within the target-specified limits, this is the best choice. 3351 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3352 if (ConstantSize) { 3353 // Memcpy with size zero? Just return the original chain. 3354 if (ConstantSize->isNullValue()) 3355 return Chain; 3356 3357 SDValue Result = 3358 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3359 ConstantSize->getZExtValue(), 3360 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3361 if (Result.getNode()) 3362 return Result; 3363 } 3364 3365 // Then check to see if we should lower the memcpy with target-specific 3366 // code. If the target chooses to do this, this is the next best. 3367 SDValue Result = 3368 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3369 AlwaysInline, 3370 DstSV, DstSVOff, SrcSV, SrcSVOff); 3371 if (Result.getNode()) 3372 return Result; 3373 3374 // If we really need inline code and the target declined to provide it, 3375 // use a (potentially long) sequence of loads and stores. 3376 if (AlwaysInline) { 3377 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3378 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3379 ConstantSize->getZExtValue(), Align, true, 3380 DstSV, DstSVOff, SrcSV, SrcSVOff); 3381 } 3382 3383 // Emit a library call. 3384 TargetLowering::ArgListTy Args; 3385 TargetLowering::ArgListEntry Entry; 3386 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3387 Entry.Node = Dst; Args.push_back(Entry); 3388 Entry.Node = Src; Args.push_back(Entry); 3389 Entry.Node = Size; Args.push_back(Entry); 3390 // FIXME: pass in DebugLoc 3391 std::pair<SDValue,SDValue> CallResult = 3392 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3393 false, false, false, false, 0, CallingConv::C, false, 3394 /*isReturnValueUsed=*/false, 3395 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3396 TLI.getPointerTy()), 3397 Args, *this, dl); 3398 return CallResult.second; 3399} 3400 3401SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3402 SDValue Src, SDValue Size, 3403 unsigned Align, 3404 const Value *DstSV, uint64_t DstSVOff, 3405 const Value *SrcSV, uint64_t SrcSVOff) { 3406 3407 // Check to see if we should lower the memmove to loads and stores first. 3408 // For cases within the target-specified limits, this is the best choice. 3409 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3410 if (ConstantSize) { 3411 // Memmove with size zero? Just return the original chain. 3412 if (ConstantSize->isNullValue()) 3413 return Chain; 3414 3415 SDValue Result = 3416 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3417 ConstantSize->getZExtValue(), 3418 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3419 if (Result.getNode()) 3420 return Result; 3421 } 3422 3423 // Then check to see if we should lower the memmove with target-specific 3424 // code. If the target chooses to do this, this is the next best. 3425 SDValue Result = 3426 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, 3427 DstSV, DstSVOff, SrcSV, SrcSVOff); 3428 if (Result.getNode()) 3429 return Result; 3430 3431 // Emit a library call. 3432 TargetLowering::ArgListTy Args; 3433 TargetLowering::ArgListEntry Entry; 3434 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3435 Entry.Node = Dst; Args.push_back(Entry); 3436 Entry.Node = Src; Args.push_back(Entry); 3437 Entry.Node = Size; Args.push_back(Entry); 3438 // FIXME: pass in DebugLoc 3439 std::pair<SDValue,SDValue> CallResult = 3440 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3441 false, false, false, false, 0, CallingConv::C, false, 3442 /*isReturnValueUsed=*/false, 3443 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3444 TLI.getPointerTy()), 3445 Args, *this, dl); 3446 return CallResult.second; 3447} 3448 3449SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3450 SDValue Src, SDValue Size, 3451 unsigned Align, 3452 const Value *DstSV, uint64_t DstSVOff) { 3453 3454 // Check to see if we should lower the memset to stores first. 3455 // For cases within the target-specified limits, this is the best choice. 3456 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3457 if (ConstantSize) { 3458 // Memset with size zero? Just return the original chain. 3459 if (ConstantSize->isNullValue()) 3460 return Chain; 3461 3462 SDValue Result = 3463 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3464 Align, DstSV, DstSVOff); 3465 if (Result.getNode()) 3466 return Result; 3467 } 3468 3469 // Then check to see if we should lower the memset with target-specific 3470 // code. If the target chooses to do this, this is the next best. 3471 SDValue Result = 3472 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, 3473 DstSV, DstSVOff); 3474 if (Result.getNode()) 3475 return Result; 3476 3477 // Emit a library call. 3478 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3479 TargetLowering::ArgListTy Args; 3480 TargetLowering::ArgListEntry Entry; 3481 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3482 Args.push_back(Entry); 3483 // Extend or truncate the argument to be an i32 value for the call. 3484 if (Src.getValueType().bitsGT(MVT::i32)) 3485 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3486 else 3487 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3488 Entry.Node = Src; 3489 Entry.Ty = Type::getInt32Ty(*getContext()); 3490 Entry.isSExt = true; 3491 Args.push_back(Entry); 3492 Entry.Node = Size; 3493 Entry.Ty = IntPtrTy; 3494 Entry.isSExt = false; 3495 Args.push_back(Entry); 3496 // FIXME: pass in DebugLoc 3497 std::pair<SDValue,SDValue> CallResult = 3498 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3499 false, false, false, false, 0, CallingConv::C, false, 3500 /*isReturnValueUsed=*/false, 3501 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3502 TLI.getPointerTy()), 3503 Args, *this, dl); 3504 return CallResult.second; 3505} 3506 3507SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3508 SDValue Chain, 3509 SDValue Ptr, SDValue Cmp, 3510 SDValue Swp, const Value* PtrVal, 3511 unsigned Alignment) { 3512 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3513 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3514 3515 EVT VT = Cmp.getValueType(); 3516 3517 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3518 Alignment = getEVTAlignment(MemVT); 3519 3520 SDVTList VTs = getVTList(VT, MVT::Other); 3521 FoldingSetNodeID ID; 3522 ID.AddInteger(MemVT.getRawBits()); 3523 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3524 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3525 void* IP = 0; 3526 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3527 return SDValue(E, 0); 3528 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3529 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3530 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3531 CSEMap.InsertNode(N, IP); 3532 AllNodes.push_back(N); 3533 return SDValue(N, 0); 3534} 3535 3536SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3537 SDValue Chain, 3538 SDValue Ptr, SDValue Val, 3539 const Value* PtrVal, 3540 unsigned Alignment) { 3541 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3542 Opcode == ISD::ATOMIC_LOAD_SUB || 3543 Opcode == ISD::ATOMIC_LOAD_AND || 3544 Opcode == ISD::ATOMIC_LOAD_OR || 3545 Opcode == ISD::ATOMIC_LOAD_XOR || 3546 Opcode == ISD::ATOMIC_LOAD_NAND || 3547 Opcode == ISD::ATOMIC_LOAD_MIN || 3548 Opcode == ISD::ATOMIC_LOAD_MAX || 3549 Opcode == ISD::ATOMIC_LOAD_UMIN || 3550 Opcode == ISD::ATOMIC_LOAD_UMAX || 3551 Opcode == ISD::ATOMIC_SWAP) && 3552 "Invalid Atomic Op"); 3553 3554 EVT VT = Val.getValueType(); 3555 3556 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3557 Alignment = getEVTAlignment(MemVT); 3558 3559 SDVTList VTs = getVTList(VT, MVT::Other); 3560 FoldingSetNodeID ID; 3561 ID.AddInteger(MemVT.getRawBits()); 3562 SDValue Ops[] = {Chain, Ptr, Val}; 3563 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3564 void* IP = 0; 3565 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3566 return SDValue(E, 0); 3567 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3568 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3569 Chain, Ptr, Val, PtrVal, Alignment); 3570 CSEMap.InsertNode(N, IP); 3571 AllNodes.push_back(N); 3572 return SDValue(N, 0); 3573} 3574 3575/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3576/// Allowed to return something different (and simpler) if Simplify is true. 3577SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3578 DebugLoc dl) { 3579 if (NumOps == 1) 3580 return Ops[0]; 3581 3582 SmallVector<EVT, 4> VTs; 3583 VTs.reserve(NumOps); 3584 for (unsigned i = 0; i < NumOps; ++i) 3585 VTs.push_back(Ops[i].getValueType()); 3586 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3587 Ops, NumOps); 3588} 3589 3590SDValue 3591SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3592 const EVT *VTs, unsigned NumVTs, 3593 const SDValue *Ops, unsigned NumOps, 3594 EVT MemVT, const Value *srcValue, int SVOff, 3595 unsigned Align, bool Vol, 3596 bool ReadMem, bool WriteMem) { 3597 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3598 MemVT, srcValue, SVOff, Align, Vol, 3599 ReadMem, WriteMem); 3600} 3601 3602SDValue 3603SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3604 const SDValue *Ops, unsigned NumOps, 3605 EVT MemVT, const Value *srcValue, int SVOff, 3606 unsigned Align, bool Vol, 3607 bool ReadMem, bool WriteMem) { 3608 // Memoize the node unless it returns a flag. 3609 MemIntrinsicSDNode *N; 3610 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3611 FoldingSetNodeID ID; 3612 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3613 void *IP = 0; 3614 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3615 return SDValue(E, 0); 3616 3617 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3618 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3619 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3620 CSEMap.InsertNode(N, IP); 3621 } else { 3622 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3623 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3624 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3625 } 3626 AllNodes.push_back(N); 3627 return SDValue(N, 0); 3628} 3629 3630SDValue 3631SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3632 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3633 SDValue Ptr, SDValue Offset, 3634 const Value *SV, int SVOffset, EVT EVT, 3635 bool isVolatile, unsigned Alignment) { 3636 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3637 Alignment = getEVTAlignment(VT); 3638 3639 if (VT == EVT) { 3640 ExtType = ISD::NON_EXTLOAD; 3641 } else if (ExtType == ISD::NON_EXTLOAD) { 3642 assert(VT == EVT && "Non-extending load from different memory type!"); 3643 } else { 3644 // Extending load. 3645 if (VT.isVector()) 3646 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3647 "Invalid vector extload!"); 3648 else 3649 assert(EVT.bitsLT(VT) && 3650 "Should only be an extending load, not truncating!"); 3651 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3652 "Cannot sign/zero extend a FP/Vector load!"); 3653 assert(VT.isInteger() == EVT.isInteger() && 3654 "Cannot convert from FP to Int or Int -> FP!"); 3655 } 3656 3657 bool Indexed = AM != ISD::UNINDEXED; 3658 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3659 "Unindexed load with an offset!"); 3660 3661 SDVTList VTs = Indexed ? 3662 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3663 SDValue Ops[] = { Chain, Ptr, Offset }; 3664 FoldingSetNodeID ID; 3665 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3666 ID.AddInteger(EVT.getRawBits()); 3667 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment)); 3668 void *IP = 0; 3669 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3670 return SDValue(E, 0); 3671 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3672 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset, 3673 Alignment, isVolatile); 3674 CSEMap.InsertNode(N, IP); 3675 AllNodes.push_back(N); 3676 return SDValue(N, 0); 3677} 3678 3679SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3680 SDValue Chain, SDValue Ptr, 3681 const Value *SV, int SVOffset, 3682 bool isVolatile, unsigned Alignment) { 3683 SDValue Undef = getUNDEF(Ptr.getValueType()); 3684 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3685 SV, SVOffset, VT, isVolatile, Alignment); 3686} 3687 3688SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3689 SDValue Chain, SDValue Ptr, 3690 const Value *SV, 3691 int SVOffset, EVT EVT, 3692 bool isVolatile, unsigned Alignment) { 3693 SDValue Undef = getUNDEF(Ptr.getValueType()); 3694 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3695 SV, SVOffset, EVT, isVolatile, Alignment); 3696} 3697 3698SDValue 3699SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3700 SDValue Offset, ISD::MemIndexedMode AM) { 3701 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3702 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3703 "Load is already a indexed load!"); 3704 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3705 LD->getChain(), Base, Offset, LD->getSrcValue(), 3706 LD->getSrcValueOffset(), LD->getMemoryVT(), 3707 LD->isVolatile(), LD->getAlignment()); 3708} 3709 3710SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3711 SDValue Ptr, const Value *SV, int SVOffset, 3712 bool isVolatile, unsigned Alignment) { 3713 EVT VT = Val.getValueType(); 3714 3715 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3716 Alignment = getEVTAlignment(VT); 3717 3718 SDVTList VTs = getVTList(MVT::Other); 3719 SDValue Undef = getUNDEF(Ptr.getValueType()); 3720 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3721 FoldingSetNodeID ID; 3722 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3723 ID.AddInteger(VT.getRawBits()); 3724 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, 3725 isVolatile, Alignment)); 3726 void *IP = 0; 3727 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3728 return SDValue(E, 0); 3729 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3730 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, 3731 VT, SV, SVOffset, Alignment, isVolatile); 3732 CSEMap.InsertNode(N, IP); 3733 AllNodes.push_back(N); 3734 return SDValue(N, 0); 3735} 3736 3737SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3738 SDValue Ptr, const Value *SV, 3739 int SVOffset, EVT SVT, 3740 bool isVolatile, unsigned Alignment) { 3741 EVT VT = Val.getValueType(); 3742 3743 if (VT == SVT) 3744 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3745 3746 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3747 assert(VT.isInteger() == SVT.isInteger() && 3748 "Can't do FP-INT conversion!"); 3749 3750 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3751 Alignment = getEVTAlignment(VT); 3752 3753 SDVTList VTs = getVTList(MVT::Other); 3754 SDValue Undef = getUNDEF(Ptr.getValueType()); 3755 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3756 FoldingSetNodeID ID; 3757 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3758 ID.AddInteger(SVT.getRawBits()); 3759 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, 3760 isVolatile, Alignment)); 3761 void *IP = 0; 3762 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3763 return SDValue(E, 0); 3764 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3765 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, 3766 SVT, SV, SVOffset, Alignment, isVolatile); 3767 CSEMap.InsertNode(N, IP); 3768 AllNodes.push_back(N); 3769 return SDValue(N, 0); 3770} 3771 3772SDValue 3773SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 3774 SDValue Offset, ISD::MemIndexedMode AM) { 3775 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3776 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3777 "Store is already a indexed store!"); 3778 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3779 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3780 FoldingSetNodeID ID; 3781 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3782 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3783 ID.AddInteger(ST->getRawSubclassData()); 3784 void *IP = 0; 3785 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3786 return SDValue(E, 0); 3787 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3788 new (N) StoreSDNode(Ops, dl, VTs, AM, 3789 ST->isTruncatingStore(), ST->getMemoryVT(), 3790 ST->getSrcValue(), ST->getSrcValueOffset(), 3791 ST->getAlignment(), ST->isVolatile()); 3792 CSEMap.InsertNode(N, IP); 3793 AllNodes.push_back(N); 3794 return SDValue(N, 0); 3795} 3796 3797SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 3798 SDValue Chain, SDValue Ptr, 3799 SDValue SV) { 3800 SDValue Ops[] = { Chain, Ptr, SV }; 3801 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 3802} 3803 3804SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3805 const SDUse *Ops, unsigned NumOps) { 3806 switch (NumOps) { 3807 case 0: return getNode(Opcode, DL, VT); 3808 case 1: return getNode(Opcode, DL, VT, Ops[0]); 3809 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 3810 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 3811 default: break; 3812 } 3813 3814 // Copy from an SDUse array into an SDValue array for use with 3815 // the regular getNode logic. 3816 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3817 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 3818} 3819 3820SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3821 const SDValue *Ops, unsigned NumOps) { 3822 switch (NumOps) { 3823 case 0: return getNode(Opcode, DL, VT); 3824 case 1: return getNode(Opcode, DL, VT, Ops[0]); 3825 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 3826 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 3827 default: break; 3828 } 3829 3830 switch (Opcode) { 3831 default: break; 3832 case ISD::SELECT_CC: { 3833 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3834 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3835 "LHS and RHS of condition must have same type!"); 3836 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3837 "True and False arms of SelectCC must have same type!"); 3838 assert(Ops[2].getValueType() == VT && 3839 "select_cc node must be of same type as true and false value!"); 3840 break; 3841 } 3842 case ISD::BR_CC: { 3843 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3844 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3845 "LHS/RHS of comparison should match types!"); 3846 break; 3847 } 3848 } 3849 3850 // Memoize nodes. 3851 SDNode *N; 3852 SDVTList VTs = getVTList(VT); 3853 3854 if (VT != MVT::Flag) { 3855 FoldingSetNodeID ID; 3856 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3857 void *IP = 0; 3858 3859 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3860 return SDValue(E, 0); 3861 3862 N = NodeAllocator.Allocate<SDNode>(); 3863 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 3864 CSEMap.InsertNode(N, IP); 3865 } else { 3866 N = NodeAllocator.Allocate<SDNode>(); 3867 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 3868 } 3869 3870 AllNodes.push_back(N); 3871#ifndef NDEBUG 3872 VerifyNode(N); 3873#endif 3874 return SDValue(N, 0); 3875} 3876 3877SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 3878 const std::vector<EVT> &ResultTys, 3879 const SDValue *Ops, unsigned NumOps) { 3880 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 3881 Ops, NumOps); 3882} 3883 3884SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 3885 const EVT *VTs, unsigned NumVTs, 3886 const SDValue *Ops, unsigned NumOps) { 3887 if (NumVTs == 1) 3888 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 3889 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 3890} 3891 3892SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3893 const SDValue *Ops, unsigned NumOps) { 3894 if (VTList.NumVTs == 1) 3895 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 3896 3897#if 0 3898 switch (Opcode) { 3899 // FIXME: figure out how to safely handle things like 3900 // int foo(int x) { return 1 << (x & 255); } 3901 // int bar() { return foo(256); } 3902 case ISD::SRA_PARTS: 3903 case ISD::SRL_PARTS: 3904 case ISD::SHL_PARTS: 3905 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3906 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3907 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 3908 else if (N3.getOpcode() == ISD::AND) 3909 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3910 // If the and is only masking out bits that cannot effect the shift, 3911 // eliminate the and. 3912 unsigned NumBits = VT.getSizeInBits()*2; 3913 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3914 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 3915 } 3916 break; 3917 } 3918#endif 3919 3920 // Memoize the node unless it returns a flag. 3921 SDNode *N; 3922 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3923 FoldingSetNodeID ID; 3924 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3925 void *IP = 0; 3926 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3927 return SDValue(E, 0); 3928 if (NumOps == 1) { 3929 N = NodeAllocator.Allocate<UnarySDNode>(); 3930 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 3931 } else if (NumOps == 2) { 3932 N = NodeAllocator.Allocate<BinarySDNode>(); 3933 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 3934 } else if (NumOps == 3) { 3935 N = NodeAllocator.Allocate<TernarySDNode>(); 3936 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 3937 } else { 3938 N = NodeAllocator.Allocate<SDNode>(); 3939 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 3940 } 3941 CSEMap.InsertNode(N, IP); 3942 } else { 3943 if (NumOps == 1) { 3944 N = NodeAllocator.Allocate<UnarySDNode>(); 3945 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 3946 } else if (NumOps == 2) { 3947 N = NodeAllocator.Allocate<BinarySDNode>(); 3948 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 3949 } else if (NumOps == 3) { 3950 N = NodeAllocator.Allocate<TernarySDNode>(); 3951 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 3952 } else { 3953 N = NodeAllocator.Allocate<SDNode>(); 3954 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 3955 } 3956 } 3957 AllNodes.push_back(N); 3958#ifndef NDEBUG 3959 VerifyNode(N); 3960#endif 3961 return SDValue(N, 0); 3962} 3963 3964SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 3965 return getNode(Opcode, DL, VTList, 0, 0); 3966} 3967 3968SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3969 SDValue N1) { 3970 SDValue Ops[] = { N1 }; 3971 return getNode(Opcode, DL, VTList, Ops, 1); 3972} 3973 3974SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3975 SDValue N1, SDValue N2) { 3976 SDValue Ops[] = { N1, N2 }; 3977 return getNode(Opcode, DL, VTList, Ops, 2); 3978} 3979 3980SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3981 SDValue N1, SDValue N2, SDValue N3) { 3982 SDValue Ops[] = { N1, N2, N3 }; 3983 return getNode(Opcode, DL, VTList, Ops, 3); 3984} 3985 3986SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3987 SDValue N1, SDValue N2, SDValue N3, 3988 SDValue N4) { 3989 SDValue Ops[] = { N1, N2, N3, N4 }; 3990 return getNode(Opcode, DL, VTList, Ops, 4); 3991} 3992 3993SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3994 SDValue N1, SDValue N2, SDValue N3, 3995 SDValue N4, SDValue N5) { 3996 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3997 return getNode(Opcode, DL, VTList, Ops, 5); 3998} 3999 4000SDVTList SelectionDAG::getVTList(EVT VT) { 4001 return makeVTList(SDNode::getValueTypeList(VT), 1); 4002} 4003 4004SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4005 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4006 E = VTList.rend(); I != E; ++I) 4007 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4008 return *I; 4009 4010 EVT *Array = Allocator.Allocate<EVT>(2); 4011 Array[0] = VT1; 4012 Array[1] = VT2; 4013 SDVTList Result = makeVTList(Array, 2); 4014 VTList.push_back(Result); 4015 return Result; 4016} 4017 4018SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4019 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4020 E = VTList.rend(); I != E; ++I) 4021 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4022 I->VTs[2] == VT3) 4023 return *I; 4024 4025 EVT *Array = Allocator.Allocate<EVT>(3); 4026 Array[0] = VT1; 4027 Array[1] = VT2; 4028 Array[2] = VT3; 4029 SDVTList Result = makeVTList(Array, 3); 4030 VTList.push_back(Result); 4031 return Result; 4032} 4033 4034SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4035 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4036 E = VTList.rend(); I != E; ++I) 4037 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4038 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4039 return *I; 4040 4041 EVT *Array = Allocator.Allocate<EVT>(3); 4042 Array[0] = VT1; 4043 Array[1] = VT2; 4044 Array[2] = VT3; 4045 Array[3] = VT4; 4046 SDVTList Result = makeVTList(Array, 4); 4047 VTList.push_back(Result); 4048 return Result; 4049} 4050 4051SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4052 switch (NumVTs) { 4053 case 0: llvm_unreachable("Cannot have nodes without results!"); 4054 case 1: return getVTList(VTs[0]); 4055 case 2: return getVTList(VTs[0], VTs[1]); 4056 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4057 default: break; 4058 } 4059 4060 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4061 E = VTList.rend(); I != E; ++I) { 4062 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4063 continue; 4064 4065 bool NoMatch = false; 4066 for (unsigned i = 2; i != NumVTs; ++i) 4067 if (VTs[i] != I->VTs[i]) { 4068 NoMatch = true; 4069 break; 4070 } 4071 if (!NoMatch) 4072 return *I; 4073 } 4074 4075 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4076 std::copy(VTs, VTs+NumVTs, Array); 4077 SDVTList Result = makeVTList(Array, NumVTs); 4078 VTList.push_back(Result); 4079 return Result; 4080} 4081 4082 4083/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4084/// specified operands. If the resultant node already exists in the DAG, 4085/// this does not modify the specified node, instead it returns the node that 4086/// already exists. If the resultant node does not exist in the DAG, the 4087/// input node is returned. As a degenerate case, if you specify the same 4088/// input operands as the node already has, the input node is returned. 4089SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4090 SDNode *N = InN.getNode(); 4091 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4092 4093 // Check to see if there is no change. 4094 if (Op == N->getOperand(0)) return InN; 4095 4096 // See if the modified node already exists. 4097 void *InsertPos = 0; 4098 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4099 return SDValue(Existing, InN.getResNo()); 4100 4101 // Nope it doesn't. Remove the node from its current place in the maps. 4102 if (InsertPos) 4103 if (!RemoveNodeFromCSEMaps(N)) 4104 InsertPos = 0; 4105 4106 // Now we update the operands. 4107 N->OperandList[0].set(Op); 4108 4109 // If this gets put into a CSE map, add it. 4110 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4111 return InN; 4112} 4113 4114SDValue SelectionDAG:: 4115UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4116 SDNode *N = InN.getNode(); 4117 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4118 4119 // Check to see if there is no change. 4120 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4121 return InN; // No operands changed, just return the input node. 4122 4123 // See if the modified node already exists. 4124 void *InsertPos = 0; 4125 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4126 return SDValue(Existing, InN.getResNo()); 4127 4128 // Nope it doesn't. Remove the node from its current place in the maps. 4129 if (InsertPos) 4130 if (!RemoveNodeFromCSEMaps(N)) 4131 InsertPos = 0; 4132 4133 // Now we update the operands. 4134 if (N->OperandList[0] != Op1) 4135 N->OperandList[0].set(Op1); 4136 if (N->OperandList[1] != Op2) 4137 N->OperandList[1].set(Op2); 4138 4139 // If this gets put into a CSE map, add it. 4140 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4141 return InN; 4142} 4143 4144SDValue SelectionDAG:: 4145UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4146 SDValue Ops[] = { Op1, Op2, Op3 }; 4147 return UpdateNodeOperands(N, Ops, 3); 4148} 4149 4150SDValue SelectionDAG:: 4151UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4152 SDValue Op3, SDValue Op4) { 4153 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4154 return UpdateNodeOperands(N, Ops, 4); 4155} 4156 4157SDValue SelectionDAG:: 4158UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4159 SDValue Op3, SDValue Op4, SDValue Op5) { 4160 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4161 return UpdateNodeOperands(N, Ops, 5); 4162} 4163 4164SDValue SelectionDAG:: 4165UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4166 SDNode *N = InN.getNode(); 4167 assert(N->getNumOperands() == NumOps && 4168 "Update with wrong number of operands"); 4169 4170 // Check to see if there is no change. 4171 bool AnyChange = false; 4172 for (unsigned i = 0; i != NumOps; ++i) { 4173 if (Ops[i] != N->getOperand(i)) { 4174 AnyChange = true; 4175 break; 4176 } 4177 } 4178 4179 // No operands changed, just return the input node. 4180 if (!AnyChange) return InN; 4181 4182 // See if the modified node already exists. 4183 void *InsertPos = 0; 4184 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4185 return SDValue(Existing, InN.getResNo()); 4186 4187 // Nope it doesn't. Remove the node from its current place in the maps. 4188 if (InsertPos) 4189 if (!RemoveNodeFromCSEMaps(N)) 4190 InsertPos = 0; 4191 4192 // Now we update the operands. 4193 for (unsigned i = 0; i != NumOps; ++i) 4194 if (N->OperandList[i] != Ops[i]) 4195 N->OperandList[i].set(Ops[i]); 4196 4197 // If this gets put into a CSE map, add it. 4198 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4199 return InN; 4200} 4201 4202/// DropOperands - Release the operands and set this node to have 4203/// zero operands. 4204void SDNode::DropOperands() { 4205 // Unlike the code in MorphNodeTo that does this, we don't need to 4206 // watch for dead nodes here. 4207 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4208 SDUse &Use = *I++; 4209 Use.set(SDValue()); 4210 } 4211} 4212 4213/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4214/// machine opcode. 4215/// 4216SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4217 EVT VT) { 4218 SDVTList VTs = getVTList(VT); 4219 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4220} 4221 4222SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4223 EVT VT, SDValue Op1) { 4224 SDVTList VTs = getVTList(VT); 4225 SDValue Ops[] = { Op1 }; 4226 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4227} 4228 4229SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4230 EVT VT, SDValue Op1, 4231 SDValue Op2) { 4232 SDVTList VTs = getVTList(VT); 4233 SDValue Ops[] = { Op1, Op2 }; 4234 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4235} 4236 4237SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4238 EVT VT, SDValue Op1, 4239 SDValue Op2, SDValue Op3) { 4240 SDVTList VTs = getVTList(VT); 4241 SDValue Ops[] = { Op1, Op2, Op3 }; 4242 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4243} 4244 4245SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4246 EVT VT, const SDValue *Ops, 4247 unsigned NumOps) { 4248 SDVTList VTs = getVTList(VT); 4249 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4250} 4251 4252SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4253 EVT VT1, EVT VT2, const SDValue *Ops, 4254 unsigned NumOps) { 4255 SDVTList VTs = getVTList(VT1, VT2); 4256 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4257} 4258 4259SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4260 EVT VT1, EVT VT2) { 4261 SDVTList VTs = getVTList(VT1, VT2); 4262 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4263} 4264 4265SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4266 EVT VT1, EVT VT2, EVT VT3, 4267 const SDValue *Ops, unsigned NumOps) { 4268 SDVTList VTs = getVTList(VT1, VT2, VT3); 4269 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4270} 4271 4272SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4273 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4274 const SDValue *Ops, unsigned NumOps) { 4275 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4276 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4277} 4278 4279SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4280 EVT VT1, EVT VT2, 4281 SDValue Op1) { 4282 SDVTList VTs = getVTList(VT1, VT2); 4283 SDValue Ops[] = { Op1 }; 4284 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4285} 4286 4287SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4288 EVT VT1, EVT VT2, 4289 SDValue Op1, SDValue Op2) { 4290 SDVTList VTs = getVTList(VT1, VT2); 4291 SDValue Ops[] = { Op1, Op2 }; 4292 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4293} 4294 4295SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4296 EVT VT1, EVT VT2, 4297 SDValue Op1, SDValue Op2, 4298 SDValue Op3) { 4299 SDVTList VTs = getVTList(VT1, VT2); 4300 SDValue Ops[] = { Op1, Op2, Op3 }; 4301 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4302} 4303 4304SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4305 EVT VT1, EVT VT2, EVT VT3, 4306 SDValue Op1, SDValue Op2, 4307 SDValue Op3) { 4308 SDVTList VTs = getVTList(VT1, VT2, VT3); 4309 SDValue Ops[] = { Op1, Op2, Op3 }; 4310 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4311} 4312 4313SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4314 SDVTList VTs, const SDValue *Ops, 4315 unsigned NumOps) { 4316 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4317} 4318 4319SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4320 EVT VT) { 4321 SDVTList VTs = getVTList(VT); 4322 return MorphNodeTo(N, Opc, VTs, 0, 0); 4323} 4324 4325SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4326 EVT VT, SDValue Op1) { 4327 SDVTList VTs = getVTList(VT); 4328 SDValue Ops[] = { Op1 }; 4329 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4330} 4331 4332SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4333 EVT VT, SDValue Op1, 4334 SDValue Op2) { 4335 SDVTList VTs = getVTList(VT); 4336 SDValue Ops[] = { Op1, Op2 }; 4337 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4338} 4339 4340SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4341 EVT VT, SDValue Op1, 4342 SDValue Op2, SDValue Op3) { 4343 SDVTList VTs = getVTList(VT); 4344 SDValue Ops[] = { Op1, Op2, Op3 }; 4345 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4346} 4347 4348SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4349 EVT VT, const SDValue *Ops, 4350 unsigned NumOps) { 4351 SDVTList VTs = getVTList(VT); 4352 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4353} 4354 4355SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4356 EVT VT1, EVT VT2, const SDValue *Ops, 4357 unsigned NumOps) { 4358 SDVTList VTs = getVTList(VT1, VT2); 4359 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4360} 4361 4362SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4363 EVT VT1, EVT VT2) { 4364 SDVTList VTs = getVTList(VT1, VT2); 4365 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4366} 4367 4368SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4369 EVT VT1, EVT VT2, EVT VT3, 4370 const SDValue *Ops, unsigned NumOps) { 4371 SDVTList VTs = getVTList(VT1, VT2, VT3); 4372 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4373} 4374 4375SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4376 EVT VT1, EVT VT2, 4377 SDValue Op1) { 4378 SDVTList VTs = getVTList(VT1, VT2); 4379 SDValue Ops[] = { Op1 }; 4380 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4381} 4382 4383SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4384 EVT VT1, EVT VT2, 4385 SDValue Op1, SDValue Op2) { 4386 SDVTList VTs = getVTList(VT1, VT2); 4387 SDValue Ops[] = { Op1, Op2 }; 4388 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4389} 4390 4391SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4392 EVT VT1, EVT VT2, 4393 SDValue Op1, SDValue Op2, 4394 SDValue Op3) { 4395 SDVTList VTs = getVTList(VT1, VT2); 4396 SDValue Ops[] = { Op1, Op2, Op3 }; 4397 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4398} 4399 4400/// MorphNodeTo - These *mutate* the specified node to have the specified 4401/// return type, opcode, and operands. 4402/// 4403/// Note that MorphNodeTo returns the resultant node. If there is already a 4404/// node of the specified opcode and operands, it returns that node instead of 4405/// the current one. Note that the DebugLoc need not be the same. 4406/// 4407/// Using MorphNodeTo is faster than creating a new node and swapping it in 4408/// with ReplaceAllUsesWith both because it often avoids allocating a new 4409/// node, and because it doesn't require CSE recalculation for any of 4410/// the node's users. 4411/// 4412SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4413 SDVTList VTs, const SDValue *Ops, 4414 unsigned NumOps) { 4415 // If an identical node already exists, use it. 4416 void *IP = 0; 4417 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4418 FoldingSetNodeID ID; 4419 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4420 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4421 return ON; 4422 } 4423 4424 if (!RemoveNodeFromCSEMaps(N)) 4425 IP = 0; 4426 4427 // Start the morphing. 4428 N->NodeType = Opc; 4429 N->ValueList = VTs.VTs; 4430 N->NumValues = VTs.NumVTs; 4431 4432 // Clear the operands list, updating used nodes to remove this from their 4433 // use list. Keep track of any operands that become dead as a result. 4434 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4435 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4436 SDUse &Use = *I++; 4437 SDNode *Used = Use.getNode(); 4438 Use.set(SDValue()); 4439 if (Used->use_empty()) 4440 DeadNodeSet.insert(Used); 4441 } 4442 4443 // If NumOps is larger than the # of operands we currently have, reallocate 4444 // the operand list. 4445 if (NumOps > N->NumOperands) { 4446 if (N->OperandsNeedDelete) 4447 delete[] N->OperandList; 4448 4449 if (N->isMachineOpcode()) { 4450 // We're creating a final node that will live unmorphed for the 4451 // remainder of the current SelectionDAG iteration, so we can allocate 4452 // the operands directly out of a pool with no recycling metadata. 4453 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4454 N->OperandsNeedDelete = false; 4455 } else { 4456 N->OperandList = new SDUse[NumOps]; 4457 N->OperandsNeedDelete = true; 4458 } 4459 } 4460 4461 // Assign the new operands. 4462 N->NumOperands = NumOps; 4463 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4464 N->OperandList[i].setUser(N); 4465 N->OperandList[i].setInitial(Ops[i]); 4466 } 4467 4468 // Delete any nodes that are still dead after adding the uses for the 4469 // new operands. 4470 SmallVector<SDNode *, 16> DeadNodes; 4471 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4472 E = DeadNodeSet.end(); I != E; ++I) 4473 if ((*I)->use_empty()) 4474 DeadNodes.push_back(*I); 4475 RemoveDeadNodes(DeadNodes); 4476 4477 if (IP) 4478 CSEMap.InsertNode(N, IP); // Memoize the new node. 4479 return N; 4480} 4481 4482 4483/// getTargetNode - These are used for target selectors to create a new node 4484/// with specified return type(s), target opcode, and operands. 4485/// 4486/// Note that getTargetNode returns the resultant node. If there is already a 4487/// node of the specified opcode and operands, it returns that node instead of 4488/// the current one. 4489SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4490 return getNode(~Opcode, dl, VT).getNode(); 4491} 4492 4493SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4494 SDValue Op1) { 4495 return getNode(~Opcode, dl, VT, Op1).getNode(); 4496} 4497 4498SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4499 SDValue Op1, SDValue Op2) { 4500 return getNode(~Opcode, dl, VT, Op1, Op2).getNode(); 4501} 4502 4503SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4504 SDValue Op1, SDValue Op2, 4505 SDValue Op3) { 4506 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode(); 4507} 4508 4509SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4510 const SDValue *Ops, unsigned NumOps) { 4511 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode(); 4512} 4513 4514SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4515 EVT VT1, EVT VT2) { 4516 SDVTList VTs = getVTList(VT1, VT2); 4517 SDValue Op; 4518 return getNode(~Opcode, dl, VTs, &Op, 0).getNode(); 4519} 4520 4521SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4522 EVT VT2, SDValue Op1) { 4523 SDVTList VTs = getVTList(VT1, VT2); 4524 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode(); 4525} 4526 4527SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4528 EVT VT2, SDValue Op1, 4529 SDValue Op2) { 4530 SDVTList VTs = getVTList(VT1, VT2); 4531 SDValue Ops[] = { Op1, Op2 }; 4532 return getNode(~Opcode, dl, VTs, Ops, 2).getNode(); 4533} 4534 4535SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4536 EVT VT2, SDValue Op1, 4537 SDValue Op2, SDValue Op3) { 4538 SDVTList VTs = getVTList(VT1, VT2); 4539 SDValue Ops[] = { Op1, Op2, Op3 }; 4540 return getNode(~Opcode, dl, VTs, Ops, 3).getNode(); 4541} 4542 4543SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4544 EVT VT1, EVT VT2, 4545 const SDValue *Ops, unsigned NumOps) { 4546 SDVTList VTs = getVTList(VT1, VT2); 4547 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode(); 4548} 4549 4550SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4551 EVT VT1, EVT VT2, EVT VT3, 4552 SDValue Op1, SDValue Op2) { 4553 SDVTList VTs = getVTList(VT1, VT2, VT3); 4554 SDValue Ops[] = { Op1, Op2 }; 4555 return getNode(~Opcode, dl, VTs, Ops, 2).getNode(); 4556} 4557 4558SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4559 EVT VT1, EVT VT2, EVT VT3, 4560 SDValue Op1, SDValue Op2, 4561 SDValue Op3) { 4562 SDVTList VTs = getVTList(VT1, VT2, VT3); 4563 SDValue Ops[] = { Op1, Op2, Op3 }; 4564 return getNode(~Opcode, dl, VTs, Ops, 3).getNode(); 4565} 4566 4567SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4568 EVT VT1, EVT VT2, EVT VT3, 4569 const SDValue *Ops, unsigned NumOps) { 4570 SDVTList VTs = getVTList(VT1, VT2, VT3); 4571 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode(); 4572} 4573 4574SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4575 EVT VT2, EVT VT3, EVT VT4, 4576 const SDValue *Ops, unsigned NumOps) { 4577 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4578 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode(); 4579} 4580 4581SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4582 const std::vector<EVT> &ResultTys, 4583 const SDValue *Ops, unsigned NumOps) { 4584 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode(); 4585} 4586 4587/// getNodeIfExists - Get the specified node if it's already available, or 4588/// else return NULL. 4589SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4590 const SDValue *Ops, unsigned NumOps) { 4591 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4592 FoldingSetNodeID ID; 4593 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4594 void *IP = 0; 4595 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4596 return E; 4597 } 4598 return NULL; 4599} 4600 4601/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4602/// This can cause recursive merging of nodes in the DAG. 4603/// 4604/// This version assumes From has a single result value. 4605/// 4606void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4607 DAGUpdateListener *UpdateListener) { 4608 SDNode *From = FromN.getNode(); 4609 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4610 "Cannot replace with this method!"); 4611 assert(From != To.getNode() && "Cannot replace uses of with self"); 4612 4613 // Iterate over all the existing uses of From. New uses will be added 4614 // to the beginning of the use list, which we avoid visiting. 4615 // This specifically avoids visiting uses of From that arise while the 4616 // replacement is happening, because any such uses would be the result 4617 // of CSE: If an existing node looks like From after one of its operands 4618 // is replaced by To, we don't want to replace of all its users with To 4619 // too. See PR3018 for more info. 4620 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4621 while (UI != UE) { 4622 SDNode *User = *UI; 4623 4624 // This node is about to morph, remove its old self from the CSE maps. 4625 RemoveNodeFromCSEMaps(User); 4626 4627 // A user can appear in a use list multiple times, and when this 4628 // happens the uses are usually next to each other in the list. 4629 // To help reduce the number of CSE recomputations, process all 4630 // the uses of this user that we can find this way. 4631 do { 4632 SDUse &Use = UI.getUse(); 4633 ++UI; 4634 Use.set(To); 4635 } while (UI != UE && *UI == User); 4636 4637 // Now that we have modified User, add it back to the CSE maps. If it 4638 // already exists there, recursively merge the results together. 4639 AddModifiedNodeToCSEMaps(User, UpdateListener); 4640 } 4641} 4642 4643/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4644/// This can cause recursive merging of nodes in the DAG. 4645/// 4646/// This version assumes that for each value of From, there is a 4647/// corresponding value in To in the same position with the same type. 4648/// 4649void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4650 DAGUpdateListener *UpdateListener) { 4651#ifndef NDEBUG 4652 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 4653 assert((!From->hasAnyUseOfValue(i) || 4654 From->getValueType(i) == To->getValueType(i)) && 4655 "Cannot use this version of ReplaceAllUsesWith!"); 4656#endif 4657 4658 // Handle the trivial case. 4659 if (From == To) 4660 return; 4661 4662 // Iterate over just the existing users of From. See the comments in 4663 // the ReplaceAllUsesWith above. 4664 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4665 while (UI != UE) { 4666 SDNode *User = *UI; 4667 4668 // This node is about to morph, remove its old self from the CSE maps. 4669 RemoveNodeFromCSEMaps(User); 4670 4671 // A user can appear in a use list multiple times, and when this 4672 // happens the uses are usually next to each other in the list. 4673 // To help reduce the number of CSE recomputations, process all 4674 // the uses of this user that we can find this way. 4675 do { 4676 SDUse &Use = UI.getUse(); 4677 ++UI; 4678 Use.setNode(To); 4679 } while (UI != UE && *UI == User); 4680 4681 // Now that we have modified User, add it back to the CSE maps. If it 4682 // already exists there, recursively merge the results together. 4683 AddModifiedNodeToCSEMaps(User, UpdateListener); 4684 } 4685} 4686 4687/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4688/// This can cause recursive merging of nodes in the DAG. 4689/// 4690/// This version can replace From with any result values. To must match the 4691/// number and types of values returned by From. 4692void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4693 const SDValue *To, 4694 DAGUpdateListener *UpdateListener) { 4695 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4696 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4697 4698 // Iterate over just the existing users of From. See the comments in 4699 // the ReplaceAllUsesWith above. 4700 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4701 while (UI != UE) { 4702 SDNode *User = *UI; 4703 4704 // This node is about to morph, remove its old self from the CSE maps. 4705 RemoveNodeFromCSEMaps(User); 4706 4707 // A user can appear in a use list multiple times, and when this 4708 // happens the uses are usually next to each other in the list. 4709 // To help reduce the number of CSE recomputations, process all 4710 // the uses of this user that we can find this way. 4711 do { 4712 SDUse &Use = UI.getUse(); 4713 const SDValue &ToOp = To[Use.getResNo()]; 4714 ++UI; 4715 Use.set(ToOp); 4716 } while (UI != UE && *UI == User); 4717 4718 // Now that we have modified User, add it back to the CSE maps. If it 4719 // already exists there, recursively merge the results together. 4720 AddModifiedNodeToCSEMaps(User, UpdateListener); 4721 } 4722} 4723 4724/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4725/// uses of other values produced by From.getNode() alone. The Deleted 4726/// vector is handled the same way as for ReplaceAllUsesWith. 4727void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4728 DAGUpdateListener *UpdateListener){ 4729 // Handle the really simple, really trivial case efficiently. 4730 if (From == To) return; 4731 4732 // Handle the simple, trivial, case efficiently. 4733 if (From.getNode()->getNumValues() == 1) { 4734 ReplaceAllUsesWith(From, To, UpdateListener); 4735 return; 4736 } 4737 4738 // Iterate over just the existing users of From. See the comments in 4739 // the ReplaceAllUsesWith above. 4740 SDNode::use_iterator UI = From.getNode()->use_begin(), 4741 UE = From.getNode()->use_end(); 4742 while (UI != UE) { 4743 SDNode *User = *UI; 4744 bool UserRemovedFromCSEMaps = false; 4745 4746 // A user can appear in a use list multiple times, and when this 4747 // happens the uses are usually next to each other in the list. 4748 // To help reduce the number of CSE recomputations, process all 4749 // the uses of this user that we can find this way. 4750 do { 4751 SDUse &Use = UI.getUse(); 4752 4753 // Skip uses of different values from the same node. 4754 if (Use.getResNo() != From.getResNo()) { 4755 ++UI; 4756 continue; 4757 } 4758 4759 // If this node hasn't been modified yet, it's still in the CSE maps, 4760 // so remove its old self from the CSE maps. 4761 if (!UserRemovedFromCSEMaps) { 4762 RemoveNodeFromCSEMaps(User); 4763 UserRemovedFromCSEMaps = true; 4764 } 4765 4766 ++UI; 4767 Use.set(To); 4768 } while (UI != UE && *UI == User); 4769 4770 // We are iterating over all uses of the From node, so if a use 4771 // doesn't use the specific value, no changes are made. 4772 if (!UserRemovedFromCSEMaps) 4773 continue; 4774 4775 // Now that we have modified User, add it back to the CSE maps. If it 4776 // already exists there, recursively merge the results together. 4777 AddModifiedNodeToCSEMaps(User, UpdateListener); 4778 } 4779} 4780 4781namespace { 4782 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 4783 /// to record information about a use. 4784 struct UseMemo { 4785 SDNode *User; 4786 unsigned Index; 4787 SDUse *Use; 4788 }; 4789 4790 /// operator< - Sort Memos by User. 4791 bool operator<(const UseMemo &L, const UseMemo &R) { 4792 return (intptr_t)L.User < (intptr_t)R.User; 4793 } 4794} 4795 4796/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 4797/// uses of other values produced by From.getNode() alone. The same value 4798/// may appear in both the From and To list. The Deleted vector is 4799/// handled the same way as for ReplaceAllUsesWith. 4800void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 4801 const SDValue *To, 4802 unsigned Num, 4803 DAGUpdateListener *UpdateListener){ 4804 // Handle the simple, trivial case efficiently. 4805 if (Num == 1) 4806 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 4807 4808 // Read up all the uses and make records of them. This helps 4809 // processing new uses that are introduced during the 4810 // replacement process. 4811 SmallVector<UseMemo, 4> Uses; 4812 for (unsigned i = 0; i != Num; ++i) { 4813 unsigned FromResNo = From[i].getResNo(); 4814 SDNode *FromNode = From[i].getNode(); 4815 for (SDNode::use_iterator UI = FromNode->use_begin(), 4816 E = FromNode->use_end(); UI != E; ++UI) { 4817 SDUse &Use = UI.getUse(); 4818 if (Use.getResNo() == FromResNo) { 4819 UseMemo Memo = { *UI, i, &Use }; 4820 Uses.push_back(Memo); 4821 } 4822 } 4823 } 4824 4825 // Sort the uses, so that all the uses from a given User are together. 4826 std::sort(Uses.begin(), Uses.end()); 4827 4828 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 4829 UseIndex != UseIndexEnd; ) { 4830 // We know that this user uses some value of From. If it is the right 4831 // value, update it. 4832 SDNode *User = Uses[UseIndex].User; 4833 4834 // This node is about to morph, remove its old self from the CSE maps. 4835 RemoveNodeFromCSEMaps(User); 4836 4837 // The Uses array is sorted, so all the uses for a given User 4838 // are next to each other in the list. 4839 // To help reduce the number of CSE recomputations, process all 4840 // the uses of this user that we can find this way. 4841 do { 4842 unsigned i = Uses[UseIndex].Index; 4843 SDUse &Use = *Uses[UseIndex].Use; 4844 ++UseIndex; 4845 4846 Use.set(To[i]); 4847 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 4848 4849 // Now that we have modified User, add it back to the CSE maps. If it 4850 // already exists there, recursively merge the results together. 4851 AddModifiedNodeToCSEMaps(User, UpdateListener); 4852 } 4853} 4854 4855/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4856/// based on their topological order. It returns the maximum id and a vector 4857/// of the SDNodes* in assigned order by reference. 4858unsigned SelectionDAG::AssignTopologicalOrder() { 4859 4860 unsigned DAGSize = 0; 4861 4862 // SortedPos tracks the progress of the algorithm. Nodes before it are 4863 // sorted, nodes after it are unsorted. When the algorithm completes 4864 // it is at the end of the list. 4865 allnodes_iterator SortedPos = allnodes_begin(); 4866 4867 // Visit all the nodes. Move nodes with no operands to the front of 4868 // the list immediately. Annotate nodes that do have operands with their 4869 // operand count. Before we do this, the Node Id fields of the nodes 4870 // may contain arbitrary values. After, the Node Id fields for nodes 4871 // before SortedPos will contain the topological sort index, and the 4872 // Node Id fields for nodes At SortedPos and after will contain the 4873 // count of outstanding operands. 4874 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 4875 SDNode *N = I++; 4876 unsigned Degree = N->getNumOperands(); 4877 if (Degree == 0) { 4878 // A node with no uses, add it to the result array immediately. 4879 N->setNodeId(DAGSize++); 4880 allnodes_iterator Q = N; 4881 if (Q != SortedPos) 4882 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 4883 ++SortedPos; 4884 } else { 4885 // Temporarily use the Node Id as scratch space for the degree count. 4886 N->setNodeId(Degree); 4887 } 4888 } 4889 4890 // Visit all the nodes. As we iterate, moves nodes into sorted order, 4891 // such that by the time the end is reached all nodes will be sorted. 4892 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 4893 SDNode *N = I; 4894 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 4895 UI != UE; ++UI) { 4896 SDNode *P = *UI; 4897 unsigned Degree = P->getNodeId(); 4898 --Degree; 4899 if (Degree == 0) { 4900 // All of P's operands are sorted, so P may sorted now. 4901 P->setNodeId(DAGSize++); 4902 if (P != SortedPos) 4903 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 4904 ++SortedPos; 4905 } else { 4906 // Update P's outstanding operand count. 4907 P->setNodeId(Degree); 4908 } 4909 } 4910 } 4911 4912 assert(SortedPos == AllNodes.end() && 4913 "Topological sort incomplete!"); 4914 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 4915 "First node in topological sort is not the entry token!"); 4916 assert(AllNodes.front().getNodeId() == 0 && 4917 "First node in topological sort has non-zero id!"); 4918 assert(AllNodes.front().getNumOperands() == 0 && 4919 "First node in topological sort has operands!"); 4920 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 4921 "Last node in topologic sort has unexpected id!"); 4922 assert(AllNodes.back().use_empty() && 4923 "Last node in topologic sort has users!"); 4924 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 4925 return DAGSize; 4926} 4927 4928 4929 4930//===----------------------------------------------------------------------===// 4931// SDNode Class 4932//===----------------------------------------------------------------------===// 4933 4934HandleSDNode::~HandleSDNode() { 4935 DropOperands(); 4936} 4937 4938GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 4939 EVT VT, int64_t o, unsigned char TF) 4940 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)), 4941 Offset(o), TargetFlags(TF) { 4942 TheGlobal = const_cast<GlobalValue*>(GA); 4943} 4944 4945MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 4946 const Value *srcValue, int SVO, 4947 unsigned alignment, bool vol) 4948 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) { 4949 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment); 4950 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4951 assert(getAlignment() == alignment && "Alignment representation error!"); 4952 assert(isVolatile() == vol && "Volatile representation error!"); 4953} 4954 4955MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 4956 const SDValue *Ops, 4957 unsigned NumOps, EVT memvt, const Value *srcValue, 4958 int SVO, unsigned alignment, bool vol) 4959 : SDNode(Opc, dl, VTs, Ops, NumOps), 4960 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) { 4961 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment); 4962 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4963 assert(getAlignment() == alignment && "Alignment representation error!"); 4964 assert(isVolatile() == vol && "Volatile representation error!"); 4965} 4966 4967/// getMemOperand - Return a MachineMemOperand object describing the memory 4968/// reference performed by this memory reference. 4969MachineMemOperand MemSDNode::getMemOperand() const { 4970 int Flags = 0; 4971 if (isa<LoadSDNode>(this)) 4972 Flags = MachineMemOperand::MOLoad; 4973 else if (isa<StoreSDNode>(this)) 4974 Flags = MachineMemOperand::MOStore; 4975 else if (isa<AtomicSDNode>(this)) { 4976 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4977 } 4978 else { 4979 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 4980 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 4981 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 4982 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 4983 } 4984 4985 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4986 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4987 4988 // Check if the memory reference references a frame index 4989 const FrameIndexSDNode *FI = 4990 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 4991 if (!getSrcValue() && FI) 4992 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 4993 Flags, 0, Size, getAlignment()); 4994 else 4995 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4996 Size, getAlignment()); 4997} 4998 4999/// Profile - Gather unique data for the node. 5000/// 5001void SDNode::Profile(FoldingSetNodeID &ID) const { 5002 AddNodeIDNode(ID, this); 5003} 5004 5005static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5006static EVT VTs[MVT::LAST_VALUETYPE]; 5007static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5008 5009/// getValueTypeList - Return a pointer to the specified value type. 5010/// 5011const EVT *SDNode::getValueTypeList(EVT VT) { 5012 sys::SmartScopedLock<true> Lock(*VTMutex); 5013 if (VT.isExtended()) { 5014 return &(*EVTs->insert(VT).first); 5015 } else { 5016 VTs[VT.getSimpleVT().SimpleTy] = VT; 5017 return &VTs[VT.getSimpleVT().SimpleTy]; 5018 } 5019} 5020 5021/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5022/// indicated value. This method ignores uses of other values defined by this 5023/// operation. 5024bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5025 assert(Value < getNumValues() && "Bad value!"); 5026 5027 // TODO: Only iterate over uses of a given value of the node 5028 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5029 if (UI.getUse().getResNo() == Value) { 5030 if (NUses == 0) 5031 return false; 5032 --NUses; 5033 } 5034 } 5035 5036 // Found exactly the right number of uses? 5037 return NUses == 0; 5038} 5039 5040 5041/// hasAnyUseOfValue - Return true if there are any use of the indicated 5042/// value. This method ignores uses of other values defined by this operation. 5043bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5044 assert(Value < getNumValues() && "Bad value!"); 5045 5046 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5047 if (UI.getUse().getResNo() == Value) 5048 return true; 5049 5050 return false; 5051} 5052 5053 5054/// isOnlyUserOf - Return true if this node is the only use of N. 5055/// 5056bool SDNode::isOnlyUserOf(SDNode *N) const { 5057 bool Seen = false; 5058 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5059 SDNode *User = *I; 5060 if (User == this) 5061 Seen = true; 5062 else 5063 return false; 5064 } 5065 5066 return Seen; 5067} 5068 5069/// isOperand - Return true if this node is an operand of N. 5070/// 5071bool SDValue::isOperandOf(SDNode *N) const { 5072 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5073 if (*this == N->getOperand(i)) 5074 return true; 5075 return false; 5076} 5077 5078bool SDNode::isOperandOf(SDNode *N) const { 5079 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5080 if (this == N->OperandList[i].getNode()) 5081 return true; 5082 return false; 5083} 5084 5085/// reachesChainWithoutSideEffects - Return true if this operand (which must 5086/// be a chain) reaches the specified operand without crossing any 5087/// side-effecting instructions. In practice, this looks through token 5088/// factors and non-volatile loads. In order to remain efficient, this only 5089/// looks a couple of nodes in, it does not do an exhaustive search. 5090bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5091 unsigned Depth) const { 5092 if (*this == Dest) return true; 5093 5094 // Don't search too deeply, we just want to be able to see through 5095 // TokenFactor's etc. 5096 if (Depth == 0) return false; 5097 5098 // If this is a token factor, all inputs to the TF happen in parallel. If any 5099 // of the operands of the TF reach dest, then we can do the xform. 5100 if (getOpcode() == ISD::TokenFactor) { 5101 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5102 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5103 return true; 5104 return false; 5105 } 5106 5107 // Loads don't have side effects, look through them. 5108 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5109 if (!Ld->isVolatile()) 5110 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5111 } 5112 return false; 5113} 5114 5115 5116static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 5117 SmallPtrSet<SDNode *, 32> &Visited) { 5118 if (found || !Visited.insert(N)) 5119 return; 5120 5121 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 5122 SDNode *Op = N->getOperand(i).getNode(); 5123 if (Op == P) { 5124 found = true; 5125 return; 5126 } 5127 findPredecessor(Op, P, found, Visited); 5128 } 5129} 5130 5131/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5132/// is either an operand of N or it can be reached by recursively traversing 5133/// up the operands. 5134/// NOTE: this is an expensive method. Use it carefully. 5135bool SDNode::isPredecessorOf(SDNode *N) const { 5136 SmallPtrSet<SDNode *, 32> Visited; 5137 bool found = false; 5138 findPredecessor(N, this, found, Visited); 5139 return found; 5140} 5141 5142uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5143 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5144 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5145} 5146 5147std::string SDNode::getOperationName(const SelectionDAG *G) const { 5148 switch (getOpcode()) { 5149 default: 5150 if (getOpcode() < ISD::BUILTIN_OP_END) 5151 return "<<Unknown DAG Node>>"; 5152 if (isMachineOpcode()) { 5153 if (G) 5154 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5155 if (getMachineOpcode() < TII->getNumOpcodes()) 5156 return TII->get(getMachineOpcode()).getName(); 5157 return "<<Unknown Machine Node>>"; 5158 } 5159 if (G) { 5160 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5161 const char *Name = TLI.getTargetNodeName(getOpcode()); 5162 if (Name) return Name; 5163 return "<<Unknown Target Node>>"; 5164 } 5165 return "<<Unknown Node>>"; 5166 5167#ifndef NDEBUG 5168 case ISD::DELETED_NODE: 5169 return "<<Deleted Node!>>"; 5170#endif 5171 case ISD::PREFETCH: return "Prefetch"; 5172 case ISD::MEMBARRIER: return "MemBarrier"; 5173 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5174 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5175 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5176 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5177 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5178 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5179 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5180 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5181 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5182 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5183 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5184 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5185 case ISD::PCMARKER: return "PCMarker"; 5186 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5187 case ISD::SRCVALUE: return "SrcValue"; 5188 case ISD::MEMOPERAND: return "MemOperand"; 5189 case ISD::EntryToken: return "EntryToken"; 5190 case ISD::TokenFactor: return "TokenFactor"; 5191 case ISD::AssertSext: return "AssertSext"; 5192 case ISD::AssertZext: return "AssertZext"; 5193 5194 case ISD::BasicBlock: return "BasicBlock"; 5195 case ISD::VALUETYPE: return "ValueType"; 5196 case ISD::Register: return "Register"; 5197 5198 case ISD::Constant: return "Constant"; 5199 case ISD::ConstantFP: return "ConstantFP"; 5200 case ISD::GlobalAddress: return "GlobalAddress"; 5201 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5202 case ISD::FrameIndex: return "FrameIndex"; 5203 case ISD::JumpTable: return "JumpTable"; 5204 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5205 case ISD::RETURNADDR: return "RETURNADDR"; 5206 case ISD::FRAMEADDR: return "FRAMEADDR"; 5207 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5208 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5209 case ISD::LSDAADDR: return "LSDAADDR"; 5210 case ISD::EHSELECTION: return "EHSELECTION"; 5211 case ISD::EH_RETURN: return "EH_RETURN"; 5212 case ISD::ConstantPool: return "ConstantPool"; 5213 case ISD::ExternalSymbol: return "ExternalSymbol"; 5214 case ISD::INTRINSIC_WO_CHAIN: { 5215 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5216 return Intrinsic::getName((Intrinsic::ID)IID); 5217 } 5218 case ISD::INTRINSIC_VOID: 5219 case ISD::INTRINSIC_W_CHAIN: { 5220 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5221 return Intrinsic::getName((Intrinsic::ID)IID); 5222 } 5223 5224 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5225 case ISD::TargetConstant: return "TargetConstant"; 5226 case ISD::TargetConstantFP:return "TargetConstantFP"; 5227 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5228 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5229 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5230 case ISD::TargetJumpTable: return "TargetJumpTable"; 5231 case ISD::TargetConstantPool: return "TargetConstantPool"; 5232 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5233 5234 case ISD::CopyToReg: return "CopyToReg"; 5235 case ISD::CopyFromReg: return "CopyFromReg"; 5236 case ISD::UNDEF: return "undef"; 5237 case ISD::MERGE_VALUES: return "merge_values"; 5238 case ISD::INLINEASM: return "inlineasm"; 5239 case ISD::DBG_LABEL: return "dbg_label"; 5240 case ISD::EH_LABEL: return "eh_label"; 5241 case ISD::DECLARE: return "declare"; 5242 case ISD::HANDLENODE: return "handlenode"; 5243 5244 // Unary operators 5245 case ISD::FABS: return "fabs"; 5246 case ISD::FNEG: return "fneg"; 5247 case ISD::FSQRT: return "fsqrt"; 5248 case ISD::FSIN: return "fsin"; 5249 case ISD::FCOS: return "fcos"; 5250 case ISD::FPOWI: return "fpowi"; 5251 case ISD::FPOW: return "fpow"; 5252 case ISD::FTRUNC: return "ftrunc"; 5253 case ISD::FFLOOR: return "ffloor"; 5254 case ISD::FCEIL: return "fceil"; 5255 case ISD::FRINT: return "frint"; 5256 case ISD::FNEARBYINT: return "fnearbyint"; 5257 5258 // Binary operators 5259 case ISD::ADD: return "add"; 5260 case ISD::SUB: return "sub"; 5261 case ISD::MUL: return "mul"; 5262 case ISD::MULHU: return "mulhu"; 5263 case ISD::MULHS: return "mulhs"; 5264 case ISD::SDIV: return "sdiv"; 5265 case ISD::UDIV: return "udiv"; 5266 case ISD::SREM: return "srem"; 5267 case ISD::UREM: return "urem"; 5268 case ISD::SMUL_LOHI: return "smul_lohi"; 5269 case ISD::UMUL_LOHI: return "umul_lohi"; 5270 case ISD::SDIVREM: return "sdivrem"; 5271 case ISD::UDIVREM: return "udivrem"; 5272 case ISD::AND: return "and"; 5273 case ISD::OR: return "or"; 5274 case ISD::XOR: return "xor"; 5275 case ISD::SHL: return "shl"; 5276 case ISD::SRA: return "sra"; 5277 case ISD::SRL: return "srl"; 5278 case ISD::ROTL: return "rotl"; 5279 case ISD::ROTR: return "rotr"; 5280 case ISD::FADD: return "fadd"; 5281 case ISD::FSUB: return "fsub"; 5282 case ISD::FMUL: return "fmul"; 5283 case ISD::FDIV: return "fdiv"; 5284 case ISD::FREM: return "frem"; 5285 case ISD::FCOPYSIGN: return "fcopysign"; 5286 case ISD::FGETSIGN: return "fgetsign"; 5287 5288 case ISD::SETCC: return "setcc"; 5289 case ISD::VSETCC: return "vsetcc"; 5290 case ISD::SELECT: return "select"; 5291 case ISD::SELECT_CC: return "select_cc"; 5292 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5293 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5294 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5295 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5296 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5297 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5298 case ISD::CARRY_FALSE: return "carry_false"; 5299 case ISD::ADDC: return "addc"; 5300 case ISD::ADDE: return "adde"; 5301 case ISD::SADDO: return "saddo"; 5302 case ISD::UADDO: return "uaddo"; 5303 case ISD::SSUBO: return "ssubo"; 5304 case ISD::USUBO: return "usubo"; 5305 case ISD::SMULO: return "smulo"; 5306 case ISD::UMULO: return "umulo"; 5307 case ISD::SUBC: return "subc"; 5308 case ISD::SUBE: return "sube"; 5309 case ISD::SHL_PARTS: return "shl_parts"; 5310 case ISD::SRA_PARTS: return "sra_parts"; 5311 case ISD::SRL_PARTS: return "srl_parts"; 5312 5313 // Conversion operators. 5314 case ISD::SIGN_EXTEND: return "sign_extend"; 5315 case ISD::ZERO_EXTEND: return "zero_extend"; 5316 case ISD::ANY_EXTEND: return "any_extend"; 5317 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5318 case ISD::TRUNCATE: return "truncate"; 5319 case ISD::FP_ROUND: return "fp_round"; 5320 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5321 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5322 case ISD::FP_EXTEND: return "fp_extend"; 5323 5324 case ISD::SINT_TO_FP: return "sint_to_fp"; 5325 case ISD::UINT_TO_FP: return "uint_to_fp"; 5326 case ISD::FP_TO_SINT: return "fp_to_sint"; 5327 case ISD::FP_TO_UINT: return "fp_to_uint"; 5328 case ISD::BIT_CONVERT: return "bit_convert"; 5329 5330 case ISD::CONVERT_RNDSAT: { 5331 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5332 default: llvm_unreachable("Unknown cvt code!"); 5333 case ISD::CVT_FF: return "cvt_ff"; 5334 case ISD::CVT_FS: return "cvt_fs"; 5335 case ISD::CVT_FU: return "cvt_fu"; 5336 case ISD::CVT_SF: return "cvt_sf"; 5337 case ISD::CVT_UF: return "cvt_uf"; 5338 case ISD::CVT_SS: return "cvt_ss"; 5339 case ISD::CVT_SU: return "cvt_su"; 5340 case ISD::CVT_US: return "cvt_us"; 5341 case ISD::CVT_UU: return "cvt_uu"; 5342 } 5343 } 5344 5345 // Control flow instructions 5346 case ISD::BR: return "br"; 5347 case ISD::BRIND: return "brind"; 5348 case ISD::BR_JT: return "br_jt"; 5349 case ISD::BRCOND: return "brcond"; 5350 case ISD::BR_CC: return "br_cc"; 5351 case ISD::CALLSEQ_START: return "callseq_start"; 5352 case ISD::CALLSEQ_END: return "callseq_end"; 5353 5354 // Other operators 5355 case ISD::LOAD: return "load"; 5356 case ISD::STORE: return "store"; 5357 case ISD::VAARG: return "vaarg"; 5358 case ISD::VACOPY: return "vacopy"; 5359 case ISD::VAEND: return "vaend"; 5360 case ISD::VASTART: return "vastart"; 5361 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5362 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5363 case ISD::BUILD_PAIR: return "build_pair"; 5364 case ISD::STACKSAVE: return "stacksave"; 5365 case ISD::STACKRESTORE: return "stackrestore"; 5366 case ISD::TRAP: return "trap"; 5367 5368 // Bit manipulation 5369 case ISD::BSWAP: return "bswap"; 5370 case ISD::CTPOP: return "ctpop"; 5371 case ISD::CTTZ: return "cttz"; 5372 case ISD::CTLZ: return "ctlz"; 5373 5374 // Debug info 5375 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5376 case ISD::DEBUG_LOC: return "debug_loc"; 5377 5378 // Trampolines 5379 case ISD::TRAMPOLINE: return "trampoline"; 5380 5381 case ISD::CONDCODE: 5382 switch (cast<CondCodeSDNode>(this)->get()) { 5383 default: llvm_unreachable("Unknown setcc condition!"); 5384 case ISD::SETOEQ: return "setoeq"; 5385 case ISD::SETOGT: return "setogt"; 5386 case ISD::SETOGE: return "setoge"; 5387 case ISD::SETOLT: return "setolt"; 5388 case ISD::SETOLE: return "setole"; 5389 case ISD::SETONE: return "setone"; 5390 5391 case ISD::SETO: return "seto"; 5392 case ISD::SETUO: return "setuo"; 5393 case ISD::SETUEQ: return "setue"; 5394 case ISD::SETUGT: return "setugt"; 5395 case ISD::SETUGE: return "setuge"; 5396 case ISD::SETULT: return "setult"; 5397 case ISD::SETULE: return "setule"; 5398 case ISD::SETUNE: return "setune"; 5399 5400 case ISD::SETEQ: return "seteq"; 5401 case ISD::SETGT: return "setgt"; 5402 case ISD::SETGE: return "setge"; 5403 case ISD::SETLT: return "setlt"; 5404 case ISD::SETLE: return "setle"; 5405 case ISD::SETNE: return "setne"; 5406 } 5407 } 5408} 5409 5410const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5411 switch (AM) { 5412 default: 5413 return ""; 5414 case ISD::PRE_INC: 5415 return "<pre-inc>"; 5416 case ISD::PRE_DEC: 5417 return "<pre-dec>"; 5418 case ISD::POST_INC: 5419 return "<post-inc>"; 5420 case ISD::POST_DEC: 5421 return "<post-dec>"; 5422 } 5423} 5424 5425std::string ISD::ArgFlagsTy::getArgFlagsString() { 5426 std::string S = "< "; 5427 5428 if (isZExt()) 5429 S += "zext "; 5430 if (isSExt()) 5431 S += "sext "; 5432 if (isInReg()) 5433 S += "inreg "; 5434 if (isSRet()) 5435 S += "sret "; 5436 if (isByVal()) 5437 S += "byval "; 5438 if (isNest()) 5439 S += "nest "; 5440 if (getByValAlign()) 5441 S += "byval-align:" + utostr(getByValAlign()) + " "; 5442 if (getOrigAlign()) 5443 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5444 if (getByValSize()) 5445 S += "byval-size:" + utostr(getByValSize()) + " "; 5446 return S + ">"; 5447} 5448 5449void SDNode::dump() const { dump(0); } 5450void SDNode::dump(const SelectionDAG *G) const { 5451 print(errs(), G); 5452} 5453 5454void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5455 OS << (void*)this << ": "; 5456 5457 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5458 if (i) OS << ","; 5459 if (getValueType(i) == MVT::Other) 5460 OS << "ch"; 5461 else 5462 OS << getValueType(i).getEVTString(); 5463 } 5464 OS << " = " << getOperationName(G); 5465} 5466 5467void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5468 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5469 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(this); 5470 OS << "<"; 5471 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5472 int Idx = SVN->getMaskElt(i); 5473 if (i) OS << ","; 5474 if (Idx < 0) 5475 OS << "u"; 5476 else 5477 OS << Idx; 5478 } 5479 OS << ">"; 5480 } 5481 5482 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5483 OS << '<' << CSDN->getAPIntValue() << '>'; 5484 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5485 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5486 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5487 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5488 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5489 else { 5490 OS << "<APFloat("; 5491 CSDN->getValueAPF().bitcastToAPInt().dump(); 5492 OS << ")>"; 5493 } 5494 } else if (const GlobalAddressSDNode *GADN = 5495 dyn_cast<GlobalAddressSDNode>(this)) { 5496 int64_t offset = GADN->getOffset(); 5497 OS << '<'; 5498 WriteAsOperand(OS, GADN->getGlobal()); 5499 OS << '>'; 5500 if (offset > 0) 5501 OS << " + " << offset; 5502 else 5503 OS << " " << offset; 5504 if (unsigned int TF = GADN->getTargetFlags()) 5505 OS << " [TF=" << TF << ']'; 5506 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5507 OS << "<" << FIDN->getIndex() << ">"; 5508 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5509 OS << "<" << JTDN->getIndex() << ">"; 5510 if (unsigned int TF = JTDN->getTargetFlags()) 5511 OS << " [TF=" << TF << ']'; 5512 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5513 int offset = CP->getOffset(); 5514 if (CP->isMachineConstantPoolEntry()) 5515 OS << "<" << *CP->getMachineCPVal() << ">"; 5516 else 5517 OS << "<" << *CP->getConstVal() << ">"; 5518 if (offset > 0) 5519 OS << " + " << offset; 5520 else 5521 OS << " " << offset; 5522 if (unsigned int TF = CP->getTargetFlags()) 5523 OS << " [TF=" << TF << ']'; 5524 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5525 OS << "<"; 5526 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5527 if (LBB) 5528 OS << LBB->getName() << " "; 5529 OS << (const void*)BBDN->getBasicBlock() << ">"; 5530 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5531 if (G && R->getReg() && 5532 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5533 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5534 } else { 5535 OS << " #" << R->getReg(); 5536 } 5537 } else if (const ExternalSymbolSDNode *ES = 5538 dyn_cast<ExternalSymbolSDNode>(this)) { 5539 OS << "'" << ES->getSymbol() << "'"; 5540 if (unsigned int TF = ES->getTargetFlags()) 5541 OS << " [TF=" << TF << ']'; 5542 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5543 if (M->getValue()) 5544 OS << "<" << M->getValue() << ">"; 5545 else 5546 OS << "<null>"; 5547 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5548 if (M->MO.getValue()) 5549 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5550 else 5551 OS << "<null:" << M->MO.getOffset() << ">"; 5552 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5553 OS << ":" << N->getVT().getEVTString(); 5554 } 5555 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5556 const Value *SrcValue = LD->getSrcValue(); 5557 int SrcOffset = LD->getSrcValueOffset(); 5558 OS << " <"; 5559 if (SrcValue) 5560 OS << SrcValue; 5561 else 5562 OS << "null"; 5563 OS << ":" << SrcOffset << ">"; 5564 5565 bool doExt = true; 5566 switch (LD->getExtensionType()) { 5567 default: doExt = false; break; 5568 case ISD::EXTLOAD: OS << " <anyext "; break; 5569 case ISD::SEXTLOAD: OS << " <sext "; break; 5570 case ISD::ZEXTLOAD: OS << " <zext "; break; 5571 } 5572 if (doExt) 5573 OS << LD->getMemoryVT().getEVTString() << ">"; 5574 5575 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5576 if (*AM) 5577 OS << " " << AM; 5578 if (LD->isVolatile()) 5579 OS << " <volatile>"; 5580 OS << " alignment=" << LD->getAlignment(); 5581 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5582 const Value *SrcValue = ST->getSrcValue(); 5583 int SrcOffset = ST->getSrcValueOffset(); 5584 OS << " <"; 5585 if (SrcValue) 5586 OS << SrcValue; 5587 else 5588 OS << "null"; 5589 OS << ":" << SrcOffset << ">"; 5590 5591 if (ST->isTruncatingStore()) 5592 OS << " <trunc " << ST->getMemoryVT().getEVTString() << ">"; 5593 5594 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5595 if (*AM) 5596 OS << " " << AM; 5597 if (ST->isVolatile()) 5598 OS << " <volatile>"; 5599 OS << " alignment=" << ST->getAlignment(); 5600 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5601 const Value *SrcValue = AT->getSrcValue(); 5602 int SrcOffset = AT->getSrcValueOffset(); 5603 OS << " <"; 5604 if (SrcValue) 5605 OS << SrcValue; 5606 else 5607 OS << "null"; 5608 OS << ":" << SrcOffset << ">"; 5609 if (AT->isVolatile()) 5610 OS << " <volatile>"; 5611 OS << " alignment=" << AT->getAlignment(); 5612 } 5613} 5614 5615void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5616 print_types(OS, G); 5617 OS << " "; 5618 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5619 if (i) OS << ", "; 5620 OS << (void*)getOperand(i).getNode(); 5621 if (unsigned RN = getOperand(i).getResNo()) 5622 OS << ":" << RN; 5623 } 5624 print_details(OS, G); 5625} 5626 5627static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5628 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5629 if (N->getOperand(i).getNode()->hasOneUse()) 5630 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5631 else 5632 cerr << "\n" << std::string(indent+2, ' ') 5633 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5634 5635 5636 cerr << "\n" << std::string(indent, ' '); 5637 N->dump(G); 5638} 5639 5640void SelectionDAG::dump() const { 5641 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5642 5643 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5644 I != E; ++I) { 5645 const SDNode *N = I; 5646 if (!N->hasOneUse() && N != getRoot().getNode()) 5647 DumpNodes(N, 2, this); 5648 } 5649 5650 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 5651 5652 cerr << "\n\n"; 5653} 5654 5655void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 5656 print_types(OS, G); 5657 print_details(OS, G); 5658} 5659 5660typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 5661static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 5662 const SelectionDAG *G, VisitedSDNodeSet &once) { 5663 if (!once.insert(N)) // If we've been here before, return now. 5664 return; 5665 // Dump the current SDNode, but don't end the line yet. 5666 OS << std::string(indent, ' '); 5667 N->printr(OS, G); 5668 // Having printed this SDNode, walk the children: 5669 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5670 const SDNode *child = N->getOperand(i).getNode(); 5671 if (i) OS << ","; 5672 OS << " "; 5673 if (child->getNumOperands() == 0) { 5674 // This child has no grandchildren; print it inline right here. 5675 child->printr(OS, G); 5676 once.insert(child); 5677 } else { // Just the address. FIXME: also print the child's opcode 5678 OS << (void*)child; 5679 if (unsigned RN = N->getOperand(i).getResNo()) 5680 OS << ":" << RN; 5681 } 5682 } 5683 OS << "\n"; 5684 // Dump children that have grandchildren on their own line(s). 5685 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5686 const SDNode *child = N->getOperand(i).getNode(); 5687 DumpNodesr(OS, child, indent+2, G, once); 5688 } 5689} 5690 5691void SDNode::dumpr() const { 5692 VisitedSDNodeSet once; 5693 DumpNodesr(errs(), this, 0, 0, once); 5694} 5695 5696 5697// getAddressSpace - Return the address space this GlobalAddress belongs to. 5698unsigned GlobalAddressSDNode::getAddressSpace() const { 5699 return getGlobal()->getType()->getAddressSpace(); 5700} 5701 5702 5703const Type *ConstantPoolSDNode::getType() const { 5704 if (isMachineConstantPoolEntry()) 5705 return Val.MachineCPVal->getType(); 5706 return Val.ConstVal->getType(); 5707} 5708 5709bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 5710 APInt &SplatUndef, 5711 unsigned &SplatBitSize, 5712 bool &HasAnyUndefs, 5713 unsigned MinSplatBits) { 5714 EVT VT = getValueType(0); 5715 assert(VT.isVector() && "Expected a vector type"); 5716 unsigned sz = VT.getSizeInBits(); 5717 if (MinSplatBits > sz) 5718 return false; 5719 5720 SplatValue = APInt(sz, 0); 5721 SplatUndef = APInt(sz, 0); 5722 5723 // Get the bits. Bits with undefined values (when the corresponding element 5724 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 5725 // in SplatValue. If any of the values are not constant, give up and return 5726 // false. 5727 unsigned int nOps = getNumOperands(); 5728 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 5729 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 5730 for (unsigned i = 0; i < nOps; ++i) { 5731 SDValue OpVal = getOperand(i); 5732 unsigned BitPos = i * EltBitSize; 5733 5734 if (OpVal.getOpcode() == ISD::UNDEF) 5735 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize); 5736 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 5737 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 5738 zextOrTrunc(sz) << BitPos); 5739 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 5740 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 5741 else 5742 return false; 5743 } 5744 5745 // The build_vector is all constants or undefs. Find the smallest element 5746 // size that splats the vector. 5747 5748 HasAnyUndefs = (SplatUndef != 0); 5749 while (sz > 8) { 5750 5751 unsigned HalfSize = sz / 2; 5752 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 5753 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 5754 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 5755 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 5756 5757 // If the two halves do not match (ignoring undef bits), stop here. 5758 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 5759 MinSplatBits > HalfSize) 5760 break; 5761 5762 SplatValue = HighValue | LowValue; 5763 SplatUndef = HighUndef & LowUndef; 5764 5765 sz = HalfSize; 5766 } 5767 5768 SplatBitSize = sz; 5769 return true; 5770} 5771 5772bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 5773 // Find the first non-undef value in the shuffle mask. 5774 unsigned i, e; 5775 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 5776 /* search */; 5777 5778 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 5779 5780 // Make sure all remaining elements are either undef or the same as the first 5781 // non-undef value. 5782 for (int Idx = Mask[i]; i != e; ++i) 5783 if (Mask[i] >= 0 && Mask[i] != Idx) 5784 return false; 5785 return true; 5786} 5787