SelectionDAG.cpp revision 385328ce416e2b98d7113a75d9413a56a2b10318
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Target/TargetLowering.h" 20#include <iostream> 21#include <set> 22#include <cmath> 23#include <algorithm> 24using namespace llvm; 25 26static bool isCommutativeBinOp(unsigned Opcode) { 27 switch (Opcode) { 28 case ISD::ADD: 29 case ISD::MUL: 30 case ISD::AND: 31 case ISD::OR: 32 case ISD::XOR: return true; 33 default: return false; // FIXME: Need commutative info for user ops! 34 } 35} 36 37static bool isAssociativeBinOp(unsigned Opcode) { 38 switch (Opcode) { 39 case ISD::ADD: 40 case ISD::MUL: 41 case ISD::AND: 42 case ISD::OR: 43 case ISD::XOR: return true; 44 default: return false; // FIXME: Need associative info for user ops! 45 } 46} 47 48static unsigned ExactLog2(uint64_t Val) { 49 unsigned Count = 0; 50 while (Val != 1) { 51 Val >>= 1; 52 ++Count; 53 } 54 return Count; 55} 56 57// isInvertibleForFree - Return true if there is no cost to emitting the logical 58// inverse of this node. 59static bool isInvertibleForFree(SDOperand N) { 60 if (isa<ConstantSDNode>(N.Val)) return true; 61 if (isa<SetCCSDNode>(N.Val) && N.Val->hasOneUse()) 62 return true; 63 return false; 64} 65 66 67/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 68/// when given the operation for (X op Y). 69ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 70 // To perform this operation, we just need to swap the L and G bits of the 71 // operation. 72 unsigned OldL = (Operation >> 2) & 1; 73 unsigned OldG = (Operation >> 1) & 1; 74 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 75 (OldL << 1) | // New G bit 76 (OldG << 2)); // New L bit. 77} 78 79/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 80/// 'op' is a valid SetCC operation. 81ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 82 unsigned Operation = Op; 83 if (isInteger) 84 Operation ^= 7; // Flip L, G, E bits, but not U. 85 else 86 Operation ^= 15; // Flip all of the condition bits. 87 if (Operation > ISD::SETTRUE2) 88 Operation &= ~8; // Don't let N and U bits get set. 89 return ISD::CondCode(Operation); 90} 91 92 93/// isSignedOp - For an integer comparison, return 1 if the comparison is a 94/// signed operation and 2 if the result is an unsigned comparison. Return zero 95/// if the operation does not depend on the sign of the input (setne and seteq). 96static int isSignedOp(ISD::CondCode Opcode) { 97 switch (Opcode) { 98 default: assert(0 && "Illegal integer setcc operation!"); 99 case ISD::SETEQ: 100 case ISD::SETNE: return 0; 101 case ISD::SETLT: 102 case ISD::SETLE: 103 case ISD::SETGT: 104 case ISD::SETGE: return 1; 105 case ISD::SETULT: 106 case ISD::SETULE: 107 case ISD::SETUGT: 108 case ISD::SETUGE: return 2; 109 } 110} 111 112/// getSetCCOrOperation - Return the result of a logical OR between different 113/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 114/// returns SETCC_INVALID if it is not possible to represent the resultant 115/// comparison. 116ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 117 bool isInteger) { 118 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 119 // Cannot fold a signed integer setcc with an unsigned integer setcc. 120 return ISD::SETCC_INVALID; 121 122 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 123 124 // If the N and U bits get set then the resultant comparison DOES suddenly 125 // care about orderedness, and is true when ordered. 126 if (Op > ISD::SETTRUE2) 127 Op &= ~16; // Clear the N bit. 128 return ISD::CondCode(Op); 129} 130 131/// getSetCCAndOperation - Return the result of a logical AND between different 132/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 133/// function returns zero if it is not possible to represent the resultant 134/// comparison. 135ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 136 bool isInteger) { 137 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 138 // Cannot fold a signed setcc with an unsigned setcc. 139 return ISD::SETCC_INVALID; 140 141 // Combine all of the condition bits. 142 return ISD::CondCode(Op1 & Op2); 143} 144 145const TargetMachine &SelectionDAG::getTarget() const { 146 return TLI.getTargetMachine(); 147} 148 149 150/// RemoveDeadNodes - This method deletes all unreachable nodes in the 151/// SelectionDAG, including nodes (like loads) that have uses of their token 152/// chain but no other uses and no side effect. If a node is passed in as an 153/// argument, it is used as the seed for node deletion. 154void SelectionDAG::RemoveDeadNodes(SDNode *N) { 155 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 156 157 // Create a dummy node (which is not added to allnodes), that adds a reference 158 // to the root node, preventing it from being deleted. 159 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot()); 160 161 DeleteNodeIfDead(N, &AllNodeSet); 162 163 Restart: 164 unsigned NumNodes = AllNodeSet.size(); 165 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 166 I != E; ++I) { 167 // Try to delete this node. 168 DeleteNodeIfDead(*I, &AllNodeSet); 169 170 // If we actually deleted any nodes, do not use invalid iterators in 171 // AllNodeSet. 172 if (AllNodeSet.size() != NumNodes) 173 goto Restart; 174 } 175 176 // Restore AllNodes. 177 if (AllNodes.size() != NumNodes) 178 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 179 180 // If the root changed (e.g. it was a dead load, update the root). 181 setRoot(DummyNode->getOperand(0)); 182 183 // Now that we are done with the dummy node, delete it. 184 DummyNode->getOperand(0).Val->removeUser(DummyNode); 185 delete DummyNode; 186} 187 188void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 189 if (!N->use_empty()) 190 return; 191 192 // Okay, we really are going to delete this node. First take this out of the 193 // appropriate CSE map. 194 switch (N->getOpcode()) { 195 case ISD::Constant: 196 Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 197 N->getValueType(0))); 198 break; 199 case ISD::ConstantFP: { 200 union { 201 double DV; 202 uint64_t IV; 203 }; 204 DV = cast<ConstantFPSDNode>(N)->getValue(); 205 ConstantFPs.erase(std::make_pair(IV, N->getValueType(0))); 206 break; 207 } 208 case ISD::GlobalAddress: 209 GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 210 break; 211 case ISD::FrameIndex: 212 FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 213 break; 214 case ISD::ConstantPool: 215 ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->getIndex()); 216 break; 217 case ISD::BasicBlock: 218 BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 219 break; 220 case ISD::ExternalSymbol: 221 ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 222 break; 223 224 case ISD::LOAD: 225 Loads.erase(std::make_pair(N->getOperand(1), 226 std::make_pair(N->getOperand(0), 227 N->getValueType(0)))); 228 break; 229 case ISD::SETCC: 230 SetCCs.erase(std::make_pair(std::make_pair(N->getOperand(0), 231 N->getOperand(1)), 232 std::make_pair( 233 cast<SetCCSDNode>(N)->getCondition(), 234 N->getValueType(0)))); 235 break; 236 case ISD::TRUNCSTORE: 237 case ISD::SIGN_EXTEND_INREG: 238 case ISD::FP_ROUND_INREG: 239 case ISD::EXTLOAD: 240 case ISD::SEXTLOAD: 241 case ISD::ZEXTLOAD: { 242 EVTStruct NN; 243 NN.Opcode = N->getOpcode(); 244 NN.VT = N->getValueType(0); 245 NN.EVT = cast<MVTSDNode>(N)->getExtraValueType(); 246 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 247 NN.Ops.push_back(N->getOperand(i)); 248 MVTSDNodes.erase(NN); 249 break; 250 } 251 default: 252 if (N->getNumOperands() == 1) 253 UnaryOps.erase(std::make_pair(N->getOpcode(), 254 std::make_pair(N->getOperand(0), 255 N->getValueType(0)))); 256 else if (N->getNumOperands() == 2) 257 BinaryOps.erase(std::make_pair(N->getOpcode(), 258 std::make_pair(N->getOperand(0), 259 N->getOperand(1)))); 260 else if (N->getNumValues() == 1) { 261 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 262 OneResultNodes.erase(std::make_pair(N->getOpcode(), 263 std::make_pair(N->getValueType(0), 264 Ops))); 265 } else { 266 // Remove the node from the ArbitraryNodes map. 267 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 268 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 269 ArbitraryNodes.erase(std::make_pair(N->getOpcode(), 270 std::make_pair(RV, Ops))); 271 } 272 break; 273 } 274 275 // Next, brutally remove the operand list. 276 while (!N->Operands.empty()) { 277 SDNode *O = N->Operands.back().Val; 278 N->Operands.pop_back(); 279 O->removeUser(N); 280 281 // Now that we removed this operand, see if there are no uses of it left. 282 DeleteNodeIfDead(O, NodeSet); 283 } 284 285 // Remove the node from the nodes set and delete it. 286 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 287 AllNodeSet.erase(N); 288 289 // Now that the node is gone, check to see if any of the operands of this node 290 // are dead now. 291 delete N; 292} 293 294 295SelectionDAG::~SelectionDAG() { 296 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 297 delete AllNodes[i]; 298} 299 300SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 301 if (Op.getValueType() == VT) return Op; 302 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT)); 303 return getNode(ISD::AND, Op.getValueType(), Op, 304 getConstant(Imm, Op.getValueType())); 305} 306 307SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 308 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 309 // Mask out any bits that are not valid for this constant. 310 if (VT != MVT::i64) 311 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 312 313 SDNode *&N = Constants[std::make_pair(Val, VT)]; 314 if (N) return SDOperand(N, 0); 315 N = new ConstantSDNode(Val, VT); 316 AllNodes.push_back(N); 317 return SDOperand(N, 0); 318} 319 320SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 321 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 322 if (VT == MVT::f32) 323 Val = (float)Val; // Mask out extra precision. 324 325 // Do the map lookup using the actual bit pattern for the floating point 326 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 327 // we don't have issues with SNANs. 328 union { 329 double DV; 330 uint64_t IV; 331 }; 332 333 DV = Val; 334 335 SDNode *&N = ConstantFPs[std::make_pair(IV, VT)]; 336 if (N) return SDOperand(N, 0); 337 N = new ConstantFPSDNode(Val, VT); 338 AllNodes.push_back(N); 339 return SDOperand(N, 0); 340} 341 342 343 344SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 345 MVT::ValueType VT) { 346 SDNode *&N = GlobalValues[GV]; 347 if (N) return SDOperand(N, 0); 348 N = new GlobalAddressSDNode(GV,VT); 349 AllNodes.push_back(N); 350 return SDOperand(N, 0); 351} 352 353SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 354 SDNode *&N = FrameIndices[FI]; 355 if (N) return SDOperand(N, 0); 356 N = new FrameIndexSDNode(FI, VT); 357 AllNodes.push_back(N); 358 return SDOperand(N, 0); 359} 360 361SDOperand SelectionDAG::getConstantPool(unsigned CPIdx, MVT::ValueType VT) { 362 SDNode *N = ConstantPoolIndices[CPIdx]; 363 if (N) return SDOperand(N, 0); 364 N = new ConstantPoolSDNode(CPIdx, VT); 365 AllNodes.push_back(N); 366 return SDOperand(N, 0); 367} 368 369SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 370 SDNode *&N = BBNodes[MBB]; 371 if (N) return SDOperand(N, 0); 372 N = new BasicBlockSDNode(MBB); 373 AllNodes.push_back(N); 374 return SDOperand(N, 0); 375} 376 377SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 378 SDNode *&N = ExternalSymbols[Sym]; 379 if (N) return SDOperand(N, 0); 380 N = new ExternalSymbolSDNode(Sym, VT); 381 AllNodes.push_back(N); 382 return SDOperand(N, 0); 383} 384 385SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, 386 SDOperand N1, SDOperand N2) { 387 // These setcc operations always fold. 388 switch (Cond) { 389 default: break; 390 case ISD::SETFALSE: 391 case ISD::SETFALSE2: return getConstant(0, VT); 392 case ISD::SETTRUE: 393 case ISD::SETTRUE2: return getConstant(1, VT); 394 } 395 396 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 397 uint64_t C2 = N2C->getValue(); 398 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 399 uint64_t C1 = N1C->getValue(); 400 401 // Sign extend the operands if required 402 if (ISD::isSignedIntSetCC(Cond)) { 403 C1 = N1C->getSignExtended(); 404 C2 = N2C->getSignExtended(); 405 } 406 407 switch (Cond) { 408 default: assert(0 && "Unknown integer setcc!"); 409 case ISD::SETEQ: return getConstant(C1 == C2, VT); 410 case ISD::SETNE: return getConstant(C1 != C2, VT); 411 case ISD::SETULT: return getConstant(C1 < C2, VT); 412 case ISD::SETUGT: return getConstant(C1 > C2, VT); 413 case ISD::SETULE: return getConstant(C1 <= C2, VT); 414 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 415 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 416 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 417 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 418 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 419 } 420 } else { 421 // If the LHS is a ZERO_EXTEND and if this is an ==/!= comparison, perform 422 // the comparison on the input. 423 if (N1.getOpcode() == ISD::ZERO_EXTEND) { 424 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType()); 425 426 // If the comparison constant has bits in the upper part, the 427 // zero-extended value could never match. 428 if (C2 & (~0ULL << InSize)) { 429 unsigned VSize = MVT::getSizeInBits(N1.getValueType()); 430 switch (Cond) { 431 case ISD::SETUGT: 432 case ISD::SETUGE: 433 case ISD::SETEQ: return getConstant(0, VT); 434 case ISD::SETULT: 435 case ISD::SETULE: 436 case ISD::SETNE: return getConstant(1, VT); 437 case ISD::SETGT: 438 case ISD::SETGE: 439 // True if the sign bit of C2 is set. 440 return getConstant((C2 & (1ULL << VSize)) != 0, VT); 441 case ISD::SETLT: 442 case ISD::SETLE: 443 // True if the sign bit of C2 isn't set. 444 return getConstant((C2 & (1ULL << VSize)) == 0, VT); 445 default: 446 break; 447 } 448 } 449 450 // Otherwise, we can perform the comparison with the low bits. 451 switch (Cond) { 452 case ISD::SETEQ: 453 case ISD::SETNE: 454 case ISD::SETUGT: 455 case ISD::SETUGE: 456 case ISD::SETULT: 457 case ISD::SETULE: 458 return getSetCC(Cond, VT, N1.getOperand(0), 459 getConstant(C2, N1.getOperand(0).getValueType())); 460 default: 461 break; // todo, be more careful with signed comparisons 462 } 463 } 464 465 466 uint64_t MinVal, MaxVal; 467 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 468 if (ISD::isSignedIntSetCC(Cond)) { 469 MinVal = 1ULL << (OperandBitSize-1); 470 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 471 MaxVal = ~0ULL >> (65-OperandBitSize); 472 else 473 MaxVal = 0; 474 } else { 475 MinVal = 0; 476 MaxVal = ~0ULL >> (64-OperandBitSize); 477 } 478 479 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 480 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 481 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 482 --C2; // X >= C1 --> X > (C1-1) 483 Cond = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT; 484 N2 = getConstant(C2, N2.getValueType()); 485 N2C = cast<ConstantSDNode>(N2.Val); 486 } 487 488 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 489 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 490 ++C2; // X <= C1 --> X < (C1+1) 491 Cond = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; 492 N2 = getConstant(C2, N2.getValueType()); 493 N2C = cast<ConstantSDNode>(N2.Val); 494 } 495 496 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) 497 return getConstant(0, VT); // X < MIN --> false 498 499 // Canonicalize setgt X, Min --> setne X, Min 500 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) 501 return getSetCC(ISD::SETNE, VT, N1, N2); 502 503 // If we have setult X, 1, turn it into seteq X, 0 504 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 505 return getSetCC(ISD::SETEQ, VT, N1, 506 getConstant(MinVal, N1.getValueType())); 507 // If we have setugt X, Max-1, turn it into seteq X, Max 508 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 509 return getSetCC(ISD::SETEQ, VT, N1, 510 getConstant(MaxVal, N1.getValueType())); 511 512 // If we have "setcc X, C1", check to see if we can shrink the immediate 513 // by changing cc. 514 515 // SETUGT X, SINTMAX -> SETLT X, 0 516 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 517 C2 == (~0ULL >> (65-OperandBitSize))) 518 return getSetCC(ISD::SETLT, VT, N1, getConstant(0, N2.getValueType())); 519 520 // FIXME: Implement the rest of these. 521 522 523 // Fold bit comparisons when we can. 524 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 525 VT == N1.getValueType() && N1.getOpcode() == ISD::AND) 526 if (ConstantSDNode *AndRHS = 527 dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 528 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3 529 // Perform the xform if the AND RHS is a single bit. 530 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) { 531 return getNode(ISD::SRL, VT, N1, 532 getConstant(ExactLog2(AndRHS->getValue()), 533 TLI.getShiftAmountTy())); 534 } 535 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) { 536 // (X & 8) == 8 --> (X & 8) >> 3 537 // Perform the xform if C2 is a single bit. 538 if ((C2 & (C2-1)) == 0) { 539 return getNode(ISD::SRL, VT, N1, 540 getConstant(ExactLog2(C2),TLI.getShiftAmountTy())); 541 } 542 } 543 } 544 } 545 } else if (isa<ConstantSDNode>(N1.Val)) { 546 // Ensure that the constant occurs on the RHS. 547 return getSetCC(ISD::getSetCCSwappedOperands(Cond), VT, N2, N1); 548 } 549 550 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 551 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 552 double C1 = N1C->getValue(), C2 = N2C->getValue(); 553 554 switch (Cond) { 555 default: break; // FIXME: Implement the rest of these! 556 case ISD::SETEQ: return getConstant(C1 == C2, VT); 557 case ISD::SETNE: return getConstant(C1 != C2, VT); 558 case ISD::SETLT: return getConstant(C1 < C2, VT); 559 case ISD::SETGT: return getConstant(C1 > C2, VT); 560 case ISD::SETLE: return getConstant(C1 <= C2, VT); 561 case ISD::SETGE: return getConstant(C1 >= C2, VT); 562 } 563 } else { 564 // Ensure that the constant occurs on the RHS. 565 Cond = ISD::getSetCCSwappedOperands(Cond); 566 std::swap(N1, N2); 567 } 568 569 if (N1 == N2) { 570 // We can always fold X == Y for integer setcc's. 571 if (MVT::isInteger(N1.getValueType())) 572 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 573 unsigned UOF = ISD::getUnorderedFlavor(Cond); 574 if (UOF == 2) // FP operators that are undefined on NaNs. 575 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 576 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond))) 577 return getConstant(UOF, VT); 578 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO 579 // if it is not already. 580 Cond = UOF == 0 ? ISD::SETUO : ISD::SETO; 581 } 582 583 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 584 MVT::isInteger(N1.getValueType())) { 585 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB || 586 N1.getOpcode() == ISD::XOR) { 587 // Simplify (X+Y) == (X+Z) --> Y == Z 588 if (N1.getOpcode() == N2.getOpcode()) { 589 if (N1.getOperand(0) == N2.getOperand(0)) 590 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1)); 591 if (N1.getOperand(1) == N2.getOperand(1)) 592 return getSetCC(Cond, VT, N1.getOperand(0), N2.getOperand(0)); 593 if (isCommutativeBinOp(N1.getOpcode())) { 594 // If X op Y == Y op X, try other combinations. 595 if (N1.getOperand(0) == N2.getOperand(1)) 596 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(0)); 597 if (N1.getOperand(1) == N2.getOperand(0)) 598 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1)); 599 } 600 } 601 602 // FIXME: move this stuff to the DAG Combiner when it exists! 603 604 // Simplify (X+Z) == X --> Z == 0 605 if (N1.getOperand(0) == N2) 606 return getSetCC(Cond, VT, N1.getOperand(1), 607 getConstant(0, N1.getValueType())); 608 if (N1.getOperand(1) == N2) { 609 if (isCommutativeBinOp(N1.getOpcode())) 610 return getSetCC(Cond, VT, N1.getOperand(0), 611 getConstant(0, N1.getValueType())); 612 else { 613 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); 614 // (Z-X) == X --> Z == X<<1 615 return getSetCC(Cond, VT, N1.getOperand(0), 616 getNode(ISD::SHL, N2.getValueType(), 617 N2, getConstant(1, TLI.getShiftAmountTy()))); 618 } 619 } 620 } 621 622 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || 623 N2.getOpcode() == ISD::XOR) { 624 // Simplify X == (X+Z) --> Z == 0 625 if (N2.getOperand(0) == N1) 626 return getSetCC(Cond, VT, N2.getOperand(1), 627 getConstant(0, N2.getValueType())); 628 else if (N2.getOperand(1) == N1) 629 return getSetCC(Cond, VT, N2.getOperand(0), 630 getConstant(0, N2.getValueType())); 631 } 632 } 633 634 // Fold away ALL boolean setcc's. 635 if (N1.getValueType() == MVT::i1) { 636 switch (Cond) { 637 default: assert(0 && "Unknown integer setcc!"); 638 case ISD::SETEQ: // X == Y -> (X^Y)^1 639 N1 = getNode(ISD::XOR, MVT::i1, 640 getNode(ISD::XOR, MVT::i1, N1, N2), 641 getConstant(1, MVT::i1)); 642 break; 643 case ISD::SETNE: // X != Y --> (X^Y) 644 N1 = getNode(ISD::XOR, MVT::i1, N1, N2); 645 break; 646 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y 647 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y 648 N1 = getNode(ISD::AND, MVT::i1, N2, 649 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 650 break; 651 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X 652 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X 653 N1 = getNode(ISD::AND, MVT::i1, N1, 654 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 655 break; 656 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y 657 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y 658 N1 = getNode(ISD::OR, MVT::i1, N2, 659 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 660 break; 661 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X 662 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X 663 N1 = getNode(ISD::OR, MVT::i1, N1, 664 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 665 break; 666 } 667 if (VT != MVT::i1) 668 N1 = getNode(ISD::ZERO_EXTEND, VT, N1); 669 return N1; 670 } 671 672 673 SetCCSDNode *&N = SetCCs[std::make_pair(std::make_pair(N1, N2), 674 std::make_pair(Cond, VT))]; 675 if (N) return SDOperand(N, 0); 676 N = new SetCCSDNode(Cond, N1, N2); 677 N->setValueTypes(VT); 678 AllNodes.push_back(N); 679 return SDOperand(N, 0); 680} 681 682 683 684/// getNode - Gets or creates the specified node. 685/// 686SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 687 SDNode *N = new SDNode(Opcode, VT); 688 AllNodes.push_back(N); 689 return SDOperand(N, 0); 690} 691 692SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 693 SDOperand Operand) { 694 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 695 uint64_t Val = C->getValue(); 696 switch (Opcode) { 697 default: break; 698 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 699 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 700 case ISD::TRUNCATE: return getConstant(Val, VT); 701 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 702 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 703 } 704 } 705 706 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 707 switch (Opcode) { 708 case ISD::FNEG: 709 return getConstantFP(-C->getValue(), VT); 710 case ISD::FP_ROUND: 711 case ISD::FP_EXTEND: 712 return getConstantFP(C->getValue(), VT); 713 case ISD::FP_TO_SINT: 714 return getConstant((int64_t)C->getValue(), VT); 715 case ISD::FP_TO_UINT: 716 return getConstant((uint64_t)C->getValue(), VT); 717 } 718 719 unsigned OpOpcode = Operand.Val->getOpcode(); 720 switch (Opcode) { 721 case ISD::TokenFactor: 722 return Operand; // Factor of one node? No factor. 723 case ISD::SIGN_EXTEND: 724 if (Operand.getValueType() == VT) return Operand; // noop extension 725 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 726 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 727 break; 728 case ISD::ZERO_EXTEND: 729 if (Operand.getValueType() == VT) return Operand; // noop extension 730 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 731 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 732 break; 733 case ISD::TRUNCATE: 734 if (Operand.getValueType() == VT) return Operand; // noop truncate 735 if (OpOpcode == ISD::TRUNCATE) 736 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 737 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) { 738 // If the source is smaller than the dest, we still need an extend. 739 if (Operand.Val->getOperand(0).getValueType() < VT) 740 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 741 else if (Operand.Val->getOperand(0).getValueType() > VT) 742 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 743 else 744 return Operand.Val->getOperand(0); 745 } 746 break; 747 case ISD::FNEG: 748 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X) 749 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1), 750 Operand.Val->getOperand(0)); 751 if (OpOpcode == ISD::FNEG) // --X -> X 752 return Operand.Val->getOperand(0); 753 break; 754 case ISD::FABS: 755 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 756 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 757 break; 758 } 759 760 SDNode *&N = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 761 if (N) return SDOperand(N, 0); 762 N = new SDNode(Opcode, Operand); 763 N->setValueTypes(VT); 764 AllNodes.push_back(N); 765 return SDOperand(N, 0); 766} 767 768/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 769/// this predicate to simplify operations downstream. V and Mask are known to 770/// be the same type. 771static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, 772 const TargetLowering &TLI) { 773 unsigned SrcBits; 774 if (Mask == 0) return true; 775 776 // If we know the result of a setcc has the top bits zero, use this info. 777 switch (Op.getOpcode()) { 778 case ISD::UNDEF: 779 return true; 780 case ISD::Constant: 781 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0; 782 783 case ISD::SETCC: 784 return ((Mask & 1) == 0) && 785 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; 786 787 case ISD::ZEXTLOAD: 788 SrcBits = MVT::getSizeInBits(cast<MVTSDNode>(Op)->getExtraValueType()); 789 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 790 case ISD::ZERO_EXTEND: 791 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); 792 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); 793 794 case ISD::AND: 795 // (X & C1) & C2 == 0 iff C1 & C2 == 0. 796 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 797 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI); 798 799 // FALL THROUGH 800 case ISD::OR: 801 case ISD::XOR: 802 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 803 MaskedValueIsZero(Op.getOperand(1), Mask, TLI); 804 case ISD::SELECT: 805 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) && 806 MaskedValueIsZero(Op.getOperand(2), Mask, TLI); 807 808 case ISD::SRL: 809 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0 810 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 811 uint64_t NewVal = Mask << ShAmt->getValue(); 812 SrcBits = MVT::getSizeInBits(Op.getValueType()); 813 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1; 814 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 815 } 816 return false; 817 case ISD::SHL: 818 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0 819 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 820 uint64_t NewVal = Mask >> ShAmt->getValue(); 821 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 822 } 823 return false; 824 // TODO we could handle some SRA cases here. 825 default: break; 826 } 827 828 return false; 829} 830 831 832 833SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 834 SDOperand N1, SDOperand N2) { 835#ifndef NDEBUG 836 switch (Opcode) { 837 case ISD::TokenFactor: 838 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 839 N2.getValueType() == MVT::Other && "Invalid token factor!"); 840 break; 841 case ISD::AND: 842 case ISD::OR: 843 case ISD::XOR: 844 case ISD::UDIV: 845 case ISD::UREM: 846 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 847 // fall through 848 case ISD::ADD: 849 case ISD::SUB: 850 case ISD::MUL: 851 case ISD::SDIV: 852 case ISD::SREM: 853 assert(N1.getValueType() == N2.getValueType() && 854 N1.getValueType() == VT && "Binary operator types must match!"); 855 break; 856 857 case ISD::SHL: 858 case ISD::SRA: 859 case ISD::SRL: 860 assert(VT == N1.getValueType() && 861 "Shift operators return type must be the same as their first arg"); 862 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 863 VT != MVT::i1 && "Shifts only work on integers"); 864 break; 865 default: break; 866 } 867#endif 868 869 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 870 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 871 if (N1C) { 872 if (N2C) { 873 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 874 switch (Opcode) { 875 case ISD::ADD: return getConstant(C1 + C2, VT); 876 case ISD::SUB: return getConstant(C1 - C2, VT); 877 case ISD::MUL: return getConstant(C1 * C2, VT); 878 case ISD::UDIV: 879 if (C2) return getConstant(C1 / C2, VT); 880 break; 881 case ISD::UREM : 882 if (C2) return getConstant(C1 % C2, VT); 883 break; 884 case ISD::SDIV : 885 if (C2) return getConstant(N1C->getSignExtended() / 886 N2C->getSignExtended(), VT); 887 break; 888 case ISD::SREM : 889 if (C2) return getConstant(N1C->getSignExtended() % 890 N2C->getSignExtended(), VT); 891 break; 892 case ISD::AND : return getConstant(C1 & C2, VT); 893 case ISD::OR : return getConstant(C1 | C2, VT); 894 case ISD::XOR : return getConstant(C1 ^ C2, VT); 895 case ISD::SHL : return getConstant(C1 << (int)C2, VT); 896 case ISD::SRL : return getConstant(C1 >> (unsigned)C2, VT); 897 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 898 default: break; 899 } 900 901 } else { // Cannonicalize constant to RHS if commutative 902 if (isCommutativeBinOp(Opcode)) { 903 std::swap(N1C, N2C); 904 std::swap(N1, N2); 905 } 906 } 907 908 switch (Opcode) { 909 default: break; 910 case ISD::SHL: // shl 0, X -> 0 911 if (N1C->isNullValue()) return N1; 912 break; 913 case ISD::SRL: // srl 0, X -> 0 914 if (N1C->isNullValue()) return N1; 915 break; 916 case ISD::SRA: // sra -1, X -> -1 917 if (N1C->isAllOnesValue()) return N1; 918 break; 919 } 920 } 921 922 if (N2C) { 923 uint64_t C2 = N2C->getValue(); 924 925 switch (Opcode) { 926 case ISD::ADD: 927 if (!C2) return N1; // add X, 0 -> X 928 break; 929 case ISD::SUB: 930 if (!C2) return N1; // sub X, 0 -> X 931 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT)); 932 case ISD::MUL: 933 if (!C2) return N2; // mul X, 0 -> 0 934 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X 935 return getNode(ISD::SUB, VT, getConstant(0, VT), N1); 936 937 // FIXME: Move this to the DAG combiner when it exists. 938 if ((C2 & C2-1) == 0) { 939 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy()); 940 return getNode(ISD::SHL, VT, N1, ShAmt); 941 } 942 break; 943 944 case ISD::UDIV: 945 // FIXME: Move this to the DAG combiner when it exists. 946 if ((C2 & C2-1) == 0 && C2) { 947 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy()); 948 return getNode(ISD::SRL, VT, N1, ShAmt); 949 } 950 break; 951 952 case ISD::SHL: 953 case ISD::SRL: 954 case ISD::SRA: 955 // If the shift amount is bigger than the size of the data, then all the 956 // bits are shifted out. Simplify to undef. 957 if (C2 >= MVT::getSizeInBits(N1.getValueType())) { 958 return getNode(ISD::UNDEF, N1.getValueType()); 959 } 960 if (C2 == 0) return N1; 961 962 if (Opcode == ISD::SHL && N1.getNumOperands() == 2) 963 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 964 unsigned OpSAC = OpSA->getValue(); 965 if (N1.getOpcode() == ISD::SHL) { 966 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType())) 967 return getConstant(0, N1.getValueType()); 968 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0), 969 getConstant(C2+OpSAC, N2.getValueType())); 970 } else if (N1.getOpcode() == ISD::SRL) { 971 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1) 972 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0), 973 getConstant(~0ULL << OpSAC, VT)); 974 if (C2 > OpSAC) { 975 return getNode(ISD::SHL, VT, Mask, 976 getConstant(C2-OpSAC, N2.getValueType())); 977 } else { 978 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2) 979 return getNode(ISD::SRL, VT, Mask, 980 getConstant(OpSAC-C2, N2.getValueType())); 981 } 982 } else if (N1.getOpcode() == ISD::SRA) { 983 // if C1 == C2, just mask out low bits. 984 if (C2 == OpSAC) 985 return getNode(ISD::AND, VT, N1.getOperand(0), 986 getConstant(~0ULL << C2, VT)); 987 } 988 } 989 break; 990 991 case ISD::AND: 992 if (!C2) return N2; // X and 0 -> 0 993 if (N2C->isAllOnesValue()) 994 return N1; // X and -1 -> X 995 996 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0 997 return getConstant(0, VT); 998 999 { 1000 uint64_t NotC2 = ~C2; 1001 if (VT != MVT::i64) 1002 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1; 1003 1004 if (MaskedValueIsZero(N1, NotC2, TLI)) 1005 return N1; // if (X & ~C2) -> 0, the and is redundant 1006 } 1007 1008 // FIXME: Should add a corresponding version of this for 1009 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which 1010 // we don't have yet. 1011 1012 // and (sign_extend_inreg x:16:32), 1 -> and x, 1 1013 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) { 1014 // If we are masking out the part of our input that was extended, just 1015 // mask the input to the extension directly. 1016 unsigned ExtendBits = 1017 MVT::getSizeInBits(cast<MVTSDNode>(N1)->getExtraValueType()); 1018 if ((C2 & (~0ULL << ExtendBits)) == 0) 1019 return getNode(ISD::AND, VT, N1.getOperand(0), N2); 1020 } 1021 break; 1022 case ISD::OR: 1023 if (!C2)return N1; // X or 0 -> X 1024 if (N2C->isAllOnesValue()) 1025 return N2; // X or -1 -> -1 1026 break; 1027 case ISD::XOR: 1028 if (!C2) return N1; // X xor 0 -> X 1029 if (N2C->isAllOnesValue()) { 1030 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1.Val)){ 1031 // !(X op Y) -> (X !op Y) 1032 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType()); 1033 return getSetCC(ISD::getSetCCInverse(SetCC->getCondition(),isInteger), 1034 SetCC->getValueType(0), 1035 SetCC->getOperand(0), SetCC->getOperand(1)); 1036 } else if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) { 1037 SDNode *Op = N1.Val; 1038 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible 1039 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible 1040 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1); 1041 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) { 1042 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS 1043 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS 1044 if (Op->getOpcode() == ISD::AND) 1045 return getNode(ISD::OR, VT, LHS, RHS); 1046 return getNode(ISD::AND, VT, LHS, RHS); 1047 } 1048 } 1049 // X xor -1 -> not(x) ? 1050 } 1051 break; 1052 } 1053 1054 // Reassociate ((X op C1) op C2) if possible. 1055 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode)) 1056 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1))) 1057 return getNode(Opcode, VT, N1.Val->getOperand(0), 1058 getNode(Opcode, VT, N2, N1.Val->getOperand(1))); 1059 } 1060 1061 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 1062 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 1063 if (N1CFP) 1064 if (N2CFP) { 1065 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 1066 switch (Opcode) { 1067 case ISD::ADD: return getConstantFP(C1 + C2, VT); 1068 case ISD::SUB: return getConstantFP(C1 - C2, VT); 1069 case ISD::MUL: return getConstantFP(C1 * C2, VT); 1070 case ISD::SDIV: 1071 if (C2) return getConstantFP(C1 / C2, VT); 1072 break; 1073 case ISD::SREM : 1074 if (C2) return getConstantFP(fmod(C1, C2), VT); 1075 break; 1076 default: break; 1077 } 1078 1079 } else { // Cannonicalize constant to RHS if commutative 1080 if (isCommutativeBinOp(Opcode)) { 1081 std::swap(N1CFP, N2CFP); 1082 std::swap(N1, N2); 1083 } 1084 } 1085 1086 // Finally, fold operations that do not require constants. 1087 switch (Opcode) { 1088 case ISD::TokenFactor: 1089 if (N1.getOpcode() == ISD::EntryToken) 1090 return N2; 1091 if (N2.getOpcode() == ISD::EntryToken) 1092 return N1; 1093 break; 1094 1095 case ISD::AND: 1096 case ISD::OR: 1097 if (SetCCSDNode *LHS = dyn_cast<SetCCSDNode>(N1.Val)) 1098 if (SetCCSDNode *RHS = dyn_cast<SetCCSDNode>(N2.Val)) { 1099 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0); 1100 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1); 1101 ISD::CondCode Op2 = RHS->getCondition(); 1102 1103 if (LR == RR && isa<ConstantSDNode>(LR) && 1104 Op2 == LHS->getCondition() && MVT::isInteger(LL.getValueType())) { 1105 // (X != 0) | (Y != 0) -> (X|Y != 0) 1106 // (X == 0) & (Y == 0) -> (X|Y == 0) 1107 // (X < 0) | (Y < 0) -> (X|Y < 0) 1108 if (cast<ConstantSDNode>(LR)->getValue() == 0 && 1109 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) || 1110 (Op2 == ISD::SETNE && Opcode == ISD::OR) || 1111 (Op2 == ISD::SETLT && Opcode == ISD::OR))) 1112 return getSetCC(Op2, VT, 1113 getNode(ISD::OR, LR.getValueType(), LL, RL), LR); 1114 1115 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) { 1116 // (X == -1) & (Y == -1) -> (X&Y == -1) 1117 // (X != -1) | (Y != -1) -> (X&Y != -1) 1118 // (X > -1) | (Y > -1) -> (X&Y > -1) 1119 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) || 1120 (Opcode == ISD::OR && Op2 == ISD::SETNE) || 1121 (Opcode == ISD::OR && Op2 == ISD::SETGT)) 1122 return getSetCC(Op2, VT, 1123 getNode(ISD::AND, LR.getValueType(), LL, RL), LR); 1124 // (X > -1) & (Y > -1) -> (X|Y > -1) 1125 if (Opcode == ISD::AND && Op2 == ISD::SETGT) 1126 return getSetCC(Op2, VT, 1127 getNode(ISD::OR, LR.getValueType(), LL, RL), LR); 1128 } 1129 } 1130 1131 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y) 1132 if (LL == RR && LR == RL) { 1133 Op2 = ISD::getSetCCSwappedOperands(Op2); 1134 goto MatchedBackwards; 1135 } 1136 1137 if (LL == RL && LR == RR) { 1138 MatchedBackwards: 1139 ISD::CondCode Result; 1140 bool isInteger = MVT::isInteger(LL.getValueType()); 1141 if (Opcode == ISD::OR) 1142 Result = ISD::getSetCCOrOperation(LHS->getCondition(), Op2, 1143 isInteger); 1144 else 1145 Result = ISD::getSetCCAndOperation(LHS->getCondition(), Op2, 1146 isInteger); 1147 if (Result != ISD::SETCC_INVALID) 1148 return getSetCC(Result, LHS->getValueType(0), LL, LR); 1149 } 1150 } 1151 1152 // and/or zext(a), zext(b) -> zext(and/or a, b) 1153 if (N1.getOpcode() == ISD::ZERO_EXTEND && 1154 N2.getOpcode() == ISD::ZERO_EXTEND && 1155 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType()) 1156 return getNode(ISD::ZERO_EXTEND, VT, 1157 getNode(Opcode, N1.getOperand(0).getValueType(), 1158 N1.getOperand(0), N2.getOperand(0))); 1159 break; 1160 case ISD::XOR: 1161 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0 1162 break; 1163 case ISD::ADD: 1164 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B 1165 return getNode(ISD::SUB, VT, N1, N2.getOperand(0)); 1166 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A 1167 return getNode(ISD::SUB, VT, N2, N1.getOperand(0)); 1168 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) && 1169 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0) 1170 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A 1171 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) && 1172 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0) 1173 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B 1174 break; 1175 case ISD::SUB: 1176 if (N1.getOpcode() == ISD::ADD) { 1177 if (N1.Val->getOperand(0) == N2) 1178 return N1.Val->getOperand(1); // (A+B)-A == B 1179 if (N1.Val->getOperand(1) == N2) 1180 return N1.Val->getOperand(0); // (A+B)-B == A 1181 } 1182 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B 1183 return getNode(ISD::ADD, VT, N1, N2.getOperand(0)); 1184 break; 1185 // FIXME: figure out how to safely handle things like 1186 // int foo(int x) { return 1 << (x & 255); } 1187 // int bar() { return foo(256); } 1188#if 0 1189 case ISD::SHL: 1190 case ISD::SRL: 1191 case ISD::SRA: 1192 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 1193 cast<MVTSDNode>(N2)->getExtraValueType() != MVT::i1) 1194 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1195 else if (N2.getOpcode() == ISD::AND) 1196 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 1197 // If the and is only masking out bits that cannot effect the shift, 1198 // eliminate the and. 1199 unsigned NumBits = MVT::getSizeInBits(VT); 1200 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1201 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1202 } 1203 break; 1204#endif 1205 } 1206 1207 // Memoize this node if possible. 1208 SDNode *N; 1209 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END) { 1210 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 1211 if (BON) return SDOperand(BON, 0); 1212 1213 BON = N = new SDNode(Opcode, N1, N2); 1214 } else { 1215 N = new SDNode(Opcode, N1, N2); 1216 } 1217 1218 1219 if (Opcode != ISD::READPORT && Opcode != ISD::READIO) 1220 N->setValueTypes(VT); 1221 else 1222 N->setValueTypes(VT, MVT::Other); 1223 1224 AllNodes.push_back(N); 1225 return SDOperand(N, 0); 1226} 1227 1228// setAdjCallChain - This method changes the token chain of an 1229// CALLSEQ_START/END node to be the specified operand. 1230void SDNode::setAdjCallChain(SDOperand N) { 1231 assert(N.getValueType() == MVT::Other); 1232 assert((getOpcode() == ISD::CALLSEQ_START || 1233 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); 1234 1235 Operands[0].Val->removeUser(this); 1236 Operands[0] = N; 1237 N.Val->Uses.push_back(this); 1238} 1239 1240 1241 1242SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 1243 SDOperand Chain, SDOperand Ptr, 1244 SDOperand SV) { 1245 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 1246 if (N) return SDOperand(N, 0); 1247 N = new SDNode(ISD::LOAD, Chain, Ptr, SV); 1248 1249 // Loads have a token chain. 1250 N->setValueTypes(VT, MVT::Other); 1251 AllNodes.push_back(N); 1252 return SDOperand(N, 0); 1253} 1254 1255SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1256 SDOperand N1, SDOperand N2, SDOperand N3) { 1257 // Perform various simplifications. 1258 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1259 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1260 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1261 switch (Opcode) { 1262 case ISD::SELECT: 1263 if (N1C) 1264 if (N1C->getValue()) 1265 return N2; // select true, X, Y -> X 1266 else 1267 return N3; // select false, X, Y -> Y 1268 1269 if (N2 == N3) return N2; // select C, X, X -> X 1270 1271 if (VT == MVT::i1) { // Boolean SELECT 1272 if (N2C) { 1273 if (N2C->getValue()) // select C, 1, X -> C | X 1274 return getNode(ISD::OR, VT, N1, N3); 1275 else // select C, 0, X -> ~C & X 1276 return getNode(ISD::AND, VT, 1277 getNode(ISD::XOR, N1.getValueType(), N1, 1278 getConstant(1, N1.getValueType())), N3); 1279 } else if (N3C) { 1280 if (N3C->getValue()) // select C, X, 1 -> ~C | X 1281 return getNode(ISD::OR, VT, 1282 getNode(ISD::XOR, N1.getValueType(), N1, 1283 getConstant(1, N1.getValueType())), N2); 1284 else // select C, X, 0 -> C & X 1285 return getNode(ISD::AND, VT, N1, N2); 1286 } 1287 1288 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y 1289 return getNode(ISD::OR, VT, N1, N3); 1290 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y 1291 return getNode(ISD::AND, VT, N1, N2); 1292 } 1293 1294 // If this is a selectcc, check to see if we can simplify the result. 1295 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1)) { 1296 if (ConstantFPSDNode *CFP = 1297 dyn_cast<ConstantFPSDNode>(SetCC->getOperand(1))) 1298 if (CFP->getValue() == 0.0) { // Allow either -0.0 or 0.0 1299 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 1300 if ((SetCC->getCondition() == ISD::SETGE || 1301 SetCC->getCondition() == ISD::SETGT) && 1302 N2 == SetCC->getOperand(0) && N3.getOpcode() == ISD::FNEG && 1303 N3.getOperand(0) == N2) 1304 return getNode(ISD::FABS, VT, N2); 1305 1306 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 1307 if ((SetCC->getCondition() == ISD::SETLT || 1308 SetCC->getCondition() == ISD::SETLE) && 1309 N3 == SetCC->getOperand(0) && N2.getOpcode() == ISD::FNEG && 1310 N2.getOperand(0) == N3) 1311 return getNode(ISD::FABS, VT, N3); 1312 } 1313 // select (setlt X, 0), A, 0 -> and (sra X, size(X)-1), A 1314 if (ConstantSDNode *CN = 1315 dyn_cast<ConstantSDNode>(SetCC->getOperand(1))) 1316 if (CN->getValue() == 0 && N3C && N3C->getValue() == 0) 1317 if (SetCC->getCondition() == ISD::SETLT) { 1318 MVT::ValueType XType = SetCC->getOperand(0).getValueType(); 1319 MVT::ValueType AType = N2.getValueType(); 1320 if (XType >= AType) { 1321 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a 1322 // single-bit constant. FIXME: remove once the dag combiner 1323 // exists. 1324 if (ConstantSDNode *AC = dyn_cast<ConstantSDNode>(N2)) 1325 if ((AC->getValue() & (AC->getValue()-1)) == 0) { 1326 unsigned ShCtV = ExactLog2(AC->getValue()); 1327 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1; 1328 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy()); 1329 SDOperand Shift = getNode(ISD::SRL, XType, 1330 SetCC->getOperand(0), ShCt); 1331 if (XType > AType) 1332 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1333 return getNode(ISD::AND, AType, Shift, N2); 1334 } 1335 1336 1337 SDOperand Shift = getNode(ISD::SRA, XType, SetCC->getOperand(0), 1338 getConstant(MVT::getSizeInBits(XType)-1, 1339 TLI.getShiftAmountTy())); 1340 if (XType > AType) 1341 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1342 return getNode(ISD::AND, AType, Shift, N2); 1343 } 1344 } 1345 } 1346 break; 1347 case ISD::BRCOND: 1348 if (N2C) 1349 if (N2C->getValue()) // Unconditional branch 1350 return getNode(ISD::BR, MVT::Other, N1, N3); 1351 else 1352 return N1; // Never-taken branch 1353 break; 1354 } 1355 1356 std::vector<SDOperand> Ops; 1357 Ops.reserve(3); 1358 Ops.push_back(N1); 1359 Ops.push_back(N2); 1360 Ops.push_back(N3); 1361 1362 // Memoize nodes. 1363 SDNode *&N = OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1364 if (N) return SDOperand(N, 0); 1365 1366 N = new SDNode(Opcode, N1, N2, N3); 1367 N->setValueTypes(VT); 1368 AllNodes.push_back(N); 1369 return SDOperand(N, 0); 1370} 1371 1372SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1373 SDOperand N1, SDOperand N2, SDOperand N3, 1374 SDOperand N4) { 1375 std::vector<SDOperand> Ops; 1376 Ops.reserve(4); 1377 Ops.push_back(N1); 1378 Ops.push_back(N2); 1379 Ops.push_back(N3); 1380 Ops.push_back(N4); 1381 return getNode(Opcode, VT, Ops); 1382} 1383 1384SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) { 1385 assert((!V || isa<PointerType>(V->getType())) && 1386 "SrcValue is not a pointer?"); 1387 SDNode *&N = ValueNodes[std::make_pair(V, Offset)]; 1388 if (N) return SDOperand(N, 0); 1389 1390 N = new SrcValueSDNode(V, Offset); 1391 AllNodes.push_back(N); 1392 return SDOperand(N, 0); 1393} 1394 1395SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1396 std::vector<SDOperand> &Ops) { 1397 switch (Ops.size()) { 1398 case 0: return getNode(Opcode, VT); 1399 case 1: return getNode(Opcode, VT, Ops[0]); 1400 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 1401 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 1402 default: break; 1403 } 1404 1405 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val); 1406 switch (Opcode) { 1407 default: break; 1408 case ISD::BRCONDTWOWAY: 1409 if (N1C) 1410 if (N1C->getValue()) // Unconditional branch to true dest. 1411 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]); 1412 else // Unconditional branch to false dest. 1413 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]); 1414 break; 1415 } 1416 1417 // Memoize nodes. 1418 SDNode *&N = OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1419 if (N) return SDOperand(N, 0); 1420 N = new SDNode(Opcode, Ops); 1421 N->setValueTypes(VT); 1422 AllNodes.push_back(N); 1423 return SDOperand(N, 0); 1424} 1425 1426SDOperand SelectionDAG::getNode(unsigned Opcode, 1427 std::vector<MVT::ValueType> &ResultTys, 1428 std::vector<SDOperand> &Ops) { 1429 if (ResultTys.size() == 1) 1430 return getNode(Opcode, ResultTys[0], Ops); 1431 1432 // FIXME: figure out how to safely handle things like 1433 // int foo(int x) { return 1 << (x & 255); } 1434 // int bar() { return foo(256); } 1435#if 0 1436 switch (Opcode) { 1437 case ISD::SRA_PARTS: 1438 case ISD::SRL_PARTS: 1439 case ISD::SHL_PARTS: 1440 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 1441 cast<MVTSDNode>(N3)->getExtraValueType() != MVT::i1) 1442 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1443 else if (N3.getOpcode() == ISD::AND) 1444 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 1445 // If the and is only masking out bits that cannot effect the shift, 1446 // eliminate the and. 1447 unsigned NumBits = MVT::getSizeInBits(VT)*2; 1448 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1449 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1450 } 1451 break; 1452 } 1453#endif 1454 1455 // Memoize the node. 1456 SDNode *&N = ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, 1457 Ops))]; 1458 if (N) return SDOperand(N, 0); 1459 N = new SDNode(Opcode, Ops); 1460 N->setValueTypes(ResultTys); 1461 AllNodes.push_back(N); 1462 return SDOperand(N, 0); 1463} 1464 1465 1466SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1467 MVT::ValueType EVT) { 1468 1469 switch (Opcode) { 1470 default: assert(0 && "Bad opcode for this accessor!"); 1471 case ISD::FP_ROUND_INREG: 1472 assert(VT == N1.getValueType() && "Not an inreg round!"); 1473 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 1474 "Cannot FP_ROUND_INREG integer types"); 1475 if (EVT == VT) return N1; // Not actually rounding 1476 assert(EVT < VT && "Not rounding down!"); 1477 1478 if (isa<ConstantFPSDNode>(N1)) 1479 return getNode(ISD::FP_EXTEND, VT, getNode(ISD::FP_ROUND, EVT, N1)); 1480 break; 1481 case ISD::SIGN_EXTEND_INREG: 1482 assert(VT == N1.getValueType() && "Not an inreg extend!"); 1483 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 1484 "Cannot *_EXTEND_INREG FP types"); 1485 if (EVT == VT) return N1; // Not actually extending 1486 assert(EVT < VT && "Not extending!"); 1487 1488 // Extending a constant? Just return the extended constant. 1489 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 1490 SDOperand Tmp = getNode(ISD::TRUNCATE, EVT, N1); 1491 return getNode(ISD::SIGN_EXTEND, VT, Tmp); 1492 } 1493 1494 // If we are sign extending an extension, use the original source. 1495 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) 1496 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT) 1497 return N1; 1498 1499 // If we are sign extending a sextload, return just the load. 1500 if (N1.getOpcode() == ISD::SEXTLOAD && Opcode == ISD::SIGN_EXTEND_INREG) 1501 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT) 1502 return N1; 1503 1504 // If we are extending the result of a setcc, and we already know the 1505 // contents of the top bits, eliminate the extension. 1506 if (N1.getOpcode() == ISD::SETCC && 1507 TLI.getSetCCResultContents() == 1508 TargetLowering::ZeroOrNegativeOneSetCCResult) 1509 return N1; 1510 1511 // If we are sign extending the result of an (and X, C) operation, and we 1512 // know the extended bits are zeros already, don't do the extend. 1513 if (N1.getOpcode() == ISD::AND) 1514 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1515 uint64_t Mask = N1C->getValue(); 1516 unsigned NumBits = MVT::getSizeInBits(EVT); 1517 if ((Mask & (~0ULL << (NumBits-1))) == 0) 1518 return N1; 1519 } 1520 break; 1521 } 1522 1523 EVTStruct NN; 1524 NN.Opcode = Opcode; 1525 NN.VT = VT; 1526 NN.EVT = EVT; 1527 NN.Ops.push_back(N1); 1528 1529 SDNode *&N = MVTSDNodes[NN]; 1530 if (N) return SDOperand(N, 0); 1531 N = new MVTSDNode(Opcode, VT, N1, EVT); 1532 AllNodes.push_back(N); 1533 return SDOperand(N, 0); 1534} 1535 1536SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1537 SDOperand N2, SDOperand N3, MVT::ValueType EVT) { 1538 switch (Opcode) { 1539 default: assert(0 && "Bad opcode for this accessor!"); 1540 case ISD::EXTLOAD: 1541 case ISD::SEXTLOAD: 1542 case ISD::ZEXTLOAD: 1543 // If they are asking for an extending load from/to the same thing, return a 1544 // normal load. 1545 if (VT == EVT) 1546 return getLoad(VT, N1, N2, N3); 1547 assert(EVT < VT && "Should only be an extending load, not truncating!"); 1548 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(VT)) && 1549 "Cannot sign/zero extend a FP load!"); 1550 assert(MVT::isInteger(VT) == MVT::isInteger(EVT) && 1551 "Cannot convert from FP to Int or Int -> FP!"); 1552 break; 1553 } 1554 1555 EVTStruct NN; 1556 NN.Opcode = Opcode; 1557 NN.VT = VT; 1558 NN.EVT = EVT; 1559 NN.Ops.push_back(N1); 1560 NN.Ops.push_back(N2); 1561 NN.Ops.push_back(N3); 1562 1563 SDNode *&N = MVTSDNodes[NN]; 1564 if (N) return SDOperand(N, 0); 1565 N = new MVTSDNode(Opcode, VT, MVT::Other, N1, N2, N3, EVT); 1566 AllNodes.push_back(N); 1567 return SDOperand(N, 0); 1568} 1569 1570SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1571 SDOperand N2, SDOperand N3, SDOperand N4, 1572 MVT::ValueType EVT) { 1573 switch (Opcode) { 1574 default: assert(0 && "Bad opcode for this accessor!"); 1575 case ISD::TRUNCSTORE: 1576#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1577 // If this is a truncating store of a constant, convert to the desired type 1578 // and store it instead. 1579 if (isa<Constant>(N1)) { 1580 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1581 if (isa<Constant>(Op)) 1582 N1 = Op; 1583 } 1584 // Also for ConstantFP? 1585#endif 1586 if (N1.getValueType() == EVT) // Normal store? 1587 return getNode(ISD::STORE, VT, N1, N2, N3, N4); 1588 assert(N2.getValueType() > EVT && "Not a truncation?"); 1589 assert(MVT::isInteger(N2.getValueType()) == MVT::isInteger(EVT) && 1590 "Can't do FP-INT conversion!"); 1591 break; 1592 } 1593 1594 EVTStruct NN; 1595 NN.Opcode = Opcode; 1596 NN.VT = VT; 1597 NN.EVT = EVT; 1598 NN.Ops.push_back(N1); 1599 NN.Ops.push_back(N2); 1600 NN.Ops.push_back(N3); 1601 NN.Ops.push_back(N4); 1602 1603 SDNode *&N = MVTSDNodes[NN]; 1604 if (N) return SDOperand(N, 0); 1605 N = new MVTSDNode(Opcode, VT, N1, N2, N3, N4, EVT); 1606 AllNodes.push_back(N); 1607 return SDOperand(N, 0); 1608} 1609 1610 1611/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 1612/// indicated value. This method ignores uses of other values defined by this 1613/// operation. 1614bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 1615 assert(Value < getNumValues() && "Bad value!"); 1616 1617 // If there is only one value, this is easy. 1618 if (getNumValues() == 1) 1619 return use_size() == NUses; 1620 if (Uses.size() < NUses) return false; 1621 1622 SDOperand TheValue(this, Value); 1623 1624 std::set<SDNode*> UsersHandled; 1625 1626 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 1627 UI != E; ++UI) { 1628 SDNode *User = *UI; 1629 if (User->getNumOperands() == 1 || 1630 UsersHandled.insert(User).second) // First time we've seen this? 1631 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 1632 if (User->getOperand(i) == TheValue) { 1633 if (NUses == 0) 1634 return false; // too many uses 1635 --NUses; 1636 } 1637 } 1638 1639 // Found exactly the right number of uses? 1640 return NUses == 0; 1641} 1642 1643 1644const char *SDNode::getOperationName() const { 1645 switch (getOpcode()) { 1646 default: return "<<Unknown>>"; 1647 case ISD::PCMARKER: return "PCMarker"; 1648 case ISD::SRCVALUE: return "SrcValue"; 1649 case ISD::EntryToken: return "EntryToken"; 1650 case ISD::TokenFactor: return "TokenFactor"; 1651 case ISD::Constant: return "Constant"; 1652 case ISD::ConstantFP: return "ConstantFP"; 1653 case ISD::GlobalAddress: return "GlobalAddress"; 1654 case ISD::FrameIndex: return "FrameIndex"; 1655 case ISD::BasicBlock: return "BasicBlock"; 1656 case ISD::ExternalSymbol: return "ExternalSymbol"; 1657 case ISD::ConstantPool: return "ConstantPoolIndex"; 1658 case ISD::CopyToReg: return "CopyToReg"; 1659 case ISD::CopyFromReg: return "CopyFromReg"; 1660 case ISD::ImplicitDef: return "ImplicitDef"; 1661 case ISD::UNDEF: return "undef"; 1662 1663 // Unary operators 1664 case ISD::FABS: return "fabs"; 1665 case ISD::FNEG: return "fneg"; 1666 case ISD::FSQRT: return "fsqrt"; 1667 case ISD::FSIN: return "fsin"; 1668 case ISD::FCOS: return "fcos"; 1669 1670 // Binary operators 1671 case ISD::ADD: return "add"; 1672 case ISD::SUB: return "sub"; 1673 case ISD::MUL: return "mul"; 1674 case ISD::MULHU: return "mulhu"; 1675 case ISD::MULHS: return "mulhs"; 1676 case ISD::SDIV: return "sdiv"; 1677 case ISD::UDIV: return "udiv"; 1678 case ISD::SREM: return "srem"; 1679 case ISD::UREM: return "urem"; 1680 case ISD::AND: return "and"; 1681 case ISD::OR: return "or"; 1682 case ISD::XOR: return "xor"; 1683 case ISD::SHL: return "shl"; 1684 case ISD::SRA: return "sra"; 1685 case ISD::SRL: return "srl"; 1686 1687 case ISD::SELECT: return "select"; 1688 case ISD::ADD_PARTS: return "add_parts"; 1689 case ISD::SUB_PARTS: return "sub_parts"; 1690 case ISD::SHL_PARTS: return "shl_parts"; 1691 case ISD::SRA_PARTS: return "sra_parts"; 1692 case ISD::SRL_PARTS: return "srl_parts"; 1693 1694 // Conversion operators. 1695 case ISD::SIGN_EXTEND: return "sign_extend"; 1696 case ISD::ZERO_EXTEND: return "zero_extend"; 1697 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 1698 case ISD::TRUNCATE: return "truncate"; 1699 case ISD::FP_ROUND: return "fp_round"; 1700 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 1701 case ISD::FP_EXTEND: return "fp_extend"; 1702 1703 case ISD::SINT_TO_FP: return "sint_to_fp"; 1704 case ISD::UINT_TO_FP: return "uint_to_fp"; 1705 case ISD::FP_TO_SINT: return "fp_to_sint"; 1706 case ISD::FP_TO_UINT: return "fp_to_uint"; 1707 1708 // Control flow instructions 1709 case ISD::BR: return "br"; 1710 case ISD::BRCOND: return "brcond"; 1711 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 1712 case ISD::RET: return "ret"; 1713 case ISD::CALL: return "call"; 1714 case ISD::TAILCALL:return "tailcall"; 1715 case ISD::CALLSEQ_START: return "callseq_start"; 1716 case ISD::CALLSEQ_END: return "callseq_end"; 1717 1718 // Other operators 1719 case ISD::LOAD: return "load"; 1720 case ISD::STORE: return "store"; 1721 case ISD::EXTLOAD: return "extload"; 1722 case ISD::SEXTLOAD: return "sextload"; 1723 case ISD::ZEXTLOAD: return "zextload"; 1724 case ISD::TRUNCSTORE: return "truncstore"; 1725 1726 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 1727 case ISD::EXTRACT_ELEMENT: return "extract_element"; 1728 case ISD::BUILD_PAIR: return "build_pair"; 1729 case ISD::MEMSET: return "memset"; 1730 case ISD::MEMCPY: return "memcpy"; 1731 case ISD::MEMMOVE: return "memmove"; 1732 1733 // Bit counting 1734 case ISD::CTPOP: return "ctpop"; 1735 case ISD::CTTZ: return "cttz"; 1736 case ISD::CTLZ: return "ctlz"; 1737 1738 // IO Intrinsics 1739 case ISD::READPORT: return "readport"; 1740 case ISD::WRITEPORT: return "writeport"; 1741 case ISD::READIO: return "readio"; 1742 case ISD::WRITEIO: return "writeio"; 1743 1744 case ISD::SETCC: 1745 const SetCCSDNode *SetCC = cast<SetCCSDNode>(this); 1746 switch (SetCC->getCondition()) { 1747 default: assert(0 && "Unknown setcc condition!"); 1748 case ISD::SETOEQ: return "setcc:setoeq"; 1749 case ISD::SETOGT: return "setcc:setogt"; 1750 case ISD::SETOGE: return "setcc:setoge"; 1751 case ISD::SETOLT: return "setcc:setolt"; 1752 case ISD::SETOLE: return "setcc:setole"; 1753 case ISD::SETONE: return "setcc:setone"; 1754 1755 case ISD::SETO: return "setcc:seto"; 1756 case ISD::SETUO: return "setcc:setuo"; 1757 case ISD::SETUEQ: return "setcc:setue"; 1758 case ISD::SETUGT: return "setcc:setugt"; 1759 case ISD::SETUGE: return "setcc:setuge"; 1760 case ISD::SETULT: return "setcc:setult"; 1761 case ISD::SETULE: return "setcc:setule"; 1762 case ISD::SETUNE: return "setcc:setune"; 1763 1764 case ISD::SETEQ: return "setcc:seteq"; 1765 case ISD::SETGT: return "setcc:setgt"; 1766 case ISD::SETGE: return "setcc:setge"; 1767 case ISD::SETLT: return "setcc:setlt"; 1768 case ISD::SETLE: return "setcc:setle"; 1769 case ISD::SETNE: return "setcc:setne"; 1770 } 1771 } 1772} 1773 1774void SDNode::dump() const { 1775 std::cerr << (void*)this << ": "; 1776 1777 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 1778 if (i) std::cerr << ","; 1779 if (getValueType(i) == MVT::Other) 1780 std::cerr << "ch"; 1781 else 1782 std::cerr << MVT::getValueTypeString(getValueType(i)); 1783 } 1784 std::cerr << " = " << getOperationName(); 1785 1786 std::cerr << " "; 1787 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1788 if (i) std::cerr << ", "; 1789 std::cerr << (void*)getOperand(i).Val; 1790 if (unsigned RN = getOperand(i).ResNo) 1791 std::cerr << ":" << RN; 1792 } 1793 1794 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 1795 std::cerr << "<" << CSDN->getValue() << ">"; 1796 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 1797 std::cerr << "<" << CSDN->getValue() << ">"; 1798 } else if (const GlobalAddressSDNode *GADN = 1799 dyn_cast<GlobalAddressSDNode>(this)) { 1800 std::cerr << "<"; 1801 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 1802 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 1803 std::cerr << "<" << FIDN->getIndex() << ">"; 1804 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 1805 std::cerr << "<" << CP->getIndex() << ">"; 1806 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 1807 std::cerr << "<"; 1808 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 1809 if (LBB) 1810 std::cerr << LBB->getName() << " "; 1811 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 1812 } else if (const RegSDNode *C2V = dyn_cast<RegSDNode>(this)) { 1813 std::cerr << "<reg #" << C2V->getReg() << ">"; 1814 } else if (const ExternalSymbolSDNode *ES = 1815 dyn_cast<ExternalSymbolSDNode>(this)) { 1816 std::cerr << "'" << ES->getSymbol() << "'"; 1817 } else if (const MVTSDNode *M = dyn_cast<MVTSDNode>(this)) { 1818 std::cerr << " - Ty = " << MVT::getValueTypeString(M->getExtraValueType()); 1819 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 1820 if (M->getValue()) 1821 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">"; 1822 else 1823 std::cerr << "<null:" << M->getOffset() << ">"; 1824 } 1825} 1826 1827static void DumpNodes(SDNode *N, unsigned indent) { 1828 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 1829 if (N->getOperand(i).Val->hasOneUse()) 1830 DumpNodes(N->getOperand(i).Val, indent+2); 1831 else 1832 std::cerr << "\n" << std::string(indent+2, ' ') 1833 << (void*)N->getOperand(i).Val << ": <multiple use>"; 1834 1835 1836 std::cerr << "\n" << std::string(indent, ' '); 1837 N->dump(); 1838} 1839 1840void SelectionDAG::dump() const { 1841 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 1842 std::vector<SDNode*> Nodes(AllNodes); 1843 std::sort(Nodes.begin(), Nodes.end()); 1844 1845 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 1846 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 1847 DumpNodes(Nodes[i], 2); 1848 } 1849 1850 DumpNodes(getRoot().Val, 2); 1851 1852 std::cerr << "\n\n"; 1853} 1854 1855