SelectionDAG.cpp revision 3c6910153c2913ea3e566bbbeb4070f15bfae2f4
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This implements the SelectionDAG class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/SelectionDAG.h"
15#include "llvm/Constants.h"
16#include "llvm/GlobalValue.h"
17#include "llvm/Assembly/Writer.h"
18#include "llvm/CodeGen/MachineBasicBlock.h"
19#include "llvm/Target/TargetLowering.h"
20#include <iostream>
21#include <set>
22#include <cmath>
23#include <algorithm>
24using namespace llvm;
25
26static bool isCommutativeBinOp(unsigned Opcode) {
27  switch (Opcode) {
28  case ISD::ADD:
29  case ISD::MUL:
30  case ISD::AND:
31  case ISD::OR:
32  case ISD::XOR: return true;
33  default: return false; // FIXME: Need commutative info for user ops!
34  }
35}
36
37static bool isAssociativeBinOp(unsigned Opcode) {
38  switch (Opcode) {
39  case ISD::ADD:
40  case ISD::MUL:
41  case ISD::AND:
42  case ISD::OR:
43  case ISD::XOR: return true;
44  default: return false; // FIXME: Need associative info for user ops!
45  }
46}
47
48static unsigned ExactLog2(uint64_t Val) {
49  unsigned Count = 0;
50  while (Val != 1) {
51    Val >>= 1;
52    ++Count;
53  }
54  return Count;
55}
56
57// isInvertibleForFree - Return true if there is no cost to emitting the logical
58// inverse of this node.
59static bool isInvertibleForFree(SDOperand N) {
60  if (isa<ConstantSDNode>(N.Val)) return true;
61  if (isa<SetCCSDNode>(N.Val) && N.Val->hasOneUse())
62    return true;
63  return false;
64}
65
66
67/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
68/// when given the operation for (X op Y).
69ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
70  // To perform this operation, we just need to swap the L and G bits of the
71  // operation.
72  unsigned OldL = (Operation >> 2) & 1;
73  unsigned OldG = (Operation >> 1) & 1;
74  return ISD::CondCode((Operation & ~6) |  // Keep the N, U, E bits
75                       (OldL << 1) |       // New G bit
76                       (OldG << 2));        // New L bit.
77}
78
79/// getSetCCInverse - Return the operation corresponding to !(X op Y), where
80/// 'op' is a valid SetCC operation.
81ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
82  unsigned Operation = Op;
83  if (isInteger)
84    Operation ^= 7;   // Flip L, G, E bits, but not U.
85  else
86    Operation ^= 15;  // Flip all of the condition bits.
87  if (Operation > ISD::SETTRUE2)
88    Operation &= ~8;     // Don't let N and U bits get set.
89  return ISD::CondCode(Operation);
90}
91
92
93/// isSignedOp - For an integer comparison, return 1 if the comparison is a
94/// signed operation and 2 if the result is an unsigned comparison.  Return zero
95/// if the operation does not depend on the sign of the input (setne and seteq).
96static int isSignedOp(ISD::CondCode Opcode) {
97  switch (Opcode) {
98  default: assert(0 && "Illegal integer setcc operation!");
99  case ISD::SETEQ:
100  case ISD::SETNE: return 0;
101  case ISD::SETLT:
102  case ISD::SETLE:
103  case ISD::SETGT:
104  case ISD::SETGE: return 1;
105  case ISD::SETULT:
106  case ISD::SETULE:
107  case ISD::SETUGT:
108  case ISD::SETUGE: return 2;
109  }
110}
111
112/// getSetCCOrOperation - Return the result of a logical OR between different
113/// comparisons of identical values: ((X op1 Y) | (X op2 Y)).  This function
114/// returns SETCC_INVALID if it is not possible to represent the resultant
115/// comparison.
116ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
117                                       bool isInteger) {
118  if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
119    // Cannot fold a signed integer setcc with an unsigned integer setcc.
120    return ISD::SETCC_INVALID;
121
122  unsigned Op = Op1 | Op2;  // Combine all of the condition bits.
123
124  // If the N and U bits get set then the resultant comparison DOES suddenly
125  // care about orderedness, and is true when ordered.
126  if (Op > ISD::SETTRUE2)
127    Op &= ~16;     // Clear the N bit.
128  return ISD::CondCode(Op);
129}
130
131/// getSetCCAndOperation - Return the result of a logical AND between different
132/// comparisons of identical values: ((X op1 Y) & (X op2 Y)).  This
133/// function returns zero if it is not possible to represent the resultant
134/// comparison.
135ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
136                                        bool isInteger) {
137  if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
138    // Cannot fold a signed setcc with an unsigned setcc.
139    return ISD::SETCC_INVALID;
140
141  // Combine all of the condition bits.
142  return ISD::CondCode(Op1 & Op2);
143}
144
145const TargetMachine &SelectionDAG::getTarget() const {
146  return TLI.getTargetMachine();
147}
148
149
150/// RemoveDeadNodes - This method deletes all unreachable nodes in the
151/// SelectionDAG, including nodes (like loads) that have uses of their token
152/// chain but no other uses and no side effect.  If a node is passed in as an
153/// argument, it is used as the seed for node deletion.
154void SelectionDAG::RemoveDeadNodes(SDNode *N) {
155  std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end());
156
157  // Create a dummy node (which is not added to allnodes), that adds a reference
158  // to the root node, preventing it from being deleted.
159  SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot());
160
161  DeleteNodeIfDead(N, &AllNodeSet);
162
163 Restart:
164  unsigned NumNodes = AllNodeSet.size();
165  for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end();
166       I != E; ++I) {
167    // Try to delete this node.
168    DeleteNodeIfDead(*I, &AllNodeSet);
169
170    // If we actually deleted any nodes, do not use invalid iterators in
171    // AllNodeSet.
172    if (AllNodeSet.size() != NumNodes)
173      goto Restart;
174  }
175
176  // Restore AllNodes.
177  if (AllNodes.size() != NumNodes)
178    AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end());
179
180  // If the root changed (e.g. it was a dead load, update the root).
181  setRoot(DummyNode->getOperand(0));
182
183  // Now that we are done with the dummy node, delete it.
184  DummyNode->getOperand(0).Val->removeUser(DummyNode);
185  delete DummyNode;
186}
187
188void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) {
189  if (!N->use_empty())
190    return;
191
192  // Okay, we really are going to delete this node.  First take this out of the
193  // appropriate CSE map.
194  switch (N->getOpcode()) {
195  case ISD::Constant:
196    Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(),
197                                   N->getValueType(0)));
198    break;
199  case ISD::ConstantFP: {
200    union {
201      double DV;
202      uint64_t IV;
203    };
204    DV = cast<ConstantFPSDNode>(N)->getValue();
205    ConstantFPs.erase(std::make_pair(IV, N->getValueType(0)));
206    break;
207  }
208  case ISD::GlobalAddress:
209    GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal());
210    break;
211  case ISD::FrameIndex:
212    FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex());
213    break;
214  case ISD::ConstantPool:
215    ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->getIndex());
216    break;
217  case ISD::BasicBlock:
218    BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock());
219    break;
220  case ISD::ExternalSymbol:
221    ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
222    break;
223
224  case ISD::LOAD:
225    Loads.erase(std::make_pair(N->getOperand(1),
226                               std::make_pair(N->getOperand(0),
227                                              N->getValueType(0))));
228    break;
229  case ISD::SETCC:
230    SetCCs.erase(std::make_pair(std::make_pair(N->getOperand(0),
231                                               N->getOperand(1)),
232                                std::make_pair(
233                                     cast<SetCCSDNode>(N)->getCondition(),
234                                     N->getValueType(0))));
235    break;
236  case ISD::TRUNCSTORE:
237  case ISD::SIGN_EXTEND_INREG:
238  case ISD::FP_ROUND_INREG:
239  case ISD::EXTLOAD:
240  case ISD::SEXTLOAD:
241  case ISD::ZEXTLOAD: {
242    EVTStruct NN;
243    NN.Opcode = N->getOpcode();
244    NN.VT = N->getValueType(0);
245    NN.EVT = cast<MVTSDNode>(N)->getExtraValueType();
246    for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
247      NN.Ops.push_back(N->getOperand(i));
248    MVTSDNodes.erase(NN);
249    break;
250  }
251  default:
252    if (N->getNumOperands() == 1)
253      UnaryOps.erase(std::make_pair(N->getOpcode(),
254                                    std::make_pair(N->getOperand(0),
255                                                   N->getValueType(0))));
256    else if (N->getNumOperands() == 2)
257      BinaryOps.erase(std::make_pair(N->getOpcode(),
258                                     std::make_pair(N->getOperand(0),
259                                                    N->getOperand(1))));
260    break;
261  }
262
263  // Next, brutally remove the operand list.
264  while (!N->Operands.empty()) {
265    SDNode *O = N->Operands.back().Val;
266    N->Operands.pop_back();
267    O->removeUser(N);
268
269    // Now that we removed this operand, see if there are no uses of it left.
270    DeleteNodeIfDead(O, NodeSet);
271  }
272
273  // Remove the node from the nodes set and delete it.
274  std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet;
275  AllNodeSet.erase(N);
276
277  // Now that the node is gone, check to see if any of the operands of this node
278  // are dead now.
279  delete N;
280}
281
282
283SelectionDAG::~SelectionDAG() {
284  for (unsigned i = 0, e = AllNodes.size(); i != e; ++i)
285    delete AllNodes[i];
286}
287
288SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) {
289  if (Op.getValueType() == VT) return Op;
290  int64_t Imm = ~0ULL >> 64-MVT::getSizeInBits(VT);
291  return getNode(ISD::AND, Op.getValueType(), Op,
292                 getConstant(Imm, Op.getValueType()));
293}
294
295SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) {
296  assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
297  // Mask out any bits that are not valid for this constant.
298  if (VT != MVT::i64)
299    Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1;
300
301  SDNode *&N = Constants[std::make_pair(Val, VT)];
302  if (N) return SDOperand(N, 0);
303  N = new ConstantSDNode(Val, VT);
304  AllNodes.push_back(N);
305  return SDOperand(N, 0);
306}
307
308SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) {
309  assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!");
310  if (VT == MVT::f32)
311    Val = (float)Val;  // Mask out extra precision.
312
313  // Do the map lookup using the actual bit pattern for the floating point
314  // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
315  // we don't have issues with SNANs.
316  union {
317    double DV;
318    uint64_t IV;
319  };
320
321  DV = Val;
322
323  SDNode *&N = ConstantFPs[std::make_pair(IV, VT)];
324  if (N) return SDOperand(N, 0);
325  N = new ConstantFPSDNode(Val, VT);
326  AllNodes.push_back(N);
327  return SDOperand(N, 0);
328}
329
330
331
332SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
333                                         MVT::ValueType VT) {
334  SDNode *&N = GlobalValues[GV];
335  if (N) return SDOperand(N, 0);
336  N = new GlobalAddressSDNode(GV,VT);
337  AllNodes.push_back(N);
338  return SDOperand(N, 0);
339}
340
341SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) {
342  SDNode *&N = FrameIndices[FI];
343  if (N) return SDOperand(N, 0);
344  N = new FrameIndexSDNode(FI, VT);
345  AllNodes.push_back(N);
346  return SDOperand(N, 0);
347}
348
349SDOperand SelectionDAG::getConstantPool(unsigned CPIdx, MVT::ValueType VT) {
350  SDNode *N = ConstantPoolIndices[CPIdx];
351  if (N) return SDOperand(N, 0);
352  N = new ConstantPoolSDNode(CPIdx, VT);
353  AllNodes.push_back(N);
354  return SDOperand(N, 0);
355}
356
357SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
358  SDNode *&N = BBNodes[MBB];
359  if (N) return SDOperand(N, 0);
360  N = new BasicBlockSDNode(MBB);
361  AllNodes.push_back(N);
362  return SDOperand(N, 0);
363}
364
365SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) {
366  SDNode *&N = ExternalSymbols[Sym];
367  if (N) return SDOperand(N, 0);
368  N = new ExternalSymbolSDNode(Sym, VT);
369  AllNodes.push_back(N);
370  return SDOperand(N, 0);
371}
372
373SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT,
374                                 SDOperand N1, SDOperand N2) {
375  // These setcc operations always fold.
376  switch (Cond) {
377  default: break;
378  case ISD::SETFALSE:
379  case ISD::SETFALSE2: return getConstant(0, VT);
380  case ISD::SETTRUE:
381  case ISD::SETTRUE2:  return getConstant(1, VT);
382  }
383
384  if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
385    uint64_t C2 = N2C->getValue();
386    if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
387      uint64_t C1 = N1C->getValue();
388
389      // Sign extend the operands if required
390      if (ISD::isSignedIntSetCC(Cond)) {
391        C1 = N1C->getSignExtended();
392        C2 = N2C->getSignExtended();
393      }
394
395      switch (Cond) {
396      default: assert(0 && "Unknown integer setcc!");
397      case ISD::SETEQ:  return getConstant(C1 == C2, VT);
398      case ISD::SETNE:  return getConstant(C1 != C2, VT);
399      case ISD::SETULT: return getConstant(C1 <  C2, VT);
400      case ISD::SETUGT: return getConstant(C1 >  C2, VT);
401      case ISD::SETULE: return getConstant(C1 <= C2, VT);
402      case ISD::SETUGE: return getConstant(C1 >= C2, VT);
403      case ISD::SETLT:  return getConstant((int64_t)C1 <  (int64_t)C2, VT);
404      case ISD::SETGT:  return getConstant((int64_t)C1 >  (int64_t)C2, VT);
405      case ISD::SETLE:  return getConstant((int64_t)C1 <= (int64_t)C2, VT);
406      case ISD::SETGE:  return getConstant((int64_t)C1 >= (int64_t)C2, VT);
407      }
408    } else {
409      // If the LHS is a ZERO_EXTEND and if this is an ==/!= comparison, perform
410      // the comparison on the input.
411      if (N1.getOpcode() == ISD::ZERO_EXTEND) {
412        unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType());
413
414        // If the comparison constant has bits in the upper part, the
415        // zero-extended value could never match.
416        if (C2 & (~0ULL << InSize)) {
417          unsigned VSize = MVT::getSizeInBits(N1.getValueType());
418          switch (Cond) {
419          case ISD::SETUGT:
420          case ISD::SETUGE:
421          case ISD::SETEQ: return getConstant(0, VT);
422          case ISD::SETULT:
423          case ISD::SETULE:
424          case ISD::SETNE: return getConstant(1, VT);
425          case ISD::SETGT:
426          case ISD::SETGE:
427            // True if the sign bit of C2 is set.
428            return getConstant((C2 & (1ULL << VSize)) != 0, VT);
429          case ISD::SETLT:
430          case ISD::SETLE:
431            // True if the sign bit of C2 isn't set.
432            return getConstant((C2 & (1ULL << VSize)) == 0, VT);
433          default:
434            break;
435          }
436        }
437
438        // Otherwise, we can perform the comparison with the low bits.
439        switch (Cond) {
440        case ISD::SETEQ:
441        case ISD::SETNE:
442        case ISD::SETUGT:
443        case ISD::SETUGE:
444        case ISD::SETULT:
445        case ISD::SETULE:
446          return getSetCC(Cond, VT, N1.getOperand(0),
447                          getConstant(C2, N1.getOperand(0).getValueType()));
448        default:
449          break;   // todo, be more careful with signed comparisons
450        }
451      }
452
453
454      uint64_t MinVal, MaxVal;
455      unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0));
456      if (ISD::isSignedIntSetCC(Cond)) {
457        MinVal = 1ULL << (OperandBitSize-1);
458        if (OperandBitSize != 1)   // Avoid X >> 64, which is undefined.
459          MaxVal = ~0ULL >> (65-OperandBitSize);
460        else
461          MaxVal = 0;
462      } else {
463        MinVal = 0;
464        MaxVal = ~0ULL >> (64-OperandBitSize);
465      }
466
467      // Canonicalize GE/LE comparisons to use GT/LT comparisons.
468      if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
469        if (C2 == MinVal) return getConstant(1, VT);   // X >= MIN --> true
470        --C2;                                          // X >= C1 --> X > (C1-1)
471        Cond = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT;
472        N2 = getConstant(C2, N2.getValueType());
473        N2C = cast<ConstantSDNode>(N2.Val);
474      }
475
476      if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
477        if (C2 == MaxVal) return getConstant(1, VT);   // X <= MAX --> true
478        ++C2;                                          // X <= C1 --> X < (C1+1)
479        Cond = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT;
480        N2 = getConstant(C2, N2.getValueType());
481        N2C = cast<ConstantSDNode>(N2.Val);
482      }
483
484      if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal)
485        return getConstant(0, VT);      // X < MIN --> false
486
487      // Canonicalize setgt X, Min --> setne X, Min
488      if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal)
489        return getSetCC(ISD::SETNE, VT, N1, N2);
490
491      // If we have setult X, 1, turn it into seteq X, 0
492      if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1)
493        return getSetCC(ISD::SETEQ, VT, N1,
494                        getConstant(MinVal, N1.getValueType()));
495      // If we have setugt X, Max-1, turn it into seteq X, Max
496      else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1)
497        return getSetCC(ISD::SETEQ, VT, N1,
498                        getConstant(MaxVal, N1.getValueType()));
499
500      // If we have "setcc X, C1", check to see if we can shrink the immediate
501      // by changing cc.
502
503      // SETUGT X, SINTMAX  -> SETLT X, 0
504      if (Cond == ISD::SETUGT && OperandBitSize != 1 &&
505          C2 == (~0ULL >> (65-OperandBitSize)))
506        return getSetCC(ISD::SETLT, VT, N1, getConstant(0, N2.getValueType()));
507
508      // FIXME: Implement the rest of these.
509
510
511      // Fold bit comparisons when we can.
512      if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
513          VT == N1.getValueType() && N1.getOpcode() == ISD::AND)
514        if (ConstantSDNode *AndRHS =
515                    dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
516          if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0  -->  (X & 8) >> 3
517            // Perform the xform if the AND RHS is a single bit.
518            if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) {
519              return getNode(ISD::SRL, VT, N1,
520                             getConstant(ExactLog2(AndRHS->getValue()),
521                                                   TLI.getShiftAmountTy()));
522            }
523          } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) {
524            // (X & 8) == 8  -->  (X & 8) >> 3
525            // Perform the xform if C2 is a single bit.
526            if ((C2 & (C2-1)) == 0) {
527              return getNode(ISD::SRL, VT, N1,
528                             getConstant(ExactLog2(C2),TLI.getShiftAmountTy()));
529            }
530          }
531        }
532    }
533  } else if (isa<ConstantSDNode>(N1.Val)) {
534      // Ensure that the constant occurs on the RHS.
535    return getSetCC(ISD::getSetCCSwappedOperands(Cond), VT, N2, N1);
536  }
537
538  if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val))
539    if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) {
540      double C1 = N1C->getValue(), C2 = N2C->getValue();
541
542      switch (Cond) {
543      default: break; // FIXME: Implement the rest of these!
544      case ISD::SETEQ:  return getConstant(C1 == C2, VT);
545      case ISD::SETNE:  return getConstant(C1 != C2, VT);
546      case ISD::SETLT:  return getConstant(C1 < C2, VT);
547      case ISD::SETGT:  return getConstant(C1 > C2, VT);
548      case ISD::SETLE:  return getConstant(C1 <= C2, VT);
549      case ISD::SETGE:  return getConstant(C1 >= C2, VT);
550      }
551    } else {
552      // Ensure that the constant occurs on the RHS.
553      Cond = ISD::getSetCCSwappedOperands(Cond);
554      std::swap(N1, N2);
555    }
556
557  if (N1 == N2) {
558    // We can always fold X == Y for integer setcc's.
559    if (MVT::isInteger(N1.getValueType()))
560      return getConstant(ISD::isTrueWhenEqual(Cond), VT);
561    unsigned UOF = ISD::getUnorderedFlavor(Cond);
562    if (UOF == 2)   // FP operators that are undefined on NaNs.
563      return getConstant(ISD::isTrueWhenEqual(Cond), VT);
564    if (UOF == ISD::isTrueWhenEqual(Cond))
565      return getConstant(UOF, VT);
566    // Otherwise, we can't fold it.  However, we can simplify it to SETUO/SETO
567    // if it is not already.
568    Cond = UOF == 0 ? ISD::SETUO : ISD::SETO;
569  }
570
571  if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
572      MVT::isInteger(N1.getValueType())) {
573    if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB ||
574        N1.getOpcode() == ISD::XOR) {
575      // Simplify (X+Y) == (X+Z) -->  Y == Z
576      if (N1.getOpcode() == N2.getOpcode()) {
577        if (N1.getOperand(0) == N2.getOperand(0))
578          return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1));
579        if (N1.getOperand(1) == N2.getOperand(1))
580          return getSetCC(Cond, VT, N1.getOperand(0), N2.getOperand(0));
581        if (isCommutativeBinOp(N1.getOpcode())) {
582          // If X op Y == Y op X, try other combinations.
583          if (N1.getOperand(0) == N2.getOperand(1))
584            return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(0));
585          if (N1.getOperand(1) == N2.getOperand(0))
586            return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1));
587        }
588      }
589
590      // FIXME: move this stuff to the DAG Combiner when it exists!
591
592      // Simplify (X+Z) == X -->  Z == 0
593      if (N1.getOperand(0) == N2)
594        return getSetCC(Cond, VT, N1.getOperand(1),
595                        getConstant(0, N1.getValueType()));
596      if (N1.getOperand(1) == N2) {
597        if (isCommutativeBinOp(N1.getOpcode()))
598          return getSetCC(Cond, VT, N1.getOperand(0),
599                          getConstant(0, N1.getValueType()));
600        else {
601          assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
602          // (Z-X) == X  --> Z == X<<1
603          return getSetCC(Cond, VT, N1.getOperand(0),
604                          getNode(ISD::SHL, N2.getValueType(),
605                                  N2, getConstant(1, TLI.getShiftAmountTy())));
606        }
607      }
608    }
609
610    if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB ||
611        N2.getOpcode() == ISD::XOR) {
612      // Simplify  X == (X+Z) -->  Z == 0
613      if (N2.getOperand(0) == N1)
614        return getSetCC(Cond, VT, N2.getOperand(1),
615                        getConstant(0, N2.getValueType()));
616      else if (N2.getOperand(1) == N1)
617        return getSetCC(Cond, VT, N2.getOperand(0),
618                        getConstant(0, N2.getValueType()));
619    }
620  }
621
622  // Fold away ALL boolean setcc's.
623  if (N1.getValueType() == MVT::i1) {
624    switch (Cond) {
625    default: assert(0 && "Unknown integer setcc!");
626    case ISD::SETEQ:  // X == Y  -> (X^Y)^1
627      N1 = getNode(ISD::XOR, MVT::i1,
628                   getNode(ISD::XOR, MVT::i1, N1, N2),
629                   getConstant(1, MVT::i1));
630      break;
631    case ISD::SETNE:  // X != Y   -->  (X^Y)
632      N1 = getNode(ISD::XOR, MVT::i1, N1, N2);
633      break;
634    case ISD::SETGT:  // X >s Y   -->  X == 0 & Y == 1  -->  X^1 & Y
635    case ISD::SETULT: // X <u Y   -->  X == 0 & Y == 1  -->  X^1 & Y
636      N1 = getNode(ISD::AND, MVT::i1, N2,
637                   getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
638      break;
639    case ISD::SETLT:  // X <s Y   --> X == 1 & Y == 0  -->  Y^1 & X
640    case ISD::SETUGT: // X >u Y   --> X == 1 & Y == 0  -->  Y^1 & X
641      N1 = getNode(ISD::AND, MVT::i1, N1,
642                   getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
643      break;
644    case ISD::SETULE: // X <=u Y  --> X == 0 | Y == 1  -->  X^1 | Y
645    case ISD::SETGE:  // X >=s Y  --> X == 0 | Y == 1  -->  X^1 | Y
646      N1 = getNode(ISD::OR, MVT::i1, N2,
647                   getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
648      break;
649    case ISD::SETUGE: // X >=u Y  --> X == 1 | Y == 0  -->  Y^1 | X
650    case ISD::SETLE:  // X <=s Y  --> X == 1 | Y == 0  -->  Y^1 | X
651      N1 = getNode(ISD::OR, MVT::i1, N1,
652                   getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
653      break;
654    }
655    if (VT != MVT::i1)
656      N1 = getNode(ISD::ZERO_EXTEND, VT, N1);
657    return N1;
658  }
659
660
661  SetCCSDNode *&N = SetCCs[std::make_pair(std::make_pair(N1, N2),
662                                          std::make_pair(Cond, VT))];
663  if (N) return SDOperand(N, 0);
664  N = new SetCCSDNode(Cond, N1, N2);
665  N->setValueTypes(VT);
666  AllNodes.push_back(N);
667  return SDOperand(N, 0);
668}
669
670
671
672/// getNode - Gets or creates the specified node.
673///
674SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
675  SDNode *N = new SDNode(Opcode, VT);
676  AllNodes.push_back(N);
677  return SDOperand(N, 0);
678}
679
680SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
681                                SDOperand Operand) {
682  if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
683    uint64_t Val = C->getValue();
684    switch (Opcode) {
685    default: break;
686    case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT);
687    case ISD::ZERO_EXTEND: return getConstant(Val, VT);
688    case ISD::TRUNCATE:    return getConstant(Val, VT);
689    case ISD::SINT_TO_FP:  return getConstantFP(C->getSignExtended(), VT);
690    case ISD::UINT_TO_FP:  return getConstantFP(C->getValue(), VT);
691    }
692  }
693
694  if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val))
695    switch (Opcode) {
696    case ISD::FNEG:
697      return getConstantFP(-C->getValue(), VT);
698    case ISD::FP_ROUND:
699    case ISD::FP_EXTEND:
700      return getConstantFP(C->getValue(), VT);
701    case ISD::FP_TO_SINT:
702      return getConstant((int64_t)C->getValue(), VT);
703    case ISD::FP_TO_UINT:
704      return getConstant((uint64_t)C->getValue(), VT);
705    }
706
707  unsigned OpOpcode = Operand.Val->getOpcode();
708  switch (Opcode) {
709  case ISD::TokenFactor:
710    return Operand;         // Factor of one node?  No factor.
711  case ISD::SIGN_EXTEND:
712    if (Operand.getValueType() == VT) return Operand;   // noop extension
713    if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
714      return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
715    break;
716  case ISD::ZERO_EXTEND:
717    if (Operand.getValueType() == VT) return Operand;   // noop extension
718    if (OpOpcode == ISD::ZERO_EXTEND)   // (zext (zext x)) -> (zext x)
719      return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
720    break;
721  case ISD::TRUNCATE:
722    if (Operand.getValueType() == VT) return Operand;   // noop truncate
723    if (OpOpcode == ISD::TRUNCATE)
724      return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
725    else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) {
726      // If the source is smaller than the dest, we still need an extend.
727      if (Operand.Val->getOperand(0).getValueType() < VT)
728        return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
729      else if (Operand.Val->getOperand(0).getValueType() > VT)
730        return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
731      else
732        return Operand.Val->getOperand(0);
733    }
734    break;
735  case ISD::FNEG:
736    if (OpOpcode == ISD::SUB)   // -(X-Y) -> (Y-X)
737      return getNode(ISD::SUB, VT, Operand.Val->getOperand(1),
738                     Operand.Val->getOperand(0));
739    if (OpOpcode == ISD::FNEG)  // --X -> X
740      return Operand.Val->getOperand(0);
741    break;
742  case ISD::FABS:
743    if (OpOpcode == ISD::FNEG)  // abs(-X) -> abs(X)
744      return getNode(ISD::FABS, VT, Operand.Val->getOperand(0));
745    break;
746  }
747
748  SDNode *&N = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))];
749  if (N) return SDOperand(N, 0);
750  N = new SDNode(Opcode, Operand);
751  N->setValueTypes(VT);
752  AllNodes.push_back(N);
753  return SDOperand(N, 0);
754}
755
756/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero.  We use
757/// this predicate to simplify operations downstream.  V and Mask are known to
758/// be the same type.
759static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
760                              const TargetLowering &TLI) {
761  unsigned SrcBits;
762  if (Mask == 0) return true;
763
764  // If we know the result of a setcc has the top bits zero, use this info.
765  switch (Op.getOpcode()) {
766  case ISD::UNDEF:
767    return true;
768  case ISD::Constant:
769    return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0;
770
771  case ISD::SETCC:
772    return ((Mask & 1) == 0) &&
773           TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult;
774
775  case ISD::ZEXTLOAD:
776    SrcBits = MVT::getSizeInBits(cast<MVTSDNode>(Op)->getExtraValueType());
777    return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
778  case ISD::ZERO_EXTEND:
779    SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType());
780    return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI);
781
782  case ISD::AND:
783    // (X & C1) & C2 == 0   iff   C1 & C2 == 0.
784    if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
785      return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI);
786
787    // FALL THROUGH
788  case ISD::OR:
789  case ISD::XOR:
790    return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) &&
791           MaskedValueIsZero(Op.getOperand(1), Mask, TLI);
792  case ISD::SELECT:
793    return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) &&
794           MaskedValueIsZero(Op.getOperand(2), Mask, TLI);
795
796  case ISD::SRL:
797    // (ushr X, C1) & C2 == 0   iff  X & (C2 << C1) == 0
798    if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
799      uint64_t NewVal = Mask << ShAmt->getValue();
800      SrcBits = MVT::getSizeInBits(Op.getValueType());
801      if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1;
802      return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
803    }
804    return false;
805  case ISD::SHL:
806    // (ushl X, C1) & C2 == 0   iff  X & (C2 >> C1) == 0
807    if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
808      uint64_t NewVal = Mask >> ShAmt->getValue();
809      return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
810    }
811    return false;
812    // TODO we could handle some SRA cases here.
813  default: break;
814  }
815
816  return false;
817}
818
819
820
821SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
822                                SDOperand N1, SDOperand N2) {
823#ifndef NDEBUG
824  switch (Opcode) {
825  case ISD::TokenFactor:
826    assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
827           N2.getValueType() == MVT::Other && "Invalid token factor!");
828    break;
829  case ISD::AND:
830  case ISD::OR:
831  case ISD::XOR:
832  case ISD::UDIV:
833  case ISD::UREM:
834    assert(MVT::isInteger(VT) && "This operator does not apply to FP types!");
835    // fall through
836  case ISD::ADD:
837  case ISD::SUB:
838  case ISD::MUL:
839  case ISD::SDIV:
840  case ISD::SREM:
841    assert(N1.getValueType() == N2.getValueType() &&
842           N1.getValueType() == VT && "Binary operator types must match!");
843    break;
844
845  case ISD::SHL:
846  case ISD::SRA:
847  case ISD::SRL:
848    assert(VT == N1.getValueType() &&
849           "Shift operators return type must be the same as their first arg");
850    assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
851           VT != MVT::i1 && "Shifts only work on integers");
852    break;
853  default: break;
854  }
855#endif
856
857  ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
858  ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
859  if (N1C) {
860    if (N2C) {
861      uint64_t C1 = N1C->getValue(), C2 = N2C->getValue();
862      switch (Opcode) {
863      case ISD::ADD: return getConstant(C1 + C2, VT);
864      case ISD::SUB: return getConstant(C1 - C2, VT);
865      case ISD::MUL: return getConstant(C1 * C2, VT);
866      case ISD::UDIV:
867        if (C2) return getConstant(C1 / C2, VT);
868        break;
869      case ISD::UREM :
870        if (C2) return getConstant(C1 % C2, VT);
871        break;
872      case ISD::SDIV :
873        if (C2) return getConstant(N1C->getSignExtended() /
874                                   N2C->getSignExtended(), VT);
875        break;
876      case ISD::SREM :
877        if (C2) return getConstant(N1C->getSignExtended() %
878                                   N2C->getSignExtended(), VT);
879        break;
880      case ISD::AND  : return getConstant(C1 & C2, VT);
881      case ISD::OR   : return getConstant(C1 | C2, VT);
882      case ISD::XOR  : return getConstant(C1 ^ C2, VT);
883      case ISD::SHL  : return getConstant(C1 << (int)C2, VT);
884      case ISD::SRL  : return getConstant(C1 >> (unsigned)C2, VT);
885      case ISD::SRA  : return getConstant(N1C->getSignExtended() >>(int)C2, VT);
886      default: break;
887      }
888
889    } else {      // Cannonicalize constant to RHS if commutative
890      if (isCommutativeBinOp(Opcode)) {
891        std::swap(N1C, N2C);
892        std::swap(N1, N2);
893      }
894    }
895
896    switch (Opcode) {
897    default: break;
898    case ISD::SHL:    // shl  0, X -> 0
899      if (N1C->isNullValue()) return N1;
900      break;
901    case ISD::SRL:    // srl  0, X -> 0
902      if (N1C->isNullValue()) return N1;
903      break;
904    case ISD::SRA:    // sra -1, X -> -1
905      if (N1C->isAllOnesValue()) return N1;
906      break;
907    }
908  }
909
910  if (N2C) {
911    uint64_t C2 = N2C->getValue();
912
913    switch (Opcode) {
914    case ISD::ADD:
915      if (!C2) return N1;         // add X, 0 -> X
916      break;
917    case ISD::SUB:
918      if (!C2) return N1;         // sub X, 0 -> X
919      break;
920    case ISD::MUL:
921      if (!C2) return N2;         // mul X, 0 -> 0
922      if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X
923        return getNode(ISD::SUB, VT, getConstant(0, VT), N1);
924
925      // FIXME: Move this to the DAG combiner when it exists.
926      if ((C2 & C2-1) == 0) {
927        SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy());
928        return getNode(ISD::SHL, VT, N1, ShAmt);
929      }
930      break;
931
932    case ISD::UDIV:
933      // FIXME: Move this to the DAG combiner when it exists.
934      if ((C2 & C2-1) == 0 && C2) {
935        SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy());
936        return getNode(ISD::SRL, VT, N1, ShAmt);
937      }
938      break;
939
940    case ISD::SHL:
941    case ISD::SRL:
942    case ISD::SRA:
943      // If the shift amount is bigger than the size of the data, then all the
944      // bits are shifted out.  Simplify to undef.
945      if (C2 >= MVT::getSizeInBits(N1.getValueType())) {
946        return getNode(ISD::UNDEF, N1.getValueType());
947      }
948      if (C2 == 0) return N1;
949
950      if (Opcode == ISD::SHL && N1.getNumOperands() == 2)
951        if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
952          unsigned OpSAC = OpSA->getValue();
953          if (N1.getOpcode() == ISD::SHL) {
954            if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType()))
955              return getConstant(0, N1.getValueType());
956            return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0),
957                           getConstant(C2+OpSAC, N2.getValueType()));
958          } else if (N1.getOpcode() == ISD::SRL) {
959            // (X >> C1) << C2:  if C2 > C1, ((X & ~0<<C1) << C2-C1)
960            SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0),
961                                     getConstant(~0ULL << OpSAC, VT));
962            if (C2 > OpSAC) {
963              return getNode(ISD::SHL, VT, Mask,
964                             getConstant(C2-OpSAC, N2.getValueType()));
965            } else {
966              // (X >> C1) << C2:  if C2 <= C1, ((X & ~0<<C1) >> C1-C2)
967              return getNode(ISD::SRL, VT, Mask,
968                             getConstant(OpSAC-C2, N2.getValueType()));
969            }
970          } else if (N1.getOpcode() == ISD::SRA) {
971            // if C1 == C2, just mask out low bits.
972            if (C2 == OpSAC)
973              return getNode(ISD::AND, VT, N1.getOperand(0),
974                             getConstant(~0ULL << C2, VT));
975          }
976        }
977      break;
978
979    case ISD::AND:
980      if (!C2) return N2;         // X and 0 -> 0
981      if (N2C->isAllOnesValue())
982        return N1;                // X and -1 -> X
983
984      if (MaskedValueIsZero(N1, C2, TLI))  // X and 0 -> 0
985        return getConstant(0, VT);
986
987      {
988        uint64_t NotC2 = ~C2;
989        if (VT != MVT::i64)
990          NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1;
991
992        if (MaskedValueIsZero(N1, NotC2, TLI))
993          return N1;                // if (X & ~C2) -> 0, the and is redundant
994      }
995
996      // FIXME: Should add a corresponding version of this for
997      // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which
998      // we don't have yet.
999
1000      // and (sign_extend_inreg x:16:32), 1 -> and x, 1
1001      if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
1002        // If we are masking out the part of our input that was extended, just
1003        // mask the input to the extension directly.
1004        unsigned ExtendBits =
1005          MVT::getSizeInBits(cast<MVTSDNode>(N1)->getExtraValueType());
1006        if ((C2 & (~0ULL << ExtendBits)) == 0)
1007          return getNode(ISD::AND, VT, N1.getOperand(0), N2);
1008      }
1009      break;
1010    case ISD::OR:
1011      if (!C2)return N1;          // X or 0 -> X
1012      if (N2C->isAllOnesValue())
1013        return N2;                // X or -1 -> -1
1014      break;
1015    case ISD::XOR:
1016      if (!C2) return N1;        // X xor 0 -> X
1017      if (N2C->isAllOnesValue()) {
1018        if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1.Val)){
1019          // !(X op Y) -> (X !op Y)
1020          bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType());
1021          return getSetCC(ISD::getSetCCInverse(SetCC->getCondition(),isInteger),
1022                          SetCC->getValueType(0),
1023                          SetCC->getOperand(0), SetCC->getOperand(1));
1024        } else if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) {
1025          SDNode *Op = N1.Val;
1026          // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible
1027          // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible
1028          SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1);
1029          if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) {
1030            LHS = getNode(ISD::XOR, VT, LHS, N2);  // RHS = ~LHS
1031            RHS = getNode(ISD::XOR, VT, RHS, N2);  // RHS = ~RHS
1032            if (Op->getOpcode() == ISD::AND)
1033              return getNode(ISD::OR, VT, LHS, RHS);
1034            return getNode(ISD::AND, VT, LHS, RHS);
1035          }
1036        }
1037        // X xor -1 -> not(x)  ?
1038      }
1039      break;
1040    }
1041
1042    // Reassociate ((X op C1) op C2) if possible.
1043    if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode))
1044      if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1)))
1045        return getNode(Opcode, VT, N1.Val->getOperand(0),
1046                       getNode(Opcode, VT, N2, N1.Val->getOperand(1)));
1047  }
1048
1049  ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
1050  ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val);
1051  if (N1CFP)
1052    if (N2CFP) {
1053      double C1 = N1CFP->getValue(), C2 = N2CFP->getValue();
1054      switch (Opcode) {
1055      case ISD::ADD: return getConstantFP(C1 + C2, VT);
1056      case ISD::SUB: return getConstantFP(C1 - C2, VT);
1057      case ISD::MUL: return getConstantFP(C1 * C2, VT);
1058      case ISD::SDIV:
1059        if (C2) return getConstantFP(C1 / C2, VT);
1060        break;
1061      case ISD::SREM :
1062        if (C2) return getConstantFP(fmod(C1, C2), VT);
1063        break;
1064      default: break;
1065      }
1066
1067    } else {      // Cannonicalize constant to RHS if commutative
1068      if (isCommutativeBinOp(Opcode)) {
1069        std::swap(N1CFP, N2CFP);
1070        std::swap(N1, N2);
1071      }
1072    }
1073
1074  // Finally, fold operations that do not require constants.
1075  switch (Opcode) {
1076  case ISD::TokenFactor:
1077    if (N1.getOpcode() == ISD::EntryToken)
1078      return N2;
1079    if (N2.getOpcode() == ISD::EntryToken)
1080      return N1;
1081    break;
1082
1083  case ISD::AND:
1084  case ISD::OR:
1085    if (SetCCSDNode *LHS = dyn_cast<SetCCSDNode>(N1.Val))
1086      if (SetCCSDNode *RHS = dyn_cast<SetCCSDNode>(N2.Val)) {
1087        SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0);
1088        SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1);
1089        ISD::CondCode Op2 = RHS->getCondition();
1090
1091        if (LR == RR && isa<ConstantSDNode>(LR) &&
1092            Op2 == LHS->getCondition() && MVT::isInteger(LL.getValueType())) {
1093          // (X != 0) | (Y != 0) -> (X|Y != 0)
1094          // (X == 0) & (Y == 0) -> (X|Y == 0)
1095          // (X <  0) | (Y <  0) -> (X|Y < 0)
1096          if (cast<ConstantSDNode>(LR)->getValue() == 0 &&
1097              ((Op2 == ISD::SETEQ && Opcode == ISD::AND) ||
1098               (Op2 == ISD::SETNE && Opcode == ISD::OR) ||
1099               (Op2 == ISD::SETLT && Opcode == ISD::OR)))
1100            return getSetCC(Op2, VT,
1101                            getNode(ISD::OR, LR.getValueType(), LL, RL), LR);
1102
1103          if (cast<ConstantSDNode>(LR)->isAllOnesValue()) {
1104            // (X == -1) & (Y == -1) -> (X&Y == -1)
1105            // (X != -1) | (Y != -1) -> (X&Y != -1)
1106            // (X >  -1) | (Y >  -1) -> (X&Y >  -1)
1107            if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) ||
1108                (Opcode == ISD::OR  && Op2 == ISD::SETNE) ||
1109                (Opcode == ISD::OR  && Op2 == ISD::SETGT))
1110              return getSetCC(Op2, VT,
1111                            getNode(ISD::AND, LR.getValueType(), LL, RL), LR);
1112            // (X >  -1) & (Y >  -1) -> (X|Y > -1)
1113            if (Opcode == ISD::AND && Op2 == ISD::SETGT)
1114              return getSetCC(Op2, VT,
1115                            getNode(ISD::OR, LR.getValueType(), LL, RL), LR);
1116          }
1117        }
1118
1119        // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y)
1120        if (LL == RR && LR == RL) {
1121          Op2 = ISD::getSetCCSwappedOperands(Op2);
1122          goto MatchedBackwards;
1123        }
1124
1125        if (LL == RL && LR == RR) {
1126        MatchedBackwards:
1127          ISD::CondCode Result;
1128          bool isInteger = MVT::isInteger(LL.getValueType());
1129          if (Opcode == ISD::OR)
1130            Result = ISD::getSetCCOrOperation(LHS->getCondition(), Op2,
1131                                              isInteger);
1132          else
1133            Result = ISD::getSetCCAndOperation(LHS->getCondition(), Op2,
1134                                               isInteger);
1135          if (Result != ISD::SETCC_INVALID)
1136            return getSetCC(Result, LHS->getValueType(0), LL, LR);
1137        }
1138      }
1139
1140    // and/or zext(a), zext(b) -> zext(and/or a, b)
1141    if (N1.getOpcode() == ISD::ZERO_EXTEND &&
1142        N2.getOpcode() == ISD::ZERO_EXTEND &&
1143        N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType())
1144      return getNode(ISD::ZERO_EXTEND, VT,
1145                     getNode(Opcode, N1.getOperand(0).getValueType(),
1146                             N1.getOperand(0), N2.getOperand(0)));
1147    break;
1148  case ISD::XOR:
1149    if (N1 == N2) return getConstant(0, VT);  // xor X, Y -> 0
1150    break;
1151  case ISD::ADD:
1152    if (N2.getOpcode() == ISD::FNEG)          // (A+ (-B) -> A-B
1153      return getNode(ISD::SUB, VT, N1, N2.getOperand(0));
1154    if (N1.getOpcode() == ISD::FNEG)          // ((-A)+B) -> B-A
1155      return getNode(ISD::SUB, VT, N2, N1.getOperand(0));
1156    if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
1157        cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0)
1158      return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A
1159    if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) &&
1160        cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0)
1161      return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B
1162    break;
1163  case ISD::SUB:
1164    if (N1.getOpcode() == ISD::ADD) {
1165      if (N1.Val->getOperand(0) == N2)
1166        return N1.Val->getOperand(1);         // (A+B)-A == B
1167      if (N1.Val->getOperand(1) == N2)
1168        return N1.Val->getOperand(0);         // (A+B)-B == A
1169    }
1170    if (N2.getOpcode() == ISD::FNEG)          // (A- (-B) -> A+B
1171      return getNode(ISD::ADD, VT, N1, N2.getOperand(0));
1172    break;
1173  // FIXME: figure out how to safely handle things like
1174  // int foo(int x) { return 1 << (x & 255); }
1175  // int bar() { return foo(256); }
1176#if 0
1177  case ISD::SHL:
1178  case ISD::SRL:
1179  case ISD::SRA:
1180    if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1181        cast<MVTSDNode>(N2)->getExtraValueType() != MVT::i1)
1182      return getNode(Opcode, VT, N1, N2.getOperand(0));
1183    else if (N2.getOpcode() == ISD::AND)
1184      if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) {
1185        // If the and is only masking out bits that cannot effect the shift,
1186        // eliminate the and.
1187        unsigned NumBits = MVT::getSizeInBits(VT);
1188        if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
1189          return getNode(Opcode, VT, N1, N2.getOperand(0));
1190      }
1191    break;
1192#endif
1193  }
1194
1195  SDNode *&N = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))];
1196  if (N) return SDOperand(N, 0);
1197  N = new SDNode(Opcode, N1, N2);
1198
1199  if (Opcode != ISD::READPORT && Opcode != ISD::READIO)
1200    N->setValueTypes(VT);
1201  else
1202    N->setValueTypes(VT, MVT::Other);
1203
1204  AllNodes.push_back(N);
1205  return SDOperand(N, 0);
1206}
1207
1208SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
1209                                SDOperand Chain, SDOperand Ptr,
1210                                SDOperand SV) {
1211  SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))];
1212  if (N) return SDOperand(N, 0);
1213  N = new SDNode(ISD::LOAD, Chain, Ptr, SV);
1214
1215  // Loads have a token chain.
1216  N->setValueTypes(VT, MVT::Other);
1217  AllNodes.push_back(N);
1218  return SDOperand(N, 0);
1219}
1220
1221SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1222                                SDOperand N1, SDOperand N2, SDOperand N3) {
1223  assert(Opcode != ISD::STORE && "Store shouldn't use this anymore");
1224  // Perform various simplifications.
1225  ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
1226  ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
1227  ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
1228  switch (Opcode) {
1229  case ISD::SELECT:
1230    if (N1C)
1231      if (N1C->getValue())
1232        return N2;             // select true, X, Y -> X
1233      else
1234        return N3;             // select false, X, Y -> Y
1235
1236    if (N2 == N3) return N2;   // select C, X, X -> X
1237
1238    if (VT == MVT::i1) {  // Boolean SELECT
1239      if (N2C) {
1240        if (N2C->getValue())   // select C, 1, X -> C | X
1241          return getNode(ISD::OR, VT, N1, N3);
1242        else                   // select C, 0, X -> ~C & X
1243          return getNode(ISD::AND, VT,
1244                         getNode(ISD::XOR, N1.getValueType(), N1,
1245                                 getConstant(1, N1.getValueType())), N3);
1246      } else if (N3C) {
1247        if (N3C->getValue())   // select C, X, 1 -> ~C | X
1248          return getNode(ISD::OR, VT,
1249                         getNode(ISD::XOR, N1.getValueType(), N1,
1250                                 getConstant(1, N1.getValueType())), N2);
1251        else                   // select C, X, 0 -> C & X
1252          return getNode(ISD::AND, VT, N1, N2);
1253      }
1254
1255      if (N1 == N2)   // X ? X : Y --> X ? 1 : Y --> X | Y
1256        return getNode(ISD::OR, VT, N1, N3);
1257      if (N1 == N3)   // X ? Y : X --> X ? Y : 0 --> X & Y
1258        return getNode(ISD::AND, VT, N1, N2);
1259    }
1260
1261    // If this is a selectcc, check to see if we can simplify the result.
1262    if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1)) {
1263      if (ConstantFPSDNode *CFP =
1264          dyn_cast<ConstantFPSDNode>(SetCC->getOperand(1)))
1265        if (CFP->getValue() == 0.0) {   // Allow either -0.0 or 0.0
1266          // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs
1267          if ((SetCC->getCondition() == ISD::SETGE ||
1268               SetCC->getCondition() == ISD::SETGT) &&
1269              N2 == SetCC->getOperand(0) && N3.getOpcode() == ISD::FNEG &&
1270              N3.getOperand(0) == N2)
1271            return getNode(ISD::FABS, VT, N2);
1272
1273          // select (setl[te] X, +/-0.0), fneg(X), X -> fabs
1274          if ((SetCC->getCondition() == ISD::SETLT ||
1275               SetCC->getCondition() == ISD::SETLE) &&
1276              N3 == SetCC->getOperand(0) && N2.getOpcode() == ISD::FNEG &&
1277              N2.getOperand(0) == N3)
1278            return getNode(ISD::FABS, VT, N3);
1279        }
1280      // select (setlt X, 0), A, 0 -> and (sra X, size(X)-1, A)
1281      if (ConstantSDNode *CN =
1282          dyn_cast<ConstantSDNode>(SetCC->getOperand(1)))
1283        if (CN->getValue() == 0 && N3C && N3C->getValue() == 0)
1284          if (SetCC->getCondition() == ISD::SETLT) {
1285            MVT::ValueType XType = SetCC->getOperand(0).getValueType();
1286            MVT::ValueType AType = N2.getValueType();
1287            if (XType >= AType) {
1288              SDOperand Shift = getNode(ISD::SRA, XType, SetCC->getOperand(0),
1289                getConstant(MVT::getSizeInBits(XType)-1,
1290                            TLI.getShiftAmountTy()));
1291              if (XType > AType)
1292                Shift = getNode(ISD::TRUNCATE, AType, Shift);
1293              return getNode(ISD::AND, AType, Shift, N2);
1294            }
1295          }
1296    }
1297    break;
1298  case ISD::BRCOND:
1299    if (N2C)
1300      if (N2C->getValue()) // Unconditional branch
1301        return getNode(ISD::BR, MVT::Other, N1, N3);
1302      else
1303        return N1;         // Never-taken branch
1304    break;
1305  // FIXME: figure out how to safely handle things like
1306  // int foo(int x) { return 1 << (x & 255); }
1307  // int bar() { return foo(256); }
1308#if 0
1309  case ISD::SRA_PARTS:
1310  case ISD::SRL_PARTS:
1311  case ISD::SHL_PARTS:
1312    if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1313        cast<MVTSDNode>(N3)->getExtraValueType() != MVT::i1)
1314      return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
1315    else if (N3.getOpcode() == ISD::AND)
1316      if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
1317        // If the and is only masking out bits that cannot effect the shift,
1318        // eliminate the and.
1319        unsigned NumBits = MVT::getSizeInBits(VT)*2;
1320        if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
1321          return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
1322      }
1323    break;
1324#endif
1325  }
1326
1327  SDNode *N = new SDNode(Opcode, N1, N2, N3);
1328  switch (Opcode) {
1329  default:
1330    N->setValueTypes(VT);
1331    break;
1332  case ISD::DYNAMIC_STACKALLOC: // DYNAMIC_STACKALLOC produces pointer and chain
1333    N->setValueTypes(VT, MVT::Other);
1334    break;
1335
1336  case ISD::SRA_PARTS:
1337  case ISD::SRL_PARTS:
1338  case ISD::SHL_PARTS: {
1339    std::vector<MVT::ValueType> V(N->getNumOperands()-1, VT);
1340    N->setValueTypes(V);
1341    break;
1342  }
1343  }
1344
1345  // FIXME: memoize NODES
1346  AllNodes.push_back(N);
1347  return SDOperand(N, 0);
1348}
1349
1350SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1351                                SDOperand N1, SDOperand N2, SDOperand N3,
1352                                SDOperand N4) {
1353  assert(Opcode == ISD::STORE && "Only stores should use this");
1354
1355  SDNode *N = new SDNode(Opcode, N1, N2, N3, N4);
1356  N->setValueTypes(VT);
1357
1358  // FIXME: memoize NODES
1359  AllNodes.push_back(N);
1360  return SDOperand(N, 0);
1361}
1362
1363SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
1364  assert((!V || isa<PointerType>(V->getType())) &&
1365         "SrcValue is not a pointer?");
1366  SDNode *&N = ValueNodes[std::make_pair(V, Offset)];
1367  if (N) return SDOperand(N, 0);
1368
1369  N = new SrcValueSDNode(V, Offset);
1370  AllNodes.push_back(N);
1371  return SDOperand(N, 0);
1372}
1373
1374SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1375                                std::vector<SDOperand> &Children) {
1376  switch (Children.size()) {
1377  case 0: return getNode(Opcode, VT);
1378  case 1: return getNode(Opcode, VT, Children[0]);
1379  case 2: return getNode(Opcode, VT, Children[0], Children[1]);
1380  case 3: return getNode(Opcode, VT, Children[0], Children[1], Children[2]);
1381  default: break;
1382  }
1383
1384  ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Children[1].Val);
1385  switch (Opcode) {
1386  default: break;
1387  case ISD::BRCONDTWOWAY:
1388    if (N1C)
1389      if (N1C->getValue()) // Unconditional branch to true dest.
1390        return getNode(ISD::BR, MVT::Other, Children[0], Children[2]);
1391      else                 // Unconditional branch to false dest.
1392        return getNode(ISD::BR, MVT::Other, Children[0], Children[3]);
1393    break;
1394  }
1395
1396  // FIXME: MEMOIZE!!
1397  SDNode *N = new SDNode(Opcode, Children);
1398  if (Opcode != ISD::ADD_PARTS && Opcode != ISD::SUB_PARTS) {
1399    N->setValueTypes(VT);
1400  } else {
1401    std::vector<MVT::ValueType> V(N->getNumOperands()/2, VT);
1402    N->setValueTypes(V);
1403  }
1404  AllNodes.push_back(N);
1405  return SDOperand(N, 0);
1406}
1407
1408SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1,
1409                                MVT::ValueType EVT) {
1410
1411  switch (Opcode) {
1412  default: assert(0 && "Bad opcode for this accessor!");
1413  case ISD::FP_ROUND_INREG:
1414    assert(VT == N1.getValueType() && "Not an inreg round!");
1415    assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) &&
1416           "Cannot FP_ROUND_INREG integer types");
1417    if (EVT == VT) return N1;  // Not actually rounding
1418    assert(EVT < VT && "Not rounding down!");
1419
1420    if (isa<ConstantFPSDNode>(N1))
1421      return getNode(ISD::FP_EXTEND, VT, getNode(ISD::FP_ROUND, EVT, N1));
1422    break;
1423  case ISD::SIGN_EXTEND_INREG:
1424    assert(VT == N1.getValueType() && "Not an inreg extend!");
1425    assert(MVT::isInteger(VT) && MVT::isInteger(EVT) &&
1426           "Cannot *_EXTEND_INREG FP types");
1427    if (EVT == VT) return N1;  // Not actually extending
1428    assert(EVT < VT && "Not extending!");
1429
1430    // Extending a constant?  Just return the extended constant.
1431    if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
1432      SDOperand Tmp = getNode(ISD::TRUNCATE, EVT, N1);
1433      return getNode(ISD::SIGN_EXTEND, VT, Tmp);
1434    }
1435
1436    // If we are sign extending an extension, use the original source.
1437    if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG)
1438      if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT)
1439        return N1;
1440
1441    // If we are sign extending a sextload, return just the load.
1442    if (N1.getOpcode() == ISD::SEXTLOAD && Opcode == ISD::SIGN_EXTEND_INREG)
1443      if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT)
1444        return N1;
1445
1446    // If we are extending the result of a setcc, and we already know the
1447    // contents of the top bits, eliminate the extension.
1448    if (N1.getOpcode() == ISD::SETCC &&
1449        TLI.getSetCCResultContents() ==
1450                        TargetLowering::ZeroOrNegativeOneSetCCResult)
1451      return N1;
1452
1453    // If we are sign extending the result of an (and X, C) operation, and we
1454    // know the extended bits are zeros already, don't do the extend.
1455    if (N1.getOpcode() == ISD::AND)
1456      if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
1457        uint64_t Mask = N1C->getValue();
1458        unsigned NumBits = MVT::getSizeInBits(EVT);
1459        if ((Mask & (~0ULL << (NumBits-1))) == 0)
1460          return N1;
1461      }
1462    break;
1463  }
1464
1465  EVTStruct NN;
1466  NN.Opcode = Opcode;
1467  NN.VT = VT;
1468  NN.EVT = EVT;
1469  NN.Ops.push_back(N1);
1470
1471  SDNode *&N = MVTSDNodes[NN];
1472  if (N) return SDOperand(N, 0);
1473  N = new MVTSDNode(Opcode, VT, N1, EVT);
1474  AllNodes.push_back(N);
1475  return SDOperand(N, 0);
1476}
1477
1478SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1,
1479                                SDOperand N2, SDOperand N3, MVT::ValueType EVT) {
1480  switch (Opcode) {
1481  default:  assert(0 && "Bad opcode for this accessor!");
1482  case ISD::EXTLOAD:
1483  case ISD::SEXTLOAD:
1484  case ISD::ZEXTLOAD:
1485    // If they are asking for an extending load from/to the same thing, return a
1486    // normal load.
1487    if (VT == EVT)
1488      return getLoad(VT, N1, N2, N3);
1489    assert(EVT < VT && "Should only be an extending load, not truncating!");
1490    assert((Opcode == ISD::EXTLOAD || MVT::isInteger(VT)) &&
1491           "Cannot sign/zero extend a FP load!");
1492    assert(MVT::isInteger(VT) == MVT::isInteger(EVT) &&
1493           "Cannot convert from FP to Int or Int -> FP!");
1494    break;
1495  }
1496
1497  EVTStruct NN;
1498  NN.Opcode = Opcode;
1499  NN.VT = VT;
1500  NN.EVT = EVT;
1501  NN.Ops.push_back(N1);
1502  NN.Ops.push_back(N2);
1503  NN.Ops.push_back(N3);
1504
1505  SDNode *&N = MVTSDNodes[NN];
1506  if (N) return SDOperand(N, 0);
1507  N = new MVTSDNode(Opcode, VT, MVT::Other, N1, N2, N3, EVT);
1508  AllNodes.push_back(N);
1509  return SDOperand(N, 0);
1510}
1511
1512SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1,
1513                                SDOperand N2, SDOperand N3, SDOperand N4, MVT::ValueType EVT) {
1514  switch (Opcode) {
1515  default:  assert(0 && "Bad opcode for this accessor!");
1516  case ISD::TRUNCSTORE:
1517#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store
1518    // If this is a truncating store of a constant, convert to the desired type
1519    // and store it instead.
1520    if (isa<Constant>(N1)) {
1521      SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1);
1522      if (isa<Constant>(Op))
1523        N1 = Op;
1524    }
1525    // Also for ConstantFP?
1526#endif
1527    if (N1.getValueType() == EVT)       // Normal store?
1528      return getNode(ISD::STORE, VT, N1, N2, N3, N4);
1529    assert(N2.getValueType() > EVT && "Not a truncation?");
1530    assert(MVT::isInteger(N2.getValueType()) == MVT::isInteger(EVT) &&
1531           "Can't do FP-INT conversion!");
1532    break;
1533  }
1534
1535  EVTStruct NN;
1536  NN.Opcode = Opcode;
1537  NN.VT = VT;
1538  NN.EVT = EVT;
1539  NN.Ops.push_back(N1);
1540  NN.Ops.push_back(N2);
1541  NN.Ops.push_back(N3);
1542  NN.Ops.push_back(N4);
1543
1544  SDNode *&N = MVTSDNodes[NN];
1545  if (N) return SDOperand(N, 0);
1546  N = new MVTSDNode(Opcode, VT, N1, N2, N3, N4, EVT);
1547  AllNodes.push_back(N);
1548  return SDOperand(N, 0);
1549}
1550
1551
1552/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
1553/// indicated value.  This method ignores uses of other values defined by this
1554/// operation.
1555bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) {
1556  assert(Value < getNumValues() && "Bad value!");
1557
1558  // If there is only one value, this is easy.
1559  if (getNumValues() == 1)
1560    return use_size() == NUses;
1561  if (Uses.size() < NUses) return false;
1562
1563  SDOperand TheValue(this, Value);
1564
1565  std::set<SDNode*> UsersHandled;
1566
1567  for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end();
1568       UI != E; ++UI) {
1569    SDNode *User = *UI;
1570    if (User->getNumOperands() == 1 ||
1571        UsersHandled.insert(User).second)     // First time we've seen this?
1572      for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
1573        if (User->getOperand(i) == TheValue) {
1574          if (NUses == 0)
1575            return false;   // too many uses
1576          --NUses;
1577        }
1578  }
1579
1580  // Found exactly the right number of uses?
1581  return NUses == 0;
1582}
1583
1584
1585const char *SDNode::getOperationName() const {
1586  switch (getOpcode()) {
1587  default: return "<<Unknown>>";
1588  case ISD::PCMARKER:      return "PCMarker";
1589  case ISD::SRCVALUE:      return "SrcValue";
1590  case ISD::EntryToken:    return "EntryToken";
1591  case ISD::TokenFactor:   return "TokenFactor";
1592  case ISD::Constant:      return "Constant";
1593  case ISD::ConstantFP:    return "ConstantFP";
1594  case ISD::GlobalAddress: return "GlobalAddress";
1595  case ISD::FrameIndex:    return "FrameIndex";
1596  case ISD::BasicBlock:    return "BasicBlock";
1597  case ISD::ExternalSymbol: return "ExternalSymbol";
1598  case ISD::ConstantPool:  return "ConstantPoolIndex";
1599  case ISD::CopyToReg:     return "CopyToReg";
1600  case ISD::CopyFromReg:   return "CopyFromReg";
1601  case ISD::ImplicitDef:   return "ImplicitDef";
1602  case ISD::UNDEF:         return "undef";
1603
1604  // Unary operators
1605  case ISD::FABS:   return "fabs";
1606  case ISD::FNEG:   return "fneg";
1607  case ISD::FSQRT:  return "fsqrt";
1608  case ISD::FSIN:   return "fsin";
1609  case ISD::FCOS:   return "fcos";
1610
1611  // Binary operators
1612  case ISD::ADD:    return "add";
1613  case ISD::SUB:    return "sub";
1614  case ISD::MUL:    return "mul";
1615  case ISD::MULHU:  return "mulhu";
1616  case ISD::MULHS:  return "mulhs";
1617  case ISD::SDIV:   return "sdiv";
1618  case ISD::UDIV:   return "udiv";
1619  case ISD::SREM:   return "srem";
1620  case ISD::UREM:   return "urem";
1621  case ISD::AND:    return "and";
1622  case ISD::OR:     return "or";
1623  case ISD::XOR:    return "xor";
1624  case ISD::SHL:    return "shl";
1625  case ISD::SRA:    return "sra";
1626  case ISD::SRL:    return "srl";
1627
1628  case ISD::SELECT: return "select";
1629  case ISD::ADD_PARTS:   return "add_parts";
1630  case ISD::SUB_PARTS:   return "sub_parts";
1631  case ISD::SHL_PARTS:   return "shl_parts";
1632  case ISD::SRA_PARTS:   return "sra_parts";
1633  case ISD::SRL_PARTS:   return "srl_parts";
1634
1635  // Conversion operators.
1636  case ISD::SIGN_EXTEND: return "sign_extend";
1637  case ISD::ZERO_EXTEND: return "zero_extend";
1638  case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
1639  case ISD::TRUNCATE:    return "truncate";
1640  case ISD::FP_ROUND:    return "fp_round";
1641  case ISD::FP_ROUND_INREG: return "fp_round_inreg";
1642  case ISD::FP_EXTEND:   return "fp_extend";
1643
1644  case ISD::SINT_TO_FP:  return "sint_to_fp";
1645  case ISD::UINT_TO_FP:  return "uint_to_fp";
1646  case ISD::FP_TO_SINT:  return "fp_to_sint";
1647  case ISD::FP_TO_UINT:  return "fp_to_uint";
1648
1649    // Control flow instructions
1650  case ISD::BR:      return "br";
1651  case ISD::BRCOND:  return "brcond";
1652  case ISD::BRCONDTWOWAY:  return "brcondtwoway";
1653  case ISD::RET:     return "ret";
1654  case ISD::CALL:    return "call";
1655  case ISD::ADJCALLSTACKDOWN:  return "adjcallstackdown";
1656  case ISD::ADJCALLSTACKUP:    return "adjcallstackup";
1657
1658    // Other operators
1659  case ISD::LOAD:    return "load";
1660  case ISD::STORE:   return "store";
1661  case ISD::EXTLOAD:    return "extload";
1662  case ISD::SEXTLOAD:   return "sextload";
1663  case ISD::ZEXTLOAD:   return "zextload";
1664  case ISD::TRUNCSTORE: return "truncstore";
1665
1666  case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
1667  case ISD::EXTRACT_ELEMENT: return "extract_element";
1668  case ISD::BUILD_PAIR: return "build_pair";
1669  case ISD::MEMSET:  return "memset";
1670  case ISD::MEMCPY:  return "memcpy";
1671  case ISD::MEMMOVE: return "memmove";
1672
1673  case ISD::READPORT: return "readport";
1674  case ISD::WRITEPORT: return "writeport";
1675  case ISD::READIO: return "readio";
1676  case ISD::WRITEIO: return "writeio";
1677
1678  case ISD::SETCC:
1679    const SetCCSDNode *SetCC = cast<SetCCSDNode>(this);
1680    switch (SetCC->getCondition()) {
1681    default: assert(0 && "Unknown setcc condition!");
1682    case ISD::SETOEQ:  return "setcc:setoeq";
1683    case ISD::SETOGT:  return "setcc:setogt";
1684    case ISD::SETOGE:  return "setcc:setoge";
1685    case ISD::SETOLT:  return "setcc:setolt";
1686    case ISD::SETOLE:  return "setcc:setole";
1687    case ISD::SETONE:  return "setcc:setone";
1688
1689    case ISD::SETO:    return "setcc:seto";
1690    case ISD::SETUO:   return "setcc:setuo";
1691    case ISD::SETUEQ:  return "setcc:setue";
1692    case ISD::SETUGT:  return "setcc:setugt";
1693    case ISD::SETUGE:  return "setcc:setuge";
1694    case ISD::SETULT:  return "setcc:setult";
1695    case ISD::SETULE:  return "setcc:setule";
1696    case ISD::SETUNE:  return "setcc:setune";
1697
1698    case ISD::SETEQ:   return "setcc:seteq";
1699    case ISD::SETGT:   return "setcc:setgt";
1700    case ISD::SETGE:   return "setcc:setge";
1701    case ISD::SETLT:   return "setcc:setlt";
1702    case ISD::SETLE:   return "setcc:setle";
1703    case ISD::SETNE:   return "setcc:setne";
1704    }
1705  }
1706}
1707
1708void SDNode::dump() const {
1709  std::cerr << (void*)this << ": ";
1710
1711  for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
1712    if (i) std::cerr << ",";
1713    if (getValueType(i) == MVT::Other)
1714      std::cerr << "ch";
1715    else
1716      std::cerr << MVT::getValueTypeString(getValueType(i));
1717  }
1718  std::cerr << " = " << getOperationName();
1719
1720  std::cerr << " ";
1721  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1722    if (i) std::cerr << ", ";
1723    std::cerr << (void*)getOperand(i).Val;
1724    if (unsigned RN = getOperand(i).ResNo)
1725      std::cerr << ":" << RN;
1726  }
1727
1728  if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
1729    std::cerr << "<" << CSDN->getValue() << ">";
1730  } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
1731    std::cerr << "<" << CSDN->getValue() << ">";
1732  } else if (const GlobalAddressSDNode *GADN =
1733             dyn_cast<GlobalAddressSDNode>(this)) {
1734    std::cerr << "<";
1735    WriteAsOperand(std::cerr, GADN->getGlobal()) << ">";
1736  } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
1737    std::cerr << "<" << FIDN->getIndex() << ">";
1738  } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
1739    std::cerr << "<" << CP->getIndex() << ">";
1740  } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
1741    std::cerr << "<";
1742    const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
1743    if (LBB)
1744      std::cerr << LBB->getName() << " ";
1745    std::cerr << (const void*)BBDN->getBasicBlock() << ">";
1746  } else if (const RegSDNode *C2V = dyn_cast<RegSDNode>(this)) {
1747    std::cerr << "<reg #" << C2V->getReg() << ">";
1748  } else if (const ExternalSymbolSDNode *ES =
1749             dyn_cast<ExternalSymbolSDNode>(this)) {
1750    std::cerr << "'" << ES->getSymbol() << "'";
1751  } else if (const MVTSDNode *M = dyn_cast<MVTSDNode>(this)) {
1752    std::cerr << " - Ty = " << MVT::getValueTypeString(M->getExtraValueType());
1753  } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
1754    if (M->getValue())
1755      std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
1756    else
1757      std::cerr << "<null:" << M->getOffset() << ">";
1758  }
1759}
1760
1761static void DumpNodes(SDNode *N, unsigned indent) {
1762  for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
1763    if (N->getOperand(i).Val->hasOneUse())
1764      DumpNodes(N->getOperand(i).Val, indent+2);
1765    else
1766      std::cerr << "\n" << std::string(indent+2, ' ')
1767                << (void*)N->getOperand(i).Val << ": <multiple use>";
1768
1769
1770  std::cerr << "\n" << std::string(indent, ' ');
1771  N->dump();
1772}
1773
1774void SelectionDAG::dump() const {
1775  std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
1776  std::vector<SDNode*> Nodes(AllNodes);
1777  std::sort(Nodes.begin(), Nodes.end());
1778
1779  for (unsigned i = 0, e = Nodes.size(); i != e; ++i) {
1780    if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val)
1781      DumpNodes(Nodes[i], 2);
1782  }
1783
1784  DumpNodes(getRoot().Val, 2);
1785
1786  std::cerr << "\n\n";
1787}
1788
1789