SelectionDAG.cpp revision 3ea0b47f81caeb53f9594dd3f7702ae01c4f2cc6
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Support/MathExtras.h" 20#include "llvm/Target/MRegisterInfo.h" 21#include "llvm/Target/TargetLowering.h" 22#include "llvm/Target/TargetInstrInfo.h" 23#include "llvm/Target/TargetMachine.h" 24#include <iostream> 25#include <set> 26#include <cmath> 27#include <algorithm> 28using namespace llvm; 29 30// Temporary boolean for testing the dag combiner 31namespace llvm { 32 extern bool CombinerEnabled; 33} 34 35static bool isCommutativeBinOp(unsigned Opcode) { 36 switch (Opcode) { 37 case ISD::ADD: 38 case ISD::MUL: 39 case ISD::FADD: 40 case ISD::FMUL: 41 case ISD::AND: 42 case ISD::OR: 43 case ISD::XOR: return true; 44 default: return false; // FIXME: Need commutative info for user ops! 45 } 46} 47 48static bool isAssociativeBinOp(unsigned Opcode) { 49 switch (Opcode) { 50 case ISD::ADD: 51 case ISD::MUL: 52 case ISD::AND: 53 case ISD::OR: 54 case ISD::XOR: return true; 55 default: return false; // FIXME: Need associative info for user ops! 56 } 57} 58 59// isInvertibleForFree - Return true if there is no cost to emitting the logical 60// inverse of this node. 61static bool isInvertibleForFree(SDOperand N) { 62 if (isa<ConstantSDNode>(N.Val)) return true; 63 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse()) 64 return true; 65 return false; 66} 67 68//===----------------------------------------------------------------------===// 69// ConstantFPSDNode Class 70//===----------------------------------------------------------------------===// 71 72/// isExactlyValue - We don't rely on operator== working on double values, as 73/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 74/// As such, this method can be used to do an exact bit-for-bit comparison of 75/// two floating point values. 76bool ConstantFPSDNode::isExactlyValue(double V) const { 77 return DoubleToBits(V) == DoubleToBits(Value); 78} 79 80//===----------------------------------------------------------------------===// 81// ISD Class 82//===----------------------------------------------------------------------===// 83 84/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 85/// when given the operation for (X op Y). 86ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 87 // To perform this operation, we just need to swap the L and G bits of the 88 // operation. 89 unsigned OldL = (Operation >> 2) & 1; 90 unsigned OldG = (Operation >> 1) & 1; 91 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 92 (OldL << 1) | // New G bit 93 (OldG << 2)); // New L bit. 94} 95 96/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 97/// 'op' is a valid SetCC operation. 98ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 99 unsigned Operation = Op; 100 if (isInteger) 101 Operation ^= 7; // Flip L, G, E bits, but not U. 102 else 103 Operation ^= 15; // Flip all of the condition bits. 104 if (Operation > ISD::SETTRUE2) 105 Operation &= ~8; // Don't let N and U bits get set. 106 return ISD::CondCode(Operation); 107} 108 109 110/// isSignedOp - For an integer comparison, return 1 if the comparison is a 111/// signed operation and 2 if the result is an unsigned comparison. Return zero 112/// if the operation does not depend on the sign of the input (setne and seteq). 113static int isSignedOp(ISD::CondCode Opcode) { 114 switch (Opcode) { 115 default: assert(0 && "Illegal integer setcc operation!"); 116 case ISD::SETEQ: 117 case ISD::SETNE: return 0; 118 case ISD::SETLT: 119 case ISD::SETLE: 120 case ISD::SETGT: 121 case ISD::SETGE: return 1; 122 case ISD::SETULT: 123 case ISD::SETULE: 124 case ISD::SETUGT: 125 case ISD::SETUGE: return 2; 126 } 127} 128 129/// getSetCCOrOperation - Return the result of a logical OR between different 130/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 131/// returns SETCC_INVALID if it is not possible to represent the resultant 132/// comparison. 133ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 134 bool isInteger) { 135 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 136 // Cannot fold a signed integer setcc with an unsigned integer setcc. 137 return ISD::SETCC_INVALID; 138 139 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 140 141 // If the N and U bits get set then the resultant comparison DOES suddenly 142 // care about orderedness, and is true when ordered. 143 if (Op > ISD::SETTRUE2) 144 Op &= ~16; // Clear the N bit. 145 return ISD::CondCode(Op); 146} 147 148/// getSetCCAndOperation - Return the result of a logical AND between different 149/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 150/// function returns zero if it is not possible to represent the resultant 151/// comparison. 152ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 153 bool isInteger) { 154 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 155 // Cannot fold a signed setcc with an unsigned setcc. 156 return ISD::SETCC_INVALID; 157 158 // Combine all of the condition bits. 159 return ISD::CondCode(Op1 & Op2); 160} 161 162const TargetMachine &SelectionDAG::getTarget() const { 163 return TLI.getTargetMachine(); 164} 165 166//===----------------------------------------------------------------------===// 167// SelectionDAG Class 168//===----------------------------------------------------------------------===// 169 170/// RemoveDeadNodes - This method deletes all unreachable nodes in the 171/// SelectionDAG, including nodes (like loads) that have uses of their token 172/// chain but no other uses and no side effect. If a node is passed in as an 173/// argument, it is used as the seed for node deletion. 174void SelectionDAG::RemoveDeadNodes(SDNode *N) { 175 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 176 177 // Create a dummy node (which is not added to allnodes), that adds a reference 178 // to the root node, preventing it from being deleted. 179 HandleSDNode Dummy(getRoot()); 180 181 // If we have a hint to start from, use it. 182 if (N) DeleteNodeIfDead(N, &AllNodeSet); 183 184 Restart: 185 unsigned NumNodes = AllNodeSet.size(); 186 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 187 I != E; ++I) { 188 // Try to delete this node. 189 DeleteNodeIfDead(*I, &AllNodeSet); 190 191 // If we actually deleted any nodes, do not use invalid iterators in 192 // AllNodeSet. 193 if (AllNodeSet.size() != NumNodes) 194 goto Restart; 195 } 196 197 // Restore AllNodes. 198 if (AllNodes.size() != NumNodes) 199 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 200 201 // If the root changed (e.g. it was a dead load, update the root). 202 setRoot(Dummy.getValue()); 203} 204 205 206void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 207 if (!N->use_empty()) 208 return; 209 210 // Okay, we really are going to delete this node. First take this out of the 211 // appropriate CSE map. 212 RemoveNodeFromCSEMaps(N); 213 214 // Next, brutally remove the operand list. This is safe to do, as there are 215 // no cycles in the graph. 216 while (!N->Operands.empty()) { 217 SDNode *O = N->Operands.back().Val; 218 N->Operands.pop_back(); 219 O->removeUser(N); 220 221 // Now that we removed this operand, see if there are no uses of it left. 222 DeleteNodeIfDead(O, NodeSet); 223 } 224 225 // Remove the node from the nodes set and delete it. 226 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 227 AllNodeSet.erase(N); 228 229 // Now that the node is gone, check to see if any of the operands of this node 230 // are dead now. 231 delete N; 232} 233 234void SelectionDAG::DeleteNode(SDNode *N) { 235 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 236 237 // First take this out of the appropriate CSE map. 238 RemoveNodeFromCSEMaps(N); 239 240 // Finally, remove uses due to operands of this node, remove from the 241 // AllNodes list, and delete the node. 242 DeleteNodeNotInCSEMaps(N); 243} 244 245void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 246 247 // Remove it from the AllNodes list. 248 for (std::vector<SDNode*>::iterator I = AllNodes.begin(); ; ++I) { 249 assert(I != AllNodes.end() && "Node not in AllNodes list??"); 250 if (*I == N) { 251 // Erase from the vector, which is not ordered. 252 std::swap(*I, AllNodes.back()); 253 AllNodes.pop_back(); 254 break; 255 } 256 } 257 258 // Drop all of the operands and decrement used nodes use counts. 259 while (!N->Operands.empty()) { 260 SDNode *O = N->Operands.back().Val; 261 N->Operands.pop_back(); 262 O->removeUser(N); 263 } 264 265 delete N; 266} 267 268/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 269/// correspond to it. This is useful when we're about to delete or repurpose 270/// the node. We don't want future request for structurally identical nodes 271/// to return N anymore. 272void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 273 bool Erased = false; 274 switch (N->getOpcode()) { 275 case ISD::HANDLENODE: return; // noop. 276 case ISD::Constant: 277 Erased = Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 278 N->getValueType(0))); 279 break; 280 case ISD::TargetConstant: 281 Erased = TargetConstants.erase(std::make_pair( 282 cast<ConstantSDNode>(N)->getValue(), 283 N->getValueType(0))); 284 break; 285 case ISD::ConstantFP: { 286 uint64_t V = DoubleToBits(cast<ConstantFPSDNode>(N)->getValue()); 287 Erased = ConstantFPs.erase(std::make_pair(V, N->getValueType(0))); 288 break; 289 } 290 case ISD::CONDCODE: 291 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 292 "Cond code doesn't exist!"); 293 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 294 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 295 break; 296 case ISD::GlobalAddress: 297 Erased = GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 298 break; 299 case ISD::TargetGlobalAddress: 300 Erased =TargetGlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 301 break; 302 case ISD::FrameIndex: 303 Erased = FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 304 break; 305 case ISD::TargetFrameIndex: 306 Erased = TargetFrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 307 break; 308 case ISD::ConstantPool: 309 Erased = ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get()); 310 break; 311 case ISD::TargetConstantPool: 312 Erased =TargetConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get()); 313 break; 314 case ISD::BasicBlock: 315 Erased = BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 316 break; 317 case ISD::ExternalSymbol: 318 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 319 break; 320 case ISD::VALUETYPE: 321 Erased = ValueTypeNodes[cast<VTSDNode>(N)->getVT()] != 0; 322 ValueTypeNodes[cast<VTSDNode>(N)->getVT()] = 0; 323 break; 324 case ISD::Register: 325 Erased = RegNodes.erase(std::make_pair(cast<RegisterSDNode>(N)->getReg(), 326 N->getValueType(0))); 327 break; 328 case ISD::SRCVALUE: { 329 SrcValueSDNode *SVN = cast<SrcValueSDNode>(N); 330 Erased =ValueNodes.erase(std::make_pair(SVN->getValue(), SVN->getOffset())); 331 break; 332 } 333 case ISD::LOAD: 334 Erased = Loads.erase(std::make_pair(N->getOperand(1), 335 std::make_pair(N->getOperand(0), 336 N->getValueType(0)))); 337 break; 338 default: 339 if (N->getNumValues() == 1) { 340 if (N->getNumOperands() == 0) { 341 Erased = NullaryOps.erase(std::make_pair(N->getOpcode(), 342 N->getValueType(0))); 343 } else if (N->getNumOperands() == 1) { 344 Erased = 345 UnaryOps.erase(std::make_pair(N->getOpcode(), 346 std::make_pair(N->getOperand(0), 347 N->getValueType(0)))); 348 } else if (N->getNumOperands() == 2) { 349 Erased = 350 BinaryOps.erase(std::make_pair(N->getOpcode(), 351 std::make_pair(N->getOperand(0), 352 N->getOperand(1)))); 353 } else { 354 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 355 Erased = 356 OneResultNodes.erase(std::make_pair(N->getOpcode(), 357 std::make_pair(N->getValueType(0), 358 Ops))); 359 } 360 } else { 361 // Remove the node from the ArbitraryNodes map. 362 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 363 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 364 Erased = 365 ArbitraryNodes.erase(std::make_pair(N->getOpcode(), 366 std::make_pair(RV, Ops))); 367 } 368 break; 369 } 370#ifndef NDEBUG 371 // Verify that the node was actually in one of the CSE maps, unless it has a 372 // flag result (which cannot be CSE'd) or is one of the special cases that are 373 // not subject to CSE. 374 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 375 N->getOpcode() != ISD::CALL && N->getOpcode() != ISD::CALLSEQ_START && 376 N->getOpcode() != ISD::CALLSEQ_END && !N->isTargetOpcode()) { 377 378 N->dump(); 379 assert(0 && "Node is not in map!"); 380 } 381#endif 382} 383 384/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 385/// has been taken out and modified in some way. If the specified node already 386/// exists in the CSE maps, do not modify the maps, but return the existing node 387/// instead. If it doesn't exist, add it and return null. 388/// 389SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 390 assert(N->getNumOperands() && "This is a leaf node!"); 391 if (N->getOpcode() == ISD::LOAD) { 392 SDNode *&L = Loads[std::make_pair(N->getOperand(1), 393 std::make_pair(N->getOperand(0), 394 N->getValueType(0)))]; 395 if (L) return L; 396 L = N; 397 } else if (N->getOpcode() == ISD::HANDLENODE) { 398 return 0; // never add it. 399 } else if (N->getNumOperands() == 1) { 400 SDNode *&U = UnaryOps[std::make_pair(N->getOpcode(), 401 std::make_pair(N->getOperand(0), 402 N->getValueType(0)))]; 403 if (U) return U; 404 U = N; 405 } else if (N->getNumOperands() == 2) { 406 SDNode *&B = BinaryOps[std::make_pair(N->getOpcode(), 407 std::make_pair(N->getOperand(0), 408 N->getOperand(1)))]; 409 if (B) return B; 410 B = N; 411 } else if (N->getNumValues() == 1) { 412 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 413 SDNode *&ORN = OneResultNodes[std::make_pair(N->getOpcode(), 414 std::make_pair(N->getValueType(0), Ops))]; 415 if (ORN) return ORN; 416 ORN = N; 417 } else { 418 // Remove the node from the ArbitraryNodes map. 419 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 420 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 421 SDNode *&AN = ArbitraryNodes[std::make_pair(N->getOpcode(), 422 std::make_pair(RV, Ops))]; 423 if (AN) return AN; 424 AN = N; 425 } 426 return 0; 427 428} 429 430 431 432SelectionDAG::~SelectionDAG() { 433 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 434 delete AllNodes[i]; 435} 436 437SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 438 if (Op.getValueType() == VT) return Op; 439 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT)); 440 return getNode(ISD::AND, Op.getValueType(), Op, 441 getConstant(Imm, Op.getValueType())); 442} 443 444SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 445 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 446 // Mask out any bits that are not valid for this constant. 447 if (VT != MVT::i64) 448 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 449 450 SDNode *&N = Constants[std::make_pair(Val, VT)]; 451 if (N) return SDOperand(N, 0); 452 N = new ConstantSDNode(false, Val, VT); 453 AllNodes.push_back(N); 454 return SDOperand(N, 0); 455} 456 457SDOperand SelectionDAG::getTargetConstant(uint64_t Val, MVT::ValueType VT) { 458 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 459 // Mask out any bits that are not valid for this constant. 460 if (VT != MVT::i64) 461 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 462 463 SDNode *&N = TargetConstants[std::make_pair(Val, VT)]; 464 if (N) return SDOperand(N, 0); 465 N = new ConstantSDNode(true, Val, VT); 466 AllNodes.push_back(N); 467 return SDOperand(N, 0); 468} 469 470SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 471 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 472 if (VT == MVT::f32) 473 Val = (float)Val; // Mask out extra precision. 474 475 // Do the map lookup using the actual bit pattern for the floating point 476 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 477 // we don't have issues with SNANs. 478 SDNode *&N = ConstantFPs[std::make_pair(DoubleToBits(Val), VT)]; 479 if (N) return SDOperand(N, 0); 480 N = new ConstantFPSDNode(Val, VT); 481 AllNodes.push_back(N); 482 return SDOperand(N, 0); 483} 484 485 486 487SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 488 MVT::ValueType VT) { 489 SDNode *&N = GlobalValues[GV]; 490 if (N) return SDOperand(N, 0); 491 N = new GlobalAddressSDNode(false, GV, VT); 492 AllNodes.push_back(N); 493 return SDOperand(N, 0); 494} 495 496SDOperand SelectionDAG::getTargetGlobalAddress(const GlobalValue *GV, 497 MVT::ValueType VT) { 498 SDNode *&N = TargetGlobalValues[GV]; 499 if (N) return SDOperand(N, 0); 500 N = new GlobalAddressSDNode(true, GV, VT); 501 AllNodes.push_back(N); 502 return SDOperand(N, 0); 503} 504 505SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 506 SDNode *&N = FrameIndices[FI]; 507 if (N) return SDOperand(N, 0); 508 N = new FrameIndexSDNode(FI, VT, false); 509 AllNodes.push_back(N); 510 return SDOperand(N, 0); 511} 512 513SDOperand SelectionDAG::getTargetFrameIndex(int FI, MVT::ValueType VT) { 514 SDNode *&N = TargetFrameIndices[FI]; 515 if (N) return SDOperand(N, 0); 516 N = new FrameIndexSDNode(FI, VT, true); 517 AllNodes.push_back(N); 518 return SDOperand(N, 0); 519} 520 521SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT) { 522 SDNode *&N = ConstantPoolIndices[C]; 523 if (N) return SDOperand(N, 0); 524 N = new ConstantPoolSDNode(C, VT, false); 525 AllNodes.push_back(N); 526 return SDOperand(N, 0); 527} 528 529SDOperand SelectionDAG::getTargetConstantPool(Constant *C, MVT::ValueType VT) { 530 SDNode *&N = TargetConstantPoolIndices[C]; 531 if (N) return SDOperand(N, 0); 532 N = new ConstantPoolSDNode(C, VT, true); 533 AllNodes.push_back(N); 534 return SDOperand(N, 0); 535} 536 537SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 538 SDNode *&N = BBNodes[MBB]; 539 if (N) return SDOperand(N, 0); 540 N = new BasicBlockSDNode(MBB); 541 AllNodes.push_back(N); 542 return SDOperand(N, 0); 543} 544 545SDOperand SelectionDAG::getValueType(MVT::ValueType VT) { 546 if ((unsigned)VT >= ValueTypeNodes.size()) 547 ValueTypeNodes.resize(VT+1); 548 if (ValueTypeNodes[VT] == 0) { 549 ValueTypeNodes[VT] = new VTSDNode(VT); 550 AllNodes.push_back(ValueTypeNodes[VT]); 551 } 552 553 return SDOperand(ValueTypeNodes[VT], 0); 554} 555 556SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 557 SDNode *&N = ExternalSymbols[Sym]; 558 if (N) return SDOperand(N, 0); 559 N = new ExternalSymbolSDNode(Sym, VT); 560 AllNodes.push_back(N); 561 return SDOperand(N, 0); 562} 563 564SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) { 565 if ((unsigned)Cond >= CondCodeNodes.size()) 566 CondCodeNodes.resize(Cond+1); 567 568 if (CondCodeNodes[Cond] == 0) { 569 CondCodeNodes[Cond] = new CondCodeSDNode(Cond); 570 AllNodes.push_back(CondCodeNodes[Cond]); 571 } 572 return SDOperand(CondCodeNodes[Cond], 0); 573} 574 575SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) { 576 RegisterSDNode *&Reg = RegNodes[std::make_pair(RegNo, VT)]; 577 if (!Reg) { 578 Reg = new RegisterSDNode(RegNo, VT); 579 AllNodes.push_back(Reg); 580 } 581 return SDOperand(Reg, 0); 582} 583 584/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 585/// this predicate to simplify operations downstream. V and Mask are known to 586/// be the same type. 587static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, 588 const TargetLowering &TLI) { 589 unsigned SrcBits; 590 if (Mask == 0) return true; 591 592 // If we know the result of a setcc has the top bits zero, use this info. 593 switch (Op.getOpcode()) { 594 case ISD::Constant: 595 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0; 596 597 case ISD::SETCC: 598 return ((Mask & 1) == 0) && 599 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; 600 601 case ISD::ZEXTLOAD: 602 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT()); 603 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 604 case ISD::ZERO_EXTEND: 605 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); 606 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); 607 case ISD::AssertZext: 608 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT()); 609 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 610 case ISD::AND: 611 // (X & C1) & C2 == 0 iff C1 & C2 == 0. 612 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 613 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI); 614 615 // FALL THROUGH 616 case ISD::OR: 617 case ISD::XOR: 618 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 619 MaskedValueIsZero(Op.getOperand(1), Mask, TLI); 620 case ISD::SELECT: 621 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) && 622 MaskedValueIsZero(Op.getOperand(2), Mask, TLI); 623 case ISD::SELECT_CC: 624 return MaskedValueIsZero(Op.getOperand(2), Mask, TLI) && 625 MaskedValueIsZero(Op.getOperand(3), Mask, TLI); 626 case ISD::SRL: 627 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0 628 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 629 uint64_t NewVal = Mask << ShAmt->getValue(); 630 SrcBits = MVT::getSizeInBits(Op.getValueType()); 631 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1; 632 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 633 } 634 return false; 635 case ISD::SHL: 636 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0 637 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 638 uint64_t NewVal = Mask >> ShAmt->getValue(); 639 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 640 } 641 return false; 642 case ISD::CTTZ: 643 case ISD::CTLZ: 644 case ISD::CTPOP: 645 // Bit counting instructions can not set the high bits of the result 646 // register. The max number of bits sets depends on the input. 647 return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0; 648 649 // TODO we could handle some SRA cases here. 650 default: break; 651 } 652 653 return false; 654} 655 656 657 658SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1, 659 SDOperand N2, ISD::CondCode Cond) { 660 // These setcc operations always fold. 661 switch (Cond) { 662 default: break; 663 case ISD::SETFALSE: 664 case ISD::SETFALSE2: return getConstant(0, VT); 665 case ISD::SETTRUE: 666 case ISD::SETTRUE2: return getConstant(1, VT); 667 } 668 669 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 670 uint64_t C2 = N2C->getValue(); 671 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 672 uint64_t C1 = N1C->getValue(); 673 674 // Sign extend the operands if required 675 if (ISD::isSignedIntSetCC(Cond)) { 676 C1 = N1C->getSignExtended(); 677 C2 = N2C->getSignExtended(); 678 } 679 680 switch (Cond) { 681 default: assert(0 && "Unknown integer setcc!"); 682 case ISD::SETEQ: return getConstant(C1 == C2, VT); 683 case ISD::SETNE: return getConstant(C1 != C2, VT); 684 case ISD::SETULT: return getConstant(C1 < C2, VT); 685 case ISD::SETUGT: return getConstant(C1 > C2, VT); 686 case ISD::SETULE: return getConstant(C1 <= C2, VT); 687 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 688 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 689 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 690 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 691 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 692 } 693 } else { 694 // If the LHS is a ZERO_EXTEND, perform the comparison on the input. 695 if (N1.getOpcode() == ISD::ZERO_EXTEND) { 696 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType()); 697 698 // If the comparison constant has bits in the upper part, the 699 // zero-extended value could never match. 700 if (C2 & (~0ULL << InSize)) { 701 unsigned VSize = MVT::getSizeInBits(N1.getValueType()); 702 switch (Cond) { 703 case ISD::SETUGT: 704 case ISD::SETUGE: 705 case ISD::SETEQ: return getConstant(0, VT); 706 case ISD::SETULT: 707 case ISD::SETULE: 708 case ISD::SETNE: return getConstant(1, VT); 709 case ISD::SETGT: 710 case ISD::SETGE: 711 // True if the sign bit of C2 is set. 712 return getConstant((C2 & (1ULL << VSize)) != 0, VT); 713 case ISD::SETLT: 714 case ISD::SETLE: 715 // True if the sign bit of C2 isn't set. 716 return getConstant((C2 & (1ULL << VSize)) == 0, VT); 717 default: 718 break; 719 } 720 } 721 722 // Otherwise, we can perform the comparison with the low bits. 723 switch (Cond) { 724 case ISD::SETEQ: 725 case ISD::SETNE: 726 case ISD::SETUGT: 727 case ISD::SETUGE: 728 case ISD::SETULT: 729 case ISD::SETULE: 730 return getSetCC(VT, N1.getOperand(0), 731 getConstant(C2, N1.getOperand(0).getValueType()), 732 Cond); 733 default: 734 break; // todo, be more careful with signed comparisons 735 } 736 } else if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG && 737 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) { 738 MVT::ValueType ExtSrcTy = cast<VTSDNode>(N1.getOperand(1))->getVT(); 739 unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy); 740 MVT::ValueType ExtDstTy = N1.getValueType(); 741 unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy); 742 743 // If the extended part has any inconsistent bits, it cannot ever 744 // compare equal. In other words, they have to be all ones or all 745 // zeros. 746 uint64_t ExtBits = 747 (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1)); 748 if ((C2 & ExtBits) != 0 && (C2 & ExtBits) != ExtBits) 749 return getConstant(Cond == ISD::SETNE, VT); 750 751 // Otherwise, make this a use of a zext. 752 return getSetCC(VT, getZeroExtendInReg(N1.getOperand(0), ExtSrcTy), 753 getConstant(C2 & (~0ULL>>(64-ExtSrcTyBits)), ExtDstTy), 754 Cond); 755 } 756 757 uint64_t MinVal, MaxVal; 758 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 759 if (ISD::isSignedIntSetCC(Cond)) { 760 MinVal = 1ULL << (OperandBitSize-1); 761 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 762 MaxVal = ~0ULL >> (65-OperandBitSize); 763 else 764 MaxVal = 0; 765 } else { 766 MinVal = 0; 767 MaxVal = ~0ULL >> (64-OperandBitSize); 768 } 769 770 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 771 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 772 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 773 --C2; // X >= C1 --> X > (C1-1) 774 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 775 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); 776 } 777 778 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 779 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 780 ++C2; // X <= C1 --> X < (C1+1) 781 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 782 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT); 783 } 784 785 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) 786 return getConstant(0, VT); // X < MIN --> false 787 788 // Canonicalize setgt X, Min --> setne X, Min 789 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) 790 return getSetCC(VT, N1, N2, ISD::SETNE); 791 792 // If we have setult X, 1, turn it into seteq X, 0 793 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 794 return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()), 795 ISD::SETEQ); 796 // If we have setugt X, Max-1, turn it into seteq X, Max 797 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 798 return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()), 799 ISD::SETEQ); 800 801 // If we have "setcc X, C1", check to see if we can shrink the immediate 802 // by changing cc. 803 804 // SETUGT X, SINTMAX -> SETLT X, 0 805 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 806 C2 == (~0ULL >> (65-OperandBitSize))) 807 return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT); 808 809 // FIXME: Implement the rest of these. 810 811 812 // Fold bit comparisons when we can. 813 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 814 VT == N1.getValueType() && N1.getOpcode() == ISD::AND) 815 if (ConstantSDNode *AndRHS = 816 dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 817 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3 818 // Perform the xform if the AND RHS is a single bit. 819 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) { 820 return getNode(ISD::SRL, VT, N1, 821 getConstant(Log2_64(AndRHS->getValue()), 822 TLI.getShiftAmountTy())); 823 } 824 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) { 825 // (X & 8) == 8 --> (X & 8) >> 3 826 // Perform the xform if C2 is a single bit. 827 if ((C2 & (C2-1)) == 0) { 828 return getNode(ISD::SRL, VT, N1, 829 getConstant(Log2_64(C2),TLI.getShiftAmountTy())); 830 } 831 } 832 } 833 } 834 } else if (isa<ConstantSDNode>(N1.Val)) { 835 // Ensure that the constant occurs on the RHS. 836 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 837 } 838 839 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 840 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 841 double C1 = N1C->getValue(), C2 = N2C->getValue(); 842 843 switch (Cond) { 844 default: break; // FIXME: Implement the rest of these! 845 case ISD::SETEQ: return getConstant(C1 == C2, VT); 846 case ISD::SETNE: return getConstant(C1 != C2, VT); 847 case ISD::SETLT: return getConstant(C1 < C2, VT); 848 case ISD::SETGT: return getConstant(C1 > C2, VT); 849 case ISD::SETLE: return getConstant(C1 <= C2, VT); 850 case ISD::SETGE: return getConstant(C1 >= C2, VT); 851 } 852 } else { 853 // Ensure that the constant occurs on the RHS. 854 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 855 } 856 857 if (N1 == N2) { 858 // We can always fold X == Y for integer setcc's. 859 if (MVT::isInteger(N1.getValueType())) 860 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 861 unsigned UOF = ISD::getUnorderedFlavor(Cond); 862 if (UOF == 2) // FP operators that are undefined on NaNs. 863 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 864 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond))) 865 return getConstant(UOF, VT); 866 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO 867 // if it is not already. 868 ISD::CondCode NewCond = UOF == 0 ? ISD::SETUO : ISD::SETO; 869 if (NewCond != Cond) 870 return getSetCC(VT, N1, N2, NewCond); 871 } 872 873 if (Cond == ISD::SETEQ || Cond == ISD::SETNE) { 874 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB || 875 N1.getOpcode() == ISD::XOR) { 876 // Simplify (X+Y) == (X+Z) --> Y == Z 877 if (N1.getOpcode() == N2.getOpcode()) { 878 if (N1.getOperand(0) == N2.getOperand(0)) 879 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond); 880 if (N1.getOperand(1) == N2.getOperand(1)) 881 return getSetCC(VT, N1.getOperand(0), N2.getOperand(0), Cond); 882 if (isCommutativeBinOp(N1.getOpcode())) { 883 // If X op Y == Y op X, try other combinations. 884 if (N1.getOperand(0) == N2.getOperand(1)) 885 return getSetCC(VT, N1.getOperand(1), N2.getOperand(0), Cond); 886 if (N1.getOperand(1) == N2.getOperand(0)) 887 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond); 888 } 889 } 890 891 // FIXME: move this stuff to the DAG Combiner when it exists! 892 893 // Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0. Common for condcodes. 894 if (N1.getOpcode() == ISD::XOR) 895 if (ConstantSDNode *XORC = dyn_cast<ConstantSDNode>(N1.getOperand(1))) 896 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N2)) { 897 // If we know that all of the inverted bits are zero, don't bother 898 // performing the inversion. 899 if (MaskedValueIsZero(N1.getOperand(0), ~XORC->getValue(), TLI)) 900 return getSetCC(VT, N1.getOperand(0), 901 getConstant(XORC->getValue()^RHSC->getValue(), 902 N1.getValueType()), Cond); 903 } 904 905 // Simplify (X+Z) == X --> Z == 0 906 if (N1.getOperand(0) == N2) 907 return getSetCC(VT, N1.getOperand(1), 908 getConstant(0, N1.getValueType()), Cond); 909 if (N1.getOperand(1) == N2) { 910 if (isCommutativeBinOp(N1.getOpcode())) 911 return getSetCC(VT, N1.getOperand(0), 912 getConstant(0, N1.getValueType()), Cond); 913 else { 914 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); 915 // (Z-X) == X --> Z == X<<1 916 return getSetCC(VT, N1.getOperand(0), 917 getNode(ISD::SHL, N2.getValueType(), 918 N2, getConstant(1, TLI.getShiftAmountTy())), 919 Cond); 920 } 921 } 922 } 923 924 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || 925 N2.getOpcode() == ISD::XOR) { 926 // Simplify X == (X+Z) --> Z == 0 927 if (N2.getOperand(0) == N1) { 928 return getSetCC(VT, N2.getOperand(1), 929 getConstant(0, N2.getValueType()), Cond); 930 } else if (N2.getOperand(1) == N1) { 931 if (isCommutativeBinOp(N2.getOpcode())) { 932 return getSetCC(VT, N2.getOperand(0), 933 getConstant(0, N2.getValueType()), Cond); 934 } else { 935 assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!"); 936 // X == (Z-X) --> X<<1 == Z 937 return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1, 938 getConstant(1, TLI.getShiftAmountTy())), 939 N2.getOperand(0), Cond); 940 } 941 } 942 } 943 } 944 945 // Fold away ALL boolean setcc's. 946 if (N1.getValueType() == MVT::i1) { 947 switch (Cond) { 948 default: assert(0 && "Unknown integer setcc!"); 949 case ISD::SETEQ: // X == Y -> (X^Y)^1 950 N1 = getNode(ISD::XOR, MVT::i1, 951 getNode(ISD::XOR, MVT::i1, N1, N2), 952 getConstant(1, MVT::i1)); 953 break; 954 case ISD::SETNE: // X != Y --> (X^Y) 955 N1 = getNode(ISD::XOR, MVT::i1, N1, N2); 956 break; 957 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y 958 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y 959 N1 = getNode(ISD::AND, MVT::i1, N2, 960 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 961 break; 962 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X 963 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X 964 N1 = getNode(ISD::AND, MVT::i1, N1, 965 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 966 break; 967 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y 968 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y 969 N1 = getNode(ISD::OR, MVT::i1, N2, 970 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 971 break; 972 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X 973 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X 974 N1 = getNode(ISD::OR, MVT::i1, N1, 975 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 976 break; 977 } 978 if (VT != MVT::i1) 979 N1 = getNode(ISD::ZERO_EXTEND, VT, N1); 980 return N1; 981 } 982 983 // Could not fold it. 984 return SDOperand(); 985} 986 987SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2, 988 SDOperand N3, SDOperand N4, 989 ISD::CondCode CC) { 990 MVT::ValueType VT = N3.getValueType(); 991 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 992 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 993 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 994 ConstantSDNode *N4C = dyn_cast<ConstantSDNode>(N4.Val); 995 996 // Check to see if we can simplify the select into an fabs node 997 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) { 998 // Allow either -0.0 or 0.0 999 if (CFP->getValue() == 0.0) { 1000 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 1001 if ((CC == ISD::SETGE || CC == ISD::SETGT) && 1002 N1 == N3 && N4.getOpcode() == ISD::FNEG && 1003 N1 == N4.getOperand(0)) 1004 return getNode(ISD::FABS, VT, N1); 1005 1006 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 1007 if ((CC == ISD::SETLT || CC == ISD::SETLE) && 1008 N1 == N4 && N3.getOpcode() == ISD::FNEG && 1009 N3.getOperand(0) == N4) 1010 return getNode(ISD::FABS, VT, N4); 1011 } 1012 } 1013 1014 // check to see if we're select_cc'ing a select_cc. 1015 // this allows us to turn: 1016 // select_cc set[eq,ne] (select_cc cc, lhs, rhs, 1, 0), 0, true, false -> 1017 // select_cc cc, lhs, rhs, true, false 1018 if ((N1C && N1C->isNullValue() && N2.getOpcode() == ISD::SELECT_CC) || 1019 (N2C && N2C->isNullValue() && N1.getOpcode() == ISD::SELECT_CC) && 1020 (CC == ISD::SETEQ || CC == ISD::SETNE)) { 1021 SDOperand SCC = N1C ? N2 : N1; 1022 ConstantSDNode *SCCT = dyn_cast<ConstantSDNode>(SCC.getOperand(2)); 1023 ConstantSDNode *SCCF = dyn_cast<ConstantSDNode>(SCC.getOperand(3)); 1024 if (SCCT && SCCF && SCCF->isNullValue() && SCCT->getValue() == 1ULL) { 1025 if (CC == ISD::SETEQ) std::swap(N3, N4); 1026 return getNode(ISD::SELECT_CC, N3.getValueType(), SCC.getOperand(0), 1027 SCC.getOperand(1), N3, N4, SCC.getOperand(4)); 1028 } 1029 } 1030 1031 // Check to see if we can perform the "gzip trick", transforming 1032 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A 1033 if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() && 1034 MVT::isInteger(N1.getValueType()) && 1035 MVT::isInteger(N3.getValueType()) && CC == ISD::SETLT) { 1036 MVT::ValueType XType = N1.getValueType(); 1037 MVT::ValueType AType = N3.getValueType(); 1038 if (XType >= AType) { 1039 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a 1040 // single-bit constant. FIXME: remove once the dag combiner 1041 // exists. 1042 if (N3C && ((N3C->getValue() & (N3C->getValue()-1)) == 0)) { 1043 unsigned ShCtV = Log2_64(N3C->getValue()); 1044 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1; 1045 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy()); 1046 SDOperand Shift = getNode(ISD::SRL, XType, N1, ShCt); 1047 if (XType > AType) 1048 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1049 return getNode(ISD::AND, AType, Shift, N3); 1050 } 1051 SDOperand Shift = getNode(ISD::SRA, XType, N1, 1052 getConstant(MVT::getSizeInBits(XType)-1, 1053 TLI.getShiftAmountTy())); 1054 if (XType > AType) 1055 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1056 return getNode(ISD::AND, AType, Shift, N3); 1057 } 1058 } 1059 1060 // Check to see if this is the equivalent of setcc 1061 if (N4C && N4C->isNullValue() && N3C && (N3C->getValue() == 1ULL)) { 1062 MVT::ValueType XType = N1.getValueType(); 1063 if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultTy())) { 1064 SDOperand Res = getSetCC(TLI.getSetCCResultTy(), N1, N2, CC); 1065 if (Res.getValueType() != VT) 1066 Res = getNode(ISD::ZERO_EXTEND, VT, Res); 1067 return Res; 1068 } 1069 1070 // seteq X, 0 -> srl (ctlz X, log2(size(X))) 1071 if (N2C && N2C->isNullValue() && CC == ISD::SETEQ && 1072 TLI.isOperationLegal(ISD::CTLZ, XType)) { 1073 SDOperand Ctlz = getNode(ISD::CTLZ, XType, N1); 1074 return getNode(ISD::SRL, XType, Ctlz, 1075 getConstant(Log2_32(MVT::getSizeInBits(XType)), 1076 TLI.getShiftAmountTy())); 1077 } 1078 // setgt X, 0 -> srl (and (-X, ~X), size(X)-1) 1079 if (N2C && N2C->isNullValue() && CC == ISD::SETGT) { 1080 SDOperand NegN1 = getNode(ISD::SUB, XType, getConstant(0, XType), N1); 1081 SDOperand NotN1 = getNode(ISD::XOR, XType, N1, getConstant(~0ULL, XType)); 1082 return getNode(ISD::SRL, XType, getNode(ISD::AND, XType, NegN1, NotN1), 1083 getConstant(MVT::getSizeInBits(XType)-1, 1084 TLI.getShiftAmountTy())); 1085 } 1086 // setgt X, -1 -> xor (srl (X, size(X)-1), 1) 1087 if (N2C && N2C->isAllOnesValue() && CC == ISD::SETGT) { 1088 SDOperand Sign = getNode(ISD::SRL, XType, N1, 1089 getConstant(MVT::getSizeInBits(XType)-1, 1090 TLI.getShiftAmountTy())); 1091 return getNode(ISD::XOR, XType, Sign, getConstant(1, XType)); 1092 } 1093 } 1094 1095 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X -> 1096 // Y = sra (X, size(X)-1); xor (add (X, Y), Y) 1097 if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) && 1098 N1 == N4 && N3.getOpcode() == ISD::SUB && N1 == N3.getOperand(1)) { 1099 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N3.getOperand(0))) { 1100 MVT::ValueType XType = N1.getValueType(); 1101 if (SubC->isNullValue() && MVT::isInteger(XType)) { 1102 SDOperand Shift = getNode(ISD::SRA, XType, N1, 1103 getConstant(MVT::getSizeInBits(XType)-1, 1104 TLI.getShiftAmountTy())); 1105 return getNode(ISD::XOR, XType, getNode(ISD::ADD, XType, N1, Shift), 1106 Shift); 1107 } 1108 } 1109 } 1110 1111 // Could not fold it. 1112 return SDOperand(); 1113} 1114 1115/// getNode - Gets or creates the specified node. 1116/// 1117SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 1118 SDNode *&N = NullaryOps[std::make_pair(Opcode, VT)]; 1119 if (!N) { 1120 N = new SDNode(Opcode, VT); 1121 AllNodes.push_back(N); 1122 } 1123 return SDOperand(N, 0); 1124} 1125 1126SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1127 SDOperand Operand) { 1128 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 1129 uint64_t Val = C->getValue(); 1130 switch (Opcode) { 1131 default: break; 1132 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 1133 case ISD::ANY_EXTEND: 1134 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 1135 case ISD::TRUNCATE: return getConstant(Val, VT); 1136 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 1137 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 1138 } 1139 } 1140 1141 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 1142 switch (Opcode) { 1143 case ISD::FNEG: 1144 return getConstantFP(-C->getValue(), VT); 1145 case ISD::FP_ROUND: 1146 case ISD::FP_EXTEND: 1147 return getConstantFP(C->getValue(), VT); 1148 case ISD::FP_TO_SINT: 1149 return getConstant((int64_t)C->getValue(), VT); 1150 case ISD::FP_TO_UINT: 1151 return getConstant((uint64_t)C->getValue(), VT); 1152 } 1153 1154 unsigned OpOpcode = Operand.Val->getOpcode(); 1155 switch (Opcode) { 1156 case ISD::TokenFactor: 1157 return Operand; // Factor of one node? No factor. 1158 case ISD::SIGN_EXTEND: 1159 if (Operand.getValueType() == VT) return Operand; // noop extension 1160 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 1161 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1162 break; 1163 case ISD::ZERO_EXTEND: 1164 if (Operand.getValueType() == VT) return Operand; // noop extension 1165 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 1166 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 1167 break; 1168 case ISD::ANY_EXTEND: 1169 if (Operand.getValueType() == VT) return Operand; // noop extension 1170 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 1171 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 1172 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1173 break; 1174 case ISD::TRUNCATE: 1175 if (Operand.getValueType() == VT) return Operand; // noop truncate 1176 if (OpOpcode == ISD::TRUNCATE) 1177 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 1178 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 1179 OpOpcode == ISD::ANY_EXTEND) { 1180 // If the source is smaller than the dest, we still need an extend. 1181 if (Operand.Val->getOperand(0).getValueType() < VT) 1182 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1183 else if (Operand.Val->getOperand(0).getValueType() > VT) 1184 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 1185 else 1186 return Operand.Val->getOperand(0); 1187 } 1188 break; 1189 case ISD::FNEG: 1190 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 1191 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1), 1192 Operand.Val->getOperand(0)); 1193 if (OpOpcode == ISD::FNEG) // --X -> X 1194 return Operand.Val->getOperand(0); 1195 break; 1196 case ISD::FABS: 1197 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 1198 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 1199 break; 1200 } 1201 1202 SDNode *N; 1203 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 1204 SDNode *&E = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 1205 if (E) return SDOperand(E, 0); 1206 E = N = new SDNode(Opcode, Operand); 1207 } else { 1208 N = new SDNode(Opcode, Operand); 1209 } 1210 N->setValueTypes(VT); 1211 AllNodes.push_back(N); 1212 return SDOperand(N, 0); 1213} 1214 1215 1216 1217SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1218 SDOperand N1, SDOperand N2) { 1219#ifndef NDEBUG 1220 switch (Opcode) { 1221 case ISD::TokenFactor: 1222 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 1223 N2.getValueType() == MVT::Other && "Invalid token factor!"); 1224 break; 1225 case ISD::AND: 1226 case ISD::OR: 1227 case ISD::XOR: 1228 case ISD::UDIV: 1229 case ISD::UREM: 1230 case ISD::MULHU: 1231 case ISD::MULHS: 1232 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 1233 // fall through 1234 case ISD::ADD: 1235 case ISD::SUB: 1236 case ISD::MUL: 1237 case ISD::SDIV: 1238 case ISD::SREM: 1239 assert(MVT::isInteger(N1.getValueType()) && "Should use F* for FP ops"); 1240 // fall through. 1241 case ISD::FADD: 1242 case ISD::FSUB: 1243 case ISD::FMUL: 1244 case ISD::FDIV: 1245 case ISD::FREM: 1246 assert(N1.getValueType() == N2.getValueType() && 1247 N1.getValueType() == VT && "Binary operator types must match!"); 1248 break; 1249 1250 case ISD::SHL: 1251 case ISD::SRA: 1252 case ISD::SRL: 1253 assert(VT == N1.getValueType() && 1254 "Shift operators return type must be the same as their first arg"); 1255 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 1256 VT != MVT::i1 && "Shifts only work on integers"); 1257 break; 1258 case ISD::FP_ROUND_INREG: { 1259 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1260 assert(VT == N1.getValueType() && "Not an inreg round!"); 1261 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 1262 "Cannot FP_ROUND_INREG integer types"); 1263 assert(EVT <= VT && "Not rounding down!"); 1264 break; 1265 } 1266 case ISD::AssertSext: 1267 case ISD::AssertZext: 1268 case ISD::SIGN_EXTEND_INREG: { 1269 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1270 assert(VT == N1.getValueType() && "Not an inreg extend!"); 1271 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 1272 "Cannot *_EXTEND_INREG FP types"); 1273 assert(EVT <= VT && "Not extending!"); 1274 } 1275 1276 default: break; 1277 } 1278#endif 1279 1280 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1281 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1282 if (N1C) { 1283 if (N2C) { 1284 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 1285 switch (Opcode) { 1286 case ISD::ADD: return getConstant(C1 + C2, VT); 1287 case ISD::SUB: return getConstant(C1 - C2, VT); 1288 case ISD::MUL: return getConstant(C1 * C2, VT); 1289 case ISD::UDIV: 1290 if (C2) return getConstant(C1 / C2, VT); 1291 break; 1292 case ISD::UREM : 1293 if (C2) return getConstant(C1 % C2, VT); 1294 break; 1295 case ISD::SDIV : 1296 if (C2) return getConstant(N1C->getSignExtended() / 1297 N2C->getSignExtended(), VT); 1298 break; 1299 case ISD::SREM : 1300 if (C2) return getConstant(N1C->getSignExtended() % 1301 N2C->getSignExtended(), VT); 1302 break; 1303 case ISD::AND : return getConstant(C1 & C2, VT); 1304 case ISD::OR : return getConstant(C1 | C2, VT); 1305 case ISD::XOR : return getConstant(C1 ^ C2, VT); 1306 case ISD::SHL : return getConstant(C1 << C2, VT); 1307 case ISD::SRL : return getConstant(C1 >> C2, VT); 1308 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 1309 default: break; 1310 } 1311 } else { // Cannonicalize constant to RHS if commutative 1312 if (isCommutativeBinOp(Opcode)) { 1313 std::swap(N1C, N2C); 1314 std::swap(N1, N2); 1315 } 1316 } 1317 1318 if (!CombinerEnabled) { 1319 switch (Opcode) { 1320 default: break; 1321 case ISD::SHL: // shl 0, X -> 0 1322 if (N1C->isNullValue()) return N1; 1323 break; 1324 case ISD::SRL: // srl 0, X -> 0 1325 if (N1C->isNullValue()) return N1; 1326 break; 1327 case ISD::SRA: // sra -1, X -> -1 1328 if (N1C->isAllOnesValue()) return N1; 1329 break; 1330 case ISD::SIGN_EXTEND_INREG: // SIGN_EXTEND_INREG N1C, EVT 1331 // Extending a constant? Just return the extended constant. 1332 SDOperand Tmp = getNode(ISD::TRUNCATE, cast<VTSDNode>(N2)->getVT(), N1); 1333 return getNode(ISD::SIGN_EXTEND, VT, Tmp); 1334 } 1335 } 1336 } 1337 1338 if (!CombinerEnabled) { 1339 if (N2C) { 1340 uint64_t C2 = N2C->getValue(); 1341 1342 switch (Opcode) { 1343 case ISD::ADD: 1344 if (!C2) return N1; // add X, 0 -> X 1345 break; 1346 case ISD::SUB: 1347 if (!C2) return N1; // sub X, 0 -> X 1348 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT)); 1349 case ISD::MUL: 1350 if (!C2) return N2; // mul X, 0 -> 0 1351 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X 1352 return getNode(ISD::SUB, VT, getConstant(0, VT), N1); 1353 1354 // FIXME: Move this to the DAG combiner when it exists. 1355 if ((C2 & C2-1) == 0) { 1356 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy()); 1357 return getNode(ISD::SHL, VT, N1, ShAmt); 1358 } 1359 break; 1360 1361 case ISD::MULHU: 1362 case ISD::MULHS: 1363 if (!C2) return N2; // mul X, 0 -> 0 1364 1365 if (C2 == 1) // 0X*01 -> 0X hi(0X) == 0 1366 return getConstant(0, VT); 1367 1368 // Many others could be handled here, including -1, powers of 2, etc. 1369 break; 1370 1371 case ISD::UDIV: 1372 // FIXME: Move this to the DAG combiner when it exists. 1373 if ((C2 & C2-1) == 0 && C2) { 1374 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy()); 1375 return getNode(ISD::SRL, VT, N1, ShAmt); 1376 } 1377 break; 1378 1379 case ISD::SHL: 1380 case ISD::SRL: 1381 case ISD::SRA: 1382 // If the shift amount is bigger than the size of the data, then all the 1383 // bits are shifted out. Simplify to undef. 1384 if (C2 >= MVT::getSizeInBits(N1.getValueType())) { 1385 return getNode(ISD::UNDEF, N1.getValueType()); 1386 } 1387 if (C2 == 0) return N1; 1388 1389 if (Opcode == ISD::SRA) { 1390 // If the sign bit is known to be zero, switch this to a SRL. 1391 if (MaskedValueIsZero(N1, 1392 1ULL << (MVT::getSizeInBits(N1.getValueType())-1), 1393 TLI)) 1394 return getNode(ISD::SRL, N1.getValueType(), N1, N2); 1395 } else { 1396 // If the part left over is known to be zero, the whole thing is zero. 1397 uint64_t TypeMask = ~0ULL >> (64-MVT::getSizeInBits(N1.getValueType())); 1398 if (Opcode == ISD::SRL) { 1399 if (MaskedValueIsZero(N1, TypeMask << C2, TLI)) 1400 return getConstant(0, N1.getValueType()); 1401 } else if (Opcode == ISD::SHL) { 1402 if (MaskedValueIsZero(N1, TypeMask >> C2, TLI)) 1403 return getConstant(0, N1.getValueType()); 1404 } 1405 } 1406 1407 if (Opcode == ISD::SHL && N1.getNumOperands() == 2) 1408 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1409 unsigned OpSAC = OpSA->getValue(); 1410 if (N1.getOpcode() == ISD::SHL) { 1411 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType())) 1412 return getConstant(0, N1.getValueType()); 1413 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0), 1414 getConstant(C2+OpSAC, N2.getValueType())); 1415 } else if (N1.getOpcode() == ISD::SRL) { 1416 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1) 1417 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0), 1418 getConstant(~0ULL << OpSAC, VT)); 1419 if (C2 > OpSAC) { 1420 return getNode(ISD::SHL, VT, Mask, 1421 getConstant(C2-OpSAC, N2.getValueType())); 1422 } else { 1423 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2) 1424 return getNode(ISD::SRL, VT, Mask, 1425 getConstant(OpSAC-C2, N2.getValueType())); 1426 } 1427 } else if (N1.getOpcode() == ISD::SRA) { 1428 // if C1 == C2, just mask out low bits. 1429 if (C2 == OpSAC) 1430 return getNode(ISD::AND, VT, N1.getOperand(0), 1431 getConstant(~0ULL << C2, VT)); 1432 } 1433 } 1434 break; 1435 1436 case ISD::AND: 1437 if (!C2) return N2; // X and 0 -> 0 1438 if (N2C->isAllOnesValue()) 1439 return N1; // X and -1 -> X 1440 1441 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0 1442 return getConstant(0, VT); 1443 1444 { 1445 uint64_t NotC2 = ~C2; 1446 if (VT != MVT::i64) 1447 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1; 1448 1449 if (MaskedValueIsZero(N1, NotC2, TLI)) 1450 return N1; // if (X & ~C2) -> 0, the and is redundant 1451 } 1452 1453 // FIXME: Should add a corresponding version of this for 1454 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which 1455 // we don't have yet. 1456 // FIXME: NOW WE DO, add this. 1457 1458 // and (sign_extend_inreg x:16:32), 1 -> and x, 1 1459 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) { 1460 // If we are masking out the part of our input that was extended, just 1461 // mask the input to the extension directly. 1462 unsigned ExtendBits = 1463 MVT::getSizeInBits(cast<VTSDNode>(N1.getOperand(1))->getVT()); 1464 if ((C2 & (~0ULL << ExtendBits)) == 0) 1465 return getNode(ISD::AND, VT, N1.getOperand(0), N2); 1466 } else if (N1.getOpcode() == ISD::OR) { 1467 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N1.getOperand(1))) 1468 if ((ORI->getValue() & C2) == C2) { 1469 // If the 'or' is setting all of the bits that we are masking for, 1470 // we know the result of the AND will be the AND mask itself. 1471 return N2; 1472 } 1473 } 1474 break; 1475 case ISD::OR: 1476 if (!C2)return N1; // X or 0 -> X 1477 if (N2C->isAllOnesValue()) 1478 return N2; // X or -1 -> -1 1479 break; 1480 case ISD::XOR: 1481 if (!C2) return N1; // X xor 0 -> X 1482 if (N2C->getValue() == 1 && N1.Val->getOpcode() == ISD::SETCC) { 1483 SDNode *SetCC = N1.Val; 1484 // !(X op Y) -> (X !op Y) 1485 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType()); 1486 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get(); 1487 return getSetCC(SetCC->getValueType(0), 1488 SetCC->getOperand(0), SetCC->getOperand(1), 1489 ISD::getSetCCInverse(CC, isInteger)); 1490 } else if (N2C->isAllOnesValue()) { 1491 if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) { 1492 SDNode *Op = N1.Val; 1493 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible 1494 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible 1495 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1); 1496 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) { 1497 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS 1498 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS 1499 if (Op->getOpcode() == ISD::AND) 1500 return getNode(ISD::OR, VT, LHS, RHS); 1501 return getNode(ISD::AND, VT, LHS, RHS); 1502 } 1503 } 1504 // X xor -1 -> not(x) ? 1505 } 1506 break; 1507 } 1508 1509 // Reassociate ((X op C1) op C2) if possible. 1510 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode)) 1511 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1))) 1512 return getNode(Opcode, VT, N1.Val->getOperand(0), 1513 getNode(Opcode, VT, N2, N1.Val->getOperand(1))); 1514 } 1515 } 1516 1517 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 1518 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 1519 if (N1CFP) { 1520 if (N2CFP) { 1521 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 1522 switch (Opcode) { 1523 case ISD::FADD: return getConstantFP(C1 + C2, VT); 1524 case ISD::FSUB: return getConstantFP(C1 - C2, VT); 1525 case ISD::FMUL: return getConstantFP(C1 * C2, VT); 1526 case ISD::FDIV: 1527 if (C2) return getConstantFP(C1 / C2, VT); 1528 break; 1529 case ISD::FREM : 1530 if (C2) return getConstantFP(fmod(C1, C2), VT); 1531 break; 1532 default: break; 1533 } 1534 } else { // Cannonicalize constant to RHS if commutative 1535 if (isCommutativeBinOp(Opcode)) { 1536 std::swap(N1CFP, N2CFP); 1537 std::swap(N1, N2); 1538 } 1539 } 1540 1541 if (!CombinerEnabled) { 1542 if (Opcode == ISD::FP_ROUND_INREG) 1543 return getNode(ISD::FP_EXTEND, VT, 1544 getNode(ISD::FP_ROUND, cast<VTSDNode>(N2)->getVT(), N1)); 1545 } 1546 } 1547 1548 // Finally, fold operations that do not require constants. 1549 switch (Opcode) { 1550 case ISD::TokenFactor: 1551 if (!CombinerEnabled) { 1552 if (N1.getOpcode() == ISD::EntryToken) 1553 return N2; 1554 if (N2.getOpcode() == ISD::EntryToken) 1555 return N1; 1556 } 1557 break; 1558 1559 case ISD::AND: 1560 case ISD::OR: 1561 if (!CombinerEnabled) { 1562 if (N1.Val->getOpcode() == ISD::SETCC && N2.Val->getOpcode() == ISD::SETCC){ 1563 SDNode *LHS = N1.Val, *RHS = N2.Val; 1564 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0); 1565 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1); 1566 ISD::CondCode Op1 = cast<CondCodeSDNode>(LHS->getOperand(2))->get(); 1567 ISD::CondCode Op2 = cast<CondCodeSDNode>(RHS->getOperand(2))->get(); 1568 1569 if (LR == RR && isa<ConstantSDNode>(LR) && 1570 Op2 == Op1 && MVT::isInteger(LL.getValueType())) { 1571 // (X != 0) | (Y != 0) -> (X|Y != 0) 1572 // (X == 0) & (Y == 0) -> (X|Y == 0) 1573 // (X < 0) | (Y < 0) -> (X|Y < 0) 1574 if (cast<ConstantSDNode>(LR)->getValue() == 0 && 1575 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) || 1576 (Op2 == ISD::SETNE && Opcode == ISD::OR) || 1577 (Op2 == ISD::SETLT && Opcode == ISD::OR))) 1578 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), LR, 1579 Op2); 1580 1581 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) { 1582 // (X == -1) & (Y == -1) -> (X&Y == -1) 1583 // (X != -1) | (Y != -1) -> (X&Y != -1) 1584 // (X > -1) | (Y > -1) -> (X&Y > -1) 1585 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) || 1586 (Opcode == ISD::OR && Op2 == ISD::SETNE) || 1587 (Opcode == ISD::OR && Op2 == ISD::SETGT)) 1588 return getSetCC(VT, getNode(ISD::AND, LR.getValueType(), LL, RL), 1589 LR, Op2); 1590 // (X > -1) & (Y > -1) -> (X|Y > -1) 1591 if (Opcode == ISD::AND && Op2 == ISD::SETGT) 1592 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), 1593 LR, Op2); 1594 } 1595 } 1596 1597 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y) 1598 if (LL == RR && LR == RL) { 1599 Op2 = ISD::getSetCCSwappedOperands(Op2); 1600 goto MatchedBackwards; 1601 } 1602 1603 if (LL == RL && LR == RR) { 1604 MatchedBackwards: 1605 ISD::CondCode Result; 1606 bool isInteger = MVT::isInteger(LL.getValueType()); 1607 if (Opcode == ISD::OR) 1608 Result = ISD::getSetCCOrOperation(Op1, Op2, isInteger); 1609 else 1610 Result = ISD::getSetCCAndOperation(Op1, Op2, isInteger); 1611 1612 if (Result != ISD::SETCC_INVALID) 1613 return getSetCC(LHS->getValueType(0), LL, LR, Result); 1614 } 1615 } 1616 1617 // and/or zext(a), zext(b) -> zext(and/or a, b) 1618 if (N1.getOpcode() == ISD::ZERO_EXTEND && 1619 N2.getOpcode() == ISD::ZERO_EXTEND && 1620 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType()) 1621 return getNode(ISD::ZERO_EXTEND, VT, 1622 getNode(Opcode, N1.getOperand(0).getValueType(), 1623 N1.getOperand(0), N2.getOperand(0))); 1624 } 1625 break; 1626 case ISD::XOR: 1627 if (!CombinerEnabled) { 1628 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0 1629 } 1630 break; 1631 case ISD::ADD: 1632 if (!CombinerEnabled) { 1633 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) && 1634 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0) 1635 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A 1636 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) && 1637 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0) 1638 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B 1639 if (N2.getOpcode() == ISD::SUB && N1 == N2.Val->getOperand(1)) 1640 return N2.Val->getOperand(0); // A+(B-A) -> B 1641 } 1642 break; 1643 case ISD::FADD: 1644 if (!CombinerEnabled) { 1645 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B 1646 return getNode(ISD::FSUB, VT, N1, N2.getOperand(0)); 1647 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A 1648 return getNode(ISD::FSUB, VT, N2, N1.getOperand(0)); 1649 } 1650 break; 1651 1652 case ISD::SUB: 1653 if (!CombinerEnabled) { 1654 if (N1.getOpcode() == ISD::ADD) { 1655 if (N1.Val->getOperand(0) == N2) 1656 return N1.Val->getOperand(1); // (A+B)-A == B 1657 if (N1.Val->getOperand(1) == N2) 1658 return N1.Val->getOperand(0); // (A+B)-B == A 1659 } 1660 } 1661 break; 1662 case ISD::FSUB: 1663 if (!CombinerEnabled) { 1664 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B 1665 return getNode(ISD::FADD, VT, N1, N2.getOperand(0)); 1666 } 1667 break; 1668 case ISD::FP_ROUND_INREG: 1669 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 1670 break; 1671 case ISD::SIGN_EXTEND_INREG: { 1672 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1673 if (EVT == VT) return N1; // Not actually extending 1674 if (!CombinerEnabled) { 1675 // If we are sign extending an extension, use the original source. 1676 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG || 1677 N1.getOpcode() == ISD::AssertSext) 1678 if (cast<VTSDNode>(N1.getOperand(1))->getVT() <= EVT) 1679 return N1; 1680 1681 // If we are sign extending a sextload, return just the load. 1682 if (N1.getOpcode() == ISD::SEXTLOAD) 1683 if (cast<VTSDNode>(N1.getOperand(3))->getVT() <= EVT) 1684 return N1; 1685 1686 // If we are extending the result of a setcc, and we already know the 1687 // contents of the top bits, eliminate the extension. 1688 if (N1.getOpcode() == ISD::SETCC && 1689 TLI.getSetCCResultContents() == 1690 TargetLowering::ZeroOrNegativeOneSetCCResult) 1691 return N1; 1692 1693 // If we are sign extending the result of an (and X, C) operation, and we 1694 // know the extended bits are zeros already, don't do the extend. 1695 if (N1.getOpcode() == ISD::AND) 1696 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1697 uint64_t Mask = N1C->getValue(); 1698 unsigned NumBits = MVT::getSizeInBits(EVT); 1699 if ((Mask & (~0ULL << (NumBits-1))) == 0) 1700 return N1; 1701 } 1702 } 1703 break; 1704 } 1705 1706 // FIXME: figure out how to safely handle things like 1707 // int foo(int x) { return 1 << (x & 255); } 1708 // int bar() { return foo(256); } 1709#if 0 1710 case ISD::SHL: 1711 case ISD::SRL: 1712 case ISD::SRA: 1713 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 1714 cast<VTSDNode>(N2.getOperand(1))->getVT() != MVT::i1) 1715 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1716 else if (N2.getOpcode() == ISD::AND) 1717 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 1718 // If the and is only masking out bits that cannot effect the shift, 1719 // eliminate the and. 1720 unsigned NumBits = MVT::getSizeInBits(VT); 1721 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1722 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1723 } 1724 break; 1725#endif 1726 } 1727 1728 // Memoize this node if possible. 1729 SDNode *N; 1730 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END && 1731 VT != MVT::Flag) { 1732 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 1733 if (BON) return SDOperand(BON, 0); 1734 1735 BON = N = new SDNode(Opcode, N1, N2); 1736 } else { 1737 N = new SDNode(Opcode, N1, N2); 1738 } 1739 1740 N->setValueTypes(VT); 1741 AllNodes.push_back(N); 1742 return SDOperand(N, 0); 1743} 1744 1745// setAdjCallChain - This method changes the token chain of an 1746// CALLSEQ_START/END node to be the specified operand. 1747void SDNode::setAdjCallChain(SDOperand N) { 1748 assert(N.getValueType() == MVT::Other); 1749 assert((getOpcode() == ISD::CALLSEQ_START || 1750 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); 1751 1752 Operands[0].Val->removeUser(this); 1753 Operands[0] = N; 1754 N.Val->Uses.push_back(this); 1755} 1756 1757 1758 1759SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 1760 SDOperand Chain, SDOperand Ptr, 1761 SDOperand SV) { 1762 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 1763 if (N) return SDOperand(N, 0); 1764 N = new SDNode(ISD::LOAD, Chain, Ptr, SV); 1765 1766 // Loads have a token chain. 1767 N->setValueTypes(VT, MVT::Other); 1768 AllNodes.push_back(N); 1769 return SDOperand(N, 0); 1770} 1771 1772 1773SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT, 1774 SDOperand Chain, SDOperand Ptr, SDOperand SV, 1775 MVT::ValueType EVT) { 1776 std::vector<SDOperand> Ops; 1777 Ops.reserve(4); 1778 Ops.push_back(Chain); 1779 Ops.push_back(Ptr); 1780 Ops.push_back(SV); 1781 Ops.push_back(getValueType(EVT)); 1782 std::vector<MVT::ValueType> VTs; 1783 VTs.reserve(2); 1784 VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain. 1785 return getNode(Opcode, VTs, Ops); 1786} 1787 1788SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1789 SDOperand N1, SDOperand N2, SDOperand N3) { 1790 // Perform various simplifications. 1791 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1792 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1793 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1794 switch (Opcode) { 1795 case ISD::SETCC: { 1796 // Use SimplifySetCC to simplify SETCC's. 1797 SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 1798 if (Simp.Val) return Simp; 1799 break; 1800 } 1801 case ISD::SELECT: 1802 if (N1C) 1803 if (N1C->getValue()) 1804 return N2; // select true, X, Y -> X 1805 else 1806 return N3; // select false, X, Y -> Y 1807 1808 if (N2 == N3) return N2; // select C, X, X -> X 1809 1810 if (VT == MVT::i1) { // Boolean SELECT 1811 if (N2C) { 1812 if (N2C->getValue()) // select C, 1, X -> C | X 1813 return getNode(ISD::OR, VT, N1, N3); 1814 else // select C, 0, X -> ~C & X 1815 return getNode(ISD::AND, VT, 1816 getNode(ISD::XOR, N1.getValueType(), N1, 1817 getConstant(1, N1.getValueType())), N3); 1818 } else if (N3C) { 1819 if (N3C->getValue()) // select C, X, 1 -> ~C | X 1820 return getNode(ISD::OR, VT, 1821 getNode(ISD::XOR, N1.getValueType(), N1, 1822 getConstant(1, N1.getValueType())), N2); 1823 else // select C, X, 0 -> C & X 1824 return getNode(ISD::AND, VT, N1, N2); 1825 } 1826 1827 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y 1828 return getNode(ISD::OR, VT, N1, N3); 1829 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y 1830 return getNode(ISD::AND, VT, N1, N2); 1831 } 1832 if (N1.getOpcode() == ISD::SETCC) { 1833 SDOperand Simp = SimplifySelectCC(N1.getOperand(0), N1.getOperand(1), N2, 1834 N3, cast<CondCodeSDNode>(N1.getOperand(2))->get()); 1835 if (Simp.Val) return Simp; 1836 } 1837 break; 1838 case ISD::BRCOND: 1839 if (N2C) 1840 if (N2C->getValue()) // Unconditional branch 1841 return getNode(ISD::BR, MVT::Other, N1, N3); 1842 else 1843 return N1; // Never-taken branch 1844 break; 1845 } 1846 1847 std::vector<SDOperand> Ops; 1848 Ops.reserve(3); 1849 Ops.push_back(N1); 1850 Ops.push_back(N2); 1851 Ops.push_back(N3); 1852 1853 // Memoize node if it doesn't produce a flag. 1854 SDNode *N; 1855 if (VT != MVT::Flag) { 1856 SDNode *&E = OneResultNodes[std::make_pair(Opcode,std::make_pair(VT, Ops))]; 1857 if (E) return SDOperand(E, 0); 1858 E = N = new SDNode(Opcode, N1, N2, N3); 1859 } else { 1860 N = new SDNode(Opcode, N1, N2, N3); 1861 } 1862 N->setValueTypes(VT); 1863 AllNodes.push_back(N); 1864 return SDOperand(N, 0); 1865} 1866 1867SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1868 SDOperand N1, SDOperand N2, SDOperand N3, 1869 SDOperand N4) { 1870 std::vector<SDOperand> Ops; 1871 Ops.reserve(4); 1872 Ops.push_back(N1); 1873 Ops.push_back(N2); 1874 Ops.push_back(N3); 1875 Ops.push_back(N4); 1876 return getNode(Opcode, VT, Ops); 1877} 1878 1879SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1880 SDOperand N1, SDOperand N2, SDOperand N3, 1881 SDOperand N4, SDOperand N5) { 1882 std::vector<SDOperand> Ops; 1883 Ops.reserve(5); 1884 Ops.push_back(N1); 1885 Ops.push_back(N2); 1886 Ops.push_back(N3); 1887 Ops.push_back(N4); 1888 Ops.push_back(N5); 1889 return getNode(Opcode, VT, Ops); 1890} 1891 1892 1893SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) { 1894 assert((!V || isa<PointerType>(V->getType())) && 1895 "SrcValue is not a pointer?"); 1896 SDNode *&N = ValueNodes[std::make_pair(V, Offset)]; 1897 if (N) return SDOperand(N, 0); 1898 1899 N = new SrcValueSDNode(V, Offset); 1900 AllNodes.push_back(N); 1901 return SDOperand(N, 0); 1902} 1903 1904SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1905 std::vector<SDOperand> &Ops) { 1906 switch (Ops.size()) { 1907 case 0: return getNode(Opcode, VT); 1908 case 1: return getNode(Opcode, VT, Ops[0]); 1909 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 1910 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 1911 default: break; 1912 } 1913 1914 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val); 1915 switch (Opcode) { 1916 default: break; 1917 case ISD::BRCONDTWOWAY: 1918 if (N1C) 1919 if (N1C->getValue()) // Unconditional branch to true dest. 1920 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]); 1921 else // Unconditional branch to false dest. 1922 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]); 1923 break; 1924 case ISD::BRTWOWAY_CC: 1925 assert(Ops.size() == 6 && "BRTWOWAY_CC takes 6 operands!"); 1926 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1927 "LHS and RHS of comparison must have same type!"); 1928 break; 1929 case ISD::TRUNCSTORE: { 1930 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!"); 1931 MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT(); 1932#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1933 // If this is a truncating store of a constant, convert to the desired type 1934 // and store it instead. 1935 if (isa<Constant>(Ops[0])) { 1936 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1937 if (isa<Constant>(Op)) 1938 N1 = Op; 1939 } 1940 // Also for ConstantFP? 1941#endif 1942 if (Ops[0].getValueType() == EVT) // Normal store? 1943 return getNode(ISD::STORE, VT, Ops[0], Ops[1], Ops[2], Ops[3]); 1944 assert(Ops[1].getValueType() > EVT && "Not a truncation?"); 1945 assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) && 1946 "Can't do FP-INT conversion!"); 1947 break; 1948 } 1949 case ISD::SELECT_CC: { 1950 assert(Ops.size() == 5 && "SELECT_CC takes 5 operands!"); 1951 assert(Ops[0].getValueType() == Ops[1].getValueType() && 1952 "LHS and RHS of condition must have same type!"); 1953 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1954 "True and False arms of SelectCC must have same type!"); 1955 assert(Ops[2].getValueType() == VT && 1956 "select_cc node must be of same type as true and false value!"); 1957 SDOperand Simp = SimplifySelectCC(Ops[0], Ops[1], Ops[2], Ops[3], 1958 cast<CondCodeSDNode>(Ops[4])->get()); 1959 if (Simp.Val) return Simp; 1960 break; 1961 } 1962 case ISD::BR_CC: { 1963 assert(Ops.size() == 5 && "BR_CC takes 5 operands!"); 1964 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1965 "LHS/RHS of comparison should match types!"); 1966 1967 if (CombinerEnabled) break; // xforms moved to dag combine. 1968 1969 // Use SimplifySetCC to simplify SETCC's. 1970 SDOperand Simp = SimplifySetCC(MVT::i1, Ops[2], Ops[3], 1971 cast<CondCodeSDNode>(Ops[1])->get()); 1972 if (Simp.Val) { 1973 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Simp)) { 1974 if (C->getValue() & 1) // Unconditional branch 1975 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[4]); 1976 else 1977 return Ops[0]; // Unconditional Fall through 1978 } else if (Simp.Val->getOpcode() == ISD::SETCC) { 1979 Ops[2] = Simp.getOperand(0); 1980 Ops[3] = Simp.getOperand(1); 1981 Ops[1] = Simp.getOperand(2); 1982 } 1983 } 1984 break; 1985 } 1986 } 1987 1988 // Memoize nodes. 1989 SDNode *N; 1990 if (VT != MVT::Flag) { 1991 SDNode *&E = 1992 OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1993 if (E) return SDOperand(E, 0); 1994 E = N = new SDNode(Opcode, Ops); 1995 } else { 1996 N = new SDNode(Opcode, Ops); 1997 } 1998 N->setValueTypes(VT); 1999 AllNodes.push_back(N); 2000 return SDOperand(N, 0); 2001} 2002 2003SDOperand SelectionDAG::getNode(unsigned Opcode, 2004 std::vector<MVT::ValueType> &ResultTys, 2005 std::vector<SDOperand> &Ops) { 2006 if (ResultTys.size() == 1) 2007 return getNode(Opcode, ResultTys[0], Ops); 2008 2009 switch (Opcode) { 2010 case ISD::EXTLOAD: 2011 case ISD::SEXTLOAD: 2012 case ISD::ZEXTLOAD: { 2013 MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT(); 2014 assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!"); 2015 // If they are asking for an extending load from/to the same thing, return a 2016 // normal load. 2017 if (ResultTys[0] == EVT) 2018 return getLoad(ResultTys[0], Ops[0], Ops[1], Ops[2]); 2019 assert(EVT < ResultTys[0] && 2020 "Should only be an extending load, not truncating!"); 2021 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(ResultTys[0])) && 2022 "Cannot sign/zero extend a FP load!"); 2023 assert(MVT::isInteger(ResultTys[0]) == MVT::isInteger(EVT) && 2024 "Cannot convert from FP to Int or Int -> FP!"); 2025 break; 2026 } 2027 2028 // FIXME: figure out how to safely handle things like 2029 // int foo(int x) { return 1 << (x & 255); } 2030 // int bar() { return foo(256); } 2031#if 0 2032 case ISD::SRA_PARTS: 2033 case ISD::SRL_PARTS: 2034 case ISD::SHL_PARTS: 2035 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 2036 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 2037 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 2038 else if (N3.getOpcode() == ISD::AND) 2039 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 2040 // If the and is only masking out bits that cannot effect the shift, 2041 // eliminate the and. 2042 unsigned NumBits = MVT::getSizeInBits(VT)*2; 2043 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 2044 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 2045 } 2046 break; 2047#endif 2048 } 2049 2050 // Memoize the node unless it returns a flag. 2051 SDNode *N; 2052 if (ResultTys.back() != MVT::Flag) { 2053 SDNode *&E = 2054 ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, Ops))]; 2055 if (E) return SDOperand(E, 0); 2056 E = N = new SDNode(Opcode, Ops); 2057 } else { 2058 N = new SDNode(Opcode, Ops); 2059 } 2060 N->setValueTypes(ResultTys); 2061 AllNodes.push_back(N); 2062 return SDOperand(N, 0); 2063} 2064 2065 2066/// SelectNodeTo - These are used for target selectors to *mutate* the 2067/// specified node to have the specified return type, Target opcode, and 2068/// operands. Note that target opcodes are stored as 2069/// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field. 2070void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2071 MVT::ValueType VT) { 2072 RemoveNodeFromCSEMaps(N); 2073 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2074 N->setValueTypes(VT); 2075} 2076void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2077 MVT::ValueType VT, SDOperand Op1) { 2078 RemoveNodeFromCSEMaps(N); 2079 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2080 N->setValueTypes(VT); 2081 N->setOperands(Op1); 2082} 2083void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2084 MVT::ValueType VT, SDOperand Op1, 2085 SDOperand Op2) { 2086 RemoveNodeFromCSEMaps(N); 2087 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2088 N->setValueTypes(VT); 2089 N->setOperands(Op1, Op2); 2090} 2091void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2092 MVT::ValueType VT1, MVT::ValueType VT2, 2093 SDOperand Op1, SDOperand Op2) { 2094 RemoveNodeFromCSEMaps(N); 2095 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2096 N->setValueTypes(VT1, VT2); 2097 N->setOperands(Op1, Op2); 2098} 2099void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2100 MVT::ValueType VT, SDOperand Op1, 2101 SDOperand Op2, SDOperand Op3) { 2102 RemoveNodeFromCSEMaps(N); 2103 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2104 N->setValueTypes(VT); 2105 N->setOperands(Op1, Op2, Op3); 2106} 2107void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2108 MVT::ValueType VT1, MVT::ValueType VT2, 2109 SDOperand Op1, SDOperand Op2, SDOperand Op3) { 2110 RemoveNodeFromCSEMaps(N); 2111 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2112 N->setValueTypes(VT1, VT2); 2113 N->setOperands(Op1, Op2, Op3); 2114} 2115 2116void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2117 MVT::ValueType VT, SDOperand Op1, 2118 SDOperand Op2, SDOperand Op3, SDOperand Op4) { 2119 RemoveNodeFromCSEMaps(N); 2120 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2121 N->setValueTypes(VT); 2122 N->setOperands(Op1, Op2, Op3, Op4); 2123} 2124void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2125 MVT::ValueType VT, SDOperand Op1, 2126 SDOperand Op2, SDOperand Op3, SDOperand Op4, 2127 SDOperand Op5) { 2128 RemoveNodeFromCSEMaps(N); 2129 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2130 N->setValueTypes(VT); 2131 N->setOperands(Op1, Op2, Op3, Op4, Op5); 2132} 2133 2134/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 2135/// This can cause recursive merging of nodes in the DAG. 2136/// 2137/// This version assumes From/To have a single result value. 2138/// 2139void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand ToN, 2140 std::vector<SDNode*> *Deleted) { 2141 SDNode *From = FromN.Val, *To = ToN.Val; 2142 assert(From->getNumValues() == 1 && To->getNumValues() == 1 && 2143 "Cannot replace with this method!"); 2144 assert(From != To && "Cannot replace uses of with self"); 2145 2146 while (!From->use_empty()) { 2147 // Process users until they are all gone. 2148 SDNode *U = *From->use_begin(); 2149 2150 // This node is about to morph, remove its old self from the CSE maps. 2151 RemoveNodeFromCSEMaps(U); 2152 2153 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 2154 if (U->getOperand(i).Val == From) { 2155 From->removeUser(U); 2156 U->Operands[i].Val = To; 2157 To->addUser(U); 2158 } 2159 2160 // Now that we have modified U, add it back to the CSE maps. If it already 2161 // exists there, recursively merge the results together. 2162 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 2163 ReplaceAllUsesWith(U, Existing, Deleted); 2164 // U is now dead. 2165 if (Deleted) Deleted->push_back(U); 2166 DeleteNodeNotInCSEMaps(U); 2167 } 2168 } 2169} 2170 2171/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 2172/// This can cause recursive merging of nodes in the DAG. 2173/// 2174/// This version assumes From/To have matching types and numbers of result 2175/// values. 2176/// 2177void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 2178 std::vector<SDNode*> *Deleted) { 2179 assert(From != To && "Cannot replace uses of with self"); 2180 assert(From->getNumValues() == To->getNumValues() && 2181 "Cannot use this version of ReplaceAllUsesWith!"); 2182 if (From->getNumValues() == 1) { // If possible, use the faster version. 2183 ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0), Deleted); 2184 return; 2185 } 2186 2187 while (!From->use_empty()) { 2188 // Process users until they are all gone. 2189 SDNode *U = *From->use_begin(); 2190 2191 // This node is about to morph, remove its old self from the CSE maps. 2192 RemoveNodeFromCSEMaps(U); 2193 2194 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 2195 if (U->getOperand(i).Val == From) { 2196 From->removeUser(U); 2197 U->Operands[i].Val = To; 2198 To->addUser(U); 2199 } 2200 2201 // Now that we have modified U, add it back to the CSE maps. If it already 2202 // exists there, recursively merge the results together. 2203 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 2204 ReplaceAllUsesWith(U, Existing, Deleted); 2205 // U is now dead. 2206 if (Deleted) Deleted->push_back(U); 2207 DeleteNodeNotInCSEMaps(U); 2208 } 2209 } 2210} 2211 2212/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 2213/// This can cause recursive merging of nodes in the DAG. 2214/// 2215/// This version can replace From with any result values. To must match the 2216/// number and types of values returned by From. 2217void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 2218 const std::vector<SDOperand> &To, 2219 std::vector<SDNode*> *Deleted) { 2220 assert(From->getNumValues() == To.size() && 2221 "Incorrect number of values to replace with!"); 2222 if (To.size() == 1 && To[0].Val->getNumValues() == 1) { 2223 // Degenerate case handled above. 2224 ReplaceAllUsesWith(SDOperand(From, 0), To[0], Deleted); 2225 return; 2226 } 2227 2228 while (!From->use_empty()) { 2229 // Process users until they are all gone. 2230 SDNode *U = *From->use_begin(); 2231 2232 // This node is about to morph, remove its old self from the CSE maps. 2233 RemoveNodeFromCSEMaps(U); 2234 2235 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 2236 if (U->getOperand(i).Val == From) { 2237 const SDOperand &ToOp = To[U->getOperand(i).ResNo]; 2238 From->removeUser(U); 2239 U->Operands[i] = ToOp; 2240 ToOp.Val->addUser(U); 2241 } 2242 2243 // Now that we have modified U, add it back to the CSE maps. If it already 2244 // exists there, recursively merge the results together. 2245 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 2246 ReplaceAllUsesWith(U, Existing, Deleted); 2247 // U is now dead. 2248 if (Deleted) Deleted->push_back(U); 2249 DeleteNodeNotInCSEMaps(U); 2250 } 2251 } 2252} 2253 2254 2255//===----------------------------------------------------------------------===// 2256// SDNode Class 2257//===----------------------------------------------------------------------===// 2258 2259/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 2260/// indicated value. This method ignores uses of other values defined by this 2261/// operation. 2262bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 2263 assert(Value < getNumValues() && "Bad value!"); 2264 2265 // If there is only one value, this is easy. 2266 if (getNumValues() == 1) 2267 return use_size() == NUses; 2268 if (Uses.size() < NUses) return false; 2269 2270 SDOperand TheValue(this, Value); 2271 2272 std::set<SDNode*> UsersHandled; 2273 2274 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 2275 UI != E; ++UI) { 2276 SDNode *User = *UI; 2277 if (User->getNumOperands() == 1 || 2278 UsersHandled.insert(User).second) // First time we've seen this? 2279 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 2280 if (User->getOperand(i) == TheValue) { 2281 if (NUses == 0) 2282 return false; // too many uses 2283 --NUses; 2284 } 2285 } 2286 2287 // Found exactly the right number of uses? 2288 return NUses == 0; 2289} 2290 2291 2292const char *SDNode::getOperationName(const SelectionDAG *G) const { 2293 switch (getOpcode()) { 2294 default: 2295 if (getOpcode() < ISD::BUILTIN_OP_END) 2296 return "<<Unknown DAG Node>>"; 2297 else { 2298 if (G) 2299 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 2300 if (getOpcode()-ISD::BUILTIN_OP_END < TII->getNumOpcodes()) 2301 return TII->getName(getOpcode()-ISD::BUILTIN_OP_END); 2302 return "<<Unknown Target Node>>"; 2303 } 2304 2305 case ISD::PCMARKER: return "PCMarker"; 2306 case ISD::SRCVALUE: return "SrcValue"; 2307 case ISD::VALUETYPE: return "ValueType"; 2308 case ISD::EntryToken: return "EntryToken"; 2309 case ISD::TokenFactor: return "TokenFactor"; 2310 case ISD::AssertSext: return "AssertSext"; 2311 case ISD::AssertZext: return "AssertZext"; 2312 case ISD::Constant: return "Constant"; 2313 case ISD::TargetConstant: return "TargetConstant"; 2314 case ISD::ConstantFP: return "ConstantFP"; 2315 case ISD::GlobalAddress: return "GlobalAddress"; 2316 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 2317 case ISD::FrameIndex: return "FrameIndex"; 2318 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 2319 case ISD::BasicBlock: return "BasicBlock"; 2320 case ISD::Register: return "Register"; 2321 case ISD::ExternalSymbol: return "ExternalSymbol"; 2322 case ISD::ConstantPool: return "ConstantPool"; 2323 case ISD::TargetConstantPool: return "TargetConstantPool"; 2324 case ISD::CopyToReg: return "CopyToReg"; 2325 case ISD::CopyFromReg: return "CopyFromReg"; 2326 case ISD::ImplicitDef: return "ImplicitDef"; 2327 case ISD::UNDEF: return "undef"; 2328 2329 // Unary operators 2330 case ISD::FABS: return "fabs"; 2331 case ISD::FNEG: return "fneg"; 2332 case ISD::FSQRT: return "fsqrt"; 2333 case ISD::FSIN: return "fsin"; 2334 case ISD::FCOS: return "fcos"; 2335 2336 // Binary operators 2337 case ISD::ADD: return "add"; 2338 case ISD::SUB: return "sub"; 2339 case ISD::MUL: return "mul"; 2340 case ISD::MULHU: return "mulhu"; 2341 case ISD::MULHS: return "mulhs"; 2342 case ISD::SDIV: return "sdiv"; 2343 case ISD::UDIV: return "udiv"; 2344 case ISD::SREM: return "srem"; 2345 case ISD::UREM: return "urem"; 2346 case ISD::AND: return "and"; 2347 case ISD::OR: return "or"; 2348 case ISD::XOR: return "xor"; 2349 case ISD::SHL: return "shl"; 2350 case ISD::SRA: return "sra"; 2351 case ISD::SRL: return "srl"; 2352 case ISD::FADD: return "fadd"; 2353 case ISD::FSUB: return "fsub"; 2354 case ISD::FMUL: return "fmul"; 2355 case ISD::FDIV: return "fdiv"; 2356 case ISD::FREM: return "frem"; 2357 2358 case ISD::SETCC: return "setcc"; 2359 case ISD::SELECT: return "select"; 2360 case ISD::SELECT_CC: return "select_cc"; 2361 case ISD::ADD_PARTS: return "add_parts"; 2362 case ISD::SUB_PARTS: return "sub_parts"; 2363 case ISD::SHL_PARTS: return "shl_parts"; 2364 case ISD::SRA_PARTS: return "sra_parts"; 2365 case ISD::SRL_PARTS: return "srl_parts"; 2366 2367 // Conversion operators. 2368 case ISD::SIGN_EXTEND: return "sign_extend"; 2369 case ISD::ZERO_EXTEND: return "zero_extend"; 2370 case ISD::ANY_EXTEND: return "any_extend"; 2371 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 2372 case ISD::TRUNCATE: return "truncate"; 2373 case ISD::FP_ROUND: return "fp_round"; 2374 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 2375 case ISD::FP_EXTEND: return "fp_extend"; 2376 2377 case ISD::SINT_TO_FP: return "sint_to_fp"; 2378 case ISD::UINT_TO_FP: return "uint_to_fp"; 2379 case ISD::FP_TO_SINT: return "fp_to_sint"; 2380 case ISD::FP_TO_UINT: return "fp_to_uint"; 2381 2382 // Control flow instructions 2383 case ISD::BR: return "br"; 2384 case ISD::BRCOND: return "brcond"; 2385 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 2386 case ISD::BR_CC: return "br_cc"; 2387 case ISD::BRTWOWAY_CC: return "brtwoway_cc"; 2388 case ISD::RET: return "ret"; 2389 case ISD::CALL: return "call"; 2390 case ISD::TAILCALL:return "tailcall"; 2391 case ISD::CALLSEQ_START: return "callseq_start"; 2392 case ISD::CALLSEQ_END: return "callseq_end"; 2393 2394 // Other operators 2395 case ISD::LOAD: return "load"; 2396 case ISD::STORE: return "store"; 2397 case ISD::EXTLOAD: return "extload"; 2398 case ISD::SEXTLOAD: return "sextload"; 2399 case ISD::ZEXTLOAD: return "zextload"; 2400 case ISD::TRUNCSTORE: return "truncstore"; 2401 2402 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 2403 case ISD::EXTRACT_ELEMENT: return "extract_element"; 2404 case ISD::BUILD_PAIR: return "build_pair"; 2405 case ISD::MEMSET: return "memset"; 2406 case ISD::MEMCPY: return "memcpy"; 2407 case ISD::MEMMOVE: return "memmove"; 2408 2409 // Bit counting 2410 case ISD::CTPOP: return "ctpop"; 2411 case ISD::CTTZ: return "cttz"; 2412 case ISD::CTLZ: return "ctlz"; 2413 2414 // IO Intrinsics 2415 case ISD::READPORT: return "readport"; 2416 case ISD::WRITEPORT: return "writeport"; 2417 case ISD::READIO: return "readio"; 2418 case ISD::WRITEIO: return "writeio"; 2419 2420 case ISD::CONDCODE: 2421 switch (cast<CondCodeSDNode>(this)->get()) { 2422 default: assert(0 && "Unknown setcc condition!"); 2423 case ISD::SETOEQ: return "setoeq"; 2424 case ISD::SETOGT: return "setogt"; 2425 case ISD::SETOGE: return "setoge"; 2426 case ISD::SETOLT: return "setolt"; 2427 case ISD::SETOLE: return "setole"; 2428 case ISD::SETONE: return "setone"; 2429 2430 case ISD::SETO: return "seto"; 2431 case ISD::SETUO: return "setuo"; 2432 case ISD::SETUEQ: return "setue"; 2433 case ISD::SETUGT: return "setugt"; 2434 case ISD::SETUGE: return "setuge"; 2435 case ISD::SETULT: return "setult"; 2436 case ISD::SETULE: return "setule"; 2437 case ISD::SETUNE: return "setune"; 2438 2439 case ISD::SETEQ: return "seteq"; 2440 case ISD::SETGT: return "setgt"; 2441 case ISD::SETGE: return "setge"; 2442 case ISD::SETLT: return "setlt"; 2443 case ISD::SETLE: return "setle"; 2444 case ISD::SETNE: return "setne"; 2445 } 2446 } 2447} 2448 2449void SDNode::dump() const { dump(0); } 2450void SDNode::dump(const SelectionDAG *G) const { 2451 std::cerr << (void*)this << ": "; 2452 2453 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 2454 if (i) std::cerr << ","; 2455 if (getValueType(i) == MVT::Other) 2456 std::cerr << "ch"; 2457 else 2458 std::cerr << MVT::getValueTypeString(getValueType(i)); 2459 } 2460 std::cerr << " = " << getOperationName(G); 2461 2462 std::cerr << " "; 2463 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 2464 if (i) std::cerr << ", "; 2465 std::cerr << (void*)getOperand(i).Val; 2466 if (unsigned RN = getOperand(i).ResNo) 2467 std::cerr << ":" << RN; 2468 } 2469 2470 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 2471 std::cerr << "<" << CSDN->getValue() << ">"; 2472 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 2473 std::cerr << "<" << CSDN->getValue() << ">"; 2474 } else if (const GlobalAddressSDNode *GADN = 2475 dyn_cast<GlobalAddressSDNode>(this)) { 2476 std::cerr << "<"; 2477 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 2478 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 2479 std::cerr << "<" << FIDN->getIndex() << ">"; 2480 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 2481 std::cerr << "<" << *CP->get() << ">"; 2482 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 2483 std::cerr << "<"; 2484 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 2485 if (LBB) 2486 std::cerr << LBB->getName() << " "; 2487 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 2488 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 2489 if (G && MRegisterInfo::isPhysicalRegister(R->getReg())) { 2490 std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg()); 2491 } else { 2492 std::cerr << " #" << R->getReg(); 2493 } 2494 } else if (const ExternalSymbolSDNode *ES = 2495 dyn_cast<ExternalSymbolSDNode>(this)) { 2496 std::cerr << "'" << ES->getSymbol() << "'"; 2497 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 2498 if (M->getValue()) 2499 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">"; 2500 else 2501 std::cerr << "<null:" << M->getOffset() << ">"; 2502 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 2503 std::cerr << ":" << getValueTypeString(N->getVT()); 2504 } 2505} 2506 2507static void DumpNodes(SDNode *N, unsigned indent, const SelectionDAG *G) { 2508 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 2509 if (N->getOperand(i).Val->hasOneUse()) 2510 DumpNodes(N->getOperand(i).Val, indent+2, G); 2511 else 2512 std::cerr << "\n" << std::string(indent+2, ' ') 2513 << (void*)N->getOperand(i).Val << ": <multiple use>"; 2514 2515 2516 std::cerr << "\n" << std::string(indent, ' '); 2517 N->dump(G); 2518} 2519 2520void SelectionDAG::dump() const { 2521 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 2522 std::vector<SDNode*> Nodes(AllNodes); 2523 std::sort(Nodes.begin(), Nodes.end()); 2524 2525 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 2526 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 2527 DumpNodes(Nodes[i], 2, this); 2528 } 2529 2530 DumpNodes(getRoot().Val, 2, this); 2531 2532 std::cerr << "\n\n"; 2533} 2534 2535