SelectionDAG.cpp revision 472d12c47f1704853971a564e03c5490ce5066b7
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Support/MathExtras.h" 28#include "llvm/Target/TargetRegisterInfo.h" 29#include "llvm/Target/TargetData.h" 30#include "llvm/Target/TargetLowering.h" 31#include "llvm/Target/TargetInstrInfo.h" 32#include "llvm/Target/TargetMachine.h" 33#include "llvm/ADT/SetVector.h" 34#include "llvm/ADT/SmallPtrSet.h" 35#include "llvm/ADT/SmallSet.h" 36#include "llvm/ADT/SmallVector.h" 37#include "llvm/ADT/StringExtras.h" 38#include <algorithm> 39#include <cmath> 40using namespace llvm; 41 42/// makeVTList - Return an instance of the SDVTList struct initialized with the 43/// specified members. 44static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 45 SDVTList Res = {VTs, NumVTs}; 46 return Res; 47} 48 49static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 50 switch (VT.getSimpleVT()) { 51 default: assert(0 && "Unknown FP format"); 52 case MVT::f32: return &APFloat::IEEEsingle; 53 case MVT::f64: return &APFloat::IEEEdouble; 54 case MVT::f80: return &APFloat::x87DoubleExtended; 55 case MVT::f128: return &APFloat::IEEEquad; 56 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 57 } 58} 59 60SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 61 62//===----------------------------------------------------------------------===// 63// ConstantFPSDNode Class 64//===----------------------------------------------------------------------===// 65 66/// isExactlyValue - We don't rely on operator== working on double values, as 67/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 68/// As such, this method can be used to do an exact bit-for-bit comparison of 69/// two floating point values. 70bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 71 return Value.bitwiseIsEqual(V); 72} 73 74bool ConstantFPSDNode::isValueValidForType(MVT VT, 75 const APFloat& Val) { 76 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 77 78 // PPC long double cannot be converted to any other type. 79 if (VT == MVT::ppcf128 || 80 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 81 return false; 82 83 // convert modifies in place, so make a copy. 84 APFloat Val2 = APFloat(Val); 85 return Val2.convert(*MVTToAPFloatSemantics(VT), 86 APFloat::rmNearestTiesToEven) == APFloat::opOK; 87} 88 89//===----------------------------------------------------------------------===// 90// ISD Namespace 91//===----------------------------------------------------------------------===// 92 93/// isBuildVectorAllOnes - Return true if the specified node is a 94/// BUILD_VECTOR where all of the elements are ~0 or undef. 95bool ISD::isBuildVectorAllOnes(const SDNode *N) { 96 // Look through a bit convert. 97 if (N->getOpcode() == ISD::BIT_CONVERT) 98 N = N->getOperand(0).Val; 99 100 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 101 102 unsigned i = 0, e = N->getNumOperands(); 103 104 // Skip over all of the undef values. 105 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 106 ++i; 107 108 // Do not accept an all-undef vector. 109 if (i == e) return false; 110 111 // Do not accept build_vectors that aren't all constants or which have non-~0 112 // elements. 113 SDOperand NotZero = N->getOperand(i); 114 if (isa<ConstantSDNode>(NotZero)) { 115 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 116 return false; 117 } else if (isa<ConstantFPSDNode>(NotZero)) { 118 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 119 convertToAPInt().isAllOnesValue()) 120 return false; 121 } else 122 return false; 123 124 // Okay, we have at least one ~0 value, check to see if the rest match or are 125 // undefs. 126 for (++i; i != e; ++i) 127 if (N->getOperand(i) != NotZero && 128 N->getOperand(i).getOpcode() != ISD::UNDEF) 129 return false; 130 return true; 131} 132 133 134/// isBuildVectorAllZeros - Return true if the specified node is a 135/// BUILD_VECTOR where all of the elements are 0 or undef. 136bool ISD::isBuildVectorAllZeros(const SDNode *N) { 137 // Look through a bit convert. 138 if (N->getOpcode() == ISD::BIT_CONVERT) 139 N = N->getOperand(0).Val; 140 141 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 142 143 unsigned i = 0, e = N->getNumOperands(); 144 145 // Skip over all of the undef values. 146 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 147 ++i; 148 149 // Do not accept an all-undef vector. 150 if (i == e) return false; 151 152 // Do not accept build_vectors that aren't all constants or which have non-~0 153 // elements. 154 SDOperand Zero = N->getOperand(i); 155 if (isa<ConstantSDNode>(Zero)) { 156 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 157 return false; 158 } else if (isa<ConstantFPSDNode>(Zero)) { 159 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 160 return false; 161 } else 162 return false; 163 164 // Okay, we have at least one ~0 value, check to see if the rest match or are 165 // undefs. 166 for (++i; i != e; ++i) 167 if (N->getOperand(i) != Zero && 168 N->getOperand(i).getOpcode() != ISD::UNDEF) 169 return false; 170 return true; 171} 172 173/// isScalarToVector - Return true if the specified node is a 174/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 175/// element is not an undef. 176bool ISD::isScalarToVector(const SDNode *N) { 177 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 178 return true; 179 180 if (N->getOpcode() != ISD::BUILD_VECTOR) 181 return false; 182 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 183 return false; 184 unsigned NumElems = N->getNumOperands(); 185 for (unsigned i = 1; i < NumElems; ++i) { 186 SDOperand V = N->getOperand(i); 187 if (V.getOpcode() != ISD::UNDEF) 188 return false; 189 } 190 return true; 191} 192 193 194/// isDebugLabel - Return true if the specified node represents a debug 195/// label (i.e. ISD::LABEL or TargetInstrInfo::LABEL node and third operand 196/// is 0). 197bool ISD::isDebugLabel(const SDNode *N) { 198 SDOperand Zero; 199 if (N->getOpcode() == ISD::LABEL) 200 Zero = N->getOperand(2); 201 else if (N->isTargetOpcode() && 202 N->getTargetOpcode() == TargetInstrInfo::LABEL) 203 // Chain moved to last operand. 204 Zero = N->getOperand(1); 205 else 206 return false; 207 return isa<ConstantSDNode>(Zero) && cast<ConstantSDNode>(Zero)->isNullValue(); 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 if (Operation > ISD::SETTRUE2) 231 Operation &= ~8; // Don't let N and U bits get set. 232 return ISD::CondCode(Operation); 233} 234 235 236/// isSignedOp - For an integer comparison, return 1 if the comparison is a 237/// signed operation and 2 if the result is an unsigned comparison. Return zero 238/// if the operation does not depend on the sign of the input (setne and seteq). 239static int isSignedOp(ISD::CondCode Opcode) { 240 switch (Opcode) { 241 default: assert(0 && "Illegal integer setcc operation!"); 242 case ISD::SETEQ: 243 case ISD::SETNE: return 0; 244 case ISD::SETLT: 245 case ISD::SETLE: 246 case ISD::SETGT: 247 case ISD::SETGE: return 1; 248 case ISD::SETULT: 249 case ISD::SETULE: 250 case ISD::SETUGT: 251 case ISD::SETUGE: return 2; 252 } 253} 254 255/// getSetCCOrOperation - Return the result of a logical OR between different 256/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 257/// returns SETCC_INVALID if it is not possible to represent the resultant 258/// comparison. 259ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 260 bool isInteger) { 261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 262 // Cannot fold a signed integer setcc with an unsigned integer setcc. 263 return ISD::SETCC_INVALID; 264 265 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 266 267 // If the N and U bits get set then the resultant comparison DOES suddenly 268 // care about orderedness, and is true when ordered. 269 if (Op > ISD::SETTRUE2) 270 Op &= ~16; // Clear the U bit if the N bit is set. 271 272 // Canonicalize illegal integer setcc's. 273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 274 Op = ISD::SETNE; 275 276 return ISD::CondCode(Op); 277} 278 279/// getSetCCAndOperation - Return the result of a logical AND between different 280/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 281/// function returns zero if it is not possible to represent the resultant 282/// comparison. 283ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 284 bool isInteger) { 285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 286 // Cannot fold a signed setcc with an unsigned setcc. 287 return ISD::SETCC_INVALID; 288 289 // Combine all of the condition bits. 290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 291 292 // Canonicalize illegal integer setcc's. 293 if (isInteger) { 294 switch (Result) { 295 default: break; 296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 297 case ISD::SETOEQ: // SETEQ & SETU[LG]E 298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 301 } 302 } 303 304 return Result; 305} 306 307const TargetMachine &SelectionDAG::getTarget() const { 308 return TLI.getTargetMachine(); 309} 310 311//===----------------------------------------------------------------------===// 312// SDNode Profile Support 313//===----------------------------------------------------------------------===// 314 315/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 316/// 317static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 318 ID.AddInteger(OpC); 319} 320 321/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 322/// solely with their pointer. 323static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 324 ID.AddPointer(VTList.VTs); 325} 326 327/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 328/// 329static void AddNodeIDOperands(FoldingSetNodeID &ID, 330 SDOperandPtr Ops, unsigned NumOps) { 331 for (; NumOps; --NumOps, ++Ops) { 332 ID.AddPointer(Ops->Val); 333 ID.AddInteger(Ops->ResNo); 334 } 335} 336 337static void AddNodeIDNode(FoldingSetNodeID &ID, 338 unsigned short OpC, SDVTList VTList, 339 SDOperandPtr OpList, unsigned N) { 340 AddNodeIDOpcode(ID, OpC); 341 AddNodeIDValueTypes(ID, VTList); 342 AddNodeIDOperands(ID, OpList, N); 343} 344 345 346/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 347/// data. 348static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) { 349 AddNodeIDOpcode(ID, N->getOpcode()); 350 // Add the return value info. 351 AddNodeIDValueTypes(ID, N->getVTList()); 352 // Add the operand info. 353 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 354 355 // Handle SDNode leafs with special info. 356 switch (N->getOpcode()) { 357 default: break; // Normal nodes don't need extra info. 358 case ISD::ARG_FLAGS: 359 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 360 break; 361 case ISD::TargetConstant: 362 case ISD::Constant: 363 ID.Add(cast<ConstantSDNode>(N)->getAPIntValue()); 364 break; 365 case ISD::TargetConstantFP: 366 case ISD::ConstantFP: { 367 ID.Add(cast<ConstantFPSDNode>(N)->getValueAPF()); 368 break; 369 } 370 case ISD::TargetGlobalAddress: 371 case ISD::GlobalAddress: 372 case ISD::TargetGlobalTLSAddress: 373 case ISD::GlobalTLSAddress: { 374 GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 375 ID.AddPointer(GA->getGlobal()); 376 ID.AddInteger(GA->getOffset()); 377 break; 378 } 379 case ISD::BasicBlock: 380 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 381 break; 382 case ISD::Register: 383 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 384 break; 385 case ISD::DBG_STOPPOINT: { 386 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 387 ID.AddInteger(DSP->getLine()); 388 ID.AddInteger(DSP->getColumn()); 389 ID.AddPointer(DSP->getCompileUnit()); 390 break; 391 } 392 case ISD::SRCVALUE: 393 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 394 break; 395 case ISD::MEMOPERAND: { 396 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 397 ID.AddPointer(MO.getValue()); 398 ID.AddInteger(MO.getFlags()); 399 ID.AddInteger(MO.getOffset()); 400 ID.AddInteger(MO.getSize()); 401 ID.AddInteger(MO.getAlignment()); 402 break; 403 } 404 case ISD::FrameIndex: 405 case ISD::TargetFrameIndex: 406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 407 break; 408 case ISD::JumpTable: 409 case ISD::TargetJumpTable: 410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 411 break; 412 case ISD::ConstantPool: 413 case ISD::TargetConstantPool: { 414 ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 415 ID.AddInteger(CP->getAlignment()); 416 ID.AddInteger(CP->getOffset()); 417 if (CP->isMachineConstantPoolEntry()) 418 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 419 else 420 ID.AddPointer(CP->getConstVal()); 421 break; 422 } 423 case ISD::LOAD: { 424 LoadSDNode *LD = cast<LoadSDNode>(N); 425 ID.AddInteger(LD->getAddressingMode()); 426 ID.AddInteger(LD->getExtensionType()); 427 ID.AddInteger(LD->getMemoryVT().getRawBits()); 428 ID.AddInteger(LD->getAlignment()); 429 ID.AddInteger(LD->isVolatile()); 430 break; 431 } 432 case ISD::STORE: { 433 StoreSDNode *ST = cast<StoreSDNode>(N); 434 ID.AddInteger(ST->getAddressingMode()); 435 ID.AddInteger(ST->isTruncatingStore()); 436 ID.AddInteger(ST->getMemoryVT().getRawBits()); 437 ID.AddInteger(ST->getAlignment()); 438 ID.AddInteger(ST->isVolatile()); 439 break; 440 } 441 case ISD::ATOMIC_CMP_SWAP: 442 case ISD::ATOMIC_LOAD_ADD: 443 case ISD::ATOMIC_SWAP: 444 case ISD::ATOMIC_LOAD_SUB: 445 case ISD::ATOMIC_LOAD_AND: 446 case ISD::ATOMIC_LOAD_OR: 447 case ISD::ATOMIC_LOAD_XOR: 448 case ISD::ATOMIC_LOAD_NAND: 449 case ISD::ATOMIC_LOAD_MIN: 450 case ISD::ATOMIC_LOAD_MAX: 451 case ISD::ATOMIC_LOAD_UMIN: 452 case ISD::ATOMIC_LOAD_UMAX: { 453 AtomicSDNode *AT = cast<AtomicSDNode>(N); 454 ID.AddInteger(AT->getAlignment()); 455 ID.AddInteger(AT->isVolatile()); 456 break; 457 } 458 } // end switch (N->getOpcode()) 459} 460 461//===----------------------------------------------------------------------===// 462// SelectionDAG Class 463//===----------------------------------------------------------------------===// 464 465/// RemoveDeadNodes - This method deletes all unreachable nodes in the 466/// SelectionDAG. 467void SelectionDAG::RemoveDeadNodes() { 468 // Create a dummy node (which is not added to allnodes), that adds a reference 469 // to the root node, preventing it from being deleted. 470 HandleSDNode Dummy(getRoot()); 471 472 SmallVector<SDNode*, 128> DeadNodes; 473 474 // Add all obviously-dead nodes to the DeadNodes worklist. 475 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 476 if (I->use_empty()) 477 DeadNodes.push_back(I); 478 479 // Process the worklist, deleting the nodes and adding their uses to the 480 // worklist. 481 while (!DeadNodes.empty()) { 482 SDNode *N = DeadNodes.back(); 483 DeadNodes.pop_back(); 484 485 // Take the node out of the appropriate CSE map. 486 RemoveNodeFromCSEMaps(N); 487 488 // Next, brutally remove the operand list. This is safe to do, as there are 489 // no cycles in the graph. 490 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 491 SDNode *Operand = I->getVal(); 492 Operand->removeUser(std::distance(N->op_begin(), I), N); 493 494 // Now that we removed this operand, see if there are no uses of it left. 495 if (Operand->use_empty()) 496 DeadNodes.push_back(Operand); 497 } 498 if (N->OperandsNeedDelete) { 499 delete[] N->OperandList; 500 } 501 N->OperandList = 0; 502 N->NumOperands = 0; 503 504 // Finally, remove N itself. 505 AllNodes.erase(N); 506 } 507 508 // If the root changed (e.g. it was a dead load, update the root). 509 setRoot(Dummy.getValue()); 510} 511 512void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 513 SmallVector<SDNode*, 16> DeadNodes; 514 DeadNodes.push_back(N); 515 516 // Process the worklist, deleting the nodes and adding their uses to the 517 // worklist. 518 while (!DeadNodes.empty()) { 519 SDNode *N = DeadNodes.back(); 520 DeadNodes.pop_back(); 521 522 if (UpdateListener) 523 UpdateListener->NodeDeleted(N, 0); 524 525 // Take the node out of the appropriate CSE map. 526 RemoveNodeFromCSEMaps(N); 527 528 // Next, brutally remove the operand list. This is safe to do, as there are 529 // no cycles in the graph. 530 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 531 SDNode *Operand = I->getVal(); 532 Operand->removeUser(std::distance(N->op_begin(), I), N); 533 534 // Now that we removed this operand, see if there are no uses of it left. 535 if (Operand->use_empty()) 536 DeadNodes.push_back(Operand); 537 } 538 if (N->OperandsNeedDelete) { 539 delete[] N->OperandList; 540 } 541 N->OperandList = 0; 542 N->NumOperands = 0; 543 544 // Finally, remove N itself. 545 AllNodes.erase(N); 546 } 547} 548 549void SelectionDAG::DeleteNode(SDNode *N) { 550 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 551 552 // First take this out of the appropriate CSE map. 553 RemoveNodeFromCSEMaps(N); 554 555 // Finally, remove uses due to operands of this node, remove from the 556 // AllNodes list, and delete the node. 557 DeleteNodeNotInCSEMaps(N); 558} 559 560void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 561 562 // Remove it from the AllNodes list. 563 AllNodes.remove(N); 564 565 // Drop all of the operands and decrement used nodes use counts. 566 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 567 I->getVal()->removeUser(std::distance(N->op_begin(), I), N); 568 if (N->OperandsNeedDelete) { 569 delete[] N->OperandList; 570 } 571 N->OperandList = 0; 572 N->NumOperands = 0; 573 574 delete N; 575} 576 577/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 578/// correspond to it. This is useful when we're about to delete or repurpose 579/// the node. We don't want future request for structurally identical nodes 580/// to return N anymore. 581void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 582 bool Erased = false; 583 switch (N->getOpcode()) { 584 case ISD::HANDLENODE: return; // noop. 585 case ISD::CONDCODE: 586 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 587 "Cond code doesn't exist!"); 588 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 589 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 590 break; 591 case ISD::ExternalSymbol: 592 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 593 break; 594 case ISD::TargetExternalSymbol: 595 Erased = 596 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 597 break; 598 case ISD::VALUETYPE: { 599 MVT VT = cast<VTSDNode>(N)->getVT(); 600 if (VT.isExtended()) { 601 Erased = ExtendedValueTypeNodes.erase(VT); 602 } else { 603 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 604 ValueTypeNodes[VT.getSimpleVT()] = 0; 605 } 606 break; 607 } 608 default: 609 // Remove it from the CSE Map. 610 Erased = CSEMap.RemoveNode(N); 611 break; 612 } 613#ifndef NDEBUG 614 // Verify that the node was actually in one of the CSE maps, unless it has a 615 // flag result (which cannot be CSE'd) or is one of the special cases that are 616 // not subject to CSE. 617 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 618 !N->isTargetOpcode()) { 619 N->dump(this); 620 cerr << "\n"; 621 assert(0 && "Node is not in map!"); 622 } 623#endif 624} 625 626/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 627/// has been taken out and modified in some way. If the specified node already 628/// exists in the CSE maps, do not modify the maps, but return the existing node 629/// instead. If it doesn't exist, add it and return null. 630/// 631SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 632 assert(N->getNumOperands() && "This is a leaf node!"); 633 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 634 return 0; // Never add these nodes. 635 636 // Check that remaining values produced are not flags. 637 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 638 if (N->getValueType(i) == MVT::Flag) 639 return 0; // Never CSE anything that produces a flag. 640 641 SDNode *New = CSEMap.GetOrInsertNode(N); 642 if (New != N) return New; // Node already existed. 643 return 0; 644} 645 646/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 647/// were replaced with those specified. If this node is never memoized, 648/// return null, otherwise return a pointer to the slot it would take. If a 649/// node already exists with these operands, the slot will be non-null. 650SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDOperand Op, 651 void *&InsertPos) { 652 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 653 return 0; // Never add these nodes. 654 655 // Check that remaining values produced are not flags. 656 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 657 if (N->getValueType(i) == MVT::Flag) 658 return 0; // Never CSE anything that produces a flag. 659 660 SDOperand Ops[] = { Op }; 661 FoldingSetNodeID ID; 662 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 663 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 664} 665 666/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 667/// were replaced with those specified. If this node is never memoized, 668/// return null, otherwise return a pointer to the slot it would take. If a 669/// node already exists with these operands, the slot will be non-null. 670SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 671 SDOperand Op1, SDOperand Op2, 672 void *&InsertPos) { 673 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 674 return 0; // Never add these nodes. 675 676 // Check that remaining values produced are not flags. 677 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 678 if (N->getValueType(i) == MVT::Flag) 679 return 0; // Never CSE anything that produces a flag. 680 681 SDOperand Ops[] = { Op1, Op2 }; 682 FoldingSetNodeID ID; 683 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 684 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 685} 686 687 688/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 689/// were replaced with those specified. If this node is never memoized, 690/// return null, otherwise return a pointer to the slot it would take. If a 691/// node already exists with these operands, the slot will be non-null. 692SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 693 SDOperandPtr Ops,unsigned NumOps, 694 void *&InsertPos) { 695 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 696 return 0; // Never add these nodes. 697 698 // Check that remaining values produced are not flags. 699 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 700 if (N->getValueType(i) == MVT::Flag) 701 return 0; // Never CSE anything that produces a flag. 702 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 705 706 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { 707 ID.AddInteger(LD->getAddressingMode()); 708 ID.AddInteger(LD->getExtensionType()); 709 ID.AddInteger(LD->getMemoryVT().getRawBits()); 710 ID.AddInteger(LD->getAlignment()); 711 ID.AddInteger(LD->isVolatile()); 712 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { 713 ID.AddInteger(ST->getAddressingMode()); 714 ID.AddInteger(ST->isTruncatingStore()); 715 ID.AddInteger(ST->getMemoryVT().getRawBits()); 716 ID.AddInteger(ST->getAlignment()); 717 ID.AddInteger(ST->isVolatile()); 718 } 719 720 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 721} 722 723 724SelectionDAG::~SelectionDAG() { 725 while (!AllNodes.empty()) { 726 SDNode *N = AllNodes.begin(); 727 N->SetNextInBucket(0); 728 if (N->OperandsNeedDelete) { 729 delete [] N->OperandList; 730 } 731 N->OperandList = 0; 732 N->NumOperands = 0; 733 AllNodes.pop_front(); 734 } 735} 736 737SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT VT) { 738 if (Op.getValueType() == VT) return Op; 739 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 740 VT.getSizeInBits()); 741 return getNode(ISD::AND, Op.getValueType(), Op, 742 getConstant(Imm, Op.getValueType())); 743} 744 745SDOperand SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 746 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 747 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 748} 749 750SDOperand SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 751 assert(VT.isInteger() && "Cannot create FP integer constant!"); 752 753 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 754 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 755 "APInt size does not match type size!"); 756 757 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 758 FoldingSetNodeID ID; 759 AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0); 760 ID.Add(Val); 761 void *IP = 0; 762 SDNode *N = NULL; 763 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 764 if (!VT.isVector()) 765 return SDOperand(N, 0); 766 if (!N) { 767 N = new ConstantSDNode(isT, Val, EltVT); 768 CSEMap.InsertNode(N, IP); 769 AllNodes.push_back(N); 770 } 771 772 SDOperand Result(N, 0); 773 if (VT.isVector()) { 774 SmallVector<SDOperand, 8> Ops; 775 Ops.assign(VT.getVectorNumElements(), Result); 776 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 777 } 778 return Result; 779} 780 781SDOperand SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 782 return getConstant(Val, TLI.getPointerTy(), isTarget); 783} 784 785 786SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 787 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 788 789 MVT EltVT = 790 VT.isVector() ? VT.getVectorElementType() : VT; 791 792 // Do the map lookup using the actual bit pattern for the floating point 793 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 794 // we don't have issues with SNANs. 795 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 796 FoldingSetNodeID ID; 797 AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0); 798 ID.Add(V); 799 void *IP = 0; 800 SDNode *N = NULL; 801 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 802 if (!VT.isVector()) 803 return SDOperand(N, 0); 804 if (!N) { 805 N = new ConstantFPSDNode(isTarget, V, EltVT); 806 CSEMap.InsertNode(N, IP); 807 AllNodes.push_back(N); 808 } 809 810 SDOperand Result(N, 0); 811 if (VT.isVector()) { 812 SmallVector<SDOperand, 8> Ops; 813 Ops.assign(VT.getVectorNumElements(), Result); 814 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 815 } 816 return Result; 817} 818 819SDOperand SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 820 MVT EltVT = 821 VT.isVector() ? VT.getVectorElementType() : VT; 822 if (EltVT==MVT::f32) 823 return getConstantFP(APFloat((float)Val), VT, isTarget); 824 else 825 return getConstantFP(APFloat(Val), VT, isTarget); 826} 827 828SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 829 MVT VT, int Offset, 830 bool isTargetGA) { 831 unsigned Opc; 832 833 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 834 if (!GVar) { 835 // If GV is an alias then use the aliasee for determining thread-localness. 836 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 837 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal()); 838 } 839 840 if (GVar && GVar->isThreadLocal()) 841 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 842 else 843 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 844 845 FoldingSetNodeID ID; 846 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 847 ID.AddPointer(GV); 848 ID.AddInteger(Offset); 849 void *IP = 0; 850 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 851 return SDOperand(E, 0); 852 SDNode *N = new GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 853 CSEMap.InsertNode(N, IP); 854 AllNodes.push_back(N); 855 return SDOperand(N, 0); 856} 857 858SDOperand SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 859 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 860 FoldingSetNodeID ID; 861 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 862 ID.AddInteger(FI); 863 void *IP = 0; 864 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 865 return SDOperand(E, 0); 866 SDNode *N = new FrameIndexSDNode(FI, VT, isTarget); 867 CSEMap.InsertNode(N, IP); 868 AllNodes.push_back(N); 869 return SDOperand(N, 0); 870} 871 872SDOperand SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 873 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 874 FoldingSetNodeID ID; 875 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 876 ID.AddInteger(JTI); 877 void *IP = 0; 878 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 879 return SDOperand(E, 0); 880 SDNode *N = new JumpTableSDNode(JTI, VT, isTarget); 881 CSEMap.InsertNode(N, IP); 882 AllNodes.push_back(N); 883 return SDOperand(N, 0); 884} 885 886SDOperand SelectionDAG::getConstantPool(Constant *C, MVT VT, 887 unsigned Alignment, int Offset, 888 bool isTarget) { 889 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 890 FoldingSetNodeID ID; 891 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 892 ID.AddInteger(Alignment); 893 ID.AddInteger(Offset); 894 ID.AddPointer(C); 895 void *IP = 0; 896 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 897 return SDOperand(E, 0); 898 SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 899 CSEMap.InsertNode(N, IP); 900 AllNodes.push_back(N); 901 return SDOperand(N, 0); 902} 903 904 905SDOperand SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 906 unsigned Alignment, int Offset, 907 bool isTarget) { 908 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 909 FoldingSetNodeID ID; 910 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0); 911 ID.AddInteger(Alignment); 912 ID.AddInteger(Offset); 913 C->AddSelectionDAGCSEId(ID); 914 void *IP = 0; 915 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 916 return SDOperand(E, 0); 917 SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 918 CSEMap.InsertNode(N, IP); 919 AllNodes.push_back(N); 920 return SDOperand(N, 0); 921} 922 923 924SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 925 FoldingSetNodeID ID; 926 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), (SDOperand*)0, 0); 927 ID.AddPointer(MBB); 928 void *IP = 0; 929 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 930 return SDOperand(E, 0); 931 SDNode *N = new BasicBlockSDNode(MBB); 932 CSEMap.InsertNode(N, IP); 933 AllNodes.push_back(N); 934 return SDOperand(N, 0); 935} 936 937SDOperand SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 938 FoldingSetNodeID ID; 939 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), (SDOperand*)0, 0); 940 ID.AddInteger(Flags.getRawBits()); 941 void *IP = 0; 942 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 943 return SDOperand(E, 0); 944 SDNode *N = new ARG_FLAGSSDNode(Flags); 945 CSEMap.InsertNode(N, IP); 946 AllNodes.push_back(N); 947 return SDOperand(N, 0); 948} 949 950SDOperand SelectionDAG::getValueType(MVT VT) { 951 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 952 ValueTypeNodes.resize(VT.getSimpleVT()+1); 953 954 SDNode *&N = VT.isExtended() ? 955 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 956 957 if (N) return SDOperand(N, 0); 958 N = new VTSDNode(VT); 959 AllNodes.push_back(N); 960 return SDOperand(N, 0); 961} 962 963SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 964 SDNode *&N = ExternalSymbols[Sym]; 965 if (N) return SDOperand(N, 0); 966 N = new ExternalSymbolSDNode(false, Sym, VT); 967 AllNodes.push_back(N); 968 return SDOperand(N, 0); 969} 970 971SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 972 SDNode *&N = TargetExternalSymbols[Sym]; 973 if (N) return SDOperand(N, 0); 974 N = new ExternalSymbolSDNode(true, Sym, VT); 975 AllNodes.push_back(N); 976 return SDOperand(N, 0); 977} 978 979SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) { 980 if ((unsigned)Cond >= CondCodeNodes.size()) 981 CondCodeNodes.resize(Cond+1); 982 983 if (CondCodeNodes[Cond] == 0) { 984 CondCodeNodes[Cond] = new CondCodeSDNode(Cond); 985 AllNodes.push_back(CondCodeNodes[Cond]); 986 } 987 return SDOperand(CondCodeNodes[Cond], 0); 988} 989 990SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 991 FoldingSetNodeID ID; 992 AddNodeIDNode(ID, ISD::Register, getVTList(VT), (SDOperand*)0, 0); 993 ID.AddInteger(RegNo); 994 void *IP = 0; 995 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 996 return SDOperand(E, 0); 997 SDNode *N = new RegisterSDNode(RegNo, VT); 998 CSEMap.InsertNode(N, IP); 999 AllNodes.push_back(N); 1000 return SDOperand(N, 0); 1001} 1002 1003SDOperand SelectionDAG::getDbgStopPoint(SDOperand Root, 1004 unsigned Line, unsigned Col, 1005 const CompileUnitDesc *CU) { 1006 FoldingSetNodeID ID; 1007 SDOperand Ops[] = { Root }; 1008 AddNodeIDNode(ID, ISD::DBG_STOPPOINT, getVTList(MVT::Other), &Ops[0], 1); 1009 ID.AddInteger(Line); 1010 ID.AddInteger(Col); 1011 ID.AddPointer(CU); 1012 void *IP = 0; 1013 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1014 return SDOperand(E, 0); 1015 SDNode *N = new DbgStopPointSDNode(Root, Line, Col, CU); 1016 CSEMap.InsertNode(N, IP); 1017 AllNodes.push_back(N); 1018 return SDOperand(N, 0); 1019} 1020 1021SDOperand SelectionDAG::getSrcValue(const Value *V) { 1022 assert((!V || isa<PointerType>(V->getType())) && 1023 "SrcValue is not a pointer?"); 1024 1025 FoldingSetNodeID ID; 1026 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), (SDOperand*)0, 0); 1027 ID.AddPointer(V); 1028 1029 void *IP = 0; 1030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1031 return SDOperand(E, 0); 1032 1033 SDNode *N = new SrcValueSDNode(V); 1034 CSEMap.InsertNode(N, IP); 1035 AllNodes.push_back(N); 1036 return SDOperand(N, 0); 1037} 1038 1039SDOperand SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1040 const Value *v = MO.getValue(); 1041 assert((!v || isa<PointerType>(v->getType())) && 1042 "SrcValue is not a pointer?"); 1043 1044 FoldingSetNodeID ID; 1045 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), (SDOperand*)0, 0); 1046 ID.AddPointer(v); 1047 ID.AddInteger(MO.getFlags()); 1048 ID.AddInteger(MO.getOffset()); 1049 ID.AddInteger(MO.getSize()); 1050 ID.AddInteger(MO.getAlignment()); 1051 1052 void *IP = 0; 1053 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1054 return SDOperand(E, 0); 1055 1056 SDNode *N = new MemOperandSDNode(MO); 1057 CSEMap.InsertNode(N, IP); 1058 AllNodes.push_back(N); 1059 return SDOperand(N, 0); 1060} 1061 1062/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1063/// specified value type. 1064SDOperand SelectionDAG::CreateStackTemporary(MVT VT) { 1065 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1066 unsigned ByteSize = VT.getSizeInBits()/8; 1067 const Type *Ty = VT.getTypeForMVT(); 1068 unsigned StackAlign = (unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty); 1069 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1070 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1071} 1072 1073 1074SDOperand SelectionDAG::FoldSetCC(MVT VT, SDOperand N1, 1075 SDOperand N2, ISD::CondCode Cond) { 1076 // These setcc operations always fold. 1077 switch (Cond) { 1078 default: break; 1079 case ISD::SETFALSE: 1080 case ISD::SETFALSE2: return getConstant(0, VT); 1081 case ISD::SETTRUE: 1082 case ISD::SETTRUE2: return getConstant(1, VT); 1083 1084 case ISD::SETOEQ: 1085 case ISD::SETOGT: 1086 case ISD::SETOGE: 1087 case ISD::SETOLT: 1088 case ISD::SETOLE: 1089 case ISD::SETONE: 1090 case ISD::SETO: 1091 case ISD::SETUO: 1092 case ISD::SETUEQ: 1093 case ISD::SETUNE: 1094 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1095 break; 1096 } 1097 1098 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 1099 const APInt &C2 = N2C->getAPIntValue(); 1100 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 1101 const APInt &C1 = N1C->getAPIntValue(); 1102 1103 switch (Cond) { 1104 default: assert(0 && "Unknown integer setcc!"); 1105 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1106 case ISD::SETNE: return getConstant(C1 != C2, VT); 1107 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1108 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1109 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1110 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1111 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1112 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1113 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1114 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1115 } 1116 } 1117 } 1118 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) { 1119 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 1120 // No compile time operations on this type yet. 1121 if (N1C->getValueType(0) == MVT::ppcf128) 1122 return SDOperand(); 1123 1124 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1125 switch (Cond) { 1126 default: break; 1127 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1128 return getNode(ISD::UNDEF, VT); 1129 // fall through 1130 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1131 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1132 return getNode(ISD::UNDEF, VT); 1133 // fall through 1134 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1135 R==APFloat::cmpLessThan, VT); 1136 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1137 return getNode(ISD::UNDEF, VT); 1138 // fall through 1139 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1140 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1141 return getNode(ISD::UNDEF, VT); 1142 // fall through 1143 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1144 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1145 return getNode(ISD::UNDEF, VT); 1146 // fall through 1147 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1148 R==APFloat::cmpEqual, VT); 1149 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1150 return getNode(ISD::UNDEF, VT); 1151 // fall through 1152 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1153 R==APFloat::cmpEqual, VT); 1154 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1155 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1156 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1157 R==APFloat::cmpEqual, VT); 1158 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1159 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1160 R==APFloat::cmpLessThan, VT); 1161 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1162 R==APFloat::cmpUnordered, VT); 1163 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1164 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1165 } 1166 } else { 1167 // Ensure that the constant occurs on the RHS. 1168 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1169 } 1170 } 1171 1172 // Could not fold it. 1173 return SDOperand(); 1174} 1175 1176/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1177/// use this predicate to simplify operations downstream. 1178bool SelectionDAG::SignBitIsZero(SDOperand Op, unsigned Depth) const { 1179 unsigned BitWidth = Op.getValueSizeInBits(); 1180 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1181} 1182 1183/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1184/// this predicate to simplify operations downstream. Mask is known to be zero 1185/// for bits that V cannot have. 1186bool SelectionDAG::MaskedValueIsZero(SDOperand Op, const APInt &Mask, 1187 unsigned Depth) const { 1188 APInt KnownZero, KnownOne; 1189 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1190 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1191 return (KnownZero & Mask) == Mask; 1192} 1193 1194/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1195/// known to be either zero or one and return them in the KnownZero/KnownOne 1196/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1197/// processing. 1198void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask, 1199 APInt &KnownZero, APInt &KnownOne, 1200 unsigned Depth) const { 1201 unsigned BitWidth = Mask.getBitWidth(); 1202 assert(BitWidth == Op.getValueType().getSizeInBits() && 1203 "Mask size mismatches value type size!"); 1204 1205 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1206 if (Depth == 6 || Mask == 0) 1207 return; // Limit search depth. 1208 1209 APInt KnownZero2, KnownOne2; 1210 1211 switch (Op.getOpcode()) { 1212 case ISD::Constant: 1213 // We know all of the bits for a constant! 1214 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1215 KnownZero = ~KnownOne & Mask; 1216 return; 1217 case ISD::AND: 1218 // If either the LHS or the RHS are Zero, the result is zero. 1219 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1220 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1221 KnownZero2, KnownOne2, Depth+1); 1222 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1223 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1224 1225 // Output known-1 bits are only known if set in both the LHS & RHS. 1226 KnownOne &= KnownOne2; 1227 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1228 KnownZero |= KnownZero2; 1229 return; 1230 case ISD::OR: 1231 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1232 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1233 KnownZero2, KnownOne2, Depth+1); 1234 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1235 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1236 1237 // Output known-0 bits are only known if clear in both the LHS & RHS. 1238 KnownZero &= KnownZero2; 1239 // Output known-1 are known to be set if set in either the LHS | RHS. 1240 KnownOne |= KnownOne2; 1241 return; 1242 case ISD::XOR: { 1243 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1244 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1245 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1246 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1247 1248 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1249 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1250 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1251 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1252 KnownZero = KnownZeroOut; 1253 return; 1254 } 1255 case ISD::MUL: { 1256 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1257 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1258 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1259 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1260 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1261 1262 // If low bits are zero in either operand, output low known-0 bits. 1263 // Also compute a conserative estimate for high known-0 bits. 1264 // More trickiness is possible, but this is sufficient for the 1265 // interesting case of alignment computation. 1266 KnownOne.clear(); 1267 unsigned TrailZ = KnownZero.countTrailingOnes() + 1268 KnownZero2.countTrailingOnes(); 1269 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1270 KnownZero2.countLeadingOnes(), 1271 BitWidth) - BitWidth; 1272 1273 TrailZ = std::min(TrailZ, BitWidth); 1274 LeadZ = std::min(LeadZ, BitWidth); 1275 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1276 APInt::getHighBitsSet(BitWidth, LeadZ); 1277 KnownZero &= Mask; 1278 return; 1279 } 1280 case ISD::UDIV: { 1281 // For the purposes of computing leading zeros we can conservatively 1282 // treat a udiv as a logical right shift by the power of 2 known to 1283 // be less than the denominator. 1284 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1285 ComputeMaskedBits(Op.getOperand(0), 1286 AllOnes, KnownZero2, KnownOne2, Depth+1); 1287 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1288 1289 KnownOne2.clear(); 1290 KnownZero2.clear(); 1291 ComputeMaskedBits(Op.getOperand(1), 1292 AllOnes, KnownZero2, KnownOne2, Depth+1); 1293 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1294 if (RHSUnknownLeadingOnes != BitWidth) 1295 LeadZ = std::min(BitWidth, 1296 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1297 1298 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1299 return; 1300 } 1301 case ISD::SELECT: 1302 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1303 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1304 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1305 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1306 1307 // Only known if known in both the LHS and RHS. 1308 KnownOne &= KnownOne2; 1309 KnownZero &= KnownZero2; 1310 return; 1311 case ISD::SELECT_CC: 1312 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1313 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1314 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1315 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1316 1317 // Only known if known in both the LHS and RHS. 1318 KnownOne &= KnownOne2; 1319 KnownZero &= KnownZero2; 1320 return; 1321 case ISD::SETCC: 1322 // If we know the result of a setcc has the top bits zero, use this info. 1323 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult && 1324 BitWidth > 1) 1325 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1326 return; 1327 case ISD::SHL: 1328 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1329 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1330 unsigned ShAmt = SA->getValue(); 1331 1332 // If the shift count is an invalid immediate, don't do anything. 1333 if (ShAmt >= BitWidth) 1334 return; 1335 1336 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1337 KnownZero, KnownOne, Depth+1); 1338 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1339 KnownZero <<= ShAmt; 1340 KnownOne <<= ShAmt; 1341 // low bits known zero. 1342 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1343 } 1344 return; 1345 case ISD::SRL: 1346 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1347 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1348 unsigned ShAmt = SA->getValue(); 1349 1350 // If the shift count is an invalid immediate, don't do anything. 1351 if (ShAmt >= BitWidth) 1352 return; 1353 1354 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1355 KnownZero, KnownOne, Depth+1); 1356 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1357 KnownZero = KnownZero.lshr(ShAmt); 1358 KnownOne = KnownOne.lshr(ShAmt); 1359 1360 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1361 KnownZero |= HighBits; // High bits known zero. 1362 } 1363 return; 1364 case ISD::SRA: 1365 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1366 unsigned ShAmt = SA->getValue(); 1367 1368 // If the shift count is an invalid immediate, don't do anything. 1369 if (ShAmt >= BitWidth) 1370 return; 1371 1372 APInt InDemandedMask = (Mask << ShAmt); 1373 // If any of the demanded bits are produced by the sign extension, we also 1374 // demand the input sign bit. 1375 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1376 if (HighBits.getBoolValue()) 1377 InDemandedMask |= APInt::getSignBit(BitWidth); 1378 1379 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1380 Depth+1); 1381 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1382 KnownZero = KnownZero.lshr(ShAmt); 1383 KnownOne = KnownOne.lshr(ShAmt); 1384 1385 // Handle the sign bits. 1386 APInt SignBit = APInt::getSignBit(BitWidth); 1387 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1388 1389 if (KnownZero.intersects(SignBit)) { 1390 KnownZero |= HighBits; // New bits are known zero. 1391 } else if (KnownOne.intersects(SignBit)) { 1392 KnownOne |= HighBits; // New bits are known one. 1393 } 1394 } 1395 return; 1396 case ISD::SIGN_EXTEND_INREG: { 1397 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1398 unsigned EBits = EVT.getSizeInBits(); 1399 1400 // Sign extension. Compute the demanded bits in the result that are not 1401 // present in the input. 1402 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1403 1404 APInt InSignBit = APInt::getSignBit(EBits); 1405 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1406 1407 // If the sign extended bits are demanded, we know that the sign 1408 // bit is demanded. 1409 InSignBit.zext(BitWidth); 1410 if (NewBits.getBoolValue()) 1411 InputDemandedBits |= InSignBit; 1412 1413 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1414 KnownZero, KnownOne, Depth+1); 1415 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1416 1417 // If the sign bit of the input is known set or clear, then we know the 1418 // top bits of the result. 1419 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1420 KnownZero |= NewBits; 1421 KnownOne &= ~NewBits; 1422 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1423 KnownOne |= NewBits; 1424 KnownZero &= ~NewBits; 1425 } else { // Input sign bit unknown 1426 KnownZero &= ~NewBits; 1427 KnownOne &= ~NewBits; 1428 } 1429 return; 1430 } 1431 case ISD::CTTZ: 1432 case ISD::CTLZ: 1433 case ISD::CTPOP: { 1434 unsigned LowBits = Log2_32(BitWidth)+1; 1435 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1436 KnownOne.clear(); 1437 return; 1438 } 1439 case ISD::LOAD: { 1440 if (ISD::isZEXTLoad(Op.Val)) { 1441 LoadSDNode *LD = cast<LoadSDNode>(Op); 1442 MVT VT = LD->getMemoryVT(); 1443 unsigned MemBits = VT.getSizeInBits(); 1444 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1445 } 1446 return; 1447 } 1448 case ISD::ZERO_EXTEND: { 1449 MVT InVT = Op.getOperand(0).getValueType(); 1450 unsigned InBits = InVT.getSizeInBits(); 1451 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1452 APInt InMask = Mask; 1453 InMask.trunc(InBits); 1454 KnownZero.trunc(InBits); 1455 KnownOne.trunc(InBits); 1456 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1457 KnownZero.zext(BitWidth); 1458 KnownOne.zext(BitWidth); 1459 KnownZero |= NewBits; 1460 return; 1461 } 1462 case ISD::SIGN_EXTEND: { 1463 MVT InVT = Op.getOperand(0).getValueType(); 1464 unsigned InBits = InVT.getSizeInBits(); 1465 APInt InSignBit = APInt::getSignBit(InBits); 1466 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1467 APInt InMask = Mask; 1468 InMask.trunc(InBits); 1469 1470 // If any of the sign extended bits are demanded, we know that the sign 1471 // bit is demanded. Temporarily set this bit in the mask for our callee. 1472 if (NewBits.getBoolValue()) 1473 InMask |= InSignBit; 1474 1475 KnownZero.trunc(InBits); 1476 KnownOne.trunc(InBits); 1477 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1478 1479 // Note if the sign bit is known to be zero or one. 1480 bool SignBitKnownZero = KnownZero.isNegative(); 1481 bool SignBitKnownOne = KnownOne.isNegative(); 1482 assert(!(SignBitKnownZero && SignBitKnownOne) && 1483 "Sign bit can't be known to be both zero and one!"); 1484 1485 // If the sign bit wasn't actually demanded by our caller, we don't 1486 // want it set in the KnownZero and KnownOne result values. Reset the 1487 // mask and reapply it to the result values. 1488 InMask = Mask; 1489 InMask.trunc(InBits); 1490 KnownZero &= InMask; 1491 KnownOne &= InMask; 1492 1493 KnownZero.zext(BitWidth); 1494 KnownOne.zext(BitWidth); 1495 1496 // If the sign bit is known zero or one, the top bits match. 1497 if (SignBitKnownZero) 1498 KnownZero |= NewBits; 1499 else if (SignBitKnownOne) 1500 KnownOne |= NewBits; 1501 return; 1502 } 1503 case ISD::ANY_EXTEND: { 1504 MVT InVT = Op.getOperand(0).getValueType(); 1505 unsigned InBits = InVT.getSizeInBits(); 1506 APInt InMask = Mask; 1507 InMask.trunc(InBits); 1508 KnownZero.trunc(InBits); 1509 KnownOne.trunc(InBits); 1510 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1511 KnownZero.zext(BitWidth); 1512 KnownOne.zext(BitWidth); 1513 return; 1514 } 1515 case ISD::TRUNCATE: { 1516 MVT InVT = Op.getOperand(0).getValueType(); 1517 unsigned InBits = InVT.getSizeInBits(); 1518 APInt InMask = Mask; 1519 InMask.zext(InBits); 1520 KnownZero.zext(InBits); 1521 KnownOne.zext(InBits); 1522 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1523 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1524 KnownZero.trunc(BitWidth); 1525 KnownOne.trunc(BitWidth); 1526 break; 1527 } 1528 case ISD::AssertZext: { 1529 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1530 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1531 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1532 KnownOne, Depth+1); 1533 KnownZero |= (~InMask) & Mask; 1534 return; 1535 } 1536 case ISD::FGETSIGN: 1537 // All bits are zero except the low bit. 1538 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1539 return; 1540 1541 case ISD::SUB: { 1542 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1543 // We know that the top bits of C-X are clear if X contains less bits 1544 // than C (i.e. no wrap-around can happen). For example, 20-X is 1545 // positive if we can prove that X is >= 0 and < 16. 1546 if (CLHS->getAPIntValue().isNonNegative()) { 1547 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1548 // NLZ can't be BitWidth with no sign bit 1549 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1550 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1551 Depth+1); 1552 1553 // If all of the MaskV bits are known to be zero, then we know the 1554 // output top bits are zero, because we now know that the output is 1555 // from [0-C]. 1556 if ((KnownZero2 & MaskV) == MaskV) { 1557 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1558 // Top bits known zero. 1559 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1560 } 1561 } 1562 } 1563 } 1564 // fall through 1565 case ISD::ADD: { 1566 // Output known-0 bits are known if clear or set in both the low clear bits 1567 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1568 // low 3 bits clear. 1569 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1570 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1571 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1572 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1573 1574 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1575 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1576 KnownZeroOut = std::min(KnownZeroOut, 1577 KnownZero2.countTrailingOnes()); 1578 1579 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1580 return; 1581 } 1582 case ISD::SREM: 1583 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1584 APInt RA = Rem->getAPIntValue(); 1585 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1586 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1587 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1588 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1589 1590 // The sign of a remainder is equal to the sign of the first 1591 // operand (zero being positive). 1592 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1593 KnownZero2 |= ~LowBits; 1594 else if (KnownOne2[BitWidth-1]) 1595 KnownOne2 |= ~LowBits; 1596 1597 KnownZero |= KnownZero2 & Mask; 1598 KnownOne |= KnownOne2 & Mask; 1599 1600 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1601 } 1602 } 1603 return; 1604 case ISD::UREM: { 1605 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1606 APInt RA = Rem->getAPIntValue(); 1607 if (RA.isPowerOf2()) { 1608 APInt LowBits = (RA - 1); 1609 APInt Mask2 = LowBits & Mask; 1610 KnownZero |= ~LowBits & Mask; 1611 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1612 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1613 break; 1614 } 1615 } 1616 1617 // Since the result is less than or equal to either operand, any leading 1618 // zero bits in either operand must also exist in the result. 1619 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1620 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1621 Depth+1); 1622 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1623 Depth+1); 1624 1625 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1626 KnownZero2.countLeadingOnes()); 1627 KnownOne.clear(); 1628 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1629 return; 1630 } 1631 default: 1632 // Allow the target to implement this method for its nodes. 1633 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1634 case ISD::INTRINSIC_WO_CHAIN: 1635 case ISD::INTRINSIC_W_CHAIN: 1636 case ISD::INTRINSIC_VOID: 1637 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1638 } 1639 return; 1640 } 1641} 1642 1643/// ComputeNumSignBits - Return the number of times the sign bit of the 1644/// register is replicated into the other bits. We know that at least 1 bit 1645/// is always equal to the sign bit (itself), but other cases can give us 1646/// information. For example, immediately after an "SRA X, 2", we know that 1647/// the top 3 bits are all equal to each other, so we return 3. 1648unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{ 1649 MVT VT = Op.getValueType(); 1650 assert(VT.isInteger() && "Invalid VT!"); 1651 unsigned VTBits = VT.getSizeInBits(); 1652 unsigned Tmp, Tmp2; 1653 unsigned FirstAnswer = 1; 1654 1655 if (Depth == 6) 1656 return 1; // Limit search depth. 1657 1658 switch (Op.getOpcode()) { 1659 default: break; 1660 case ISD::AssertSext: 1661 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1662 return VTBits-Tmp+1; 1663 case ISD::AssertZext: 1664 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1665 return VTBits-Tmp; 1666 1667 case ISD::Constant: { 1668 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1669 // If negative, return # leading ones. 1670 if (Val.isNegative()) 1671 return Val.countLeadingOnes(); 1672 1673 // Return # leading zeros. 1674 return Val.countLeadingZeros(); 1675 } 1676 1677 case ISD::SIGN_EXTEND: 1678 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1679 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1680 1681 case ISD::SIGN_EXTEND_INREG: 1682 // Max of the input and what this extends. 1683 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1684 Tmp = VTBits-Tmp+1; 1685 1686 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1687 return std::max(Tmp, Tmp2); 1688 1689 case ISD::SRA: 1690 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1691 // SRA X, C -> adds C sign bits. 1692 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1693 Tmp += C->getValue(); 1694 if (Tmp > VTBits) Tmp = VTBits; 1695 } 1696 return Tmp; 1697 case ISD::SHL: 1698 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1699 // shl destroys sign bits. 1700 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1701 if (C->getValue() >= VTBits || // Bad shift. 1702 C->getValue() >= Tmp) break; // Shifted all sign bits out. 1703 return Tmp - C->getValue(); 1704 } 1705 break; 1706 case ISD::AND: 1707 case ISD::OR: 1708 case ISD::XOR: // NOT is handled here. 1709 // Logical binary ops preserve the number of sign bits at the worst. 1710 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1711 if (Tmp != 1) { 1712 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1713 FirstAnswer = std::min(Tmp, Tmp2); 1714 // We computed what we know about the sign bits as our first 1715 // answer. Now proceed to the generic code that uses 1716 // ComputeMaskedBits, and pick whichever answer is better. 1717 } 1718 break; 1719 1720 case ISD::SELECT: 1721 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1722 if (Tmp == 1) return 1; // Early out. 1723 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1724 return std::min(Tmp, Tmp2); 1725 1726 case ISD::SETCC: 1727 // If setcc returns 0/-1, all bits are sign bits. 1728 if (TLI.getSetCCResultContents() == 1729 TargetLowering::ZeroOrNegativeOneSetCCResult) 1730 return VTBits; 1731 break; 1732 case ISD::ROTL: 1733 case ISD::ROTR: 1734 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1735 unsigned RotAmt = C->getValue() & (VTBits-1); 1736 1737 // Handle rotate right by N like a rotate left by 32-N. 1738 if (Op.getOpcode() == ISD::ROTR) 1739 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1740 1741 // If we aren't rotating out all of the known-in sign bits, return the 1742 // number that are left. This handles rotl(sext(x), 1) for example. 1743 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1744 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1745 } 1746 break; 1747 case ISD::ADD: 1748 // Add can have at most one carry bit. Thus we know that the output 1749 // is, at worst, one more bit than the inputs. 1750 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1751 if (Tmp == 1) return 1; // Early out. 1752 1753 // Special case decrementing a value (ADD X, -1): 1754 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1755 if (CRHS->isAllOnesValue()) { 1756 APInt KnownZero, KnownOne; 1757 APInt Mask = APInt::getAllOnesValue(VTBits); 1758 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 1759 1760 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1761 // sign bits set. 1762 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1763 return VTBits; 1764 1765 // If we are subtracting one from a positive number, there is no carry 1766 // out of the result. 1767 if (KnownZero.isNegative()) 1768 return Tmp; 1769 } 1770 1771 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1772 if (Tmp2 == 1) return 1; 1773 return std::min(Tmp, Tmp2)-1; 1774 break; 1775 1776 case ISD::SUB: 1777 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1778 if (Tmp2 == 1) return 1; 1779 1780 // Handle NEG. 1781 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1782 if (CLHS->isNullValue()) { 1783 APInt KnownZero, KnownOne; 1784 APInt Mask = APInt::getAllOnesValue(VTBits); 1785 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1786 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1787 // sign bits set. 1788 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1789 return VTBits; 1790 1791 // If the input is known to be positive (the sign bit is known clear), 1792 // the output of the NEG has the same number of sign bits as the input. 1793 if (KnownZero.isNegative()) 1794 return Tmp2; 1795 1796 // Otherwise, we treat this like a SUB. 1797 } 1798 1799 // Sub can have at most one carry bit. Thus we know that the output 1800 // is, at worst, one more bit than the inputs. 1801 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1802 if (Tmp == 1) return 1; // Early out. 1803 return std::min(Tmp, Tmp2)-1; 1804 break; 1805 case ISD::TRUNCATE: 1806 // FIXME: it's tricky to do anything useful for this, but it is an important 1807 // case for targets like X86. 1808 break; 1809 } 1810 1811 // Handle LOADX separately here. EXTLOAD case will fallthrough. 1812 if (Op.getOpcode() == ISD::LOAD) { 1813 LoadSDNode *LD = cast<LoadSDNode>(Op); 1814 unsigned ExtType = LD->getExtensionType(); 1815 switch (ExtType) { 1816 default: break; 1817 case ISD::SEXTLOAD: // '17' bits known 1818 Tmp = LD->getMemoryVT().getSizeInBits(); 1819 return VTBits-Tmp+1; 1820 case ISD::ZEXTLOAD: // '16' bits known 1821 Tmp = LD->getMemoryVT().getSizeInBits(); 1822 return VTBits-Tmp; 1823 } 1824 } 1825 1826 // Allow the target to implement this method for its nodes. 1827 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 1828 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 1829 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 1830 Op.getOpcode() == ISD::INTRINSIC_VOID) { 1831 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 1832 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 1833 } 1834 1835 // Finally, if we can prove that the top bits of the result are 0's or 1's, 1836 // use this information. 1837 APInt KnownZero, KnownOne; 1838 APInt Mask = APInt::getAllOnesValue(VTBits); 1839 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1840 1841 if (KnownZero.isNegative()) { // sign bit is 0 1842 Mask = KnownZero; 1843 } else if (KnownOne.isNegative()) { // sign bit is 1; 1844 Mask = KnownOne; 1845 } else { 1846 // Nothing known. 1847 return FirstAnswer; 1848 } 1849 1850 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 1851 // the number of identical bits in the top of the input value. 1852 Mask = ~Mask; 1853 Mask <<= Mask.getBitWidth()-VTBits; 1854 // Return # leading zeros. We use 'min' here in case Val was zero before 1855 // shifting. We don't want to return '64' as for an i32 "0". 1856 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 1857} 1858 1859 1860bool SelectionDAG::isVerifiedDebugInfoDesc(SDOperand Op) const { 1861 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 1862 if (!GA) return false; 1863 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 1864 if (!GV) return false; 1865 MachineModuleInfo *MMI = getMachineModuleInfo(); 1866 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV); 1867} 1868 1869 1870/// getShuffleScalarElt - Returns the scalar element that will make up the ith 1871/// element of the result of the vector shuffle. 1872SDOperand SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 1873 MVT VT = N->getValueType(0); 1874 SDOperand PermMask = N->getOperand(2); 1875 SDOperand Idx = PermMask.getOperand(i); 1876 if (Idx.getOpcode() == ISD::UNDEF) 1877 return getNode(ISD::UNDEF, VT.getVectorElementType()); 1878 unsigned Index = cast<ConstantSDNode>(Idx)->getValue(); 1879 unsigned NumElems = PermMask.getNumOperands(); 1880 SDOperand V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 1881 Index %= NumElems; 1882 1883 if (V.getOpcode() == ISD::BIT_CONVERT) { 1884 V = V.getOperand(0); 1885 if (V.getValueType().getVectorNumElements() != NumElems) 1886 return SDOperand(); 1887 } 1888 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 1889 return (Index == 0) ? V.getOperand(0) 1890 : getNode(ISD::UNDEF, VT.getVectorElementType()); 1891 if (V.getOpcode() == ISD::BUILD_VECTOR) 1892 return V.getOperand(Index); 1893 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 1894 return getShuffleScalarElt(V.Val, Index); 1895 return SDOperand(); 1896} 1897 1898 1899/// getNode - Gets or creates the specified node. 1900/// 1901SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT) { 1902 FoldingSetNodeID ID; 1903 AddNodeIDNode(ID, Opcode, getVTList(VT), (SDOperand*)0, 0); 1904 void *IP = 0; 1905 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1906 return SDOperand(E, 0); 1907 SDNode *N = new SDNode(Opcode, SDNode::getSDVTList(VT)); 1908 CSEMap.InsertNode(N, IP); 1909 1910 AllNodes.push_back(N); 1911 return SDOperand(N, 0); 1912} 1913 1914SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, SDOperand Operand) { 1915 // Constant fold unary operations with an integer constant operand. 1916 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 1917 const APInt &Val = C->getAPIntValue(); 1918 unsigned BitWidth = VT.getSizeInBits(); 1919 switch (Opcode) { 1920 default: break; 1921 case ISD::SIGN_EXTEND: 1922 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 1923 case ISD::ANY_EXTEND: 1924 case ISD::ZERO_EXTEND: 1925 case ISD::TRUNCATE: 1926 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 1927 case ISD::UINT_TO_FP: 1928 case ISD::SINT_TO_FP: { 1929 const uint64_t zero[] = {0, 0}; 1930 // No compile time operations on this type. 1931 if (VT==MVT::ppcf128) 1932 break; 1933 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 1934 (void)apf.convertFromAPInt(Val, 1935 Opcode==ISD::SINT_TO_FP, 1936 APFloat::rmNearestTiesToEven); 1937 return getConstantFP(apf, VT); 1938 } 1939 case ISD::BIT_CONVERT: 1940 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 1941 return getConstantFP(Val.bitsToFloat(), VT); 1942 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 1943 return getConstantFP(Val.bitsToDouble(), VT); 1944 break; 1945 case ISD::BSWAP: 1946 return getConstant(Val.byteSwap(), VT); 1947 case ISD::CTPOP: 1948 return getConstant(Val.countPopulation(), VT); 1949 case ISD::CTLZ: 1950 return getConstant(Val.countLeadingZeros(), VT); 1951 case ISD::CTTZ: 1952 return getConstant(Val.countTrailingZeros(), VT); 1953 } 1954 } 1955 1956 // Constant fold unary operations with a floating point constant operand. 1957 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) { 1958 APFloat V = C->getValueAPF(); // make copy 1959 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 1960 switch (Opcode) { 1961 case ISD::FNEG: 1962 V.changeSign(); 1963 return getConstantFP(V, VT); 1964 case ISD::FABS: 1965 V.clearSign(); 1966 return getConstantFP(V, VT); 1967 case ISD::FP_ROUND: 1968 case ISD::FP_EXTEND: 1969 // This can return overflow, underflow, or inexact; we don't care. 1970 // FIXME need to be more flexible about rounding mode. 1971 (void)V.convert(*MVTToAPFloatSemantics(VT), 1972 APFloat::rmNearestTiesToEven); 1973 return getConstantFP(V, VT); 1974 case ISD::FP_TO_SINT: 1975 case ISD::FP_TO_UINT: { 1976 integerPart x; 1977 assert(integerPartWidth >= 64); 1978 // FIXME need to be more flexible about rounding mode. 1979 APFloat::opStatus s = V.convertToInteger(&x, 64U, 1980 Opcode==ISD::FP_TO_SINT, 1981 APFloat::rmTowardZero); 1982 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 1983 break; 1984 return getConstant(x, VT); 1985 } 1986 case ISD::BIT_CONVERT: 1987 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 1988 return getConstant((uint32_t)V.convertToAPInt().getZExtValue(), VT); 1989 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 1990 return getConstant(V.convertToAPInt().getZExtValue(), VT); 1991 break; 1992 } 1993 } 1994 } 1995 1996 unsigned OpOpcode = Operand.Val->getOpcode(); 1997 switch (Opcode) { 1998 case ISD::TokenFactor: 1999 return Operand; // Factor of one node? No need. 2000 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2001 case ISD::FP_EXTEND: 2002 assert(VT.isFloatingPoint() && 2003 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2004 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2005 if (Operand.getOpcode() == ISD::UNDEF) 2006 return getNode(ISD::UNDEF, VT); 2007 break; 2008 case ISD::SIGN_EXTEND: 2009 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2010 "Invalid SIGN_EXTEND!"); 2011 if (Operand.getValueType() == VT) return Operand; // noop extension 2012 assert(Operand.getValueType().bitsLT(VT) 2013 && "Invalid sext node, dst < src!"); 2014 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2015 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2016 break; 2017 case ISD::ZERO_EXTEND: 2018 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2019 "Invalid ZERO_EXTEND!"); 2020 if (Operand.getValueType() == VT) return Operand; // noop extension 2021 assert(Operand.getValueType().bitsLT(VT) 2022 && "Invalid zext node, dst < src!"); 2023 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2024 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 2025 break; 2026 case ISD::ANY_EXTEND: 2027 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2028 "Invalid ANY_EXTEND!"); 2029 if (Operand.getValueType() == VT) return Operand; // noop extension 2030 assert(Operand.getValueType().bitsLT(VT) 2031 && "Invalid anyext node, dst < src!"); 2032 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2033 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2034 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2035 break; 2036 case ISD::TRUNCATE: 2037 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2038 "Invalid TRUNCATE!"); 2039 if (Operand.getValueType() == VT) return Operand; // noop truncate 2040 assert(Operand.getValueType().bitsGT(VT) 2041 && "Invalid truncate node, src < dst!"); 2042 if (OpOpcode == ISD::TRUNCATE) 2043 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 2044 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2045 OpOpcode == ISD::ANY_EXTEND) { 2046 // If the source is smaller than the dest, we still need an extend. 2047 if (Operand.Val->getOperand(0).getValueType().bitsLT(VT)) 2048 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2049 else if (Operand.Val->getOperand(0).getValueType().bitsGT(VT)) 2050 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 2051 else 2052 return Operand.Val->getOperand(0); 2053 } 2054 break; 2055 case ISD::BIT_CONVERT: 2056 // Basic sanity checking. 2057 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2058 && "Cannot BIT_CONVERT between types of different sizes!"); 2059 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2060 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2061 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2062 if (OpOpcode == ISD::UNDEF) 2063 return getNode(ISD::UNDEF, VT); 2064 break; 2065 case ISD::SCALAR_TO_VECTOR: 2066 assert(VT.isVector() && !Operand.getValueType().isVector() && 2067 VT.getVectorElementType() == Operand.getValueType() && 2068 "Illegal SCALAR_TO_VECTOR node!"); 2069 if (OpOpcode == ISD::UNDEF) 2070 return getNode(ISD::UNDEF, VT); 2071 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2072 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2073 isa<ConstantSDNode>(Operand.getOperand(1)) && 2074 Operand.getConstantOperandVal(1) == 0 && 2075 Operand.getOperand(0).getValueType() == VT) 2076 return Operand.getOperand(0); 2077 break; 2078 case ISD::FNEG: 2079 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2080 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1), 2081 Operand.Val->getOperand(0)); 2082 if (OpOpcode == ISD::FNEG) // --X -> X 2083 return Operand.Val->getOperand(0); 2084 break; 2085 case ISD::FABS: 2086 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2087 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 2088 break; 2089 } 2090 2091 SDNode *N; 2092 SDVTList VTs = getVTList(VT); 2093 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2094 FoldingSetNodeID ID; 2095 SDOperand Ops[1] = { Operand }; 2096 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2097 void *IP = 0; 2098 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2099 return SDOperand(E, 0); 2100 N = new UnarySDNode(Opcode, VTs, Operand); 2101 CSEMap.InsertNode(N, IP); 2102 } else { 2103 N = new UnarySDNode(Opcode, VTs, Operand); 2104 } 2105 AllNodes.push_back(N); 2106 return SDOperand(N, 0); 2107} 2108 2109 2110 2111SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2112 SDOperand N1, SDOperand N2) { 2113 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 2114 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 2115 switch (Opcode) { 2116 default: break; 2117 case ISD::TokenFactor: 2118 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2119 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2120 // Fold trivial token factors. 2121 if (N1.getOpcode() == ISD::EntryToken) return N2; 2122 if (N2.getOpcode() == ISD::EntryToken) return N1; 2123 break; 2124 case ISD::AND: 2125 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2126 N1.getValueType() == VT && "Binary operator types must match!"); 2127 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2128 // worth handling here. 2129 if (N2C && N2C->isNullValue()) 2130 return N2; 2131 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2132 return N1; 2133 break; 2134 case ISD::OR: 2135 case ISD::XOR: 2136 case ISD::ADD: 2137 case ISD::SUB: 2138 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2139 N1.getValueType() == VT && "Binary operator types must match!"); 2140 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2141 // it's worth handling here. 2142 if (N2C && N2C->isNullValue()) 2143 return N1; 2144 break; 2145 case ISD::UDIV: 2146 case ISD::UREM: 2147 case ISD::MULHU: 2148 case ISD::MULHS: 2149 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2150 // fall through 2151 case ISD::MUL: 2152 case ISD::SDIV: 2153 case ISD::SREM: 2154 case ISD::FADD: 2155 case ISD::FSUB: 2156 case ISD::FMUL: 2157 case ISD::FDIV: 2158 case ISD::FREM: 2159 assert(N1.getValueType() == N2.getValueType() && 2160 N1.getValueType() == VT && "Binary operator types must match!"); 2161 break; 2162 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2163 assert(N1.getValueType() == VT && 2164 N1.getValueType().isFloatingPoint() && 2165 N2.getValueType().isFloatingPoint() && 2166 "Invalid FCOPYSIGN!"); 2167 break; 2168 case ISD::SHL: 2169 case ISD::SRA: 2170 case ISD::SRL: 2171 case ISD::ROTL: 2172 case ISD::ROTR: 2173 assert(VT == N1.getValueType() && 2174 "Shift operators return type must be the same as their first arg"); 2175 assert(VT.isInteger() && N2.getValueType().isInteger() && 2176 VT != MVT::i1 && "Shifts only work on integers"); 2177 break; 2178 case ISD::FP_ROUND_INREG: { 2179 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2180 assert(VT == N1.getValueType() && "Not an inreg round!"); 2181 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2182 "Cannot FP_ROUND_INREG integer types"); 2183 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2184 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2185 break; 2186 } 2187 case ISD::FP_ROUND: 2188 assert(VT.isFloatingPoint() && 2189 N1.getValueType().isFloatingPoint() && 2190 VT.bitsLE(N1.getValueType()) && 2191 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2192 if (N1.getValueType() == VT) return N1; // noop conversion. 2193 break; 2194 case ISD::AssertSext: 2195 case ISD::AssertZext: { 2196 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2197 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2198 assert(VT.isInteger() && EVT.isInteger() && 2199 "Cannot *_EXTEND_INREG FP types"); 2200 assert(EVT.bitsLE(VT) && "Not extending!"); 2201 if (VT == EVT) return N1; // noop assertion. 2202 break; 2203 } 2204 case ISD::SIGN_EXTEND_INREG: { 2205 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2206 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2207 assert(VT.isInteger() && EVT.isInteger() && 2208 "Cannot *_EXTEND_INREG FP types"); 2209 assert(EVT.bitsLE(VT) && "Not extending!"); 2210 if (EVT == VT) return N1; // Not actually extending 2211 2212 if (N1C) { 2213 APInt Val = N1C->getAPIntValue(); 2214 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2215 Val <<= Val.getBitWidth()-FromBits; 2216 Val = Val.ashr(Val.getBitWidth()-FromBits); 2217 return getConstant(Val, VT); 2218 } 2219 break; 2220 } 2221 case ISD::EXTRACT_VECTOR_ELT: 2222 assert(N2C && "Bad EXTRACT_VECTOR_ELT!"); 2223 2224 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2225 if (N1.getOpcode() == ISD::UNDEF) 2226 return getNode(ISD::UNDEF, VT); 2227 2228 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2229 // expanding copies of large vectors from registers. 2230 if (N1.getOpcode() == ISD::CONCAT_VECTORS && 2231 N1.getNumOperands() > 0) { 2232 unsigned Factor = 2233 N1.getOperand(0).getValueType().getVectorNumElements(); 2234 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2235 N1.getOperand(N2C->getValue() / Factor), 2236 getConstant(N2C->getValue() % Factor, N2.getValueType())); 2237 } 2238 2239 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2240 // expanding large vector constants. 2241 if (N1.getOpcode() == ISD::BUILD_VECTOR) 2242 return N1.getOperand(N2C->getValue()); 2243 2244 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2245 // operations are lowered to scalars. 2246 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) 2247 if (ConstantSDNode *IEC = dyn_cast<ConstantSDNode>(N1.getOperand(2))) { 2248 if (IEC == N2C) 2249 return N1.getOperand(1); 2250 else 2251 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2252 } 2253 break; 2254 case ISD::EXTRACT_ELEMENT: 2255 assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2256 assert(!N1.getValueType().isVector() && !VT.isVector() && 2257 (N1.getValueType().isInteger() == VT.isInteger()) && 2258 "Wrong types for EXTRACT_ELEMENT!"); 2259 2260 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2261 // 64-bit integers into 32-bit parts. Instead of building the extract of 2262 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2263 if (N1.getOpcode() == ISD::BUILD_PAIR) 2264 return N1.getOperand(N2C->getValue()); 2265 2266 // EXTRACT_ELEMENT of a constant int is also very common. 2267 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2268 unsigned ElementSize = VT.getSizeInBits(); 2269 unsigned Shift = ElementSize * N2C->getValue(); 2270 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2271 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2272 } 2273 break; 2274 case ISD::EXTRACT_SUBVECTOR: 2275 if (N1.getValueType() == VT) // Trivial extraction. 2276 return N1; 2277 break; 2278 } 2279 2280 if (N1C) { 2281 if (N2C) { 2282 APInt C1 = N1C->getAPIntValue(), C2 = N2C->getAPIntValue(); 2283 switch (Opcode) { 2284 case ISD::ADD: return getConstant(C1 + C2, VT); 2285 case ISD::SUB: return getConstant(C1 - C2, VT); 2286 case ISD::MUL: return getConstant(C1 * C2, VT); 2287 case ISD::UDIV: 2288 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2289 break; 2290 case ISD::UREM : 2291 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2292 break; 2293 case ISD::SDIV : 2294 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2295 break; 2296 case ISD::SREM : 2297 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2298 break; 2299 case ISD::AND : return getConstant(C1 & C2, VT); 2300 case ISD::OR : return getConstant(C1 | C2, VT); 2301 case ISD::XOR : return getConstant(C1 ^ C2, VT); 2302 case ISD::SHL : return getConstant(C1 << C2, VT); 2303 case ISD::SRL : return getConstant(C1.lshr(C2), VT); 2304 case ISD::SRA : return getConstant(C1.ashr(C2), VT); 2305 case ISD::ROTL : return getConstant(C1.rotl(C2), VT); 2306 case ISD::ROTR : return getConstant(C1.rotr(C2), VT); 2307 default: break; 2308 } 2309 } else { // Cannonicalize constant to RHS if commutative 2310 if (isCommutativeBinOp(Opcode)) { 2311 std::swap(N1C, N2C); 2312 std::swap(N1, N2); 2313 } 2314 } 2315 } 2316 2317 // Constant fold FP operations. 2318 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 2319 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 2320 if (N1CFP) { 2321 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2322 // Cannonicalize constant to RHS if commutative 2323 std::swap(N1CFP, N2CFP); 2324 std::swap(N1, N2); 2325 } else if (N2CFP && VT != MVT::ppcf128) { 2326 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2327 APFloat::opStatus s; 2328 switch (Opcode) { 2329 case ISD::FADD: 2330 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2331 if (s != APFloat::opInvalidOp) 2332 return getConstantFP(V1, VT); 2333 break; 2334 case ISD::FSUB: 2335 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2336 if (s!=APFloat::opInvalidOp) 2337 return getConstantFP(V1, VT); 2338 break; 2339 case ISD::FMUL: 2340 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2341 if (s!=APFloat::opInvalidOp) 2342 return getConstantFP(V1, VT); 2343 break; 2344 case ISD::FDIV: 2345 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2346 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2347 return getConstantFP(V1, VT); 2348 break; 2349 case ISD::FREM : 2350 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2351 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2352 return getConstantFP(V1, VT); 2353 break; 2354 case ISD::FCOPYSIGN: 2355 V1.copySign(V2); 2356 return getConstantFP(V1, VT); 2357 default: break; 2358 } 2359 } 2360 } 2361 2362 // Canonicalize an UNDEF to the RHS, even over a constant. 2363 if (N1.getOpcode() == ISD::UNDEF) { 2364 if (isCommutativeBinOp(Opcode)) { 2365 std::swap(N1, N2); 2366 } else { 2367 switch (Opcode) { 2368 case ISD::FP_ROUND_INREG: 2369 case ISD::SIGN_EXTEND_INREG: 2370 case ISD::SUB: 2371 case ISD::FSUB: 2372 case ISD::FDIV: 2373 case ISD::FREM: 2374 case ISD::SRA: 2375 return N1; // fold op(undef, arg2) -> undef 2376 case ISD::UDIV: 2377 case ISD::SDIV: 2378 case ISD::UREM: 2379 case ISD::SREM: 2380 case ISD::SRL: 2381 case ISD::SHL: 2382 if (!VT.isVector()) 2383 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2384 // For vectors, we can't easily build an all zero vector, just return 2385 // the LHS. 2386 return N2; 2387 } 2388 } 2389 } 2390 2391 // Fold a bunch of operators when the RHS is undef. 2392 if (N2.getOpcode() == ISD::UNDEF) { 2393 switch (Opcode) { 2394 case ISD::XOR: 2395 if (N1.getOpcode() == ISD::UNDEF) 2396 // Handle undef ^ undef -> 0 special case. This is a common 2397 // idiom (misuse). 2398 return getConstant(0, VT); 2399 // fallthrough 2400 case ISD::ADD: 2401 case ISD::ADDC: 2402 case ISD::ADDE: 2403 case ISD::SUB: 2404 case ISD::FADD: 2405 case ISD::FSUB: 2406 case ISD::FMUL: 2407 case ISD::FDIV: 2408 case ISD::FREM: 2409 case ISD::UDIV: 2410 case ISD::SDIV: 2411 case ISD::UREM: 2412 case ISD::SREM: 2413 return N2; // fold op(arg1, undef) -> undef 2414 case ISD::MUL: 2415 case ISD::AND: 2416 case ISD::SRL: 2417 case ISD::SHL: 2418 if (!VT.isVector()) 2419 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2420 // For vectors, we can't easily build an all zero vector, just return 2421 // the LHS. 2422 return N1; 2423 case ISD::OR: 2424 if (!VT.isVector()) 2425 return getConstant(VT.getIntegerVTBitMask(), VT); 2426 // For vectors, we can't easily build an all one vector, just return 2427 // the LHS. 2428 return N1; 2429 case ISD::SRA: 2430 return N1; 2431 } 2432 } 2433 2434 // Memoize this node if possible. 2435 SDNode *N; 2436 SDVTList VTs = getVTList(VT); 2437 if (VT != MVT::Flag) { 2438 SDOperand Ops[] = { N1, N2 }; 2439 FoldingSetNodeID ID; 2440 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2441 void *IP = 0; 2442 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2443 return SDOperand(E, 0); 2444 N = new BinarySDNode(Opcode, VTs, N1, N2); 2445 CSEMap.InsertNode(N, IP); 2446 } else { 2447 N = new BinarySDNode(Opcode, VTs, N1, N2); 2448 } 2449 2450 AllNodes.push_back(N); 2451 return SDOperand(N, 0); 2452} 2453 2454SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2455 SDOperand N1, SDOperand N2, SDOperand N3) { 2456 // Perform various simplifications. 2457 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 2458 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 2459 switch (Opcode) { 2460 case ISD::SETCC: { 2461 // Use FoldSetCC to simplify SETCC's. 2462 SDOperand Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2463 if (Simp.Val) return Simp; 2464 break; 2465 } 2466 case ISD::SELECT: 2467 if (N1C) { 2468 if (N1C->getValue()) 2469 return N2; // select true, X, Y -> X 2470 else 2471 return N3; // select false, X, Y -> Y 2472 } 2473 2474 if (N2 == N3) return N2; // select C, X, X -> X 2475 break; 2476 case ISD::BRCOND: 2477 if (N2C) { 2478 if (N2C->getValue()) // Unconditional branch 2479 return getNode(ISD::BR, MVT::Other, N1, N3); 2480 else 2481 return N1; // Never-taken branch 2482 } 2483 break; 2484 case ISD::VECTOR_SHUFFLE: 2485 assert(VT == N1.getValueType() && VT == N2.getValueType() && 2486 VT.isVector() && N3.getValueType().isVector() && 2487 N3.getOpcode() == ISD::BUILD_VECTOR && 2488 VT.getVectorNumElements() == N3.getNumOperands() && 2489 "Illegal VECTOR_SHUFFLE node!"); 2490 break; 2491 case ISD::BIT_CONVERT: 2492 // Fold bit_convert nodes from a type to themselves. 2493 if (N1.getValueType() == VT) 2494 return N1; 2495 break; 2496 } 2497 2498 // Memoize node if it doesn't produce a flag. 2499 SDNode *N; 2500 SDVTList VTs = getVTList(VT); 2501 if (VT != MVT::Flag) { 2502 SDOperand Ops[] = { N1, N2, N3 }; 2503 FoldingSetNodeID ID; 2504 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2505 void *IP = 0; 2506 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2507 return SDOperand(E, 0); 2508 N = new TernarySDNode(Opcode, VTs, N1, N2, N3); 2509 CSEMap.InsertNode(N, IP); 2510 } else { 2511 N = new TernarySDNode(Opcode, VTs, N1, N2, N3); 2512 } 2513 AllNodes.push_back(N); 2514 return SDOperand(N, 0); 2515} 2516 2517SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2518 SDOperand N1, SDOperand N2, SDOperand N3, 2519 SDOperand N4) { 2520 SDOperand Ops[] = { N1, N2, N3, N4 }; 2521 return getNode(Opcode, VT, Ops, 4); 2522} 2523 2524SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 2525 SDOperand N1, SDOperand N2, SDOperand N3, 2526 SDOperand N4, SDOperand N5) { 2527 SDOperand Ops[] = { N1, N2, N3, N4, N5 }; 2528 return getNode(Opcode, VT, Ops, 5); 2529} 2530 2531/// getMemsetValue - Vectorized representation of the memset value 2532/// operand. 2533static SDOperand getMemsetValue(SDOperand Value, MVT VT, SelectionDAG &DAG) { 2534 unsigned NumBits = VT.isVector() ? 2535 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2536 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2537 APInt Val = APInt(NumBits, C->getValue() & 255); 2538 unsigned Shift = 8; 2539 for (unsigned i = NumBits; i > 8; i >>= 1) { 2540 Val = (Val << Shift) | Val; 2541 Shift <<= 1; 2542 } 2543 if (VT.isInteger()) 2544 return DAG.getConstant(Val, VT); 2545 return DAG.getConstantFP(APFloat(Val), VT); 2546 } 2547 2548 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2549 unsigned Shift = 8; 2550 for (unsigned i = NumBits; i > 8; i >>= 1) { 2551 Value = DAG.getNode(ISD::OR, VT, 2552 DAG.getNode(ISD::SHL, VT, Value, 2553 DAG.getConstant(Shift, MVT::i8)), Value); 2554 Shift <<= 1; 2555 } 2556 2557 return Value; 2558} 2559 2560/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2561/// used when a memcpy is turned into a memset when the source is a constant 2562/// string ptr. 2563static SDOperand getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2564 const TargetLowering &TLI, 2565 std::string &Str, unsigned Offset) { 2566 // Handle vector with all elements zero. 2567 if (Str.empty()) { 2568 if (VT.isInteger()) 2569 return DAG.getConstant(0, VT); 2570 unsigned NumElts = VT.getVectorNumElements(); 2571 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2572 return DAG.getNode(ISD::BIT_CONVERT, VT, 2573 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2574 } 2575 2576 assert(!VT.isVector() && "Can't handle vector type here!"); 2577 unsigned NumBits = VT.getSizeInBits(); 2578 unsigned MSB = NumBits / 8; 2579 uint64_t Val = 0; 2580 if (TLI.isLittleEndian()) 2581 Offset = Offset + MSB - 1; 2582 for (unsigned i = 0; i != MSB; ++i) { 2583 Val = (Val << 8) | (unsigned char)Str[Offset]; 2584 Offset += TLI.isLittleEndian() ? -1 : 1; 2585 } 2586 return DAG.getConstant(Val, VT); 2587} 2588 2589/// getMemBasePlusOffset - Returns base and offset node for the 2590/// 2591static SDOperand getMemBasePlusOffset(SDOperand Base, unsigned Offset, 2592 SelectionDAG &DAG) { 2593 MVT VT = Base.getValueType(); 2594 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2595} 2596 2597/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2598/// 2599static bool isMemSrcFromString(SDOperand Src, std::string &Str) { 2600 unsigned SrcDelta = 0; 2601 GlobalAddressSDNode *G = NULL; 2602 if (Src.getOpcode() == ISD::GlobalAddress) 2603 G = cast<GlobalAddressSDNode>(Src); 2604 else if (Src.getOpcode() == ISD::ADD && 2605 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2606 Src.getOperand(1).getOpcode() == ISD::Constant) { 2607 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2608 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getValue(); 2609 } 2610 if (!G) 2611 return false; 2612 2613 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2614 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 2615 return true; 2616 2617 return false; 2618} 2619 2620/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2621/// to replace the memset / memcpy is below the threshold. It also returns the 2622/// types of the sequence of memory ops to perform memset / memcpy. 2623static 2624bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2625 SDOperand Dst, SDOperand Src, 2626 unsigned Limit, uint64_t Size, unsigned &Align, 2627 std::string &Str, bool &isSrcStr, 2628 SelectionDAG &DAG, 2629 const TargetLowering &TLI) { 2630 isSrcStr = isMemSrcFromString(Src, Str); 2631 bool isSrcConst = isa<ConstantSDNode>(Src); 2632 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 2633 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 2634 if (VT != MVT::iAny) { 2635 unsigned NewAlign = (unsigned) 2636 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 2637 // If source is a string constant, this will require an unaligned load. 2638 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 2639 if (Dst.getOpcode() != ISD::FrameIndex) { 2640 // Can't change destination alignment. It requires a unaligned store. 2641 if (AllowUnalign) 2642 VT = MVT::iAny; 2643 } else { 2644 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 2645 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2646 if (MFI->isFixedObjectIndex(FI)) { 2647 // Can't change destination alignment. It requires a unaligned store. 2648 if (AllowUnalign) 2649 VT = MVT::iAny; 2650 } else { 2651 // Give the stack frame object a larger alignment if needed. 2652 if (MFI->getObjectAlignment(FI) < NewAlign) 2653 MFI->setObjectAlignment(FI, NewAlign); 2654 Align = NewAlign; 2655 } 2656 } 2657 } 2658 } 2659 2660 if (VT == MVT::iAny) { 2661 if (AllowUnalign) { 2662 VT = MVT::i64; 2663 } else { 2664 switch (Align & 7) { 2665 case 0: VT = MVT::i64; break; 2666 case 4: VT = MVT::i32; break; 2667 case 2: VT = MVT::i16; break; 2668 default: VT = MVT::i8; break; 2669 } 2670 } 2671 2672 MVT LVT = MVT::i64; 2673 while (!TLI.isTypeLegal(LVT)) 2674 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 2675 assert(LVT.isInteger()); 2676 2677 if (VT.bitsGT(LVT)) 2678 VT = LVT; 2679 } 2680 2681 unsigned NumMemOps = 0; 2682 while (Size != 0) { 2683 unsigned VTSize = VT.getSizeInBits() / 8; 2684 while (VTSize > Size) { 2685 // For now, only use non-vector load / store's for the left-over pieces. 2686 if (VT.isVector()) { 2687 VT = MVT::i64; 2688 while (!TLI.isTypeLegal(VT)) 2689 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2690 VTSize = VT.getSizeInBits() / 8; 2691 } else { 2692 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2693 VTSize >>= 1; 2694 } 2695 } 2696 2697 if (++NumMemOps > Limit) 2698 return false; 2699 MemOps.push_back(VT); 2700 Size -= VTSize; 2701 } 2702 2703 return true; 2704} 2705 2706static SDOperand getMemcpyLoadsAndStores(SelectionDAG &DAG, 2707 SDOperand Chain, SDOperand Dst, 2708 SDOperand Src, uint64_t Size, 2709 unsigned Align, bool AlwaysInline, 2710 const Value *DstSV, uint64_t DstSVOff, 2711 const Value *SrcSV, uint64_t SrcSVOff){ 2712 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2713 2714 // Expand memcpy to a series of load and store ops if the size operand falls 2715 // below a certain threshold. 2716 std::vector<MVT> MemOps; 2717 uint64_t Limit = -1; 2718 if (!AlwaysInline) 2719 Limit = TLI.getMaxStoresPerMemcpy(); 2720 unsigned DstAlign = Align; // Destination alignment can change. 2721 std::string Str; 2722 bool CopyFromStr; 2723 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2724 Str, CopyFromStr, DAG, TLI)) 2725 return SDOperand(); 2726 2727 2728 bool isZeroStr = CopyFromStr && Str.empty(); 2729 SmallVector<SDOperand, 8> OutChains; 2730 unsigned NumMemOps = MemOps.size(); 2731 uint64_t SrcOff = 0, DstOff = 0; 2732 for (unsigned i = 0; i < NumMemOps; i++) { 2733 MVT VT = MemOps[i]; 2734 unsigned VTSize = VT.getSizeInBits() / 8; 2735 SDOperand Value, Store; 2736 2737 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 2738 // It's unlikely a store of a vector immediate can be done in a single 2739 // instruction. It would require a load from a constantpool first. 2740 // We also handle store a vector with all zero's. 2741 // FIXME: Handle other cases where store of vector immediate is done in 2742 // a single instruction. 2743 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 2744 Store = DAG.getStore(Chain, Value, 2745 getMemBasePlusOffset(Dst, DstOff, DAG), 2746 DstSV, DstSVOff + DstOff); 2747 } else { 2748 Value = DAG.getLoad(VT, Chain, 2749 getMemBasePlusOffset(Src, SrcOff, DAG), 2750 SrcSV, SrcSVOff + SrcOff, false, Align); 2751 Store = DAG.getStore(Chain, Value, 2752 getMemBasePlusOffset(Dst, DstOff, DAG), 2753 DstSV, DstSVOff + DstOff, false, DstAlign); 2754 } 2755 OutChains.push_back(Store); 2756 SrcOff += VTSize; 2757 DstOff += VTSize; 2758 } 2759 2760 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2761 &OutChains[0], OutChains.size()); 2762} 2763 2764static SDOperand getMemmoveLoadsAndStores(SelectionDAG &DAG, 2765 SDOperand Chain, SDOperand Dst, 2766 SDOperand Src, uint64_t Size, 2767 unsigned Align, bool AlwaysInline, 2768 const Value *DstSV, uint64_t DstSVOff, 2769 const Value *SrcSV, uint64_t SrcSVOff){ 2770 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2771 2772 // Expand memmove to a series of load and store ops if the size operand falls 2773 // below a certain threshold. 2774 std::vector<MVT> MemOps; 2775 uint64_t Limit = -1; 2776 if (!AlwaysInline) 2777 Limit = TLI.getMaxStoresPerMemmove(); 2778 unsigned DstAlign = Align; // Destination alignment can change. 2779 std::string Str; 2780 bool CopyFromStr; 2781 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2782 Str, CopyFromStr, DAG, TLI)) 2783 return SDOperand(); 2784 2785 uint64_t SrcOff = 0, DstOff = 0; 2786 2787 SmallVector<SDOperand, 8> LoadValues; 2788 SmallVector<SDOperand, 8> LoadChains; 2789 SmallVector<SDOperand, 8> OutChains; 2790 unsigned NumMemOps = MemOps.size(); 2791 for (unsigned i = 0; i < NumMemOps; i++) { 2792 MVT VT = MemOps[i]; 2793 unsigned VTSize = VT.getSizeInBits() / 8; 2794 SDOperand Value, Store; 2795 2796 Value = DAG.getLoad(VT, Chain, 2797 getMemBasePlusOffset(Src, SrcOff, DAG), 2798 SrcSV, SrcSVOff + SrcOff, false, Align); 2799 LoadValues.push_back(Value); 2800 LoadChains.push_back(Value.getValue(1)); 2801 SrcOff += VTSize; 2802 } 2803 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 2804 &LoadChains[0], LoadChains.size()); 2805 OutChains.clear(); 2806 for (unsigned i = 0; i < NumMemOps; i++) { 2807 MVT VT = MemOps[i]; 2808 unsigned VTSize = VT.getSizeInBits() / 8; 2809 SDOperand Value, Store; 2810 2811 Store = DAG.getStore(Chain, LoadValues[i], 2812 getMemBasePlusOffset(Dst, DstOff, DAG), 2813 DstSV, DstSVOff + DstOff, false, DstAlign); 2814 OutChains.push_back(Store); 2815 DstOff += VTSize; 2816 } 2817 2818 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2819 &OutChains[0], OutChains.size()); 2820} 2821 2822static SDOperand getMemsetStores(SelectionDAG &DAG, 2823 SDOperand Chain, SDOperand Dst, 2824 SDOperand Src, uint64_t Size, 2825 unsigned Align, 2826 const Value *DstSV, uint64_t DstSVOff) { 2827 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2828 2829 // Expand memset to a series of load/store ops if the size operand 2830 // falls below a certain threshold. 2831 std::vector<MVT> MemOps; 2832 std::string Str; 2833 bool CopyFromStr; 2834 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 2835 Size, Align, Str, CopyFromStr, DAG, TLI)) 2836 return SDOperand(); 2837 2838 SmallVector<SDOperand, 8> OutChains; 2839 uint64_t DstOff = 0; 2840 2841 unsigned NumMemOps = MemOps.size(); 2842 for (unsigned i = 0; i < NumMemOps; i++) { 2843 MVT VT = MemOps[i]; 2844 unsigned VTSize = VT.getSizeInBits() / 8; 2845 SDOperand Value = getMemsetValue(Src, VT, DAG); 2846 SDOperand Store = DAG.getStore(Chain, Value, 2847 getMemBasePlusOffset(Dst, DstOff, DAG), 2848 DstSV, DstSVOff + DstOff); 2849 OutChains.push_back(Store); 2850 DstOff += VTSize; 2851 } 2852 2853 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2854 &OutChains[0], OutChains.size()); 2855} 2856 2857SDOperand SelectionDAG::getMemcpy(SDOperand Chain, SDOperand Dst, 2858 SDOperand Src, SDOperand Size, 2859 unsigned Align, bool AlwaysInline, 2860 const Value *DstSV, uint64_t DstSVOff, 2861 const Value *SrcSV, uint64_t SrcSVOff) { 2862 2863 // Check to see if we should lower the memcpy to loads and stores first. 2864 // For cases within the target-specified limits, this is the best choice. 2865 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2866 if (ConstantSize) { 2867 // Memcpy with size zero? Just return the original chain. 2868 if (ConstantSize->isNullValue()) 2869 return Chain; 2870 2871 SDOperand Result = 2872 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), 2873 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 2874 if (Result.Val) 2875 return Result; 2876 } 2877 2878 // Then check to see if we should lower the memcpy with target-specific 2879 // code. If the target chooses to do this, this is the next best. 2880 SDOperand Result = 2881 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 2882 AlwaysInline, 2883 DstSV, DstSVOff, SrcSV, SrcSVOff); 2884 if (Result.Val) 2885 return Result; 2886 2887 // If we really need inline code and the target declined to provide it, 2888 // use a (potentially long) sequence of loads and stores. 2889 if (AlwaysInline) { 2890 assert(ConstantSize && "AlwaysInline requires a constant size!"); 2891 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 2892 ConstantSize->getValue(), Align, true, 2893 DstSV, DstSVOff, SrcSV, SrcSVOff); 2894 } 2895 2896 // Emit a library call. 2897 TargetLowering::ArgListTy Args; 2898 TargetLowering::ArgListEntry Entry; 2899 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 2900 Entry.Node = Dst; Args.push_back(Entry); 2901 Entry.Node = Src; Args.push_back(Entry); 2902 Entry.Node = Size; Args.push_back(Entry); 2903 std::pair<SDOperand,SDOperand> CallResult = 2904 TLI.LowerCallTo(Chain, Type::VoidTy, 2905 false, false, false, CallingConv::C, false, 2906 getExternalSymbol("memcpy", TLI.getPointerTy()), 2907 Args, *this); 2908 return CallResult.second; 2909} 2910 2911SDOperand SelectionDAG::getMemmove(SDOperand Chain, SDOperand Dst, 2912 SDOperand Src, SDOperand Size, 2913 unsigned Align, 2914 const Value *DstSV, uint64_t DstSVOff, 2915 const Value *SrcSV, uint64_t SrcSVOff) { 2916 2917 // Check to see if we should lower the memmove to loads and stores first. 2918 // For cases within the target-specified limits, this is the best choice. 2919 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2920 if (ConstantSize) { 2921 // Memmove with size zero? Just return the original chain. 2922 if (ConstantSize->isNullValue()) 2923 return Chain; 2924 2925 SDOperand Result = 2926 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), 2927 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 2928 if (Result.Val) 2929 return Result; 2930 } 2931 2932 // Then check to see if we should lower the memmove with target-specific 2933 // code. If the target chooses to do this, this is the next best. 2934 SDOperand Result = 2935 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 2936 DstSV, DstSVOff, SrcSV, SrcSVOff); 2937 if (Result.Val) 2938 return Result; 2939 2940 // Emit a library call. 2941 TargetLowering::ArgListTy Args; 2942 TargetLowering::ArgListEntry Entry; 2943 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 2944 Entry.Node = Dst; Args.push_back(Entry); 2945 Entry.Node = Src; Args.push_back(Entry); 2946 Entry.Node = Size; Args.push_back(Entry); 2947 std::pair<SDOperand,SDOperand> CallResult = 2948 TLI.LowerCallTo(Chain, Type::VoidTy, 2949 false, false, false, CallingConv::C, false, 2950 getExternalSymbol("memmove", TLI.getPointerTy()), 2951 Args, *this); 2952 return CallResult.second; 2953} 2954 2955SDOperand SelectionDAG::getMemset(SDOperand Chain, SDOperand Dst, 2956 SDOperand Src, SDOperand Size, 2957 unsigned Align, 2958 const Value *DstSV, uint64_t DstSVOff) { 2959 2960 // Check to see if we should lower the memset to stores first. 2961 // For cases within the target-specified limits, this is the best choice. 2962 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2963 if (ConstantSize) { 2964 // Memset with size zero? Just return the original chain. 2965 if (ConstantSize->isNullValue()) 2966 return Chain; 2967 2968 SDOperand Result = 2969 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align, 2970 DstSV, DstSVOff); 2971 if (Result.Val) 2972 return Result; 2973 } 2974 2975 // Then check to see if we should lower the memset with target-specific 2976 // code. If the target chooses to do this, this is the next best. 2977 SDOperand Result = 2978 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 2979 DstSV, DstSVOff); 2980 if (Result.Val) 2981 return Result; 2982 2983 // Emit a library call. 2984 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 2985 TargetLowering::ArgListTy Args; 2986 TargetLowering::ArgListEntry Entry; 2987 Entry.Node = Dst; Entry.Ty = IntPtrTy; 2988 Args.push_back(Entry); 2989 // Extend or truncate the argument to be an i32 value for the call. 2990 if (Src.getValueType().bitsGT(MVT::i32)) 2991 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 2992 else 2993 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 2994 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 2995 Args.push_back(Entry); 2996 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 2997 Args.push_back(Entry); 2998 std::pair<SDOperand,SDOperand> CallResult = 2999 TLI.LowerCallTo(Chain, Type::VoidTy, 3000 false, false, false, CallingConv::C, false, 3001 getExternalSymbol("memset", TLI.getPointerTy()), 3002 Args, *this); 3003 return CallResult.second; 3004} 3005 3006SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, 3007 SDOperand Ptr, SDOperand Cmp, 3008 SDOperand Swp, const Value* PtrVal, 3009 unsigned Alignment) { 3010 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3011 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3012 SDVTList VTs = getVTList(Cmp.getValueType(), MVT::Other); 3013 FoldingSetNodeID ID; 3014 SDOperand Ops[] = {Chain, Ptr, Cmp, Swp}; 3015 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3016 void* IP = 0; 3017 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3018 return SDOperand(E, 0); 3019 SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, 3020 PtrVal, Alignment); 3021 CSEMap.InsertNode(N, IP); 3022 AllNodes.push_back(N); 3023 return SDOperand(N, 0); 3024} 3025 3026SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain, 3027 SDOperand Ptr, SDOperand Val, 3028 const Value* PtrVal, 3029 unsigned Alignment) { 3030 assert(( Opcode == ISD::ATOMIC_LOAD_ADD || Opcode == ISD::ATOMIC_LOAD_SUB 3031 || Opcode == ISD::ATOMIC_SWAP || Opcode == ISD::ATOMIC_LOAD_AND 3032 || Opcode == ISD::ATOMIC_LOAD_OR || Opcode == ISD::ATOMIC_LOAD_XOR 3033 || Opcode == ISD::ATOMIC_LOAD_NAND 3034 || Opcode == ISD::ATOMIC_LOAD_MIN || Opcode == ISD::ATOMIC_LOAD_MAX 3035 || Opcode == ISD::ATOMIC_LOAD_UMIN || Opcode == ISD::ATOMIC_LOAD_UMAX) 3036 && "Invalid Atomic Op"); 3037 SDVTList VTs = getVTList(Val.getValueType(), MVT::Other); 3038 FoldingSetNodeID ID; 3039 SDOperand Ops[] = {Chain, Ptr, Val}; 3040 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3041 void* IP = 0; 3042 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3043 return SDOperand(E, 0); 3044 SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, 3045 PtrVal, Alignment); 3046 CSEMap.InsertNode(N, IP); 3047 AllNodes.push_back(N); 3048 return SDOperand(N, 0); 3049} 3050 3051SDOperand 3052SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3053 MVT VT, SDOperand Chain, 3054 SDOperand Ptr, SDOperand Offset, 3055 const Value *SV, int SVOffset, MVT EVT, 3056 bool isVolatile, unsigned Alignment) { 3057 if (Alignment == 0) { // Ensure that codegen never sees alignment 0 3058 const Type *Ty = 0; 3059 if (VT != MVT::iPTR) { 3060 Ty = VT.getTypeForMVT(); 3061 } else if (SV) { 3062 const PointerType *PT = dyn_cast<PointerType>(SV->getType()); 3063 assert(PT && "Value for load must be a pointer"); 3064 Ty = PT->getElementType(); 3065 } 3066 assert(Ty && "Could not get type information for load"); 3067 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty); 3068 } 3069 3070 if (VT == EVT) { 3071 ExtType = ISD::NON_EXTLOAD; 3072 } else if (ExtType == ISD::NON_EXTLOAD) { 3073 assert(VT == EVT && "Non-extending load from different memory type!"); 3074 } else { 3075 // Extending load. 3076 if (VT.isVector()) 3077 assert(EVT == VT.getVectorElementType() && "Invalid vector extload!"); 3078 else 3079 assert(EVT.bitsLT(VT) && 3080 "Should only be an extending load, not truncating!"); 3081 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3082 "Cannot sign/zero extend a FP/Vector load!"); 3083 assert(VT.isInteger() == EVT.isInteger() && 3084 "Cannot convert from FP to Int or Int -> FP!"); 3085 } 3086 3087 bool Indexed = AM != ISD::UNINDEXED; 3088 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3089 "Unindexed load with an offset!"); 3090 3091 SDVTList VTs = Indexed ? 3092 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3093 SDOperand Ops[] = { Chain, Ptr, Offset }; 3094 FoldingSetNodeID ID; 3095 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3096 ID.AddInteger(AM); 3097 ID.AddInteger(ExtType); 3098 ID.AddInteger(EVT.getRawBits()); 3099 ID.AddInteger(Alignment); 3100 ID.AddInteger(isVolatile); 3101 void *IP = 0; 3102 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3103 return SDOperand(E, 0); 3104 SDNode *N = new LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3105 Alignment, isVolatile); 3106 CSEMap.InsertNode(N, IP); 3107 AllNodes.push_back(N); 3108 return SDOperand(N, 0); 3109} 3110 3111SDOperand SelectionDAG::getLoad(MVT VT, 3112 SDOperand Chain, SDOperand Ptr, 3113 const Value *SV, int SVOffset, 3114 bool isVolatile, unsigned Alignment) { 3115 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3116 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3117 SV, SVOffset, VT, isVolatile, Alignment); 3118} 3119 3120SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3121 SDOperand Chain, SDOperand Ptr, 3122 const Value *SV, 3123 int SVOffset, MVT EVT, 3124 bool isVolatile, unsigned Alignment) { 3125 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3126 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3127 SV, SVOffset, EVT, isVolatile, Alignment); 3128} 3129 3130SDOperand 3131SelectionDAG::getIndexedLoad(SDOperand OrigLoad, SDOperand Base, 3132 SDOperand Offset, ISD::MemIndexedMode AM) { 3133 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3134 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3135 "Load is already a indexed load!"); 3136 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3137 LD->getChain(), Base, Offset, LD->getSrcValue(), 3138 LD->getSrcValueOffset(), LD->getMemoryVT(), 3139 LD->isVolatile(), LD->getAlignment()); 3140} 3141 3142SDOperand SelectionDAG::getStore(SDOperand Chain, SDOperand Val, 3143 SDOperand Ptr, const Value *SV, int SVOffset, 3144 bool isVolatile, unsigned Alignment) { 3145 MVT VT = Val.getValueType(); 3146 3147 if (Alignment == 0) { // Ensure that codegen never sees alignment 0 3148 const Type *Ty = 0; 3149 if (VT != MVT::iPTR) { 3150 Ty = VT.getTypeForMVT(); 3151 } else if (SV) { 3152 const PointerType *PT = dyn_cast<PointerType>(SV->getType()); 3153 assert(PT && "Value for store must be a pointer"); 3154 Ty = PT->getElementType(); 3155 } 3156 assert(Ty && "Could not get type information for store"); 3157 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty); 3158 } 3159 SDVTList VTs = getVTList(MVT::Other); 3160 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3161 SDOperand Ops[] = { Chain, Val, Ptr, Undef }; 3162 FoldingSetNodeID ID; 3163 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3164 ID.AddInteger(ISD::UNINDEXED); 3165 ID.AddInteger(false); 3166 ID.AddInteger(VT.getRawBits()); 3167 ID.AddInteger(Alignment); 3168 ID.AddInteger(isVolatile); 3169 void *IP = 0; 3170 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3171 return SDOperand(E, 0); 3172 SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3173 VT, SV, SVOffset, Alignment, isVolatile); 3174 CSEMap.InsertNode(N, IP); 3175 AllNodes.push_back(N); 3176 return SDOperand(N, 0); 3177} 3178 3179SDOperand SelectionDAG::getTruncStore(SDOperand Chain, SDOperand Val, 3180 SDOperand Ptr, const Value *SV, 3181 int SVOffset, MVT SVT, 3182 bool isVolatile, unsigned Alignment) { 3183 MVT VT = Val.getValueType(); 3184 3185 if (VT == SVT) 3186 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3187 3188 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3189 assert(VT.isInteger() == SVT.isInteger() && 3190 "Can't do FP-INT conversion!"); 3191 3192 if (Alignment == 0) { // Ensure that codegen never sees alignment 0 3193 const Type *Ty = 0; 3194 if (VT != MVT::iPTR) { 3195 Ty = VT.getTypeForMVT(); 3196 } else if (SV) { 3197 const PointerType *PT = dyn_cast<PointerType>(SV->getType()); 3198 assert(PT && "Value for store must be a pointer"); 3199 Ty = PT->getElementType(); 3200 } 3201 assert(Ty && "Could not get type information for store"); 3202 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty); 3203 } 3204 SDVTList VTs = getVTList(MVT::Other); 3205 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3206 SDOperand Ops[] = { Chain, Val, Ptr, Undef }; 3207 FoldingSetNodeID ID; 3208 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3209 ID.AddInteger(ISD::UNINDEXED); 3210 ID.AddInteger(1); 3211 ID.AddInteger(SVT.getRawBits()); 3212 ID.AddInteger(Alignment); 3213 ID.AddInteger(isVolatile); 3214 void *IP = 0; 3215 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3216 return SDOperand(E, 0); 3217 SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3218 SVT, SV, SVOffset, Alignment, isVolatile); 3219 CSEMap.InsertNode(N, IP); 3220 AllNodes.push_back(N); 3221 return SDOperand(N, 0); 3222} 3223 3224SDOperand 3225SelectionDAG::getIndexedStore(SDOperand OrigStore, SDOperand Base, 3226 SDOperand Offset, ISD::MemIndexedMode AM) { 3227 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3228 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3229 "Store is already a indexed store!"); 3230 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3231 SDOperand Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3232 FoldingSetNodeID ID; 3233 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3234 ID.AddInteger(AM); 3235 ID.AddInteger(ST->isTruncatingStore()); 3236 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3237 ID.AddInteger(ST->getAlignment()); 3238 ID.AddInteger(ST->isVolatile()); 3239 void *IP = 0; 3240 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3241 return SDOperand(E, 0); 3242 SDNode *N = new StoreSDNode(Ops, VTs, AM, 3243 ST->isTruncatingStore(), ST->getMemoryVT(), 3244 ST->getSrcValue(), ST->getSrcValueOffset(), 3245 ST->getAlignment(), ST->isVolatile()); 3246 CSEMap.InsertNode(N, IP); 3247 AllNodes.push_back(N); 3248 return SDOperand(N, 0); 3249} 3250 3251SDOperand SelectionDAG::getVAArg(MVT VT, 3252 SDOperand Chain, SDOperand Ptr, 3253 SDOperand SV) { 3254 SDOperand Ops[] = { Chain, Ptr, SV }; 3255 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 3256} 3257 3258SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, 3259 SDOperandPtr Ops, unsigned NumOps) { 3260 switch (NumOps) { 3261 case 0: return getNode(Opcode, VT); 3262 case 1: return getNode(Opcode, VT, Ops[0]); 3263 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3264 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3265 default: break; 3266 } 3267 3268 switch (Opcode) { 3269 default: break; 3270 case ISD::SELECT_CC: { 3271 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3272 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3273 "LHS and RHS of condition must have same type!"); 3274 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3275 "True and False arms of SelectCC must have same type!"); 3276 assert(Ops[2].getValueType() == VT && 3277 "select_cc node must be of same type as true and false value!"); 3278 break; 3279 } 3280 case ISD::BR_CC: { 3281 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3282 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3283 "LHS/RHS of comparison should match types!"); 3284 break; 3285 } 3286 } 3287 3288 // Memoize nodes. 3289 SDNode *N; 3290 SDVTList VTs = getVTList(VT); 3291 if (VT != MVT::Flag) { 3292 FoldingSetNodeID ID; 3293 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3294 void *IP = 0; 3295 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3296 return SDOperand(E, 0); 3297 N = new SDNode(Opcode, VTs, Ops, NumOps); 3298 CSEMap.InsertNode(N, IP); 3299 } else { 3300 N = new SDNode(Opcode, VTs, Ops, NumOps); 3301 } 3302 AllNodes.push_back(N); 3303 return SDOperand(N, 0); 3304} 3305 3306SDOperand SelectionDAG::getNode(unsigned Opcode, 3307 std::vector<MVT> &ResultTys, 3308 SDOperandPtr Ops, unsigned NumOps) { 3309 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(), 3310 Ops, NumOps); 3311} 3312 3313SDOperand SelectionDAG::getNode(unsigned Opcode, 3314 const MVT *VTs, unsigned NumVTs, 3315 SDOperandPtr Ops, unsigned NumOps) { 3316 if (NumVTs == 1) 3317 return getNode(Opcode, VTs[0], Ops, NumOps); 3318 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps); 3319} 3320 3321SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3322 SDOperandPtr Ops, unsigned NumOps) { 3323 if (VTList.NumVTs == 1) 3324 return getNode(Opcode, VTList.VTs[0], Ops, NumOps); 3325 3326 switch (Opcode) { 3327 // FIXME: figure out how to safely handle things like 3328 // int foo(int x) { return 1 << (x & 255); } 3329 // int bar() { return foo(256); } 3330#if 0 3331 case ISD::SRA_PARTS: 3332 case ISD::SRL_PARTS: 3333 case ISD::SHL_PARTS: 3334 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3335 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3336 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3337 else if (N3.getOpcode() == ISD::AND) 3338 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3339 // If the and is only masking out bits that cannot effect the shift, 3340 // eliminate the and. 3341 unsigned NumBits = VT.getSizeInBits()*2; 3342 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3343 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3344 } 3345 break; 3346#endif 3347 } 3348 3349 // Memoize the node unless it returns a flag. 3350 SDNode *N; 3351 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3352 FoldingSetNodeID ID; 3353 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3354 void *IP = 0; 3355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3356 return SDOperand(E, 0); 3357 if (NumOps == 1) 3358 N = new UnarySDNode(Opcode, VTList, Ops[0]); 3359 else if (NumOps == 2) 3360 N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3361 else if (NumOps == 3) 3362 N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3363 else 3364 N = new SDNode(Opcode, VTList, Ops, NumOps); 3365 CSEMap.InsertNode(N, IP); 3366 } else { 3367 if (NumOps == 1) 3368 N = new UnarySDNode(Opcode, VTList, Ops[0]); 3369 else if (NumOps == 2) 3370 N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3371 else if (NumOps == 3) 3372 N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3373 else 3374 N = new SDNode(Opcode, VTList, Ops, NumOps); 3375 } 3376 AllNodes.push_back(N); 3377 return SDOperand(N, 0); 3378} 3379 3380SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 3381 return getNode(Opcode, VTList, (SDOperand*)0, 0); 3382} 3383 3384SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3385 SDOperand N1) { 3386 SDOperand Ops[] = { N1 }; 3387 return getNode(Opcode, VTList, Ops, 1); 3388} 3389 3390SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3391 SDOperand N1, SDOperand N2) { 3392 SDOperand Ops[] = { N1, N2 }; 3393 return getNode(Opcode, VTList, Ops, 2); 3394} 3395 3396SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3397 SDOperand N1, SDOperand N2, SDOperand N3) { 3398 SDOperand Ops[] = { N1, N2, N3 }; 3399 return getNode(Opcode, VTList, Ops, 3); 3400} 3401 3402SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3403 SDOperand N1, SDOperand N2, SDOperand N3, 3404 SDOperand N4) { 3405 SDOperand Ops[] = { N1, N2, N3, N4 }; 3406 return getNode(Opcode, VTList, Ops, 4); 3407} 3408 3409SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3410 SDOperand N1, SDOperand N2, SDOperand N3, 3411 SDOperand N4, SDOperand N5) { 3412 SDOperand Ops[] = { N1, N2, N3, N4, N5 }; 3413 return getNode(Opcode, VTList, Ops, 5); 3414} 3415 3416SDVTList SelectionDAG::getVTList(MVT VT) { 3417 return makeVTList(SDNode::getValueTypeList(VT), 1); 3418} 3419 3420SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 3421 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(), 3422 E = VTList.end(); I != E; ++I) { 3423 if (I->size() == 2 && (*I)[0] == VT1 && (*I)[1] == VT2) 3424 return makeVTList(&(*I)[0], 2); 3425 } 3426 std::vector<MVT> V; 3427 V.push_back(VT1); 3428 V.push_back(VT2); 3429 VTList.push_front(V); 3430 return makeVTList(&(*VTList.begin())[0], 2); 3431} 3432SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, 3433 MVT VT3) { 3434 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(), 3435 E = VTList.end(); I != E; ++I) { 3436 if (I->size() == 3 && (*I)[0] == VT1 && (*I)[1] == VT2 && 3437 (*I)[2] == VT3) 3438 return makeVTList(&(*I)[0], 3); 3439 } 3440 std::vector<MVT> V; 3441 V.push_back(VT1); 3442 V.push_back(VT2); 3443 V.push_back(VT3); 3444 VTList.push_front(V); 3445 return makeVTList(&(*VTList.begin())[0], 3); 3446} 3447 3448SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 3449 switch (NumVTs) { 3450 case 0: assert(0 && "Cannot have nodes without results!"); 3451 case 1: return getVTList(VTs[0]); 3452 case 2: return getVTList(VTs[0], VTs[1]); 3453 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 3454 default: break; 3455 } 3456 3457 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(), 3458 E = VTList.end(); I != E; ++I) { 3459 if (I->size() != NumVTs || VTs[0] != (*I)[0] || VTs[1] != (*I)[1]) continue; 3460 3461 bool NoMatch = false; 3462 for (unsigned i = 2; i != NumVTs; ++i) 3463 if (VTs[i] != (*I)[i]) { 3464 NoMatch = true; 3465 break; 3466 } 3467 if (!NoMatch) 3468 return makeVTList(&*I->begin(), NumVTs); 3469 } 3470 3471 VTList.push_front(std::vector<MVT>(VTs, VTs+NumVTs)); 3472 return makeVTList(&*VTList.begin()->begin(), NumVTs); 3473} 3474 3475 3476/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 3477/// specified operands. If the resultant node already exists in the DAG, 3478/// this does not modify the specified node, instead it returns the node that 3479/// already exists. If the resultant node does not exist in the DAG, the 3480/// input node is returned. As a degenerate case, if you specify the same 3481/// input operands as the node already has, the input node is returned. 3482SDOperand SelectionDAG:: 3483UpdateNodeOperands(SDOperand InN, SDOperand Op) { 3484 SDNode *N = InN.Val; 3485 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 3486 3487 // Check to see if there is no change. 3488 if (Op == N->getOperand(0)) return InN; 3489 3490 // See if the modified node already exists. 3491 void *InsertPos = 0; 3492 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 3493 return SDOperand(Existing, InN.ResNo); 3494 3495 // Nope it doesn't. Remove the node from it's current place in the maps. 3496 if (InsertPos) 3497 RemoveNodeFromCSEMaps(N); 3498 3499 // Now we update the operands. 3500 N->OperandList[0].getVal()->removeUser(0, N); 3501 N->OperandList[0] = Op; 3502 N->OperandList[0].setUser(N); 3503 Op.Val->addUser(0, N); 3504 3505 // If this gets put into a CSE map, add it. 3506 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3507 return InN; 3508} 3509 3510SDOperand SelectionDAG:: 3511UpdateNodeOperands(SDOperand InN, SDOperand Op1, SDOperand Op2) { 3512 SDNode *N = InN.Val; 3513 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 3514 3515 // Check to see if there is no change. 3516 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 3517 return InN; // No operands changed, just return the input node. 3518 3519 // See if the modified node already exists. 3520 void *InsertPos = 0; 3521 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 3522 return SDOperand(Existing, InN.ResNo); 3523 3524 // Nope it doesn't. Remove the node from it's current place in the maps. 3525 if (InsertPos) 3526 RemoveNodeFromCSEMaps(N); 3527 3528 // Now we update the operands. 3529 if (N->OperandList[0] != Op1) { 3530 N->OperandList[0].getVal()->removeUser(0, N); 3531 N->OperandList[0] = Op1; 3532 N->OperandList[0].setUser(N); 3533 Op1.Val->addUser(0, N); 3534 } 3535 if (N->OperandList[1] != Op2) { 3536 N->OperandList[1].getVal()->removeUser(1, N); 3537 N->OperandList[1] = Op2; 3538 N->OperandList[1].setUser(N); 3539 Op2.Val->addUser(1, N); 3540 } 3541 3542 // If this gets put into a CSE map, add it. 3543 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3544 return InN; 3545} 3546 3547SDOperand SelectionDAG:: 3548UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, SDOperand Op3) { 3549 SDOperand Ops[] = { Op1, Op2, Op3 }; 3550 return UpdateNodeOperands(N, Ops, 3); 3551} 3552 3553SDOperand SelectionDAG:: 3554UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, 3555 SDOperand Op3, SDOperand Op4) { 3556 SDOperand Ops[] = { Op1, Op2, Op3, Op4 }; 3557 return UpdateNodeOperands(N, Ops, 4); 3558} 3559 3560SDOperand SelectionDAG:: 3561UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, 3562 SDOperand Op3, SDOperand Op4, SDOperand Op5) { 3563 SDOperand Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 3564 return UpdateNodeOperands(N, Ops, 5); 3565} 3566 3567SDOperand SelectionDAG:: 3568UpdateNodeOperands(SDOperand InN, SDOperandPtr Ops, unsigned NumOps) { 3569 SDNode *N = InN.Val; 3570 assert(N->getNumOperands() == NumOps && 3571 "Update with wrong number of operands"); 3572 3573 // Check to see if there is no change. 3574 bool AnyChange = false; 3575 for (unsigned i = 0; i != NumOps; ++i) { 3576 if (Ops[i] != N->getOperand(i)) { 3577 AnyChange = true; 3578 break; 3579 } 3580 } 3581 3582 // No operands changed, just return the input node. 3583 if (!AnyChange) return InN; 3584 3585 // See if the modified node already exists. 3586 void *InsertPos = 0; 3587 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 3588 return SDOperand(Existing, InN.ResNo); 3589 3590 // Nope it doesn't. Remove the node from its current place in the maps. 3591 if (InsertPos) 3592 RemoveNodeFromCSEMaps(N); 3593 3594 // Now we update the operands. 3595 for (unsigned i = 0; i != NumOps; ++i) { 3596 if (N->OperandList[i] != Ops[i]) { 3597 N->OperandList[i].getVal()->removeUser(i, N); 3598 N->OperandList[i] = Ops[i]; 3599 N->OperandList[i].setUser(N); 3600 Ops[i].Val->addUser(i, N); 3601 } 3602 } 3603 3604 // If this gets put into a CSE map, add it. 3605 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3606 return InN; 3607} 3608 3609/// MorphNodeTo - This frees the operands of the current node, resets the 3610/// opcode, types, and operands to the specified value. This should only be 3611/// used by the SelectionDAG class. 3612void SDNode::MorphNodeTo(unsigned Opc, SDVTList L, 3613 SDOperandPtr Ops, unsigned NumOps) { 3614 NodeType = Opc; 3615 ValueList = L.VTs; 3616 NumValues = L.NumVTs; 3617 3618 // Clear the operands list, updating used nodes to remove this from their 3619 // use list. 3620 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) 3621 I->getVal()->removeUser(std::distance(op_begin(), I), this); 3622 3623 // If NumOps is larger than the # of operands we currently have, reallocate 3624 // the operand list. 3625 if (NumOps > NumOperands) { 3626 if (OperandsNeedDelete) { 3627 delete [] OperandList; 3628 } 3629 OperandList = new SDUse[NumOps]; 3630 OperandsNeedDelete = true; 3631 } 3632 3633 // Assign the new operands. 3634 NumOperands = NumOps; 3635 3636 for (unsigned i = 0, e = NumOps; i != e; ++i) { 3637 OperandList[i] = Ops[i]; 3638 OperandList[i].setUser(this); 3639 SDNode *N = OperandList[i].getVal(); 3640 N->addUser(i, this); 3641 ++N->UsesSize; 3642 } 3643} 3644 3645/// SelectNodeTo - These are used for target selectors to *mutate* the 3646/// specified node to have the specified return type, Target opcode, and 3647/// operands. Note that target opcodes are stored as 3648/// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field. 3649/// 3650/// Note that SelectNodeTo returns the resultant node. If there is already a 3651/// node of the specified opcode and operands, it returns that node instead of 3652/// the current one. 3653SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3654 MVT VT) { 3655 SDVTList VTs = getVTList(VT); 3656 FoldingSetNodeID ID; 3657 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, (SDOperand*)0, 0); 3658 void *IP = 0; 3659 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3660 return ON; 3661 3662 RemoveNodeFromCSEMaps(N); 3663 3664 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, SDOperandPtr(), 0); 3665 3666 CSEMap.InsertNode(N, IP); 3667 return N; 3668} 3669 3670SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3671 MVT VT, SDOperand Op1) { 3672 // If an identical node already exists, use it. 3673 SDVTList VTs = getVTList(VT); 3674 SDOperand Ops[] = { Op1 }; 3675 3676 FoldingSetNodeID ID; 3677 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1); 3678 void *IP = 0; 3679 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3680 return ON; 3681 3682 RemoveNodeFromCSEMaps(N); 3683 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1); 3684 CSEMap.InsertNode(N, IP); 3685 return N; 3686} 3687 3688SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3689 MVT VT, SDOperand Op1, 3690 SDOperand Op2) { 3691 // If an identical node already exists, use it. 3692 SDVTList VTs = getVTList(VT); 3693 SDOperand Ops[] = { Op1, Op2 }; 3694 3695 FoldingSetNodeID ID; 3696 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3697 void *IP = 0; 3698 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3699 return ON; 3700 3701 RemoveNodeFromCSEMaps(N); 3702 3703 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3704 3705 CSEMap.InsertNode(N, IP); // Memoize the new node. 3706 return N; 3707} 3708 3709SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3710 MVT VT, SDOperand Op1, 3711 SDOperand Op2, SDOperand Op3) { 3712 // If an identical node already exists, use it. 3713 SDVTList VTs = getVTList(VT); 3714 SDOperand Ops[] = { Op1, Op2, Op3 }; 3715 FoldingSetNodeID ID; 3716 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3717 void *IP = 0; 3718 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3719 return ON; 3720 3721 RemoveNodeFromCSEMaps(N); 3722 3723 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3724 3725 CSEMap.InsertNode(N, IP); // Memoize the new node. 3726 return N; 3727} 3728 3729SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3730 MVT VT, SDOperandPtr Ops, 3731 unsigned NumOps) { 3732 // If an identical node already exists, use it. 3733 SDVTList VTs = getVTList(VT); 3734 FoldingSetNodeID ID; 3735 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps); 3736 void *IP = 0; 3737 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3738 return ON; 3739 3740 RemoveNodeFromCSEMaps(N); 3741 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps); 3742 3743 CSEMap.InsertNode(N, IP); // Memoize the new node. 3744 return N; 3745} 3746 3747SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3748 MVT VT1, MVT VT2, 3749 SDOperand Op1, SDOperand Op2) { 3750 SDVTList VTs = getVTList(VT1, VT2); 3751 FoldingSetNodeID ID; 3752 SDOperand Ops[] = { Op1, Op2 }; 3753 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3754 void *IP = 0; 3755 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3756 return ON; 3757 3758 RemoveNodeFromCSEMaps(N); 3759 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2); 3760 CSEMap.InsertNode(N, IP); // Memoize the new node. 3761 return N; 3762} 3763 3764SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 3765 MVT VT1, MVT VT2, 3766 SDOperand Op1, SDOperand Op2, 3767 SDOperand Op3) { 3768 // If an identical node already exists, use it. 3769 SDVTList VTs = getVTList(VT1, VT2); 3770 SDOperand Ops[] = { Op1, Op2, Op3 }; 3771 FoldingSetNodeID ID; 3772 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3773 void *IP = 0; 3774 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3775 return ON; 3776 3777 RemoveNodeFromCSEMaps(N); 3778 3779 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3); 3780 CSEMap.InsertNode(N, IP); // Memoize the new node. 3781 return N; 3782} 3783 3784 3785/// getTargetNode - These are used for target selectors to create a new node 3786/// with specified return type(s), target opcode, and operands. 3787/// 3788/// Note that getTargetNode returns the resultant node. If there is already a 3789/// node of the specified opcode and operands, it returns that node instead of 3790/// the current one. 3791SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 3792 return getNode(ISD::BUILTIN_OP_END+Opcode, VT).Val; 3793} 3794SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDOperand Op1) { 3795 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1).Val; 3796} 3797SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 3798 SDOperand Op1, SDOperand Op2) { 3799 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2).Val; 3800} 3801SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 3802 SDOperand Op1, SDOperand Op2, 3803 SDOperand Op3) { 3804 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3).Val; 3805} 3806SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 3807 SDOperandPtr Ops, unsigned NumOps) { 3808 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops, NumOps).Val; 3809} 3810SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 3811 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3812 SDOperand Op; 3813 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op, 0).Val; 3814} 3815SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3816 MVT VT2, SDOperand Op1) { 3817 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3818 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op1, 1).Val; 3819} 3820SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3821 MVT VT2, SDOperand Op1, 3822 SDOperand Op2) { 3823 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3824 SDOperand Ops[] = { Op1, Op2 }; 3825 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 2).Val; 3826} 3827SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3828 MVT VT2, SDOperand Op1, 3829 SDOperand Op2, SDOperand Op3) { 3830 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3831 SDOperand Ops[] = { Op1, Op2, Op3 }; 3832 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 3).Val; 3833} 3834SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 3835 SDOperandPtr Ops, unsigned NumOps) { 3836 const MVT *VTs = getNodeValueTypes(VT1, VT2); 3837 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, NumOps).Val; 3838} 3839SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 3840 SDOperand Op1, SDOperand Op2) { 3841 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 3842 SDOperand Ops[] = { Op1, Op2 }; 3843 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 2).Val; 3844} 3845SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 3846 SDOperand Op1, SDOperand Op2, 3847 SDOperand Op3) { 3848 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 3849 SDOperand Ops[] = { Op1, Op2, Op3 }; 3850 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 3).Val; 3851} 3852SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 3853 SDOperandPtr Ops, unsigned NumOps) { 3854 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 3855 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, NumOps).Val; 3856} 3857SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 3858 MVT VT2, MVT VT3, MVT VT4, 3859 SDOperandPtr Ops, unsigned NumOps) { 3860 std::vector<MVT> VTList; 3861 VTList.push_back(VT1); 3862 VTList.push_back(VT2); 3863 VTList.push_back(VT3); 3864 VTList.push_back(VT4); 3865 const MVT *VTs = getNodeValueTypes(VTList); 3866 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 4, Ops, NumOps).Val; 3867} 3868SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 3869 std::vector<MVT> &ResultTys, 3870 SDOperandPtr Ops, unsigned NumOps) { 3871 const MVT *VTs = getNodeValueTypes(ResultTys); 3872 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, ResultTys.size(), 3873 Ops, NumOps).Val; 3874} 3875 3876/// getNodeIfExists - Get the specified node if it's already available, or 3877/// else return NULL. 3878SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 3879 SDOperandPtr Ops, unsigned NumOps) { 3880 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3881 FoldingSetNodeID ID; 3882 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3883 void *IP = 0; 3884 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3885 return E; 3886 } 3887 return NULL; 3888} 3889 3890 3891/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 3892/// This can cause recursive merging of nodes in the DAG. 3893/// 3894/// This version assumes From has a single result value. 3895/// 3896void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand To, 3897 DAGUpdateListener *UpdateListener) { 3898 SDNode *From = FromN.Val; 3899 assert(From->getNumValues() == 1 && FromN.ResNo == 0 && 3900 "Cannot replace with this method!"); 3901 assert(From != To.Val && "Cannot replace uses of with self"); 3902 3903 while (!From->use_empty()) { 3904 SDNode::use_iterator UI = From->use_begin(); 3905 SDNode *U = UI->getUser(); 3906 3907 // This node is about to morph, remove its old self from the CSE maps. 3908 RemoveNodeFromCSEMaps(U); 3909 int operandNum = 0; 3910 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 3911 I != E; ++I, ++operandNum) 3912 if (I->getVal() == From) { 3913 From->removeUser(operandNum, U); 3914 *I = To; 3915 I->setUser(U); 3916 To.Val->addUser(operandNum, U); 3917 } 3918 3919 // Now that we have modified U, add it back to the CSE maps. If it already 3920 // exists there, recursively merge the results together. 3921 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 3922 ReplaceAllUsesWith(U, Existing, UpdateListener); 3923 // U is now dead. Inform the listener if it exists and delete it. 3924 if (UpdateListener) 3925 UpdateListener->NodeDeleted(U, Existing); 3926 DeleteNodeNotInCSEMaps(U); 3927 } else { 3928 // If the node doesn't already exist, we updated it. Inform a listener if 3929 // it exists. 3930 if (UpdateListener) 3931 UpdateListener->NodeUpdated(U); 3932 } 3933 } 3934} 3935 3936/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 3937/// This can cause recursive merging of nodes in the DAG. 3938/// 3939/// This version assumes From/To have matching types and numbers of result 3940/// values. 3941/// 3942void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 3943 DAGUpdateListener *UpdateListener) { 3944 assert(From != To && "Cannot replace uses of with self"); 3945 assert(From->getNumValues() == To->getNumValues() && 3946 "Cannot use this version of ReplaceAllUsesWith!"); 3947 if (From->getNumValues() == 1) // If possible, use the faster version. 3948 return ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0), 3949 UpdateListener); 3950 3951 while (!From->use_empty()) { 3952 SDNode::use_iterator UI = From->use_begin(); 3953 SDNode *U = UI->getUser(); 3954 3955 // This node is about to morph, remove its old self from the CSE maps. 3956 RemoveNodeFromCSEMaps(U); 3957 int operandNum = 0; 3958 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 3959 I != E; ++I, ++operandNum) 3960 if (I->getVal() == From) { 3961 From->removeUser(operandNum, U); 3962 I->getVal() = To; 3963 To->addUser(operandNum, U); 3964 } 3965 3966 // Now that we have modified U, add it back to the CSE maps. If it already 3967 // exists there, recursively merge the results together. 3968 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 3969 ReplaceAllUsesWith(U, Existing, UpdateListener); 3970 // U is now dead. Inform the listener if it exists and delete it. 3971 if (UpdateListener) 3972 UpdateListener->NodeDeleted(U, Existing); 3973 DeleteNodeNotInCSEMaps(U); 3974 } else { 3975 // If the node doesn't already exist, we updated it. Inform a listener if 3976 // it exists. 3977 if (UpdateListener) 3978 UpdateListener->NodeUpdated(U); 3979 } 3980 } 3981} 3982 3983/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 3984/// This can cause recursive merging of nodes in the DAG. 3985/// 3986/// This version can replace From with any result values. To must match the 3987/// number and types of values returned by From. 3988void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 3989 SDOperandPtr To, 3990 DAGUpdateListener *UpdateListener) { 3991 if (From->getNumValues() == 1) // Handle the simple case efficiently. 3992 return ReplaceAllUsesWith(SDOperand(From, 0), To[0], UpdateListener); 3993 3994 while (!From->use_empty()) { 3995 SDNode::use_iterator UI = From->use_begin(); 3996 SDNode *U = UI->getUser(); 3997 3998 // This node is about to morph, remove its old self from the CSE maps. 3999 RemoveNodeFromCSEMaps(U); 4000 int operandNum = 0; 4001 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4002 I != E; ++I, ++operandNum) 4003 if (I->getVal() == From) { 4004 const SDOperand &ToOp = To[I->getSDOperand().ResNo]; 4005 From->removeUser(operandNum, U); 4006 *I = ToOp; 4007 I->setUser(U); 4008 ToOp.Val->addUser(operandNum, U); 4009 } 4010 4011 // Now that we have modified U, add it back to the CSE maps. If it already 4012 // exists there, recursively merge the results together. 4013 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4014 ReplaceAllUsesWith(U, Existing, UpdateListener); 4015 // U is now dead. Inform the listener if it exists and delete it. 4016 if (UpdateListener) 4017 UpdateListener->NodeDeleted(U, Existing); 4018 DeleteNodeNotInCSEMaps(U); 4019 } else { 4020 // If the node doesn't already exist, we updated it. Inform a listener if 4021 // it exists. 4022 if (UpdateListener) 4023 UpdateListener->NodeUpdated(U); 4024 } 4025 } 4026} 4027 4028namespace { 4029 /// ChainedSetUpdaterListener - This class is a DAGUpdateListener that removes 4030 /// any deleted nodes from the set passed into its constructor and recursively 4031 /// notifies another update listener if specified. 4032 class ChainedSetUpdaterListener : 4033 public SelectionDAG::DAGUpdateListener { 4034 SmallSetVector<SDNode*, 16> &Set; 4035 SelectionDAG::DAGUpdateListener *Chain; 4036 public: 4037 ChainedSetUpdaterListener(SmallSetVector<SDNode*, 16> &set, 4038 SelectionDAG::DAGUpdateListener *chain) 4039 : Set(set), Chain(chain) {} 4040 4041 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4042 Set.remove(N); 4043 if (Chain) Chain->NodeDeleted(N, E); 4044 } 4045 virtual void NodeUpdated(SDNode *N) { 4046 if (Chain) Chain->NodeUpdated(N); 4047 } 4048 }; 4049} 4050 4051/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4052/// uses of other values produced by From.Val alone. The Deleted vector is 4053/// handled the same way as for ReplaceAllUsesWith. 4054void SelectionDAG::ReplaceAllUsesOfValueWith(SDOperand From, SDOperand To, 4055 DAGUpdateListener *UpdateListener){ 4056 assert(From != To && "Cannot replace a value with itself"); 4057 4058 // Handle the simple, trivial, case efficiently. 4059 if (From.Val->getNumValues() == 1) { 4060 ReplaceAllUsesWith(From, To, UpdateListener); 4061 return; 4062 } 4063 4064 if (From.use_empty()) return; 4065 4066 // Get all of the users of From.Val. We want these in a nice, 4067 // deterministically ordered and uniqued set, so we use a SmallSetVector. 4068 SmallSetVector<SDNode*, 16> Users; 4069 for (SDNode::use_iterator UI = From.Val->use_begin(), 4070 E = From.Val->use_end(); UI != E; ++UI) { 4071 SDNode *User = UI->getUser(); 4072 if (!Users.count(User)) 4073 Users.insert(User); 4074 } 4075 4076 // When one of the recursive merges deletes nodes from the graph, we need to 4077 // make sure that UpdateListener is notified *and* that the node is removed 4078 // from Users if present. CSUL does this. 4079 ChainedSetUpdaterListener CSUL(Users, UpdateListener); 4080 4081 while (!Users.empty()) { 4082 // We know that this user uses some value of From. If it is the right 4083 // value, update it. 4084 SDNode *User = Users.back(); 4085 Users.pop_back(); 4086 4087 // Scan for an operand that matches From. 4088 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4089 for (; Op != E; ++Op) 4090 if (*Op == From) break; 4091 4092 // If there are no matches, the user must use some other result of From. 4093 if (Op == E) continue; 4094 4095 // Okay, we know this user needs to be updated. Remove its old self 4096 // from the CSE maps. 4097 RemoveNodeFromCSEMaps(User); 4098 4099 // Update all operands that match "From" in case there are multiple uses. 4100 for (; Op != E; ++Op) { 4101 if (*Op == From) { 4102 From.Val->removeUser(Op-User->op_begin(), User); 4103 *Op = To; 4104 Op->setUser(User); 4105 To.Val->addUser(Op-User->op_begin(), User); 4106 } 4107 } 4108 4109 // Now that we have modified User, add it back to the CSE maps. If it 4110 // already exists there, recursively merge the results together. 4111 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4112 if (!Existing) { 4113 if (UpdateListener) UpdateListener->NodeUpdated(User); 4114 continue; // Continue on to next user. 4115 } 4116 4117 // If there was already an existing matching node, use ReplaceAllUsesWith 4118 // to replace the dead one with the existing one. This can cause 4119 // recursive merging of other unrelated nodes down the line. The merging 4120 // can cause deletion of nodes that used the old value. To handle this, we 4121 // use CSUL to remove them from the Users set. 4122 ReplaceAllUsesWith(User, Existing, &CSUL); 4123 4124 // User is now dead. Notify a listener if present. 4125 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4126 DeleteNodeNotInCSEMaps(User); 4127 } 4128} 4129 4130/// AssignNodeIds - Assign a unique node id for each node in the DAG based on 4131/// their allnodes order. It returns the maximum id. 4132unsigned SelectionDAG::AssignNodeIds() { 4133 unsigned Id = 0; 4134 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I){ 4135 SDNode *N = I; 4136 N->setNodeId(Id++); 4137 } 4138 return Id; 4139} 4140 4141/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4142/// based on their topological order. It returns the maximum id and a vector 4143/// of the SDNodes* in assigned order by reference. 4144unsigned SelectionDAG::AssignTopologicalOrder(std::vector<SDNode*> &TopOrder) { 4145 unsigned DAGSize = AllNodes.size(); 4146 std::vector<unsigned> InDegree(DAGSize); 4147 std::vector<SDNode*> Sources; 4148 4149 // Use a two pass approach to avoid using a std::map which is slow. 4150 unsigned Id = 0; 4151 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I){ 4152 SDNode *N = I; 4153 N->setNodeId(Id++); 4154 unsigned Degree = N->use_size(); 4155 InDegree[N->getNodeId()] = Degree; 4156 if (Degree == 0) 4157 Sources.push_back(N); 4158 } 4159 4160 TopOrder.clear(); 4161 while (!Sources.empty()) { 4162 SDNode *N = Sources.back(); 4163 Sources.pop_back(); 4164 TopOrder.push_back(N); 4165 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 4166 SDNode *P = I->getVal(); 4167 unsigned Degree = --InDegree[P->getNodeId()]; 4168 if (Degree == 0) 4169 Sources.push_back(P); 4170 } 4171 } 4172 4173 // Second pass, assign the actual topological order as node ids. 4174 Id = 0; 4175 for (std::vector<SDNode*>::iterator TI = TopOrder.begin(),TE = TopOrder.end(); 4176 TI != TE; ++TI) 4177 (*TI)->setNodeId(Id++); 4178 4179 return Id; 4180} 4181 4182 4183 4184//===----------------------------------------------------------------------===// 4185// SDNode Class 4186//===----------------------------------------------------------------------===// 4187 4188// Out-of-line virtual method to give class a home. 4189void SDNode::ANCHOR() {} 4190void UnarySDNode::ANCHOR() {} 4191void BinarySDNode::ANCHOR() {} 4192void TernarySDNode::ANCHOR() {} 4193void HandleSDNode::ANCHOR() {} 4194void ConstantSDNode::ANCHOR() {} 4195void ConstantFPSDNode::ANCHOR() {} 4196void GlobalAddressSDNode::ANCHOR() {} 4197void FrameIndexSDNode::ANCHOR() {} 4198void JumpTableSDNode::ANCHOR() {} 4199void ConstantPoolSDNode::ANCHOR() {} 4200void BasicBlockSDNode::ANCHOR() {} 4201void SrcValueSDNode::ANCHOR() {} 4202void MemOperandSDNode::ANCHOR() {} 4203void RegisterSDNode::ANCHOR() {} 4204void DbgStopPointSDNode::ANCHOR() {} 4205void ExternalSymbolSDNode::ANCHOR() {} 4206void CondCodeSDNode::ANCHOR() {} 4207void ARG_FLAGSSDNode::ANCHOR() {} 4208void VTSDNode::ANCHOR() {} 4209void MemSDNode::ANCHOR() {} 4210void LoadSDNode::ANCHOR() {} 4211void StoreSDNode::ANCHOR() {} 4212void AtomicSDNode::ANCHOR() {} 4213 4214HandleSDNode::~HandleSDNode() { 4215 SDVTList VTs = { 0, 0 }; 4216 MorphNodeTo(ISD::HANDLENODE, VTs, SDOperandPtr(), 0); // Drops operand uses. 4217} 4218 4219GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 4220 MVT VT, int o) 4221 : SDNode(isa<GlobalVariable>(GA) && 4222 cast<GlobalVariable>(GA)->isThreadLocal() ? 4223 // Thread Local 4224 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 4225 // Non Thread Local 4226 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 4227 getSDVTList(VT)), Offset(o) { 4228 TheGlobal = const_cast<GlobalValue*>(GA); 4229} 4230 4231/// getMemOperand - Return a MachineMemOperand object describing the memory 4232/// reference performed by this atomic. 4233MachineMemOperand AtomicSDNode::getMemOperand() const { 4234 int Size = (getValueType(0).getSizeInBits() + 7) >> 3; 4235 int Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4236 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4237 4238 // Check if the atomic references a frame index 4239 const FrameIndexSDNode *FI = 4240 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val); 4241 if (!getSrcValue() && FI) 4242 return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags, 4243 FI->getIndex(), Size, getAlignment()); 4244 else 4245 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4246 Size, getAlignment()); 4247} 4248 4249/// getMemOperand - Return a MachineMemOperand object describing the memory 4250/// reference performed by this load or store. 4251MachineMemOperand LSBaseSDNode::getMemOperand() const { 4252 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4253 int Flags = 4254 getOpcode() == ISD::LOAD ? MachineMemOperand::MOLoad : 4255 MachineMemOperand::MOStore; 4256 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4257 4258 // Check if the load references a frame index, and does not have 4259 // an SV attached. 4260 const FrameIndexSDNode *FI = 4261 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val); 4262 if (!getSrcValue() && FI) 4263 return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags, 4264 FI->getIndex(), Size, getAlignment()); 4265 else 4266 return MachineMemOperand(getSrcValue(), Flags, 4267 getSrcValueOffset(), Size, getAlignment()); 4268} 4269 4270/// Profile - Gather unique data for the node. 4271/// 4272void SDNode::Profile(FoldingSetNodeID &ID) { 4273 AddNodeIDNode(ID, this); 4274} 4275 4276/// getValueTypeList - Return a pointer to the specified value type. 4277/// 4278const MVT *SDNode::getValueTypeList(MVT VT) { 4279 if (VT.isExtended()) { 4280 static std::set<MVT, MVT::compareRawBits> EVTs; 4281 return &(*EVTs.insert(VT).first); 4282 } else { 4283 static MVT VTs[MVT::LAST_VALUETYPE]; 4284 VTs[VT.getSimpleVT()] = VT; 4285 return &VTs[VT.getSimpleVT()]; 4286 } 4287} 4288 4289/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 4290/// indicated value. This method ignores uses of other values defined by this 4291/// operation. 4292bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 4293 assert(Value < getNumValues() && "Bad value!"); 4294 4295 // If there is only one value, this is easy. 4296 if (getNumValues() == 1) 4297 return use_size() == NUses; 4298 if (use_size() < NUses) return false; 4299 4300 SDOperand TheValue(const_cast<SDNode *>(this), Value); 4301 4302 SmallPtrSet<SDNode*, 32> UsersHandled; 4303 4304 // TODO: Only iterate over uses of a given value of the node 4305 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4306 if (*UI == TheValue) { 4307 if (NUses == 0) 4308 return false; 4309 --NUses; 4310 } 4311 } 4312 4313 // Found exactly the right number of uses? 4314 return NUses == 0; 4315} 4316 4317 4318/// hasAnyUseOfValue - Return true if there are any use of the indicated 4319/// value. This method ignores uses of other values defined by this operation. 4320bool SDNode::hasAnyUseOfValue(unsigned Value) const { 4321 assert(Value < getNumValues() && "Bad value!"); 4322 4323 if (use_empty()) return false; 4324 4325 SDOperand TheValue(const_cast<SDNode *>(this), Value); 4326 4327 SmallPtrSet<SDNode*, 32> UsersHandled; 4328 4329 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4330 SDNode *User = UI->getUser(); 4331 if (User->getNumOperands() == 1 || 4332 UsersHandled.insert(User)) // First time we've seen this? 4333 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 4334 if (User->getOperand(i) == TheValue) { 4335 return true; 4336 } 4337 } 4338 4339 return false; 4340} 4341 4342 4343/// isOnlyUseOf - Return true if this node is the only use of N. 4344/// 4345bool SDNode::isOnlyUseOf(SDNode *N) const { 4346 bool Seen = false; 4347 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 4348 SDNode *User = I->getUser(); 4349 if (User == this) 4350 Seen = true; 4351 else 4352 return false; 4353 } 4354 4355 return Seen; 4356} 4357 4358/// isOperand - Return true if this node is an operand of N. 4359/// 4360bool SDOperand::isOperandOf(SDNode *N) const { 4361 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4362 if (*this == N->getOperand(i)) 4363 return true; 4364 return false; 4365} 4366 4367bool SDNode::isOperandOf(SDNode *N) const { 4368 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 4369 if (this == N->OperandList[i].getVal()) 4370 return true; 4371 return false; 4372} 4373 4374/// reachesChainWithoutSideEffects - Return true if this operand (which must 4375/// be a chain) reaches the specified operand without crossing any 4376/// side-effecting instructions. In practice, this looks through token 4377/// factors and non-volatile loads. In order to remain efficient, this only 4378/// looks a couple of nodes in, it does not do an exhaustive search. 4379bool SDOperand::reachesChainWithoutSideEffects(SDOperand Dest, 4380 unsigned Depth) const { 4381 if (*this == Dest) return true; 4382 4383 // Don't search too deeply, we just want to be able to see through 4384 // TokenFactor's etc. 4385 if (Depth == 0) return false; 4386 4387 // If this is a token factor, all inputs to the TF happen in parallel. If any 4388 // of the operands of the TF reach dest, then we can do the xform. 4389 if (getOpcode() == ISD::TokenFactor) { 4390 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 4391 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 4392 return true; 4393 return false; 4394 } 4395 4396 // Loads don't have side effects, look through them. 4397 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 4398 if (!Ld->isVolatile()) 4399 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 4400 } 4401 return false; 4402} 4403 4404 4405static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 4406 SmallPtrSet<SDNode *, 32> &Visited) { 4407 if (found || !Visited.insert(N)) 4408 return; 4409 4410 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 4411 SDNode *Op = N->getOperand(i).Val; 4412 if (Op == P) { 4413 found = true; 4414 return; 4415 } 4416 findPredecessor(Op, P, found, Visited); 4417 } 4418} 4419 4420/// isPredecessorOf - Return true if this node is a predecessor of N. This node 4421/// is either an operand of N or it can be reached by recursively traversing 4422/// up the operands. 4423/// NOTE: this is an expensive method. Use it carefully. 4424bool SDNode::isPredecessorOf(SDNode *N) const { 4425 SmallPtrSet<SDNode *, 32> Visited; 4426 bool found = false; 4427 findPredecessor(N, this, found, Visited); 4428 return found; 4429} 4430 4431uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 4432 assert(Num < NumOperands && "Invalid child # of SDNode!"); 4433 return cast<ConstantSDNode>(OperandList[Num])->getValue(); 4434} 4435 4436std::string SDNode::getOperationName(const SelectionDAG *G) const { 4437 switch (getOpcode()) { 4438 default: 4439 if (getOpcode() < ISD::BUILTIN_OP_END) 4440 return "<<Unknown DAG Node>>"; 4441 else { 4442 if (G) { 4443 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 4444 if (getOpcode()-ISD::BUILTIN_OP_END < TII->getNumOpcodes()) 4445 return TII->get(getOpcode()-ISD::BUILTIN_OP_END).getName(); 4446 4447 TargetLowering &TLI = G->getTargetLoweringInfo(); 4448 const char *Name = 4449 TLI.getTargetNodeName(getOpcode()); 4450 if (Name) return Name; 4451 } 4452 4453 return "<<Unknown Target Node>>"; 4454 } 4455 4456 case ISD::PREFETCH: return "Prefetch"; 4457 case ISD::MEMBARRIER: return "MemBarrier"; 4458 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 4459 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 4460 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 4461 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 4462 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 4463 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 4464 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 4465 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 4466 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 4467 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 4468 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 4469 case ISD::ATOMIC_SWAP: return "AtomicSWAP"; 4470 case ISD::PCMARKER: return "PCMarker"; 4471 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 4472 case ISD::SRCVALUE: return "SrcValue"; 4473 case ISD::MEMOPERAND: return "MemOperand"; 4474 case ISD::EntryToken: return "EntryToken"; 4475 case ISD::TokenFactor: return "TokenFactor"; 4476 case ISD::AssertSext: return "AssertSext"; 4477 case ISD::AssertZext: return "AssertZext"; 4478 4479 case ISD::BasicBlock: return "BasicBlock"; 4480 case ISD::ARG_FLAGS: return "ArgFlags"; 4481 case ISD::VALUETYPE: return "ValueType"; 4482 case ISD::Register: return "Register"; 4483 4484 case ISD::Constant: return "Constant"; 4485 case ISD::ConstantFP: return "ConstantFP"; 4486 case ISD::GlobalAddress: return "GlobalAddress"; 4487 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 4488 case ISD::FrameIndex: return "FrameIndex"; 4489 case ISD::JumpTable: return "JumpTable"; 4490 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 4491 case ISD::RETURNADDR: return "RETURNADDR"; 4492 case ISD::FRAMEADDR: return "FRAMEADDR"; 4493 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 4494 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 4495 case ISD::EHSELECTION: return "EHSELECTION"; 4496 case ISD::EH_RETURN: return "EH_RETURN"; 4497 case ISD::ConstantPool: return "ConstantPool"; 4498 case ISD::ExternalSymbol: return "ExternalSymbol"; 4499 case ISD::INTRINSIC_WO_CHAIN: { 4500 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getValue(); 4501 return Intrinsic::getName((Intrinsic::ID)IID); 4502 } 4503 case ISD::INTRINSIC_VOID: 4504 case ISD::INTRINSIC_W_CHAIN: { 4505 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getValue(); 4506 return Intrinsic::getName((Intrinsic::ID)IID); 4507 } 4508 4509 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 4510 case ISD::TargetConstant: return "TargetConstant"; 4511 case ISD::TargetConstantFP:return "TargetConstantFP"; 4512 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 4513 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 4514 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 4515 case ISD::TargetJumpTable: return "TargetJumpTable"; 4516 case ISD::TargetConstantPool: return "TargetConstantPool"; 4517 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 4518 4519 case ISD::CopyToReg: return "CopyToReg"; 4520 case ISD::CopyFromReg: return "CopyFromReg"; 4521 case ISD::UNDEF: return "undef"; 4522 case ISD::MERGE_VALUES: return "merge_values"; 4523 case ISD::INLINEASM: return "inlineasm"; 4524 case ISD::LABEL: return "label"; 4525 case ISD::DECLARE: return "declare"; 4526 case ISD::HANDLENODE: return "handlenode"; 4527 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 4528 case ISD::CALL: return "call"; 4529 4530 // Unary operators 4531 case ISD::FABS: return "fabs"; 4532 case ISD::FNEG: return "fneg"; 4533 case ISD::FSQRT: return "fsqrt"; 4534 case ISD::FSIN: return "fsin"; 4535 case ISD::FCOS: return "fcos"; 4536 case ISD::FPOWI: return "fpowi"; 4537 case ISD::FPOW: return "fpow"; 4538 4539 // Binary operators 4540 case ISD::ADD: return "add"; 4541 case ISD::SUB: return "sub"; 4542 case ISD::MUL: return "mul"; 4543 case ISD::MULHU: return "mulhu"; 4544 case ISD::MULHS: return "mulhs"; 4545 case ISD::SDIV: return "sdiv"; 4546 case ISD::UDIV: return "udiv"; 4547 case ISD::SREM: return "srem"; 4548 case ISD::UREM: return "urem"; 4549 case ISD::SMUL_LOHI: return "smul_lohi"; 4550 case ISD::UMUL_LOHI: return "umul_lohi"; 4551 case ISD::SDIVREM: return "sdivrem"; 4552 case ISD::UDIVREM: return "divrem"; 4553 case ISD::AND: return "and"; 4554 case ISD::OR: return "or"; 4555 case ISD::XOR: return "xor"; 4556 case ISD::SHL: return "shl"; 4557 case ISD::SRA: return "sra"; 4558 case ISD::SRL: return "srl"; 4559 case ISD::ROTL: return "rotl"; 4560 case ISD::ROTR: return "rotr"; 4561 case ISD::FADD: return "fadd"; 4562 case ISD::FSUB: return "fsub"; 4563 case ISD::FMUL: return "fmul"; 4564 case ISD::FDIV: return "fdiv"; 4565 case ISD::FREM: return "frem"; 4566 case ISD::FCOPYSIGN: return "fcopysign"; 4567 case ISD::FGETSIGN: return "fgetsign"; 4568 4569 case ISD::SETCC: return "setcc"; 4570 case ISD::VSETCC: return "vsetcc"; 4571 case ISD::SELECT: return "select"; 4572 case ISD::SELECT_CC: return "select_cc"; 4573 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 4574 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 4575 case ISD::CONCAT_VECTORS: return "concat_vectors"; 4576 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 4577 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 4578 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 4579 case ISD::CARRY_FALSE: return "carry_false"; 4580 case ISD::ADDC: return "addc"; 4581 case ISD::ADDE: return "adde"; 4582 case ISD::SUBC: return "subc"; 4583 case ISD::SUBE: return "sube"; 4584 case ISD::SHL_PARTS: return "shl_parts"; 4585 case ISD::SRA_PARTS: return "sra_parts"; 4586 case ISD::SRL_PARTS: return "srl_parts"; 4587 4588 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 4589 case ISD::INSERT_SUBREG: return "insert_subreg"; 4590 4591 // Conversion operators. 4592 case ISD::SIGN_EXTEND: return "sign_extend"; 4593 case ISD::ZERO_EXTEND: return "zero_extend"; 4594 case ISD::ANY_EXTEND: return "any_extend"; 4595 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 4596 case ISD::TRUNCATE: return "truncate"; 4597 case ISD::FP_ROUND: return "fp_round"; 4598 case ISD::FLT_ROUNDS_: return "flt_rounds"; 4599 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 4600 case ISD::FP_EXTEND: return "fp_extend"; 4601 4602 case ISD::SINT_TO_FP: return "sint_to_fp"; 4603 case ISD::UINT_TO_FP: return "uint_to_fp"; 4604 case ISD::FP_TO_SINT: return "fp_to_sint"; 4605 case ISD::FP_TO_UINT: return "fp_to_uint"; 4606 case ISD::BIT_CONVERT: return "bit_convert"; 4607 4608 // Control flow instructions 4609 case ISD::BR: return "br"; 4610 case ISD::BRIND: return "brind"; 4611 case ISD::BR_JT: return "br_jt"; 4612 case ISD::BRCOND: return "brcond"; 4613 case ISD::BR_CC: return "br_cc"; 4614 case ISD::RET: return "ret"; 4615 case ISD::CALLSEQ_START: return "callseq_start"; 4616 case ISD::CALLSEQ_END: return "callseq_end"; 4617 4618 // Other operators 4619 case ISD::LOAD: return "load"; 4620 case ISD::STORE: return "store"; 4621 case ISD::VAARG: return "vaarg"; 4622 case ISD::VACOPY: return "vacopy"; 4623 case ISD::VAEND: return "vaend"; 4624 case ISD::VASTART: return "vastart"; 4625 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 4626 case ISD::EXTRACT_ELEMENT: return "extract_element"; 4627 case ISD::BUILD_PAIR: return "build_pair"; 4628 case ISD::STACKSAVE: return "stacksave"; 4629 case ISD::STACKRESTORE: return "stackrestore"; 4630 case ISD::TRAP: return "trap"; 4631 4632 // Bit manipulation 4633 case ISD::BSWAP: return "bswap"; 4634 case ISD::CTPOP: return "ctpop"; 4635 case ISD::CTTZ: return "cttz"; 4636 case ISD::CTLZ: return "ctlz"; 4637 4638 // Debug info 4639 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 4640 case ISD::DEBUG_LOC: return "debug_loc"; 4641 4642 // Trampolines 4643 case ISD::TRAMPOLINE: return "trampoline"; 4644 4645 case ISD::CONDCODE: 4646 switch (cast<CondCodeSDNode>(this)->get()) { 4647 default: assert(0 && "Unknown setcc condition!"); 4648 case ISD::SETOEQ: return "setoeq"; 4649 case ISD::SETOGT: return "setogt"; 4650 case ISD::SETOGE: return "setoge"; 4651 case ISD::SETOLT: return "setolt"; 4652 case ISD::SETOLE: return "setole"; 4653 case ISD::SETONE: return "setone"; 4654 4655 case ISD::SETO: return "seto"; 4656 case ISD::SETUO: return "setuo"; 4657 case ISD::SETUEQ: return "setue"; 4658 case ISD::SETUGT: return "setugt"; 4659 case ISD::SETUGE: return "setuge"; 4660 case ISD::SETULT: return "setult"; 4661 case ISD::SETULE: return "setule"; 4662 case ISD::SETUNE: return "setune"; 4663 4664 case ISD::SETEQ: return "seteq"; 4665 case ISD::SETGT: return "setgt"; 4666 case ISD::SETGE: return "setge"; 4667 case ISD::SETLT: return "setlt"; 4668 case ISD::SETLE: return "setle"; 4669 case ISD::SETNE: return "setne"; 4670 } 4671 } 4672} 4673 4674const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 4675 switch (AM) { 4676 default: 4677 return ""; 4678 case ISD::PRE_INC: 4679 return "<pre-inc>"; 4680 case ISD::PRE_DEC: 4681 return "<pre-dec>"; 4682 case ISD::POST_INC: 4683 return "<post-inc>"; 4684 case ISD::POST_DEC: 4685 return "<post-dec>"; 4686 } 4687} 4688 4689std::string ISD::ArgFlagsTy::getArgFlagsString() { 4690 std::string S = "< "; 4691 4692 if (isZExt()) 4693 S += "zext "; 4694 if (isSExt()) 4695 S += "sext "; 4696 if (isInReg()) 4697 S += "inreg "; 4698 if (isSRet()) 4699 S += "sret "; 4700 if (isByVal()) 4701 S += "byval "; 4702 if (isNest()) 4703 S += "nest "; 4704 if (getByValAlign()) 4705 S += "byval-align:" + utostr(getByValAlign()) + " "; 4706 if (getOrigAlign()) 4707 S += "orig-align:" + utostr(getOrigAlign()) + " "; 4708 if (getByValSize()) 4709 S += "byval-size:" + utostr(getByValSize()) + " "; 4710 return S + ">"; 4711} 4712 4713void SDNode::dump() const { dump(0); } 4714void SDNode::dump(const SelectionDAG *G) const { 4715 cerr << (void*)this << ": "; 4716 4717 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 4718 if (i) cerr << ","; 4719 if (getValueType(i) == MVT::Other) 4720 cerr << "ch"; 4721 else 4722 cerr << getValueType(i).getMVTString(); 4723 } 4724 cerr << " = " << getOperationName(G); 4725 4726 cerr << " "; 4727 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 4728 if (i) cerr << ", "; 4729 cerr << (void*)getOperand(i).Val; 4730 if (unsigned RN = getOperand(i).ResNo) 4731 cerr << ":" << RN; 4732 } 4733 4734 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 4735 SDNode *Mask = getOperand(2).Val; 4736 cerr << "<"; 4737 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 4738 if (i) cerr << ","; 4739 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 4740 cerr << "u"; 4741 else 4742 cerr << cast<ConstantSDNode>(Mask->getOperand(i))->getValue(); 4743 } 4744 cerr << ">"; 4745 } 4746 4747 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 4748 cerr << "<" << CSDN->getValue() << ">"; 4749 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 4750 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 4751 cerr << "<" << CSDN->getValueAPF().convertToFloat() << ">"; 4752 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 4753 cerr << "<" << CSDN->getValueAPF().convertToDouble() << ">"; 4754 else { 4755 cerr << "<APFloat("; 4756 CSDN->getValueAPF().convertToAPInt().dump(); 4757 cerr << ")>"; 4758 } 4759 } else if (const GlobalAddressSDNode *GADN = 4760 dyn_cast<GlobalAddressSDNode>(this)) { 4761 int offset = GADN->getOffset(); 4762 cerr << "<"; 4763 WriteAsOperand(*cerr.stream(), GADN->getGlobal()) << ">"; 4764 if (offset > 0) 4765 cerr << " + " << offset; 4766 else 4767 cerr << " " << offset; 4768 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 4769 cerr << "<" << FIDN->getIndex() << ">"; 4770 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 4771 cerr << "<" << JTDN->getIndex() << ">"; 4772 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 4773 int offset = CP->getOffset(); 4774 if (CP->isMachineConstantPoolEntry()) 4775 cerr << "<" << *CP->getMachineCPVal() << ">"; 4776 else 4777 cerr << "<" << *CP->getConstVal() << ">"; 4778 if (offset > 0) 4779 cerr << " + " << offset; 4780 else 4781 cerr << " " << offset; 4782 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 4783 cerr << "<"; 4784 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 4785 if (LBB) 4786 cerr << LBB->getName() << " "; 4787 cerr << (const void*)BBDN->getBasicBlock() << ">"; 4788 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 4789 if (G && R->getReg() && 4790 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 4791 cerr << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 4792 } else { 4793 cerr << " #" << R->getReg(); 4794 } 4795 } else if (const ExternalSymbolSDNode *ES = 4796 dyn_cast<ExternalSymbolSDNode>(this)) { 4797 cerr << "'" << ES->getSymbol() << "'"; 4798 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 4799 if (M->getValue()) 4800 cerr << "<" << M->getValue() << ">"; 4801 else 4802 cerr << "<null>"; 4803 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 4804 if (M->MO.getValue()) 4805 cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 4806 else 4807 cerr << "<null:" << M->MO.getOffset() << ">"; 4808 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 4809 cerr << N->getArgFlags().getArgFlagsString(); 4810 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 4811 cerr << ":" << N->getVT().getMVTString(); 4812 } 4813 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 4814 const Value *SrcValue = LD->getSrcValue(); 4815 int SrcOffset = LD->getSrcValueOffset(); 4816 cerr << " <"; 4817 if (SrcValue) 4818 cerr << SrcValue; 4819 else 4820 cerr << "null"; 4821 cerr << ":" << SrcOffset << ">"; 4822 4823 bool doExt = true; 4824 switch (LD->getExtensionType()) { 4825 default: doExt = false; break; 4826 case ISD::EXTLOAD: 4827 cerr << " <anyext "; 4828 break; 4829 case ISD::SEXTLOAD: 4830 cerr << " <sext "; 4831 break; 4832 case ISD::ZEXTLOAD: 4833 cerr << " <zext "; 4834 break; 4835 } 4836 if (doExt) 4837 cerr << LD->getMemoryVT().getMVTString() << ">"; 4838 4839 const char *AM = getIndexedModeName(LD->getAddressingMode()); 4840 if (*AM) 4841 cerr << " " << AM; 4842 if (LD->isVolatile()) 4843 cerr << " <volatile>"; 4844 cerr << " alignment=" << LD->getAlignment(); 4845 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 4846 const Value *SrcValue = ST->getSrcValue(); 4847 int SrcOffset = ST->getSrcValueOffset(); 4848 cerr << " <"; 4849 if (SrcValue) 4850 cerr << SrcValue; 4851 else 4852 cerr << "null"; 4853 cerr << ":" << SrcOffset << ">"; 4854 4855 if (ST->isTruncatingStore()) 4856 cerr << " <trunc " 4857 << ST->getMemoryVT().getMVTString() << ">"; 4858 4859 const char *AM = getIndexedModeName(ST->getAddressingMode()); 4860 if (*AM) 4861 cerr << " " << AM; 4862 if (ST->isVolatile()) 4863 cerr << " <volatile>"; 4864 cerr << " alignment=" << ST->getAlignment(); 4865 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 4866 const Value *SrcValue = AT->getSrcValue(); 4867 int SrcOffset = AT->getSrcValueOffset(); 4868 cerr << " <"; 4869 if (SrcValue) 4870 cerr << SrcValue; 4871 else 4872 cerr << "null"; 4873 cerr << ":" << SrcOffset << ">"; 4874 if (AT->isVolatile()) 4875 cerr << " <volatile>"; 4876 cerr << " alignment=" << AT->getAlignment(); 4877 } 4878} 4879 4880static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 4881 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4882 if (N->getOperand(i).Val->hasOneUse()) 4883 DumpNodes(N->getOperand(i).Val, indent+2, G); 4884 else 4885 cerr << "\n" << std::string(indent+2, ' ') 4886 << (void*)N->getOperand(i).Val << ": <multiple use>"; 4887 4888 4889 cerr << "\n" << std::string(indent, ' '); 4890 N->dump(G); 4891} 4892 4893void SelectionDAG::dump() const { 4894 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 4895 std::vector<const SDNode*> Nodes; 4896 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 4897 I != E; ++I) 4898 Nodes.push_back(I); 4899 4900 std::sort(Nodes.begin(), Nodes.end()); 4901 4902 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 4903 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 4904 DumpNodes(Nodes[i], 2, this); 4905 } 4906 4907 if (getRoot().Val) DumpNodes(getRoot().Val, 2, this); 4908 4909 cerr << "\n\n"; 4910} 4911 4912const Type *ConstantPoolSDNode::getType() const { 4913 if (isMachineConstantPoolEntry()) 4914 return Val.MachineCPVal->getType(); 4915 return Val.ConstVal->getType(); 4916} 4917