SelectionDAG.cpp revision 4c9a0d70e34e1cc679f71bc5ca8e9554255b18d6
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/Function.h" 17#include "llvm/GlobalAlias.h" 18#include "llvm/GlobalVariable.h" 19#include "llvm/Intrinsics.h" 20#include "llvm/DerivedTypes.h" 21#include "llvm/Assembly/Writer.h" 22#include "llvm/CallingConv.h" 23#include "llvm/CodeGen/MachineBasicBlock.h" 24#include "llvm/CodeGen/MachineConstantPool.h" 25#include "llvm/CodeGen/MachineFrameInfo.h" 26#include "llvm/CodeGen/MachineModuleInfo.h" 27#include "llvm/CodeGen/PseudoSourceValue.h" 28#include "llvm/Target/TargetRegisterInfo.h" 29#include "llvm/Target/TargetData.h" 30#include "llvm/Target/TargetLowering.h" 31#include "llvm/Target/TargetOptions.h" 32#include "llvm/Target/TargetInstrInfo.h" 33#include "llvm/Target/TargetMachine.h" 34#include "llvm/Support/CommandLine.h" 35#include "llvm/Support/ErrorHandling.h" 36#include "llvm/Support/ManagedStatic.h" 37#include "llvm/Support/MathExtras.h" 38#include "llvm/Support/raw_ostream.h" 39#include "llvm/System/Mutex.h" 40#include "llvm/ADT/SetVector.h" 41#include "llvm/ADT/SmallPtrSet.h" 42#include "llvm/ADT/SmallSet.h" 43#include "llvm/ADT/SmallVector.h" 44#include "llvm/ADT/StringExtras.h" 45#include <algorithm> 46#include <cmath> 47using namespace llvm; 48 49/// makeVTList - Return an instance of the SDVTList struct initialized with the 50/// specified members. 51static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 52 SDVTList Res = {VTs, NumVTs}; 53 return Res; 54} 55 56static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 57 switch (VT.getSimpleVT().SimpleTy) { 58 default: llvm_unreachable("Unknown FP format"); 59 case MVT::f32: return &APFloat::IEEEsingle; 60 case MVT::f64: return &APFloat::IEEEdouble; 61 case MVT::f80: return &APFloat::x87DoubleExtended; 62 case MVT::f128: return &APFloat::IEEEquad; 63 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 64 } 65} 66 67SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 68 69//===----------------------------------------------------------------------===// 70// ConstantFPSDNode Class 71//===----------------------------------------------------------------------===// 72 73/// isExactlyValue - We don't rely on operator== working on double values, as 74/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 75/// As such, this method can be used to do an exact bit-for-bit comparison of 76/// two floating point values. 77bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 78 return getValueAPF().bitwiseIsEqual(V); 79} 80 81bool ConstantFPSDNode::isValueValidForType(EVT VT, 82 const APFloat& Val) { 83 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 84 85 // PPC long double cannot be converted to any other type. 86 if (VT == MVT::ppcf128 || 87 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 88 return false; 89 90 // convert modifies in place, so make a copy. 91 APFloat Val2 = APFloat(Val); 92 bool losesInfo; 93 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 94 &losesInfo); 95 return !losesInfo; 96} 97 98//===----------------------------------------------------------------------===// 99// ISD Namespace 100//===----------------------------------------------------------------------===// 101 102/// isBuildVectorAllOnes - Return true if the specified node is a 103/// BUILD_VECTOR where all of the elements are ~0 or undef. 104bool ISD::isBuildVectorAllOnes(const SDNode *N) { 105 // Look through a bit convert. 106 if (N->getOpcode() == ISD::BIT_CONVERT) 107 N = N->getOperand(0).getNode(); 108 109 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 110 111 unsigned i = 0, e = N->getNumOperands(); 112 113 // Skip over all of the undef values. 114 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 115 ++i; 116 117 // Do not accept an all-undef vector. 118 if (i == e) return false; 119 120 // Do not accept build_vectors that aren't all constants or which have non-~0 121 // elements. 122 SDValue NotZero = N->getOperand(i); 123 if (isa<ConstantSDNode>(NotZero)) { 124 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 125 return false; 126 } else if (isa<ConstantFPSDNode>(NotZero)) { 127 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 128 bitcastToAPInt().isAllOnesValue()) 129 return false; 130 } else 131 return false; 132 133 // Okay, we have at least one ~0 value, check to see if the rest match or are 134 // undefs. 135 for (++i; i != e; ++i) 136 if (N->getOperand(i) != NotZero && 137 N->getOperand(i).getOpcode() != ISD::UNDEF) 138 return false; 139 return true; 140} 141 142 143/// isBuildVectorAllZeros - Return true if the specified node is a 144/// BUILD_VECTOR where all of the elements are 0 or undef. 145bool ISD::isBuildVectorAllZeros(const SDNode *N) { 146 // Look through a bit convert. 147 if (N->getOpcode() == ISD::BIT_CONVERT) 148 N = N->getOperand(0).getNode(); 149 150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 151 152 unsigned i = 0, e = N->getNumOperands(); 153 154 // Skip over all of the undef values. 155 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 156 ++i; 157 158 // Do not accept an all-undef vector. 159 if (i == e) return false; 160 161 // Do not accept build_vectors that aren't all constants or which have non-0 162 // elements. 163 SDValue Zero = N->getOperand(i); 164 if (isa<ConstantSDNode>(Zero)) { 165 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 166 return false; 167 } else if (isa<ConstantFPSDNode>(Zero)) { 168 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 169 return false; 170 } else 171 return false; 172 173 // Okay, we have at least one 0 value, check to see if the rest match or are 174 // undefs. 175 for (++i; i != e; ++i) 176 if (N->getOperand(i) != Zero && 177 N->getOperand(i).getOpcode() != ISD::UNDEF) 178 return false; 179 return true; 180} 181 182/// isScalarToVector - Return true if the specified node is a 183/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 184/// element is not an undef. 185bool ISD::isScalarToVector(const SDNode *N) { 186 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 187 return true; 188 189 if (N->getOpcode() != ISD::BUILD_VECTOR) 190 return false; 191 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 192 return false; 193 unsigned NumElems = N->getNumOperands(); 194 for (unsigned i = 1; i < NumElems; ++i) { 195 SDValue V = N->getOperand(i); 196 if (V.getOpcode() != ISD::UNDEF) 197 return false; 198 } 199 return true; 200} 201 202 203/// isDebugLabel - Return true if the specified node represents a debug 204/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 205bool ISD::isDebugLabel(const SDNode *N) { 206 SDValue Zero; 207 if (N->getOpcode() == ISD::DBG_LABEL) 208 return true; 209 if (N->isMachineOpcode() && 210 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 211 return true; 212 return false; 213} 214 215/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 216/// when given the operation for (X op Y). 217ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 218 // To perform this operation, we just need to swap the L and G bits of the 219 // operation. 220 unsigned OldL = (Operation >> 2) & 1; 221 unsigned OldG = (Operation >> 1) & 1; 222 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 223 (OldL << 1) | // New G bit 224 (OldG << 2)); // New L bit. 225} 226 227/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 228/// 'op' is a valid SetCC operation. 229ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 230 unsigned Operation = Op; 231 if (isInteger) 232 Operation ^= 7; // Flip L, G, E bits, but not U. 233 else 234 Operation ^= 15; // Flip all of the condition bits. 235 236 if (Operation > ISD::SETTRUE2) 237 Operation &= ~8; // Don't let N and U bits get set. 238 239 return ISD::CondCode(Operation); 240} 241 242 243/// isSignedOp - For an integer comparison, return 1 if the comparison is a 244/// signed operation and 2 if the result is an unsigned comparison. Return zero 245/// if the operation does not depend on the sign of the input (setne and seteq). 246static int isSignedOp(ISD::CondCode Opcode) { 247 switch (Opcode) { 248 default: llvm_unreachable("Illegal integer setcc operation!"); 249 case ISD::SETEQ: 250 case ISD::SETNE: return 0; 251 case ISD::SETLT: 252 case ISD::SETLE: 253 case ISD::SETGT: 254 case ISD::SETGE: return 1; 255 case ISD::SETULT: 256 case ISD::SETULE: 257 case ISD::SETUGT: 258 case ISD::SETUGE: return 2; 259 } 260} 261 262/// getSetCCOrOperation - Return the result of a logical OR between different 263/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 264/// returns SETCC_INVALID if it is not possible to represent the resultant 265/// comparison. 266ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 267 bool isInteger) { 268 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 269 // Cannot fold a signed integer setcc with an unsigned integer setcc. 270 return ISD::SETCC_INVALID; 271 272 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 273 274 // If the N and U bits get set then the resultant comparison DOES suddenly 275 // care about orderedness, and is true when ordered. 276 if (Op > ISD::SETTRUE2) 277 Op &= ~16; // Clear the U bit if the N bit is set. 278 279 // Canonicalize illegal integer setcc's. 280 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 281 Op = ISD::SETNE; 282 283 return ISD::CondCode(Op); 284} 285 286/// getSetCCAndOperation - Return the result of a logical AND between different 287/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 288/// function returns zero if it is not possible to represent the resultant 289/// comparison. 290ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 291 bool isInteger) { 292 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 293 // Cannot fold a signed setcc with an unsigned setcc. 294 return ISD::SETCC_INVALID; 295 296 // Combine all of the condition bits. 297 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 298 299 // Canonicalize illegal integer setcc's. 300 if (isInteger) { 301 switch (Result) { 302 default: break; 303 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 304 case ISD::SETOEQ: // SETEQ & SETU[LG]E 305 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 306 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 307 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 308 } 309 } 310 311 return Result; 312} 313 314const TargetMachine &SelectionDAG::getTarget() const { 315 return MF->getTarget(); 316} 317 318//===----------------------------------------------------------------------===// 319// SDNode Profile Support 320//===----------------------------------------------------------------------===// 321 322/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 323/// 324static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 325 ID.AddInteger(OpC); 326} 327 328/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 329/// solely with their pointer. 330static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 331 ID.AddPointer(VTList.VTs); 332} 333 334/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 335/// 336static void AddNodeIDOperands(FoldingSetNodeID &ID, 337 const SDValue *Ops, unsigned NumOps) { 338 for (; NumOps; --NumOps, ++Ops) { 339 ID.AddPointer(Ops->getNode()); 340 ID.AddInteger(Ops->getResNo()); 341 } 342} 343 344/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 345/// 346static void AddNodeIDOperands(FoldingSetNodeID &ID, 347 const SDUse *Ops, unsigned NumOps) { 348 for (; NumOps; --NumOps, ++Ops) { 349 ID.AddPointer(Ops->getNode()); 350 ID.AddInteger(Ops->getResNo()); 351 } 352} 353 354static void AddNodeIDNode(FoldingSetNodeID &ID, 355 unsigned short OpC, SDVTList VTList, 356 const SDValue *OpList, unsigned N) { 357 AddNodeIDOpcode(ID, OpC); 358 AddNodeIDValueTypes(ID, VTList); 359 AddNodeIDOperands(ID, OpList, N); 360} 361 362/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 363/// the NodeID data. 364static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 365 switch (N->getOpcode()) { 366 case ISD::TargetExternalSymbol: 367 case ISD::ExternalSymbol: 368 llvm_unreachable("Should only be used on nodes with operands"); 369 default: break; // Normal nodes don't need extra info. 370 case ISD::TargetConstant: 371 case ISD::Constant: 372 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 373 break; 374 case ISD::TargetConstantFP: 375 case ISD::ConstantFP: { 376 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 377 break; 378 } 379 case ISD::TargetGlobalAddress: 380 case ISD::GlobalAddress: 381 case ISD::TargetGlobalTLSAddress: 382 case ISD::GlobalTLSAddress: { 383 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 384 ID.AddPointer(GA->getGlobal()); 385 ID.AddInteger(GA->getOffset()); 386 ID.AddInteger(GA->getTargetFlags()); 387 break; 388 } 389 case ISD::BasicBlock: 390 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 391 break; 392 case ISD::Register: 393 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 394 break; 395 case ISD::DBG_STOPPOINT: { 396 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 397 ID.AddInteger(DSP->getLine()); 398 ID.AddInteger(DSP->getColumn()); 399 ID.AddPointer(DSP->getCompileUnit()); 400 break; 401 } 402 case ISD::SRCVALUE: 403 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 404 break; 405 case ISD::MEMOPERAND: { 406 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 407 MO.Profile(ID); 408 break; 409 } 410 case ISD::FrameIndex: 411 case ISD::TargetFrameIndex: 412 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 413 break; 414 case ISD::JumpTable: 415 case ISD::TargetJumpTable: 416 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 417 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 418 break; 419 case ISD::ConstantPool: 420 case ISD::TargetConstantPool: { 421 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 422 ID.AddInteger(CP->getAlignment()); 423 ID.AddInteger(CP->getOffset()); 424 if (CP->isMachineConstantPoolEntry()) 425 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 426 else 427 ID.AddPointer(CP->getConstVal()); 428 ID.AddInteger(CP->getTargetFlags()); 429 break; 430 } 431 case ISD::LOAD: { 432 const LoadSDNode *LD = cast<LoadSDNode>(N); 433 ID.AddInteger(LD->getMemoryVT().getRawBits()); 434 ID.AddInteger(LD->getRawSubclassData()); 435 break; 436 } 437 case ISD::STORE: { 438 const StoreSDNode *ST = cast<StoreSDNode>(N); 439 ID.AddInteger(ST->getMemoryVT().getRawBits()); 440 ID.AddInteger(ST->getRawSubclassData()); 441 break; 442 } 443 case ISD::ATOMIC_CMP_SWAP: 444 case ISD::ATOMIC_SWAP: 445 case ISD::ATOMIC_LOAD_ADD: 446 case ISD::ATOMIC_LOAD_SUB: 447 case ISD::ATOMIC_LOAD_AND: 448 case ISD::ATOMIC_LOAD_OR: 449 case ISD::ATOMIC_LOAD_XOR: 450 case ISD::ATOMIC_LOAD_NAND: 451 case ISD::ATOMIC_LOAD_MIN: 452 case ISD::ATOMIC_LOAD_MAX: 453 case ISD::ATOMIC_LOAD_UMIN: 454 case ISD::ATOMIC_LOAD_UMAX: { 455 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 456 ID.AddInteger(AT->getMemoryVT().getRawBits()); 457 ID.AddInteger(AT->getRawSubclassData()); 458 break; 459 } 460 case ISD::VECTOR_SHUFFLE: { 461 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 462 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 463 i != e; ++i) 464 ID.AddInteger(SVN->getMaskElt(i)); 465 break; 466 } 467 } // end switch (N->getOpcode()) 468} 469 470/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 471/// data. 472static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 473 AddNodeIDOpcode(ID, N->getOpcode()); 474 // Add the return value info. 475 AddNodeIDValueTypes(ID, N->getVTList()); 476 // Add the operand info. 477 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 478 479 // Handle SDNode leafs with special info. 480 AddNodeIDCustom(ID, N); 481} 482 483/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 484/// the CSE map that carries alignment, volatility, indexing mode, and 485/// extension/truncation information. 486/// 487static inline unsigned 488encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, 489 bool isVolatile, unsigned Alignment) { 490 assert((ConvType & 3) == ConvType && 491 "ConvType may not require more than 2 bits!"); 492 assert((AM & 7) == AM && 493 "AM may not require more than 3 bits!"); 494 return ConvType | 495 (AM << 2) | 496 (isVolatile << 5) | 497 ((Log2_32(Alignment) + 1) << 6); 498} 499 500//===----------------------------------------------------------------------===// 501// SelectionDAG Class 502//===----------------------------------------------------------------------===// 503 504/// doNotCSE - Return true if CSE should not be performed for this node. 505static bool doNotCSE(SDNode *N) { 506 if (N->getValueType(0) == MVT::Flag) 507 return true; // Never CSE anything that produces a flag. 508 509 switch (N->getOpcode()) { 510 default: break; 511 case ISD::HANDLENODE: 512 case ISD::DBG_LABEL: 513 case ISD::DBG_STOPPOINT: 514 case ISD::EH_LABEL: 515 return true; // Never CSE these nodes. 516 } 517 518 // Check that remaining values produced are not flags. 519 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 520 if (N->getValueType(i) == MVT::Flag) 521 return true; // Never CSE anything that produces a flag. 522 523 return false; 524} 525 526/// RemoveDeadNodes - This method deletes all unreachable nodes in the 527/// SelectionDAG. 528void SelectionDAG::RemoveDeadNodes() { 529 // Create a dummy node (which is not added to allnodes), that adds a reference 530 // to the root node, preventing it from being deleted. 531 HandleSDNode Dummy(getRoot()); 532 533 SmallVector<SDNode*, 128> DeadNodes; 534 535 // Add all obviously-dead nodes to the DeadNodes worklist. 536 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 537 if (I->use_empty()) 538 DeadNodes.push_back(I); 539 540 RemoveDeadNodes(DeadNodes); 541 542 // If the root changed (e.g. it was a dead load, update the root). 543 setRoot(Dummy.getValue()); 544} 545 546/// RemoveDeadNodes - This method deletes the unreachable nodes in the 547/// given list, and any nodes that become unreachable as a result. 548void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 549 DAGUpdateListener *UpdateListener) { 550 551 // Process the worklist, deleting the nodes and adding their uses to the 552 // worklist. 553 while (!DeadNodes.empty()) { 554 SDNode *N = DeadNodes.pop_back_val(); 555 556 if (UpdateListener) 557 UpdateListener->NodeDeleted(N, 0); 558 559 // Take the node out of the appropriate CSE map. 560 RemoveNodeFromCSEMaps(N); 561 562 // Next, brutally remove the operand list. This is safe to do, as there are 563 // no cycles in the graph. 564 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 565 SDUse &Use = *I++; 566 SDNode *Operand = Use.getNode(); 567 Use.set(SDValue()); 568 569 // Now that we removed this operand, see if there are no uses of it left. 570 if (Operand->use_empty()) 571 DeadNodes.push_back(Operand); 572 } 573 574 DeallocateNode(N); 575 } 576} 577 578void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 579 SmallVector<SDNode*, 16> DeadNodes(1, N); 580 RemoveDeadNodes(DeadNodes, UpdateListener); 581} 582 583void SelectionDAG::DeleteNode(SDNode *N) { 584 // First take this out of the appropriate CSE map. 585 RemoveNodeFromCSEMaps(N); 586 587 // Finally, remove uses due to operands of this node, remove from the 588 // AllNodes list, and delete the node. 589 DeleteNodeNotInCSEMaps(N); 590} 591 592void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 593 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 594 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 595 596 // Drop all of the operands and decrement used node's use counts. 597 N->DropOperands(); 598 599 DeallocateNode(N); 600} 601 602void SelectionDAG::DeallocateNode(SDNode *N) { 603 if (N->OperandsNeedDelete) 604 delete[] N->OperandList; 605 606 // Set the opcode to DELETED_NODE to help catch bugs when node 607 // memory is reallocated. 608 N->NodeType = ISD::DELETED_NODE; 609 610 NodeAllocator.Deallocate(AllNodes.remove(N)); 611} 612 613/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 614/// correspond to it. This is useful when we're about to delete or repurpose 615/// the node. We don't want future request for structurally identical nodes 616/// to return N anymore. 617bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 618 bool Erased = false; 619 switch (N->getOpcode()) { 620 case ISD::EntryToken: 621 llvm_unreachable("EntryToken should not be in CSEMaps!"); 622 return false; 623 case ISD::HANDLENODE: return false; // noop. 624 case ISD::CONDCODE: 625 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 626 "Cond code doesn't exist!"); 627 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 628 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 629 break; 630 case ISD::ExternalSymbol: 631 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 632 break; 633 case ISD::TargetExternalSymbol: { 634 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 635 Erased = TargetExternalSymbols.erase( 636 std::pair<std::string,unsigned char>(ESN->getSymbol(), 637 ESN->getTargetFlags())); 638 break; 639 } 640 case ISD::VALUETYPE: { 641 EVT VT = cast<VTSDNode>(N)->getVT(); 642 if (VT.isExtended()) { 643 Erased = ExtendedValueTypeNodes.erase(VT); 644 } else { 645 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 646 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 647 } 648 break; 649 } 650 default: 651 // Remove it from the CSE Map. 652 Erased = CSEMap.RemoveNode(N); 653 break; 654 } 655#ifndef NDEBUG 656 // Verify that the node was actually in one of the CSE maps, unless it has a 657 // flag result (which cannot be CSE'd) or is one of the special cases that are 658 // not subject to CSE. 659 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 660 !N->isMachineOpcode() && !doNotCSE(N)) { 661 N->dump(this); 662 errs() << "\n"; 663 llvm_unreachable("Node is not in map!"); 664 } 665#endif 666 return Erased; 667} 668 669/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 670/// maps and modified in place. Add it back to the CSE maps, unless an identical 671/// node already exists, in which case transfer all its users to the existing 672/// node. This transfer can potentially trigger recursive merging. 673/// 674void 675SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 676 DAGUpdateListener *UpdateListener) { 677 // For node types that aren't CSE'd, just act as if no identical node 678 // already exists. 679 if (!doNotCSE(N)) { 680 SDNode *Existing = CSEMap.GetOrInsertNode(N); 681 if (Existing != N) { 682 // If there was already an existing matching node, use ReplaceAllUsesWith 683 // to replace the dead one with the existing one. This can cause 684 // recursive merging of other unrelated nodes down the line. 685 ReplaceAllUsesWith(N, Existing, UpdateListener); 686 687 // N is now dead. Inform the listener if it exists and delete it. 688 if (UpdateListener) 689 UpdateListener->NodeDeleted(N, Existing); 690 DeleteNodeNotInCSEMaps(N); 691 return; 692 } 693 } 694 695 // If the node doesn't already exist, we updated it. Inform a listener if 696 // it exists. 697 if (UpdateListener) 698 UpdateListener->NodeUpdated(N); 699} 700 701/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 702/// were replaced with those specified. If this node is never memoized, 703/// return null, otherwise return a pointer to the slot it would take. If a 704/// node already exists with these operands, the slot will be non-null. 705SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 706 void *&InsertPos) { 707 if (doNotCSE(N)) 708 return 0; 709 710 SDValue Ops[] = { Op }; 711 FoldingSetNodeID ID; 712 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 713 AddNodeIDCustom(ID, N); 714 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 715} 716 717/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 718/// were replaced with those specified. If this node is never memoized, 719/// return null, otherwise return a pointer to the slot it would take. If a 720/// node already exists with these operands, the slot will be non-null. 721SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 722 SDValue Op1, SDValue Op2, 723 void *&InsertPos) { 724 if (doNotCSE(N)) 725 return 0; 726 727 SDValue Ops[] = { Op1, Op2 }; 728 FoldingSetNodeID ID; 729 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 730 AddNodeIDCustom(ID, N); 731 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 732} 733 734 735/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 736/// were replaced with those specified. If this node is never memoized, 737/// return null, otherwise return a pointer to the slot it would take. If a 738/// node already exists with these operands, the slot will be non-null. 739SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 740 const SDValue *Ops,unsigned NumOps, 741 void *&InsertPos) { 742 if (doNotCSE(N)) 743 return 0; 744 745 FoldingSetNodeID ID; 746 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 747 AddNodeIDCustom(ID, N); 748 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 749} 750 751/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 752void SelectionDAG::VerifyNode(SDNode *N) { 753 switch (N->getOpcode()) { 754 default: 755 break; 756 case ISD::BUILD_PAIR: { 757 EVT VT = N->getValueType(0); 758 assert(N->getNumValues() == 1 && "Too many results!"); 759 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 760 "Wrong return type!"); 761 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 762 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 763 "Mismatched operand types!"); 764 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 765 "Wrong operand type!"); 766 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 767 "Wrong return type size"); 768 break; 769 } 770 case ISD::BUILD_VECTOR: { 771 assert(N->getNumValues() == 1 && "Too many results!"); 772 assert(N->getValueType(0).isVector() && "Wrong return type!"); 773 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 774 "Wrong number of operands!"); 775 EVT EltVT = N->getValueType(0).getVectorElementType(); 776 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 777 assert((I->getValueType() == EltVT || 778 (EltVT.isInteger() && I->getValueType().isInteger() && 779 EltVT.bitsLE(I->getValueType()))) && 780 "Wrong operand type!"); 781 break; 782 } 783 } 784} 785 786/// getEVTAlignment - Compute the default alignment value for the 787/// given type. 788/// 789unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 790 const Type *Ty = VT == MVT::iPTR ? 791 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 792 VT.getTypeForEVT(*getContext()); 793 794 return TLI.getTargetData()->getABITypeAlignment(Ty); 795} 796 797// EntryNode could meaningfully have debug info if we can find it... 798SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 799 : TLI(tli), FLI(fli), DW(0), 800 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(), 801 getVTList(MVT::Other)), Root(getEntryNode()) { 802 AllNodes.push_back(&EntryNode); 803} 804 805void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 806 DwarfWriter *dw) { 807 MF = &mf; 808 MMI = mmi; 809 DW = dw; 810 Context = &mf.getFunction()->getContext(); 811} 812 813SelectionDAG::~SelectionDAG() { 814 allnodes_clear(); 815} 816 817void SelectionDAG::allnodes_clear() { 818 assert(&*AllNodes.begin() == &EntryNode); 819 AllNodes.remove(AllNodes.begin()); 820 while (!AllNodes.empty()) 821 DeallocateNode(AllNodes.begin()); 822} 823 824void SelectionDAG::clear() { 825 allnodes_clear(); 826 OperandAllocator.Reset(); 827 CSEMap.clear(); 828 829 ExtendedValueTypeNodes.clear(); 830 ExternalSymbols.clear(); 831 TargetExternalSymbols.clear(); 832 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 833 static_cast<CondCodeSDNode*>(0)); 834 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 835 static_cast<SDNode*>(0)); 836 837 EntryNode.UseList = 0; 838 AllNodes.push_back(&EntryNode); 839 Root = getEntryNode(); 840} 841 842SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 843 if (Op.getValueType() == VT) return Op; 844 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 845 VT.getSizeInBits()); 846 return getNode(ISD::AND, DL, Op.getValueType(), Op, 847 getConstant(Imm, Op.getValueType())); 848} 849 850/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 851/// 852SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 853 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 854 SDValue NegOne = 855 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 856 return getNode(ISD::XOR, DL, VT, Val, NegOne); 857} 858 859SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 860 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 861 assert((EltVT.getSizeInBits() >= 64 || 862 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 863 "getConstant with a uint64_t value that doesn't fit in the type!"); 864 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 865} 866 867SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 868 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 869} 870 871SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 872 assert(VT.isInteger() && "Cannot create FP integer constant!"); 873 874 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 875 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 876 "APInt size does not match type size!"); 877 878 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 879 FoldingSetNodeID ID; 880 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 881 ID.AddPointer(&Val); 882 void *IP = 0; 883 SDNode *N = NULL; 884 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 885 if (!VT.isVector()) 886 return SDValue(N, 0); 887 if (!N) { 888 N = NodeAllocator.Allocate<ConstantSDNode>(); 889 new (N) ConstantSDNode(isT, &Val, EltVT); 890 CSEMap.InsertNode(N, IP); 891 AllNodes.push_back(N); 892 } 893 894 SDValue Result(N, 0); 895 if (VT.isVector()) { 896 SmallVector<SDValue, 8> Ops; 897 Ops.assign(VT.getVectorNumElements(), Result); 898 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 899 VT, &Ops[0], Ops.size()); 900 } 901 return Result; 902} 903 904SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 905 return getConstant(Val, TLI.getPointerTy(), isTarget); 906} 907 908 909SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 910 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 911} 912 913SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 914 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 915 916 EVT EltVT = 917 VT.isVector() ? VT.getVectorElementType() : VT; 918 919 // Do the map lookup using the actual bit pattern for the floating point 920 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 921 // we don't have issues with SNANs. 922 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 923 FoldingSetNodeID ID; 924 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 925 ID.AddPointer(&V); 926 void *IP = 0; 927 SDNode *N = NULL; 928 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 929 if (!VT.isVector()) 930 return SDValue(N, 0); 931 if (!N) { 932 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 933 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 934 CSEMap.InsertNode(N, IP); 935 AllNodes.push_back(N); 936 } 937 938 SDValue Result(N, 0); 939 if (VT.isVector()) { 940 SmallVector<SDValue, 8> Ops; 941 Ops.assign(VT.getVectorNumElements(), Result); 942 // FIXME DebugLoc info might be appropriate here 943 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 944 VT, &Ops[0], Ops.size()); 945 } 946 return Result; 947} 948 949SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 950 EVT EltVT = 951 VT.isVector() ? VT.getVectorElementType() : VT; 952 if (EltVT==MVT::f32) 953 return getConstantFP(APFloat((float)Val), VT, isTarget); 954 else 955 return getConstantFP(APFloat(Val), VT, isTarget); 956} 957 958SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 959 EVT VT, int64_t Offset, 960 bool isTargetGA, 961 unsigned char TargetFlags) { 962 assert((TargetFlags == 0 || isTargetGA) && 963 "Cannot set target flags on target-independent globals"); 964 965 // Truncate (with sign-extension) the offset value to the pointer size. 966 EVT PTy = TLI.getPointerTy(); 967 unsigned BitWidth = PTy.getSizeInBits(); 968 if (BitWidth < 64) 969 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 970 971 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 972 if (!GVar) { 973 // If GV is an alias then use the aliasee for determining thread-localness. 974 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 975 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 976 } 977 978 unsigned Opc; 979 if (GVar && GVar->isThreadLocal()) 980 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 981 else 982 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 983 984 FoldingSetNodeID ID; 985 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 986 ID.AddPointer(GV); 987 ID.AddInteger(Offset); 988 ID.AddInteger(TargetFlags); 989 void *IP = 0; 990 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 991 return SDValue(E, 0); 992 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 993 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags); 994 CSEMap.InsertNode(N, IP); 995 AllNodes.push_back(N); 996 return SDValue(N, 0); 997} 998 999SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1000 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1001 FoldingSetNodeID ID; 1002 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1003 ID.AddInteger(FI); 1004 void *IP = 0; 1005 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1006 return SDValue(E, 0); 1007 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1008 new (N) FrameIndexSDNode(FI, VT, isTarget); 1009 CSEMap.InsertNode(N, IP); 1010 AllNodes.push_back(N); 1011 return SDValue(N, 0); 1012} 1013 1014SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1015 unsigned char TargetFlags) { 1016 assert((TargetFlags == 0 || isTarget) && 1017 "Cannot set target flags on target-independent jump tables"); 1018 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1019 FoldingSetNodeID ID; 1020 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1021 ID.AddInteger(JTI); 1022 ID.AddInteger(TargetFlags); 1023 void *IP = 0; 1024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1025 return SDValue(E, 0); 1026 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1027 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags); 1028 CSEMap.InsertNode(N, IP); 1029 AllNodes.push_back(N); 1030 return SDValue(N, 0); 1031} 1032 1033SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1034 unsigned Alignment, int Offset, 1035 bool isTarget, 1036 unsigned char TargetFlags) { 1037 assert((TargetFlags == 0 || isTarget) && 1038 "Cannot set target flags on target-independent globals"); 1039 if (Alignment == 0) 1040 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1041 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1042 FoldingSetNodeID ID; 1043 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1044 ID.AddInteger(Alignment); 1045 ID.AddInteger(Offset); 1046 ID.AddPointer(C); 1047 ID.AddInteger(TargetFlags); 1048 void *IP = 0; 1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1050 return SDValue(E, 0); 1051 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1052 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1053 CSEMap.InsertNode(N, IP); 1054 AllNodes.push_back(N); 1055 return SDValue(N, 0); 1056} 1057 1058 1059SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1060 unsigned Alignment, int Offset, 1061 bool isTarget, 1062 unsigned char TargetFlags) { 1063 assert((TargetFlags == 0 || isTarget) && 1064 "Cannot set target flags on target-independent globals"); 1065 if (Alignment == 0) 1066 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1067 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1068 FoldingSetNodeID ID; 1069 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1070 ID.AddInteger(Alignment); 1071 ID.AddInteger(Offset); 1072 C->AddSelectionDAGCSEId(ID); 1073 ID.AddInteger(TargetFlags); 1074 void *IP = 0; 1075 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1076 return SDValue(E, 0); 1077 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1078 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1079 CSEMap.InsertNode(N, IP); 1080 AllNodes.push_back(N); 1081 return SDValue(N, 0); 1082} 1083 1084SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1085 FoldingSetNodeID ID; 1086 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1087 ID.AddPointer(MBB); 1088 void *IP = 0; 1089 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1090 return SDValue(E, 0); 1091 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1092 new (N) BasicBlockSDNode(MBB); 1093 CSEMap.InsertNode(N, IP); 1094 AllNodes.push_back(N); 1095 return SDValue(N, 0); 1096} 1097 1098SDValue SelectionDAG::getValueType(EVT VT) { 1099 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1100 ValueTypeNodes.size()) 1101 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1102 1103 SDNode *&N = VT.isExtended() ? 1104 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1105 1106 if (N) return SDValue(N, 0); 1107 N = NodeAllocator.Allocate<VTSDNode>(); 1108 new (N) VTSDNode(VT); 1109 AllNodes.push_back(N); 1110 return SDValue(N, 0); 1111} 1112 1113SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1114 SDNode *&N = ExternalSymbols[Sym]; 1115 if (N) return SDValue(N, 0); 1116 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1117 new (N) ExternalSymbolSDNode(false, Sym, 0, VT); 1118 AllNodes.push_back(N); 1119 return SDValue(N, 0); 1120} 1121 1122SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1123 unsigned char TargetFlags) { 1124 SDNode *&N = 1125 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1126 TargetFlags)]; 1127 if (N) return SDValue(N, 0); 1128 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1129 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1130 AllNodes.push_back(N); 1131 return SDValue(N, 0); 1132} 1133 1134SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1135 if ((unsigned)Cond >= CondCodeNodes.size()) 1136 CondCodeNodes.resize(Cond+1); 1137 1138 if (CondCodeNodes[Cond] == 0) { 1139 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1140 new (N) CondCodeSDNode(Cond); 1141 CondCodeNodes[Cond] = N; 1142 AllNodes.push_back(N); 1143 } 1144 return SDValue(CondCodeNodes[Cond], 0); 1145} 1146 1147// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1148// the shuffle mask M that point at N1 to point at N2, and indices that point 1149// N2 to point at N1. 1150static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1151 std::swap(N1, N2); 1152 int NElts = M.size(); 1153 for (int i = 0; i != NElts; ++i) { 1154 if (M[i] >= NElts) 1155 M[i] -= NElts; 1156 else if (M[i] >= 0) 1157 M[i] += NElts; 1158 } 1159} 1160 1161SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1162 SDValue N2, const int *Mask) { 1163 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1164 assert(VT.isVector() && N1.getValueType().isVector() && 1165 "Vector Shuffle VTs must be a vectors"); 1166 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1167 && "Vector Shuffle VTs must have same element type"); 1168 1169 // Canonicalize shuffle undef, undef -> undef 1170 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1171 return getUNDEF(VT); 1172 1173 // Validate that all indices in Mask are within the range of the elements 1174 // input to the shuffle. 1175 unsigned NElts = VT.getVectorNumElements(); 1176 SmallVector<int, 8> MaskVec; 1177 for (unsigned i = 0; i != NElts; ++i) { 1178 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1179 MaskVec.push_back(Mask[i]); 1180 } 1181 1182 // Canonicalize shuffle v, v -> v, undef 1183 if (N1 == N2) { 1184 N2 = getUNDEF(VT); 1185 for (unsigned i = 0; i != NElts; ++i) 1186 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1187 } 1188 1189 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1190 if (N1.getOpcode() == ISD::UNDEF) 1191 commuteShuffle(N1, N2, MaskVec); 1192 1193 // Canonicalize all index into lhs, -> shuffle lhs, undef 1194 // Canonicalize all index into rhs, -> shuffle rhs, undef 1195 bool AllLHS = true, AllRHS = true; 1196 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1197 for (unsigned i = 0; i != NElts; ++i) { 1198 if (MaskVec[i] >= (int)NElts) { 1199 if (N2Undef) 1200 MaskVec[i] = -1; 1201 else 1202 AllLHS = false; 1203 } else if (MaskVec[i] >= 0) { 1204 AllRHS = false; 1205 } 1206 } 1207 if (AllLHS && AllRHS) 1208 return getUNDEF(VT); 1209 if (AllLHS && !N2Undef) 1210 N2 = getUNDEF(VT); 1211 if (AllRHS) { 1212 N1 = getUNDEF(VT); 1213 commuteShuffle(N1, N2, MaskVec); 1214 } 1215 1216 // If Identity shuffle, or all shuffle in to undef, return that node. 1217 bool AllUndef = true; 1218 bool Identity = true; 1219 for (unsigned i = 0; i != NElts; ++i) { 1220 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1221 if (MaskVec[i] >= 0) AllUndef = false; 1222 } 1223 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1224 return N1; 1225 if (AllUndef) 1226 return getUNDEF(VT); 1227 1228 FoldingSetNodeID ID; 1229 SDValue Ops[2] = { N1, N2 }; 1230 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1231 for (unsigned i = 0; i != NElts; ++i) 1232 ID.AddInteger(MaskVec[i]); 1233 1234 void* IP = 0; 1235 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1236 return SDValue(E, 0); 1237 1238 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1239 // SDNode doesn't have access to it. This memory will be "leaked" when 1240 // the node is deallocated, but recovered when the NodeAllocator is released. 1241 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1242 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1243 1244 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>(); 1245 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1246 CSEMap.InsertNode(N, IP); 1247 AllNodes.push_back(N); 1248 return SDValue(N, 0); 1249} 1250 1251SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1252 SDValue Val, SDValue DTy, 1253 SDValue STy, SDValue Rnd, SDValue Sat, 1254 ISD::CvtCode Code) { 1255 // If the src and dest types are the same and the conversion is between 1256 // integer types of the same sign or two floats, no conversion is necessary. 1257 if (DTy == STy && 1258 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1259 return Val; 1260 1261 FoldingSetNodeID ID; 1262 void* IP = 0; 1263 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1264 return SDValue(E, 0); 1265 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1266 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1267 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code); 1268 CSEMap.InsertNode(N, IP); 1269 AllNodes.push_back(N); 1270 return SDValue(N, 0); 1271} 1272 1273SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1274 FoldingSetNodeID ID; 1275 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1276 ID.AddInteger(RegNo); 1277 void *IP = 0; 1278 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1279 return SDValue(E, 0); 1280 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1281 new (N) RegisterSDNode(RegNo, VT); 1282 CSEMap.InsertNode(N, IP); 1283 AllNodes.push_back(N); 1284 return SDValue(N, 0); 1285} 1286 1287SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root, 1288 unsigned Line, unsigned Col, 1289 MDNode *CU) { 1290 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1291 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1292 N->setDebugLoc(DL); 1293 AllNodes.push_back(N); 1294 return SDValue(N, 0); 1295} 1296 1297SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1298 SDValue Root, 1299 unsigned LabelID) { 1300 FoldingSetNodeID ID; 1301 SDValue Ops[] = { Root }; 1302 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1303 ID.AddInteger(LabelID); 1304 void *IP = 0; 1305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1306 return SDValue(E, 0); 1307 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1308 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1309 CSEMap.InsertNode(N, IP); 1310 AllNodes.push_back(N); 1311 return SDValue(N, 0); 1312} 1313 1314SDValue SelectionDAG::getSrcValue(const Value *V) { 1315 assert((!V || isa<PointerType>(V->getType())) && 1316 "SrcValue is not a pointer?"); 1317 1318 FoldingSetNodeID ID; 1319 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1320 ID.AddPointer(V); 1321 1322 void *IP = 0; 1323 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1324 return SDValue(E, 0); 1325 1326 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1327 new (N) SrcValueSDNode(V); 1328 CSEMap.InsertNode(N, IP); 1329 AllNodes.push_back(N); 1330 return SDValue(N, 0); 1331} 1332 1333SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1334#ifndef NDEBUG 1335 const Value *v = MO.getValue(); 1336 assert((!v || isa<PointerType>(v->getType())) && 1337 "SrcValue is not a pointer?"); 1338#endif 1339 1340 FoldingSetNodeID ID; 1341 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1342 MO.Profile(ID); 1343 1344 void *IP = 0; 1345 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1346 return SDValue(E, 0); 1347 1348 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1349 new (N) MemOperandSDNode(MO); 1350 CSEMap.InsertNode(N, IP); 1351 AllNodes.push_back(N); 1352 return SDValue(N, 0); 1353} 1354 1355/// getShiftAmountOperand - Return the specified value casted to 1356/// the target's desired shift amount type. 1357SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1358 EVT OpTy = Op.getValueType(); 1359 MVT ShTy = TLI.getShiftAmountTy(); 1360 if (OpTy == ShTy || OpTy.isVector()) return Op; 1361 1362 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1363 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1364} 1365 1366/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1367/// specified value type. 1368SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1369 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1370 unsigned ByteSize = VT.getStoreSizeInBits()/8; 1371 const Type *Ty = VT.getTypeForEVT(*getContext()); 1372 unsigned StackAlign = 1373 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1374 1375 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1376 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1377} 1378 1379/// CreateStackTemporary - Create a stack temporary suitable for holding 1380/// either of the specified value types. 1381SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1382 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1383 VT2.getStoreSizeInBits())/8; 1384 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1385 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1386 const TargetData *TD = TLI.getTargetData(); 1387 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1388 TD->getPrefTypeAlignment(Ty2)); 1389 1390 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1391 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1392 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1393} 1394 1395SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1396 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1397 // These setcc operations always fold. 1398 switch (Cond) { 1399 default: break; 1400 case ISD::SETFALSE: 1401 case ISD::SETFALSE2: return getConstant(0, VT); 1402 case ISD::SETTRUE: 1403 case ISD::SETTRUE2: return getConstant(1, VT); 1404 1405 case ISD::SETOEQ: 1406 case ISD::SETOGT: 1407 case ISD::SETOGE: 1408 case ISD::SETOLT: 1409 case ISD::SETOLE: 1410 case ISD::SETONE: 1411 case ISD::SETO: 1412 case ISD::SETUO: 1413 case ISD::SETUEQ: 1414 case ISD::SETUNE: 1415 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1416 break; 1417 } 1418 1419 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1420 const APInt &C2 = N2C->getAPIntValue(); 1421 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1422 const APInt &C1 = N1C->getAPIntValue(); 1423 1424 switch (Cond) { 1425 default: llvm_unreachable("Unknown integer setcc!"); 1426 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1427 case ISD::SETNE: return getConstant(C1 != C2, VT); 1428 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1429 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1430 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1431 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1432 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1433 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1434 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1435 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1436 } 1437 } 1438 } 1439 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1440 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1441 // No compile time operations on this type yet. 1442 if (N1C->getValueType(0) == MVT::ppcf128) 1443 return SDValue(); 1444 1445 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1446 switch (Cond) { 1447 default: break; 1448 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1449 return getUNDEF(VT); 1450 // fall through 1451 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1452 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1453 return getUNDEF(VT); 1454 // fall through 1455 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1456 R==APFloat::cmpLessThan, VT); 1457 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1458 return getUNDEF(VT); 1459 // fall through 1460 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1461 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1462 return getUNDEF(VT); 1463 // fall through 1464 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1465 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1466 return getUNDEF(VT); 1467 // fall through 1468 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1469 R==APFloat::cmpEqual, VT); 1470 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1471 return getUNDEF(VT); 1472 // fall through 1473 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1474 R==APFloat::cmpEqual, VT); 1475 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1476 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1477 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1478 R==APFloat::cmpEqual, VT); 1479 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1480 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1481 R==APFloat::cmpLessThan, VT); 1482 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1483 R==APFloat::cmpUnordered, VT); 1484 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1485 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1486 } 1487 } else { 1488 // Ensure that the constant occurs on the RHS. 1489 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1490 } 1491 } 1492 1493 // Could not fold it. 1494 return SDValue(); 1495} 1496 1497/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1498/// use this predicate to simplify operations downstream. 1499bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1500 // This predicate is not safe for vector operations. 1501 if (Op.getValueType().isVector()) 1502 return false; 1503 1504 unsigned BitWidth = Op.getValueSizeInBits(); 1505 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1506} 1507 1508/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1509/// this predicate to simplify operations downstream. Mask is known to be zero 1510/// for bits that V cannot have. 1511bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1512 unsigned Depth) const { 1513 APInt KnownZero, KnownOne; 1514 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1515 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1516 return (KnownZero & Mask) == Mask; 1517} 1518 1519/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1520/// known to be either zero or one and return them in the KnownZero/KnownOne 1521/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1522/// processing. 1523void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1524 APInt &KnownZero, APInt &KnownOne, 1525 unsigned Depth) const { 1526 unsigned BitWidth = Mask.getBitWidth(); 1527 assert(BitWidth == Op.getValueType().getSizeInBits() && 1528 "Mask size mismatches value type size!"); 1529 1530 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1531 if (Depth == 6 || Mask == 0) 1532 return; // Limit search depth. 1533 1534 APInt KnownZero2, KnownOne2; 1535 1536 switch (Op.getOpcode()) { 1537 case ISD::Constant: 1538 // We know all of the bits for a constant! 1539 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1540 KnownZero = ~KnownOne & Mask; 1541 return; 1542 case ISD::AND: 1543 // If either the LHS or the RHS are Zero, the result is zero. 1544 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1545 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1546 KnownZero2, KnownOne2, Depth+1); 1547 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1548 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1549 1550 // Output known-1 bits are only known if set in both the LHS & RHS. 1551 KnownOne &= KnownOne2; 1552 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1553 KnownZero |= KnownZero2; 1554 return; 1555 case ISD::OR: 1556 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1557 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1558 KnownZero2, KnownOne2, Depth+1); 1559 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1560 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1561 1562 // Output known-0 bits are only known if clear in both the LHS & RHS. 1563 KnownZero &= KnownZero2; 1564 // Output known-1 are known to be set if set in either the LHS | RHS. 1565 KnownOne |= KnownOne2; 1566 return; 1567 case ISD::XOR: { 1568 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1569 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1570 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1571 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1572 1573 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1574 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1575 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1576 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1577 KnownZero = KnownZeroOut; 1578 return; 1579 } 1580 case ISD::MUL: { 1581 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1582 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1583 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1584 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1585 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1586 1587 // If low bits are zero in either operand, output low known-0 bits. 1588 // Also compute a conserative estimate for high known-0 bits. 1589 // More trickiness is possible, but this is sufficient for the 1590 // interesting case of alignment computation. 1591 KnownOne.clear(); 1592 unsigned TrailZ = KnownZero.countTrailingOnes() + 1593 KnownZero2.countTrailingOnes(); 1594 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1595 KnownZero2.countLeadingOnes(), 1596 BitWidth) - BitWidth; 1597 1598 TrailZ = std::min(TrailZ, BitWidth); 1599 LeadZ = std::min(LeadZ, BitWidth); 1600 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1601 APInt::getHighBitsSet(BitWidth, LeadZ); 1602 KnownZero &= Mask; 1603 return; 1604 } 1605 case ISD::UDIV: { 1606 // For the purposes of computing leading zeros we can conservatively 1607 // treat a udiv as a logical right shift by the power of 2 known to 1608 // be less than the denominator. 1609 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1610 ComputeMaskedBits(Op.getOperand(0), 1611 AllOnes, KnownZero2, KnownOne2, Depth+1); 1612 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1613 1614 KnownOne2.clear(); 1615 KnownZero2.clear(); 1616 ComputeMaskedBits(Op.getOperand(1), 1617 AllOnes, KnownZero2, KnownOne2, Depth+1); 1618 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1619 if (RHSUnknownLeadingOnes != BitWidth) 1620 LeadZ = std::min(BitWidth, 1621 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1622 1623 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1624 return; 1625 } 1626 case ISD::SELECT: 1627 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1628 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1629 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1630 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1631 1632 // Only known if known in both the LHS and RHS. 1633 KnownOne &= KnownOne2; 1634 KnownZero &= KnownZero2; 1635 return; 1636 case ISD::SELECT_CC: 1637 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1638 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1639 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1640 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1641 1642 // Only known if known in both the LHS and RHS. 1643 KnownOne &= KnownOne2; 1644 KnownZero &= KnownZero2; 1645 return; 1646 case ISD::SADDO: 1647 case ISD::UADDO: 1648 case ISD::SSUBO: 1649 case ISD::USUBO: 1650 case ISD::SMULO: 1651 case ISD::UMULO: 1652 if (Op.getResNo() != 1) 1653 return; 1654 // The boolean result conforms to getBooleanContents. Fall through. 1655 case ISD::SETCC: 1656 // If we know the result of a setcc has the top bits zero, use this info. 1657 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1658 BitWidth > 1) 1659 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1660 return; 1661 case ISD::SHL: 1662 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1663 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1664 unsigned ShAmt = SA->getZExtValue(); 1665 1666 // If the shift count is an invalid immediate, don't do anything. 1667 if (ShAmt >= BitWidth) 1668 return; 1669 1670 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1671 KnownZero, KnownOne, Depth+1); 1672 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1673 KnownZero <<= ShAmt; 1674 KnownOne <<= ShAmt; 1675 // low bits known zero. 1676 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1677 } 1678 return; 1679 case ISD::SRL: 1680 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1681 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1682 unsigned ShAmt = SA->getZExtValue(); 1683 1684 // If the shift count is an invalid immediate, don't do anything. 1685 if (ShAmt >= BitWidth) 1686 return; 1687 1688 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1689 KnownZero, KnownOne, Depth+1); 1690 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1691 KnownZero = KnownZero.lshr(ShAmt); 1692 KnownOne = KnownOne.lshr(ShAmt); 1693 1694 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1695 KnownZero |= HighBits; // High bits known zero. 1696 } 1697 return; 1698 case ISD::SRA: 1699 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1700 unsigned ShAmt = SA->getZExtValue(); 1701 1702 // If the shift count is an invalid immediate, don't do anything. 1703 if (ShAmt >= BitWidth) 1704 return; 1705 1706 APInt InDemandedMask = (Mask << ShAmt); 1707 // If any of the demanded bits are produced by the sign extension, we also 1708 // demand the input sign bit. 1709 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1710 if (HighBits.getBoolValue()) 1711 InDemandedMask |= APInt::getSignBit(BitWidth); 1712 1713 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1714 Depth+1); 1715 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1716 KnownZero = KnownZero.lshr(ShAmt); 1717 KnownOne = KnownOne.lshr(ShAmt); 1718 1719 // Handle the sign bits. 1720 APInt SignBit = APInt::getSignBit(BitWidth); 1721 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1722 1723 if (KnownZero.intersects(SignBit)) { 1724 KnownZero |= HighBits; // New bits are known zero. 1725 } else if (KnownOne.intersects(SignBit)) { 1726 KnownOne |= HighBits; // New bits are known one. 1727 } 1728 } 1729 return; 1730 case ISD::SIGN_EXTEND_INREG: { 1731 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1732 unsigned EBits = EVT.getSizeInBits(); 1733 1734 // Sign extension. Compute the demanded bits in the result that are not 1735 // present in the input. 1736 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1737 1738 APInt InSignBit = APInt::getSignBit(EBits); 1739 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1740 1741 // If the sign extended bits are demanded, we know that the sign 1742 // bit is demanded. 1743 InSignBit.zext(BitWidth); 1744 if (NewBits.getBoolValue()) 1745 InputDemandedBits |= InSignBit; 1746 1747 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1748 KnownZero, KnownOne, Depth+1); 1749 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1750 1751 // If the sign bit of the input is known set or clear, then we know the 1752 // top bits of the result. 1753 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1754 KnownZero |= NewBits; 1755 KnownOne &= ~NewBits; 1756 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1757 KnownOne |= NewBits; 1758 KnownZero &= ~NewBits; 1759 } else { // Input sign bit unknown 1760 KnownZero &= ~NewBits; 1761 KnownOne &= ~NewBits; 1762 } 1763 return; 1764 } 1765 case ISD::CTTZ: 1766 case ISD::CTLZ: 1767 case ISD::CTPOP: { 1768 unsigned LowBits = Log2_32(BitWidth)+1; 1769 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1770 KnownOne.clear(); 1771 return; 1772 } 1773 case ISD::LOAD: { 1774 if (ISD::isZEXTLoad(Op.getNode())) { 1775 LoadSDNode *LD = cast<LoadSDNode>(Op); 1776 EVT VT = LD->getMemoryVT(); 1777 unsigned MemBits = VT.getSizeInBits(); 1778 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1779 } 1780 return; 1781 } 1782 case ISD::ZERO_EXTEND: { 1783 EVT InVT = Op.getOperand(0).getValueType(); 1784 unsigned InBits = InVT.getSizeInBits(); 1785 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1786 APInt InMask = Mask; 1787 InMask.trunc(InBits); 1788 KnownZero.trunc(InBits); 1789 KnownOne.trunc(InBits); 1790 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1791 KnownZero.zext(BitWidth); 1792 KnownOne.zext(BitWidth); 1793 KnownZero |= NewBits; 1794 return; 1795 } 1796 case ISD::SIGN_EXTEND: { 1797 EVT InVT = Op.getOperand(0).getValueType(); 1798 unsigned InBits = InVT.getSizeInBits(); 1799 APInt InSignBit = APInt::getSignBit(InBits); 1800 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1801 APInt InMask = Mask; 1802 InMask.trunc(InBits); 1803 1804 // If any of the sign extended bits are demanded, we know that the sign 1805 // bit is demanded. Temporarily set this bit in the mask for our callee. 1806 if (NewBits.getBoolValue()) 1807 InMask |= InSignBit; 1808 1809 KnownZero.trunc(InBits); 1810 KnownOne.trunc(InBits); 1811 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1812 1813 // Note if the sign bit is known to be zero or one. 1814 bool SignBitKnownZero = KnownZero.isNegative(); 1815 bool SignBitKnownOne = KnownOne.isNegative(); 1816 assert(!(SignBitKnownZero && SignBitKnownOne) && 1817 "Sign bit can't be known to be both zero and one!"); 1818 1819 // If the sign bit wasn't actually demanded by our caller, we don't 1820 // want it set in the KnownZero and KnownOne result values. Reset the 1821 // mask and reapply it to the result values. 1822 InMask = Mask; 1823 InMask.trunc(InBits); 1824 KnownZero &= InMask; 1825 KnownOne &= InMask; 1826 1827 KnownZero.zext(BitWidth); 1828 KnownOne.zext(BitWidth); 1829 1830 // If the sign bit is known zero or one, the top bits match. 1831 if (SignBitKnownZero) 1832 KnownZero |= NewBits; 1833 else if (SignBitKnownOne) 1834 KnownOne |= NewBits; 1835 return; 1836 } 1837 case ISD::ANY_EXTEND: { 1838 EVT InVT = Op.getOperand(0).getValueType(); 1839 unsigned InBits = InVT.getSizeInBits(); 1840 APInt InMask = Mask; 1841 InMask.trunc(InBits); 1842 KnownZero.trunc(InBits); 1843 KnownOne.trunc(InBits); 1844 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1845 KnownZero.zext(BitWidth); 1846 KnownOne.zext(BitWidth); 1847 return; 1848 } 1849 case ISD::TRUNCATE: { 1850 EVT InVT = Op.getOperand(0).getValueType(); 1851 unsigned InBits = InVT.getSizeInBits(); 1852 APInt InMask = Mask; 1853 InMask.zext(InBits); 1854 KnownZero.zext(InBits); 1855 KnownOne.zext(InBits); 1856 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1857 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1858 KnownZero.trunc(BitWidth); 1859 KnownOne.trunc(BitWidth); 1860 break; 1861 } 1862 case ISD::AssertZext: { 1863 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1864 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1865 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1866 KnownOne, Depth+1); 1867 KnownZero |= (~InMask) & Mask; 1868 return; 1869 } 1870 case ISD::FGETSIGN: 1871 // All bits are zero except the low bit. 1872 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1873 return; 1874 1875 case ISD::SUB: { 1876 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1877 // We know that the top bits of C-X are clear if X contains less bits 1878 // than C (i.e. no wrap-around can happen). For example, 20-X is 1879 // positive if we can prove that X is >= 0 and < 16. 1880 if (CLHS->getAPIntValue().isNonNegative()) { 1881 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1882 // NLZ can't be BitWidth with no sign bit 1883 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1884 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1885 Depth+1); 1886 1887 // If all of the MaskV bits are known to be zero, then we know the 1888 // output top bits are zero, because we now know that the output is 1889 // from [0-C]. 1890 if ((KnownZero2 & MaskV) == MaskV) { 1891 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1892 // Top bits known zero. 1893 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1894 } 1895 } 1896 } 1897 } 1898 // fall through 1899 case ISD::ADD: { 1900 // Output known-0 bits are known if clear or set in both the low clear bits 1901 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1902 // low 3 bits clear. 1903 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1904 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1905 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1906 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1907 1908 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1909 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1910 KnownZeroOut = std::min(KnownZeroOut, 1911 KnownZero2.countTrailingOnes()); 1912 1913 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1914 return; 1915 } 1916 case ISD::SREM: 1917 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1918 const APInt &RA = Rem->getAPIntValue(); 1919 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1920 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1921 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1922 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1923 1924 // If the sign bit of the first operand is zero, the sign bit of 1925 // the result is zero. If the first operand has no one bits below 1926 // the second operand's single 1 bit, its sign will be zero. 1927 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1928 KnownZero2 |= ~LowBits; 1929 1930 KnownZero |= KnownZero2 & Mask; 1931 1932 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1933 } 1934 } 1935 return; 1936 case ISD::UREM: { 1937 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1938 const APInt &RA = Rem->getAPIntValue(); 1939 if (RA.isPowerOf2()) { 1940 APInt LowBits = (RA - 1); 1941 APInt Mask2 = LowBits & Mask; 1942 KnownZero |= ~LowBits & Mask; 1943 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1944 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1945 break; 1946 } 1947 } 1948 1949 // Since the result is less than or equal to either operand, any leading 1950 // zero bits in either operand must also exist in the result. 1951 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1952 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1953 Depth+1); 1954 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1955 Depth+1); 1956 1957 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1958 KnownZero2.countLeadingOnes()); 1959 KnownOne.clear(); 1960 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1961 return; 1962 } 1963 default: 1964 // Allow the target to implement this method for its nodes. 1965 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1966 case ISD::INTRINSIC_WO_CHAIN: 1967 case ISD::INTRINSIC_W_CHAIN: 1968 case ISD::INTRINSIC_VOID: 1969 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1970 Depth); 1971 } 1972 return; 1973 } 1974} 1975 1976/// ComputeNumSignBits - Return the number of times the sign bit of the 1977/// register is replicated into the other bits. We know that at least 1 bit 1978/// is always equal to the sign bit (itself), but other cases can give us 1979/// information. For example, immediately after an "SRA X, 2", we know that 1980/// the top 3 bits are all equal to each other, so we return 3. 1981unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1982 EVT VT = Op.getValueType(); 1983 assert(VT.isInteger() && "Invalid VT!"); 1984 unsigned VTBits = VT.getSizeInBits(); 1985 unsigned Tmp, Tmp2; 1986 unsigned FirstAnswer = 1; 1987 1988 if (Depth == 6) 1989 return 1; // Limit search depth. 1990 1991 switch (Op.getOpcode()) { 1992 default: break; 1993 case ISD::AssertSext: 1994 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1995 return VTBits-Tmp+1; 1996 case ISD::AssertZext: 1997 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1998 return VTBits-Tmp; 1999 2000 case ISD::Constant: { 2001 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2002 // If negative, return # leading ones. 2003 if (Val.isNegative()) 2004 return Val.countLeadingOnes(); 2005 2006 // Return # leading zeros. 2007 return Val.countLeadingZeros(); 2008 } 2009 2010 case ISD::SIGN_EXTEND: 2011 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 2012 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2013 2014 case ISD::SIGN_EXTEND_INREG: 2015 // Max of the input and what this extends. 2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2017 Tmp = VTBits-Tmp+1; 2018 2019 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2020 return std::max(Tmp, Tmp2); 2021 2022 case ISD::SRA: 2023 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2024 // SRA X, C -> adds C sign bits. 2025 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2026 Tmp += C->getZExtValue(); 2027 if (Tmp > VTBits) Tmp = VTBits; 2028 } 2029 return Tmp; 2030 case ISD::SHL: 2031 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2032 // shl destroys sign bits. 2033 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2034 if (C->getZExtValue() >= VTBits || // Bad shift. 2035 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2036 return Tmp - C->getZExtValue(); 2037 } 2038 break; 2039 case ISD::AND: 2040 case ISD::OR: 2041 case ISD::XOR: // NOT is handled here. 2042 // Logical binary ops preserve the number of sign bits at the worst. 2043 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2044 if (Tmp != 1) { 2045 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2046 FirstAnswer = std::min(Tmp, Tmp2); 2047 // We computed what we know about the sign bits as our first 2048 // answer. Now proceed to the generic code that uses 2049 // ComputeMaskedBits, and pick whichever answer is better. 2050 } 2051 break; 2052 2053 case ISD::SELECT: 2054 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2055 if (Tmp == 1) return 1; // Early out. 2056 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2057 return std::min(Tmp, Tmp2); 2058 2059 case ISD::SADDO: 2060 case ISD::UADDO: 2061 case ISD::SSUBO: 2062 case ISD::USUBO: 2063 case ISD::SMULO: 2064 case ISD::UMULO: 2065 if (Op.getResNo() != 1) 2066 break; 2067 // The boolean result conforms to getBooleanContents. Fall through. 2068 case ISD::SETCC: 2069 // If setcc returns 0/-1, all bits are sign bits. 2070 if (TLI.getBooleanContents() == 2071 TargetLowering::ZeroOrNegativeOneBooleanContent) 2072 return VTBits; 2073 break; 2074 case ISD::ROTL: 2075 case ISD::ROTR: 2076 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2077 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2078 2079 // Handle rotate right by N like a rotate left by 32-N. 2080 if (Op.getOpcode() == ISD::ROTR) 2081 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2082 2083 // If we aren't rotating out all of the known-in sign bits, return the 2084 // number that are left. This handles rotl(sext(x), 1) for example. 2085 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2086 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2087 } 2088 break; 2089 case ISD::ADD: 2090 // Add can have at most one carry bit. Thus we know that the output 2091 // is, at worst, one more bit than the inputs. 2092 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2093 if (Tmp == 1) return 1; // Early out. 2094 2095 // Special case decrementing a value (ADD X, -1): 2096 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2097 if (CRHS->isAllOnesValue()) { 2098 APInt KnownZero, KnownOne; 2099 APInt Mask = APInt::getAllOnesValue(VTBits); 2100 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2101 2102 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2103 // sign bits set. 2104 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2105 return VTBits; 2106 2107 // If we are subtracting one from a positive number, there is no carry 2108 // out of the result. 2109 if (KnownZero.isNegative()) 2110 return Tmp; 2111 } 2112 2113 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2114 if (Tmp2 == 1) return 1; 2115 return std::min(Tmp, Tmp2)-1; 2116 break; 2117 2118 case ISD::SUB: 2119 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2120 if (Tmp2 == 1) return 1; 2121 2122 // Handle NEG. 2123 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2124 if (CLHS->isNullValue()) { 2125 APInt KnownZero, KnownOne; 2126 APInt Mask = APInt::getAllOnesValue(VTBits); 2127 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2128 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2129 // sign bits set. 2130 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2131 return VTBits; 2132 2133 // If the input is known to be positive (the sign bit is known clear), 2134 // the output of the NEG has the same number of sign bits as the input. 2135 if (KnownZero.isNegative()) 2136 return Tmp2; 2137 2138 // Otherwise, we treat this like a SUB. 2139 } 2140 2141 // Sub can have at most one carry bit. Thus we know that the output 2142 // is, at worst, one more bit than the inputs. 2143 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2144 if (Tmp == 1) return 1; // Early out. 2145 return std::min(Tmp, Tmp2)-1; 2146 break; 2147 case ISD::TRUNCATE: 2148 // FIXME: it's tricky to do anything useful for this, but it is an important 2149 // case for targets like X86. 2150 break; 2151 } 2152 2153 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2154 if (Op.getOpcode() == ISD::LOAD) { 2155 LoadSDNode *LD = cast<LoadSDNode>(Op); 2156 unsigned ExtType = LD->getExtensionType(); 2157 switch (ExtType) { 2158 default: break; 2159 case ISD::SEXTLOAD: // '17' bits known 2160 Tmp = LD->getMemoryVT().getSizeInBits(); 2161 return VTBits-Tmp+1; 2162 case ISD::ZEXTLOAD: // '16' bits known 2163 Tmp = LD->getMemoryVT().getSizeInBits(); 2164 return VTBits-Tmp; 2165 } 2166 } 2167 2168 // Allow the target to implement this method for its nodes. 2169 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2170 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2171 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2172 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2173 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2174 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2175 } 2176 2177 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2178 // use this information. 2179 APInt KnownZero, KnownOne; 2180 APInt Mask = APInt::getAllOnesValue(VTBits); 2181 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2182 2183 if (KnownZero.isNegative()) { // sign bit is 0 2184 Mask = KnownZero; 2185 } else if (KnownOne.isNegative()) { // sign bit is 1; 2186 Mask = KnownOne; 2187 } else { 2188 // Nothing known. 2189 return FirstAnswer; 2190 } 2191 2192 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2193 // the number of identical bits in the top of the input value. 2194 Mask = ~Mask; 2195 Mask <<= Mask.getBitWidth()-VTBits; 2196 // Return # leading zeros. We use 'min' here in case Val was zero before 2197 // shifting. We don't want to return '64' as for an i32 "0". 2198 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2199} 2200 2201bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2202 // If we're told that NaNs won't happen, assume they won't. 2203 if (FiniteOnlyFPMath()) 2204 return true; 2205 2206 // If the value is a constant, we can obviously see if it is a NaN or not. 2207 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2208 return !C->getValueAPF().isNaN(); 2209 2210 // TODO: Recognize more cases here. 2211 2212 return false; 2213} 2214 2215bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2216 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2217 if (!GA) return false; 2218 if (GA->getOffset() != 0) return false; 2219 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2220 if (!GV) return false; 2221 MachineModuleInfo *MMI = getMachineModuleInfo(); 2222 return MMI && MMI->hasDebugInfo(); 2223} 2224 2225 2226/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2227/// element of the result of the vector shuffle. 2228SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2229 unsigned i) { 2230 EVT VT = N->getValueType(0); 2231 DebugLoc dl = N->getDebugLoc(); 2232 if (N->getMaskElt(i) < 0) 2233 return getUNDEF(VT.getVectorElementType()); 2234 unsigned Index = N->getMaskElt(i); 2235 unsigned NumElems = VT.getVectorNumElements(); 2236 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2237 Index %= NumElems; 2238 2239 if (V.getOpcode() == ISD::BIT_CONVERT) { 2240 V = V.getOperand(0); 2241 EVT VVT = V.getValueType(); 2242 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2243 return SDValue(); 2244 } 2245 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2246 return (Index == 0) ? V.getOperand(0) 2247 : getUNDEF(VT.getVectorElementType()); 2248 if (V.getOpcode() == ISD::BUILD_VECTOR) 2249 return V.getOperand(Index); 2250 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2251 return getShuffleScalarElt(SVN, Index); 2252 return SDValue(); 2253} 2254 2255 2256/// getNode - Gets or creates the specified node. 2257/// 2258SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2259 FoldingSetNodeID ID; 2260 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2261 void *IP = 0; 2262 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2263 return SDValue(E, 0); 2264 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2265 new (N) SDNode(Opcode, DL, getVTList(VT)); 2266 CSEMap.InsertNode(N, IP); 2267 2268 AllNodes.push_back(N); 2269#ifndef NDEBUG 2270 VerifyNode(N); 2271#endif 2272 return SDValue(N, 0); 2273} 2274 2275SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2276 EVT VT, SDValue Operand) { 2277 // Constant fold unary operations with an integer constant operand. 2278 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2279 const APInt &Val = C->getAPIntValue(); 2280 unsigned BitWidth = VT.getSizeInBits(); 2281 switch (Opcode) { 2282 default: break; 2283 case ISD::SIGN_EXTEND: 2284 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2285 case ISD::ANY_EXTEND: 2286 case ISD::ZERO_EXTEND: 2287 case ISD::TRUNCATE: 2288 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2289 case ISD::UINT_TO_FP: 2290 case ISD::SINT_TO_FP: { 2291 const uint64_t zero[] = {0, 0}; 2292 // No compile time operations on this type. 2293 if (VT==MVT::ppcf128) 2294 break; 2295 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2296 (void)apf.convertFromAPInt(Val, 2297 Opcode==ISD::SINT_TO_FP, 2298 APFloat::rmNearestTiesToEven); 2299 return getConstantFP(apf, VT); 2300 } 2301 case ISD::BIT_CONVERT: 2302 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2303 return getConstantFP(Val.bitsToFloat(), VT); 2304 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2305 return getConstantFP(Val.bitsToDouble(), VT); 2306 break; 2307 case ISD::BSWAP: 2308 return getConstant(Val.byteSwap(), VT); 2309 case ISD::CTPOP: 2310 return getConstant(Val.countPopulation(), VT); 2311 case ISD::CTLZ: 2312 return getConstant(Val.countLeadingZeros(), VT); 2313 case ISD::CTTZ: 2314 return getConstant(Val.countTrailingZeros(), VT); 2315 } 2316 } 2317 2318 // Constant fold unary operations with a floating point constant operand. 2319 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2320 APFloat V = C->getValueAPF(); // make copy 2321 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2322 switch (Opcode) { 2323 case ISD::FNEG: 2324 V.changeSign(); 2325 return getConstantFP(V, VT); 2326 case ISD::FABS: 2327 V.clearSign(); 2328 return getConstantFP(V, VT); 2329 case ISD::FP_ROUND: 2330 case ISD::FP_EXTEND: { 2331 bool ignored; 2332 // This can return overflow, underflow, or inexact; we don't care. 2333 // FIXME need to be more flexible about rounding mode. 2334 (void)V.convert(*EVTToAPFloatSemantics(VT), 2335 APFloat::rmNearestTiesToEven, &ignored); 2336 return getConstantFP(V, VT); 2337 } 2338 case ISD::FP_TO_SINT: 2339 case ISD::FP_TO_UINT: { 2340 integerPart x[2]; 2341 bool ignored; 2342 assert(integerPartWidth >= 64); 2343 // FIXME need to be more flexible about rounding mode. 2344 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2345 Opcode==ISD::FP_TO_SINT, 2346 APFloat::rmTowardZero, &ignored); 2347 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2348 break; 2349 APInt api(VT.getSizeInBits(), 2, x); 2350 return getConstant(api, VT); 2351 } 2352 case ISD::BIT_CONVERT: 2353 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2354 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2355 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2356 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2357 break; 2358 } 2359 } 2360 } 2361 2362 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2363 switch (Opcode) { 2364 case ISD::TokenFactor: 2365 case ISD::MERGE_VALUES: 2366 case ISD::CONCAT_VECTORS: 2367 return Operand; // Factor, merge or concat of one node? No need. 2368 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2369 case ISD::FP_EXTEND: 2370 assert(VT.isFloatingPoint() && 2371 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2372 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2373 if (Operand.getOpcode() == ISD::UNDEF) 2374 return getUNDEF(VT); 2375 break; 2376 case ISD::SIGN_EXTEND: 2377 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2378 "Invalid SIGN_EXTEND!"); 2379 if (Operand.getValueType() == VT) return Operand; // noop extension 2380 assert(Operand.getValueType().bitsLT(VT) 2381 && "Invalid sext node, dst < src!"); 2382 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2383 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2384 break; 2385 case ISD::ZERO_EXTEND: 2386 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2387 "Invalid ZERO_EXTEND!"); 2388 if (Operand.getValueType() == VT) return Operand; // noop extension 2389 assert(Operand.getValueType().bitsLT(VT) 2390 && "Invalid zext node, dst < src!"); 2391 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2392 return getNode(ISD::ZERO_EXTEND, DL, VT, 2393 Operand.getNode()->getOperand(0)); 2394 break; 2395 case ISD::ANY_EXTEND: 2396 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2397 "Invalid ANY_EXTEND!"); 2398 if (Operand.getValueType() == VT) return Operand; // noop extension 2399 assert(Operand.getValueType().bitsLT(VT) 2400 && "Invalid anyext node, dst < src!"); 2401 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2402 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2403 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2404 break; 2405 case ISD::TRUNCATE: 2406 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2407 "Invalid TRUNCATE!"); 2408 if (Operand.getValueType() == VT) return Operand; // noop truncate 2409 assert(Operand.getValueType().bitsGT(VT) 2410 && "Invalid truncate node, src < dst!"); 2411 if (OpOpcode == ISD::TRUNCATE) 2412 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2413 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2414 OpOpcode == ISD::ANY_EXTEND) { 2415 // If the source is smaller than the dest, we still need an extend. 2416 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2417 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2418 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2419 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2420 else 2421 return Operand.getNode()->getOperand(0); 2422 } 2423 break; 2424 case ISD::BIT_CONVERT: 2425 // Basic sanity checking. 2426 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2427 && "Cannot BIT_CONVERT between types of different sizes!"); 2428 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2429 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2430 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2431 if (OpOpcode == ISD::UNDEF) 2432 return getUNDEF(VT); 2433 break; 2434 case ISD::SCALAR_TO_VECTOR: 2435 assert(VT.isVector() && !Operand.getValueType().isVector() && 2436 (VT.getVectorElementType() == Operand.getValueType() || 2437 (VT.getVectorElementType().isInteger() && 2438 Operand.getValueType().isInteger() && 2439 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2440 "Illegal SCALAR_TO_VECTOR node!"); 2441 if (OpOpcode == ISD::UNDEF) 2442 return getUNDEF(VT); 2443 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2444 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2445 isa<ConstantSDNode>(Operand.getOperand(1)) && 2446 Operand.getConstantOperandVal(1) == 0 && 2447 Operand.getOperand(0).getValueType() == VT) 2448 return Operand.getOperand(0); 2449 break; 2450 case ISD::FNEG: 2451 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2452 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2453 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2454 Operand.getNode()->getOperand(0)); 2455 if (OpOpcode == ISD::FNEG) // --X -> X 2456 return Operand.getNode()->getOperand(0); 2457 break; 2458 case ISD::FABS: 2459 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2460 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2461 break; 2462 } 2463 2464 SDNode *N; 2465 SDVTList VTs = getVTList(VT); 2466 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2467 FoldingSetNodeID ID; 2468 SDValue Ops[1] = { Operand }; 2469 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2470 void *IP = 0; 2471 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2472 return SDValue(E, 0); 2473 N = NodeAllocator.Allocate<UnarySDNode>(); 2474 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2475 CSEMap.InsertNode(N, IP); 2476 } else { 2477 N = NodeAllocator.Allocate<UnarySDNode>(); 2478 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2479 } 2480 2481 AllNodes.push_back(N); 2482#ifndef NDEBUG 2483 VerifyNode(N); 2484#endif 2485 return SDValue(N, 0); 2486} 2487 2488SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2489 EVT VT, 2490 ConstantSDNode *Cst1, 2491 ConstantSDNode *Cst2) { 2492 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2493 2494 switch (Opcode) { 2495 case ISD::ADD: return getConstant(C1 + C2, VT); 2496 case ISD::SUB: return getConstant(C1 - C2, VT); 2497 case ISD::MUL: return getConstant(C1 * C2, VT); 2498 case ISD::UDIV: 2499 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2500 break; 2501 case ISD::UREM: 2502 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2503 break; 2504 case ISD::SDIV: 2505 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2506 break; 2507 case ISD::SREM: 2508 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2509 break; 2510 case ISD::AND: return getConstant(C1 & C2, VT); 2511 case ISD::OR: return getConstant(C1 | C2, VT); 2512 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2513 case ISD::SHL: return getConstant(C1 << C2, VT); 2514 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2515 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2516 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2517 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2518 default: break; 2519 } 2520 2521 return SDValue(); 2522} 2523 2524SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2525 SDValue N1, SDValue N2) { 2526 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2527 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2528 switch (Opcode) { 2529 default: break; 2530 case ISD::TokenFactor: 2531 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2532 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2533 // Fold trivial token factors. 2534 if (N1.getOpcode() == ISD::EntryToken) return N2; 2535 if (N2.getOpcode() == ISD::EntryToken) return N1; 2536 if (N1 == N2) return N1; 2537 break; 2538 case ISD::CONCAT_VECTORS: 2539 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2540 // one big BUILD_VECTOR. 2541 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2542 N2.getOpcode() == ISD::BUILD_VECTOR) { 2543 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2544 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2545 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2546 } 2547 break; 2548 case ISD::AND: 2549 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2550 N1.getValueType() == VT && "Binary operator types must match!"); 2551 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2552 // worth handling here. 2553 if (N2C && N2C->isNullValue()) 2554 return N2; 2555 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2556 return N1; 2557 break; 2558 case ISD::OR: 2559 case ISD::XOR: 2560 case ISD::ADD: 2561 case ISD::SUB: 2562 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2563 N1.getValueType() == VT && "Binary operator types must match!"); 2564 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2565 // it's worth handling here. 2566 if (N2C && N2C->isNullValue()) 2567 return N1; 2568 break; 2569 case ISD::UDIV: 2570 case ISD::UREM: 2571 case ISD::MULHU: 2572 case ISD::MULHS: 2573 case ISD::MUL: 2574 case ISD::SDIV: 2575 case ISD::SREM: 2576 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2577 // fall through 2578 case ISD::FADD: 2579 case ISD::FSUB: 2580 case ISD::FMUL: 2581 case ISD::FDIV: 2582 case ISD::FREM: 2583 if (UnsafeFPMath) { 2584 if (Opcode == ISD::FADD) { 2585 // 0+x --> x 2586 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2587 if (CFP->getValueAPF().isZero()) 2588 return N2; 2589 // x+0 --> x 2590 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2591 if (CFP->getValueAPF().isZero()) 2592 return N1; 2593 } else if (Opcode == ISD::FSUB) { 2594 // x-0 --> x 2595 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2596 if (CFP->getValueAPF().isZero()) 2597 return N1; 2598 } 2599 } 2600 assert(N1.getValueType() == N2.getValueType() && 2601 N1.getValueType() == VT && "Binary operator types must match!"); 2602 break; 2603 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2604 assert(N1.getValueType() == VT && 2605 N1.getValueType().isFloatingPoint() && 2606 N2.getValueType().isFloatingPoint() && 2607 "Invalid FCOPYSIGN!"); 2608 break; 2609 case ISD::SHL: 2610 case ISD::SRA: 2611 case ISD::SRL: 2612 case ISD::ROTL: 2613 case ISD::ROTR: 2614 assert(VT == N1.getValueType() && 2615 "Shift operators return type must be the same as their first arg"); 2616 assert(VT.isInteger() && N2.getValueType().isInteger() && 2617 "Shifts only work on integers"); 2618 2619 // Always fold shifts of i1 values so the code generator doesn't need to 2620 // handle them. Since we know the size of the shift has to be less than the 2621 // size of the value, the shift/rotate count is guaranteed to be zero. 2622 if (VT == MVT::i1) 2623 return N1; 2624 break; 2625 case ISD::FP_ROUND_INREG: { 2626 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2627 assert(VT == N1.getValueType() && "Not an inreg round!"); 2628 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2629 "Cannot FP_ROUND_INREG integer types"); 2630 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2631 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2632 break; 2633 } 2634 case ISD::FP_ROUND: 2635 assert(VT.isFloatingPoint() && 2636 N1.getValueType().isFloatingPoint() && 2637 VT.bitsLE(N1.getValueType()) && 2638 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2639 if (N1.getValueType() == VT) return N1; // noop conversion. 2640 break; 2641 case ISD::AssertSext: 2642 case ISD::AssertZext: { 2643 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2644 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2645 assert(VT.isInteger() && EVT.isInteger() && 2646 "Cannot *_EXTEND_INREG FP types"); 2647 assert(EVT.bitsLE(VT) && "Not extending!"); 2648 if (VT == EVT) return N1; // noop assertion. 2649 break; 2650 } 2651 case ISD::SIGN_EXTEND_INREG: { 2652 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2653 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2654 assert(VT.isInteger() && EVT.isInteger() && 2655 "Cannot *_EXTEND_INREG FP types"); 2656 assert(EVT.bitsLE(VT) && "Not extending!"); 2657 if (EVT == VT) return N1; // Not actually extending 2658 2659 if (N1C) { 2660 APInt Val = N1C->getAPIntValue(); 2661 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2662 Val <<= Val.getBitWidth()-FromBits; 2663 Val = Val.ashr(Val.getBitWidth()-FromBits); 2664 return getConstant(Val, VT); 2665 } 2666 break; 2667 } 2668 case ISD::EXTRACT_VECTOR_ELT: 2669 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2670 if (N1.getOpcode() == ISD::UNDEF) 2671 return getUNDEF(VT); 2672 2673 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2674 // expanding copies of large vectors from registers. 2675 if (N2C && 2676 N1.getOpcode() == ISD::CONCAT_VECTORS && 2677 N1.getNumOperands() > 0) { 2678 unsigned Factor = 2679 N1.getOperand(0).getValueType().getVectorNumElements(); 2680 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2681 N1.getOperand(N2C->getZExtValue() / Factor), 2682 getConstant(N2C->getZExtValue() % Factor, 2683 N2.getValueType())); 2684 } 2685 2686 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2687 // expanding large vector constants. 2688 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2689 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2690 EVT VEltTy = N1.getValueType().getVectorElementType(); 2691 if (Elt.getValueType() != VEltTy) { 2692 // If the vector element type is not legal, the BUILD_VECTOR operands 2693 // are promoted and implicitly truncated. Make that explicit here. 2694 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2695 } 2696 if (VT != VEltTy) { 2697 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2698 // result is implicitly extended. 2699 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2700 } 2701 return Elt; 2702 } 2703 2704 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2705 // operations are lowered to scalars. 2706 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2707 // If the indices are the same, return the inserted element. 2708 if (N1.getOperand(2) == N2) 2709 return N1.getOperand(1); 2710 // If the indices are known different, extract the element from 2711 // the original vector. 2712 else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2713 isa<ConstantSDNode>(N2)) 2714 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2715 } 2716 break; 2717 case ISD::EXTRACT_ELEMENT: 2718 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2719 assert(!N1.getValueType().isVector() && !VT.isVector() && 2720 (N1.getValueType().isInteger() == VT.isInteger()) && 2721 "Wrong types for EXTRACT_ELEMENT!"); 2722 2723 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2724 // 64-bit integers into 32-bit parts. Instead of building the extract of 2725 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2726 if (N1.getOpcode() == ISD::BUILD_PAIR) 2727 return N1.getOperand(N2C->getZExtValue()); 2728 2729 // EXTRACT_ELEMENT of a constant int is also very common. 2730 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2731 unsigned ElementSize = VT.getSizeInBits(); 2732 unsigned Shift = ElementSize * N2C->getZExtValue(); 2733 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2734 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2735 } 2736 break; 2737 case ISD::EXTRACT_SUBVECTOR: 2738 if (N1.getValueType() == VT) // Trivial extraction. 2739 return N1; 2740 break; 2741 } 2742 2743 if (N1C) { 2744 if (N2C) { 2745 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2746 if (SV.getNode()) return SV; 2747 } else { // Cannonicalize constant to RHS if commutative 2748 if (isCommutativeBinOp(Opcode)) { 2749 std::swap(N1C, N2C); 2750 std::swap(N1, N2); 2751 } 2752 } 2753 } 2754 2755 // Constant fold FP operations. 2756 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2757 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2758 if (N1CFP) { 2759 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2760 // Cannonicalize constant to RHS if commutative 2761 std::swap(N1CFP, N2CFP); 2762 std::swap(N1, N2); 2763 } else if (N2CFP && VT != MVT::ppcf128) { 2764 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2765 APFloat::opStatus s; 2766 switch (Opcode) { 2767 case ISD::FADD: 2768 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2769 if (s != APFloat::opInvalidOp) 2770 return getConstantFP(V1, VT); 2771 break; 2772 case ISD::FSUB: 2773 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2774 if (s!=APFloat::opInvalidOp) 2775 return getConstantFP(V1, VT); 2776 break; 2777 case ISD::FMUL: 2778 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2779 if (s!=APFloat::opInvalidOp) 2780 return getConstantFP(V1, VT); 2781 break; 2782 case ISD::FDIV: 2783 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2784 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2785 return getConstantFP(V1, VT); 2786 break; 2787 case ISD::FREM : 2788 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2789 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2790 return getConstantFP(V1, VT); 2791 break; 2792 case ISD::FCOPYSIGN: 2793 V1.copySign(V2); 2794 return getConstantFP(V1, VT); 2795 default: break; 2796 } 2797 } 2798 } 2799 2800 // Canonicalize an UNDEF to the RHS, even over a constant. 2801 if (N1.getOpcode() == ISD::UNDEF) { 2802 if (isCommutativeBinOp(Opcode)) { 2803 std::swap(N1, N2); 2804 } else { 2805 switch (Opcode) { 2806 case ISD::FP_ROUND_INREG: 2807 case ISD::SIGN_EXTEND_INREG: 2808 case ISD::SUB: 2809 case ISD::FSUB: 2810 case ISD::FDIV: 2811 case ISD::FREM: 2812 case ISD::SRA: 2813 return N1; // fold op(undef, arg2) -> undef 2814 case ISD::UDIV: 2815 case ISD::SDIV: 2816 case ISD::UREM: 2817 case ISD::SREM: 2818 case ISD::SRL: 2819 case ISD::SHL: 2820 if (!VT.isVector()) 2821 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2822 // For vectors, we can't easily build an all zero vector, just return 2823 // the LHS. 2824 return N2; 2825 } 2826 } 2827 } 2828 2829 // Fold a bunch of operators when the RHS is undef. 2830 if (N2.getOpcode() == ISD::UNDEF) { 2831 switch (Opcode) { 2832 case ISD::XOR: 2833 if (N1.getOpcode() == ISD::UNDEF) 2834 // Handle undef ^ undef -> 0 special case. This is a common 2835 // idiom (misuse). 2836 return getConstant(0, VT); 2837 // fallthrough 2838 case ISD::ADD: 2839 case ISD::ADDC: 2840 case ISD::ADDE: 2841 case ISD::SUB: 2842 case ISD::UDIV: 2843 case ISD::SDIV: 2844 case ISD::UREM: 2845 case ISD::SREM: 2846 return N2; // fold op(arg1, undef) -> undef 2847 case ISD::FADD: 2848 case ISD::FSUB: 2849 case ISD::FMUL: 2850 case ISD::FDIV: 2851 case ISD::FREM: 2852 if (UnsafeFPMath) 2853 return N2; 2854 break; 2855 case ISD::MUL: 2856 case ISD::AND: 2857 case ISD::SRL: 2858 case ISD::SHL: 2859 if (!VT.isVector()) 2860 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2861 // For vectors, we can't easily build an all zero vector, just return 2862 // the LHS. 2863 return N1; 2864 case ISD::OR: 2865 if (!VT.isVector()) 2866 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2867 // For vectors, we can't easily build an all one vector, just return 2868 // the LHS. 2869 return N1; 2870 case ISD::SRA: 2871 return N1; 2872 } 2873 } 2874 2875 // Memoize this node if possible. 2876 SDNode *N; 2877 SDVTList VTs = getVTList(VT); 2878 if (VT != MVT::Flag) { 2879 SDValue Ops[] = { N1, N2 }; 2880 FoldingSetNodeID ID; 2881 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2882 void *IP = 0; 2883 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2884 return SDValue(E, 0); 2885 N = NodeAllocator.Allocate<BinarySDNode>(); 2886 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2887 CSEMap.InsertNode(N, IP); 2888 } else { 2889 N = NodeAllocator.Allocate<BinarySDNode>(); 2890 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2891 } 2892 2893 AllNodes.push_back(N); 2894#ifndef NDEBUG 2895 VerifyNode(N); 2896#endif 2897 return SDValue(N, 0); 2898} 2899 2900SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2901 SDValue N1, SDValue N2, SDValue N3) { 2902 // Perform various simplifications. 2903 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2904 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2905 switch (Opcode) { 2906 case ISD::CONCAT_VECTORS: 2907 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2908 // one big BUILD_VECTOR. 2909 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2910 N2.getOpcode() == ISD::BUILD_VECTOR && 2911 N3.getOpcode() == ISD::BUILD_VECTOR) { 2912 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2913 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2914 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2915 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2916 } 2917 break; 2918 case ISD::SETCC: { 2919 // Use FoldSetCC to simplify SETCC's. 2920 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 2921 if (Simp.getNode()) return Simp; 2922 break; 2923 } 2924 case ISD::SELECT: 2925 if (N1C) { 2926 if (N1C->getZExtValue()) 2927 return N2; // select true, X, Y -> X 2928 else 2929 return N3; // select false, X, Y -> Y 2930 } 2931 2932 if (N2 == N3) return N2; // select C, X, X -> X 2933 break; 2934 case ISD::BRCOND: 2935 if (N2C) { 2936 if (N2C->getZExtValue()) // Unconditional branch 2937 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 2938 else 2939 return N1; // Never-taken branch 2940 } 2941 break; 2942 case ISD::VECTOR_SHUFFLE: 2943 llvm_unreachable("should use getVectorShuffle constructor!"); 2944 break; 2945 case ISD::BIT_CONVERT: 2946 // Fold bit_convert nodes from a type to themselves. 2947 if (N1.getValueType() == VT) 2948 return N1; 2949 break; 2950 } 2951 2952 // Memoize node if it doesn't produce a flag. 2953 SDNode *N; 2954 SDVTList VTs = getVTList(VT); 2955 if (VT != MVT::Flag) { 2956 SDValue Ops[] = { N1, N2, N3 }; 2957 FoldingSetNodeID ID; 2958 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2959 void *IP = 0; 2960 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2961 return SDValue(E, 0); 2962 N = NodeAllocator.Allocate<TernarySDNode>(); 2963 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2964 CSEMap.InsertNode(N, IP); 2965 } else { 2966 N = NodeAllocator.Allocate<TernarySDNode>(); 2967 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2968 } 2969 AllNodes.push_back(N); 2970#ifndef NDEBUG 2971 VerifyNode(N); 2972#endif 2973 return SDValue(N, 0); 2974} 2975 2976SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2977 SDValue N1, SDValue N2, SDValue N3, 2978 SDValue N4) { 2979 SDValue Ops[] = { N1, N2, N3, N4 }; 2980 return getNode(Opcode, DL, VT, Ops, 4); 2981} 2982 2983SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2984 SDValue N1, SDValue N2, SDValue N3, 2985 SDValue N4, SDValue N5) { 2986 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2987 return getNode(Opcode, DL, VT, Ops, 5); 2988} 2989 2990/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 2991/// the incoming stack arguments to be loaded from the stack. 2992SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 2993 SmallVector<SDValue, 8> ArgChains; 2994 2995 // Include the original chain at the beginning of the list. When this is 2996 // used by target LowerCall hooks, this helps legalize find the 2997 // CALLSEQ_BEGIN node. 2998 ArgChains.push_back(Chain); 2999 3000 // Add a chain value for each stack argument. 3001 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3002 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3003 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3004 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3005 if (FI->getIndex() < 0) 3006 ArgChains.push_back(SDValue(L, 1)); 3007 3008 // Build a tokenfactor for all the chains. 3009 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3010 &ArgChains[0], ArgChains.size()); 3011} 3012 3013/// getMemsetValue - Vectorized representation of the memset value 3014/// operand. 3015static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3016 DebugLoc dl) { 3017 unsigned NumBits = VT.isVector() ? 3018 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 3019 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3020 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3021 unsigned Shift = 8; 3022 for (unsigned i = NumBits; i > 8; i >>= 1) { 3023 Val = (Val << Shift) | Val; 3024 Shift <<= 1; 3025 } 3026 if (VT.isInteger()) 3027 return DAG.getConstant(Val, VT); 3028 return DAG.getConstantFP(APFloat(Val), VT); 3029 } 3030 3031 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3032 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3033 unsigned Shift = 8; 3034 for (unsigned i = NumBits; i > 8; i >>= 1) { 3035 Value = DAG.getNode(ISD::OR, dl, VT, 3036 DAG.getNode(ISD::SHL, dl, VT, Value, 3037 DAG.getConstant(Shift, 3038 TLI.getShiftAmountTy())), 3039 Value); 3040 Shift <<= 1; 3041 } 3042 3043 return Value; 3044} 3045 3046/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3047/// used when a memcpy is turned into a memset when the source is a constant 3048/// string ptr. 3049static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3050 const TargetLowering &TLI, 3051 std::string &Str, unsigned Offset) { 3052 // Handle vector with all elements zero. 3053 if (Str.empty()) { 3054 if (VT.isInteger()) 3055 return DAG.getConstant(0, VT); 3056 unsigned NumElts = VT.getVectorNumElements(); 3057 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3058 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3059 DAG.getConstant(0, 3060 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts))); 3061 } 3062 3063 assert(!VT.isVector() && "Can't handle vector type here!"); 3064 unsigned NumBits = VT.getSizeInBits(); 3065 unsigned MSB = NumBits / 8; 3066 uint64_t Val = 0; 3067 if (TLI.isLittleEndian()) 3068 Offset = Offset + MSB - 1; 3069 for (unsigned i = 0; i != MSB; ++i) { 3070 Val = (Val << 8) | (unsigned char)Str[Offset]; 3071 Offset += TLI.isLittleEndian() ? -1 : 1; 3072 } 3073 return DAG.getConstant(Val, VT); 3074} 3075 3076/// getMemBasePlusOffset - Returns base and offset node for the 3077/// 3078static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3079 SelectionDAG &DAG) { 3080 EVT VT = Base.getValueType(); 3081 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3082 VT, Base, DAG.getConstant(Offset, VT)); 3083} 3084 3085/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3086/// 3087static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3088 unsigned SrcDelta = 0; 3089 GlobalAddressSDNode *G = NULL; 3090 if (Src.getOpcode() == ISD::GlobalAddress) 3091 G = cast<GlobalAddressSDNode>(Src); 3092 else if (Src.getOpcode() == ISD::ADD && 3093 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3094 Src.getOperand(1).getOpcode() == ISD::Constant) { 3095 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3096 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3097 } 3098 if (!G) 3099 return false; 3100 3101 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3102 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3103 return true; 3104 3105 return false; 3106} 3107 3108/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3109/// to replace the memset / memcpy is below the threshold. It also returns the 3110/// types of the sequence of memory ops to perform memset / memcpy. 3111static 3112bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps, 3113 SDValue Dst, SDValue Src, 3114 unsigned Limit, uint64_t Size, unsigned &Align, 3115 std::string &Str, bool &isSrcStr, 3116 SelectionDAG &DAG, 3117 const TargetLowering &TLI) { 3118 isSrcStr = isMemSrcFromString(Src, Str); 3119 bool isSrcConst = isa<ConstantSDNode>(Src); 3120 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); 3121 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT); 3122 if (VT != MVT::iAny) { 3123 const Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3124 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3125 // If source is a string constant, this will require an unaligned load. 3126 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3127 if (Dst.getOpcode() != ISD::FrameIndex) { 3128 // Can't change destination alignment. It requires a unaligned store. 3129 if (AllowUnalign) 3130 VT = MVT::iAny; 3131 } else { 3132 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3133 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3134 if (MFI->isFixedObjectIndex(FI)) { 3135 // Can't change destination alignment. It requires a unaligned store. 3136 if (AllowUnalign) 3137 VT = MVT::iAny; 3138 } else { 3139 // Give the stack frame object a larger alignment if needed. 3140 if (MFI->getObjectAlignment(FI) < NewAlign) 3141 MFI->setObjectAlignment(FI, NewAlign); 3142 Align = NewAlign; 3143 } 3144 } 3145 } 3146 } 3147 3148 if (VT == MVT::iAny) { 3149 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) { 3150 VT = MVT::i64; 3151 } else { 3152 switch (Align & 7) { 3153 case 0: VT = MVT::i64; break; 3154 case 4: VT = MVT::i32; break; 3155 case 2: VT = MVT::i16; break; 3156 default: VT = MVT::i8; break; 3157 } 3158 } 3159 3160 MVT LVT = MVT::i64; 3161 while (!TLI.isTypeLegal(LVT)) 3162 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3163 assert(LVT.isInteger()); 3164 3165 if (VT.bitsGT(LVT)) 3166 VT = LVT; 3167 } 3168 3169 unsigned NumMemOps = 0; 3170 while (Size != 0) { 3171 unsigned VTSize = VT.getSizeInBits() / 8; 3172 while (VTSize > Size) { 3173 // For now, only use non-vector load / store's for the left-over pieces. 3174 if (VT.isVector()) { 3175 VT = MVT::i64; 3176 while (!TLI.isTypeLegal(VT)) 3177 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3178 VTSize = VT.getSizeInBits() / 8; 3179 } else { 3180 // This can result in a type that is not legal on the target, e.g. 3181 // 1 or 2 bytes on PPC. 3182 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3183 VTSize >>= 1; 3184 } 3185 } 3186 3187 if (++NumMemOps > Limit) 3188 return false; 3189 MemOps.push_back(VT); 3190 Size -= VTSize; 3191 } 3192 3193 return true; 3194} 3195 3196static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3197 SDValue Chain, SDValue Dst, 3198 SDValue Src, uint64_t Size, 3199 unsigned Align, bool AlwaysInline, 3200 const Value *DstSV, uint64_t DstSVOff, 3201 const Value *SrcSV, uint64_t SrcSVOff){ 3202 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3203 3204 // Expand memcpy to a series of load and store ops if the size operand falls 3205 // below a certain threshold. 3206 std::vector<EVT> MemOps; 3207 uint64_t Limit = -1ULL; 3208 if (!AlwaysInline) 3209 Limit = TLI.getMaxStoresPerMemcpy(); 3210 unsigned DstAlign = Align; // Destination alignment can change. 3211 std::string Str; 3212 bool CopyFromStr; 3213 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3214 Str, CopyFromStr, DAG, TLI)) 3215 return SDValue(); 3216 3217 3218 bool isZeroStr = CopyFromStr && Str.empty(); 3219 SmallVector<SDValue, 8> OutChains; 3220 unsigned NumMemOps = MemOps.size(); 3221 uint64_t SrcOff = 0, DstOff = 0; 3222 for (unsigned i = 0; i < NumMemOps; i++) { 3223 EVT VT = MemOps[i]; 3224 unsigned VTSize = VT.getSizeInBits() / 8; 3225 SDValue Value, Store; 3226 3227 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3228 // It's unlikely a store of a vector immediate can be done in a single 3229 // instruction. It would require a load from a constantpool first. 3230 // We also handle store a vector with all zero's. 3231 // FIXME: Handle other cases where store of vector immediate is done in 3232 // a single instruction. 3233 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3234 Store = DAG.getStore(Chain, dl, Value, 3235 getMemBasePlusOffset(Dst, DstOff, DAG), 3236 DstSV, DstSVOff + DstOff, false, DstAlign); 3237 } else { 3238 // The type might not be legal for the target. This should only happen 3239 // if the type is smaller than a legal type, as on PPC, so the right 3240 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3241 // to Load/Store if NVT==VT. 3242 // FIXME does the case above also need this? 3243 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3244 assert(NVT.bitsGE(VT)); 3245 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3246 getMemBasePlusOffset(Src, SrcOff, DAG), 3247 SrcSV, SrcSVOff + SrcOff, VT, false, Align); 3248 Store = DAG.getTruncStore(Chain, dl, Value, 3249 getMemBasePlusOffset(Dst, DstOff, DAG), 3250 DstSV, DstSVOff + DstOff, VT, false, DstAlign); 3251 } 3252 OutChains.push_back(Store); 3253 SrcOff += VTSize; 3254 DstOff += VTSize; 3255 } 3256 3257 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3258 &OutChains[0], OutChains.size()); 3259} 3260 3261static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3262 SDValue Chain, SDValue Dst, 3263 SDValue Src, uint64_t Size, 3264 unsigned Align, bool AlwaysInline, 3265 const Value *DstSV, uint64_t DstSVOff, 3266 const Value *SrcSV, uint64_t SrcSVOff){ 3267 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3268 3269 // Expand memmove to a series of load and store ops if the size operand falls 3270 // below a certain threshold. 3271 std::vector<EVT> MemOps; 3272 uint64_t Limit = -1ULL; 3273 if (!AlwaysInline) 3274 Limit = TLI.getMaxStoresPerMemmove(); 3275 unsigned DstAlign = Align; // Destination alignment can change. 3276 std::string Str; 3277 bool CopyFromStr; 3278 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3279 Str, CopyFromStr, DAG, TLI)) 3280 return SDValue(); 3281 3282 uint64_t SrcOff = 0, DstOff = 0; 3283 3284 SmallVector<SDValue, 8> LoadValues; 3285 SmallVector<SDValue, 8> LoadChains; 3286 SmallVector<SDValue, 8> OutChains; 3287 unsigned NumMemOps = MemOps.size(); 3288 for (unsigned i = 0; i < NumMemOps; i++) { 3289 EVT VT = MemOps[i]; 3290 unsigned VTSize = VT.getSizeInBits() / 8; 3291 SDValue Value, Store; 3292 3293 Value = DAG.getLoad(VT, dl, Chain, 3294 getMemBasePlusOffset(Src, SrcOff, DAG), 3295 SrcSV, SrcSVOff + SrcOff, false, Align); 3296 LoadValues.push_back(Value); 3297 LoadChains.push_back(Value.getValue(1)); 3298 SrcOff += VTSize; 3299 } 3300 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3301 &LoadChains[0], LoadChains.size()); 3302 OutChains.clear(); 3303 for (unsigned i = 0; i < NumMemOps; i++) { 3304 EVT VT = MemOps[i]; 3305 unsigned VTSize = VT.getSizeInBits() / 8; 3306 SDValue Value, Store; 3307 3308 Store = DAG.getStore(Chain, dl, LoadValues[i], 3309 getMemBasePlusOffset(Dst, DstOff, DAG), 3310 DstSV, DstSVOff + DstOff, false, DstAlign); 3311 OutChains.push_back(Store); 3312 DstOff += VTSize; 3313 } 3314 3315 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3316 &OutChains[0], OutChains.size()); 3317} 3318 3319static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3320 SDValue Chain, SDValue Dst, 3321 SDValue Src, uint64_t Size, 3322 unsigned Align, 3323 const Value *DstSV, uint64_t DstSVOff) { 3324 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3325 3326 // Expand memset to a series of load/store ops if the size operand 3327 // falls below a certain threshold. 3328 std::vector<EVT> MemOps; 3329 std::string Str; 3330 bool CopyFromStr; 3331 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3332 Size, Align, Str, CopyFromStr, DAG, TLI)) 3333 return SDValue(); 3334 3335 SmallVector<SDValue, 8> OutChains; 3336 uint64_t DstOff = 0; 3337 3338 unsigned NumMemOps = MemOps.size(); 3339 for (unsigned i = 0; i < NumMemOps; i++) { 3340 EVT VT = MemOps[i]; 3341 unsigned VTSize = VT.getSizeInBits() / 8; 3342 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3343 SDValue Store = DAG.getStore(Chain, dl, Value, 3344 getMemBasePlusOffset(Dst, DstOff, DAG), 3345 DstSV, DstSVOff + DstOff); 3346 OutChains.push_back(Store); 3347 DstOff += VTSize; 3348 } 3349 3350 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3351 &OutChains[0], OutChains.size()); 3352} 3353 3354SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3355 SDValue Src, SDValue Size, 3356 unsigned Align, bool AlwaysInline, 3357 const Value *DstSV, uint64_t DstSVOff, 3358 const Value *SrcSV, uint64_t SrcSVOff) { 3359 3360 // Check to see if we should lower the memcpy to loads and stores first. 3361 // For cases within the target-specified limits, this is the best choice. 3362 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3363 if (ConstantSize) { 3364 // Memcpy with size zero? Just return the original chain. 3365 if (ConstantSize->isNullValue()) 3366 return Chain; 3367 3368 SDValue Result = 3369 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3370 ConstantSize->getZExtValue(), 3371 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3372 if (Result.getNode()) 3373 return Result; 3374 } 3375 3376 // Then check to see if we should lower the memcpy with target-specific 3377 // code. If the target chooses to do this, this is the next best. 3378 SDValue Result = 3379 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3380 AlwaysInline, 3381 DstSV, DstSVOff, SrcSV, SrcSVOff); 3382 if (Result.getNode()) 3383 return Result; 3384 3385 // If we really need inline code and the target declined to provide it, 3386 // use a (potentially long) sequence of loads and stores. 3387 if (AlwaysInline) { 3388 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3389 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3390 ConstantSize->getZExtValue(), Align, true, 3391 DstSV, DstSVOff, SrcSV, SrcSVOff); 3392 } 3393 3394 // Emit a library call. 3395 TargetLowering::ArgListTy Args; 3396 TargetLowering::ArgListEntry Entry; 3397 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3398 Entry.Node = Dst; Args.push_back(Entry); 3399 Entry.Node = Src; Args.push_back(Entry); 3400 Entry.Node = Size; Args.push_back(Entry); 3401 // FIXME: pass in DebugLoc 3402 std::pair<SDValue,SDValue> CallResult = 3403 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3404 false, false, false, false, 0, 3405 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3406 /*isReturnValueUsed=*/false, 3407 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3408 TLI.getPointerTy()), 3409 Args, *this, dl); 3410 return CallResult.second; 3411} 3412 3413SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3414 SDValue Src, SDValue Size, 3415 unsigned Align, 3416 const Value *DstSV, uint64_t DstSVOff, 3417 const Value *SrcSV, uint64_t SrcSVOff) { 3418 3419 // Check to see if we should lower the memmove to loads and stores first. 3420 // For cases within the target-specified limits, this is the best choice. 3421 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3422 if (ConstantSize) { 3423 // Memmove with size zero? Just return the original chain. 3424 if (ConstantSize->isNullValue()) 3425 return Chain; 3426 3427 SDValue Result = 3428 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3429 ConstantSize->getZExtValue(), 3430 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3431 if (Result.getNode()) 3432 return Result; 3433 } 3434 3435 // Then check to see if we should lower the memmove with target-specific 3436 // code. If the target chooses to do this, this is the next best. 3437 SDValue Result = 3438 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, 3439 DstSV, DstSVOff, SrcSV, SrcSVOff); 3440 if (Result.getNode()) 3441 return Result; 3442 3443 // Emit a library call. 3444 TargetLowering::ArgListTy Args; 3445 TargetLowering::ArgListEntry Entry; 3446 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3447 Entry.Node = Dst; Args.push_back(Entry); 3448 Entry.Node = Src; Args.push_back(Entry); 3449 Entry.Node = Size; Args.push_back(Entry); 3450 // FIXME: pass in DebugLoc 3451 std::pair<SDValue,SDValue> CallResult = 3452 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3453 false, false, false, false, 0, 3454 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3455 /*isReturnValueUsed=*/false, 3456 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3457 TLI.getPointerTy()), 3458 Args, *this, dl); 3459 return CallResult.second; 3460} 3461 3462SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3463 SDValue Src, SDValue Size, 3464 unsigned Align, 3465 const Value *DstSV, uint64_t DstSVOff) { 3466 3467 // Check to see if we should lower the memset to stores first. 3468 // For cases within the target-specified limits, this is the best choice. 3469 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3470 if (ConstantSize) { 3471 // Memset with size zero? Just return the original chain. 3472 if (ConstantSize->isNullValue()) 3473 return Chain; 3474 3475 SDValue Result = 3476 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3477 Align, DstSV, DstSVOff); 3478 if (Result.getNode()) 3479 return Result; 3480 } 3481 3482 // Then check to see if we should lower the memset with target-specific 3483 // code. If the target chooses to do this, this is the next best. 3484 SDValue Result = 3485 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, 3486 DstSV, DstSVOff); 3487 if (Result.getNode()) 3488 return Result; 3489 3490 // Emit a library call. 3491 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3492 TargetLowering::ArgListTy Args; 3493 TargetLowering::ArgListEntry Entry; 3494 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3495 Args.push_back(Entry); 3496 // Extend or truncate the argument to be an i32 value for the call. 3497 if (Src.getValueType().bitsGT(MVT::i32)) 3498 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3499 else 3500 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3501 Entry.Node = Src; 3502 Entry.Ty = Type::getInt32Ty(*getContext()); 3503 Entry.isSExt = true; 3504 Args.push_back(Entry); 3505 Entry.Node = Size; 3506 Entry.Ty = IntPtrTy; 3507 Entry.isSExt = false; 3508 Args.push_back(Entry); 3509 // FIXME: pass in DebugLoc 3510 std::pair<SDValue,SDValue> CallResult = 3511 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3512 false, false, false, false, 0, 3513 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3514 /*isReturnValueUsed=*/false, 3515 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3516 TLI.getPointerTy()), 3517 Args, *this, dl); 3518 return CallResult.second; 3519} 3520 3521SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3522 SDValue Chain, 3523 SDValue Ptr, SDValue Cmp, 3524 SDValue Swp, const Value* PtrVal, 3525 unsigned Alignment) { 3526 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3527 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3528 3529 EVT VT = Cmp.getValueType(); 3530 3531 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3532 Alignment = getEVTAlignment(MemVT); 3533 3534 SDVTList VTs = getVTList(VT, MVT::Other); 3535 FoldingSetNodeID ID; 3536 ID.AddInteger(MemVT.getRawBits()); 3537 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3538 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3539 void* IP = 0; 3540 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3541 return SDValue(E, 0); 3542 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3543 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3544 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3545 CSEMap.InsertNode(N, IP); 3546 AllNodes.push_back(N); 3547 return SDValue(N, 0); 3548} 3549 3550SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3551 SDValue Chain, 3552 SDValue Ptr, SDValue Val, 3553 const Value* PtrVal, 3554 unsigned Alignment) { 3555 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3556 Opcode == ISD::ATOMIC_LOAD_SUB || 3557 Opcode == ISD::ATOMIC_LOAD_AND || 3558 Opcode == ISD::ATOMIC_LOAD_OR || 3559 Opcode == ISD::ATOMIC_LOAD_XOR || 3560 Opcode == ISD::ATOMIC_LOAD_NAND || 3561 Opcode == ISD::ATOMIC_LOAD_MIN || 3562 Opcode == ISD::ATOMIC_LOAD_MAX || 3563 Opcode == ISD::ATOMIC_LOAD_UMIN || 3564 Opcode == ISD::ATOMIC_LOAD_UMAX || 3565 Opcode == ISD::ATOMIC_SWAP) && 3566 "Invalid Atomic Op"); 3567 3568 EVT VT = Val.getValueType(); 3569 3570 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3571 Alignment = getEVTAlignment(MemVT); 3572 3573 SDVTList VTs = getVTList(VT, MVT::Other); 3574 FoldingSetNodeID ID; 3575 ID.AddInteger(MemVT.getRawBits()); 3576 SDValue Ops[] = {Chain, Ptr, Val}; 3577 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3578 void* IP = 0; 3579 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3580 return SDValue(E, 0); 3581 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3582 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3583 Chain, Ptr, Val, PtrVal, Alignment); 3584 CSEMap.InsertNode(N, IP); 3585 AllNodes.push_back(N); 3586 return SDValue(N, 0); 3587} 3588 3589/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3590/// Allowed to return something different (and simpler) if Simplify is true. 3591SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3592 DebugLoc dl) { 3593 if (NumOps == 1) 3594 return Ops[0]; 3595 3596 SmallVector<EVT, 4> VTs; 3597 VTs.reserve(NumOps); 3598 for (unsigned i = 0; i < NumOps; ++i) 3599 VTs.push_back(Ops[i].getValueType()); 3600 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3601 Ops, NumOps); 3602} 3603 3604SDValue 3605SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3606 const EVT *VTs, unsigned NumVTs, 3607 const SDValue *Ops, unsigned NumOps, 3608 EVT MemVT, const Value *srcValue, int SVOff, 3609 unsigned Align, bool Vol, 3610 bool ReadMem, bool WriteMem) { 3611 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3612 MemVT, srcValue, SVOff, Align, Vol, 3613 ReadMem, WriteMem); 3614} 3615 3616SDValue 3617SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3618 const SDValue *Ops, unsigned NumOps, 3619 EVT MemVT, const Value *srcValue, int SVOff, 3620 unsigned Align, bool Vol, 3621 bool ReadMem, bool WriteMem) { 3622 // Memoize the node unless it returns a flag. 3623 MemIntrinsicSDNode *N; 3624 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3625 FoldingSetNodeID ID; 3626 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3627 void *IP = 0; 3628 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3629 return SDValue(E, 0); 3630 3631 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3632 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3633 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3634 CSEMap.InsertNode(N, IP); 3635 } else { 3636 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3637 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3638 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3639 } 3640 AllNodes.push_back(N); 3641 return SDValue(N, 0); 3642} 3643 3644SDValue 3645SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3646 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3647 SDValue Ptr, SDValue Offset, 3648 const Value *SV, int SVOffset, EVT EVT, 3649 bool isVolatile, unsigned Alignment) { 3650 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3651 Alignment = getEVTAlignment(VT); 3652 3653 if (VT == EVT) { 3654 ExtType = ISD::NON_EXTLOAD; 3655 } else if (ExtType == ISD::NON_EXTLOAD) { 3656 assert(VT == EVT && "Non-extending load from different memory type!"); 3657 } else { 3658 // Extending load. 3659 if (VT.isVector()) 3660 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3661 "Invalid vector extload!"); 3662 else 3663 assert(EVT.bitsLT(VT) && 3664 "Should only be an extending load, not truncating!"); 3665 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3666 "Cannot sign/zero extend a FP/Vector load!"); 3667 assert(VT.isInteger() == EVT.isInteger() && 3668 "Cannot convert from FP to Int or Int -> FP!"); 3669 } 3670 3671 bool Indexed = AM != ISD::UNINDEXED; 3672 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3673 "Unindexed load with an offset!"); 3674 3675 SDVTList VTs = Indexed ? 3676 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3677 SDValue Ops[] = { Chain, Ptr, Offset }; 3678 FoldingSetNodeID ID; 3679 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3680 ID.AddInteger(EVT.getRawBits()); 3681 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment)); 3682 void *IP = 0; 3683 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3684 return SDValue(E, 0); 3685 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3686 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset, 3687 Alignment, isVolatile); 3688 CSEMap.InsertNode(N, IP); 3689 AllNodes.push_back(N); 3690 return SDValue(N, 0); 3691} 3692 3693SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3694 SDValue Chain, SDValue Ptr, 3695 const Value *SV, int SVOffset, 3696 bool isVolatile, unsigned Alignment) { 3697 SDValue Undef = getUNDEF(Ptr.getValueType()); 3698 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3699 SV, SVOffset, VT, isVolatile, Alignment); 3700} 3701 3702SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3703 SDValue Chain, SDValue Ptr, 3704 const Value *SV, 3705 int SVOffset, EVT EVT, 3706 bool isVolatile, unsigned Alignment) { 3707 SDValue Undef = getUNDEF(Ptr.getValueType()); 3708 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3709 SV, SVOffset, EVT, isVolatile, Alignment); 3710} 3711 3712SDValue 3713SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3714 SDValue Offset, ISD::MemIndexedMode AM) { 3715 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3716 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3717 "Load is already a indexed load!"); 3718 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3719 LD->getChain(), Base, Offset, LD->getSrcValue(), 3720 LD->getSrcValueOffset(), LD->getMemoryVT(), 3721 LD->isVolatile(), LD->getAlignment()); 3722} 3723 3724SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3725 SDValue Ptr, const Value *SV, int SVOffset, 3726 bool isVolatile, unsigned Alignment) { 3727 EVT VT = Val.getValueType(); 3728 3729 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3730 Alignment = getEVTAlignment(VT); 3731 3732 SDVTList VTs = getVTList(MVT::Other); 3733 SDValue Undef = getUNDEF(Ptr.getValueType()); 3734 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3735 FoldingSetNodeID ID; 3736 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3737 ID.AddInteger(VT.getRawBits()); 3738 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, 3739 isVolatile, Alignment)); 3740 void *IP = 0; 3741 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3742 return SDValue(E, 0); 3743 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3744 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, 3745 VT, SV, SVOffset, Alignment, isVolatile); 3746 CSEMap.InsertNode(N, IP); 3747 AllNodes.push_back(N); 3748 return SDValue(N, 0); 3749} 3750 3751SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3752 SDValue Ptr, const Value *SV, 3753 int SVOffset, EVT SVT, 3754 bool isVolatile, unsigned Alignment) { 3755 EVT VT = Val.getValueType(); 3756 3757 if (VT == SVT) 3758 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3759 3760 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3761 assert(VT.isInteger() == SVT.isInteger() && 3762 "Can't do FP-INT conversion!"); 3763 3764 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3765 Alignment = getEVTAlignment(VT); 3766 3767 SDVTList VTs = getVTList(MVT::Other); 3768 SDValue Undef = getUNDEF(Ptr.getValueType()); 3769 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3770 FoldingSetNodeID ID; 3771 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3772 ID.AddInteger(SVT.getRawBits()); 3773 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, 3774 isVolatile, Alignment)); 3775 void *IP = 0; 3776 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3777 return SDValue(E, 0); 3778 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3779 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, 3780 SVT, SV, SVOffset, Alignment, isVolatile); 3781 CSEMap.InsertNode(N, IP); 3782 AllNodes.push_back(N); 3783 return SDValue(N, 0); 3784} 3785 3786SDValue 3787SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 3788 SDValue Offset, ISD::MemIndexedMode AM) { 3789 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3790 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3791 "Store is already a indexed store!"); 3792 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3793 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3794 FoldingSetNodeID ID; 3795 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3796 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3797 ID.AddInteger(ST->getRawSubclassData()); 3798 void *IP = 0; 3799 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3800 return SDValue(E, 0); 3801 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3802 new (N) StoreSDNode(Ops, dl, VTs, AM, 3803 ST->isTruncatingStore(), ST->getMemoryVT(), 3804 ST->getSrcValue(), ST->getSrcValueOffset(), 3805 ST->getAlignment(), ST->isVolatile()); 3806 CSEMap.InsertNode(N, IP); 3807 AllNodes.push_back(N); 3808 return SDValue(N, 0); 3809} 3810 3811SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 3812 SDValue Chain, SDValue Ptr, 3813 SDValue SV) { 3814 SDValue Ops[] = { Chain, Ptr, SV }; 3815 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 3816} 3817 3818SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3819 const SDUse *Ops, unsigned NumOps) { 3820 switch (NumOps) { 3821 case 0: return getNode(Opcode, DL, VT); 3822 case 1: return getNode(Opcode, DL, VT, Ops[0]); 3823 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 3824 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 3825 default: break; 3826 } 3827 3828 // Copy from an SDUse array into an SDValue array for use with 3829 // the regular getNode logic. 3830 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3831 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 3832} 3833 3834SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3835 const SDValue *Ops, unsigned NumOps) { 3836 switch (NumOps) { 3837 case 0: return getNode(Opcode, DL, VT); 3838 case 1: return getNode(Opcode, DL, VT, Ops[0]); 3839 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 3840 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 3841 default: break; 3842 } 3843 3844 switch (Opcode) { 3845 default: break; 3846 case ISD::SELECT_CC: { 3847 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3848 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3849 "LHS and RHS of condition must have same type!"); 3850 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3851 "True and False arms of SelectCC must have same type!"); 3852 assert(Ops[2].getValueType() == VT && 3853 "select_cc node must be of same type as true and false value!"); 3854 break; 3855 } 3856 case ISD::BR_CC: { 3857 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3858 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3859 "LHS/RHS of comparison should match types!"); 3860 break; 3861 } 3862 } 3863 3864 // Memoize nodes. 3865 SDNode *N; 3866 SDVTList VTs = getVTList(VT); 3867 3868 if (VT != MVT::Flag) { 3869 FoldingSetNodeID ID; 3870 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3871 void *IP = 0; 3872 3873 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3874 return SDValue(E, 0); 3875 3876 N = NodeAllocator.Allocate<SDNode>(); 3877 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 3878 CSEMap.InsertNode(N, IP); 3879 } else { 3880 N = NodeAllocator.Allocate<SDNode>(); 3881 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 3882 } 3883 3884 AllNodes.push_back(N); 3885#ifndef NDEBUG 3886 VerifyNode(N); 3887#endif 3888 return SDValue(N, 0); 3889} 3890 3891SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 3892 const std::vector<EVT> &ResultTys, 3893 const SDValue *Ops, unsigned NumOps) { 3894 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 3895 Ops, NumOps); 3896} 3897 3898SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 3899 const EVT *VTs, unsigned NumVTs, 3900 const SDValue *Ops, unsigned NumOps) { 3901 if (NumVTs == 1) 3902 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 3903 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 3904} 3905 3906SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3907 const SDValue *Ops, unsigned NumOps) { 3908 if (VTList.NumVTs == 1) 3909 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 3910 3911#if 0 3912 switch (Opcode) { 3913 // FIXME: figure out how to safely handle things like 3914 // int foo(int x) { return 1 << (x & 255); } 3915 // int bar() { return foo(256); } 3916 case ISD::SRA_PARTS: 3917 case ISD::SRL_PARTS: 3918 case ISD::SHL_PARTS: 3919 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3920 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3921 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 3922 else if (N3.getOpcode() == ISD::AND) 3923 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3924 // If the and is only masking out bits that cannot effect the shift, 3925 // eliminate the and. 3926 unsigned NumBits = VT.getSizeInBits()*2; 3927 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3928 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 3929 } 3930 break; 3931 } 3932#endif 3933 3934 // Memoize the node unless it returns a flag. 3935 SDNode *N; 3936 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3937 FoldingSetNodeID ID; 3938 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3939 void *IP = 0; 3940 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3941 return SDValue(E, 0); 3942 if (NumOps == 1) { 3943 N = NodeAllocator.Allocate<UnarySDNode>(); 3944 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 3945 } else if (NumOps == 2) { 3946 N = NodeAllocator.Allocate<BinarySDNode>(); 3947 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 3948 } else if (NumOps == 3) { 3949 N = NodeAllocator.Allocate<TernarySDNode>(); 3950 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 3951 } else { 3952 N = NodeAllocator.Allocate<SDNode>(); 3953 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 3954 } 3955 CSEMap.InsertNode(N, IP); 3956 } else { 3957 if (NumOps == 1) { 3958 N = NodeAllocator.Allocate<UnarySDNode>(); 3959 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 3960 } else if (NumOps == 2) { 3961 N = NodeAllocator.Allocate<BinarySDNode>(); 3962 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 3963 } else if (NumOps == 3) { 3964 N = NodeAllocator.Allocate<TernarySDNode>(); 3965 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 3966 } else { 3967 N = NodeAllocator.Allocate<SDNode>(); 3968 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 3969 } 3970 } 3971 AllNodes.push_back(N); 3972#ifndef NDEBUG 3973 VerifyNode(N); 3974#endif 3975 return SDValue(N, 0); 3976} 3977 3978SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 3979 return getNode(Opcode, DL, VTList, 0, 0); 3980} 3981 3982SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3983 SDValue N1) { 3984 SDValue Ops[] = { N1 }; 3985 return getNode(Opcode, DL, VTList, Ops, 1); 3986} 3987 3988SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3989 SDValue N1, SDValue N2) { 3990 SDValue Ops[] = { N1, N2 }; 3991 return getNode(Opcode, DL, VTList, Ops, 2); 3992} 3993 3994SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 3995 SDValue N1, SDValue N2, SDValue N3) { 3996 SDValue Ops[] = { N1, N2, N3 }; 3997 return getNode(Opcode, DL, VTList, Ops, 3); 3998} 3999 4000SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4001 SDValue N1, SDValue N2, SDValue N3, 4002 SDValue N4) { 4003 SDValue Ops[] = { N1, N2, N3, N4 }; 4004 return getNode(Opcode, DL, VTList, Ops, 4); 4005} 4006 4007SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4008 SDValue N1, SDValue N2, SDValue N3, 4009 SDValue N4, SDValue N5) { 4010 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4011 return getNode(Opcode, DL, VTList, Ops, 5); 4012} 4013 4014SDVTList SelectionDAG::getVTList(EVT VT) { 4015 return makeVTList(SDNode::getValueTypeList(VT), 1); 4016} 4017 4018SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4019 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4020 E = VTList.rend(); I != E; ++I) 4021 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4022 return *I; 4023 4024 EVT *Array = Allocator.Allocate<EVT>(2); 4025 Array[0] = VT1; 4026 Array[1] = VT2; 4027 SDVTList Result = makeVTList(Array, 2); 4028 VTList.push_back(Result); 4029 return Result; 4030} 4031 4032SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4033 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4034 E = VTList.rend(); I != E; ++I) 4035 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4036 I->VTs[2] == VT3) 4037 return *I; 4038 4039 EVT *Array = Allocator.Allocate<EVT>(3); 4040 Array[0] = VT1; 4041 Array[1] = VT2; 4042 Array[2] = VT3; 4043 SDVTList Result = makeVTList(Array, 3); 4044 VTList.push_back(Result); 4045 return Result; 4046} 4047 4048SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4049 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4050 E = VTList.rend(); I != E; ++I) 4051 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4052 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4053 return *I; 4054 4055 EVT *Array = Allocator.Allocate<EVT>(3); 4056 Array[0] = VT1; 4057 Array[1] = VT2; 4058 Array[2] = VT3; 4059 Array[3] = VT4; 4060 SDVTList Result = makeVTList(Array, 4); 4061 VTList.push_back(Result); 4062 return Result; 4063} 4064 4065SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4066 switch (NumVTs) { 4067 case 0: llvm_unreachable("Cannot have nodes without results!"); 4068 case 1: return getVTList(VTs[0]); 4069 case 2: return getVTList(VTs[0], VTs[1]); 4070 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4071 default: break; 4072 } 4073 4074 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4075 E = VTList.rend(); I != E; ++I) { 4076 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4077 continue; 4078 4079 bool NoMatch = false; 4080 for (unsigned i = 2; i != NumVTs; ++i) 4081 if (VTs[i] != I->VTs[i]) { 4082 NoMatch = true; 4083 break; 4084 } 4085 if (!NoMatch) 4086 return *I; 4087 } 4088 4089 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4090 std::copy(VTs, VTs+NumVTs, Array); 4091 SDVTList Result = makeVTList(Array, NumVTs); 4092 VTList.push_back(Result); 4093 return Result; 4094} 4095 4096 4097/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4098/// specified operands. If the resultant node already exists in the DAG, 4099/// this does not modify the specified node, instead it returns the node that 4100/// already exists. If the resultant node does not exist in the DAG, the 4101/// input node is returned. As a degenerate case, if you specify the same 4102/// input operands as the node already has, the input node is returned. 4103SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4104 SDNode *N = InN.getNode(); 4105 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4106 4107 // Check to see if there is no change. 4108 if (Op == N->getOperand(0)) return InN; 4109 4110 // See if the modified node already exists. 4111 void *InsertPos = 0; 4112 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4113 return SDValue(Existing, InN.getResNo()); 4114 4115 // Nope it doesn't. Remove the node from its current place in the maps. 4116 if (InsertPos) 4117 if (!RemoveNodeFromCSEMaps(N)) 4118 InsertPos = 0; 4119 4120 // Now we update the operands. 4121 N->OperandList[0].set(Op); 4122 4123 // If this gets put into a CSE map, add it. 4124 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4125 return InN; 4126} 4127 4128SDValue SelectionDAG:: 4129UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4130 SDNode *N = InN.getNode(); 4131 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4132 4133 // Check to see if there is no change. 4134 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4135 return InN; // No operands changed, just return the input node. 4136 4137 // See if the modified node already exists. 4138 void *InsertPos = 0; 4139 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4140 return SDValue(Existing, InN.getResNo()); 4141 4142 // Nope it doesn't. Remove the node from its current place in the maps. 4143 if (InsertPos) 4144 if (!RemoveNodeFromCSEMaps(N)) 4145 InsertPos = 0; 4146 4147 // Now we update the operands. 4148 if (N->OperandList[0] != Op1) 4149 N->OperandList[0].set(Op1); 4150 if (N->OperandList[1] != Op2) 4151 N->OperandList[1].set(Op2); 4152 4153 // If this gets put into a CSE map, add it. 4154 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4155 return InN; 4156} 4157 4158SDValue SelectionDAG:: 4159UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4160 SDValue Ops[] = { Op1, Op2, Op3 }; 4161 return UpdateNodeOperands(N, Ops, 3); 4162} 4163 4164SDValue SelectionDAG:: 4165UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4166 SDValue Op3, SDValue Op4) { 4167 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4168 return UpdateNodeOperands(N, Ops, 4); 4169} 4170 4171SDValue SelectionDAG:: 4172UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4173 SDValue Op3, SDValue Op4, SDValue Op5) { 4174 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4175 return UpdateNodeOperands(N, Ops, 5); 4176} 4177 4178SDValue SelectionDAG:: 4179UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4180 SDNode *N = InN.getNode(); 4181 assert(N->getNumOperands() == NumOps && 4182 "Update with wrong number of operands"); 4183 4184 // Check to see if there is no change. 4185 bool AnyChange = false; 4186 for (unsigned i = 0; i != NumOps; ++i) { 4187 if (Ops[i] != N->getOperand(i)) { 4188 AnyChange = true; 4189 break; 4190 } 4191 } 4192 4193 // No operands changed, just return the input node. 4194 if (!AnyChange) return InN; 4195 4196 // See if the modified node already exists. 4197 void *InsertPos = 0; 4198 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4199 return SDValue(Existing, InN.getResNo()); 4200 4201 // Nope it doesn't. Remove the node from its current place in the maps. 4202 if (InsertPos) 4203 if (!RemoveNodeFromCSEMaps(N)) 4204 InsertPos = 0; 4205 4206 // Now we update the operands. 4207 for (unsigned i = 0; i != NumOps; ++i) 4208 if (N->OperandList[i] != Ops[i]) 4209 N->OperandList[i].set(Ops[i]); 4210 4211 // If this gets put into a CSE map, add it. 4212 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4213 return InN; 4214} 4215 4216/// DropOperands - Release the operands and set this node to have 4217/// zero operands. 4218void SDNode::DropOperands() { 4219 // Unlike the code in MorphNodeTo that does this, we don't need to 4220 // watch for dead nodes here. 4221 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4222 SDUse &Use = *I++; 4223 Use.set(SDValue()); 4224 } 4225} 4226 4227/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4228/// machine opcode. 4229/// 4230SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4231 EVT VT) { 4232 SDVTList VTs = getVTList(VT); 4233 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4234} 4235 4236SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4237 EVT VT, SDValue Op1) { 4238 SDVTList VTs = getVTList(VT); 4239 SDValue Ops[] = { Op1 }; 4240 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4241} 4242 4243SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4244 EVT VT, SDValue Op1, 4245 SDValue Op2) { 4246 SDVTList VTs = getVTList(VT); 4247 SDValue Ops[] = { Op1, Op2 }; 4248 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4249} 4250 4251SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4252 EVT VT, SDValue Op1, 4253 SDValue Op2, SDValue Op3) { 4254 SDVTList VTs = getVTList(VT); 4255 SDValue Ops[] = { Op1, Op2, Op3 }; 4256 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4257} 4258 4259SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4260 EVT VT, const SDValue *Ops, 4261 unsigned NumOps) { 4262 SDVTList VTs = getVTList(VT); 4263 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4264} 4265 4266SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4267 EVT VT1, EVT VT2, const SDValue *Ops, 4268 unsigned NumOps) { 4269 SDVTList VTs = getVTList(VT1, VT2); 4270 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4271} 4272 4273SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4274 EVT VT1, EVT VT2) { 4275 SDVTList VTs = getVTList(VT1, VT2); 4276 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4277} 4278 4279SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4280 EVT VT1, EVT VT2, EVT VT3, 4281 const SDValue *Ops, unsigned NumOps) { 4282 SDVTList VTs = getVTList(VT1, VT2, VT3); 4283 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4284} 4285 4286SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4287 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4288 const SDValue *Ops, unsigned NumOps) { 4289 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4290 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4291} 4292 4293SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4294 EVT VT1, EVT VT2, 4295 SDValue Op1) { 4296 SDVTList VTs = getVTList(VT1, VT2); 4297 SDValue Ops[] = { Op1 }; 4298 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4299} 4300 4301SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4302 EVT VT1, EVT VT2, 4303 SDValue Op1, SDValue Op2) { 4304 SDVTList VTs = getVTList(VT1, VT2); 4305 SDValue Ops[] = { Op1, Op2 }; 4306 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4307} 4308 4309SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4310 EVT VT1, EVT VT2, 4311 SDValue Op1, SDValue Op2, 4312 SDValue Op3) { 4313 SDVTList VTs = getVTList(VT1, VT2); 4314 SDValue Ops[] = { Op1, Op2, Op3 }; 4315 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4316} 4317 4318SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4319 EVT VT1, EVT VT2, EVT VT3, 4320 SDValue Op1, SDValue Op2, 4321 SDValue Op3) { 4322 SDVTList VTs = getVTList(VT1, VT2, VT3); 4323 SDValue Ops[] = { Op1, Op2, Op3 }; 4324 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4325} 4326 4327SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4328 SDVTList VTs, const SDValue *Ops, 4329 unsigned NumOps) { 4330 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4331} 4332 4333SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4334 EVT VT) { 4335 SDVTList VTs = getVTList(VT); 4336 return MorphNodeTo(N, Opc, VTs, 0, 0); 4337} 4338 4339SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4340 EVT VT, SDValue Op1) { 4341 SDVTList VTs = getVTList(VT); 4342 SDValue Ops[] = { Op1 }; 4343 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4344} 4345 4346SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4347 EVT VT, SDValue Op1, 4348 SDValue Op2) { 4349 SDVTList VTs = getVTList(VT); 4350 SDValue Ops[] = { Op1, Op2 }; 4351 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4352} 4353 4354SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4355 EVT VT, SDValue Op1, 4356 SDValue Op2, SDValue Op3) { 4357 SDVTList VTs = getVTList(VT); 4358 SDValue Ops[] = { Op1, Op2, Op3 }; 4359 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4360} 4361 4362SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4363 EVT VT, const SDValue *Ops, 4364 unsigned NumOps) { 4365 SDVTList VTs = getVTList(VT); 4366 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4367} 4368 4369SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4370 EVT VT1, EVT VT2, const SDValue *Ops, 4371 unsigned NumOps) { 4372 SDVTList VTs = getVTList(VT1, VT2); 4373 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4374} 4375 4376SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4377 EVT VT1, EVT VT2) { 4378 SDVTList VTs = getVTList(VT1, VT2); 4379 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4380} 4381 4382SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4383 EVT VT1, EVT VT2, EVT VT3, 4384 const SDValue *Ops, unsigned NumOps) { 4385 SDVTList VTs = getVTList(VT1, VT2, VT3); 4386 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4387} 4388 4389SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4390 EVT VT1, EVT VT2, 4391 SDValue Op1) { 4392 SDVTList VTs = getVTList(VT1, VT2); 4393 SDValue Ops[] = { Op1 }; 4394 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4395} 4396 4397SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4398 EVT VT1, EVT VT2, 4399 SDValue Op1, SDValue Op2) { 4400 SDVTList VTs = getVTList(VT1, VT2); 4401 SDValue Ops[] = { Op1, Op2 }; 4402 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4403} 4404 4405SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4406 EVT VT1, EVT VT2, 4407 SDValue Op1, SDValue Op2, 4408 SDValue Op3) { 4409 SDVTList VTs = getVTList(VT1, VT2); 4410 SDValue Ops[] = { Op1, Op2, Op3 }; 4411 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4412} 4413 4414/// MorphNodeTo - These *mutate* the specified node to have the specified 4415/// return type, opcode, and operands. 4416/// 4417/// Note that MorphNodeTo returns the resultant node. If there is already a 4418/// node of the specified opcode and operands, it returns that node instead of 4419/// the current one. Note that the DebugLoc need not be the same. 4420/// 4421/// Using MorphNodeTo is faster than creating a new node and swapping it in 4422/// with ReplaceAllUsesWith both because it often avoids allocating a new 4423/// node, and because it doesn't require CSE recalculation for any of 4424/// the node's users. 4425/// 4426SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4427 SDVTList VTs, const SDValue *Ops, 4428 unsigned NumOps) { 4429 // If an identical node already exists, use it. 4430 void *IP = 0; 4431 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4432 FoldingSetNodeID ID; 4433 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4434 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4435 return ON; 4436 } 4437 4438 if (!RemoveNodeFromCSEMaps(N)) 4439 IP = 0; 4440 4441 // Start the morphing. 4442 N->NodeType = Opc; 4443 N->ValueList = VTs.VTs; 4444 N->NumValues = VTs.NumVTs; 4445 4446 // Clear the operands list, updating used nodes to remove this from their 4447 // use list. Keep track of any operands that become dead as a result. 4448 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4449 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4450 SDUse &Use = *I++; 4451 SDNode *Used = Use.getNode(); 4452 Use.set(SDValue()); 4453 if (Used->use_empty()) 4454 DeadNodeSet.insert(Used); 4455 } 4456 4457 // If NumOps is larger than the # of operands we currently have, reallocate 4458 // the operand list. 4459 if (NumOps > N->NumOperands) { 4460 if (N->OperandsNeedDelete) 4461 delete[] N->OperandList; 4462 4463 if (N->isMachineOpcode()) { 4464 // We're creating a final node that will live unmorphed for the 4465 // remainder of the current SelectionDAG iteration, so we can allocate 4466 // the operands directly out of a pool with no recycling metadata. 4467 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4468 N->OperandsNeedDelete = false; 4469 } else { 4470 N->OperandList = new SDUse[NumOps]; 4471 N->OperandsNeedDelete = true; 4472 } 4473 } 4474 4475 // Assign the new operands. 4476 N->NumOperands = NumOps; 4477 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4478 N->OperandList[i].setUser(N); 4479 N->OperandList[i].setInitial(Ops[i]); 4480 } 4481 4482 // Delete any nodes that are still dead after adding the uses for the 4483 // new operands. 4484 SmallVector<SDNode *, 16> DeadNodes; 4485 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4486 E = DeadNodeSet.end(); I != E; ++I) 4487 if ((*I)->use_empty()) 4488 DeadNodes.push_back(*I); 4489 RemoveDeadNodes(DeadNodes); 4490 4491 if (IP) 4492 CSEMap.InsertNode(N, IP); // Memoize the new node. 4493 return N; 4494} 4495 4496 4497/// getTargetNode - These are used for target selectors to create a new node 4498/// with specified return type(s), target opcode, and operands. 4499/// 4500/// Note that getTargetNode returns the resultant node. If there is already a 4501/// node of the specified opcode and operands, it returns that node instead of 4502/// the current one. 4503SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4504 return getNode(~Opcode, dl, VT).getNode(); 4505} 4506 4507SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4508 SDValue Op1) { 4509 return getNode(~Opcode, dl, VT, Op1).getNode(); 4510} 4511 4512SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4513 SDValue Op1, SDValue Op2) { 4514 return getNode(~Opcode, dl, VT, Op1, Op2).getNode(); 4515} 4516 4517SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4518 SDValue Op1, SDValue Op2, 4519 SDValue Op3) { 4520 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode(); 4521} 4522 4523SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, 4524 const SDValue *Ops, unsigned NumOps) { 4525 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode(); 4526} 4527 4528SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4529 EVT VT1, EVT VT2) { 4530 SDVTList VTs = getVTList(VT1, VT2); 4531 SDValue Op; 4532 return getNode(~Opcode, dl, VTs, &Op, 0).getNode(); 4533} 4534 4535SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4536 EVT VT2, SDValue Op1) { 4537 SDVTList VTs = getVTList(VT1, VT2); 4538 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode(); 4539} 4540 4541SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4542 EVT VT2, SDValue Op1, 4543 SDValue Op2) { 4544 SDVTList VTs = getVTList(VT1, VT2); 4545 SDValue Ops[] = { Op1, Op2 }; 4546 return getNode(~Opcode, dl, VTs, Ops, 2).getNode(); 4547} 4548 4549SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4550 EVT VT2, SDValue Op1, 4551 SDValue Op2, SDValue Op3) { 4552 SDVTList VTs = getVTList(VT1, VT2); 4553 SDValue Ops[] = { Op1, Op2, Op3 }; 4554 return getNode(~Opcode, dl, VTs, Ops, 3).getNode(); 4555} 4556 4557SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4558 EVT VT1, EVT VT2, 4559 const SDValue *Ops, unsigned NumOps) { 4560 SDVTList VTs = getVTList(VT1, VT2); 4561 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode(); 4562} 4563 4564SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4565 EVT VT1, EVT VT2, EVT VT3, 4566 SDValue Op1, SDValue Op2) { 4567 SDVTList VTs = getVTList(VT1, VT2, VT3); 4568 SDValue Ops[] = { Op1, Op2 }; 4569 return getNode(~Opcode, dl, VTs, Ops, 2).getNode(); 4570} 4571 4572SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4573 EVT VT1, EVT VT2, EVT VT3, 4574 SDValue Op1, SDValue Op2, 4575 SDValue Op3) { 4576 SDVTList VTs = getVTList(VT1, VT2, VT3); 4577 SDValue Ops[] = { Op1, Op2, Op3 }; 4578 return getNode(~Opcode, dl, VTs, Ops, 3).getNode(); 4579} 4580 4581SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4582 EVT VT1, EVT VT2, EVT VT3, 4583 const SDValue *Ops, unsigned NumOps) { 4584 SDVTList VTs = getVTList(VT1, VT2, VT3); 4585 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode(); 4586} 4587 4588SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4589 EVT VT2, EVT VT3, EVT VT4, 4590 const SDValue *Ops, unsigned NumOps) { 4591 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4592 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode(); 4593} 4594 4595SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4596 const std::vector<EVT> &ResultTys, 4597 const SDValue *Ops, unsigned NumOps) { 4598 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode(); 4599} 4600 4601/// getTargetExtractSubreg - A convenience function for creating 4602/// TargetInstrInfo::EXTRACT_SUBREG nodes. 4603SDValue 4604SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4605 SDValue Operand) { 4606 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4607 SDNode *Subreg = getTargetNode(TargetInstrInfo::EXTRACT_SUBREG, DL, 4608 VT, Operand, SRIdxVal); 4609 return SDValue(Subreg, 0); 4610} 4611 4612/// getNodeIfExists - Get the specified node if it's already available, or 4613/// else return NULL. 4614SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4615 const SDValue *Ops, unsigned NumOps) { 4616 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4617 FoldingSetNodeID ID; 4618 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4619 void *IP = 0; 4620 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4621 return E; 4622 } 4623 return NULL; 4624} 4625 4626/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4627/// This can cause recursive merging of nodes in the DAG. 4628/// 4629/// This version assumes From has a single result value. 4630/// 4631void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4632 DAGUpdateListener *UpdateListener) { 4633 SDNode *From = FromN.getNode(); 4634 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4635 "Cannot replace with this method!"); 4636 assert(From != To.getNode() && "Cannot replace uses of with self"); 4637 4638 // Iterate over all the existing uses of From. New uses will be added 4639 // to the beginning of the use list, which we avoid visiting. 4640 // This specifically avoids visiting uses of From that arise while the 4641 // replacement is happening, because any such uses would be the result 4642 // of CSE: If an existing node looks like From after one of its operands 4643 // is replaced by To, we don't want to replace of all its users with To 4644 // too. See PR3018 for more info. 4645 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4646 while (UI != UE) { 4647 SDNode *User = *UI; 4648 4649 // This node is about to morph, remove its old self from the CSE maps. 4650 RemoveNodeFromCSEMaps(User); 4651 4652 // A user can appear in a use list multiple times, and when this 4653 // happens the uses are usually next to each other in the list. 4654 // To help reduce the number of CSE recomputations, process all 4655 // the uses of this user that we can find this way. 4656 do { 4657 SDUse &Use = UI.getUse(); 4658 ++UI; 4659 Use.set(To); 4660 } while (UI != UE && *UI == User); 4661 4662 // Now that we have modified User, add it back to the CSE maps. If it 4663 // already exists there, recursively merge the results together. 4664 AddModifiedNodeToCSEMaps(User, UpdateListener); 4665 } 4666} 4667 4668/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4669/// This can cause recursive merging of nodes in the DAG. 4670/// 4671/// This version assumes that for each value of From, there is a 4672/// corresponding value in To in the same position with the same type. 4673/// 4674void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4675 DAGUpdateListener *UpdateListener) { 4676#ifndef NDEBUG 4677 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 4678 assert((!From->hasAnyUseOfValue(i) || 4679 From->getValueType(i) == To->getValueType(i)) && 4680 "Cannot use this version of ReplaceAllUsesWith!"); 4681#endif 4682 4683 // Handle the trivial case. 4684 if (From == To) 4685 return; 4686 4687 // Iterate over just the existing users of From. See the comments in 4688 // the ReplaceAllUsesWith above. 4689 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4690 while (UI != UE) { 4691 SDNode *User = *UI; 4692 4693 // This node is about to morph, remove its old self from the CSE maps. 4694 RemoveNodeFromCSEMaps(User); 4695 4696 // A user can appear in a use list multiple times, and when this 4697 // happens the uses are usually next to each other in the list. 4698 // To help reduce the number of CSE recomputations, process all 4699 // the uses of this user that we can find this way. 4700 do { 4701 SDUse &Use = UI.getUse(); 4702 ++UI; 4703 Use.setNode(To); 4704 } while (UI != UE && *UI == User); 4705 4706 // Now that we have modified User, add it back to the CSE maps. If it 4707 // already exists there, recursively merge the results together. 4708 AddModifiedNodeToCSEMaps(User, UpdateListener); 4709 } 4710} 4711 4712/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4713/// This can cause recursive merging of nodes in the DAG. 4714/// 4715/// This version can replace From with any result values. To must match the 4716/// number and types of values returned by From. 4717void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4718 const SDValue *To, 4719 DAGUpdateListener *UpdateListener) { 4720 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4721 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4722 4723 // Iterate over just the existing users of From. See the comments in 4724 // the ReplaceAllUsesWith above. 4725 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4726 while (UI != UE) { 4727 SDNode *User = *UI; 4728 4729 // This node is about to morph, remove its old self from the CSE maps. 4730 RemoveNodeFromCSEMaps(User); 4731 4732 // A user can appear in a use list multiple times, and when this 4733 // happens the uses are usually next to each other in the list. 4734 // To help reduce the number of CSE recomputations, process all 4735 // the uses of this user that we can find this way. 4736 do { 4737 SDUse &Use = UI.getUse(); 4738 const SDValue &ToOp = To[Use.getResNo()]; 4739 ++UI; 4740 Use.set(ToOp); 4741 } while (UI != UE && *UI == User); 4742 4743 // Now that we have modified User, add it back to the CSE maps. If it 4744 // already exists there, recursively merge the results together. 4745 AddModifiedNodeToCSEMaps(User, UpdateListener); 4746 } 4747} 4748 4749/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4750/// uses of other values produced by From.getNode() alone. The Deleted 4751/// vector is handled the same way as for ReplaceAllUsesWith. 4752void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4753 DAGUpdateListener *UpdateListener){ 4754 // Handle the really simple, really trivial case efficiently. 4755 if (From == To) return; 4756 4757 // Handle the simple, trivial, case efficiently. 4758 if (From.getNode()->getNumValues() == 1) { 4759 ReplaceAllUsesWith(From, To, UpdateListener); 4760 return; 4761 } 4762 4763 // Iterate over just the existing users of From. See the comments in 4764 // the ReplaceAllUsesWith above. 4765 SDNode::use_iterator UI = From.getNode()->use_begin(), 4766 UE = From.getNode()->use_end(); 4767 while (UI != UE) { 4768 SDNode *User = *UI; 4769 bool UserRemovedFromCSEMaps = false; 4770 4771 // A user can appear in a use list multiple times, and when this 4772 // happens the uses are usually next to each other in the list. 4773 // To help reduce the number of CSE recomputations, process all 4774 // the uses of this user that we can find this way. 4775 do { 4776 SDUse &Use = UI.getUse(); 4777 4778 // Skip uses of different values from the same node. 4779 if (Use.getResNo() != From.getResNo()) { 4780 ++UI; 4781 continue; 4782 } 4783 4784 // If this node hasn't been modified yet, it's still in the CSE maps, 4785 // so remove its old self from the CSE maps. 4786 if (!UserRemovedFromCSEMaps) { 4787 RemoveNodeFromCSEMaps(User); 4788 UserRemovedFromCSEMaps = true; 4789 } 4790 4791 ++UI; 4792 Use.set(To); 4793 } while (UI != UE && *UI == User); 4794 4795 // We are iterating over all uses of the From node, so if a use 4796 // doesn't use the specific value, no changes are made. 4797 if (!UserRemovedFromCSEMaps) 4798 continue; 4799 4800 // Now that we have modified User, add it back to the CSE maps. If it 4801 // already exists there, recursively merge the results together. 4802 AddModifiedNodeToCSEMaps(User, UpdateListener); 4803 } 4804} 4805 4806namespace { 4807 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 4808 /// to record information about a use. 4809 struct UseMemo { 4810 SDNode *User; 4811 unsigned Index; 4812 SDUse *Use; 4813 }; 4814 4815 /// operator< - Sort Memos by User. 4816 bool operator<(const UseMemo &L, const UseMemo &R) { 4817 return (intptr_t)L.User < (intptr_t)R.User; 4818 } 4819} 4820 4821/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 4822/// uses of other values produced by From.getNode() alone. The same value 4823/// may appear in both the From and To list. The Deleted vector is 4824/// handled the same way as for ReplaceAllUsesWith. 4825void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 4826 const SDValue *To, 4827 unsigned Num, 4828 DAGUpdateListener *UpdateListener){ 4829 // Handle the simple, trivial case efficiently. 4830 if (Num == 1) 4831 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 4832 4833 // Read up all the uses and make records of them. This helps 4834 // processing new uses that are introduced during the 4835 // replacement process. 4836 SmallVector<UseMemo, 4> Uses; 4837 for (unsigned i = 0; i != Num; ++i) { 4838 unsigned FromResNo = From[i].getResNo(); 4839 SDNode *FromNode = From[i].getNode(); 4840 for (SDNode::use_iterator UI = FromNode->use_begin(), 4841 E = FromNode->use_end(); UI != E; ++UI) { 4842 SDUse &Use = UI.getUse(); 4843 if (Use.getResNo() == FromResNo) { 4844 UseMemo Memo = { *UI, i, &Use }; 4845 Uses.push_back(Memo); 4846 } 4847 } 4848 } 4849 4850 // Sort the uses, so that all the uses from a given User are together. 4851 std::sort(Uses.begin(), Uses.end()); 4852 4853 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 4854 UseIndex != UseIndexEnd; ) { 4855 // We know that this user uses some value of From. If it is the right 4856 // value, update it. 4857 SDNode *User = Uses[UseIndex].User; 4858 4859 // This node is about to morph, remove its old self from the CSE maps. 4860 RemoveNodeFromCSEMaps(User); 4861 4862 // The Uses array is sorted, so all the uses for a given User 4863 // are next to each other in the list. 4864 // To help reduce the number of CSE recomputations, process all 4865 // the uses of this user that we can find this way. 4866 do { 4867 unsigned i = Uses[UseIndex].Index; 4868 SDUse &Use = *Uses[UseIndex].Use; 4869 ++UseIndex; 4870 4871 Use.set(To[i]); 4872 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 4873 4874 // Now that we have modified User, add it back to the CSE maps. If it 4875 // already exists there, recursively merge the results together. 4876 AddModifiedNodeToCSEMaps(User, UpdateListener); 4877 } 4878} 4879 4880/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4881/// based on their topological order. It returns the maximum id and a vector 4882/// of the SDNodes* in assigned order by reference. 4883unsigned SelectionDAG::AssignTopologicalOrder() { 4884 4885 unsigned DAGSize = 0; 4886 4887 // SortedPos tracks the progress of the algorithm. Nodes before it are 4888 // sorted, nodes after it are unsorted. When the algorithm completes 4889 // it is at the end of the list. 4890 allnodes_iterator SortedPos = allnodes_begin(); 4891 4892 // Visit all the nodes. Move nodes with no operands to the front of 4893 // the list immediately. Annotate nodes that do have operands with their 4894 // operand count. Before we do this, the Node Id fields of the nodes 4895 // may contain arbitrary values. After, the Node Id fields for nodes 4896 // before SortedPos will contain the topological sort index, and the 4897 // Node Id fields for nodes At SortedPos and after will contain the 4898 // count of outstanding operands. 4899 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 4900 SDNode *N = I++; 4901 unsigned Degree = N->getNumOperands(); 4902 if (Degree == 0) { 4903 // A node with no uses, add it to the result array immediately. 4904 N->setNodeId(DAGSize++); 4905 allnodes_iterator Q = N; 4906 if (Q != SortedPos) 4907 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 4908 ++SortedPos; 4909 } else { 4910 // Temporarily use the Node Id as scratch space for the degree count. 4911 N->setNodeId(Degree); 4912 } 4913 } 4914 4915 // Visit all the nodes. As we iterate, moves nodes into sorted order, 4916 // such that by the time the end is reached all nodes will be sorted. 4917 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 4918 SDNode *N = I; 4919 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 4920 UI != UE; ++UI) { 4921 SDNode *P = *UI; 4922 unsigned Degree = P->getNodeId(); 4923 --Degree; 4924 if (Degree == 0) { 4925 // All of P's operands are sorted, so P may sorted now. 4926 P->setNodeId(DAGSize++); 4927 if (P != SortedPos) 4928 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 4929 ++SortedPos; 4930 } else { 4931 // Update P's outstanding operand count. 4932 P->setNodeId(Degree); 4933 } 4934 } 4935 } 4936 4937 assert(SortedPos == AllNodes.end() && 4938 "Topological sort incomplete!"); 4939 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 4940 "First node in topological sort is not the entry token!"); 4941 assert(AllNodes.front().getNodeId() == 0 && 4942 "First node in topological sort has non-zero id!"); 4943 assert(AllNodes.front().getNumOperands() == 0 && 4944 "First node in topological sort has operands!"); 4945 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 4946 "Last node in topologic sort has unexpected id!"); 4947 assert(AllNodes.back().use_empty() && 4948 "Last node in topologic sort has users!"); 4949 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 4950 return DAGSize; 4951} 4952 4953 4954 4955//===----------------------------------------------------------------------===// 4956// SDNode Class 4957//===----------------------------------------------------------------------===// 4958 4959HandleSDNode::~HandleSDNode() { 4960 DropOperands(); 4961} 4962 4963GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 4964 EVT VT, int64_t o, unsigned char TF) 4965 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)), 4966 Offset(o), TargetFlags(TF) { 4967 TheGlobal = const_cast<GlobalValue*>(GA); 4968} 4969 4970MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 4971 const Value *srcValue, int SVO, unsigned alignment, 4972 bool vol) 4973 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) { 4974 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment); 4975 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4976 assert(getOriginalAlignment() == alignment && "Alignment encoding error!"); 4977 assert(isVolatile() == vol && "Volatile encoding error!"); 4978} 4979 4980MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 4981 const SDValue *Ops, unsigned NumOps, EVT memvt, 4982 const Value *srcValue, int SVO, unsigned alignment, 4983 bool vol) 4984 : SDNode(Opc, dl, VTs, Ops, NumOps), 4985 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) { 4986 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment); 4987 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4988 assert(getOriginalAlignment() == alignment && "Alignment encoding error!"); 4989 assert(isVolatile() == vol && "Volatile encoding error!"); 4990} 4991 4992/// getMemOperand - Return a MachineMemOperand object describing the memory 4993/// reference performed by this memory reference. 4994MachineMemOperand MemSDNode::getMemOperand() const { 4995 int Flags = 0; 4996 if (isa<LoadSDNode>(this)) 4997 Flags = MachineMemOperand::MOLoad; 4998 else if (isa<StoreSDNode>(this)) 4999 Flags = MachineMemOperand::MOStore; 5000 else if (isa<AtomicSDNode>(this)) { 5001 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 5002 } 5003 else { 5004 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 5005 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 5006 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 5007 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 5008 } 5009 5010 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 5011 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 5012 5013 // Check if the memory reference references a frame index 5014 const FrameIndexSDNode *FI = 5015 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 5016 if (!getSrcValue() && FI) 5017 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 5018 Flags, 0, Size, getAlignment()); 5019 else 5020 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 5021 Size, getAlignment()); 5022} 5023 5024/// Profile - Gather unique data for the node. 5025/// 5026void SDNode::Profile(FoldingSetNodeID &ID) const { 5027 AddNodeIDNode(ID, this); 5028} 5029 5030namespace { 5031 struct EVTArray { 5032 std::vector<EVT> VTs; 5033 5034 EVTArray() { 5035 VTs.reserve(MVT::LAST_VALUETYPE); 5036 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5037 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5038 } 5039 }; 5040} 5041 5042static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5043static ManagedStatic<EVTArray> SimpleVTArray; 5044static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5045 5046/// getValueTypeList - Return a pointer to the specified value type. 5047/// 5048const EVT *SDNode::getValueTypeList(EVT VT) { 5049 if (VT.isExtended()) { 5050 sys::SmartScopedLock<true> Lock(*VTMutex); 5051 return &(*EVTs->insert(VT).first); 5052 } else { 5053 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5054 } 5055} 5056 5057/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5058/// indicated value. This method ignores uses of other values defined by this 5059/// operation. 5060bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5061 assert(Value < getNumValues() && "Bad value!"); 5062 5063 // TODO: Only iterate over uses of a given value of the node 5064 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5065 if (UI.getUse().getResNo() == Value) { 5066 if (NUses == 0) 5067 return false; 5068 --NUses; 5069 } 5070 } 5071 5072 // Found exactly the right number of uses? 5073 return NUses == 0; 5074} 5075 5076 5077/// hasAnyUseOfValue - Return true if there are any use of the indicated 5078/// value. This method ignores uses of other values defined by this operation. 5079bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5080 assert(Value < getNumValues() && "Bad value!"); 5081 5082 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5083 if (UI.getUse().getResNo() == Value) 5084 return true; 5085 5086 return false; 5087} 5088 5089 5090/// isOnlyUserOf - Return true if this node is the only use of N. 5091/// 5092bool SDNode::isOnlyUserOf(SDNode *N) const { 5093 bool Seen = false; 5094 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5095 SDNode *User = *I; 5096 if (User == this) 5097 Seen = true; 5098 else 5099 return false; 5100 } 5101 5102 return Seen; 5103} 5104 5105/// isOperand - Return true if this node is an operand of N. 5106/// 5107bool SDValue::isOperandOf(SDNode *N) const { 5108 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5109 if (*this == N->getOperand(i)) 5110 return true; 5111 return false; 5112} 5113 5114bool SDNode::isOperandOf(SDNode *N) const { 5115 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5116 if (this == N->OperandList[i].getNode()) 5117 return true; 5118 return false; 5119} 5120 5121/// reachesChainWithoutSideEffects - Return true if this operand (which must 5122/// be a chain) reaches the specified operand without crossing any 5123/// side-effecting instructions. In practice, this looks through token 5124/// factors and non-volatile loads. In order to remain efficient, this only 5125/// looks a couple of nodes in, it does not do an exhaustive search. 5126bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5127 unsigned Depth) const { 5128 if (*this == Dest) return true; 5129 5130 // Don't search too deeply, we just want to be able to see through 5131 // TokenFactor's etc. 5132 if (Depth == 0) return false; 5133 5134 // If this is a token factor, all inputs to the TF happen in parallel. If any 5135 // of the operands of the TF reach dest, then we can do the xform. 5136 if (getOpcode() == ISD::TokenFactor) { 5137 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5138 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5139 return true; 5140 return false; 5141 } 5142 5143 // Loads don't have side effects, look through them. 5144 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5145 if (!Ld->isVolatile()) 5146 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5147 } 5148 return false; 5149} 5150 5151 5152static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 5153 SmallPtrSet<SDNode *, 32> &Visited) { 5154 if (found || !Visited.insert(N)) 5155 return; 5156 5157 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 5158 SDNode *Op = N->getOperand(i).getNode(); 5159 if (Op == P) { 5160 found = true; 5161 return; 5162 } 5163 findPredecessor(Op, P, found, Visited); 5164 } 5165} 5166 5167/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5168/// is either an operand of N or it can be reached by recursively traversing 5169/// up the operands. 5170/// NOTE: this is an expensive method. Use it carefully. 5171bool SDNode::isPredecessorOf(SDNode *N) const { 5172 SmallPtrSet<SDNode *, 32> Visited; 5173 bool found = false; 5174 findPredecessor(N, this, found, Visited); 5175 return found; 5176} 5177 5178uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5179 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5180 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5181} 5182 5183std::string SDNode::getOperationName(const SelectionDAG *G) const { 5184 switch (getOpcode()) { 5185 default: 5186 if (getOpcode() < ISD::BUILTIN_OP_END) 5187 return "<<Unknown DAG Node>>"; 5188 if (isMachineOpcode()) { 5189 if (G) 5190 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5191 if (getMachineOpcode() < TII->getNumOpcodes()) 5192 return TII->get(getMachineOpcode()).getName(); 5193 return "<<Unknown Machine Node>>"; 5194 } 5195 if (G) { 5196 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5197 const char *Name = TLI.getTargetNodeName(getOpcode()); 5198 if (Name) return Name; 5199 return "<<Unknown Target Node>>"; 5200 } 5201 return "<<Unknown Node>>"; 5202 5203#ifndef NDEBUG 5204 case ISD::DELETED_NODE: 5205 return "<<Deleted Node!>>"; 5206#endif 5207 case ISD::PREFETCH: return "Prefetch"; 5208 case ISD::MEMBARRIER: return "MemBarrier"; 5209 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5210 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5211 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5212 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5213 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5214 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5215 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5216 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5217 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5218 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5219 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5220 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5221 case ISD::PCMARKER: return "PCMarker"; 5222 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5223 case ISD::SRCVALUE: return "SrcValue"; 5224 case ISD::MEMOPERAND: return "MemOperand"; 5225 case ISD::EntryToken: return "EntryToken"; 5226 case ISD::TokenFactor: return "TokenFactor"; 5227 case ISD::AssertSext: return "AssertSext"; 5228 case ISD::AssertZext: return "AssertZext"; 5229 5230 case ISD::BasicBlock: return "BasicBlock"; 5231 case ISD::VALUETYPE: return "ValueType"; 5232 case ISD::Register: return "Register"; 5233 5234 case ISD::Constant: return "Constant"; 5235 case ISD::ConstantFP: return "ConstantFP"; 5236 case ISD::GlobalAddress: return "GlobalAddress"; 5237 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5238 case ISD::FrameIndex: return "FrameIndex"; 5239 case ISD::JumpTable: return "JumpTable"; 5240 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5241 case ISD::RETURNADDR: return "RETURNADDR"; 5242 case ISD::FRAMEADDR: return "FRAMEADDR"; 5243 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5244 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5245 case ISD::LSDAADDR: return "LSDAADDR"; 5246 case ISD::EHSELECTION: return "EHSELECTION"; 5247 case ISD::EH_RETURN: return "EH_RETURN"; 5248 case ISD::ConstantPool: return "ConstantPool"; 5249 case ISD::ExternalSymbol: return "ExternalSymbol"; 5250 case ISD::INTRINSIC_WO_CHAIN: { 5251 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5252 return Intrinsic::getName((Intrinsic::ID)IID); 5253 } 5254 case ISD::INTRINSIC_VOID: 5255 case ISD::INTRINSIC_W_CHAIN: { 5256 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5257 return Intrinsic::getName((Intrinsic::ID)IID); 5258 } 5259 5260 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5261 case ISD::TargetConstant: return "TargetConstant"; 5262 case ISD::TargetConstantFP:return "TargetConstantFP"; 5263 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5264 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5265 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5266 case ISD::TargetJumpTable: return "TargetJumpTable"; 5267 case ISD::TargetConstantPool: return "TargetConstantPool"; 5268 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5269 5270 case ISD::CopyToReg: return "CopyToReg"; 5271 case ISD::CopyFromReg: return "CopyFromReg"; 5272 case ISD::UNDEF: return "undef"; 5273 case ISD::MERGE_VALUES: return "merge_values"; 5274 case ISD::INLINEASM: return "inlineasm"; 5275 case ISD::DBG_LABEL: return "dbg_label"; 5276 case ISD::EH_LABEL: return "eh_label"; 5277 case ISD::HANDLENODE: return "handlenode"; 5278 5279 // Unary operators 5280 case ISD::FABS: return "fabs"; 5281 case ISD::FNEG: return "fneg"; 5282 case ISD::FSQRT: return "fsqrt"; 5283 case ISD::FSIN: return "fsin"; 5284 case ISD::FCOS: return "fcos"; 5285 case ISD::FPOWI: return "fpowi"; 5286 case ISD::FPOW: return "fpow"; 5287 case ISD::FTRUNC: return "ftrunc"; 5288 case ISD::FFLOOR: return "ffloor"; 5289 case ISD::FCEIL: return "fceil"; 5290 case ISD::FRINT: return "frint"; 5291 case ISD::FNEARBYINT: return "fnearbyint"; 5292 5293 // Binary operators 5294 case ISD::ADD: return "add"; 5295 case ISD::SUB: return "sub"; 5296 case ISD::MUL: return "mul"; 5297 case ISD::MULHU: return "mulhu"; 5298 case ISD::MULHS: return "mulhs"; 5299 case ISD::SDIV: return "sdiv"; 5300 case ISD::UDIV: return "udiv"; 5301 case ISD::SREM: return "srem"; 5302 case ISD::UREM: return "urem"; 5303 case ISD::SMUL_LOHI: return "smul_lohi"; 5304 case ISD::UMUL_LOHI: return "umul_lohi"; 5305 case ISD::SDIVREM: return "sdivrem"; 5306 case ISD::UDIVREM: return "udivrem"; 5307 case ISD::AND: return "and"; 5308 case ISD::OR: return "or"; 5309 case ISD::XOR: return "xor"; 5310 case ISD::SHL: return "shl"; 5311 case ISD::SRA: return "sra"; 5312 case ISD::SRL: return "srl"; 5313 case ISD::ROTL: return "rotl"; 5314 case ISD::ROTR: return "rotr"; 5315 case ISD::FADD: return "fadd"; 5316 case ISD::FSUB: return "fsub"; 5317 case ISD::FMUL: return "fmul"; 5318 case ISD::FDIV: return "fdiv"; 5319 case ISD::FREM: return "frem"; 5320 case ISD::FCOPYSIGN: return "fcopysign"; 5321 case ISD::FGETSIGN: return "fgetsign"; 5322 5323 case ISD::SETCC: return "setcc"; 5324 case ISD::VSETCC: return "vsetcc"; 5325 case ISD::SELECT: return "select"; 5326 case ISD::SELECT_CC: return "select_cc"; 5327 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5328 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5329 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5330 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5331 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5332 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5333 case ISD::CARRY_FALSE: return "carry_false"; 5334 case ISD::ADDC: return "addc"; 5335 case ISD::ADDE: return "adde"; 5336 case ISD::SADDO: return "saddo"; 5337 case ISD::UADDO: return "uaddo"; 5338 case ISD::SSUBO: return "ssubo"; 5339 case ISD::USUBO: return "usubo"; 5340 case ISD::SMULO: return "smulo"; 5341 case ISD::UMULO: return "umulo"; 5342 case ISD::SUBC: return "subc"; 5343 case ISD::SUBE: return "sube"; 5344 case ISD::SHL_PARTS: return "shl_parts"; 5345 case ISD::SRA_PARTS: return "sra_parts"; 5346 case ISD::SRL_PARTS: return "srl_parts"; 5347 5348 // Conversion operators. 5349 case ISD::SIGN_EXTEND: return "sign_extend"; 5350 case ISD::ZERO_EXTEND: return "zero_extend"; 5351 case ISD::ANY_EXTEND: return "any_extend"; 5352 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5353 case ISD::TRUNCATE: return "truncate"; 5354 case ISD::FP_ROUND: return "fp_round"; 5355 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5356 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5357 case ISD::FP_EXTEND: return "fp_extend"; 5358 5359 case ISD::SINT_TO_FP: return "sint_to_fp"; 5360 case ISD::UINT_TO_FP: return "uint_to_fp"; 5361 case ISD::FP_TO_SINT: return "fp_to_sint"; 5362 case ISD::FP_TO_UINT: return "fp_to_uint"; 5363 case ISD::BIT_CONVERT: return "bit_convert"; 5364 5365 case ISD::CONVERT_RNDSAT: { 5366 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5367 default: llvm_unreachable("Unknown cvt code!"); 5368 case ISD::CVT_FF: return "cvt_ff"; 5369 case ISD::CVT_FS: return "cvt_fs"; 5370 case ISD::CVT_FU: return "cvt_fu"; 5371 case ISD::CVT_SF: return "cvt_sf"; 5372 case ISD::CVT_UF: return "cvt_uf"; 5373 case ISD::CVT_SS: return "cvt_ss"; 5374 case ISD::CVT_SU: return "cvt_su"; 5375 case ISD::CVT_US: return "cvt_us"; 5376 case ISD::CVT_UU: return "cvt_uu"; 5377 } 5378 } 5379 5380 // Control flow instructions 5381 case ISD::BR: return "br"; 5382 case ISD::BRIND: return "brind"; 5383 case ISD::BR_JT: return "br_jt"; 5384 case ISD::BRCOND: return "brcond"; 5385 case ISD::BR_CC: return "br_cc"; 5386 case ISD::CALLSEQ_START: return "callseq_start"; 5387 case ISD::CALLSEQ_END: return "callseq_end"; 5388 5389 // Other operators 5390 case ISD::LOAD: return "load"; 5391 case ISD::STORE: return "store"; 5392 case ISD::VAARG: return "vaarg"; 5393 case ISD::VACOPY: return "vacopy"; 5394 case ISD::VAEND: return "vaend"; 5395 case ISD::VASTART: return "vastart"; 5396 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5397 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5398 case ISD::BUILD_PAIR: return "build_pair"; 5399 case ISD::STACKSAVE: return "stacksave"; 5400 case ISD::STACKRESTORE: return "stackrestore"; 5401 case ISD::TRAP: return "trap"; 5402 5403 // Bit manipulation 5404 case ISD::BSWAP: return "bswap"; 5405 case ISD::CTPOP: return "ctpop"; 5406 case ISD::CTTZ: return "cttz"; 5407 case ISD::CTLZ: return "ctlz"; 5408 5409 // Debug info 5410 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5411 case ISD::DEBUG_LOC: return "debug_loc"; 5412 5413 // Trampolines 5414 case ISD::TRAMPOLINE: return "trampoline"; 5415 5416 case ISD::CONDCODE: 5417 switch (cast<CondCodeSDNode>(this)->get()) { 5418 default: llvm_unreachable("Unknown setcc condition!"); 5419 case ISD::SETOEQ: return "setoeq"; 5420 case ISD::SETOGT: return "setogt"; 5421 case ISD::SETOGE: return "setoge"; 5422 case ISD::SETOLT: return "setolt"; 5423 case ISD::SETOLE: return "setole"; 5424 case ISD::SETONE: return "setone"; 5425 5426 case ISD::SETO: return "seto"; 5427 case ISD::SETUO: return "setuo"; 5428 case ISD::SETUEQ: return "setue"; 5429 case ISD::SETUGT: return "setugt"; 5430 case ISD::SETUGE: return "setuge"; 5431 case ISD::SETULT: return "setult"; 5432 case ISD::SETULE: return "setule"; 5433 case ISD::SETUNE: return "setune"; 5434 5435 case ISD::SETEQ: return "seteq"; 5436 case ISD::SETGT: return "setgt"; 5437 case ISD::SETGE: return "setge"; 5438 case ISD::SETLT: return "setlt"; 5439 case ISD::SETLE: return "setle"; 5440 case ISD::SETNE: return "setne"; 5441 } 5442 } 5443} 5444 5445const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5446 switch (AM) { 5447 default: 5448 return ""; 5449 case ISD::PRE_INC: 5450 return "<pre-inc>"; 5451 case ISD::PRE_DEC: 5452 return "<pre-dec>"; 5453 case ISD::POST_INC: 5454 return "<post-inc>"; 5455 case ISD::POST_DEC: 5456 return "<post-dec>"; 5457 } 5458} 5459 5460std::string ISD::ArgFlagsTy::getArgFlagsString() { 5461 std::string S = "< "; 5462 5463 if (isZExt()) 5464 S += "zext "; 5465 if (isSExt()) 5466 S += "sext "; 5467 if (isInReg()) 5468 S += "inreg "; 5469 if (isSRet()) 5470 S += "sret "; 5471 if (isByVal()) 5472 S += "byval "; 5473 if (isNest()) 5474 S += "nest "; 5475 if (getByValAlign()) 5476 S += "byval-align:" + utostr(getByValAlign()) + " "; 5477 if (getOrigAlign()) 5478 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5479 if (getByValSize()) 5480 S += "byval-size:" + utostr(getByValSize()) + " "; 5481 return S + ">"; 5482} 5483 5484void SDNode::dump() const { dump(0); } 5485void SDNode::dump(const SelectionDAG *G) const { 5486 print(errs(), G); 5487} 5488 5489void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5490 OS << (void*)this << ": "; 5491 5492 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5493 if (i) OS << ","; 5494 if (getValueType(i) == MVT::Other) 5495 OS << "ch"; 5496 else 5497 OS << getValueType(i).getEVTString(); 5498 } 5499 OS << " = " << getOperationName(G); 5500} 5501 5502void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5503 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5504 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(this); 5505 OS << "<"; 5506 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5507 int Idx = SVN->getMaskElt(i); 5508 if (i) OS << ","; 5509 if (Idx < 0) 5510 OS << "u"; 5511 else 5512 OS << Idx; 5513 } 5514 OS << ">"; 5515 } 5516 5517 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5518 OS << '<' << CSDN->getAPIntValue() << '>'; 5519 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5520 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5521 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5522 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5523 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5524 else { 5525 OS << "<APFloat("; 5526 CSDN->getValueAPF().bitcastToAPInt().dump(); 5527 OS << ")>"; 5528 } 5529 } else if (const GlobalAddressSDNode *GADN = 5530 dyn_cast<GlobalAddressSDNode>(this)) { 5531 int64_t offset = GADN->getOffset(); 5532 OS << '<'; 5533 WriteAsOperand(OS, GADN->getGlobal()); 5534 OS << '>'; 5535 if (offset > 0) 5536 OS << " + " << offset; 5537 else 5538 OS << " " << offset; 5539 if (unsigned int TF = GADN->getTargetFlags()) 5540 OS << " [TF=" << TF << ']'; 5541 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5542 OS << "<" << FIDN->getIndex() << ">"; 5543 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5544 OS << "<" << JTDN->getIndex() << ">"; 5545 if (unsigned int TF = JTDN->getTargetFlags()) 5546 OS << " [TF=" << TF << ']'; 5547 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5548 int offset = CP->getOffset(); 5549 if (CP->isMachineConstantPoolEntry()) 5550 OS << "<" << *CP->getMachineCPVal() << ">"; 5551 else 5552 OS << "<" << *CP->getConstVal() << ">"; 5553 if (offset > 0) 5554 OS << " + " << offset; 5555 else 5556 OS << " " << offset; 5557 if (unsigned int TF = CP->getTargetFlags()) 5558 OS << " [TF=" << TF << ']'; 5559 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5560 OS << "<"; 5561 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5562 if (LBB) 5563 OS << LBB->getName() << " "; 5564 OS << (const void*)BBDN->getBasicBlock() << ">"; 5565 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5566 if (G && R->getReg() && 5567 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5568 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5569 } else { 5570 OS << " #" << R->getReg(); 5571 } 5572 } else if (const ExternalSymbolSDNode *ES = 5573 dyn_cast<ExternalSymbolSDNode>(this)) { 5574 OS << "'" << ES->getSymbol() << "'"; 5575 if (unsigned int TF = ES->getTargetFlags()) 5576 OS << " [TF=" << TF << ']'; 5577 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5578 if (M->getValue()) 5579 OS << "<" << M->getValue() << ">"; 5580 else 5581 OS << "<null>"; 5582 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5583 if (M->MO.getValue()) 5584 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5585 else 5586 OS << "<null:" << M->MO.getOffset() << ">"; 5587 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5588 OS << ":" << N->getVT().getEVTString(); 5589 } 5590 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5591 const Value *SrcValue = LD->getSrcValue(); 5592 int SrcOffset = LD->getSrcValueOffset(); 5593 OS << " <"; 5594 if (SrcValue) 5595 OS << SrcValue; 5596 else 5597 OS << "null"; 5598 OS << ":" << SrcOffset << ">"; 5599 5600 bool doExt = true; 5601 switch (LD->getExtensionType()) { 5602 default: doExt = false; break; 5603 case ISD::EXTLOAD: OS << " <anyext "; break; 5604 case ISD::SEXTLOAD: OS << " <sext "; break; 5605 case ISD::ZEXTLOAD: OS << " <zext "; break; 5606 } 5607 if (doExt) 5608 OS << LD->getMemoryVT().getEVTString() << ">"; 5609 5610 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5611 if (*AM) 5612 OS << " " << AM; 5613 if (LD->isVolatile()) 5614 OS << " <volatile>"; 5615 OS << " alignment=" << LD->getAlignment(); 5616 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5617 const Value *SrcValue = ST->getSrcValue(); 5618 int SrcOffset = ST->getSrcValueOffset(); 5619 OS << " <"; 5620 if (SrcValue) 5621 OS << SrcValue; 5622 else 5623 OS << "null"; 5624 OS << ":" << SrcOffset << ">"; 5625 5626 if (ST->isTruncatingStore()) 5627 OS << " <trunc " << ST->getMemoryVT().getEVTString() << ">"; 5628 5629 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5630 if (*AM) 5631 OS << " " << AM; 5632 if (ST->isVolatile()) 5633 OS << " <volatile>"; 5634 OS << " alignment=" << ST->getAlignment(); 5635 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5636 const Value *SrcValue = AT->getSrcValue(); 5637 int SrcOffset = AT->getSrcValueOffset(); 5638 OS << " <"; 5639 if (SrcValue) 5640 OS << SrcValue; 5641 else 5642 OS << "null"; 5643 OS << ":" << SrcOffset << ">"; 5644 if (AT->isVolatile()) 5645 OS << " <volatile>"; 5646 OS << " alignment=" << AT->getAlignment(); 5647 } 5648} 5649 5650void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5651 print_types(OS, G); 5652 OS << " "; 5653 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5654 if (i) OS << ", "; 5655 OS << (void*)getOperand(i).getNode(); 5656 if (unsigned RN = getOperand(i).getResNo()) 5657 OS << ":" << RN; 5658 } 5659 print_details(OS, G); 5660} 5661 5662static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5663 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5664 if (N->getOperand(i).getNode()->hasOneUse()) 5665 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5666 else 5667 errs() << "\n" << std::string(indent+2, ' ') 5668 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5669 5670 5671 errs() << "\n"; 5672 errs().indent(indent); 5673 N->dump(G); 5674} 5675 5676void SelectionDAG::dump() const { 5677 errs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5678 5679 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5680 I != E; ++I) { 5681 const SDNode *N = I; 5682 if (!N->hasOneUse() && N != getRoot().getNode()) 5683 DumpNodes(N, 2, this); 5684 } 5685 5686 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 5687 5688 errs() << "\n\n"; 5689} 5690 5691void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 5692 print_types(OS, G); 5693 print_details(OS, G); 5694} 5695 5696typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 5697static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 5698 const SelectionDAG *G, VisitedSDNodeSet &once) { 5699 if (!once.insert(N)) // If we've been here before, return now. 5700 return; 5701 // Dump the current SDNode, but don't end the line yet. 5702 OS << std::string(indent, ' '); 5703 N->printr(OS, G); 5704 // Having printed this SDNode, walk the children: 5705 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5706 const SDNode *child = N->getOperand(i).getNode(); 5707 if (i) OS << ","; 5708 OS << " "; 5709 if (child->getNumOperands() == 0) { 5710 // This child has no grandchildren; print it inline right here. 5711 child->printr(OS, G); 5712 once.insert(child); 5713 } else { // Just the address. FIXME: also print the child's opcode 5714 OS << (void*)child; 5715 if (unsigned RN = N->getOperand(i).getResNo()) 5716 OS << ":" << RN; 5717 } 5718 } 5719 OS << "\n"; 5720 // Dump children that have grandchildren on their own line(s). 5721 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5722 const SDNode *child = N->getOperand(i).getNode(); 5723 DumpNodesr(OS, child, indent+2, G, once); 5724 } 5725} 5726 5727void SDNode::dumpr() const { 5728 VisitedSDNodeSet once; 5729 DumpNodesr(errs(), this, 0, 0, once); 5730} 5731 5732 5733// getAddressSpace - Return the address space this GlobalAddress belongs to. 5734unsigned GlobalAddressSDNode::getAddressSpace() const { 5735 return getGlobal()->getType()->getAddressSpace(); 5736} 5737 5738 5739const Type *ConstantPoolSDNode::getType() const { 5740 if (isMachineConstantPoolEntry()) 5741 return Val.MachineCPVal->getType(); 5742 return Val.ConstVal->getType(); 5743} 5744 5745bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 5746 APInt &SplatUndef, 5747 unsigned &SplatBitSize, 5748 bool &HasAnyUndefs, 5749 unsigned MinSplatBits) { 5750 EVT VT = getValueType(0); 5751 assert(VT.isVector() && "Expected a vector type"); 5752 unsigned sz = VT.getSizeInBits(); 5753 if (MinSplatBits > sz) 5754 return false; 5755 5756 SplatValue = APInt(sz, 0); 5757 SplatUndef = APInt(sz, 0); 5758 5759 // Get the bits. Bits with undefined values (when the corresponding element 5760 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 5761 // in SplatValue. If any of the values are not constant, give up and return 5762 // false. 5763 unsigned int nOps = getNumOperands(); 5764 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 5765 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 5766 for (unsigned i = 0; i < nOps; ++i) { 5767 SDValue OpVal = getOperand(i); 5768 unsigned BitPos = i * EltBitSize; 5769 5770 if (OpVal.getOpcode() == ISD::UNDEF) 5771 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize); 5772 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 5773 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 5774 zextOrTrunc(sz) << BitPos); 5775 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 5776 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 5777 else 5778 return false; 5779 } 5780 5781 // The build_vector is all constants or undefs. Find the smallest element 5782 // size that splats the vector. 5783 5784 HasAnyUndefs = (SplatUndef != 0); 5785 while (sz > 8) { 5786 5787 unsigned HalfSize = sz / 2; 5788 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 5789 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 5790 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 5791 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 5792 5793 // If the two halves do not match (ignoring undef bits), stop here. 5794 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 5795 MinSplatBits > HalfSize) 5796 break; 5797 5798 SplatValue = HighValue | LowValue; 5799 SplatUndef = HighUndef & LowUndef; 5800 5801 sz = HalfSize; 5802 } 5803 5804 SplatBitSize = sz; 5805 return true; 5806} 5807 5808bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 5809 // Find the first non-undef value in the shuffle mask. 5810 unsigned i, e; 5811 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 5812 /* search */; 5813 5814 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 5815 5816 // Make sure all remaining elements are either undef or the same as the first 5817 // non-undef value. 5818 for (int Idx = Mask[i]; i != e; ++i) 5819 if (Mask[i] >= 0 && Mask[i] != Idx) 5820 return false; 5821 return true; 5822} 5823