SelectionDAG.cpp revision 86ac7a2df2f4a98d1ccf3460e9a0d6e13acdc868
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetFrameInfo.h" 35#include "llvm/Target/TargetLowering.h" 36#include "llvm/Target/TargetSelectionDAGInfo.h" 37#include "llvm/Target/TargetOptions.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetIntrinsicInfo.h" 40#include "llvm/Target/TargetMachine.h" 41#include "llvm/Support/CommandLine.h" 42#include "llvm/Support/Debug.h" 43#include "llvm/Support/ErrorHandling.h" 44#include "llvm/Support/ManagedStatic.h" 45#include "llvm/Support/MathExtras.h" 46#include "llvm/Support/raw_ostream.h" 47#include "llvm/System/Mutex.h" 48#include "llvm/ADT/SetVector.h" 49#include "llvm/ADT/SmallPtrSet.h" 50#include "llvm/ADT/SmallSet.h" 51#include "llvm/ADT/SmallVector.h" 52#include "llvm/ADT/StringExtras.h" 53#include <algorithm> 54#include <cmath> 55using namespace llvm; 56 57/// makeVTList - Return an instance of the SDVTList struct initialized with the 58/// specified members. 59static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 60 SDVTList Res = {VTs, NumVTs}; 61 return Res; 62} 63 64static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 65 switch (VT.getSimpleVT().SimpleTy) { 66 default: llvm_unreachable("Unknown FP format"); 67 case MVT::f32: return &APFloat::IEEEsingle; 68 case MVT::f64: return &APFloat::IEEEdouble; 69 case MVT::f80: return &APFloat::x87DoubleExtended; 70 case MVT::f128: return &APFloat::IEEEquad; 71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 72 } 73} 74 75SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 76 77//===----------------------------------------------------------------------===// 78// ConstantFPSDNode Class 79//===----------------------------------------------------------------------===// 80 81/// isExactlyValue - We don't rely on operator== working on double values, as 82/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 83/// As such, this method can be used to do an exact bit-for-bit comparison of 84/// two floating point values. 85bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 86 return getValueAPF().bitwiseIsEqual(V); 87} 88 89bool ConstantFPSDNode::isValueValidForType(EVT VT, 90 const APFloat& Val) { 91 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 92 93 // PPC long double cannot be converted to any other type. 94 if (VT == MVT::ppcf128 || 95 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 96 return false; 97 98 // convert modifies in place, so make a copy. 99 APFloat Val2 = APFloat(Val); 100 bool losesInfo; 101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 102 &losesInfo); 103 return !losesInfo; 104} 105 106//===----------------------------------------------------------------------===// 107// ISD Namespace 108//===----------------------------------------------------------------------===// 109 110/// isBuildVectorAllOnes - Return true if the specified node is a 111/// BUILD_VECTOR where all of the elements are ~0 or undef. 112bool ISD::isBuildVectorAllOnes(const SDNode *N) { 113 // Look through a bit convert. 114 if (N->getOpcode() == ISD::BIT_CONVERT) 115 N = N->getOperand(0).getNode(); 116 117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 118 119 unsigned i = 0, e = N->getNumOperands(); 120 121 // Skip over all of the undef values. 122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 123 ++i; 124 125 // Do not accept an all-undef vector. 126 if (i == e) return false; 127 128 // Do not accept build_vectors that aren't all constants or which have non-~0 129 // elements. 130 SDValue NotZero = N->getOperand(i); 131 if (isa<ConstantSDNode>(NotZero)) { 132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 133 return false; 134 } else if (isa<ConstantFPSDNode>(NotZero)) { 135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 136 bitcastToAPInt().isAllOnesValue()) 137 return false; 138 } else 139 return false; 140 141 // Okay, we have at least one ~0 value, check to see if the rest match or are 142 // undefs. 143 for (++i; i != e; ++i) 144 if (N->getOperand(i) != NotZero && 145 N->getOperand(i).getOpcode() != ISD::UNDEF) 146 return false; 147 return true; 148} 149 150 151/// isBuildVectorAllZeros - Return true if the specified node is a 152/// BUILD_VECTOR where all of the elements are 0 or undef. 153bool ISD::isBuildVectorAllZeros(const SDNode *N) { 154 // Look through a bit convert. 155 if (N->getOpcode() == ISD::BIT_CONVERT) 156 N = N->getOperand(0).getNode(); 157 158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 159 160 unsigned i = 0, e = N->getNumOperands(); 161 162 // Skip over all of the undef values. 163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 164 ++i; 165 166 // Do not accept an all-undef vector. 167 if (i == e) return false; 168 169 // Do not accept build_vectors that aren't all constants or which have non-0 170 // elements. 171 SDValue Zero = N->getOperand(i); 172 if (isa<ConstantSDNode>(Zero)) { 173 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 174 return false; 175 } else if (isa<ConstantFPSDNode>(Zero)) { 176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 177 return false; 178 } else 179 return false; 180 181 // Okay, we have at least one 0 value, check to see if the rest match or are 182 // undefs. 183 for (++i; i != e; ++i) 184 if (N->getOperand(i) != Zero && 185 N->getOperand(i).getOpcode() != ISD::UNDEF) 186 return false; 187 return true; 188} 189 190/// isScalarToVector - Return true if the specified node is a 191/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 192/// element is not an undef. 193bool ISD::isScalarToVector(const SDNode *N) { 194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 195 return true; 196 197 if (N->getOpcode() != ISD::BUILD_VECTOR) 198 return false; 199 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 200 return false; 201 unsigned NumElems = N->getNumOperands(); 202 for (unsigned i = 1; i < NumElems; ++i) { 203 SDValue V = N->getOperand(i); 204 if (V.getOpcode() != ISD::UNDEF) 205 return false; 206 } 207 return true; 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 231 if (Operation > ISD::SETTRUE2) 232 Operation &= ~8; // Don't let N and U bits get set. 233 234 return ISD::CondCode(Operation); 235} 236 237 238/// isSignedOp - For an integer comparison, return 1 if the comparison is a 239/// signed operation and 2 if the result is an unsigned comparison. Return zero 240/// if the operation does not depend on the sign of the input (setne and seteq). 241static int isSignedOp(ISD::CondCode Opcode) { 242 switch (Opcode) { 243 default: llvm_unreachable("Illegal integer setcc operation!"); 244 case ISD::SETEQ: 245 case ISD::SETNE: return 0; 246 case ISD::SETLT: 247 case ISD::SETLE: 248 case ISD::SETGT: 249 case ISD::SETGE: return 1; 250 case ISD::SETULT: 251 case ISD::SETULE: 252 case ISD::SETUGT: 253 case ISD::SETUGE: return 2; 254 } 255} 256 257/// getSetCCOrOperation - Return the result of a logical OR between different 258/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 259/// returns SETCC_INVALID if it is not possible to represent the resultant 260/// comparison. 261ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 262 bool isInteger) { 263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 264 // Cannot fold a signed integer setcc with an unsigned integer setcc. 265 return ISD::SETCC_INVALID; 266 267 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 268 269 // If the N and U bits get set then the resultant comparison DOES suddenly 270 // care about orderedness, and is true when ordered. 271 if (Op > ISD::SETTRUE2) 272 Op &= ~16; // Clear the U bit if the N bit is set. 273 274 // Canonicalize illegal integer setcc's. 275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 276 Op = ISD::SETNE; 277 278 return ISD::CondCode(Op); 279} 280 281/// getSetCCAndOperation - Return the result of a logical AND between different 282/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 283/// function returns zero if it is not possible to represent the resultant 284/// comparison. 285ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 286 bool isInteger) { 287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 288 // Cannot fold a signed setcc with an unsigned setcc. 289 return ISD::SETCC_INVALID; 290 291 // Combine all of the condition bits. 292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 293 294 // Canonicalize illegal integer setcc's. 295 if (isInteger) { 296 switch (Result) { 297 default: break; 298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 299 case ISD::SETOEQ: // SETEQ & SETU[LG]E 300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 303 } 304 } 305 306 return Result; 307} 308 309//===----------------------------------------------------------------------===// 310// SDNode Profile Support 311//===----------------------------------------------------------------------===// 312 313/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 314/// 315static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 316 ID.AddInteger(OpC); 317} 318 319/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 320/// solely with their pointer. 321static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 322 ID.AddPointer(VTList.VTs); 323} 324 325/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 326/// 327static void AddNodeIDOperands(FoldingSetNodeID &ID, 328 const SDValue *Ops, unsigned NumOps) { 329 for (; NumOps; --NumOps, ++Ops) { 330 ID.AddPointer(Ops->getNode()); 331 ID.AddInteger(Ops->getResNo()); 332 } 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDUse *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345static void AddNodeIDNode(FoldingSetNodeID &ID, 346 unsigned short OpC, SDVTList VTList, 347 const SDValue *OpList, unsigned N) { 348 AddNodeIDOpcode(ID, OpC); 349 AddNodeIDValueTypes(ID, VTList); 350 AddNodeIDOperands(ID, OpList, N); 351} 352 353/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 354/// the NodeID data. 355static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 356 switch (N->getOpcode()) { 357 case ISD::TargetExternalSymbol: 358 case ISD::ExternalSymbol: 359 llvm_unreachable("Should only be used on nodes with operands"); 360 default: break; // Normal nodes don't need extra info. 361 case ISD::TargetConstant: 362 case ISD::Constant: 363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 364 break; 365 case ISD::TargetConstantFP: 366 case ISD::ConstantFP: { 367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 368 break; 369 } 370 case ISD::TargetGlobalAddress: 371 case ISD::GlobalAddress: 372 case ISD::TargetGlobalTLSAddress: 373 case ISD::GlobalTLSAddress: { 374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 375 ID.AddPointer(GA->getGlobal()); 376 ID.AddInteger(GA->getOffset()); 377 ID.AddInteger(GA->getTargetFlags()); 378 break; 379 } 380 case ISD::BasicBlock: 381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 382 break; 383 case ISD::Register: 384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 385 break; 386 387 case ISD::SRCVALUE: 388 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 389 break; 390 case ISD::FrameIndex: 391 case ISD::TargetFrameIndex: 392 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 393 break; 394 case ISD::JumpTable: 395 case ISD::TargetJumpTable: 396 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 398 break; 399 case ISD::ConstantPool: 400 case ISD::TargetConstantPool: { 401 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 402 ID.AddInteger(CP->getAlignment()); 403 ID.AddInteger(CP->getOffset()); 404 if (CP->isMachineConstantPoolEntry()) 405 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 406 else 407 ID.AddPointer(CP->getConstVal()); 408 ID.AddInteger(CP->getTargetFlags()); 409 break; 410 } 411 case ISD::LOAD: { 412 const LoadSDNode *LD = cast<LoadSDNode>(N); 413 ID.AddInteger(LD->getMemoryVT().getRawBits()); 414 ID.AddInteger(LD->getRawSubclassData()); 415 break; 416 } 417 case ISD::STORE: { 418 const StoreSDNode *ST = cast<StoreSDNode>(N); 419 ID.AddInteger(ST->getMemoryVT().getRawBits()); 420 ID.AddInteger(ST->getRawSubclassData()); 421 break; 422 } 423 case ISD::ATOMIC_CMP_SWAP: 424 case ISD::ATOMIC_SWAP: 425 case ISD::ATOMIC_LOAD_ADD: 426 case ISD::ATOMIC_LOAD_SUB: 427 case ISD::ATOMIC_LOAD_AND: 428 case ISD::ATOMIC_LOAD_OR: 429 case ISD::ATOMIC_LOAD_XOR: 430 case ISD::ATOMIC_LOAD_NAND: 431 case ISD::ATOMIC_LOAD_MIN: 432 case ISD::ATOMIC_LOAD_MAX: 433 case ISD::ATOMIC_LOAD_UMIN: 434 case ISD::ATOMIC_LOAD_UMAX: { 435 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 436 ID.AddInteger(AT->getMemoryVT().getRawBits()); 437 ID.AddInteger(AT->getRawSubclassData()); 438 break; 439 } 440 case ISD::VECTOR_SHUFFLE: { 441 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 442 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 443 i != e; ++i) 444 ID.AddInteger(SVN->getMaskElt(i)); 445 break; 446 } 447 case ISD::TargetBlockAddress: 448 case ISD::BlockAddress: { 449 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 450 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 451 break; 452 } 453 } // end switch (N->getOpcode()) 454} 455 456/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 457/// data. 458static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 459 AddNodeIDOpcode(ID, N->getOpcode()); 460 // Add the return value info. 461 AddNodeIDValueTypes(ID, N->getVTList()); 462 // Add the operand info. 463 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 464 465 // Handle SDNode leafs with special info. 466 AddNodeIDCustom(ID, N); 467} 468 469/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 470/// the CSE map that carries volatility, temporalness, indexing mode, and 471/// extension/truncation information. 472/// 473static inline unsigned 474encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 475 bool isNonTemporal) { 476 assert((ConvType & 3) == ConvType && 477 "ConvType may not require more than 2 bits!"); 478 assert((AM & 7) == AM && 479 "AM may not require more than 3 bits!"); 480 return ConvType | 481 (AM << 2) | 482 (isVolatile << 5) | 483 (isNonTemporal << 6); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::EH_LABEL: 499 return true; // Never CSE these nodes. 500 } 501 502 // Check that remaining values produced are not flags. 503 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 504 if (N->getValueType(i) == MVT::Flag) 505 return true; // Never CSE anything that produces a flag. 506 507 return false; 508} 509 510/// RemoveDeadNodes - This method deletes all unreachable nodes in the 511/// SelectionDAG. 512void SelectionDAG::RemoveDeadNodes() { 513 // Create a dummy node (which is not added to allnodes), that adds a reference 514 // to the root node, preventing it from being deleted. 515 HandleSDNode Dummy(getRoot()); 516 517 SmallVector<SDNode*, 128> DeadNodes; 518 519 // Add all obviously-dead nodes to the DeadNodes worklist. 520 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 521 if (I->use_empty()) 522 DeadNodes.push_back(I); 523 524 RemoveDeadNodes(DeadNodes); 525 526 // If the root changed (e.g. it was a dead load, update the root). 527 setRoot(Dummy.getValue()); 528} 529 530/// RemoveDeadNodes - This method deletes the unreachable nodes in the 531/// given list, and any nodes that become unreachable as a result. 532void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 533 DAGUpdateListener *UpdateListener) { 534 535 // Process the worklist, deleting the nodes and adding their uses to the 536 // worklist. 537 while (!DeadNodes.empty()) { 538 SDNode *N = DeadNodes.pop_back_val(); 539 540 if (UpdateListener) 541 UpdateListener->NodeDeleted(N, 0); 542 543 // Take the node out of the appropriate CSE map. 544 RemoveNodeFromCSEMaps(N); 545 546 // Next, brutally remove the operand list. This is safe to do, as there are 547 // no cycles in the graph. 548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 549 SDUse &Use = *I++; 550 SDNode *Operand = Use.getNode(); 551 Use.set(SDValue()); 552 553 // Now that we removed this operand, see if there are no uses of it left. 554 if (Operand->use_empty()) 555 DeadNodes.push_back(Operand); 556 } 557 558 DeallocateNode(N); 559 } 560} 561 562void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 563 SmallVector<SDNode*, 16> DeadNodes(1, N); 564 RemoveDeadNodes(DeadNodes, UpdateListener); 565} 566 567void SelectionDAG::DeleteNode(SDNode *N) { 568 // First take this out of the appropriate CSE map. 569 RemoveNodeFromCSEMaps(N); 570 571 // Finally, remove uses due to operands of this node, remove from the 572 // AllNodes list, and delete the node. 573 DeleteNodeNotInCSEMaps(N); 574} 575 576void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 577 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 578 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 579 580 // Drop all of the operands and decrement used node's use counts. 581 N->DropOperands(); 582 583 DeallocateNode(N); 584} 585 586void SelectionDAG::DeallocateNode(SDNode *N) { 587 if (N->OperandsNeedDelete) 588 delete[] N->OperandList; 589 590 // Set the opcode to DELETED_NODE to help catch bugs when node 591 // memory is reallocated. 592 N->NodeType = ISD::DELETED_NODE; 593 594 NodeAllocator.Deallocate(AllNodes.remove(N)); 595 596 // Remove the ordering of this node. 597 Ordering->remove(N); 598 599 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 600 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 601 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 602 DbgVals[i]->setIsInvalidated(); 603} 604 605/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 606/// correspond to it. This is useful when we're about to delete or repurpose 607/// the node. We don't want future request for structurally identical nodes 608/// to return N anymore. 609bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 610 bool Erased = false; 611 switch (N->getOpcode()) { 612 case ISD::EntryToken: 613 llvm_unreachable("EntryToken should not be in CSEMaps!"); 614 return false; 615 case ISD::HANDLENODE: return false; // noop. 616 case ISD::CONDCODE: 617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 618 "Cond code doesn't exist!"); 619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 621 break; 622 case ISD::ExternalSymbol: 623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 624 break; 625 case ISD::TargetExternalSymbol: { 626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 627 Erased = TargetExternalSymbols.erase( 628 std::pair<std::string,unsigned char>(ESN->getSymbol(), 629 ESN->getTargetFlags())); 630 break; 631 } 632 case ISD::VALUETYPE: { 633 EVT VT = cast<VTSDNode>(N)->getVT(); 634 if (VT.isExtended()) { 635 Erased = ExtendedValueTypeNodes.erase(VT); 636 } else { 637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 639 } 640 break; 641 } 642 default: 643 // Remove it from the CSE Map. 644 Erased = CSEMap.RemoveNode(N); 645 break; 646 } 647#ifndef NDEBUG 648 // Verify that the node was actually in one of the CSE maps, unless it has a 649 // flag result (which cannot be CSE'd) or is one of the special cases that are 650 // not subject to CSE. 651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 652 !N->isMachineOpcode() && !doNotCSE(N)) { 653 N->dump(this); 654 dbgs() << "\n"; 655 llvm_unreachable("Node is not in map!"); 656 } 657#endif 658 return Erased; 659} 660 661/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 662/// maps and modified in place. Add it back to the CSE maps, unless an identical 663/// node already exists, in which case transfer all its users to the existing 664/// node. This transfer can potentially trigger recursive merging. 665/// 666void 667SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 668 DAGUpdateListener *UpdateListener) { 669 // For node types that aren't CSE'd, just act as if no identical node 670 // already exists. 671 if (!doNotCSE(N)) { 672 SDNode *Existing = CSEMap.GetOrInsertNode(N); 673 if (Existing != N) { 674 // If there was already an existing matching node, use ReplaceAllUsesWith 675 // to replace the dead one with the existing one. This can cause 676 // recursive merging of other unrelated nodes down the line. 677 ReplaceAllUsesWith(N, Existing, UpdateListener); 678 679 // N is now dead. Inform the listener if it exists and delete it. 680 if (UpdateListener) 681 UpdateListener->NodeDeleted(N, Existing); 682 DeleteNodeNotInCSEMaps(N); 683 return; 684 } 685 } 686 687 // If the node doesn't already exist, we updated it. Inform a listener if 688 // it exists. 689 if (UpdateListener) 690 UpdateListener->NodeUpdated(N); 691} 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 698 void *&InsertPos) { 699 if (doNotCSE(N)) 700 return 0; 701 702 SDValue Ops[] = { Op }; 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 705 AddNodeIDCustom(ID, N); 706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 707 return Node; 708} 709 710/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 711/// were replaced with those specified. If this node is never memoized, 712/// return null, otherwise return a pointer to the slot it would take. If a 713/// node already exists with these operands, the slot will be non-null. 714SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 715 SDValue Op1, SDValue Op2, 716 void *&InsertPos) { 717 if (doNotCSE(N)) 718 return 0; 719 720 SDValue Ops[] = { Op1, Op2 }; 721 FoldingSetNodeID ID; 722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 723 AddNodeIDCustom(ID, N); 724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 725 return Node; 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 747void SelectionDAG::VerifyNode(SDNode *N) { 748 switch (N->getOpcode()) { 749 default: 750 break; 751 case ISD::BUILD_PAIR: { 752 EVT VT = N->getValueType(0); 753 assert(N->getNumValues() == 1 && "Too many results!"); 754 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 755 "Wrong return type!"); 756 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 757 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 758 "Mismatched operand types!"); 759 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 760 "Wrong operand type!"); 761 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 762 "Wrong return type size"); 763 break; 764 } 765 case ISD::BUILD_VECTOR: { 766 assert(N->getNumValues() == 1 && "Too many results!"); 767 assert(N->getValueType(0).isVector() && "Wrong return type!"); 768 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 769 "Wrong number of operands!"); 770 EVT EltVT = N->getValueType(0).getVectorElementType(); 771 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 772 assert((I->getValueType() == EltVT || 773 (EltVT.isInteger() && I->getValueType().isInteger() && 774 EltVT.bitsLE(I->getValueType()))) && 775 "Wrong operand type!"); 776 break; 777 } 778 } 779} 780 781/// getEVTAlignment - Compute the default alignment value for the 782/// given type. 783/// 784unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 785 const Type *Ty = VT == MVT::iPTR ? 786 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 787 VT.getTypeForEVT(*getContext()); 788 789 return TLI.getTargetData()->getABITypeAlignment(Ty); 790} 791 792// EntryNode could meaningfully have debug info if we can find it... 793SelectionDAG::SelectionDAG(const TargetMachine &tm) 794 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 795 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 796 Root(getEntryNode()), Ordering(0) { 797 AllNodes.push_back(&EntryNode); 798 Ordering = new SDNodeOrdering(); 799 DbgInfo = new SDDbgInfo(); 800} 801 802void SelectionDAG::init(MachineFunction &mf) { 803 MF = &mf; 804 Context = &mf.getFunction()->getContext(); 805} 806 807SelectionDAG::~SelectionDAG() { 808 allnodes_clear(); 809 delete Ordering; 810 DbgInfo->clear(); 811 delete DbgInfo; 812} 813 814void SelectionDAG::allnodes_clear() { 815 assert(&*AllNodes.begin() == &EntryNode); 816 AllNodes.remove(AllNodes.begin()); 817 while (!AllNodes.empty()) 818 DeallocateNode(AllNodes.begin()); 819} 820 821void SelectionDAG::clear() { 822 allnodes_clear(); 823 OperandAllocator.Reset(); 824 CSEMap.clear(); 825 826 ExtendedValueTypeNodes.clear(); 827 ExternalSymbols.clear(); 828 TargetExternalSymbols.clear(); 829 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 830 static_cast<CondCodeSDNode*>(0)); 831 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 832 static_cast<SDNode*>(0)); 833 834 EntryNode.UseList = 0; 835 AllNodes.push_back(&EntryNode); 836 Root = getEntryNode(); 837 delete Ordering; 838 Ordering = new SDNodeOrdering(); 839 DbgInfo->clear(); 840 delete DbgInfo; 841 DbgInfo = new SDDbgInfo(); 842} 843 844SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 845 return VT.bitsGT(Op.getValueType()) ? 846 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 847 getNode(ISD::TRUNCATE, DL, VT, Op); 848} 849 850SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 851 return VT.bitsGT(Op.getValueType()) ? 852 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 853 getNode(ISD::TRUNCATE, DL, VT, Op); 854} 855 856SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 857 assert(!VT.isVector() && 858 "getZeroExtendInReg should use the vector element type instead of " 859 "the vector type!"); 860 if (Op.getValueType() == VT) return Op; 861 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 862 APInt Imm = APInt::getLowBitsSet(BitWidth, 863 VT.getSizeInBits()); 864 return getNode(ISD::AND, DL, Op.getValueType(), Op, 865 getConstant(Imm, Op.getValueType())); 866} 867 868/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 869/// 870SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 871 EVT EltVT = VT.getScalarType(); 872 SDValue NegOne = 873 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 874 return getNode(ISD::XOR, DL, VT, Val, NegOne); 875} 876 877SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 878 EVT EltVT = VT.getScalarType(); 879 assert((EltVT.getSizeInBits() >= 64 || 880 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 881 "getConstant with a uint64_t value that doesn't fit in the type!"); 882 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 883} 884 885SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 886 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 887} 888 889SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 890 assert(VT.isInteger() && "Cannot create FP integer constant!"); 891 892 EVT EltVT = VT.getScalarType(); 893 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 894 "APInt size does not match type size!"); 895 896 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 897 FoldingSetNodeID ID; 898 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 899 ID.AddPointer(&Val); 900 void *IP = 0; 901 SDNode *N = NULL; 902 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 903 if (!VT.isVector()) 904 return SDValue(N, 0); 905 906 if (!N) { 907 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 908 CSEMap.InsertNode(N, IP); 909 AllNodes.push_back(N); 910 } 911 912 SDValue Result(N, 0); 913 if (VT.isVector()) { 914 SmallVector<SDValue, 8> Ops; 915 Ops.assign(VT.getVectorNumElements(), Result); 916 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 917 } 918 return Result; 919} 920 921SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 922 return getConstant(Val, TLI.getPointerTy(), isTarget); 923} 924 925 926SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 927 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 928} 929 930SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 931 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 932 933 EVT EltVT = VT.getScalarType(); 934 935 // Do the map lookup using the actual bit pattern for the floating point 936 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 937 // we don't have issues with SNANs. 938 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 939 FoldingSetNodeID ID; 940 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 941 ID.AddPointer(&V); 942 void *IP = 0; 943 SDNode *N = NULL; 944 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 945 if (!VT.isVector()) 946 return SDValue(N, 0); 947 948 if (!N) { 949 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 950 CSEMap.InsertNode(N, IP); 951 AllNodes.push_back(N); 952 } 953 954 SDValue Result(N, 0); 955 if (VT.isVector()) { 956 SmallVector<SDValue, 8> Ops; 957 Ops.assign(VT.getVectorNumElements(), Result); 958 // FIXME DebugLoc info might be appropriate here 959 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 960 } 961 return Result; 962} 963 964SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 965 EVT EltVT = VT.getScalarType(); 966 if (EltVT==MVT::f32) 967 return getConstantFP(APFloat((float)Val), VT, isTarget); 968 else if (EltVT==MVT::f64) 969 return getConstantFP(APFloat(Val), VT, isTarget); 970 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 971 bool ignored; 972 APFloat apf = APFloat(Val); 973 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 974 &ignored); 975 return getConstantFP(apf, VT, isTarget); 976 } else { 977 assert(0 && "Unsupported type in getConstantFP"); 978 return SDValue(); 979 } 980} 981 982SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 983 EVT VT, int64_t Offset, 984 bool isTargetGA, 985 unsigned char TargetFlags) { 986 assert((TargetFlags == 0 || isTargetGA) && 987 "Cannot set target flags on target-independent globals"); 988 989 // Truncate (with sign-extension) the offset value to the pointer size. 990 EVT PTy = TLI.getPointerTy(); 991 unsigned BitWidth = PTy.getSizeInBits(); 992 if (BitWidth < 64) 993 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 994 995 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 996 if (!GVar) { 997 // If GV is an alias then use the aliasee for determining thread-localness. 998 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 999 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1000 } 1001 1002 unsigned Opc; 1003 if (GVar && GVar->isThreadLocal()) 1004 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1005 else 1006 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1007 1008 FoldingSetNodeID ID; 1009 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1010 ID.AddPointer(GV); 1011 ID.AddInteger(Offset); 1012 ID.AddInteger(TargetFlags); 1013 void *IP = 0; 1014 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1015 return SDValue(E, 0); 1016 1017 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1018 Offset, TargetFlags); 1019 CSEMap.InsertNode(N, IP); 1020 AllNodes.push_back(N); 1021 return SDValue(N, 0); 1022} 1023 1024SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1025 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1026 FoldingSetNodeID ID; 1027 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1028 ID.AddInteger(FI); 1029 void *IP = 0; 1030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1031 return SDValue(E, 0); 1032 1033 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1034 CSEMap.InsertNode(N, IP); 1035 AllNodes.push_back(N); 1036 return SDValue(N, 0); 1037} 1038 1039SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1040 unsigned char TargetFlags) { 1041 assert((TargetFlags == 0 || isTarget) && 1042 "Cannot set target flags on target-independent jump tables"); 1043 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1044 FoldingSetNodeID ID; 1045 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1046 ID.AddInteger(JTI); 1047 ID.AddInteger(TargetFlags); 1048 void *IP = 0; 1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1050 return SDValue(E, 0); 1051 1052 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1053 TargetFlags); 1054 CSEMap.InsertNode(N, IP); 1055 AllNodes.push_back(N); 1056 return SDValue(N, 0); 1057} 1058 1059SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1060 unsigned Alignment, int Offset, 1061 bool isTarget, 1062 unsigned char TargetFlags) { 1063 assert((TargetFlags == 0 || isTarget) && 1064 "Cannot set target flags on target-independent globals"); 1065 if (Alignment == 0) 1066 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1067 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1068 FoldingSetNodeID ID; 1069 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1070 ID.AddInteger(Alignment); 1071 ID.AddInteger(Offset); 1072 ID.AddPointer(C); 1073 ID.AddInteger(TargetFlags); 1074 void *IP = 0; 1075 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1076 return SDValue(E, 0); 1077 1078 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1079 Alignment, TargetFlags); 1080 CSEMap.InsertNode(N, IP); 1081 AllNodes.push_back(N); 1082 return SDValue(N, 0); 1083} 1084 1085 1086SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1087 unsigned Alignment, int Offset, 1088 bool isTarget, 1089 unsigned char TargetFlags) { 1090 assert((TargetFlags == 0 || isTarget) && 1091 "Cannot set target flags on target-independent globals"); 1092 if (Alignment == 0) 1093 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1094 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1095 FoldingSetNodeID ID; 1096 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1097 ID.AddInteger(Alignment); 1098 ID.AddInteger(Offset); 1099 C->AddSelectionDAGCSEId(ID); 1100 ID.AddInteger(TargetFlags); 1101 void *IP = 0; 1102 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1103 return SDValue(E, 0); 1104 1105 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1106 Alignment, TargetFlags); 1107 CSEMap.InsertNode(N, IP); 1108 AllNodes.push_back(N); 1109 return SDValue(N, 0); 1110} 1111 1112SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1113 FoldingSetNodeID ID; 1114 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1115 ID.AddPointer(MBB); 1116 void *IP = 0; 1117 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1118 return SDValue(E, 0); 1119 1120 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1121 CSEMap.InsertNode(N, IP); 1122 AllNodes.push_back(N); 1123 return SDValue(N, 0); 1124} 1125 1126SDValue SelectionDAG::getValueType(EVT VT) { 1127 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1128 ValueTypeNodes.size()) 1129 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1130 1131 SDNode *&N = VT.isExtended() ? 1132 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1133 1134 if (N) return SDValue(N, 0); 1135 N = new (NodeAllocator) VTSDNode(VT); 1136 AllNodes.push_back(N); 1137 return SDValue(N, 0); 1138} 1139 1140SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1141 SDNode *&N = ExternalSymbols[Sym]; 1142 if (N) return SDValue(N, 0); 1143 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1144 AllNodes.push_back(N); 1145 return SDValue(N, 0); 1146} 1147 1148SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1149 unsigned char TargetFlags) { 1150 SDNode *&N = 1151 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1152 TargetFlags)]; 1153 if (N) return SDValue(N, 0); 1154 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1155 AllNodes.push_back(N); 1156 return SDValue(N, 0); 1157} 1158 1159SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1160 if ((unsigned)Cond >= CondCodeNodes.size()) 1161 CondCodeNodes.resize(Cond+1); 1162 1163 if (CondCodeNodes[Cond] == 0) { 1164 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1165 CondCodeNodes[Cond] = N; 1166 AllNodes.push_back(N); 1167 } 1168 1169 return SDValue(CondCodeNodes[Cond], 0); 1170} 1171 1172// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1173// the shuffle mask M that point at N1 to point at N2, and indices that point 1174// N2 to point at N1. 1175static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1176 std::swap(N1, N2); 1177 int NElts = M.size(); 1178 for (int i = 0; i != NElts; ++i) { 1179 if (M[i] >= NElts) 1180 M[i] -= NElts; 1181 else if (M[i] >= 0) 1182 M[i] += NElts; 1183 } 1184} 1185 1186SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1187 SDValue N2, const int *Mask) { 1188 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1189 assert(VT.isVector() && N1.getValueType().isVector() && 1190 "Vector Shuffle VTs must be a vectors"); 1191 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1192 && "Vector Shuffle VTs must have same element type"); 1193 1194 // Canonicalize shuffle undef, undef -> undef 1195 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1196 return getUNDEF(VT); 1197 1198 // Validate that all indices in Mask are within the range of the elements 1199 // input to the shuffle. 1200 unsigned NElts = VT.getVectorNumElements(); 1201 SmallVector<int, 8> MaskVec; 1202 for (unsigned i = 0; i != NElts; ++i) { 1203 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1204 MaskVec.push_back(Mask[i]); 1205 } 1206 1207 // Canonicalize shuffle v, v -> v, undef 1208 if (N1 == N2) { 1209 N2 = getUNDEF(VT); 1210 for (unsigned i = 0; i != NElts; ++i) 1211 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1212 } 1213 1214 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1215 if (N1.getOpcode() == ISD::UNDEF) 1216 commuteShuffle(N1, N2, MaskVec); 1217 1218 // Canonicalize all index into lhs, -> shuffle lhs, undef 1219 // Canonicalize all index into rhs, -> shuffle rhs, undef 1220 bool AllLHS = true, AllRHS = true; 1221 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1222 for (unsigned i = 0; i != NElts; ++i) { 1223 if (MaskVec[i] >= (int)NElts) { 1224 if (N2Undef) 1225 MaskVec[i] = -1; 1226 else 1227 AllLHS = false; 1228 } else if (MaskVec[i] >= 0) { 1229 AllRHS = false; 1230 } 1231 } 1232 if (AllLHS && AllRHS) 1233 return getUNDEF(VT); 1234 if (AllLHS && !N2Undef) 1235 N2 = getUNDEF(VT); 1236 if (AllRHS) { 1237 N1 = getUNDEF(VT); 1238 commuteShuffle(N1, N2, MaskVec); 1239 } 1240 1241 // If Identity shuffle, or all shuffle in to undef, return that node. 1242 bool AllUndef = true; 1243 bool Identity = true; 1244 for (unsigned i = 0; i != NElts; ++i) { 1245 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1246 if (MaskVec[i] >= 0) AllUndef = false; 1247 } 1248 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1249 return N1; 1250 if (AllUndef) 1251 return getUNDEF(VT); 1252 1253 FoldingSetNodeID ID; 1254 SDValue Ops[2] = { N1, N2 }; 1255 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1256 for (unsigned i = 0; i != NElts; ++i) 1257 ID.AddInteger(MaskVec[i]); 1258 1259 void* IP = 0; 1260 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1261 return SDValue(E, 0); 1262 1263 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1264 // SDNode doesn't have access to it. This memory will be "leaked" when 1265 // the node is deallocated, but recovered when the NodeAllocator is released. 1266 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1267 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1268 1269 ShuffleVectorSDNode *N = 1270 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1271 CSEMap.InsertNode(N, IP); 1272 AllNodes.push_back(N); 1273 return SDValue(N, 0); 1274} 1275 1276SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1277 SDValue Val, SDValue DTy, 1278 SDValue STy, SDValue Rnd, SDValue Sat, 1279 ISD::CvtCode Code) { 1280 // If the src and dest types are the same and the conversion is between 1281 // integer types of the same sign or two floats, no conversion is necessary. 1282 if (DTy == STy && 1283 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1284 return Val; 1285 1286 FoldingSetNodeID ID; 1287 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1288 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1289 void* IP = 0; 1290 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1291 return SDValue(E, 0); 1292 1293 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1294 Code); 1295 CSEMap.InsertNode(N, IP); 1296 AllNodes.push_back(N); 1297 return SDValue(N, 0); 1298} 1299 1300SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1301 FoldingSetNodeID ID; 1302 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1303 ID.AddInteger(RegNo); 1304 void *IP = 0; 1305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1306 return SDValue(E, 0); 1307 1308 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1309 CSEMap.InsertNode(N, IP); 1310 AllNodes.push_back(N); 1311 return SDValue(N, 0); 1312} 1313 1314SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1315 FoldingSetNodeID ID; 1316 SDValue Ops[] = { Root }; 1317 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1318 ID.AddPointer(Label); 1319 void *IP = 0; 1320 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1321 return SDValue(E, 0); 1322 1323 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1324 CSEMap.InsertNode(N, IP); 1325 AllNodes.push_back(N); 1326 return SDValue(N, 0); 1327} 1328 1329 1330SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1331 bool isTarget, 1332 unsigned char TargetFlags) { 1333 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1334 1335 FoldingSetNodeID ID; 1336 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1337 ID.AddPointer(BA); 1338 ID.AddInteger(TargetFlags); 1339 void *IP = 0; 1340 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1341 return SDValue(E, 0); 1342 1343 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1344 CSEMap.InsertNode(N, IP); 1345 AllNodes.push_back(N); 1346 return SDValue(N, 0); 1347} 1348 1349SDValue SelectionDAG::getSrcValue(const Value *V) { 1350 assert((!V || V->getType()->isPointerTy()) && 1351 "SrcValue is not a pointer?"); 1352 1353 FoldingSetNodeID ID; 1354 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1355 ID.AddPointer(V); 1356 1357 void *IP = 0; 1358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1359 return SDValue(E, 0); 1360 1361 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1362 CSEMap.InsertNode(N, IP); 1363 AllNodes.push_back(N); 1364 return SDValue(N, 0); 1365} 1366 1367/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1368SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1369 FoldingSetNodeID ID; 1370 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1371 ID.AddPointer(MD); 1372 1373 void *IP = 0; 1374 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1375 return SDValue(E, 0); 1376 1377 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1378 CSEMap.InsertNode(N, IP); 1379 AllNodes.push_back(N); 1380 return SDValue(N, 0); 1381} 1382 1383 1384/// getShiftAmountOperand - Return the specified value casted to 1385/// the target's desired shift amount type. 1386SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1387 EVT OpTy = Op.getValueType(); 1388 MVT ShTy = TLI.getShiftAmountTy(); 1389 if (OpTy == ShTy || OpTy.isVector()) return Op; 1390 1391 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1392 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1393} 1394 1395/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1396/// specified value type. 1397SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1398 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1399 unsigned ByteSize = VT.getStoreSize(); 1400 const Type *Ty = VT.getTypeForEVT(*getContext()); 1401 unsigned StackAlign = 1402 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1403 1404 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1405 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1406} 1407 1408/// CreateStackTemporary - Create a stack temporary suitable for holding 1409/// either of the specified value types. 1410SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1411 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1412 VT2.getStoreSizeInBits())/8; 1413 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1414 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1415 const TargetData *TD = TLI.getTargetData(); 1416 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1417 TD->getPrefTypeAlignment(Ty2)); 1418 1419 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1420 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1421 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1422} 1423 1424SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1425 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1426 // These setcc operations always fold. 1427 switch (Cond) { 1428 default: break; 1429 case ISD::SETFALSE: 1430 case ISD::SETFALSE2: return getConstant(0, VT); 1431 case ISD::SETTRUE: 1432 case ISD::SETTRUE2: return getConstant(1, VT); 1433 1434 case ISD::SETOEQ: 1435 case ISD::SETOGT: 1436 case ISD::SETOGE: 1437 case ISD::SETOLT: 1438 case ISD::SETOLE: 1439 case ISD::SETONE: 1440 case ISD::SETO: 1441 case ISD::SETUO: 1442 case ISD::SETUEQ: 1443 case ISD::SETUNE: 1444 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1445 break; 1446 } 1447 1448 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1449 const APInt &C2 = N2C->getAPIntValue(); 1450 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1451 const APInt &C1 = N1C->getAPIntValue(); 1452 1453 switch (Cond) { 1454 default: llvm_unreachable("Unknown integer setcc!"); 1455 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1456 case ISD::SETNE: return getConstant(C1 != C2, VT); 1457 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1458 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1459 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1460 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1461 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1462 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1463 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1464 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1465 } 1466 } 1467 } 1468 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1469 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1470 // No compile time operations on this type yet. 1471 if (N1C->getValueType(0) == MVT::ppcf128) 1472 return SDValue(); 1473 1474 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1475 switch (Cond) { 1476 default: break; 1477 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1478 return getUNDEF(VT); 1479 // fall through 1480 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1481 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1482 return getUNDEF(VT); 1483 // fall through 1484 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1485 R==APFloat::cmpLessThan, VT); 1486 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1487 return getUNDEF(VT); 1488 // fall through 1489 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1490 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1491 return getUNDEF(VT); 1492 // fall through 1493 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1494 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1495 return getUNDEF(VT); 1496 // fall through 1497 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1498 R==APFloat::cmpEqual, VT); 1499 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1500 return getUNDEF(VT); 1501 // fall through 1502 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1503 R==APFloat::cmpEqual, VT); 1504 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1505 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1506 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1507 R==APFloat::cmpEqual, VT); 1508 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1509 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1510 R==APFloat::cmpLessThan, VT); 1511 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1512 R==APFloat::cmpUnordered, VT); 1513 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1514 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1515 } 1516 } else { 1517 // Ensure that the constant occurs on the RHS. 1518 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1519 } 1520 } 1521 1522 // Could not fold it. 1523 return SDValue(); 1524} 1525 1526/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1527/// use this predicate to simplify operations downstream. 1528bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1529 // This predicate is not safe for vector operations. 1530 if (Op.getValueType().isVector()) 1531 return false; 1532 1533 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1534 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1535} 1536 1537/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1538/// this predicate to simplify operations downstream. Mask is known to be zero 1539/// for bits that V cannot have. 1540bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1541 unsigned Depth) const { 1542 APInt KnownZero, KnownOne; 1543 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1544 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1545 return (KnownZero & Mask) == Mask; 1546} 1547 1548/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1549/// known to be either zero or one and return them in the KnownZero/KnownOne 1550/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1551/// processing. 1552void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1553 APInt &KnownZero, APInt &KnownOne, 1554 unsigned Depth) const { 1555 unsigned BitWidth = Mask.getBitWidth(); 1556 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1557 "Mask size mismatches value type size!"); 1558 1559 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1560 if (Depth == 6 || Mask == 0) 1561 return; // Limit search depth. 1562 1563 APInt KnownZero2, KnownOne2; 1564 1565 switch (Op.getOpcode()) { 1566 case ISD::Constant: 1567 // We know all of the bits for a constant! 1568 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1569 KnownZero = ~KnownOne & Mask; 1570 return; 1571 case ISD::AND: 1572 // If either the LHS or the RHS are Zero, the result is zero. 1573 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1574 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1575 KnownZero2, KnownOne2, Depth+1); 1576 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1577 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1578 1579 // Output known-1 bits are only known if set in both the LHS & RHS. 1580 KnownOne &= KnownOne2; 1581 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1582 KnownZero |= KnownZero2; 1583 return; 1584 case ISD::OR: 1585 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1586 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1587 KnownZero2, KnownOne2, Depth+1); 1588 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1589 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1590 1591 // Output known-0 bits are only known if clear in both the LHS & RHS. 1592 KnownZero &= KnownZero2; 1593 // Output known-1 are known to be set if set in either the LHS | RHS. 1594 KnownOne |= KnownOne2; 1595 return; 1596 case ISD::XOR: { 1597 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1598 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1599 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1600 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1601 1602 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1603 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1604 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1605 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1606 KnownZero = KnownZeroOut; 1607 return; 1608 } 1609 case ISD::MUL: { 1610 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1611 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1612 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1613 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1614 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1615 1616 // If low bits are zero in either operand, output low known-0 bits. 1617 // Also compute a conserative estimate for high known-0 bits. 1618 // More trickiness is possible, but this is sufficient for the 1619 // interesting case of alignment computation. 1620 KnownOne.clear(); 1621 unsigned TrailZ = KnownZero.countTrailingOnes() + 1622 KnownZero2.countTrailingOnes(); 1623 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1624 KnownZero2.countLeadingOnes(), 1625 BitWidth) - BitWidth; 1626 1627 TrailZ = std::min(TrailZ, BitWidth); 1628 LeadZ = std::min(LeadZ, BitWidth); 1629 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1630 APInt::getHighBitsSet(BitWidth, LeadZ); 1631 KnownZero &= Mask; 1632 return; 1633 } 1634 case ISD::UDIV: { 1635 // For the purposes of computing leading zeros we can conservatively 1636 // treat a udiv as a logical right shift by the power of 2 known to 1637 // be less than the denominator. 1638 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1639 ComputeMaskedBits(Op.getOperand(0), 1640 AllOnes, KnownZero2, KnownOne2, Depth+1); 1641 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1642 1643 KnownOne2.clear(); 1644 KnownZero2.clear(); 1645 ComputeMaskedBits(Op.getOperand(1), 1646 AllOnes, KnownZero2, KnownOne2, Depth+1); 1647 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1648 if (RHSUnknownLeadingOnes != BitWidth) 1649 LeadZ = std::min(BitWidth, 1650 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1651 1652 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1653 return; 1654 } 1655 case ISD::SELECT: 1656 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1657 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1658 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1659 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1660 1661 // Only known if known in both the LHS and RHS. 1662 KnownOne &= KnownOne2; 1663 KnownZero &= KnownZero2; 1664 return; 1665 case ISD::SELECT_CC: 1666 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1667 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1668 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1669 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1670 1671 // Only known if known in both the LHS and RHS. 1672 KnownOne &= KnownOne2; 1673 KnownZero &= KnownZero2; 1674 return; 1675 case ISD::SADDO: 1676 case ISD::UADDO: 1677 case ISD::SSUBO: 1678 case ISD::USUBO: 1679 case ISD::SMULO: 1680 case ISD::UMULO: 1681 if (Op.getResNo() != 1) 1682 return; 1683 // The boolean result conforms to getBooleanContents. Fall through. 1684 case ISD::SETCC: 1685 // If we know the result of a setcc has the top bits zero, use this info. 1686 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1687 BitWidth > 1) 1688 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1689 return; 1690 case ISD::SHL: 1691 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1692 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1693 unsigned ShAmt = SA->getZExtValue(); 1694 1695 // If the shift count is an invalid immediate, don't do anything. 1696 if (ShAmt >= BitWidth) 1697 return; 1698 1699 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1700 KnownZero, KnownOne, Depth+1); 1701 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1702 KnownZero <<= ShAmt; 1703 KnownOne <<= ShAmt; 1704 // low bits known zero. 1705 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1706 } 1707 return; 1708 case ISD::SRL: 1709 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1710 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1711 unsigned ShAmt = SA->getZExtValue(); 1712 1713 // If the shift count is an invalid immediate, don't do anything. 1714 if (ShAmt >= BitWidth) 1715 return; 1716 1717 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1718 KnownZero, KnownOne, Depth+1); 1719 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1720 KnownZero = KnownZero.lshr(ShAmt); 1721 KnownOne = KnownOne.lshr(ShAmt); 1722 1723 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1724 KnownZero |= HighBits; // High bits known zero. 1725 } 1726 return; 1727 case ISD::SRA: 1728 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1729 unsigned ShAmt = SA->getZExtValue(); 1730 1731 // If the shift count is an invalid immediate, don't do anything. 1732 if (ShAmt >= BitWidth) 1733 return; 1734 1735 APInt InDemandedMask = (Mask << ShAmt); 1736 // If any of the demanded bits are produced by the sign extension, we also 1737 // demand the input sign bit. 1738 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1739 if (HighBits.getBoolValue()) 1740 InDemandedMask |= APInt::getSignBit(BitWidth); 1741 1742 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1743 Depth+1); 1744 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1745 KnownZero = KnownZero.lshr(ShAmt); 1746 KnownOne = KnownOne.lshr(ShAmt); 1747 1748 // Handle the sign bits. 1749 APInt SignBit = APInt::getSignBit(BitWidth); 1750 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1751 1752 if (KnownZero.intersects(SignBit)) { 1753 KnownZero |= HighBits; // New bits are known zero. 1754 } else if (KnownOne.intersects(SignBit)) { 1755 KnownOne |= HighBits; // New bits are known one. 1756 } 1757 } 1758 return; 1759 case ISD::SIGN_EXTEND_INREG: { 1760 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1761 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1762 1763 // Sign extension. Compute the demanded bits in the result that are not 1764 // present in the input. 1765 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1766 1767 APInt InSignBit = APInt::getSignBit(EBits); 1768 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1769 1770 // If the sign extended bits are demanded, we know that the sign 1771 // bit is demanded. 1772 InSignBit.zext(BitWidth); 1773 if (NewBits.getBoolValue()) 1774 InputDemandedBits |= InSignBit; 1775 1776 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1777 KnownZero, KnownOne, Depth+1); 1778 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1779 1780 // If the sign bit of the input is known set or clear, then we know the 1781 // top bits of the result. 1782 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1783 KnownZero |= NewBits; 1784 KnownOne &= ~NewBits; 1785 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1786 KnownOne |= NewBits; 1787 KnownZero &= ~NewBits; 1788 } else { // Input sign bit unknown 1789 KnownZero &= ~NewBits; 1790 KnownOne &= ~NewBits; 1791 } 1792 return; 1793 } 1794 case ISD::CTTZ: 1795 case ISD::CTLZ: 1796 case ISD::CTPOP: { 1797 unsigned LowBits = Log2_32(BitWidth)+1; 1798 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1799 KnownOne.clear(); 1800 return; 1801 } 1802 case ISD::LOAD: { 1803 if (ISD::isZEXTLoad(Op.getNode())) { 1804 LoadSDNode *LD = cast<LoadSDNode>(Op); 1805 EVT VT = LD->getMemoryVT(); 1806 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1807 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1808 } 1809 return; 1810 } 1811 case ISD::ZERO_EXTEND: { 1812 EVT InVT = Op.getOperand(0).getValueType(); 1813 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1814 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1815 APInt InMask = Mask; 1816 InMask.trunc(InBits); 1817 KnownZero.trunc(InBits); 1818 KnownOne.trunc(InBits); 1819 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1820 KnownZero.zext(BitWidth); 1821 KnownOne.zext(BitWidth); 1822 KnownZero |= NewBits; 1823 return; 1824 } 1825 case ISD::SIGN_EXTEND: { 1826 EVT InVT = Op.getOperand(0).getValueType(); 1827 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1828 APInt InSignBit = APInt::getSignBit(InBits); 1829 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1830 APInt InMask = Mask; 1831 InMask.trunc(InBits); 1832 1833 // If any of the sign extended bits are demanded, we know that the sign 1834 // bit is demanded. Temporarily set this bit in the mask for our callee. 1835 if (NewBits.getBoolValue()) 1836 InMask |= InSignBit; 1837 1838 KnownZero.trunc(InBits); 1839 KnownOne.trunc(InBits); 1840 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1841 1842 // Note if the sign bit is known to be zero or one. 1843 bool SignBitKnownZero = KnownZero.isNegative(); 1844 bool SignBitKnownOne = KnownOne.isNegative(); 1845 assert(!(SignBitKnownZero && SignBitKnownOne) && 1846 "Sign bit can't be known to be both zero and one!"); 1847 1848 // If the sign bit wasn't actually demanded by our caller, we don't 1849 // want it set in the KnownZero and KnownOne result values. Reset the 1850 // mask and reapply it to the result values. 1851 InMask = Mask; 1852 InMask.trunc(InBits); 1853 KnownZero &= InMask; 1854 KnownOne &= InMask; 1855 1856 KnownZero.zext(BitWidth); 1857 KnownOne.zext(BitWidth); 1858 1859 // If the sign bit is known zero or one, the top bits match. 1860 if (SignBitKnownZero) 1861 KnownZero |= NewBits; 1862 else if (SignBitKnownOne) 1863 KnownOne |= NewBits; 1864 return; 1865 } 1866 case ISD::ANY_EXTEND: { 1867 EVT InVT = Op.getOperand(0).getValueType(); 1868 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1869 APInt InMask = Mask; 1870 InMask.trunc(InBits); 1871 KnownZero.trunc(InBits); 1872 KnownOne.trunc(InBits); 1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1874 KnownZero.zext(BitWidth); 1875 KnownOne.zext(BitWidth); 1876 return; 1877 } 1878 case ISD::TRUNCATE: { 1879 EVT InVT = Op.getOperand(0).getValueType(); 1880 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1881 APInt InMask = Mask; 1882 InMask.zext(InBits); 1883 KnownZero.zext(InBits); 1884 KnownOne.zext(InBits); 1885 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1886 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1887 KnownZero.trunc(BitWidth); 1888 KnownOne.trunc(BitWidth); 1889 break; 1890 } 1891 case ISD::AssertZext: { 1892 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1893 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1894 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1895 KnownOne, Depth+1); 1896 KnownZero |= (~InMask) & Mask; 1897 return; 1898 } 1899 case ISD::FGETSIGN: 1900 // All bits are zero except the low bit. 1901 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1902 return; 1903 1904 case ISD::SUB: { 1905 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1906 // We know that the top bits of C-X are clear if X contains less bits 1907 // than C (i.e. no wrap-around can happen). For example, 20-X is 1908 // positive if we can prove that X is >= 0 and < 16. 1909 if (CLHS->getAPIntValue().isNonNegative()) { 1910 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1911 // NLZ can't be BitWidth with no sign bit 1912 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1913 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1914 Depth+1); 1915 1916 // If all of the MaskV bits are known to be zero, then we know the 1917 // output top bits are zero, because we now know that the output is 1918 // from [0-C]. 1919 if ((KnownZero2 & MaskV) == MaskV) { 1920 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1921 // Top bits known zero. 1922 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1923 } 1924 } 1925 } 1926 } 1927 // fall through 1928 case ISD::ADD: { 1929 // Output known-0 bits are known if clear or set in both the low clear bits 1930 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1931 // low 3 bits clear. 1932 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1933 BitWidth - Mask.countLeadingZeros()); 1934 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1935 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1936 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1937 1938 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1939 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1940 KnownZeroOut = std::min(KnownZeroOut, 1941 KnownZero2.countTrailingOnes()); 1942 1943 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1944 return; 1945 } 1946 case ISD::SREM: 1947 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1948 const APInt &RA = Rem->getAPIntValue().abs(); 1949 if (RA.isPowerOf2()) { 1950 APInt LowBits = RA - 1; 1951 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1952 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1953 1954 // The low bits of the first operand are unchanged by the srem. 1955 KnownZero = KnownZero2 & LowBits; 1956 KnownOne = KnownOne2 & LowBits; 1957 1958 // If the first operand is non-negative or has all low bits zero, then 1959 // the upper bits are all zero. 1960 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1961 KnownZero |= ~LowBits; 1962 1963 // If the first operand is negative and not all low bits are zero, then 1964 // the upper bits are all one. 1965 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1966 KnownOne |= ~LowBits; 1967 1968 KnownZero &= Mask; 1969 KnownOne &= Mask; 1970 1971 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1972 } 1973 } 1974 return; 1975 case ISD::UREM: { 1976 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1977 const APInt &RA = Rem->getAPIntValue(); 1978 if (RA.isPowerOf2()) { 1979 APInt LowBits = (RA - 1); 1980 APInt Mask2 = LowBits & Mask; 1981 KnownZero |= ~LowBits & Mask; 1982 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1983 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1984 break; 1985 } 1986 } 1987 1988 // Since the result is less than or equal to either operand, any leading 1989 // zero bits in either operand must also exist in the result. 1990 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1991 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1992 Depth+1); 1993 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1994 Depth+1); 1995 1996 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1997 KnownZero2.countLeadingOnes()); 1998 KnownOne.clear(); 1999 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2000 return; 2001 } 2002 default: 2003 // Allow the target to implement this method for its nodes. 2004 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2005 case ISD::INTRINSIC_WO_CHAIN: 2006 case ISD::INTRINSIC_W_CHAIN: 2007 case ISD::INTRINSIC_VOID: 2008 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2009 Depth); 2010 } 2011 return; 2012 } 2013} 2014 2015/// ComputeNumSignBits - Return the number of times the sign bit of the 2016/// register is replicated into the other bits. We know that at least 1 bit 2017/// is always equal to the sign bit (itself), but other cases can give us 2018/// information. For example, immediately after an "SRA X, 2", we know that 2019/// the top 3 bits are all equal to each other, so we return 3. 2020unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2021 EVT VT = Op.getValueType(); 2022 assert(VT.isInteger() && "Invalid VT!"); 2023 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2024 unsigned Tmp, Tmp2; 2025 unsigned FirstAnswer = 1; 2026 2027 if (Depth == 6) 2028 return 1; // Limit search depth. 2029 2030 switch (Op.getOpcode()) { 2031 default: break; 2032 case ISD::AssertSext: 2033 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2034 return VTBits-Tmp+1; 2035 case ISD::AssertZext: 2036 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2037 return VTBits-Tmp; 2038 2039 case ISD::Constant: { 2040 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2041 // If negative, return # leading ones. 2042 if (Val.isNegative()) 2043 return Val.countLeadingOnes(); 2044 2045 // Return # leading zeros. 2046 return Val.countLeadingZeros(); 2047 } 2048 2049 case ISD::SIGN_EXTEND: 2050 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2051 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2052 2053 case ISD::SIGN_EXTEND_INREG: 2054 // Max of the input and what this extends. 2055 Tmp = 2056 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2057 Tmp = VTBits-Tmp+1; 2058 2059 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2060 return std::max(Tmp, Tmp2); 2061 2062 case ISD::SRA: 2063 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2064 // SRA X, C -> adds C sign bits. 2065 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2066 Tmp += C->getZExtValue(); 2067 if (Tmp > VTBits) Tmp = VTBits; 2068 } 2069 return Tmp; 2070 case ISD::SHL: 2071 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2072 // shl destroys sign bits. 2073 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2074 if (C->getZExtValue() >= VTBits || // Bad shift. 2075 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2076 return Tmp - C->getZExtValue(); 2077 } 2078 break; 2079 case ISD::AND: 2080 case ISD::OR: 2081 case ISD::XOR: // NOT is handled here. 2082 // Logical binary ops preserve the number of sign bits at the worst. 2083 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2084 if (Tmp != 1) { 2085 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2086 FirstAnswer = std::min(Tmp, Tmp2); 2087 // We computed what we know about the sign bits as our first 2088 // answer. Now proceed to the generic code that uses 2089 // ComputeMaskedBits, and pick whichever answer is better. 2090 } 2091 break; 2092 2093 case ISD::SELECT: 2094 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2095 if (Tmp == 1) return 1; // Early out. 2096 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2097 return std::min(Tmp, Tmp2); 2098 2099 case ISD::SADDO: 2100 case ISD::UADDO: 2101 case ISD::SSUBO: 2102 case ISD::USUBO: 2103 case ISD::SMULO: 2104 case ISD::UMULO: 2105 if (Op.getResNo() != 1) 2106 break; 2107 // The boolean result conforms to getBooleanContents. Fall through. 2108 case ISD::SETCC: 2109 // If setcc returns 0/-1, all bits are sign bits. 2110 if (TLI.getBooleanContents() == 2111 TargetLowering::ZeroOrNegativeOneBooleanContent) 2112 return VTBits; 2113 break; 2114 case ISD::ROTL: 2115 case ISD::ROTR: 2116 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2117 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2118 2119 // Handle rotate right by N like a rotate left by 32-N. 2120 if (Op.getOpcode() == ISD::ROTR) 2121 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2122 2123 // If we aren't rotating out all of the known-in sign bits, return the 2124 // number that are left. This handles rotl(sext(x), 1) for example. 2125 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2126 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2127 } 2128 break; 2129 case ISD::ADD: 2130 // Add can have at most one carry bit. Thus we know that the output 2131 // is, at worst, one more bit than the inputs. 2132 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2133 if (Tmp == 1) return 1; // Early out. 2134 2135 // Special case decrementing a value (ADD X, -1): 2136 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2137 if (CRHS->isAllOnesValue()) { 2138 APInt KnownZero, KnownOne; 2139 APInt Mask = APInt::getAllOnesValue(VTBits); 2140 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2141 2142 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2143 // sign bits set. 2144 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2145 return VTBits; 2146 2147 // If we are subtracting one from a positive number, there is no carry 2148 // out of the result. 2149 if (KnownZero.isNegative()) 2150 return Tmp; 2151 } 2152 2153 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2154 if (Tmp2 == 1) return 1; 2155 return std::min(Tmp, Tmp2)-1; 2156 break; 2157 2158 case ISD::SUB: 2159 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2160 if (Tmp2 == 1) return 1; 2161 2162 // Handle NEG. 2163 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2164 if (CLHS->isNullValue()) { 2165 APInt KnownZero, KnownOne; 2166 APInt Mask = APInt::getAllOnesValue(VTBits); 2167 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2168 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2169 // sign bits set. 2170 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2171 return VTBits; 2172 2173 // If the input is known to be positive (the sign bit is known clear), 2174 // the output of the NEG has the same number of sign bits as the input. 2175 if (KnownZero.isNegative()) 2176 return Tmp2; 2177 2178 // Otherwise, we treat this like a SUB. 2179 } 2180 2181 // Sub can have at most one carry bit. Thus we know that the output 2182 // is, at worst, one more bit than the inputs. 2183 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2184 if (Tmp == 1) return 1; // Early out. 2185 return std::min(Tmp, Tmp2)-1; 2186 break; 2187 case ISD::TRUNCATE: 2188 // FIXME: it's tricky to do anything useful for this, but it is an important 2189 // case for targets like X86. 2190 break; 2191 } 2192 2193 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2194 if (Op.getOpcode() == ISD::LOAD) { 2195 LoadSDNode *LD = cast<LoadSDNode>(Op); 2196 unsigned ExtType = LD->getExtensionType(); 2197 switch (ExtType) { 2198 default: break; 2199 case ISD::SEXTLOAD: // '17' bits known 2200 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2201 return VTBits-Tmp+1; 2202 case ISD::ZEXTLOAD: // '16' bits known 2203 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2204 return VTBits-Tmp; 2205 } 2206 } 2207 2208 // Allow the target to implement this method for its nodes. 2209 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2210 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2211 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2212 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2213 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2214 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2215 } 2216 2217 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2218 // use this information. 2219 APInt KnownZero, KnownOne; 2220 APInt Mask = APInt::getAllOnesValue(VTBits); 2221 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2222 2223 if (KnownZero.isNegative()) { // sign bit is 0 2224 Mask = KnownZero; 2225 } else if (KnownOne.isNegative()) { // sign bit is 1; 2226 Mask = KnownOne; 2227 } else { 2228 // Nothing known. 2229 return FirstAnswer; 2230 } 2231 2232 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2233 // the number of identical bits in the top of the input value. 2234 Mask = ~Mask; 2235 Mask <<= Mask.getBitWidth()-VTBits; 2236 // Return # leading zeros. We use 'min' here in case Val was zero before 2237 // shifting. We don't want to return '64' as for an i32 "0". 2238 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2239} 2240 2241bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2242 // If we're told that NaNs won't happen, assume they won't. 2243 if (FiniteOnlyFPMath()) 2244 return true; 2245 2246 // If the value is a constant, we can obviously see if it is a NaN or not. 2247 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2248 return !C->getValueAPF().isNaN(); 2249 2250 // TODO: Recognize more cases here. 2251 2252 return false; 2253} 2254 2255bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2256 // If the value is a constant, we can obviously see if it is a zero or not. 2257 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2258 return !C->isZero(); 2259 2260 // TODO: Recognize more cases here. 2261 2262 return false; 2263} 2264 2265bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2266 // Check the obvious case. 2267 if (A == B) return true; 2268 2269 // For for negative and positive zero. 2270 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2271 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2272 if (CA->isZero() && CB->isZero()) return true; 2273 2274 // Otherwise they may not be equal. 2275 return false; 2276} 2277 2278bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2279 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2280 if (!GA) return false; 2281 if (GA->getOffset() != 0) return false; 2282 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2283 if (!GV) return false; 2284 return MF->getMMI().hasDebugInfo(); 2285} 2286 2287 2288/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2289/// element of the result of the vector shuffle. 2290SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2291 unsigned i) { 2292 EVT VT = N->getValueType(0); 2293 DebugLoc dl = N->getDebugLoc(); 2294 if (N->getMaskElt(i) < 0) 2295 return getUNDEF(VT.getVectorElementType()); 2296 unsigned Index = N->getMaskElt(i); 2297 unsigned NumElems = VT.getVectorNumElements(); 2298 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2299 Index %= NumElems; 2300 2301 if (V.getOpcode() == ISD::BIT_CONVERT) { 2302 V = V.getOperand(0); 2303 EVT VVT = V.getValueType(); 2304 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2305 return SDValue(); 2306 } 2307 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2308 return (Index == 0) ? V.getOperand(0) 2309 : getUNDEF(VT.getVectorElementType()); 2310 if (V.getOpcode() == ISD::BUILD_VECTOR) 2311 return V.getOperand(Index); 2312 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2313 return getShuffleScalarElt(SVN, Index); 2314 return SDValue(); 2315} 2316 2317 2318/// getNode - Gets or creates the specified node. 2319/// 2320SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2321 FoldingSetNodeID ID; 2322 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2323 void *IP = 0; 2324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2325 return SDValue(E, 0); 2326 2327 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2328 CSEMap.InsertNode(N, IP); 2329 2330 AllNodes.push_back(N); 2331#ifndef NDEBUG 2332 VerifyNode(N); 2333#endif 2334 return SDValue(N, 0); 2335} 2336 2337SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2338 EVT VT, SDValue Operand) { 2339 // Constant fold unary operations with an integer constant operand. 2340 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2341 const APInt &Val = C->getAPIntValue(); 2342 switch (Opcode) { 2343 default: break; 2344 case ISD::SIGN_EXTEND: 2345 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2346 case ISD::ANY_EXTEND: 2347 case ISD::ZERO_EXTEND: 2348 case ISD::TRUNCATE: 2349 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2350 case ISD::UINT_TO_FP: 2351 case ISD::SINT_TO_FP: { 2352 const uint64_t zero[] = {0, 0}; 2353 // No compile time operations on ppcf128. 2354 if (VT == MVT::ppcf128) break; 2355 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2356 (void)apf.convertFromAPInt(Val, 2357 Opcode==ISD::SINT_TO_FP, 2358 APFloat::rmNearestTiesToEven); 2359 return getConstantFP(apf, VT); 2360 } 2361 case ISD::BIT_CONVERT: 2362 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2363 return getConstantFP(Val.bitsToFloat(), VT); 2364 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2365 return getConstantFP(Val.bitsToDouble(), VT); 2366 break; 2367 case ISD::BSWAP: 2368 return getConstant(Val.byteSwap(), VT); 2369 case ISD::CTPOP: 2370 return getConstant(Val.countPopulation(), VT); 2371 case ISD::CTLZ: 2372 return getConstant(Val.countLeadingZeros(), VT); 2373 case ISD::CTTZ: 2374 return getConstant(Val.countTrailingZeros(), VT); 2375 } 2376 } 2377 2378 // Constant fold unary operations with a floating point constant operand. 2379 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2380 APFloat V = C->getValueAPF(); // make copy 2381 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2382 switch (Opcode) { 2383 case ISD::FNEG: 2384 V.changeSign(); 2385 return getConstantFP(V, VT); 2386 case ISD::FABS: 2387 V.clearSign(); 2388 return getConstantFP(V, VT); 2389 case ISD::FP_ROUND: 2390 case ISD::FP_EXTEND: { 2391 bool ignored; 2392 // This can return overflow, underflow, or inexact; we don't care. 2393 // FIXME need to be more flexible about rounding mode. 2394 (void)V.convert(*EVTToAPFloatSemantics(VT), 2395 APFloat::rmNearestTiesToEven, &ignored); 2396 return getConstantFP(V, VT); 2397 } 2398 case ISD::FP_TO_SINT: 2399 case ISD::FP_TO_UINT: { 2400 integerPart x[2]; 2401 bool ignored; 2402 assert(integerPartWidth >= 64); 2403 // FIXME need to be more flexible about rounding mode. 2404 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2405 Opcode==ISD::FP_TO_SINT, 2406 APFloat::rmTowardZero, &ignored); 2407 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2408 break; 2409 APInt api(VT.getSizeInBits(), 2, x); 2410 return getConstant(api, VT); 2411 } 2412 case ISD::BIT_CONVERT: 2413 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2414 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2415 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2416 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2417 break; 2418 } 2419 } 2420 } 2421 2422 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2423 switch (Opcode) { 2424 case ISD::TokenFactor: 2425 case ISD::MERGE_VALUES: 2426 case ISD::CONCAT_VECTORS: 2427 return Operand; // Factor, merge or concat of one node? No need. 2428 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2429 case ISD::FP_EXTEND: 2430 assert(VT.isFloatingPoint() && 2431 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2432 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2433 assert((!VT.isVector() || 2434 VT.getVectorNumElements() == 2435 Operand.getValueType().getVectorNumElements()) && 2436 "Vector element count mismatch!"); 2437 if (Operand.getOpcode() == ISD::UNDEF) 2438 return getUNDEF(VT); 2439 break; 2440 case ISD::SIGN_EXTEND: 2441 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2442 "Invalid SIGN_EXTEND!"); 2443 if (Operand.getValueType() == VT) return Operand; // noop extension 2444 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2445 "Invalid sext node, dst < src!"); 2446 assert((!VT.isVector() || 2447 VT.getVectorNumElements() == 2448 Operand.getValueType().getVectorNumElements()) && 2449 "Vector element count mismatch!"); 2450 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2451 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2452 break; 2453 case ISD::ZERO_EXTEND: 2454 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2455 "Invalid ZERO_EXTEND!"); 2456 if (Operand.getValueType() == VT) return Operand; // noop extension 2457 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2458 "Invalid zext node, dst < src!"); 2459 assert((!VT.isVector() || 2460 VT.getVectorNumElements() == 2461 Operand.getValueType().getVectorNumElements()) && 2462 "Vector element count mismatch!"); 2463 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2464 return getNode(ISD::ZERO_EXTEND, DL, VT, 2465 Operand.getNode()->getOperand(0)); 2466 break; 2467 case ISD::ANY_EXTEND: 2468 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2469 "Invalid ANY_EXTEND!"); 2470 if (Operand.getValueType() == VT) return Operand; // noop extension 2471 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2472 "Invalid anyext node, dst < src!"); 2473 assert((!VT.isVector() || 2474 VT.getVectorNumElements() == 2475 Operand.getValueType().getVectorNumElements()) && 2476 "Vector element count mismatch!"); 2477 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2478 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2479 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2480 break; 2481 case ISD::TRUNCATE: 2482 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2483 "Invalid TRUNCATE!"); 2484 if (Operand.getValueType() == VT) return Operand; // noop truncate 2485 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2486 "Invalid truncate node, src < dst!"); 2487 assert((!VT.isVector() || 2488 VT.getVectorNumElements() == 2489 Operand.getValueType().getVectorNumElements()) && 2490 "Vector element count mismatch!"); 2491 if (OpOpcode == ISD::TRUNCATE) 2492 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2493 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2494 OpOpcode == ISD::ANY_EXTEND) { 2495 // If the source is smaller than the dest, we still need an extend. 2496 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2497 .bitsLT(VT.getScalarType())) 2498 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2499 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2500 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2501 else 2502 return Operand.getNode()->getOperand(0); 2503 } 2504 break; 2505 case ISD::BIT_CONVERT: 2506 // Basic sanity checking. 2507 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2508 && "Cannot BIT_CONVERT between types of different sizes!"); 2509 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2510 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2511 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2512 if (OpOpcode == ISD::UNDEF) 2513 return getUNDEF(VT); 2514 break; 2515 case ISD::SCALAR_TO_VECTOR: 2516 assert(VT.isVector() && !Operand.getValueType().isVector() && 2517 (VT.getVectorElementType() == Operand.getValueType() || 2518 (VT.getVectorElementType().isInteger() && 2519 Operand.getValueType().isInteger() && 2520 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2521 "Illegal SCALAR_TO_VECTOR node!"); 2522 if (OpOpcode == ISD::UNDEF) 2523 return getUNDEF(VT); 2524 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2525 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2526 isa<ConstantSDNode>(Operand.getOperand(1)) && 2527 Operand.getConstantOperandVal(1) == 0 && 2528 Operand.getOperand(0).getValueType() == VT) 2529 return Operand.getOperand(0); 2530 break; 2531 case ISD::FNEG: 2532 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2533 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2534 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2535 Operand.getNode()->getOperand(0)); 2536 if (OpOpcode == ISD::FNEG) // --X -> X 2537 return Operand.getNode()->getOperand(0); 2538 break; 2539 case ISD::FABS: 2540 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2541 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2542 break; 2543 } 2544 2545 SDNode *N; 2546 SDVTList VTs = getVTList(VT); 2547 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2548 FoldingSetNodeID ID; 2549 SDValue Ops[1] = { Operand }; 2550 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2551 void *IP = 0; 2552 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2553 return SDValue(E, 0); 2554 2555 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2556 CSEMap.InsertNode(N, IP); 2557 } else { 2558 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2559 } 2560 2561 AllNodes.push_back(N); 2562#ifndef NDEBUG 2563 VerifyNode(N); 2564#endif 2565 return SDValue(N, 0); 2566} 2567 2568SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2569 EVT VT, 2570 ConstantSDNode *Cst1, 2571 ConstantSDNode *Cst2) { 2572 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2573 2574 switch (Opcode) { 2575 case ISD::ADD: return getConstant(C1 + C2, VT); 2576 case ISD::SUB: return getConstant(C1 - C2, VT); 2577 case ISD::MUL: return getConstant(C1 * C2, VT); 2578 case ISD::UDIV: 2579 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2580 break; 2581 case ISD::UREM: 2582 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2583 break; 2584 case ISD::SDIV: 2585 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2586 break; 2587 case ISD::SREM: 2588 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2589 break; 2590 case ISD::AND: return getConstant(C1 & C2, VT); 2591 case ISD::OR: return getConstant(C1 | C2, VT); 2592 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2593 case ISD::SHL: return getConstant(C1 << C2, VT); 2594 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2595 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2596 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2597 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2598 default: break; 2599 } 2600 2601 return SDValue(); 2602} 2603 2604SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2605 SDValue N1, SDValue N2) { 2606 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2607 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2608 switch (Opcode) { 2609 default: break; 2610 case ISD::TokenFactor: 2611 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2612 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2613 // Fold trivial token factors. 2614 if (N1.getOpcode() == ISD::EntryToken) return N2; 2615 if (N2.getOpcode() == ISD::EntryToken) return N1; 2616 if (N1 == N2) return N1; 2617 break; 2618 case ISD::CONCAT_VECTORS: 2619 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2620 // one big BUILD_VECTOR. 2621 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2622 N2.getOpcode() == ISD::BUILD_VECTOR) { 2623 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2624 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2625 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2626 } 2627 break; 2628 case ISD::AND: 2629 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2630 assert(N1.getValueType() == N2.getValueType() && 2631 N1.getValueType() == VT && "Binary operator types must match!"); 2632 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2633 // worth handling here. 2634 if (N2C && N2C->isNullValue()) 2635 return N2; 2636 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2637 return N1; 2638 break; 2639 case ISD::OR: 2640 case ISD::XOR: 2641 case ISD::ADD: 2642 case ISD::SUB: 2643 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2644 assert(N1.getValueType() == N2.getValueType() && 2645 N1.getValueType() == VT && "Binary operator types must match!"); 2646 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2647 // it's worth handling here. 2648 if (N2C && N2C->isNullValue()) 2649 return N1; 2650 break; 2651 case ISD::UDIV: 2652 case ISD::UREM: 2653 case ISD::MULHU: 2654 case ISD::MULHS: 2655 case ISD::MUL: 2656 case ISD::SDIV: 2657 case ISD::SREM: 2658 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2659 assert(N1.getValueType() == N2.getValueType() && 2660 N1.getValueType() == VT && "Binary operator types must match!"); 2661 break; 2662 case ISD::FADD: 2663 case ISD::FSUB: 2664 case ISD::FMUL: 2665 case ISD::FDIV: 2666 case ISD::FREM: 2667 if (UnsafeFPMath) { 2668 if (Opcode == ISD::FADD) { 2669 // 0+x --> x 2670 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2671 if (CFP->getValueAPF().isZero()) 2672 return N2; 2673 // x+0 --> x 2674 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2675 if (CFP->getValueAPF().isZero()) 2676 return N1; 2677 } else if (Opcode == ISD::FSUB) { 2678 // x-0 --> x 2679 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2680 if (CFP->getValueAPF().isZero()) 2681 return N1; 2682 } 2683 } 2684 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2685 assert(N1.getValueType() == N2.getValueType() && 2686 N1.getValueType() == VT && "Binary operator types must match!"); 2687 break; 2688 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2689 assert(N1.getValueType() == VT && 2690 N1.getValueType().isFloatingPoint() && 2691 N2.getValueType().isFloatingPoint() && 2692 "Invalid FCOPYSIGN!"); 2693 break; 2694 case ISD::SHL: 2695 case ISD::SRA: 2696 case ISD::SRL: 2697 case ISD::ROTL: 2698 case ISD::ROTR: 2699 assert(VT == N1.getValueType() && 2700 "Shift operators return type must be the same as their first arg"); 2701 assert(VT.isInteger() && N2.getValueType().isInteger() && 2702 "Shifts only work on integers"); 2703 2704 // Always fold shifts of i1 values so the code generator doesn't need to 2705 // handle them. Since we know the size of the shift has to be less than the 2706 // size of the value, the shift/rotate count is guaranteed to be zero. 2707 if (VT == MVT::i1) 2708 return N1; 2709 if (N2C && N2C->isNullValue()) 2710 return N1; 2711 break; 2712 case ISD::FP_ROUND_INREG: { 2713 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2714 assert(VT == N1.getValueType() && "Not an inreg round!"); 2715 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2716 "Cannot FP_ROUND_INREG integer types"); 2717 assert(EVT.isVector() == VT.isVector() && 2718 "FP_ROUND_INREG type should be vector iff the operand " 2719 "type is vector!"); 2720 assert((!EVT.isVector() || 2721 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2722 "Vector element counts must match in FP_ROUND_INREG"); 2723 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2724 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2725 break; 2726 } 2727 case ISD::FP_ROUND: 2728 assert(VT.isFloatingPoint() && 2729 N1.getValueType().isFloatingPoint() && 2730 VT.bitsLE(N1.getValueType()) && 2731 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2732 if (N1.getValueType() == VT) return N1; // noop conversion. 2733 break; 2734 case ISD::AssertSext: 2735 case ISD::AssertZext: { 2736 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2737 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2738 assert(VT.isInteger() && EVT.isInteger() && 2739 "Cannot *_EXTEND_INREG FP types"); 2740 assert(!EVT.isVector() && 2741 "AssertSExt/AssertZExt type should be the vector element type " 2742 "rather than the vector type!"); 2743 assert(EVT.bitsLE(VT) && "Not extending!"); 2744 if (VT == EVT) return N1; // noop assertion. 2745 break; 2746 } 2747 case ISD::SIGN_EXTEND_INREG: { 2748 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2749 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2750 assert(VT.isInteger() && EVT.isInteger() && 2751 "Cannot *_EXTEND_INREG FP types"); 2752 assert(EVT.isVector() == VT.isVector() && 2753 "SIGN_EXTEND_INREG type should be vector iff the operand " 2754 "type is vector!"); 2755 assert((!EVT.isVector() || 2756 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2757 "Vector element counts must match in SIGN_EXTEND_INREG"); 2758 assert(EVT.bitsLE(VT) && "Not extending!"); 2759 if (EVT == VT) return N1; // Not actually extending 2760 2761 if (N1C) { 2762 APInt Val = N1C->getAPIntValue(); 2763 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2764 Val <<= Val.getBitWidth()-FromBits; 2765 Val = Val.ashr(Val.getBitWidth()-FromBits); 2766 return getConstant(Val, VT); 2767 } 2768 break; 2769 } 2770 case ISD::EXTRACT_VECTOR_ELT: 2771 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2772 if (N1.getOpcode() == ISD::UNDEF) 2773 return getUNDEF(VT); 2774 2775 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2776 // expanding copies of large vectors from registers. 2777 if (N2C && 2778 N1.getOpcode() == ISD::CONCAT_VECTORS && 2779 N1.getNumOperands() > 0) { 2780 unsigned Factor = 2781 N1.getOperand(0).getValueType().getVectorNumElements(); 2782 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2783 N1.getOperand(N2C->getZExtValue() / Factor), 2784 getConstant(N2C->getZExtValue() % Factor, 2785 N2.getValueType())); 2786 } 2787 2788 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2789 // expanding large vector constants. 2790 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2791 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2792 EVT VEltTy = N1.getValueType().getVectorElementType(); 2793 if (Elt.getValueType() != VEltTy) { 2794 // If the vector element type is not legal, the BUILD_VECTOR operands 2795 // are promoted and implicitly truncated. Make that explicit here. 2796 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2797 } 2798 if (VT != VEltTy) { 2799 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2800 // result is implicitly extended. 2801 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2802 } 2803 return Elt; 2804 } 2805 2806 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2807 // operations are lowered to scalars. 2808 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2809 // If the indices are the same, return the inserted element else 2810 // if the indices are known different, extract the element from 2811 // the original vector. 2812 SDValue N1Op2 = N1.getOperand(2); 2813 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2814 2815 if (N1Op2C && N2C) { 2816 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2817 if (VT == N1.getOperand(1).getValueType()) 2818 return N1.getOperand(1); 2819 else 2820 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2821 } 2822 2823 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2824 } 2825 } 2826 break; 2827 case ISD::EXTRACT_ELEMENT: 2828 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2829 assert(!N1.getValueType().isVector() && !VT.isVector() && 2830 (N1.getValueType().isInteger() == VT.isInteger()) && 2831 "Wrong types for EXTRACT_ELEMENT!"); 2832 2833 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2834 // 64-bit integers into 32-bit parts. Instead of building the extract of 2835 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2836 if (N1.getOpcode() == ISD::BUILD_PAIR) 2837 return N1.getOperand(N2C->getZExtValue()); 2838 2839 // EXTRACT_ELEMENT of a constant int is also very common. 2840 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2841 unsigned ElementSize = VT.getSizeInBits(); 2842 unsigned Shift = ElementSize * N2C->getZExtValue(); 2843 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2844 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2845 } 2846 break; 2847 case ISD::EXTRACT_SUBVECTOR: 2848 if (N1.getValueType() == VT) // Trivial extraction. 2849 return N1; 2850 break; 2851 } 2852 2853 if (N1C) { 2854 if (N2C) { 2855 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2856 if (SV.getNode()) return SV; 2857 } else { // Cannonicalize constant to RHS if commutative 2858 if (isCommutativeBinOp(Opcode)) { 2859 std::swap(N1C, N2C); 2860 std::swap(N1, N2); 2861 } 2862 } 2863 } 2864 2865 // Constant fold FP operations. 2866 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2867 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2868 if (N1CFP) { 2869 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2870 // Cannonicalize constant to RHS if commutative 2871 std::swap(N1CFP, N2CFP); 2872 std::swap(N1, N2); 2873 } else if (N2CFP && VT != MVT::ppcf128) { 2874 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2875 APFloat::opStatus s; 2876 switch (Opcode) { 2877 case ISD::FADD: 2878 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2879 if (s != APFloat::opInvalidOp) 2880 return getConstantFP(V1, VT); 2881 break; 2882 case ISD::FSUB: 2883 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2884 if (s!=APFloat::opInvalidOp) 2885 return getConstantFP(V1, VT); 2886 break; 2887 case ISD::FMUL: 2888 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2889 if (s!=APFloat::opInvalidOp) 2890 return getConstantFP(V1, VT); 2891 break; 2892 case ISD::FDIV: 2893 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2894 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2895 return getConstantFP(V1, VT); 2896 break; 2897 case ISD::FREM : 2898 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2899 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2900 return getConstantFP(V1, VT); 2901 break; 2902 case ISD::FCOPYSIGN: 2903 V1.copySign(V2); 2904 return getConstantFP(V1, VT); 2905 default: break; 2906 } 2907 } 2908 } 2909 2910 // Canonicalize an UNDEF to the RHS, even over a constant. 2911 if (N1.getOpcode() == ISD::UNDEF) { 2912 if (isCommutativeBinOp(Opcode)) { 2913 std::swap(N1, N2); 2914 } else { 2915 switch (Opcode) { 2916 case ISD::FP_ROUND_INREG: 2917 case ISD::SIGN_EXTEND_INREG: 2918 case ISD::SUB: 2919 case ISD::FSUB: 2920 case ISD::FDIV: 2921 case ISD::FREM: 2922 case ISD::SRA: 2923 return N1; // fold op(undef, arg2) -> undef 2924 case ISD::UDIV: 2925 case ISD::SDIV: 2926 case ISD::UREM: 2927 case ISD::SREM: 2928 case ISD::SRL: 2929 case ISD::SHL: 2930 if (!VT.isVector()) 2931 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2932 // For vectors, we can't easily build an all zero vector, just return 2933 // the LHS. 2934 return N2; 2935 } 2936 } 2937 } 2938 2939 // Fold a bunch of operators when the RHS is undef. 2940 if (N2.getOpcode() == ISD::UNDEF) { 2941 switch (Opcode) { 2942 case ISD::XOR: 2943 if (N1.getOpcode() == ISD::UNDEF) 2944 // Handle undef ^ undef -> 0 special case. This is a common 2945 // idiom (misuse). 2946 return getConstant(0, VT); 2947 // fallthrough 2948 case ISD::ADD: 2949 case ISD::ADDC: 2950 case ISD::ADDE: 2951 case ISD::SUB: 2952 case ISD::UDIV: 2953 case ISD::SDIV: 2954 case ISD::UREM: 2955 case ISD::SREM: 2956 return N2; // fold op(arg1, undef) -> undef 2957 case ISD::FADD: 2958 case ISD::FSUB: 2959 case ISD::FMUL: 2960 case ISD::FDIV: 2961 case ISD::FREM: 2962 if (UnsafeFPMath) 2963 return N2; 2964 break; 2965 case ISD::MUL: 2966 case ISD::AND: 2967 case ISD::SRL: 2968 case ISD::SHL: 2969 if (!VT.isVector()) 2970 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2971 // For vectors, we can't easily build an all zero vector, just return 2972 // the LHS. 2973 return N1; 2974 case ISD::OR: 2975 if (!VT.isVector()) 2976 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2977 // For vectors, we can't easily build an all one vector, just return 2978 // the LHS. 2979 return N1; 2980 case ISD::SRA: 2981 return N1; 2982 } 2983 } 2984 2985 // Memoize this node if possible. 2986 SDNode *N; 2987 SDVTList VTs = getVTList(VT); 2988 if (VT != MVT::Flag) { 2989 SDValue Ops[] = { N1, N2 }; 2990 FoldingSetNodeID ID; 2991 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2992 void *IP = 0; 2993 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2994 return SDValue(E, 0); 2995 2996 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2997 CSEMap.InsertNode(N, IP); 2998 } else { 2999 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3000 } 3001 3002 AllNodes.push_back(N); 3003#ifndef NDEBUG 3004 VerifyNode(N); 3005#endif 3006 return SDValue(N, 0); 3007} 3008 3009SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3010 SDValue N1, SDValue N2, SDValue N3) { 3011 // Perform various simplifications. 3012 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3013 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 3014 switch (Opcode) { 3015 case ISD::CONCAT_VECTORS: 3016 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3017 // one big BUILD_VECTOR. 3018 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3019 N2.getOpcode() == ISD::BUILD_VECTOR && 3020 N3.getOpcode() == ISD::BUILD_VECTOR) { 3021 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 3022 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 3023 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 3024 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3025 } 3026 break; 3027 case ISD::SETCC: { 3028 // Use FoldSetCC to simplify SETCC's. 3029 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3030 if (Simp.getNode()) return Simp; 3031 break; 3032 } 3033 case ISD::SELECT: 3034 if (N1C) { 3035 if (N1C->getZExtValue()) 3036 return N2; // select true, X, Y -> X 3037 else 3038 return N3; // select false, X, Y -> Y 3039 } 3040 3041 if (N2 == N3) return N2; // select C, X, X -> X 3042 break; 3043 case ISD::BRCOND: 3044 if (N2C) { 3045 if (N2C->getZExtValue()) // Unconditional branch 3046 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3047 else 3048 return N1; // Never-taken branch 3049 } 3050 break; 3051 case ISD::VECTOR_SHUFFLE: 3052 llvm_unreachable("should use getVectorShuffle constructor!"); 3053 break; 3054 case ISD::BIT_CONVERT: 3055 // Fold bit_convert nodes from a type to themselves. 3056 if (N1.getValueType() == VT) 3057 return N1; 3058 break; 3059 } 3060 3061 // Memoize node if it doesn't produce a flag. 3062 SDNode *N; 3063 SDVTList VTs = getVTList(VT); 3064 if (VT != MVT::Flag) { 3065 SDValue Ops[] = { N1, N2, N3 }; 3066 FoldingSetNodeID ID; 3067 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3068 void *IP = 0; 3069 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3070 return SDValue(E, 0); 3071 3072 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3073 CSEMap.InsertNode(N, IP); 3074 } else { 3075 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3076 } 3077 3078 AllNodes.push_back(N); 3079#ifndef NDEBUG 3080 VerifyNode(N); 3081#endif 3082 return SDValue(N, 0); 3083} 3084 3085SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3086 SDValue N1, SDValue N2, SDValue N3, 3087 SDValue N4) { 3088 SDValue Ops[] = { N1, N2, N3, N4 }; 3089 return getNode(Opcode, DL, VT, Ops, 4); 3090} 3091 3092SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3093 SDValue N1, SDValue N2, SDValue N3, 3094 SDValue N4, SDValue N5) { 3095 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3096 return getNode(Opcode, DL, VT, Ops, 5); 3097} 3098 3099/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3100/// the incoming stack arguments to be loaded from the stack. 3101SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3102 SmallVector<SDValue, 8> ArgChains; 3103 3104 // Include the original chain at the beginning of the list. When this is 3105 // used by target LowerCall hooks, this helps legalize find the 3106 // CALLSEQ_BEGIN node. 3107 ArgChains.push_back(Chain); 3108 3109 // Add a chain value for each stack argument. 3110 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3111 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3112 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3113 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3114 if (FI->getIndex() < 0) 3115 ArgChains.push_back(SDValue(L, 1)); 3116 3117 // Build a tokenfactor for all the chains. 3118 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3119 &ArgChains[0], ArgChains.size()); 3120} 3121 3122/// getMemsetValue - Vectorized representation of the memset value 3123/// operand. 3124static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3125 DebugLoc dl) { 3126 assert(Value.getOpcode() != ISD::UNDEF); 3127 3128 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3129 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3130 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3131 unsigned Shift = 8; 3132 for (unsigned i = NumBits; i > 8; i >>= 1) { 3133 Val = (Val << Shift) | Val; 3134 Shift <<= 1; 3135 } 3136 if (VT.isInteger()) 3137 return DAG.getConstant(Val, VT); 3138 return DAG.getConstantFP(APFloat(Val), VT); 3139 } 3140 3141 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3142 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3143 unsigned Shift = 8; 3144 for (unsigned i = NumBits; i > 8; i >>= 1) { 3145 Value = DAG.getNode(ISD::OR, dl, VT, 3146 DAG.getNode(ISD::SHL, dl, VT, Value, 3147 DAG.getConstant(Shift, 3148 TLI.getShiftAmountTy())), 3149 Value); 3150 Shift <<= 1; 3151 } 3152 3153 return Value; 3154} 3155 3156/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3157/// used when a memcpy is turned into a memset when the source is a constant 3158/// string ptr. 3159static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3160 const TargetLowering &TLI, 3161 std::string &Str, unsigned Offset) { 3162 // Handle vector with all elements zero. 3163 if (Str.empty()) { 3164 if (VT.isInteger()) 3165 return DAG.getConstant(0, VT); 3166 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3167 VT.getSimpleVT().SimpleTy == MVT::f64) 3168 return DAG.getConstantFP(0.0, VT); 3169 else if (VT.isVector()) { 3170 unsigned NumElts = VT.getVectorNumElements(); 3171 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3172 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3173 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3174 EltVT, NumElts))); 3175 } else 3176 llvm_unreachable("Expected type!"); 3177 } 3178 3179 assert(!VT.isVector() && "Can't handle vector type here!"); 3180 unsigned NumBits = VT.getSizeInBits(); 3181 unsigned MSB = NumBits / 8; 3182 uint64_t Val = 0; 3183 if (TLI.isLittleEndian()) 3184 Offset = Offset + MSB - 1; 3185 for (unsigned i = 0; i != MSB; ++i) { 3186 Val = (Val << 8) | (unsigned char)Str[Offset]; 3187 Offset += TLI.isLittleEndian() ? -1 : 1; 3188 } 3189 return DAG.getConstant(Val, VT); 3190} 3191 3192/// getMemBasePlusOffset - Returns base and offset node for the 3193/// 3194static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3195 SelectionDAG &DAG) { 3196 EVT VT = Base.getValueType(); 3197 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3198 VT, Base, DAG.getConstant(Offset, VT)); 3199} 3200 3201/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3202/// 3203static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3204 unsigned SrcDelta = 0; 3205 GlobalAddressSDNode *G = NULL; 3206 if (Src.getOpcode() == ISD::GlobalAddress) 3207 G = cast<GlobalAddressSDNode>(Src); 3208 else if (Src.getOpcode() == ISD::ADD && 3209 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3210 Src.getOperand(1).getOpcode() == ISD::Constant) { 3211 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3212 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3213 } 3214 if (!G) 3215 return false; 3216 3217 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3218 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3219 return true; 3220 3221 return false; 3222} 3223 3224/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3225/// to replace the memset / memcpy. Return true if the number of memory ops 3226/// is below the threshold. It returns the types of the sequence of 3227/// memory ops to perform memset / memcpy by reference. 3228static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3229 unsigned Limit, uint64_t Size, 3230 unsigned DstAlign, unsigned SrcAlign, 3231 bool NonScalarIntSafe, 3232 bool MemcpyStrSrc, 3233 SelectionDAG &DAG, 3234 const TargetLowering &TLI) { 3235 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3236 "Expecting memcpy / memset source to meet alignment requirement!"); 3237 // If 'SrcAlign' is zero, that means the memory operation does not need load 3238 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3239 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3240 // specified alignment of the memory operation. If it is zero, that means 3241 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3242 // indicates whether the memcpy source is constant so it does not need to be 3243 // loaded. 3244 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3245 NonScalarIntSafe, MemcpyStrSrc, 3246 DAG.getMachineFunction()); 3247 3248 if (VT == MVT::Other) { 3249 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3250 TLI.allowsUnalignedMemoryAccesses(VT)) { 3251 VT = TLI.getPointerTy(); 3252 } else { 3253 switch (DstAlign & 7) { 3254 case 0: VT = MVT::i64; break; 3255 case 4: VT = MVT::i32; break; 3256 case 2: VT = MVT::i16; break; 3257 default: VT = MVT::i8; break; 3258 } 3259 } 3260 3261 MVT LVT = MVT::i64; 3262 while (!TLI.isTypeLegal(LVT)) 3263 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3264 assert(LVT.isInteger()); 3265 3266 if (VT.bitsGT(LVT)) 3267 VT = LVT; 3268 } 3269 3270 // If we're optimizing for size, and there is a limit, bump the maximum number 3271 // of operations inserted down to 4. This is a wild guess that approximates 3272 // the size of a call to memcpy or memset (3 arguments + call). 3273 if (Limit != ~0U) { 3274 const Function *F = DAG.getMachineFunction().getFunction(); 3275 if (F->hasFnAttr(Attribute::OptimizeForSize)) 3276 Limit = 4; 3277 } 3278 3279 unsigned NumMemOps = 0; 3280 while (Size != 0) { 3281 unsigned VTSize = VT.getSizeInBits() / 8; 3282 while (VTSize > Size) { 3283 // For now, only use non-vector load / store's for the left-over pieces. 3284 if (VT.isVector() || VT.isFloatingPoint()) { 3285 VT = MVT::i64; 3286 while (!TLI.isTypeLegal(VT)) 3287 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3288 VTSize = VT.getSizeInBits() / 8; 3289 } else { 3290 // This can result in a type that is not legal on the target, e.g. 3291 // 1 or 2 bytes on PPC. 3292 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3293 VTSize >>= 1; 3294 } 3295 } 3296 3297 if (++NumMemOps > Limit) 3298 return false; 3299 MemOps.push_back(VT); 3300 Size -= VTSize; 3301 } 3302 3303 return true; 3304} 3305 3306static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3307 SDValue Chain, SDValue Dst, 3308 SDValue Src, uint64_t Size, 3309 unsigned Align, bool isVol, 3310 bool AlwaysInline, 3311 const Value *DstSV, uint64_t DstSVOff, 3312 const Value *SrcSV, uint64_t SrcSVOff) { 3313 // Turn a memcpy of undef to nop. 3314 if (Src.getOpcode() == ISD::UNDEF) 3315 return Chain; 3316 3317 // Expand memcpy to a series of load and store ops if the size operand falls 3318 // below a certain threshold. 3319 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3320 std::vector<EVT> MemOps; 3321 bool DstAlignCanChange = false; 3322 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3323 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3324 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3325 DstAlignCanChange = true; 3326 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3327 if (Align > SrcAlign) 3328 SrcAlign = Align; 3329 std::string Str; 3330 bool CopyFromStr = isMemSrcFromString(Src, Str); 3331 bool isZeroStr = CopyFromStr && Str.empty(); 3332 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(); 3333 3334 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3335 (DstAlignCanChange ? 0 : Align), 3336 (isZeroStr ? 0 : SrcAlign), 3337 true, CopyFromStr, DAG, TLI)) 3338 return SDValue(); 3339 3340 if (DstAlignCanChange) { 3341 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3342 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3343 if (NewAlign > Align) { 3344 // Give the stack frame object a larger alignment if needed. 3345 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3346 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3347 Align = NewAlign; 3348 } 3349 } 3350 3351 SmallVector<SDValue, 8> OutChains; 3352 unsigned NumMemOps = MemOps.size(); 3353 uint64_t SrcOff = 0, DstOff = 0; 3354 for (unsigned i = 0; i != NumMemOps; ++i) { 3355 EVT VT = MemOps[i]; 3356 unsigned VTSize = VT.getSizeInBits() / 8; 3357 SDValue Value, Store; 3358 3359 if (CopyFromStr && 3360 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3361 // It's unlikely a store of a vector immediate can be done in a single 3362 // instruction. It would require a load from a constantpool first. 3363 // We only handle zero vectors here. 3364 // FIXME: Handle other cases where store of vector immediate is done in 3365 // a single instruction. 3366 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3367 Store = DAG.getStore(Chain, dl, Value, 3368 getMemBasePlusOffset(Dst, DstOff, DAG), 3369 DstSV, DstSVOff + DstOff, isVol, false, Align); 3370 } else { 3371 // The type might not be legal for the target. This should only happen 3372 // if the type is smaller than a legal type, as on PPC, so the right 3373 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3374 // to Load/Store if NVT==VT. 3375 // FIXME does the case above also need this? 3376 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3377 assert(NVT.bitsGE(VT)); 3378 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3379 getMemBasePlusOffset(Src, SrcOff, DAG), 3380 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3381 MinAlign(SrcAlign, SrcOff)); 3382 Store = DAG.getTruncStore(Chain, dl, Value, 3383 getMemBasePlusOffset(Dst, DstOff, DAG), 3384 DstSV, DstSVOff + DstOff, VT, isVol, false, 3385 Align); 3386 } 3387 OutChains.push_back(Store); 3388 SrcOff += VTSize; 3389 DstOff += VTSize; 3390 } 3391 3392 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3393 &OutChains[0], OutChains.size()); 3394} 3395 3396static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3397 SDValue Chain, SDValue Dst, 3398 SDValue Src, uint64_t Size, 3399 unsigned Align, bool isVol, 3400 bool AlwaysInline, 3401 const Value *DstSV, uint64_t DstSVOff, 3402 const Value *SrcSV, uint64_t SrcSVOff) { 3403 // Turn a memmove of undef to nop. 3404 if (Src.getOpcode() == ISD::UNDEF) 3405 return Chain; 3406 3407 // Expand memmove to a series of load and store ops if the size operand falls 3408 // below a certain threshold. 3409 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3410 std::vector<EVT> MemOps; 3411 bool DstAlignCanChange = false; 3412 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3413 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3414 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3415 DstAlignCanChange = true; 3416 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3417 if (Align > SrcAlign) 3418 SrcAlign = Align; 3419 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(); 3420 3421 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3422 (DstAlignCanChange ? 0 : Align), 3423 SrcAlign, true, false, DAG, TLI)) 3424 return SDValue(); 3425 3426 if (DstAlignCanChange) { 3427 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3428 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3429 if (NewAlign > Align) { 3430 // Give the stack frame object a larger alignment if needed. 3431 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3432 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3433 Align = NewAlign; 3434 } 3435 } 3436 3437 uint64_t SrcOff = 0, DstOff = 0; 3438 SmallVector<SDValue, 8> LoadValues; 3439 SmallVector<SDValue, 8> LoadChains; 3440 SmallVector<SDValue, 8> OutChains; 3441 unsigned NumMemOps = MemOps.size(); 3442 for (unsigned i = 0; i < NumMemOps; i++) { 3443 EVT VT = MemOps[i]; 3444 unsigned VTSize = VT.getSizeInBits() / 8; 3445 SDValue Value, Store; 3446 3447 Value = DAG.getLoad(VT, dl, Chain, 3448 getMemBasePlusOffset(Src, SrcOff, DAG), 3449 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3450 LoadValues.push_back(Value); 3451 LoadChains.push_back(Value.getValue(1)); 3452 SrcOff += VTSize; 3453 } 3454 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3455 &LoadChains[0], LoadChains.size()); 3456 OutChains.clear(); 3457 for (unsigned i = 0; i < NumMemOps; i++) { 3458 EVT VT = MemOps[i]; 3459 unsigned VTSize = VT.getSizeInBits() / 8; 3460 SDValue Value, Store; 3461 3462 Store = DAG.getStore(Chain, dl, LoadValues[i], 3463 getMemBasePlusOffset(Dst, DstOff, DAG), 3464 DstSV, DstSVOff + DstOff, isVol, false, Align); 3465 OutChains.push_back(Store); 3466 DstOff += VTSize; 3467 } 3468 3469 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3470 &OutChains[0], OutChains.size()); 3471} 3472 3473static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3474 SDValue Chain, SDValue Dst, 3475 SDValue Src, uint64_t Size, 3476 unsigned Align, bool isVol, 3477 const Value *DstSV, uint64_t DstSVOff) { 3478 // Turn a memset of undef to nop. 3479 if (Src.getOpcode() == ISD::UNDEF) 3480 return Chain; 3481 3482 // Expand memset to a series of load/store ops if the size operand 3483 // falls below a certain threshold. 3484 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3485 std::vector<EVT> MemOps; 3486 bool DstAlignCanChange = false; 3487 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3488 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3489 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3490 DstAlignCanChange = true; 3491 bool NonScalarIntSafe = 3492 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3493 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3494 Size, (DstAlignCanChange ? 0 : Align), 0, 3495 NonScalarIntSafe, false, DAG, TLI)) 3496 return SDValue(); 3497 3498 if (DstAlignCanChange) { 3499 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3500 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3501 if (NewAlign > Align) { 3502 // Give the stack frame object a larger alignment if needed. 3503 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3504 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3505 Align = NewAlign; 3506 } 3507 } 3508 3509 SmallVector<SDValue, 8> OutChains; 3510 uint64_t DstOff = 0; 3511 unsigned NumMemOps = MemOps.size(); 3512 for (unsigned i = 0; i < NumMemOps; i++) { 3513 EVT VT = MemOps[i]; 3514 unsigned VTSize = VT.getSizeInBits() / 8; 3515 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3516 SDValue Store = DAG.getStore(Chain, dl, Value, 3517 getMemBasePlusOffset(Dst, DstOff, DAG), 3518 DstSV, DstSVOff + DstOff, isVol, false, 0); 3519 OutChains.push_back(Store); 3520 DstOff += VTSize; 3521 } 3522 3523 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3524 &OutChains[0], OutChains.size()); 3525} 3526 3527SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3528 SDValue Src, SDValue Size, 3529 unsigned Align, bool isVol, bool AlwaysInline, 3530 const Value *DstSV, uint64_t DstSVOff, 3531 const Value *SrcSV, uint64_t SrcSVOff) { 3532 3533 // Check to see if we should lower the memcpy to loads and stores first. 3534 // For cases within the target-specified limits, this is the best choice. 3535 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3536 if (ConstantSize) { 3537 // Memcpy with size zero? Just return the original chain. 3538 if (ConstantSize->isNullValue()) 3539 return Chain; 3540 3541 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3542 ConstantSize->getZExtValue(),Align, 3543 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3544 if (Result.getNode()) 3545 return Result; 3546 } 3547 3548 // Then check to see if we should lower the memcpy with target-specific 3549 // code. If the target chooses to do this, this is the next best. 3550 SDValue Result = 3551 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3552 isVol, AlwaysInline, 3553 DstSV, DstSVOff, SrcSV, SrcSVOff); 3554 if (Result.getNode()) 3555 return Result; 3556 3557 // If we really need inline code and the target declined to provide it, 3558 // use a (potentially long) sequence of loads and stores. 3559 if (AlwaysInline) { 3560 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3561 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3562 ConstantSize->getZExtValue(), Align, isVol, 3563 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3564 } 3565 3566 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3567 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3568 // respect volatile, so they may do things like read or write memory 3569 // beyond the given memory regions. But fixing this isn't easy, and most 3570 // people don't care. 3571 3572 // Emit a library call. 3573 TargetLowering::ArgListTy Args; 3574 TargetLowering::ArgListEntry Entry; 3575 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3576 Entry.Node = Dst; Args.push_back(Entry); 3577 Entry.Node = Src; Args.push_back(Entry); 3578 Entry.Node = Size; Args.push_back(Entry); 3579 // FIXME: pass in DebugLoc 3580 std::pair<SDValue,SDValue> CallResult = 3581 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3582 false, false, false, false, 0, 3583 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3584 /*isReturnValueUsed=*/false, 3585 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3586 TLI.getPointerTy()), 3587 Args, *this, dl); 3588 return CallResult.second; 3589} 3590 3591SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3592 SDValue Src, SDValue Size, 3593 unsigned Align, bool isVol, 3594 const Value *DstSV, uint64_t DstSVOff, 3595 const Value *SrcSV, uint64_t SrcSVOff) { 3596 3597 // Check to see if we should lower the memmove to loads and stores first. 3598 // For cases within the target-specified limits, this is the best choice. 3599 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3600 if (ConstantSize) { 3601 // Memmove with size zero? Just return the original chain. 3602 if (ConstantSize->isNullValue()) 3603 return Chain; 3604 3605 SDValue Result = 3606 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3607 ConstantSize->getZExtValue(), Align, isVol, 3608 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3609 if (Result.getNode()) 3610 return Result; 3611 } 3612 3613 // Then check to see if we should lower the memmove with target-specific 3614 // code. If the target chooses to do this, this is the next best. 3615 SDValue Result = 3616 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3617 DstSV, DstSVOff, SrcSV, SrcSVOff); 3618 if (Result.getNode()) 3619 return Result; 3620 3621 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3622 // not be safe. See memcpy above for more details. 3623 3624 // Emit a library call. 3625 TargetLowering::ArgListTy Args; 3626 TargetLowering::ArgListEntry Entry; 3627 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3628 Entry.Node = Dst; Args.push_back(Entry); 3629 Entry.Node = Src; Args.push_back(Entry); 3630 Entry.Node = Size; Args.push_back(Entry); 3631 // FIXME: pass in DebugLoc 3632 std::pair<SDValue,SDValue> CallResult = 3633 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3634 false, false, false, false, 0, 3635 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3636 /*isReturnValueUsed=*/false, 3637 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3638 TLI.getPointerTy()), 3639 Args, *this, dl); 3640 return CallResult.second; 3641} 3642 3643SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3644 SDValue Src, SDValue Size, 3645 unsigned Align, bool isVol, 3646 const Value *DstSV, uint64_t DstSVOff) { 3647 3648 // Check to see if we should lower the memset to stores first. 3649 // For cases within the target-specified limits, this is the best choice. 3650 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3651 if (ConstantSize) { 3652 // Memset with size zero? Just return the original chain. 3653 if (ConstantSize->isNullValue()) 3654 return Chain; 3655 3656 SDValue Result = 3657 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3658 Align, isVol, DstSV, DstSVOff); 3659 3660 if (Result.getNode()) 3661 return Result; 3662 } 3663 3664 // Then check to see if we should lower the memset with target-specific 3665 // code. If the target chooses to do this, this is the next best. 3666 SDValue Result = 3667 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3668 DstSV, DstSVOff); 3669 if (Result.getNode()) 3670 return Result; 3671 3672 // Emit a library call. 3673 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3674 TargetLowering::ArgListTy Args; 3675 TargetLowering::ArgListEntry Entry; 3676 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3677 Args.push_back(Entry); 3678 // Extend or truncate the argument to be an i32 value for the call. 3679 if (Src.getValueType().bitsGT(MVT::i32)) 3680 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3681 else 3682 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3683 Entry.Node = Src; 3684 Entry.Ty = Type::getInt32Ty(*getContext()); 3685 Entry.isSExt = true; 3686 Args.push_back(Entry); 3687 Entry.Node = Size; 3688 Entry.Ty = IntPtrTy; 3689 Entry.isSExt = false; 3690 Args.push_back(Entry); 3691 // FIXME: pass in DebugLoc 3692 std::pair<SDValue,SDValue> CallResult = 3693 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3694 false, false, false, false, 0, 3695 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3696 /*isReturnValueUsed=*/false, 3697 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3698 TLI.getPointerTy()), 3699 Args, *this, dl); 3700 return CallResult.second; 3701} 3702 3703SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3704 SDValue Chain, 3705 SDValue Ptr, SDValue Cmp, 3706 SDValue Swp, const Value* PtrVal, 3707 unsigned Alignment) { 3708 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3709 Alignment = getEVTAlignment(MemVT); 3710 3711 // Check if the memory reference references a frame index 3712 if (!PtrVal) 3713 if (const FrameIndexSDNode *FI = 3714 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3715 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3716 3717 MachineFunction &MF = getMachineFunction(); 3718 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3719 3720 // For now, atomics are considered to be volatile always. 3721 Flags |= MachineMemOperand::MOVolatile; 3722 3723 MachineMemOperand *MMO = 3724 MF.getMachineMemOperand(PtrVal, Flags, 0, 3725 MemVT.getStoreSize(), Alignment); 3726 3727 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3728} 3729 3730SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3731 SDValue Chain, 3732 SDValue Ptr, SDValue Cmp, 3733 SDValue Swp, MachineMemOperand *MMO) { 3734 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3735 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3736 3737 EVT VT = Cmp.getValueType(); 3738 3739 SDVTList VTs = getVTList(VT, MVT::Other); 3740 FoldingSetNodeID ID; 3741 ID.AddInteger(MemVT.getRawBits()); 3742 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3743 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3744 void* IP = 0; 3745 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3746 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3747 return SDValue(E, 0); 3748 } 3749 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3750 Ptr, Cmp, Swp, MMO); 3751 CSEMap.InsertNode(N, IP); 3752 AllNodes.push_back(N); 3753 return SDValue(N, 0); 3754} 3755 3756SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3757 SDValue Chain, 3758 SDValue Ptr, SDValue Val, 3759 const Value* PtrVal, 3760 unsigned Alignment) { 3761 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3762 Alignment = getEVTAlignment(MemVT); 3763 3764 // Check if the memory reference references a frame index 3765 if (!PtrVal) 3766 if (const FrameIndexSDNode *FI = 3767 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3768 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3769 3770 MachineFunction &MF = getMachineFunction(); 3771 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3772 3773 // For now, atomics are considered to be volatile always. 3774 Flags |= MachineMemOperand::MOVolatile; 3775 3776 MachineMemOperand *MMO = 3777 MF.getMachineMemOperand(PtrVal, Flags, 0, 3778 MemVT.getStoreSize(), Alignment); 3779 3780 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3781} 3782 3783SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3784 SDValue Chain, 3785 SDValue Ptr, SDValue Val, 3786 MachineMemOperand *MMO) { 3787 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3788 Opcode == ISD::ATOMIC_LOAD_SUB || 3789 Opcode == ISD::ATOMIC_LOAD_AND || 3790 Opcode == ISD::ATOMIC_LOAD_OR || 3791 Opcode == ISD::ATOMIC_LOAD_XOR || 3792 Opcode == ISD::ATOMIC_LOAD_NAND || 3793 Opcode == ISD::ATOMIC_LOAD_MIN || 3794 Opcode == ISD::ATOMIC_LOAD_MAX || 3795 Opcode == ISD::ATOMIC_LOAD_UMIN || 3796 Opcode == ISD::ATOMIC_LOAD_UMAX || 3797 Opcode == ISD::ATOMIC_SWAP) && 3798 "Invalid Atomic Op"); 3799 3800 EVT VT = Val.getValueType(); 3801 3802 SDVTList VTs = getVTList(VT, MVT::Other); 3803 FoldingSetNodeID ID; 3804 ID.AddInteger(MemVT.getRawBits()); 3805 SDValue Ops[] = {Chain, Ptr, Val}; 3806 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3807 void* IP = 0; 3808 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3809 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3810 return SDValue(E, 0); 3811 } 3812 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3813 Ptr, Val, MMO); 3814 CSEMap.InsertNode(N, IP); 3815 AllNodes.push_back(N); 3816 return SDValue(N, 0); 3817} 3818 3819/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3820/// Allowed to return something different (and simpler) if Simplify is true. 3821SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3822 DebugLoc dl) { 3823 if (NumOps == 1) 3824 return Ops[0]; 3825 3826 SmallVector<EVT, 4> VTs; 3827 VTs.reserve(NumOps); 3828 for (unsigned i = 0; i < NumOps; ++i) 3829 VTs.push_back(Ops[i].getValueType()); 3830 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3831 Ops, NumOps); 3832} 3833 3834SDValue 3835SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3836 const EVT *VTs, unsigned NumVTs, 3837 const SDValue *Ops, unsigned NumOps, 3838 EVT MemVT, const Value *srcValue, int SVOff, 3839 unsigned Align, bool Vol, 3840 bool ReadMem, bool WriteMem) { 3841 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3842 MemVT, srcValue, SVOff, Align, Vol, 3843 ReadMem, WriteMem); 3844} 3845 3846SDValue 3847SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3848 const SDValue *Ops, unsigned NumOps, 3849 EVT MemVT, const Value *srcValue, int SVOff, 3850 unsigned Align, bool Vol, 3851 bool ReadMem, bool WriteMem) { 3852 if (Align == 0) // Ensure that codegen never sees alignment 0 3853 Align = getEVTAlignment(MemVT); 3854 3855 MachineFunction &MF = getMachineFunction(); 3856 unsigned Flags = 0; 3857 if (WriteMem) 3858 Flags |= MachineMemOperand::MOStore; 3859 if (ReadMem) 3860 Flags |= MachineMemOperand::MOLoad; 3861 if (Vol) 3862 Flags |= MachineMemOperand::MOVolatile; 3863 MachineMemOperand *MMO = 3864 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3865 MemVT.getStoreSize(), Align); 3866 3867 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3868} 3869 3870SDValue 3871SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3872 const SDValue *Ops, unsigned NumOps, 3873 EVT MemVT, MachineMemOperand *MMO) { 3874 assert((Opcode == ISD::INTRINSIC_VOID || 3875 Opcode == ISD::INTRINSIC_W_CHAIN || 3876 (Opcode <= INT_MAX && 3877 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3878 "Opcode is not a memory-accessing opcode!"); 3879 3880 // Memoize the node unless it returns a flag. 3881 MemIntrinsicSDNode *N; 3882 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3883 FoldingSetNodeID ID; 3884 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3885 void *IP = 0; 3886 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3887 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3888 return SDValue(E, 0); 3889 } 3890 3891 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3892 MemVT, MMO); 3893 CSEMap.InsertNode(N, IP); 3894 } else { 3895 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3896 MemVT, MMO); 3897 } 3898 AllNodes.push_back(N); 3899 return SDValue(N, 0); 3900} 3901 3902SDValue 3903SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3904 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3905 SDValue Ptr, SDValue Offset, 3906 const Value *SV, int SVOffset, EVT MemVT, 3907 bool isVolatile, bool isNonTemporal, 3908 unsigned Alignment) { 3909 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3910 Alignment = getEVTAlignment(VT); 3911 3912 // Check if the memory reference references a frame index 3913 if (!SV) 3914 if (const FrameIndexSDNode *FI = 3915 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3916 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3917 3918 MachineFunction &MF = getMachineFunction(); 3919 unsigned Flags = MachineMemOperand::MOLoad; 3920 if (isVolatile) 3921 Flags |= MachineMemOperand::MOVolatile; 3922 if (isNonTemporal) 3923 Flags |= MachineMemOperand::MONonTemporal; 3924 MachineMemOperand *MMO = 3925 MF.getMachineMemOperand(SV, Flags, SVOffset, 3926 MemVT.getStoreSize(), Alignment); 3927 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3928} 3929 3930SDValue 3931SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3932 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3933 SDValue Ptr, SDValue Offset, EVT MemVT, 3934 MachineMemOperand *MMO) { 3935 if (VT == MemVT) { 3936 ExtType = ISD::NON_EXTLOAD; 3937 } else if (ExtType == ISD::NON_EXTLOAD) { 3938 assert(VT == MemVT && "Non-extending load from different memory type!"); 3939 } else { 3940 // Extending load. 3941 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3942 "Should only be an extending load, not truncating!"); 3943 assert(VT.isInteger() == MemVT.isInteger() && 3944 "Cannot convert from FP to Int or Int -> FP!"); 3945 assert(VT.isVector() == MemVT.isVector() && 3946 "Cannot use trunc store to convert to or from a vector!"); 3947 assert((!VT.isVector() || 3948 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3949 "Cannot use trunc store to change the number of vector elements!"); 3950 } 3951 3952 bool Indexed = AM != ISD::UNINDEXED; 3953 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3954 "Unindexed load with an offset!"); 3955 3956 SDVTList VTs = Indexed ? 3957 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3958 SDValue Ops[] = { Chain, Ptr, Offset }; 3959 FoldingSetNodeID ID; 3960 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3961 ID.AddInteger(MemVT.getRawBits()); 3962 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3963 MMO->isNonTemporal())); 3964 void *IP = 0; 3965 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3966 cast<LoadSDNode>(E)->refineAlignment(MMO); 3967 return SDValue(E, 0); 3968 } 3969 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3970 MemVT, MMO); 3971 CSEMap.InsertNode(N, IP); 3972 AllNodes.push_back(N); 3973 return SDValue(N, 0); 3974} 3975 3976SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3977 SDValue Chain, SDValue Ptr, 3978 const Value *SV, int SVOffset, 3979 bool isVolatile, bool isNonTemporal, 3980 unsigned Alignment) { 3981 SDValue Undef = getUNDEF(Ptr.getValueType()); 3982 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3983 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3984} 3985 3986SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3987 SDValue Chain, SDValue Ptr, 3988 const Value *SV, 3989 int SVOffset, EVT MemVT, 3990 bool isVolatile, bool isNonTemporal, 3991 unsigned Alignment) { 3992 SDValue Undef = getUNDEF(Ptr.getValueType()); 3993 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3994 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3995} 3996 3997SDValue 3998SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3999 SDValue Offset, ISD::MemIndexedMode AM) { 4000 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4001 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4002 "Load is already a indexed load!"); 4003 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 4004 LD->getChain(), Base, Offset, LD->getSrcValue(), 4005 LD->getSrcValueOffset(), LD->getMemoryVT(), 4006 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4007} 4008 4009SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4010 SDValue Ptr, const Value *SV, int SVOffset, 4011 bool isVolatile, bool isNonTemporal, 4012 unsigned Alignment) { 4013 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4014 Alignment = getEVTAlignment(Val.getValueType()); 4015 4016 // Check if the memory reference references a frame index 4017 if (!SV) 4018 if (const FrameIndexSDNode *FI = 4019 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4020 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4021 4022 MachineFunction &MF = getMachineFunction(); 4023 unsigned Flags = MachineMemOperand::MOStore; 4024 if (isVolatile) 4025 Flags |= MachineMemOperand::MOVolatile; 4026 if (isNonTemporal) 4027 Flags |= MachineMemOperand::MONonTemporal; 4028 MachineMemOperand *MMO = 4029 MF.getMachineMemOperand(SV, Flags, SVOffset, 4030 Val.getValueType().getStoreSize(), Alignment); 4031 4032 return getStore(Chain, dl, Val, Ptr, MMO); 4033} 4034 4035SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4036 SDValue Ptr, MachineMemOperand *MMO) { 4037 EVT VT = Val.getValueType(); 4038 SDVTList VTs = getVTList(MVT::Other); 4039 SDValue Undef = getUNDEF(Ptr.getValueType()); 4040 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4041 FoldingSetNodeID ID; 4042 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4043 ID.AddInteger(VT.getRawBits()); 4044 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4045 MMO->isNonTemporal())); 4046 void *IP = 0; 4047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4048 cast<StoreSDNode>(E)->refineAlignment(MMO); 4049 return SDValue(E, 0); 4050 } 4051 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4052 false, VT, MMO); 4053 CSEMap.InsertNode(N, IP); 4054 AllNodes.push_back(N); 4055 return SDValue(N, 0); 4056} 4057 4058SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4059 SDValue Ptr, const Value *SV, 4060 int SVOffset, EVT SVT, 4061 bool isVolatile, bool isNonTemporal, 4062 unsigned Alignment) { 4063 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4064 Alignment = getEVTAlignment(SVT); 4065 4066 // Check if the memory reference references a frame index 4067 if (!SV) 4068 if (const FrameIndexSDNode *FI = 4069 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4070 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4071 4072 MachineFunction &MF = getMachineFunction(); 4073 unsigned Flags = MachineMemOperand::MOStore; 4074 if (isVolatile) 4075 Flags |= MachineMemOperand::MOVolatile; 4076 if (isNonTemporal) 4077 Flags |= MachineMemOperand::MONonTemporal; 4078 MachineMemOperand *MMO = 4079 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4080 4081 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4082} 4083 4084SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4085 SDValue Ptr, EVT SVT, 4086 MachineMemOperand *MMO) { 4087 EVT VT = Val.getValueType(); 4088 4089 if (VT == SVT) 4090 return getStore(Chain, dl, Val, Ptr, MMO); 4091 4092 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4093 "Should only be a truncating store, not extending!"); 4094 assert(VT.isInteger() == SVT.isInteger() && 4095 "Can't do FP-INT conversion!"); 4096 assert(VT.isVector() == SVT.isVector() && 4097 "Cannot use trunc store to convert to or from a vector!"); 4098 assert((!VT.isVector() || 4099 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4100 "Cannot use trunc store to change the number of vector elements!"); 4101 4102 SDVTList VTs = getVTList(MVT::Other); 4103 SDValue Undef = getUNDEF(Ptr.getValueType()); 4104 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4105 FoldingSetNodeID ID; 4106 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4107 ID.AddInteger(SVT.getRawBits()); 4108 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4109 MMO->isNonTemporal())); 4110 void *IP = 0; 4111 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4112 cast<StoreSDNode>(E)->refineAlignment(MMO); 4113 return SDValue(E, 0); 4114 } 4115 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4116 true, SVT, MMO); 4117 CSEMap.InsertNode(N, IP); 4118 AllNodes.push_back(N); 4119 return SDValue(N, 0); 4120} 4121 4122SDValue 4123SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4124 SDValue Offset, ISD::MemIndexedMode AM) { 4125 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4126 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4127 "Store is already a indexed store!"); 4128 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4129 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4130 FoldingSetNodeID ID; 4131 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4132 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4133 ID.AddInteger(ST->getRawSubclassData()); 4134 void *IP = 0; 4135 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4136 return SDValue(E, 0); 4137 4138 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4139 ST->isTruncatingStore(), 4140 ST->getMemoryVT(), 4141 ST->getMemOperand()); 4142 CSEMap.InsertNode(N, IP); 4143 AllNodes.push_back(N); 4144 return SDValue(N, 0); 4145} 4146 4147SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4148 SDValue Chain, SDValue Ptr, 4149 SDValue SV) { 4150 SDValue Ops[] = { Chain, Ptr, SV }; 4151 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4152} 4153 4154SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4155 const SDUse *Ops, unsigned NumOps) { 4156 switch (NumOps) { 4157 case 0: return getNode(Opcode, DL, VT); 4158 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4159 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4160 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4161 default: break; 4162 } 4163 4164 // Copy from an SDUse array into an SDValue array for use with 4165 // the regular getNode logic. 4166 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4167 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4168} 4169 4170SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4171 const SDValue *Ops, unsigned NumOps) { 4172 switch (NumOps) { 4173 case 0: return getNode(Opcode, DL, VT); 4174 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4175 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4176 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4177 default: break; 4178 } 4179 4180 switch (Opcode) { 4181 default: break; 4182 case ISD::SELECT_CC: { 4183 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4184 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4185 "LHS and RHS of condition must have same type!"); 4186 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4187 "True and False arms of SelectCC must have same type!"); 4188 assert(Ops[2].getValueType() == VT && 4189 "select_cc node must be of same type as true and false value!"); 4190 break; 4191 } 4192 case ISD::BR_CC: { 4193 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4194 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4195 "LHS/RHS of comparison should match types!"); 4196 break; 4197 } 4198 } 4199 4200 // Memoize nodes. 4201 SDNode *N; 4202 SDVTList VTs = getVTList(VT); 4203 4204 if (VT != MVT::Flag) { 4205 FoldingSetNodeID ID; 4206 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4207 void *IP = 0; 4208 4209 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4210 return SDValue(E, 0); 4211 4212 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4213 CSEMap.InsertNode(N, IP); 4214 } else { 4215 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4216 } 4217 4218 AllNodes.push_back(N); 4219#ifndef NDEBUG 4220 VerifyNode(N); 4221#endif 4222 return SDValue(N, 0); 4223} 4224 4225SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4226 const std::vector<EVT> &ResultTys, 4227 const SDValue *Ops, unsigned NumOps) { 4228 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4229 Ops, NumOps); 4230} 4231 4232SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4233 const EVT *VTs, unsigned NumVTs, 4234 const SDValue *Ops, unsigned NumOps) { 4235 if (NumVTs == 1) 4236 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4237 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4238} 4239 4240SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4241 const SDValue *Ops, unsigned NumOps) { 4242 if (VTList.NumVTs == 1) 4243 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4244 4245#if 0 4246 switch (Opcode) { 4247 // FIXME: figure out how to safely handle things like 4248 // int foo(int x) { return 1 << (x & 255); } 4249 // int bar() { return foo(256); } 4250 case ISD::SRA_PARTS: 4251 case ISD::SRL_PARTS: 4252 case ISD::SHL_PARTS: 4253 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4254 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4255 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4256 else if (N3.getOpcode() == ISD::AND) 4257 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4258 // If the and is only masking out bits that cannot effect the shift, 4259 // eliminate the and. 4260 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4261 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4262 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4263 } 4264 break; 4265 } 4266#endif 4267 4268 // Memoize the node unless it returns a flag. 4269 SDNode *N; 4270 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4271 FoldingSetNodeID ID; 4272 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4273 void *IP = 0; 4274 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4275 return SDValue(E, 0); 4276 4277 if (NumOps == 1) { 4278 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4279 } else if (NumOps == 2) { 4280 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4281 } else if (NumOps == 3) { 4282 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4283 Ops[2]); 4284 } else { 4285 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4286 } 4287 CSEMap.InsertNode(N, IP); 4288 } else { 4289 if (NumOps == 1) { 4290 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4291 } else if (NumOps == 2) { 4292 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4293 } else if (NumOps == 3) { 4294 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4295 Ops[2]); 4296 } else { 4297 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4298 } 4299 } 4300 AllNodes.push_back(N); 4301#ifndef NDEBUG 4302 VerifyNode(N); 4303#endif 4304 return SDValue(N, 0); 4305} 4306 4307SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4308 return getNode(Opcode, DL, VTList, 0, 0); 4309} 4310 4311SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4312 SDValue N1) { 4313 SDValue Ops[] = { N1 }; 4314 return getNode(Opcode, DL, VTList, Ops, 1); 4315} 4316 4317SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4318 SDValue N1, SDValue N2) { 4319 SDValue Ops[] = { N1, N2 }; 4320 return getNode(Opcode, DL, VTList, Ops, 2); 4321} 4322 4323SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4324 SDValue N1, SDValue N2, SDValue N3) { 4325 SDValue Ops[] = { N1, N2, N3 }; 4326 return getNode(Opcode, DL, VTList, Ops, 3); 4327} 4328 4329SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4330 SDValue N1, SDValue N2, SDValue N3, 4331 SDValue N4) { 4332 SDValue Ops[] = { N1, N2, N3, N4 }; 4333 return getNode(Opcode, DL, VTList, Ops, 4); 4334} 4335 4336SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4337 SDValue N1, SDValue N2, SDValue N3, 4338 SDValue N4, SDValue N5) { 4339 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4340 return getNode(Opcode, DL, VTList, Ops, 5); 4341} 4342 4343SDVTList SelectionDAG::getVTList(EVT VT) { 4344 return makeVTList(SDNode::getValueTypeList(VT), 1); 4345} 4346 4347SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4348 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4349 E = VTList.rend(); I != E; ++I) 4350 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4351 return *I; 4352 4353 EVT *Array = Allocator.Allocate<EVT>(2); 4354 Array[0] = VT1; 4355 Array[1] = VT2; 4356 SDVTList Result = makeVTList(Array, 2); 4357 VTList.push_back(Result); 4358 return Result; 4359} 4360 4361SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4362 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4363 E = VTList.rend(); I != E; ++I) 4364 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4365 I->VTs[2] == VT3) 4366 return *I; 4367 4368 EVT *Array = Allocator.Allocate<EVT>(3); 4369 Array[0] = VT1; 4370 Array[1] = VT2; 4371 Array[2] = VT3; 4372 SDVTList Result = makeVTList(Array, 3); 4373 VTList.push_back(Result); 4374 return Result; 4375} 4376 4377SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4378 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4379 E = VTList.rend(); I != E; ++I) 4380 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4381 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4382 return *I; 4383 4384 EVT *Array = Allocator.Allocate<EVT>(4); 4385 Array[0] = VT1; 4386 Array[1] = VT2; 4387 Array[2] = VT3; 4388 Array[3] = VT4; 4389 SDVTList Result = makeVTList(Array, 4); 4390 VTList.push_back(Result); 4391 return Result; 4392} 4393 4394SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4395 switch (NumVTs) { 4396 case 0: llvm_unreachable("Cannot have nodes without results!"); 4397 case 1: return getVTList(VTs[0]); 4398 case 2: return getVTList(VTs[0], VTs[1]); 4399 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4400 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4401 default: break; 4402 } 4403 4404 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4405 E = VTList.rend(); I != E; ++I) { 4406 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4407 continue; 4408 4409 bool NoMatch = false; 4410 for (unsigned i = 2; i != NumVTs; ++i) 4411 if (VTs[i] != I->VTs[i]) { 4412 NoMatch = true; 4413 break; 4414 } 4415 if (!NoMatch) 4416 return *I; 4417 } 4418 4419 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4420 std::copy(VTs, VTs+NumVTs, Array); 4421 SDVTList Result = makeVTList(Array, NumVTs); 4422 VTList.push_back(Result); 4423 return Result; 4424} 4425 4426 4427/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4428/// specified operands. If the resultant node already exists in the DAG, 4429/// this does not modify the specified node, instead it returns the node that 4430/// already exists. If the resultant node does not exist in the DAG, the 4431/// input node is returned. As a degenerate case, if you specify the same 4432/// input operands as the node already has, the input node is returned. 4433SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4434 SDNode *N = InN.getNode(); 4435 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4436 4437 // Check to see if there is no change. 4438 if (Op == N->getOperand(0)) return InN; 4439 4440 // See if the modified node already exists. 4441 void *InsertPos = 0; 4442 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4443 return SDValue(Existing, InN.getResNo()); 4444 4445 // Nope it doesn't. Remove the node from its current place in the maps. 4446 if (InsertPos) 4447 if (!RemoveNodeFromCSEMaps(N)) 4448 InsertPos = 0; 4449 4450 // Now we update the operands. 4451 N->OperandList[0].set(Op); 4452 4453 // If this gets put into a CSE map, add it. 4454 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4455 return InN; 4456} 4457 4458SDValue SelectionDAG:: 4459UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4460 SDNode *N = InN.getNode(); 4461 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4462 4463 // Check to see if there is no change. 4464 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4465 return InN; // No operands changed, just return the input node. 4466 4467 // See if the modified node already exists. 4468 void *InsertPos = 0; 4469 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4470 return SDValue(Existing, InN.getResNo()); 4471 4472 // Nope it doesn't. Remove the node from its current place in the maps. 4473 if (InsertPos) 4474 if (!RemoveNodeFromCSEMaps(N)) 4475 InsertPos = 0; 4476 4477 // Now we update the operands. 4478 if (N->OperandList[0] != Op1) 4479 N->OperandList[0].set(Op1); 4480 if (N->OperandList[1] != Op2) 4481 N->OperandList[1].set(Op2); 4482 4483 // If this gets put into a CSE map, add it. 4484 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4485 return InN; 4486} 4487 4488SDValue SelectionDAG:: 4489UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4490 SDValue Ops[] = { Op1, Op2, Op3 }; 4491 return UpdateNodeOperands(N, Ops, 3); 4492} 4493 4494SDValue SelectionDAG:: 4495UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4496 SDValue Op3, SDValue Op4) { 4497 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4498 return UpdateNodeOperands(N, Ops, 4); 4499} 4500 4501SDValue SelectionDAG:: 4502UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4503 SDValue Op3, SDValue Op4, SDValue Op5) { 4504 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4505 return UpdateNodeOperands(N, Ops, 5); 4506} 4507 4508SDValue SelectionDAG:: 4509UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4510 SDNode *N = InN.getNode(); 4511 assert(N->getNumOperands() == NumOps && 4512 "Update with wrong number of operands"); 4513 4514 // Check to see if there is no change. 4515 bool AnyChange = false; 4516 for (unsigned i = 0; i != NumOps; ++i) { 4517 if (Ops[i] != N->getOperand(i)) { 4518 AnyChange = true; 4519 break; 4520 } 4521 } 4522 4523 // No operands changed, just return the input node. 4524 if (!AnyChange) return InN; 4525 4526 // See if the modified node already exists. 4527 void *InsertPos = 0; 4528 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4529 return SDValue(Existing, InN.getResNo()); 4530 4531 // Nope it doesn't. Remove the node from its current place in the maps. 4532 if (InsertPos) 4533 if (!RemoveNodeFromCSEMaps(N)) 4534 InsertPos = 0; 4535 4536 // Now we update the operands. 4537 for (unsigned i = 0; i != NumOps; ++i) 4538 if (N->OperandList[i] != Ops[i]) 4539 N->OperandList[i].set(Ops[i]); 4540 4541 // If this gets put into a CSE map, add it. 4542 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4543 return InN; 4544} 4545 4546/// DropOperands - Release the operands and set this node to have 4547/// zero operands. 4548void SDNode::DropOperands() { 4549 // Unlike the code in MorphNodeTo that does this, we don't need to 4550 // watch for dead nodes here. 4551 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4552 SDUse &Use = *I++; 4553 Use.set(SDValue()); 4554 } 4555} 4556 4557/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4558/// machine opcode. 4559/// 4560SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4561 EVT VT) { 4562 SDVTList VTs = getVTList(VT); 4563 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4564} 4565 4566SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4567 EVT VT, SDValue Op1) { 4568 SDVTList VTs = getVTList(VT); 4569 SDValue Ops[] = { Op1 }; 4570 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4571} 4572 4573SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4574 EVT VT, SDValue Op1, 4575 SDValue Op2) { 4576 SDVTList VTs = getVTList(VT); 4577 SDValue Ops[] = { Op1, Op2 }; 4578 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4579} 4580 4581SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4582 EVT VT, SDValue Op1, 4583 SDValue Op2, SDValue Op3) { 4584 SDVTList VTs = getVTList(VT); 4585 SDValue Ops[] = { Op1, Op2, Op3 }; 4586 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4587} 4588 4589SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4590 EVT VT, const SDValue *Ops, 4591 unsigned NumOps) { 4592 SDVTList VTs = getVTList(VT); 4593 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4594} 4595 4596SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4597 EVT VT1, EVT VT2, const SDValue *Ops, 4598 unsigned NumOps) { 4599 SDVTList VTs = getVTList(VT1, VT2); 4600 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4601} 4602 4603SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4604 EVT VT1, EVT VT2) { 4605 SDVTList VTs = getVTList(VT1, VT2); 4606 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4607} 4608 4609SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4610 EVT VT1, EVT VT2, EVT VT3, 4611 const SDValue *Ops, unsigned NumOps) { 4612 SDVTList VTs = getVTList(VT1, VT2, VT3); 4613 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4614} 4615 4616SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4617 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4618 const SDValue *Ops, unsigned NumOps) { 4619 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4620 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4621} 4622 4623SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4624 EVT VT1, EVT VT2, 4625 SDValue Op1) { 4626 SDVTList VTs = getVTList(VT1, VT2); 4627 SDValue Ops[] = { Op1 }; 4628 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4629} 4630 4631SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4632 EVT VT1, EVT VT2, 4633 SDValue Op1, SDValue Op2) { 4634 SDVTList VTs = getVTList(VT1, VT2); 4635 SDValue Ops[] = { Op1, Op2 }; 4636 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4637} 4638 4639SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4640 EVT VT1, EVT VT2, 4641 SDValue Op1, SDValue Op2, 4642 SDValue Op3) { 4643 SDVTList VTs = getVTList(VT1, VT2); 4644 SDValue Ops[] = { Op1, Op2, Op3 }; 4645 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4646} 4647 4648SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4649 EVT VT1, EVT VT2, EVT VT3, 4650 SDValue Op1, SDValue Op2, 4651 SDValue Op3) { 4652 SDVTList VTs = getVTList(VT1, VT2, VT3); 4653 SDValue Ops[] = { Op1, Op2, Op3 }; 4654 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4655} 4656 4657SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4658 SDVTList VTs, const SDValue *Ops, 4659 unsigned NumOps) { 4660 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4661 // Reset the NodeID to -1. 4662 N->setNodeId(-1); 4663 return N; 4664} 4665 4666/// MorphNodeTo - This *mutates* the specified node to have the specified 4667/// return type, opcode, and operands. 4668/// 4669/// Note that MorphNodeTo returns the resultant node. If there is already a 4670/// node of the specified opcode and operands, it returns that node instead of 4671/// the current one. Note that the DebugLoc need not be the same. 4672/// 4673/// Using MorphNodeTo is faster than creating a new node and swapping it in 4674/// with ReplaceAllUsesWith both because it often avoids allocating a new 4675/// node, and because it doesn't require CSE recalculation for any of 4676/// the node's users. 4677/// 4678SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4679 SDVTList VTs, const SDValue *Ops, 4680 unsigned NumOps) { 4681 // If an identical node already exists, use it. 4682 void *IP = 0; 4683 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4684 FoldingSetNodeID ID; 4685 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4686 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4687 return ON; 4688 } 4689 4690 if (!RemoveNodeFromCSEMaps(N)) 4691 IP = 0; 4692 4693 // Start the morphing. 4694 N->NodeType = Opc; 4695 N->ValueList = VTs.VTs; 4696 N->NumValues = VTs.NumVTs; 4697 4698 // Clear the operands list, updating used nodes to remove this from their 4699 // use list. Keep track of any operands that become dead as a result. 4700 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4701 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4702 SDUse &Use = *I++; 4703 SDNode *Used = Use.getNode(); 4704 Use.set(SDValue()); 4705 if (Used->use_empty()) 4706 DeadNodeSet.insert(Used); 4707 } 4708 4709 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4710 // Initialize the memory references information. 4711 MN->setMemRefs(0, 0); 4712 // If NumOps is larger than the # of operands we can have in a 4713 // MachineSDNode, reallocate the operand list. 4714 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4715 if (MN->OperandsNeedDelete) 4716 delete[] MN->OperandList; 4717 if (NumOps > array_lengthof(MN->LocalOperands)) 4718 // We're creating a final node that will live unmorphed for the 4719 // remainder of the current SelectionDAG iteration, so we can allocate 4720 // the operands directly out of a pool with no recycling metadata. 4721 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4722 Ops, NumOps); 4723 else 4724 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4725 MN->OperandsNeedDelete = false; 4726 } else 4727 MN->InitOperands(MN->OperandList, Ops, NumOps); 4728 } else { 4729 // If NumOps is larger than the # of operands we currently have, reallocate 4730 // the operand list. 4731 if (NumOps > N->NumOperands) { 4732 if (N->OperandsNeedDelete) 4733 delete[] N->OperandList; 4734 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4735 N->OperandsNeedDelete = true; 4736 } else 4737 N->InitOperands(N->OperandList, Ops, NumOps); 4738 } 4739 4740 // Delete any nodes that are still dead after adding the uses for the 4741 // new operands. 4742 if (!DeadNodeSet.empty()) { 4743 SmallVector<SDNode *, 16> DeadNodes; 4744 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4745 E = DeadNodeSet.end(); I != E; ++I) 4746 if ((*I)->use_empty()) 4747 DeadNodes.push_back(*I); 4748 RemoveDeadNodes(DeadNodes); 4749 } 4750 4751 if (IP) 4752 CSEMap.InsertNode(N, IP); // Memoize the new node. 4753 return N; 4754} 4755 4756 4757/// getMachineNode - These are used for target selectors to create a new node 4758/// with specified return type(s), MachineInstr opcode, and operands. 4759/// 4760/// Note that getMachineNode returns the resultant node. If there is already a 4761/// node of the specified opcode and operands, it returns that node instead of 4762/// the current one. 4763MachineSDNode * 4764SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4765 SDVTList VTs = getVTList(VT); 4766 return getMachineNode(Opcode, dl, VTs, 0, 0); 4767} 4768 4769MachineSDNode * 4770SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4771 SDVTList VTs = getVTList(VT); 4772 SDValue Ops[] = { Op1 }; 4773 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4774} 4775 4776MachineSDNode * 4777SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4778 SDValue Op1, SDValue Op2) { 4779 SDVTList VTs = getVTList(VT); 4780 SDValue Ops[] = { Op1, Op2 }; 4781 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4782} 4783 4784MachineSDNode * 4785SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4786 SDValue Op1, SDValue Op2, SDValue Op3) { 4787 SDVTList VTs = getVTList(VT); 4788 SDValue Ops[] = { Op1, Op2, Op3 }; 4789 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4790} 4791 4792MachineSDNode * 4793SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4794 const SDValue *Ops, unsigned NumOps) { 4795 SDVTList VTs = getVTList(VT); 4796 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4797} 4798 4799MachineSDNode * 4800SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4801 SDVTList VTs = getVTList(VT1, VT2); 4802 return getMachineNode(Opcode, dl, VTs, 0, 0); 4803} 4804 4805MachineSDNode * 4806SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4807 EVT VT1, EVT VT2, SDValue Op1) { 4808 SDVTList VTs = getVTList(VT1, VT2); 4809 SDValue Ops[] = { Op1 }; 4810 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4811} 4812 4813MachineSDNode * 4814SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4815 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4816 SDVTList VTs = getVTList(VT1, VT2); 4817 SDValue Ops[] = { Op1, Op2 }; 4818 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4819} 4820 4821MachineSDNode * 4822SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4823 EVT VT1, EVT VT2, SDValue Op1, 4824 SDValue Op2, SDValue Op3) { 4825 SDVTList VTs = getVTList(VT1, VT2); 4826 SDValue Ops[] = { Op1, Op2, Op3 }; 4827 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4828} 4829 4830MachineSDNode * 4831SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4832 EVT VT1, EVT VT2, 4833 const SDValue *Ops, unsigned NumOps) { 4834 SDVTList VTs = getVTList(VT1, VT2); 4835 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4836} 4837 4838MachineSDNode * 4839SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4840 EVT VT1, EVT VT2, EVT VT3, 4841 SDValue Op1, SDValue Op2) { 4842 SDVTList VTs = getVTList(VT1, VT2, VT3); 4843 SDValue Ops[] = { Op1, Op2 }; 4844 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4845} 4846 4847MachineSDNode * 4848SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4849 EVT VT1, EVT VT2, EVT VT3, 4850 SDValue Op1, SDValue Op2, SDValue Op3) { 4851 SDVTList VTs = getVTList(VT1, VT2, VT3); 4852 SDValue Ops[] = { Op1, Op2, Op3 }; 4853 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4854} 4855 4856MachineSDNode * 4857SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4858 EVT VT1, EVT VT2, EVT VT3, 4859 const SDValue *Ops, unsigned NumOps) { 4860 SDVTList VTs = getVTList(VT1, VT2, VT3); 4861 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4862} 4863 4864MachineSDNode * 4865SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4866 EVT VT2, EVT VT3, EVT VT4, 4867 const SDValue *Ops, unsigned NumOps) { 4868 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4869 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4870} 4871 4872MachineSDNode * 4873SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4874 const std::vector<EVT> &ResultTys, 4875 const SDValue *Ops, unsigned NumOps) { 4876 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4877 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4878} 4879 4880MachineSDNode * 4881SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4882 const SDValue *Ops, unsigned NumOps) { 4883 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4884 MachineSDNode *N; 4885 void *IP; 4886 4887 if (DoCSE) { 4888 FoldingSetNodeID ID; 4889 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4890 IP = 0; 4891 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4892 return cast<MachineSDNode>(E); 4893 } 4894 4895 // Allocate a new MachineSDNode. 4896 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4897 4898 // Initialize the operands list. 4899 if (NumOps > array_lengthof(N->LocalOperands)) 4900 // We're creating a final node that will live unmorphed for the 4901 // remainder of the current SelectionDAG iteration, so we can allocate 4902 // the operands directly out of a pool with no recycling metadata. 4903 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4904 Ops, NumOps); 4905 else 4906 N->InitOperands(N->LocalOperands, Ops, NumOps); 4907 N->OperandsNeedDelete = false; 4908 4909 if (DoCSE) 4910 CSEMap.InsertNode(N, IP); 4911 4912 AllNodes.push_back(N); 4913#ifndef NDEBUG 4914 VerifyNode(N); 4915#endif 4916 return N; 4917} 4918 4919/// getTargetExtractSubreg - A convenience function for creating 4920/// TargetOpcode::EXTRACT_SUBREG nodes. 4921SDValue 4922SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4923 SDValue Operand) { 4924 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4925 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4926 VT, Operand, SRIdxVal); 4927 return SDValue(Subreg, 0); 4928} 4929 4930/// getTargetInsertSubreg - A convenience function for creating 4931/// TargetOpcode::INSERT_SUBREG nodes. 4932SDValue 4933SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4934 SDValue Operand, SDValue Subreg) { 4935 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4936 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4937 VT, Operand, Subreg, SRIdxVal); 4938 return SDValue(Result, 0); 4939} 4940 4941/// getNodeIfExists - Get the specified node if it's already available, or 4942/// else return NULL. 4943SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4944 const SDValue *Ops, unsigned NumOps) { 4945 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4946 FoldingSetNodeID ID; 4947 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4948 void *IP = 0; 4949 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4950 return E; 4951 } 4952 return NULL; 4953} 4954 4955/// getDbgValue - Creates a SDDbgValue node. 4956/// 4957SDDbgValue * 4958SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4959 DebugLoc DL, unsigned O) { 4960 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4961} 4962 4963SDDbgValue * 4964SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4965 DebugLoc DL, unsigned O) { 4966 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4967} 4968 4969SDDbgValue * 4970SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4971 DebugLoc DL, unsigned O) { 4972 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4973} 4974 4975namespace { 4976 4977/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4978/// pointed to by a use iterator is deleted, increment the use iterator 4979/// so that it doesn't dangle. 4980/// 4981/// This class also manages a "downlink" DAGUpdateListener, to forward 4982/// messages to ReplaceAllUsesWith's callers. 4983/// 4984class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4985 SelectionDAG::DAGUpdateListener *DownLink; 4986 SDNode::use_iterator &UI; 4987 SDNode::use_iterator &UE; 4988 4989 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4990 // Increment the iterator as needed. 4991 while (UI != UE && N == *UI) 4992 ++UI; 4993 4994 // Then forward the message. 4995 if (DownLink) DownLink->NodeDeleted(N, E); 4996 } 4997 4998 virtual void NodeUpdated(SDNode *N) { 4999 // Just forward the message. 5000 if (DownLink) DownLink->NodeUpdated(N); 5001 } 5002 5003public: 5004 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5005 SDNode::use_iterator &ui, 5006 SDNode::use_iterator &ue) 5007 : DownLink(dl), UI(ui), UE(ue) {} 5008}; 5009 5010} 5011 5012/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5013/// This can cause recursive merging of nodes in the DAG. 5014/// 5015/// This version assumes From has a single result value. 5016/// 5017void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5018 DAGUpdateListener *UpdateListener) { 5019 SDNode *From = FromN.getNode(); 5020 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5021 "Cannot replace with this method!"); 5022 assert(From != To.getNode() && "Cannot replace uses of with self"); 5023 5024 // Iterate over all the existing uses of From. New uses will be added 5025 // to the beginning of the use list, which we avoid visiting. 5026 // This specifically avoids visiting uses of From that arise while the 5027 // replacement is happening, because any such uses would be the result 5028 // of CSE: If an existing node looks like From after one of its operands 5029 // is replaced by To, we don't want to replace of all its users with To 5030 // too. See PR3018 for more info. 5031 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5032 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5033 while (UI != UE) { 5034 SDNode *User = *UI; 5035 5036 // This node is about to morph, remove its old self from the CSE maps. 5037 RemoveNodeFromCSEMaps(User); 5038 5039 // A user can appear in a use list multiple times, and when this 5040 // happens the uses are usually next to each other in the list. 5041 // To help reduce the number of CSE recomputations, process all 5042 // the uses of this user that we can find this way. 5043 do { 5044 SDUse &Use = UI.getUse(); 5045 ++UI; 5046 Use.set(To); 5047 } while (UI != UE && *UI == User); 5048 5049 // Now that we have modified User, add it back to the CSE maps. If it 5050 // already exists there, recursively merge the results together. 5051 AddModifiedNodeToCSEMaps(User, &Listener); 5052 } 5053} 5054 5055/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5056/// This can cause recursive merging of nodes in the DAG. 5057/// 5058/// This version assumes that for each value of From, there is a 5059/// corresponding value in To in the same position with the same type. 5060/// 5061void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5062 DAGUpdateListener *UpdateListener) { 5063#ifndef NDEBUG 5064 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5065 assert((!From->hasAnyUseOfValue(i) || 5066 From->getValueType(i) == To->getValueType(i)) && 5067 "Cannot use this version of ReplaceAllUsesWith!"); 5068#endif 5069 5070 // Handle the trivial case. 5071 if (From == To) 5072 return; 5073 5074 // Iterate over just the existing users of From. See the comments in 5075 // the ReplaceAllUsesWith above. 5076 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5077 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5078 while (UI != UE) { 5079 SDNode *User = *UI; 5080 5081 // This node is about to morph, remove its old self from the CSE maps. 5082 RemoveNodeFromCSEMaps(User); 5083 5084 // A user can appear in a use list multiple times, and when this 5085 // happens the uses are usually next to each other in the list. 5086 // To help reduce the number of CSE recomputations, process all 5087 // the uses of this user that we can find this way. 5088 do { 5089 SDUse &Use = UI.getUse(); 5090 ++UI; 5091 Use.setNode(To); 5092 } while (UI != UE && *UI == User); 5093 5094 // Now that we have modified User, add it back to the CSE maps. If it 5095 // already exists there, recursively merge the results together. 5096 AddModifiedNodeToCSEMaps(User, &Listener); 5097 } 5098} 5099 5100/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5101/// This can cause recursive merging of nodes in the DAG. 5102/// 5103/// This version can replace From with any result values. To must match the 5104/// number and types of values returned by From. 5105void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5106 const SDValue *To, 5107 DAGUpdateListener *UpdateListener) { 5108 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5109 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5110 5111 // Iterate over just the existing users of From. See the comments in 5112 // the ReplaceAllUsesWith above. 5113 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5114 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5115 while (UI != UE) { 5116 SDNode *User = *UI; 5117 5118 // This node is about to morph, remove its old self from the CSE maps. 5119 RemoveNodeFromCSEMaps(User); 5120 5121 // A user can appear in a use list multiple times, and when this 5122 // happens the uses are usually next to each other in the list. 5123 // To help reduce the number of CSE recomputations, process all 5124 // the uses of this user that we can find this way. 5125 do { 5126 SDUse &Use = UI.getUse(); 5127 const SDValue &ToOp = To[Use.getResNo()]; 5128 ++UI; 5129 Use.set(ToOp); 5130 } while (UI != UE && *UI == User); 5131 5132 // Now that we have modified User, add it back to the CSE maps. If it 5133 // already exists there, recursively merge the results together. 5134 AddModifiedNodeToCSEMaps(User, &Listener); 5135 } 5136} 5137 5138/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5139/// uses of other values produced by From.getNode() alone. The Deleted 5140/// vector is handled the same way as for ReplaceAllUsesWith. 5141void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5142 DAGUpdateListener *UpdateListener){ 5143 // Handle the really simple, really trivial case efficiently. 5144 if (From == To) return; 5145 5146 // Handle the simple, trivial, case efficiently. 5147 if (From.getNode()->getNumValues() == 1) { 5148 ReplaceAllUsesWith(From, To, UpdateListener); 5149 return; 5150 } 5151 5152 // Iterate over just the existing users of From. See the comments in 5153 // the ReplaceAllUsesWith above. 5154 SDNode::use_iterator UI = From.getNode()->use_begin(), 5155 UE = From.getNode()->use_end(); 5156 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5157 while (UI != UE) { 5158 SDNode *User = *UI; 5159 bool UserRemovedFromCSEMaps = false; 5160 5161 // A user can appear in a use list multiple times, and when this 5162 // happens the uses are usually next to each other in the list. 5163 // To help reduce the number of CSE recomputations, process all 5164 // the uses of this user that we can find this way. 5165 do { 5166 SDUse &Use = UI.getUse(); 5167 5168 // Skip uses of different values from the same node. 5169 if (Use.getResNo() != From.getResNo()) { 5170 ++UI; 5171 continue; 5172 } 5173 5174 // If this node hasn't been modified yet, it's still in the CSE maps, 5175 // so remove its old self from the CSE maps. 5176 if (!UserRemovedFromCSEMaps) { 5177 RemoveNodeFromCSEMaps(User); 5178 UserRemovedFromCSEMaps = true; 5179 } 5180 5181 ++UI; 5182 Use.set(To); 5183 } while (UI != UE && *UI == User); 5184 5185 // We are iterating over all uses of the From node, so if a use 5186 // doesn't use the specific value, no changes are made. 5187 if (!UserRemovedFromCSEMaps) 5188 continue; 5189 5190 // Now that we have modified User, add it back to the CSE maps. If it 5191 // already exists there, recursively merge the results together. 5192 AddModifiedNodeToCSEMaps(User, &Listener); 5193 } 5194} 5195 5196namespace { 5197 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5198 /// to record information about a use. 5199 struct UseMemo { 5200 SDNode *User; 5201 unsigned Index; 5202 SDUse *Use; 5203 }; 5204 5205 /// operator< - Sort Memos by User. 5206 bool operator<(const UseMemo &L, const UseMemo &R) { 5207 return (intptr_t)L.User < (intptr_t)R.User; 5208 } 5209} 5210 5211/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5212/// uses of other values produced by From.getNode() alone. The same value 5213/// may appear in both the From and To list. The Deleted vector is 5214/// handled the same way as for ReplaceAllUsesWith. 5215void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5216 const SDValue *To, 5217 unsigned Num, 5218 DAGUpdateListener *UpdateListener){ 5219 // Handle the simple, trivial case efficiently. 5220 if (Num == 1) 5221 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5222 5223 // Read up all the uses and make records of them. This helps 5224 // processing new uses that are introduced during the 5225 // replacement process. 5226 SmallVector<UseMemo, 4> Uses; 5227 for (unsigned i = 0; i != Num; ++i) { 5228 unsigned FromResNo = From[i].getResNo(); 5229 SDNode *FromNode = From[i].getNode(); 5230 for (SDNode::use_iterator UI = FromNode->use_begin(), 5231 E = FromNode->use_end(); UI != E; ++UI) { 5232 SDUse &Use = UI.getUse(); 5233 if (Use.getResNo() == FromResNo) { 5234 UseMemo Memo = { *UI, i, &Use }; 5235 Uses.push_back(Memo); 5236 } 5237 } 5238 } 5239 5240 // Sort the uses, so that all the uses from a given User are together. 5241 std::sort(Uses.begin(), Uses.end()); 5242 5243 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5244 UseIndex != UseIndexEnd; ) { 5245 // We know that this user uses some value of From. If it is the right 5246 // value, update it. 5247 SDNode *User = Uses[UseIndex].User; 5248 5249 // This node is about to morph, remove its old self from the CSE maps. 5250 RemoveNodeFromCSEMaps(User); 5251 5252 // The Uses array is sorted, so all the uses for a given User 5253 // are next to each other in the list. 5254 // To help reduce the number of CSE recomputations, process all 5255 // the uses of this user that we can find this way. 5256 do { 5257 unsigned i = Uses[UseIndex].Index; 5258 SDUse &Use = *Uses[UseIndex].Use; 5259 ++UseIndex; 5260 5261 Use.set(To[i]); 5262 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5263 5264 // Now that we have modified User, add it back to the CSE maps. If it 5265 // already exists there, recursively merge the results together. 5266 AddModifiedNodeToCSEMaps(User, UpdateListener); 5267 } 5268} 5269 5270/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5271/// based on their topological order. It returns the maximum id and a vector 5272/// of the SDNodes* in assigned order by reference. 5273unsigned SelectionDAG::AssignTopologicalOrder() { 5274 5275 unsigned DAGSize = 0; 5276 5277 // SortedPos tracks the progress of the algorithm. Nodes before it are 5278 // sorted, nodes after it are unsorted. When the algorithm completes 5279 // it is at the end of the list. 5280 allnodes_iterator SortedPos = allnodes_begin(); 5281 5282 // Visit all the nodes. Move nodes with no operands to the front of 5283 // the list immediately. Annotate nodes that do have operands with their 5284 // operand count. Before we do this, the Node Id fields of the nodes 5285 // may contain arbitrary values. After, the Node Id fields for nodes 5286 // before SortedPos will contain the topological sort index, and the 5287 // Node Id fields for nodes At SortedPos and after will contain the 5288 // count of outstanding operands. 5289 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5290 SDNode *N = I++; 5291 checkForCycles(N); 5292 unsigned Degree = N->getNumOperands(); 5293 if (Degree == 0) { 5294 // A node with no uses, add it to the result array immediately. 5295 N->setNodeId(DAGSize++); 5296 allnodes_iterator Q = N; 5297 if (Q != SortedPos) 5298 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5299 assert(SortedPos != AllNodes.end() && "Overran node list"); 5300 ++SortedPos; 5301 } else { 5302 // Temporarily use the Node Id as scratch space for the degree count. 5303 N->setNodeId(Degree); 5304 } 5305 } 5306 5307 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5308 // such that by the time the end is reached all nodes will be sorted. 5309 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5310 SDNode *N = I; 5311 checkForCycles(N); 5312 // N is in sorted position, so all its uses have one less operand 5313 // that needs to be sorted. 5314 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5315 UI != UE; ++UI) { 5316 SDNode *P = *UI; 5317 unsigned Degree = P->getNodeId(); 5318 assert(Degree != 0 && "Invalid node degree"); 5319 --Degree; 5320 if (Degree == 0) { 5321 // All of P's operands are sorted, so P may sorted now. 5322 P->setNodeId(DAGSize++); 5323 if (P != SortedPos) 5324 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5325 assert(SortedPos != AllNodes.end() && "Overran node list"); 5326 ++SortedPos; 5327 } else { 5328 // Update P's outstanding operand count. 5329 P->setNodeId(Degree); 5330 } 5331 } 5332 if (I == SortedPos) { 5333#ifndef NDEBUG 5334 SDNode *S = ++I; 5335 dbgs() << "Overran sorted position:\n"; 5336 S->dumprFull(); 5337#endif 5338 llvm_unreachable(0); 5339 } 5340 } 5341 5342 assert(SortedPos == AllNodes.end() && 5343 "Topological sort incomplete!"); 5344 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5345 "First node in topological sort is not the entry token!"); 5346 assert(AllNodes.front().getNodeId() == 0 && 5347 "First node in topological sort has non-zero id!"); 5348 assert(AllNodes.front().getNumOperands() == 0 && 5349 "First node in topological sort has operands!"); 5350 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5351 "Last node in topologic sort has unexpected id!"); 5352 assert(AllNodes.back().use_empty() && 5353 "Last node in topologic sort has users!"); 5354 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5355 return DAGSize; 5356} 5357 5358/// AssignOrdering - Assign an order to the SDNode. 5359void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5360 assert(SD && "Trying to assign an order to a null node!"); 5361 Ordering->add(SD, Order); 5362} 5363 5364/// GetOrdering - Get the order for the SDNode. 5365unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5366 assert(SD && "Trying to get the order of a null node!"); 5367 return Ordering->getOrder(SD); 5368} 5369 5370/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5371/// value is produced by SD. 5372void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5373 DbgInfo->add(DB, SD, isParameter); 5374 if (SD) 5375 SD->setHasDebugValue(true); 5376} 5377 5378//===----------------------------------------------------------------------===// 5379// SDNode Class 5380//===----------------------------------------------------------------------===// 5381 5382HandleSDNode::~HandleSDNode() { 5383 DropOperands(); 5384} 5385 5386GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5387 EVT VT, int64_t o, unsigned char TF) 5388 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5389 TheGlobal = GA; 5390} 5391 5392MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5393 MachineMemOperand *mmo) 5394 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5395 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5396 MMO->isNonTemporal()); 5397 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5398 assert(isNonTemporal() == MMO->isNonTemporal() && 5399 "Non-temporal encoding error!"); 5400 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5401} 5402 5403MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5404 const SDValue *Ops, unsigned NumOps, EVT memvt, 5405 MachineMemOperand *mmo) 5406 : SDNode(Opc, dl, VTs, Ops, NumOps), 5407 MemoryVT(memvt), MMO(mmo) { 5408 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5409 MMO->isNonTemporal()); 5410 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5411 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5412} 5413 5414/// Profile - Gather unique data for the node. 5415/// 5416void SDNode::Profile(FoldingSetNodeID &ID) const { 5417 AddNodeIDNode(ID, this); 5418} 5419 5420namespace { 5421 struct EVTArray { 5422 std::vector<EVT> VTs; 5423 5424 EVTArray() { 5425 VTs.reserve(MVT::LAST_VALUETYPE); 5426 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5427 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5428 } 5429 }; 5430} 5431 5432static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5433static ManagedStatic<EVTArray> SimpleVTArray; 5434static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5435 5436/// getValueTypeList - Return a pointer to the specified value type. 5437/// 5438const EVT *SDNode::getValueTypeList(EVT VT) { 5439 if (VT.isExtended()) { 5440 sys::SmartScopedLock<true> Lock(*VTMutex); 5441 return &(*EVTs->insert(VT).first); 5442 } else { 5443 assert(VT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE && 5444 "Value type out of range!"); 5445 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5446 } 5447} 5448 5449/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5450/// indicated value. This method ignores uses of other values defined by this 5451/// operation. 5452bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5453 assert(Value < getNumValues() && "Bad value!"); 5454 5455 // TODO: Only iterate over uses of a given value of the node 5456 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5457 if (UI.getUse().getResNo() == Value) { 5458 if (NUses == 0) 5459 return false; 5460 --NUses; 5461 } 5462 } 5463 5464 // Found exactly the right number of uses? 5465 return NUses == 0; 5466} 5467 5468 5469/// hasAnyUseOfValue - Return true if there are any use of the indicated 5470/// value. This method ignores uses of other values defined by this operation. 5471bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5472 assert(Value < getNumValues() && "Bad value!"); 5473 5474 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5475 if (UI.getUse().getResNo() == Value) 5476 return true; 5477 5478 return false; 5479} 5480 5481 5482/// isOnlyUserOf - Return true if this node is the only use of N. 5483/// 5484bool SDNode::isOnlyUserOf(SDNode *N) const { 5485 bool Seen = false; 5486 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5487 SDNode *User = *I; 5488 if (User == this) 5489 Seen = true; 5490 else 5491 return false; 5492 } 5493 5494 return Seen; 5495} 5496 5497/// isOperand - Return true if this node is an operand of N. 5498/// 5499bool SDValue::isOperandOf(SDNode *N) const { 5500 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5501 if (*this == N->getOperand(i)) 5502 return true; 5503 return false; 5504} 5505 5506bool SDNode::isOperandOf(SDNode *N) const { 5507 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5508 if (this == N->OperandList[i].getNode()) 5509 return true; 5510 return false; 5511} 5512 5513/// reachesChainWithoutSideEffects - Return true if this operand (which must 5514/// be a chain) reaches the specified operand without crossing any 5515/// side-effecting instructions. In practice, this looks through token 5516/// factors and non-volatile loads. In order to remain efficient, this only 5517/// looks a couple of nodes in, it does not do an exhaustive search. 5518bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5519 unsigned Depth) const { 5520 if (*this == Dest) return true; 5521 5522 // Don't search too deeply, we just want to be able to see through 5523 // TokenFactor's etc. 5524 if (Depth == 0) return false; 5525 5526 // If this is a token factor, all inputs to the TF happen in parallel. If any 5527 // of the operands of the TF reach dest, then we can do the xform. 5528 if (getOpcode() == ISD::TokenFactor) { 5529 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5530 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5531 return true; 5532 return false; 5533 } 5534 5535 // Loads don't have side effects, look through them. 5536 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5537 if (!Ld->isVolatile()) 5538 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5539 } 5540 return false; 5541} 5542 5543/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5544/// is either an operand of N or it can be reached by traversing up the operands. 5545/// NOTE: this is an expensive method. Use it carefully. 5546bool SDNode::isPredecessorOf(SDNode *N) const { 5547 SmallPtrSet<SDNode *, 32> Visited; 5548 SmallVector<SDNode *, 16> Worklist; 5549 Worklist.push_back(N); 5550 5551 do { 5552 N = Worklist.pop_back_val(); 5553 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5554 SDNode *Op = N->getOperand(i).getNode(); 5555 if (Op == this) 5556 return true; 5557 if (Visited.insert(Op)) 5558 Worklist.push_back(Op); 5559 } 5560 } while (!Worklist.empty()); 5561 5562 return false; 5563} 5564 5565uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5566 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5567 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5568} 5569 5570std::string SDNode::getOperationName(const SelectionDAG *G) const { 5571 switch (getOpcode()) { 5572 default: 5573 if (getOpcode() < ISD::BUILTIN_OP_END) 5574 return "<<Unknown DAG Node>>"; 5575 if (isMachineOpcode()) { 5576 if (G) 5577 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5578 if (getMachineOpcode() < TII->getNumOpcodes()) 5579 return TII->get(getMachineOpcode()).getName(); 5580 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5581 } 5582 if (G) { 5583 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5584 const char *Name = TLI.getTargetNodeName(getOpcode()); 5585 if (Name) return Name; 5586 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5587 } 5588 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5589 5590#ifndef NDEBUG 5591 case ISD::DELETED_NODE: 5592 return "<<Deleted Node!>>"; 5593#endif 5594 case ISD::PREFETCH: return "Prefetch"; 5595 case ISD::MEMBARRIER: return "MemBarrier"; 5596 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5597 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5598 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5599 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5600 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5601 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5602 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5603 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5604 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5605 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5606 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5607 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5608 case ISD::PCMARKER: return "PCMarker"; 5609 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5610 case ISD::SRCVALUE: return "SrcValue"; 5611 case ISD::MDNODE_SDNODE: return "MDNode"; 5612 case ISD::EntryToken: return "EntryToken"; 5613 case ISD::TokenFactor: return "TokenFactor"; 5614 case ISD::AssertSext: return "AssertSext"; 5615 case ISD::AssertZext: return "AssertZext"; 5616 5617 case ISD::BasicBlock: return "BasicBlock"; 5618 case ISD::VALUETYPE: return "ValueType"; 5619 case ISD::Register: return "Register"; 5620 5621 case ISD::Constant: return "Constant"; 5622 case ISD::ConstantFP: return "ConstantFP"; 5623 case ISD::GlobalAddress: return "GlobalAddress"; 5624 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5625 case ISD::FrameIndex: return "FrameIndex"; 5626 case ISD::JumpTable: return "JumpTable"; 5627 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5628 case ISD::RETURNADDR: return "RETURNADDR"; 5629 case ISD::FRAMEADDR: return "FRAMEADDR"; 5630 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5631 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5632 case ISD::LSDAADDR: return "LSDAADDR"; 5633 case ISD::EHSELECTION: return "EHSELECTION"; 5634 case ISD::EH_RETURN: return "EH_RETURN"; 5635 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5636 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5637 case ISD::ConstantPool: return "ConstantPool"; 5638 case ISD::ExternalSymbol: return "ExternalSymbol"; 5639 case ISD::BlockAddress: return "BlockAddress"; 5640 case ISD::INTRINSIC_WO_CHAIN: 5641 case ISD::INTRINSIC_VOID: 5642 case ISD::INTRINSIC_W_CHAIN: { 5643 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5644 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5645 if (IID < Intrinsic::num_intrinsics) 5646 return Intrinsic::getName((Intrinsic::ID)IID); 5647 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5648 return TII->getName(IID); 5649 llvm_unreachable("Invalid intrinsic ID"); 5650 } 5651 5652 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5653 case ISD::TargetConstant: return "TargetConstant"; 5654 case ISD::TargetConstantFP:return "TargetConstantFP"; 5655 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5656 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5657 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5658 case ISD::TargetJumpTable: return "TargetJumpTable"; 5659 case ISD::TargetConstantPool: return "TargetConstantPool"; 5660 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5661 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5662 5663 case ISD::CopyToReg: return "CopyToReg"; 5664 case ISD::CopyFromReg: return "CopyFromReg"; 5665 case ISD::UNDEF: return "undef"; 5666 case ISD::MERGE_VALUES: return "merge_values"; 5667 case ISD::INLINEASM: return "inlineasm"; 5668 case ISD::EH_LABEL: return "eh_label"; 5669 case ISD::HANDLENODE: return "handlenode"; 5670 5671 // Unary operators 5672 case ISD::FABS: return "fabs"; 5673 case ISD::FNEG: return "fneg"; 5674 case ISD::FSQRT: return "fsqrt"; 5675 case ISD::FSIN: return "fsin"; 5676 case ISD::FCOS: return "fcos"; 5677 case ISD::FPOWI: return "fpowi"; 5678 case ISD::FPOW: return "fpow"; 5679 case ISD::FTRUNC: return "ftrunc"; 5680 case ISD::FFLOOR: return "ffloor"; 5681 case ISD::FCEIL: return "fceil"; 5682 case ISD::FRINT: return "frint"; 5683 case ISD::FNEARBYINT: return "fnearbyint"; 5684 5685 // Binary operators 5686 case ISD::ADD: return "add"; 5687 case ISD::SUB: return "sub"; 5688 case ISD::MUL: return "mul"; 5689 case ISD::MULHU: return "mulhu"; 5690 case ISD::MULHS: return "mulhs"; 5691 case ISD::SDIV: return "sdiv"; 5692 case ISD::UDIV: return "udiv"; 5693 case ISD::SREM: return "srem"; 5694 case ISD::UREM: return "urem"; 5695 case ISD::SMUL_LOHI: return "smul_lohi"; 5696 case ISD::UMUL_LOHI: return "umul_lohi"; 5697 case ISD::SDIVREM: return "sdivrem"; 5698 case ISD::UDIVREM: return "udivrem"; 5699 case ISD::AND: return "and"; 5700 case ISD::OR: return "or"; 5701 case ISD::XOR: return "xor"; 5702 case ISD::SHL: return "shl"; 5703 case ISD::SRA: return "sra"; 5704 case ISD::SRL: return "srl"; 5705 case ISD::ROTL: return "rotl"; 5706 case ISD::ROTR: return "rotr"; 5707 case ISD::FADD: return "fadd"; 5708 case ISD::FSUB: return "fsub"; 5709 case ISD::FMUL: return "fmul"; 5710 case ISD::FDIV: return "fdiv"; 5711 case ISD::FREM: return "frem"; 5712 case ISD::FCOPYSIGN: return "fcopysign"; 5713 case ISD::FGETSIGN: return "fgetsign"; 5714 5715 case ISD::SETCC: return "setcc"; 5716 case ISD::VSETCC: return "vsetcc"; 5717 case ISD::SELECT: return "select"; 5718 case ISD::SELECT_CC: return "select_cc"; 5719 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5720 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5721 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5722 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5723 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5724 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5725 case ISD::CARRY_FALSE: return "carry_false"; 5726 case ISD::ADDC: return "addc"; 5727 case ISD::ADDE: return "adde"; 5728 case ISD::SADDO: return "saddo"; 5729 case ISD::UADDO: return "uaddo"; 5730 case ISD::SSUBO: return "ssubo"; 5731 case ISD::USUBO: return "usubo"; 5732 case ISD::SMULO: return "smulo"; 5733 case ISD::UMULO: return "umulo"; 5734 case ISD::SUBC: return "subc"; 5735 case ISD::SUBE: return "sube"; 5736 case ISD::SHL_PARTS: return "shl_parts"; 5737 case ISD::SRA_PARTS: return "sra_parts"; 5738 case ISD::SRL_PARTS: return "srl_parts"; 5739 5740 // Conversion operators. 5741 case ISD::SIGN_EXTEND: return "sign_extend"; 5742 case ISD::ZERO_EXTEND: return "zero_extend"; 5743 case ISD::ANY_EXTEND: return "any_extend"; 5744 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5745 case ISD::TRUNCATE: return "truncate"; 5746 case ISD::FP_ROUND: return "fp_round"; 5747 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5748 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5749 case ISD::FP_EXTEND: return "fp_extend"; 5750 5751 case ISD::SINT_TO_FP: return "sint_to_fp"; 5752 case ISD::UINT_TO_FP: return "uint_to_fp"; 5753 case ISD::FP_TO_SINT: return "fp_to_sint"; 5754 case ISD::FP_TO_UINT: return "fp_to_uint"; 5755 case ISD::BIT_CONVERT: return "bit_convert"; 5756 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5757 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5758 5759 case ISD::CONVERT_RNDSAT: { 5760 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5761 default: llvm_unreachable("Unknown cvt code!"); 5762 case ISD::CVT_FF: return "cvt_ff"; 5763 case ISD::CVT_FS: return "cvt_fs"; 5764 case ISD::CVT_FU: return "cvt_fu"; 5765 case ISD::CVT_SF: return "cvt_sf"; 5766 case ISD::CVT_UF: return "cvt_uf"; 5767 case ISD::CVT_SS: return "cvt_ss"; 5768 case ISD::CVT_SU: return "cvt_su"; 5769 case ISD::CVT_US: return "cvt_us"; 5770 case ISD::CVT_UU: return "cvt_uu"; 5771 } 5772 } 5773 5774 // Control flow instructions 5775 case ISD::BR: return "br"; 5776 case ISD::BRIND: return "brind"; 5777 case ISD::BR_JT: return "br_jt"; 5778 case ISD::BRCOND: return "brcond"; 5779 case ISD::BR_CC: return "br_cc"; 5780 case ISD::CALLSEQ_START: return "callseq_start"; 5781 case ISD::CALLSEQ_END: return "callseq_end"; 5782 5783 // Other operators 5784 case ISD::LOAD: return "load"; 5785 case ISD::STORE: return "store"; 5786 case ISD::VAARG: return "vaarg"; 5787 case ISD::VACOPY: return "vacopy"; 5788 case ISD::VAEND: return "vaend"; 5789 case ISD::VASTART: return "vastart"; 5790 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5791 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5792 case ISD::BUILD_PAIR: return "build_pair"; 5793 case ISD::STACKSAVE: return "stacksave"; 5794 case ISD::STACKRESTORE: return "stackrestore"; 5795 case ISD::TRAP: return "trap"; 5796 5797 // Bit manipulation 5798 case ISD::BSWAP: return "bswap"; 5799 case ISD::CTPOP: return "ctpop"; 5800 case ISD::CTTZ: return "cttz"; 5801 case ISD::CTLZ: return "ctlz"; 5802 5803 // Trampolines 5804 case ISD::TRAMPOLINE: return "trampoline"; 5805 5806 case ISD::CONDCODE: 5807 switch (cast<CondCodeSDNode>(this)->get()) { 5808 default: llvm_unreachable("Unknown setcc condition!"); 5809 case ISD::SETOEQ: return "setoeq"; 5810 case ISD::SETOGT: return "setogt"; 5811 case ISD::SETOGE: return "setoge"; 5812 case ISD::SETOLT: return "setolt"; 5813 case ISD::SETOLE: return "setole"; 5814 case ISD::SETONE: return "setone"; 5815 5816 case ISD::SETO: return "seto"; 5817 case ISD::SETUO: return "setuo"; 5818 case ISD::SETUEQ: return "setue"; 5819 case ISD::SETUGT: return "setugt"; 5820 case ISD::SETUGE: return "setuge"; 5821 case ISD::SETULT: return "setult"; 5822 case ISD::SETULE: return "setule"; 5823 case ISD::SETUNE: return "setune"; 5824 5825 case ISD::SETEQ: return "seteq"; 5826 case ISD::SETGT: return "setgt"; 5827 case ISD::SETGE: return "setge"; 5828 case ISD::SETLT: return "setlt"; 5829 case ISD::SETLE: return "setle"; 5830 case ISD::SETNE: return "setne"; 5831 } 5832 } 5833} 5834 5835const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5836 switch (AM) { 5837 default: 5838 return ""; 5839 case ISD::PRE_INC: 5840 return "<pre-inc>"; 5841 case ISD::PRE_DEC: 5842 return "<pre-dec>"; 5843 case ISD::POST_INC: 5844 return "<post-inc>"; 5845 case ISD::POST_DEC: 5846 return "<post-dec>"; 5847 } 5848} 5849 5850std::string ISD::ArgFlagsTy::getArgFlagsString() { 5851 std::string S = "< "; 5852 5853 if (isZExt()) 5854 S += "zext "; 5855 if (isSExt()) 5856 S += "sext "; 5857 if (isInReg()) 5858 S += "inreg "; 5859 if (isSRet()) 5860 S += "sret "; 5861 if (isByVal()) 5862 S += "byval "; 5863 if (isNest()) 5864 S += "nest "; 5865 if (getByValAlign()) 5866 S += "byval-align:" + utostr(getByValAlign()) + " "; 5867 if (getOrigAlign()) 5868 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5869 if (getByValSize()) 5870 S += "byval-size:" + utostr(getByValSize()) + " "; 5871 return S + ">"; 5872} 5873 5874void SDNode::dump() const { dump(0); } 5875void SDNode::dump(const SelectionDAG *G) const { 5876 print(dbgs(), G); 5877} 5878 5879void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5880 OS << (void*)this << ": "; 5881 5882 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5883 if (i) OS << ","; 5884 if (getValueType(i) == MVT::Other) 5885 OS << "ch"; 5886 else 5887 OS << getValueType(i).getEVTString(); 5888 } 5889 OS << " = " << getOperationName(G); 5890} 5891 5892void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5893 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5894 if (!MN->memoperands_empty()) { 5895 OS << "<"; 5896 OS << "Mem:"; 5897 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5898 e = MN->memoperands_end(); i != e; ++i) { 5899 OS << **i; 5900 if (next(i) != e) 5901 OS << " "; 5902 } 5903 OS << ">"; 5904 } 5905 } else if (const ShuffleVectorSDNode *SVN = 5906 dyn_cast<ShuffleVectorSDNode>(this)) { 5907 OS << "<"; 5908 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5909 int Idx = SVN->getMaskElt(i); 5910 if (i) OS << ","; 5911 if (Idx < 0) 5912 OS << "u"; 5913 else 5914 OS << Idx; 5915 } 5916 OS << ">"; 5917 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5918 OS << '<' << CSDN->getAPIntValue() << '>'; 5919 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5920 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5921 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5922 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5923 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5924 else { 5925 OS << "<APFloat("; 5926 CSDN->getValueAPF().bitcastToAPInt().dump(); 5927 OS << ")>"; 5928 } 5929 } else if (const GlobalAddressSDNode *GADN = 5930 dyn_cast<GlobalAddressSDNode>(this)) { 5931 int64_t offset = GADN->getOffset(); 5932 OS << '<'; 5933 WriteAsOperand(OS, GADN->getGlobal()); 5934 OS << '>'; 5935 if (offset > 0) 5936 OS << " + " << offset; 5937 else 5938 OS << " " << offset; 5939 if (unsigned int TF = GADN->getTargetFlags()) 5940 OS << " [TF=" << TF << ']'; 5941 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5942 OS << "<" << FIDN->getIndex() << ">"; 5943 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5944 OS << "<" << JTDN->getIndex() << ">"; 5945 if (unsigned int TF = JTDN->getTargetFlags()) 5946 OS << " [TF=" << TF << ']'; 5947 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5948 int offset = CP->getOffset(); 5949 if (CP->isMachineConstantPoolEntry()) 5950 OS << "<" << *CP->getMachineCPVal() << ">"; 5951 else 5952 OS << "<" << *CP->getConstVal() << ">"; 5953 if (offset > 0) 5954 OS << " + " << offset; 5955 else 5956 OS << " " << offset; 5957 if (unsigned int TF = CP->getTargetFlags()) 5958 OS << " [TF=" << TF << ']'; 5959 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5960 OS << "<"; 5961 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5962 if (LBB) 5963 OS << LBB->getName() << " "; 5964 OS << (const void*)BBDN->getBasicBlock() << ">"; 5965 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5966 if (G && R->getReg() && 5967 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5968 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5969 } else { 5970 OS << " %reg" << R->getReg(); 5971 } 5972 } else if (const ExternalSymbolSDNode *ES = 5973 dyn_cast<ExternalSymbolSDNode>(this)) { 5974 OS << "'" << ES->getSymbol() << "'"; 5975 if (unsigned int TF = ES->getTargetFlags()) 5976 OS << " [TF=" << TF << ']'; 5977 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5978 if (M->getValue()) 5979 OS << "<" << M->getValue() << ">"; 5980 else 5981 OS << "<null>"; 5982 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5983 if (MD->getMD()) 5984 OS << "<" << MD->getMD() << ">"; 5985 else 5986 OS << "<null>"; 5987 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5988 OS << ":" << N->getVT().getEVTString(); 5989 } 5990 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5991 OS << "<" << *LD->getMemOperand(); 5992 5993 bool doExt = true; 5994 switch (LD->getExtensionType()) { 5995 default: doExt = false; break; 5996 case ISD::EXTLOAD: OS << ", anyext"; break; 5997 case ISD::SEXTLOAD: OS << ", sext"; break; 5998 case ISD::ZEXTLOAD: OS << ", zext"; break; 5999 } 6000 if (doExt) 6001 OS << " from " << LD->getMemoryVT().getEVTString(); 6002 6003 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6004 if (*AM) 6005 OS << ", " << AM; 6006 6007 OS << ">"; 6008 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6009 OS << "<" << *ST->getMemOperand(); 6010 6011 if (ST->isTruncatingStore()) 6012 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6013 6014 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6015 if (*AM) 6016 OS << ", " << AM; 6017 6018 OS << ">"; 6019 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6020 OS << "<" << *M->getMemOperand() << ">"; 6021 } else if (const BlockAddressSDNode *BA = 6022 dyn_cast<BlockAddressSDNode>(this)) { 6023 OS << "<"; 6024 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6025 OS << ", "; 6026 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6027 OS << ">"; 6028 if (unsigned int TF = BA->getTargetFlags()) 6029 OS << " [TF=" << TF << ']'; 6030 } 6031 6032 if (G) 6033 if (unsigned Order = G->GetOrdering(this)) 6034 OS << " [ORD=" << Order << ']'; 6035 6036 if (getNodeId() != -1) 6037 OS << " [ID=" << getNodeId() << ']'; 6038 6039 DebugLoc dl = getDebugLoc(); 6040 if (G && !dl.isUnknown()) { 6041 DIScope 6042 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6043 OS << " dbg:"; 6044 // Omit the directory, since it's usually long and uninteresting. 6045 if (Scope.Verify()) 6046 OS << Scope.getFilename(); 6047 else 6048 OS << "<unknown>"; 6049 OS << ':' << dl.getLine(); 6050 if (dl.getCol() != 0) 6051 OS << ':' << dl.getCol(); 6052 } 6053} 6054 6055void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6056 print_types(OS, G); 6057 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6058 if (i) OS << ", "; else OS << " "; 6059 OS << (void*)getOperand(i).getNode(); 6060 if (unsigned RN = getOperand(i).getResNo()) 6061 OS << ":" << RN; 6062 } 6063 print_details(OS, G); 6064} 6065 6066static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6067 const SelectionDAG *G, unsigned depth, 6068 unsigned indent) 6069{ 6070 if (depth == 0) 6071 return; 6072 6073 OS.indent(indent); 6074 6075 N->print(OS, G); 6076 6077 if (depth < 1) 6078 return; 6079 6080 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6081 OS << '\n'; 6082 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6083 } 6084} 6085 6086void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6087 unsigned depth) const { 6088 printrWithDepthHelper(OS, this, G, depth, 0); 6089} 6090 6091void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6092 // Don't print impossibly deep things. 6093 printrWithDepth(OS, G, 100); 6094} 6095 6096void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6097 printrWithDepth(dbgs(), G, depth); 6098} 6099 6100void SDNode::dumprFull(const SelectionDAG *G) const { 6101 // Don't print impossibly deep things. 6102 dumprWithDepth(G, 100); 6103} 6104 6105static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6106 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6107 if (N->getOperand(i).getNode()->hasOneUse()) 6108 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6109 else 6110 dbgs() << "\n" << std::string(indent+2, ' ') 6111 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6112 6113 6114 dbgs() << "\n"; 6115 dbgs().indent(indent); 6116 N->dump(G); 6117} 6118 6119SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6120 assert(N->getNumValues() == 1 && 6121 "Can't unroll a vector with multiple results!"); 6122 6123 EVT VT = N->getValueType(0); 6124 unsigned NE = VT.getVectorNumElements(); 6125 EVT EltVT = VT.getVectorElementType(); 6126 DebugLoc dl = N->getDebugLoc(); 6127 6128 SmallVector<SDValue, 8> Scalars; 6129 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6130 6131 // If ResNE is 0, fully unroll the vector op. 6132 if (ResNE == 0) 6133 ResNE = NE; 6134 else if (NE > ResNE) 6135 NE = ResNE; 6136 6137 unsigned i; 6138 for (i= 0; i != NE; ++i) { 6139 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6140 SDValue Operand = N->getOperand(j); 6141 EVT OperandVT = Operand.getValueType(); 6142 if (OperandVT.isVector()) { 6143 // A vector operand; extract a single element. 6144 EVT OperandEltVT = OperandVT.getVectorElementType(); 6145 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6146 OperandEltVT, 6147 Operand, 6148 getConstant(i, MVT::i32)); 6149 } else { 6150 // A scalar operand; just use it as is. 6151 Operands[j] = Operand; 6152 } 6153 } 6154 6155 switch (N->getOpcode()) { 6156 default: 6157 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6158 &Operands[0], Operands.size())); 6159 break; 6160 case ISD::SHL: 6161 case ISD::SRA: 6162 case ISD::SRL: 6163 case ISD::ROTL: 6164 case ISD::ROTR: 6165 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6166 getShiftAmountOperand(Operands[1]))); 6167 break; 6168 case ISD::SIGN_EXTEND_INREG: 6169 case ISD::FP_ROUND_INREG: { 6170 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6171 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6172 Operands[0], 6173 getValueType(ExtVT))); 6174 } 6175 } 6176 } 6177 6178 for (; i < ResNE; ++i) 6179 Scalars.push_back(getUNDEF(EltVT)); 6180 6181 return getNode(ISD::BUILD_VECTOR, dl, 6182 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6183 &Scalars[0], Scalars.size()); 6184} 6185 6186 6187/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6188/// location that is 'Dist' units away from the location that the 'Base' load 6189/// is loading from. 6190bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6191 unsigned Bytes, int Dist) const { 6192 if (LD->getChain() != Base->getChain()) 6193 return false; 6194 EVT VT = LD->getValueType(0); 6195 if (VT.getSizeInBits() / 8 != Bytes) 6196 return false; 6197 6198 SDValue Loc = LD->getOperand(1); 6199 SDValue BaseLoc = Base->getOperand(1); 6200 if (Loc.getOpcode() == ISD::FrameIndex) { 6201 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6202 return false; 6203 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6204 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6205 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6206 int FS = MFI->getObjectSize(FI); 6207 int BFS = MFI->getObjectSize(BFI); 6208 if (FS != BFS || FS != (int)Bytes) return false; 6209 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6210 } 6211 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6212 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6213 if (V && (V->getSExtValue() == Dist*Bytes)) 6214 return true; 6215 } 6216 6217 const GlobalValue *GV1 = NULL; 6218 const GlobalValue *GV2 = NULL; 6219 int64_t Offset1 = 0; 6220 int64_t Offset2 = 0; 6221 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6222 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6223 if (isGA1 && isGA2 && GV1 == GV2) 6224 return Offset1 == (Offset2 + Dist*Bytes); 6225 return false; 6226} 6227 6228 6229/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6230/// it cannot be inferred. 6231unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6232 // If this is a GlobalAddress + cst, return the alignment. 6233 const GlobalValue *GV; 6234 int64_t GVOffset = 0; 6235 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6236 // If GV has specified alignment, then use it. Otherwise, use the preferred 6237 // alignment. 6238 unsigned Align = GV->getAlignment(); 6239 if (!Align) { 6240 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6241 if (GVar->hasInitializer()) { 6242 const TargetData *TD = TLI.getTargetData(); 6243 Align = TD->getPreferredAlignment(GVar); 6244 } 6245 } 6246 } 6247 return MinAlign(Align, GVOffset); 6248 } 6249 6250 // If this is a direct reference to a stack slot, use information about the 6251 // stack slot's alignment. 6252 int FrameIdx = 1 << 31; 6253 int64_t FrameOffset = 0; 6254 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6255 FrameIdx = FI->getIndex(); 6256 } else if (Ptr.getOpcode() == ISD::ADD && 6257 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6258 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6259 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6260 FrameOffset = Ptr.getConstantOperandVal(1); 6261 } 6262 6263 if (FrameIdx != (1 << 31)) { 6264 // FIXME: Handle FI+CST. 6265 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6266 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6267 FrameOffset); 6268 if (MFI.isFixedObjectIndex(FrameIdx)) { 6269 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6270 6271 // The alignment of the frame index can be determined from its offset from 6272 // the incoming frame position. If the frame object is at offset 32 and 6273 // the stack is guaranteed to be 16-byte aligned, then we know that the 6274 // object is 16-byte aligned. 6275 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6276 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6277 6278 // Finally, the frame object itself may have a known alignment. Factor 6279 // the alignment + offset into a new alignment. For example, if we know 6280 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6281 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6282 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6283 return std::max(Align, FIInfoAlign); 6284 } 6285 return FIInfoAlign; 6286 } 6287 6288 return 0; 6289} 6290 6291void SelectionDAG::dump() const { 6292 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6293 6294 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6295 I != E; ++I) { 6296 const SDNode *N = I; 6297 if (!N->hasOneUse() && N != getRoot().getNode()) 6298 DumpNodes(N, 2, this); 6299 } 6300 6301 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6302 6303 dbgs() << "\n\n"; 6304} 6305 6306void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6307 print_types(OS, G); 6308 print_details(OS, G); 6309} 6310 6311typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6312static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6313 const SelectionDAG *G, VisitedSDNodeSet &once) { 6314 if (!once.insert(N)) // If we've been here before, return now. 6315 return; 6316 6317 // Dump the current SDNode, but don't end the line yet. 6318 OS << std::string(indent, ' '); 6319 N->printr(OS, G); 6320 6321 // Having printed this SDNode, walk the children: 6322 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6323 const SDNode *child = N->getOperand(i).getNode(); 6324 6325 if (i) OS << ","; 6326 OS << " "; 6327 6328 if (child->getNumOperands() == 0) { 6329 // This child has no grandchildren; print it inline right here. 6330 child->printr(OS, G); 6331 once.insert(child); 6332 } else { // Just the address. FIXME: also print the child's opcode. 6333 OS << (void*)child; 6334 if (unsigned RN = N->getOperand(i).getResNo()) 6335 OS << ":" << RN; 6336 } 6337 } 6338 6339 OS << "\n"; 6340 6341 // Dump children that have grandchildren on their own line(s). 6342 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6343 const SDNode *child = N->getOperand(i).getNode(); 6344 DumpNodesr(OS, child, indent+2, G, once); 6345 } 6346} 6347 6348void SDNode::dumpr() const { 6349 VisitedSDNodeSet once; 6350 DumpNodesr(dbgs(), this, 0, 0, once); 6351} 6352 6353void SDNode::dumpr(const SelectionDAG *G) const { 6354 VisitedSDNodeSet once; 6355 DumpNodesr(dbgs(), this, 0, G, once); 6356} 6357 6358 6359// getAddressSpace - Return the address space this GlobalAddress belongs to. 6360unsigned GlobalAddressSDNode::getAddressSpace() const { 6361 return getGlobal()->getType()->getAddressSpace(); 6362} 6363 6364 6365const Type *ConstantPoolSDNode::getType() const { 6366 if (isMachineConstantPoolEntry()) 6367 return Val.MachineCPVal->getType(); 6368 return Val.ConstVal->getType(); 6369} 6370 6371bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6372 APInt &SplatUndef, 6373 unsigned &SplatBitSize, 6374 bool &HasAnyUndefs, 6375 unsigned MinSplatBits, 6376 bool isBigEndian) { 6377 EVT VT = getValueType(0); 6378 assert(VT.isVector() && "Expected a vector type"); 6379 unsigned sz = VT.getSizeInBits(); 6380 if (MinSplatBits > sz) 6381 return false; 6382 6383 SplatValue = APInt(sz, 0); 6384 SplatUndef = APInt(sz, 0); 6385 6386 // Get the bits. Bits with undefined values (when the corresponding element 6387 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6388 // in SplatValue. If any of the values are not constant, give up and return 6389 // false. 6390 unsigned int nOps = getNumOperands(); 6391 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6392 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6393 6394 for (unsigned j = 0; j < nOps; ++j) { 6395 unsigned i = isBigEndian ? nOps-1-j : j; 6396 SDValue OpVal = getOperand(i); 6397 unsigned BitPos = j * EltBitSize; 6398 6399 if (OpVal.getOpcode() == ISD::UNDEF) 6400 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6401 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6402 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6403 zextOrTrunc(sz) << BitPos; 6404 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6405 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6406 else 6407 return false; 6408 } 6409 6410 // The build_vector is all constants or undefs. Find the smallest element 6411 // size that splats the vector. 6412 6413 HasAnyUndefs = (SplatUndef != 0); 6414 while (sz > 8) { 6415 6416 unsigned HalfSize = sz / 2; 6417 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6418 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6419 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6420 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6421 6422 // If the two halves do not match (ignoring undef bits), stop here. 6423 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6424 MinSplatBits > HalfSize) 6425 break; 6426 6427 SplatValue = HighValue | LowValue; 6428 SplatUndef = HighUndef & LowUndef; 6429 6430 sz = HalfSize; 6431 } 6432 6433 SplatBitSize = sz; 6434 return true; 6435} 6436 6437bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6438 // Find the first non-undef value in the shuffle mask. 6439 unsigned i, e; 6440 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6441 /* search */; 6442 6443 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6444 6445 // Make sure all remaining elements are either undef or the same as the first 6446 // non-undef value. 6447 for (int Idx = Mask[i]; i != e; ++i) 6448 if (Mask[i] >= 0 && Mask[i] != Idx) 6449 return false; 6450 return true; 6451} 6452 6453#ifdef XDEBUG 6454static void checkForCyclesHelper(const SDNode *N, 6455 SmallPtrSet<const SDNode*, 32> &Visited, 6456 SmallPtrSet<const SDNode*, 32> &Checked) { 6457 // If this node has already been checked, don't check it again. 6458 if (Checked.count(N)) 6459 return; 6460 6461 // If a node has already been visited on this depth-first walk, reject it as 6462 // a cycle. 6463 if (!Visited.insert(N)) { 6464 dbgs() << "Offending node:\n"; 6465 N->dumprFull(); 6466 errs() << "Detected cycle in SelectionDAG\n"; 6467 abort(); 6468 } 6469 6470 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6471 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6472 6473 Checked.insert(N); 6474 Visited.erase(N); 6475} 6476#endif 6477 6478void llvm::checkForCycles(const llvm::SDNode *N) { 6479#ifdef XDEBUG 6480 assert(N && "Checking nonexistant SDNode"); 6481 SmallPtrSet<const SDNode*, 32> visited; 6482 SmallPtrSet<const SDNode*, 32> checked; 6483 checkForCyclesHelper(N, visited, checked); 6484#endif 6485} 6486 6487void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6488 checkForCycles(DAG->getRoot().getNode()); 6489} 6490