SelectionDAG.cpp revision 8a7f7426eeb18fef58c3471db23fc829b67bc350
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetFrameInfo.h" 35#include "llvm/Target/TargetLowering.h" 36#include "llvm/Target/TargetSelectionDAGInfo.h" 37#include "llvm/Target/TargetOptions.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetIntrinsicInfo.h" 40#include "llvm/Target/TargetMachine.h" 41#include "llvm/Support/CommandLine.h" 42#include "llvm/Support/Debug.h" 43#include "llvm/Support/ErrorHandling.h" 44#include "llvm/Support/ManagedStatic.h" 45#include "llvm/Support/MathExtras.h" 46#include "llvm/Support/raw_ostream.h" 47#include "llvm/System/Mutex.h" 48#include "llvm/ADT/SetVector.h" 49#include "llvm/ADT/SmallPtrSet.h" 50#include "llvm/ADT/SmallSet.h" 51#include "llvm/ADT/SmallVector.h" 52#include "llvm/ADT/StringExtras.h" 53#include <algorithm> 54#include <cmath> 55using namespace llvm; 56 57/// makeVTList - Return an instance of the SDVTList struct initialized with the 58/// specified members. 59static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 60 SDVTList Res = {VTs, NumVTs}; 61 return Res; 62} 63 64static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 65 switch (VT.getSimpleVT().SimpleTy) { 66 default: llvm_unreachable("Unknown FP format"); 67 case MVT::f32: return &APFloat::IEEEsingle; 68 case MVT::f64: return &APFloat::IEEEdouble; 69 case MVT::f80: return &APFloat::x87DoubleExtended; 70 case MVT::f128: return &APFloat::IEEEquad; 71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 72 } 73} 74 75SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 76 77//===----------------------------------------------------------------------===// 78// ConstantFPSDNode Class 79//===----------------------------------------------------------------------===// 80 81/// isExactlyValue - We don't rely on operator== working on double values, as 82/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 83/// As such, this method can be used to do an exact bit-for-bit comparison of 84/// two floating point values. 85bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 86 return getValueAPF().bitwiseIsEqual(V); 87} 88 89bool ConstantFPSDNode::isValueValidForType(EVT VT, 90 const APFloat& Val) { 91 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 92 93 // PPC long double cannot be converted to any other type. 94 if (VT == MVT::ppcf128 || 95 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 96 return false; 97 98 // convert modifies in place, so make a copy. 99 APFloat Val2 = APFloat(Val); 100 bool losesInfo; 101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 102 &losesInfo); 103 return !losesInfo; 104} 105 106//===----------------------------------------------------------------------===// 107// ISD Namespace 108//===----------------------------------------------------------------------===// 109 110/// isBuildVectorAllOnes - Return true if the specified node is a 111/// BUILD_VECTOR where all of the elements are ~0 or undef. 112bool ISD::isBuildVectorAllOnes(const SDNode *N) { 113 // Look through a bit convert. 114 if (N->getOpcode() == ISD::BIT_CONVERT) 115 N = N->getOperand(0).getNode(); 116 117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 118 119 unsigned i = 0, e = N->getNumOperands(); 120 121 // Skip over all of the undef values. 122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 123 ++i; 124 125 // Do not accept an all-undef vector. 126 if (i == e) return false; 127 128 // Do not accept build_vectors that aren't all constants or which have non-~0 129 // elements. 130 SDValue NotZero = N->getOperand(i); 131 if (isa<ConstantSDNode>(NotZero)) { 132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 133 return false; 134 } else if (isa<ConstantFPSDNode>(NotZero)) { 135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 136 bitcastToAPInt().isAllOnesValue()) 137 return false; 138 } else 139 return false; 140 141 // Okay, we have at least one ~0 value, check to see if the rest match or are 142 // undefs. 143 for (++i; i != e; ++i) 144 if (N->getOperand(i) != NotZero && 145 N->getOperand(i).getOpcode() != ISD::UNDEF) 146 return false; 147 return true; 148} 149 150 151/// isBuildVectorAllZeros - Return true if the specified node is a 152/// BUILD_VECTOR where all of the elements are 0 or undef. 153bool ISD::isBuildVectorAllZeros(const SDNode *N) { 154 // Look through a bit convert. 155 if (N->getOpcode() == ISD::BIT_CONVERT) 156 N = N->getOperand(0).getNode(); 157 158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 159 160 unsigned i = 0, e = N->getNumOperands(); 161 162 // Skip over all of the undef values. 163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 164 ++i; 165 166 // Do not accept an all-undef vector. 167 if (i == e) return false; 168 169 // Do not accept build_vectors that aren't all constants or which have non-0 170 // elements. 171 SDValue Zero = N->getOperand(i); 172 if (isa<ConstantSDNode>(Zero)) { 173 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 174 return false; 175 } else if (isa<ConstantFPSDNode>(Zero)) { 176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 177 return false; 178 } else 179 return false; 180 181 // Okay, we have at least one 0 value, check to see if the rest match or are 182 // undefs. 183 for (++i; i != e; ++i) 184 if (N->getOperand(i) != Zero && 185 N->getOperand(i).getOpcode() != ISD::UNDEF) 186 return false; 187 return true; 188} 189 190/// isScalarToVector - Return true if the specified node is a 191/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 192/// element is not an undef. 193bool ISD::isScalarToVector(const SDNode *N) { 194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 195 return true; 196 197 if (N->getOpcode() != ISD::BUILD_VECTOR) 198 return false; 199 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 200 return false; 201 unsigned NumElems = N->getNumOperands(); 202 for (unsigned i = 1; i < NumElems; ++i) { 203 SDValue V = N->getOperand(i); 204 if (V.getOpcode() != ISD::UNDEF) 205 return false; 206 } 207 return true; 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 231 if (Operation > ISD::SETTRUE2) 232 Operation &= ~8; // Don't let N and U bits get set. 233 234 return ISD::CondCode(Operation); 235} 236 237 238/// isSignedOp - For an integer comparison, return 1 if the comparison is a 239/// signed operation and 2 if the result is an unsigned comparison. Return zero 240/// if the operation does not depend on the sign of the input (setne and seteq). 241static int isSignedOp(ISD::CondCode Opcode) { 242 switch (Opcode) { 243 default: llvm_unreachable("Illegal integer setcc operation!"); 244 case ISD::SETEQ: 245 case ISD::SETNE: return 0; 246 case ISD::SETLT: 247 case ISD::SETLE: 248 case ISD::SETGT: 249 case ISD::SETGE: return 1; 250 case ISD::SETULT: 251 case ISD::SETULE: 252 case ISD::SETUGT: 253 case ISD::SETUGE: return 2; 254 } 255} 256 257/// getSetCCOrOperation - Return the result of a logical OR between different 258/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 259/// returns SETCC_INVALID if it is not possible to represent the resultant 260/// comparison. 261ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 262 bool isInteger) { 263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 264 // Cannot fold a signed integer setcc with an unsigned integer setcc. 265 return ISD::SETCC_INVALID; 266 267 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 268 269 // If the N and U bits get set then the resultant comparison DOES suddenly 270 // care about orderedness, and is true when ordered. 271 if (Op > ISD::SETTRUE2) 272 Op &= ~16; // Clear the U bit if the N bit is set. 273 274 // Canonicalize illegal integer setcc's. 275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 276 Op = ISD::SETNE; 277 278 return ISD::CondCode(Op); 279} 280 281/// getSetCCAndOperation - Return the result of a logical AND between different 282/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 283/// function returns zero if it is not possible to represent the resultant 284/// comparison. 285ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 286 bool isInteger) { 287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 288 // Cannot fold a signed setcc with an unsigned setcc. 289 return ISD::SETCC_INVALID; 290 291 // Combine all of the condition bits. 292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 293 294 // Canonicalize illegal integer setcc's. 295 if (isInteger) { 296 switch (Result) { 297 default: break; 298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 299 case ISD::SETOEQ: // SETEQ & SETU[LG]E 300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 303 } 304 } 305 306 return Result; 307} 308 309//===----------------------------------------------------------------------===// 310// SDNode Profile Support 311//===----------------------------------------------------------------------===// 312 313/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 314/// 315static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 316 ID.AddInteger(OpC); 317} 318 319/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 320/// solely with their pointer. 321static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 322 ID.AddPointer(VTList.VTs); 323} 324 325/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 326/// 327static void AddNodeIDOperands(FoldingSetNodeID &ID, 328 const SDValue *Ops, unsigned NumOps) { 329 for (; NumOps; --NumOps, ++Ops) { 330 ID.AddPointer(Ops->getNode()); 331 ID.AddInteger(Ops->getResNo()); 332 } 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDUse *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345static void AddNodeIDNode(FoldingSetNodeID &ID, 346 unsigned short OpC, SDVTList VTList, 347 const SDValue *OpList, unsigned N) { 348 AddNodeIDOpcode(ID, OpC); 349 AddNodeIDValueTypes(ID, VTList); 350 AddNodeIDOperands(ID, OpList, N); 351} 352 353/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 354/// the NodeID data. 355static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 356 switch (N->getOpcode()) { 357 case ISD::TargetExternalSymbol: 358 case ISD::ExternalSymbol: 359 llvm_unreachable("Should only be used on nodes with operands"); 360 default: break; // Normal nodes don't need extra info. 361 case ISD::TargetConstant: 362 case ISD::Constant: 363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 364 break; 365 case ISD::TargetConstantFP: 366 case ISD::ConstantFP: { 367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 368 break; 369 } 370 case ISD::TargetGlobalAddress: 371 case ISD::GlobalAddress: 372 case ISD::TargetGlobalTLSAddress: 373 case ISD::GlobalTLSAddress: { 374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 375 ID.AddPointer(GA->getGlobal()); 376 ID.AddInteger(GA->getOffset()); 377 ID.AddInteger(GA->getTargetFlags()); 378 break; 379 } 380 case ISD::BasicBlock: 381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 382 break; 383 case ISD::Register: 384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 385 break; 386 387 case ISD::SRCVALUE: 388 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 389 break; 390 case ISD::FrameIndex: 391 case ISD::TargetFrameIndex: 392 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 393 break; 394 case ISD::JumpTable: 395 case ISD::TargetJumpTable: 396 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 398 break; 399 case ISD::ConstantPool: 400 case ISD::TargetConstantPool: { 401 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 402 ID.AddInteger(CP->getAlignment()); 403 ID.AddInteger(CP->getOffset()); 404 if (CP->isMachineConstantPoolEntry()) 405 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 406 else 407 ID.AddPointer(CP->getConstVal()); 408 ID.AddInteger(CP->getTargetFlags()); 409 break; 410 } 411 case ISD::LOAD: { 412 const LoadSDNode *LD = cast<LoadSDNode>(N); 413 ID.AddInteger(LD->getMemoryVT().getRawBits()); 414 ID.AddInteger(LD->getRawSubclassData()); 415 break; 416 } 417 case ISD::STORE: { 418 const StoreSDNode *ST = cast<StoreSDNode>(N); 419 ID.AddInteger(ST->getMemoryVT().getRawBits()); 420 ID.AddInteger(ST->getRawSubclassData()); 421 break; 422 } 423 case ISD::ATOMIC_CMP_SWAP: 424 case ISD::ATOMIC_SWAP: 425 case ISD::ATOMIC_LOAD_ADD: 426 case ISD::ATOMIC_LOAD_SUB: 427 case ISD::ATOMIC_LOAD_AND: 428 case ISD::ATOMIC_LOAD_OR: 429 case ISD::ATOMIC_LOAD_XOR: 430 case ISD::ATOMIC_LOAD_NAND: 431 case ISD::ATOMIC_LOAD_MIN: 432 case ISD::ATOMIC_LOAD_MAX: 433 case ISD::ATOMIC_LOAD_UMIN: 434 case ISD::ATOMIC_LOAD_UMAX: { 435 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 436 ID.AddInteger(AT->getMemoryVT().getRawBits()); 437 ID.AddInteger(AT->getRawSubclassData()); 438 break; 439 } 440 case ISD::VECTOR_SHUFFLE: { 441 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 442 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 443 i != e; ++i) 444 ID.AddInteger(SVN->getMaskElt(i)); 445 break; 446 } 447 case ISD::TargetBlockAddress: 448 case ISD::BlockAddress: { 449 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 450 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 451 break; 452 } 453 } // end switch (N->getOpcode()) 454} 455 456/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 457/// data. 458static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 459 AddNodeIDOpcode(ID, N->getOpcode()); 460 // Add the return value info. 461 AddNodeIDValueTypes(ID, N->getVTList()); 462 // Add the operand info. 463 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 464 465 // Handle SDNode leafs with special info. 466 AddNodeIDCustom(ID, N); 467} 468 469/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 470/// the CSE map that carries volatility, temporalness, indexing mode, and 471/// extension/truncation information. 472/// 473static inline unsigned 474encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 475 bool isNonTemporal) { 476 assert((ConvType & 3) == ConvType && 477 "ConvType may not require more than 2 bits!"); 478 assert((AM & 7) == AM && 479 "AM may not require more than 3 bits!"); 480 return ConvType | 481 (AM << 2) | 482 (isVolatile << 5) | 483 (isNonTemporal << 6); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::EH_LABEL: 499 return true; // Never CSE these nodes. 500 } 501 502 // Check that remaining values produced are not flags. 503 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 504 if (N->getValueType(i) == MVT::Flag) 505 return true; // Never CSE anything that produces a flag. 506 507 return false; 508} 509 510/// RemoveDeadNodes - This method deletes all unreachable nodes in the 511/// SelectionDAG. 512void SelectionDAG::RemoveDeadNodes() { 513 // Create a dummy node (which is not added to allnodes), that adds a reference 514 // to the root node, preventing it from being deleted. 515 HandleSDNode Dummy(getRoot()); 516 517 SmallVector<SDNode*, 128> DeadNodes; 518 519 // Add all obviously-dead nodes to the DeadNodes worklist. 520 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 521 if (I->use_empty()) 522 DeadNodes.push_back(I); 523 524 RemoveDeadNodes(DeadNodes); 525 526 // If the root changed (e.g. it was a dead load, update the root). 527 setRoot(Dummy.getValue()); 528} 529 530/// RemoveDeadNodes - This method deletes the unreachable nodes in the 531/// given list, and any nodes that become unreachable as a result. 532void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 533 DAGUpdateListener *UpdateListener) { 534 535 // Process the worklist, deleting the nodes and adding their uses to the 536 // worklist. 537 while (!DeadNodes.empty()) { 538 SDNode *N = DeadNodes.pop_back_val(); 539 540 if (UpdateListener) 541 UpdateListener->NodeDeleted(N, 0); 542 543 // Take the node out of the appropriate CSE map. 544 RemoveNodeFromCSEMaps(N); 545 546 // Next, brutally remove the operand list. This is safe to do, as there are 547 // no cycles in the graph. 548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 549 SDUse &Use = *I++; 550 SDNode *Operand = Use.getNode(); 551 Use.set(SDValue()); 552 553 // Now that we removed this operand, see if there are no uses of it left. 554 if (Operand->use_empty()) 555 DeadNodes.push_back(Operand); 556 } 557 558 DeallocateNode(N); 559 } 560} 561 562void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 563 SmallVector<SDNode*, 16> DeadNodes(1, N); 564 RemoveDeadNodes(DeadNodes, UpdateListener); 565} 566 567void SelectionDAG::DeleteNode(SDNode *N) { 568 // First take this out of the appropriate CSE map. 569 RemoveNodeFromCSEMaps(N); 570 571 // Finally, remove uses due to operands of this node, remove from the 572 // AllNodes list, and delete the node. 573 DeleteNodeNotInCSEMaps(N); 574} 575 576void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 577 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 578 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 579 580 // Drop all of the operands and decrement used node's use counts. 581 N->DropOperands(); 582 583 DeallocateNode(N); 584} 585 586void SelectionDAG::DeallocateNode(SDNode *N) { 587 if (N->OperandsNeedDelete) 588 delete[] N->OperandList; 589 590 // Set the opcode to DELETED_NODE to help catch bugs when node 591 // memory is reallocated. 592 N->NodeType = ISD::DELETED_NODE; 593 594 NodeAllocator.Deallocate(AllNodes.remove(N)); 595 596 // Remove the ordering of this node. 597 Ordering->remove(N); 598 599 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 600 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 601 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 602 DbgVals[i]->setIsInvalidated(); 603} 604 605/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 606/// correspond to it. This is useful when we're about to delete or repurpose 607/// the node. We don't want future request for structurally identical nodes 608/// to return N anymore. 609bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 610 bool Erased = false; 611 switch (N->getOpcode()) { 612 case ISD::EntryToken: 613 llvm_unreachable("EntryToken should not be in CSEMaps!"); 614 return false; 615 case ISD::HANDLENODE: return false; // noop. 616 case ISD::CONDCODE: 617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 618 "Cond code doesn't exist!"); 619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 621 break; 622 case ISD::ExternalSymbol: 623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 624 break; 625 case ISD::TargetExternalSymbol: { 626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 627 Erased = TargetExternalSymbols.erase( 628 std::pair<std::string,unsigned char>(ESN->getSymbol(), 629 ESN->getTargetFlags())); 630 break; 631 } 632 case ISD::VALUETYPE: { 633 EVT VT = cast<VTSDNode>(N)->getVT(); 634 if (VT.isExtended()) { 635 Erased = ExtendedValueTypeNodes.erase(VT); 636 } else { 637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 639 } 640 break; 641 } 642 default: 643 // Remove it from the CSE Map. 644 Erased = CSEMap.RemoveNode(N); 645 break; 646 } 647#ifndef NDEBUG 648 // Verify that the node was actually in one of the CSE maps, unless it has a 649 // flag result (which cannot be CSE'd) or is one of the special cases that are 650 // not subject to CSE. 651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 652 !N->isMachineOpcode() && !doNotCSE(N)) { 653 N->dump(this); 654 dbgs() << "\n"; 655 llvm_unreachable("Node is not in map!"); 656 } 657#endif 658 return Erased; 659} 660 661/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 662/// maps and modified in place. Add it back to the CSE maps, unless an identical 663/// node already exists, in which case transfer all its users to the existing 664/// node. This transfer can potentially trigger recursive merging. 665/// 666void 667SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 668 DAGUpdateListener *UpdateListener) { 669 // For node types that aren't CSE'd, just act as if no identical node 670 // already exists. 671 if (!doNotCSE(N)) { 672 SDNode *Existing = CSEMap.GetOrInsertNode(N); 673 if (Existing != N) { 674 // If there was already an existing matching node, use ReplaceAllUsesWith 675 // to replace the dead one with the existing one. This can cause 676 // recursive merging of other unrelated nodes down the line. 677 ReplaceAllUsesWith(N, Existing, UpdateListener); 678 679 // N is now dead. Inform the listener if it exists and delete it. 680 if (UpdateListener) 681 UpdateListener->NodeDeleted(N, Existing); 682 DeleteNodeNotInCSEMaps(N); 683 return; 684 } 685 } 686 687 // If the node doesn't already exist, we updated it. Inform a listener if 688 // it exists. 689 if (UpdateListener) 690 UpdateListener->NodeUpdated(N); 691} 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 698 void *&InsertPos) { 699 if (doNotCSE(N)) 700 return 0; 701 702 SDValue Ops[] = { Op }; 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 705 AddNodeIDCustom(ID, N); 706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 707 return Node; 708} 709 710/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 711/// were replaced with those specified. If this node is never memoized, 712/// return null, otherwise return a pointer to the slot it would take. If a 713/// node already exists with these operands, the slot will be non-null. 714SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 715 SDValue Op1, SDValue Op2, 716 void *&InsertPos) { 717 if (doNotCSE(N)) 718 return 0; 719 720 SDValue Ops[] = { Op1, Op2 }; 721 FoldingSetNodeID ID; 722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 723 AddNodeIDCustom(ID, N); 724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 725 return Node; 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 747void SelectionDAG::VerifyNode(SDNode *N) { 748 switch (N->getOpcode()) { 749 default: 750 break; 751 case ISD::BUILD_PAIR: { 752 EVT VT = N->getValueType(0); 753 assert(N->getNumValues() == 1 && "Too many results!"); 754 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 755 "Wrong return type!"); 756 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 757 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 758 "Mismatched operand types!"); 759 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 760 "Wrong operand type!"); 761 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 762 "Wrong return type size"); 763 break; 764 } 765 case ISD::BUILD_VECTOR: { 766 assert(N->getNumValues() == 1 && "Too many results!"); 767 assert(N->getValueType(0).isVector() && "Wrong return type!"); 768 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 769 "Wrong number of operands!"); 770 EVT EltVT = N->getValueType(0).getVectorElementType(); 771 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 772 assert((I->getValueType() == EltVT || 773 (EltVT.isInteger() && I->getValueType().isInteger() && 774 EltVT.bitsLE(I->getValueType()))) && 775 "Wrong operand type!"); 776 break; 777 } 778 } 779} 780 781/// getEVTAlignment - Compute the default alignment value for the 782/// given type. 783/// 784unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 785 const Type *Ty = VT == MVT::iPTR ? 786 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 787 VT.getTypeForEVT(*getContext()); 788 789 return TLI.getTargetData()->getABITypeAlignment(Ty); 790} 791 792// EntryNode could meaningfully have debug info if we can find it... 793SelectionDAG::SelectionDAG(const TargetMachine &tm) 794 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 795 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 796 Root(getEntryNode()), Ordering(0) { 797 AllNodes.push_back(&EntryNode); 798 Ordering = new SDNodeOrdering(); 799 DbgInfo = new SDDbgInfo(); 800} 801 802void SelectionDAG::init(MachineFunction &mf) { 803 MF = &mf; 804 Context = &mf.getFunction()->getContext(); 805} 806 807SelectionDAG::~SelectionDAG() { 808 allnodes_clear(); 809 delete Ordering; 810 DbgInfo->clear(); 811 delete DbgInfo; 812} 813 814void SelectionDAG::allnodes_clear() { 815 assert(&*AllNodes.begin() == &EntryNode); 816 AllNodes.remove(AllNodes.begin()); 817 while (!AllNodes.empty()) 818 DeallocateNode(AllNodes.begin()); 819} 820 821void SelectionDAG::clear() { 822 allnodes_clear(); 823 OperandAllocator.Reset(); 824 CSEMap.clear(); 825 826 ExtendedValueTypeNodes.clear(); 827 ExternalSymbols.clear(); 828 TargetExternalSymbols.clear(); 829 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 830 static_cast<CondCodeSDNode*>(0)); 831 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 832 static_cast<SDNode*>(0)); 833 834 EntryNode.UseList = 0; 835 AllNodes.push_back(&EntryNode); 836 Root = getEntryNode(); 837 delete Ordering; 838 Ordering = new SDNodeOrdering(); 839 DbgInfo->clear(); 840 delete DbgInfo; 841 DbgInfo = new SDDbgInfo(); 842} 843 844SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 845 return VT.bitsGT(Op.getValueType()) ? 846 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 847 getNode(ISD::TRUNCATE, DL, VT, Op); 848} 849 850SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 851 return VT.bitsGT(Op.getValueType()) ? 852 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 853 getNode(ISD::TRUNCATE, DL, VT, Op); 854} 855 856SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 857 assert(!VT.isVector() && 858 "getZeroExtendInReg should use the vector element type instead of " 859 "the vector type!"); 860 if (Op.getValueType() == VT) return Op; 861 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 862 APInt Imm = APInt::getLowBitsSet(BitWidth, 863 VT.getSizeInBits()); 864 return getNode(ISD::AND, DL, Op.getValueType(), Op, 865 getConstant(Imm, Op.getValueType())); 866} 867 868/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 869/// 870SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 871 EVT EltVT = VT.getScalarType(); 872 SDValue NegOne = 873 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 874 return getNode(ISD::XOR, DL, VT, Val, NegOne); 875} 876 877SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 878 EVT EltVT = VT.getScalarType(); 879 assert((EltVT.getSizeInBits() >= 64 || 880 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 881 "getConstant with a uint64_t value that doesn't fit in the type!"); 882 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 883} 884 885SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 886 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 887} 888 889SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 890 assert(VT.isInteger() && "Cannot create FP integer constant!"); 891 892 EVT EltVT = VT.getScalarType(); 893 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 894 "APInt size does not match type size!"); 895 896 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 897 FoldingSetNodeID ID; 898 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 899 ID.AddPointer(&Val); 900 void *IP = 0; 901 SDNode *N = NULL; 902 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 903 if (!VT.isVector()) 904 return SDValue(N, 0); 905 906 if (!N) { 907 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 908 CSEMap.InsertNode(N, IP); 909 AllNodes.push_back(N); 910 } 911 912 SDValue Result(N, 0); 913 if (VT.isVector()) { 914 SmallVector<SDValue, 8> Ops; 915 Ops.assign(VT.getVectorNumElements(), Result); 916 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 917 } 918 return Result; 919} 920 921SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 922 return getConstant(Val, TLI.getPointerTy(), isTarget); 923} 924 925 926SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 927 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 928} 929 930SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 931 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 932 933 EVT EltVT = VT.getScalarType(); 934 935 // Do the map lookup using the actual bit pattern for the floating point 936 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 937 // we don't have issues with SNANs. 938 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 939 FoldingSetNodeID ID; 940 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 941 ID.AddPointer(&V); 942 void *IP = 0; 943 SDNode *N = NULL; 944 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 945 if (!VT.isVector()) 946 return SDValue(N, 0); 947 948 if (!N) { 949 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 950 CSEMap.InsertNode(N, IP); 951 AllNodes.push_back(N); 952 } 953 954 SDValue Result(N, 0); 955 if (VT.isVector()) { 956 SmallVector<SDValue, 8> Ops; 957 Ops.assign(VT.getVectorNumElements(), Result); 958 // FIXME DebugLoc info might be appropriate here 959 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 960 } 961 return Result; 962} 963 964SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 965 EVT EltVT = VT.getScalarType(); 966 if (EltVT==MVT::f32) 967 return getConstantFP(APFloat((float)Val), VT, isTarget); 968 else if (EltVT==MVT::f64) 969 return getConstantFP(APFloat(Val), VT, isTarget); 970 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 971 bool ignored; 972 APFloat apf = APFloat(Val); 973 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 974 &ignored); 975 return getConstantFP(apf, VT, isTarget); 976 } else { 977 assert(0 && "Unsupported type in getConstantFP"); 978 return SDValue(); 979 } 980} 981 982SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 983 EVT VT, int64_t Offset, 984 bool isTargetGA, 985 unsigned char TargetFlags) { 986 assert((TargetFlags == 0 || isTargetGA) && 987 "Cannot set target flags on target-independent globals"); 988 989 // Truncate (with sign-extension) the offset value to the pointer size. 990 EVT PTy = TLI.getPointerTy(); 991 unsigned BitWidth = PTy.getSizeInBits(); 992 if (BitWidth < 64) 993 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 994 995 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 996 if (!GVar) { 997 // If GV is an alias then use the aliasee for determining thread-localness. 998 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 999 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1000 } 1001 1002 unsigned Opc; 1003 if (GVar && GVar->isThreadLocal()) 1004 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1005 else 1006 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1007 1008 FoldingSetNodeID ID; 1009 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1010 ID.AddPointer(GV); 1011 ID.AddInteger(Offset); 1012 ID.AddInteger(TargetFlags); 1013 void *IP = 0; 1014 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1015 return SDValue(E, 0); 1016 1017 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1018 Offset, TargetFlags); 1019 CSEMap.InsertNode(N, IP); 1020 AllNodes.push_back(N); 1021 return SDValue(N, 0); 1022} 1023 1024SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1025 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1026 FoldingSetNodeID ID; 1027 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1028 ID.AddInteger(FI); 1029 void *IP = 0; 1030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1031 return SDValue(E, 0); 1032 1033 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1034 CSEMap.InsertNode(N, IP); 1035 AllNodes.push_back(N); 1036 return SDValue(N, 0); 1037} 1038 1039SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1040 unsigned char TargetFlags) { 1041 assert((TargetFlags == 0 || isTarget) && 1042 "Cannot set target flags on target-independent jump tables"); 1043 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1044 FoldingSetNodeID ID; 1045 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1046 ID.AddInteger(JTI); 1047 ID.AddInteger(TargetFlags); 1048 void *IP = 0; 1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1050 return SDValue(E, 0); 1051 1052 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1053 TargetFlags); 1054 CSEMap.InsertNode(N, IP); 1055 AllNodes.push_back(N); 1056 return SDValue(N, 0); 1057} 1058 1059SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1060 unsigned Alignment, int Offset, 1061 bool isTarget, 1062 unsigned char TargetFlags) { 1063 assert((TargetFlags == 0 || isTarget) && 1064 "Cannot set target flags on target-independent globals"); 1065 if (Alignment == 0) 1066 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1067 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1068 FoldingSetNodeID ID; 1069 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1070 ID.AddInteger(Alignment); 1071 ID.AddInteger(Offset); 1072 ID.AddPointer(C); 1073 ID.AddInteger(TargetFlags); 1074 void *IP = 0; 1075 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1076 return SDValue(E, 0); 1077 1078 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1079 Alignment, TargetFlags); 1080 CSEMap.InsertNode(N, IP); 1081 AllNodes.push_back(N); 1082 return SDValue(N, 0); 1083} 1084 1085 1086SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1087 unsigned Alignment, int Offset, 1088 bool isTarget, 1089 unsigned char TargetFlags) { 1090 assert((TargetFlags == 0 || isTarget) && 1091 "Cannot set target flags on target-independent globals"); 1092 if (Alignment == 0) 1093 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1094 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1095 FoldingSetNodeID ID; 1096 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1097 ID.AddInteger(Alignment); 1098 ID.AddInteger(Offset); 1099 C->AddSelectionDAGCSEId(ID); 1100 ID.AddInteger(TargetFlags); 1101 void *IP = 0; 1102 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1103 return SDValue(E, 0); 1104 1105 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1106 Alignment, TargetFlags); 1107 CSEMap.InsertNode(N, IP); 1108 AllNodes.push_back(N); 1109 return SDValue(N, 0); 1110} 1111 1112SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1113 FoldingSetNodeID ID; 1114 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1115 ID.AddPointer(MBB); 1116 void *IP = 0; 1117 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1118 return SDValue(E, 0); 1119 1120 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1121 CSEMap.InsertNode(N, IP); 1122 AllNodes.push_back(N); 1123 return SDValue(N, 0); 1124} 1125 1126SDValue SelectionDAG::getValueType(EVT VT) { 1127 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1128 ValueTypeNodes.size()) 1129 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1130 1131 SDNode *&N = VT.isExtended() ? 1132 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1133 1134 if (N) return SDValue(N, 0); 1135 N = new (NodeAllocator) VTSDNode(VT); 1136 AllNodes.push_back(N); 1137 return SDValue(N, 0); 1138} 1139 1140SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1141 SDNode *&N = ExternalSymbols[Sym]; 1142 if (N) return SDValue(N, 0); 1143 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1144 AllNodes.push_back(N); 1145 return SDValue(N, 0); 1146} 1147 1148SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1149 unsigned char TargetFlags) { 1150 SDNode *&N = 1151 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1152 TargetFlags)]; 1153 if (N) return SDValue(N, 0); 1154 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1155 AllNodes.push_back(N); 1156 return SDValue(N, 0); 1157} 1158 1159SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1160 if ((unsigned)Cond >= CondCodeNodes.size()) 1161 CondCodeNodes.resize(Cond+1); 1162 1163 if (CondCodeNodes[Cond] == 0) { 1164 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1165 CondCodeNodes[Cond] = N; 1166 AllNodes.push_back(N); 1167 } 1168 1169 return SDValue(CondCodeNodes[Cond], 0); 1170} 1171 1172// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1173// the shuffle mask M that point at N1 to point at N2, and indices that point 1174// N2 to point at N1. 1175static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1176 std::swap(N1, N2); 1177 int NElts = M.size(); 1178 for (int i = 0; i != NElts; ++i) { 1179 if (M[i] >= NElts) 1180 M[i] -= NElts; 1181 else if (M[i] >= 0) 1182 M[i] += NElts; 1183 } 1184} 1185 1186SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1187 SDValue N2, const int *Mask) { 1188 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1189 assert(VT.isVector() && N1.getValueType().isVector() && 1190 "Vector Shuffle VTs must be a vectors"); 1191 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1192 && "Vector Shuffle VTs must have same element type"); 1193 1194 // Canonicalize shuffle undef, undef -> undef 1195 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1196 return getUNDEF(VT); 1197 1198 // Validate that all indices in Mask are within the range of the elements 1199 // input to the shuffle. 1200 unsigned NElts = VT.getVectorNumElements(); 1201 SmallVector<int, 8> MaskVec; 1202 for (unsigned i = 0; i != NElts; ++i) { 1203 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1204 MaskVec.push_back(Mask[i]); 1205 } 1206 1207 // Canonicalize shuffle v, v -> v, undef 1208 if (N1 == N2) { 1209 N2 = getUNDEF(VT); 1210 for (unsigned i = 0; i != NElts; ++i) 1211 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1212 } 1213 1214 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1215 if (N1.getOpcode() == ISD::UNDEF) 1216 commuteShuffle(N1, N2, MaskVec); 1217 1218 // Canonicalize all index into lhs, -> shuffle lhs, undef 1219 // Canonicalize all index into rhs, -> shuffle rhs, undef 1220 bool AllLHS = true, AllRHS = true; 1221 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1222 for (unsigned i = 0; i != NElts; ++i) { 1223 if (MaskVec[i] >= (int)NElts) { 1224 if (N2Undef) 1225 MaskVec[i] = -1; 1226 else 1227 AllLHS = false; 1228 } else if (MaskVec[i] >= 0) { 1229 AllRHS = false; 1230 } 1231 } 1232 if (AllLHS && AllRHS) 1233 return getUNDEF(VT); 1234 if (AllLHS && !N2Undef) 1235 N2 = getUNDEF(VT); 1236 if (AllRHS) { 1237 N1 = getUNDEF(VT); 1238 commuteShuffle(N1, N2, MaskVec); 1239 } 1240 1241 // If Identity shuffle, or all shuffle in to undef, return that node. 1242 bool AllUndef = true; 1243 bool Identity = true; 1244 for (unsigned i = 0; i != NElts; ++i) { 1245 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1246 if (MaskVec[i] >= 0) AllUndef = false; 1247 } 1248 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1249 return N1; 1250 if (AllUndef) 1251 return getUNDEF(VT); 1252 1253 FoldingSetNodeID ID; 1254 SDValue Ops[2] = { N1, N2 }; 1255 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1256 for (unsigned i = 0; i != NElts; ++i) 1257 ID.AddInteger(MaskVec[i]); 1258 1259 void* IP = 0; 1260 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1261 return SDValue(E, 0); 1262 1263 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1264 // SDNode doesn't have access to it. This memory will be "leaked" when 1265 // the node is deallocated, but recovered when the NodeAllocator is released. 1266 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1267 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1268 1269 ShuffleVectorSDNode *N = 1270 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1271 CSEMap.InsertNode(N, IP); 1272 AllNodes.push_back(N); 1273 return SDValue(N, 0); 1274} 1275 1276SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1277 SDValue Val, SDValue DTy, 1278 SDValue STy, SDValue Rnd, SDValue Sat, 1279 ISD::CvtCode Code) { 1280 // If the src and dest types are the same and the conversion is between 1281 // integer types of the same sign or two floats, no conversion is necessary. 1282 if (DTy == STy && 1283 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1284 return Val; 1285 1286 FoldingSetNodeID ID; 1287 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1288 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1289 void* IP = 0; 1290 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1291 return SDValue(E, 0); 1292 1293 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1294 Code); 1295 CSEMap.InsertNode(N, IP); 1296 AllNodes.push_back(N); 1297 return SDValue(N, 0); 1298} 1299 1300SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1301 FoldingSetNodeID ID; 1302 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1303 ID.AddInteger(RegNo); 1304 void *IP = 0; 1305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1306 return SDValue(E, 0); 1307 1308 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1309 CSEMap.InsertNode(N, IP); 1310 AllNodes.push_back(N); 1311 return SDValue(N, 0); 1312} 1313 1314SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1315 FoldingSetNodeID ID; 1316 SDValue Ops[] = { Root }; 1317 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1318 ID.AddPointer(Label); 1319 void *IP = 0; 1320 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1321 return SDValue(E, 0); 1322 1323 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1324 CSEMap.InsertNode(N, IP); 1325 AllNodes.push_back(N); 1326 return SDValue(N, 0); 1327} 1328 1329 1330SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1331 bool isTarget, 1332 unsigned char TargetFlags) { 1333 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1334 1335 FoldingSetNodeID ID; 1336 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1337 ID.AddPointer(BA); 1338 ID.AddInteger(TargetFlags); 1339 void *IP = 0; 1340 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1341 return SDValue(E, 0); 1342 1343 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1344 CSEMap.InsertNode(N, IP); 1345 AllNodes.push_back(N); 1346 return SDValue(N, 0); 1347} 1348 1349SDValue SelectionDAG::getSrcValue(const Value *V) { 1350 assert((!V || V->getType()->isPointerTy()) && 1351 "SrcValue is not a pointer?"); 1352 1353 FoldingSetNodeID ID; 1354 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1355 ID.AddPointer(V); 1356 1357 void *IP = 0; 1358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1359 return SDValue(E, 0); 1360 1361 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1362 CSEMap.InsertNode(N, IP); 1363 AllNodes.push_back(N); 1364 return SDValue(N, 0); 1365} 1366 1367/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1368SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1369 FoldingSetNodeID ID; 1370 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1371 ID.AddPointer(MD); 1372 1373 void *IP = 0; 1374 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1375 return SDValue(E, 0); 1376 1377 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1378 CSEMap.InsertNode(N, IP); 1379 AllNodes.push_back(N); 1380 return SDValue(N, 0); 1381} 1382 1383 1384/// getShiftAmountOperand - Return the specified value casted to 1385/// the target's desired shift amount type. 1386SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1387 EVT OpTy = Op.getValueType(); 1388 MVT ShTy = TLI.getShiftAmountTy(); 1389 if (OpTy == ShTy || OpTy.isVector()) return Op; 1390 1391 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1392 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1393} 1394 1395/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1396/// specified value type. 1397SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1398 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1399 unsigned ByteSize = VT.getStoreSize(); 1400 const Type *Ty = VT.getTypeForEVT(*getContext()); 1401 unsigned StackAlign = 1402 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1403 1404 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1405 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1406} 1407 1408/// CreateStackTemporary - Create a stack temporary suitable for holding 1409/// either of the specified value types. 1410SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1411 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1412 VT2.getStoreSizeInBits())/8; 1413 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1414 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1415 const TargetData *TD = TLI.getTargetData(); 1416 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1417 TD->getPrefTypeAlignment(Ty2)); 1418 1419 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1420 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1421 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1422} 1423 1424SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1425 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1426 // These setcc operations always fold. 1427 switch (Cond) { 1428 default: break; 1429 case ISD::SETFALSE: 1430 case ISD::SETFALSE2: return getConstant(0, VT); 1431 case ISD::SETTRUE: 1432 case ISD::SETTRUE2: return getConstant(1, VT); 1433 1434 case ISD::SETOEQ: 1435 case ISD::SETOGT: 1436 case ISD::SETOGE: 1437 case ISD::SETOLT: 1438 case ISD::SETOLE: 1439 case ISD::SETONE: 1440 case ISD::SETO: 1441 case ISD::SETUO: 1442 case ISD::SETUEQ: 1443 case ISD::SETUNE: 1444 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1445 break; 1446 } 1447 1448 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1449 const APInt &C2 = N2C->getAPIntValue(); 1450 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1451 const APInt &C1 = N1C->getAPIntValue(); 1452 1453 switch (Cond) { 1454 default: llvm_unreachable("Unknown integer setcc!"); 1455 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1456 case ISD::SETNE: return getConstant(C1 != C2, VT); 1457 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1458 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1459 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1460 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1461 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1462 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1463 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1464 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1465 } 1466 } 1467 } 1468 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1469 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1470 // No compile time operations on this type yet. 1471 if (N1C->getValueType(0) == MVT::ppcf128) 1472 return SDValue(); 1473 1474 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1475 switch (Cond) { 1476 default: break; 1477 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1478 return getUNDEF(VT); 1479 // fall through 1480 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1481 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1482 return getUNDEF(VT); 1483 // fall through 1484 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1485 R==APFloat::cmpLessThan, VT); 1486 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1487 return getUNDEF(VT); 1488 // fall through 1489 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1490 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1491 return getUNDEF(VT); 1492 // fall through 1493 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1494 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1495 return getUNDEF(VT); 1496 // fall through 1497 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1498 R==APFloat::cmpEqual, VT); 1499 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1500 return getUNDEF(VT); 1501 // fall through 1502 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1503 R==APFloat::cmpEqual, VT); 1504 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1505 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1506 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1507 R==APFloat::cmpEqual, VT); 1508 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1509 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1510 R==APFloat::cmpLessThan, VT); 1511 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1512 R==APFloat::cmpUnordered, VT); 1513 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1514 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1515 } 1516 } else { 1517 // Ensure that the constant occurs on the RHS. 1518 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1519 } 1520 } 1521 1522 // Could not fold it. 1523 return SDValue(); 1524} 1525 1526/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1527/// use this predicate to simplify operations downstream. 1528bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1529 // This predicate is not safe for vector operations. 1530 if (Op.getValueType().isVector()) 1531 return false; 1532 1533 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1534 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1535} 1536 1537/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1538/// this predicate to simplify operations downstream. Mask is known to be zero 1539/// for bits that V cannot have. 1540bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1541 unsigned Depth) const { 1542 APInt KnownZero, KnownOne; 1543 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1544 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1545 return (KnownZero & Mask) == Mask; 1546} 1547 1548/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1549/// known to be either zero or one and return them in the KnownZero/KnownOne 1550/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1551/// processing. 1552void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1553 APInt &KnownZero, APInt &KnownOne, 1554 unsigned Depth) const { 1555 unsigned BitWidth = Mask.getBitWidth(); 1556 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1557 "Mask size mismatches value type size!"); 1558 1559 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1560 if (Depth == 6 || Mask == 0) 1561 return; // Limit search depth. 1562 1563 APInt KnownZero2, KnownOne2; 1564 1565 switch (Op.getOpcode()) { 1566 case ISD::Constant: 1567 // We know all of the bits for a constant! 1568 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1569 KnownZero = ~KnownOne & Mask; 1570 return; 1571 case ISD::AND: 1572 // If either the LHS or the RHS are Zero, the result is zero. 1573 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1574 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1575 KnownZero2, KnownOne2, Depth+1); 1576 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1577 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1578 1579 // Output known-1 bits are only known if set in both the LHS & RHS. 1580 KnownOne &= KnownOne2; 1581 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1582 KnownZero |= KnownZero2; 1583 return; 1584 case ISD::OR: 1585 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1586 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1587 KnownZero2, KnownOne2, Depth+1); 1588 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1589 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1590 1591 // Output known-0 bits are only known if clear in both the LHS & RHS. 1592 KnownZero &= KnownZero2; 1593 // Output known-1 are known to be set if set in either the LHS | RHS. 1594 KnownOne |= KnownOne2; 1595 return; 1596 case ISD::XOR: { 1597 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1598 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1599 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1600 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1601 1602 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1603 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1604 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1605 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1606 KnownZero = KnownZeroOut; 1607 return; 1608 } 1609 case ISD::MUL: { 1610 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1611 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1612 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1613 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1614 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1615 1616 // If low bits are zero in either operand, output low known-0 bits. 1617 // Also compute a conserative estimate for high known-0 bits. 1618 // More trickiness is possible, but this is sufficient for the 1619 // interesting case of alignment computation. 1620 KnownOne.clear(); 1621 unsigned TrailZ = KnownZero.countTrailingOnes() + 1622 KnownZero2.countTrailingOnes(); 1623 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1624 KnownZero2.countLeadingOnes(), 1625 BitWidth) - BitWidth; 1626 1627 TrailZ = std::min(TrailZ, BitWidth); 1628 LeadZ = std::min(LeadZ, BitWidth); 1629 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1630 APInt::getHighBitsSet(BitWidth, LeadZ); 1631 KnownZero &= Mask; 1632 return; 1633 } 1634 case ISD::UDIV: { 1635 // For the purposes of computing leading zeros we can conservatively 1636 // treat a udiv as a logical right shift by the power of 2 known to 1637 // be less than the denominator. 1638 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1639 ComputeMaskedBits(Op.getOperand(0), 1640 AllOnes, KnownZero2, KnownOne2, Depth+1); 1641 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1642 1643 KnownOne2.clear(); 1644 KnownZero2.clear(); 1645 ComputeMaskedBits(Op.getOperand(1), 1646 AllOnes, KnownZero2, KnownOne2, Depth+1); 1647 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1648 if (RHSUnknownLeadingOnes != BitWidth) 1649 LeadZ = std::min(BitWidth, 1650 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1651 1652 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1653 return; 1654 } 1655 case ISD::SELECT: 1656 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1657 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1658 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1659 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1660 1661 // Only known if known in both the LHS and RHS. 1662 KnownOne &= KnownOne2; 1663 KnownZero &= KnownZero2; 1664 return; 1665 case ISD::SELECT_CC: 1666 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1667 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1668 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1669 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1670 1671 // Only known if known in both the LHS and RHS. 1672 KnownOne &= KnownOne2; 1673 KnownZero &= KnownZero2; 1674 return; 1675 case ISD::SADDO: 1676 case ISD::UADDO: 1677 case ISD::SSUBO: 1678 case ISD::USUBO: 1679 case ISD::SMULO: 1680 case ISD::UMULO: 1681 if (Op.getResNo() != 1) 1682 return; 1683 // The boolean result conforms to getBooleanContents. Fall through. 1684 case ISD::SETCC: 1685 // If we know the result of a setcc has the top bits zero, use this info. 1686 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1687 BitWidth > 1) 1688 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1689 return; 1690 case ISD::SHL: 1691 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1692 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1693 unsigned ShAmt = SA->getZExtValue(); 1694 1695 // If the shift count is an invalid immediate, don't do anything. 1696 if (ShAmt >= BitWidth) 1697 return; 1698 1699 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1700 KnownZero, KnownOne, Depth+1); 1701 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1702 KnownZero <<= ShAmt; 1703 KnownOne <<= ShAmt; 1704 // low bits known zero. 1705 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1706 } 1707 return; 1708 case ISD::SRL: 1709 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1710 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1711 unsigned ShAmt = SA->getZExtValue(); 1712 1713 // If the shift count is an invalid immediate, don't do anything. 1714 if (ShAmt >= BitWidth) 1715 return; 1716 1717 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1718 KnownZero, KnownOne, Depth+1); 1719 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1720 KnownZero = KnownZero.lshr(ShAmt); 1721 KnownOne = KnownOne.lshr(ShAmt); 1722 1723 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1724 KnownZero |= HighBits; // High bits known zero. 1725 } 1726 return; 1727 case ISD::SRA: 1728 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1729 unsigned ShAmt = SA->getZExtValue(); 1730 1731 // If the shift count is an invalid immediate, don't do anything. 1732 if (ShAmt >= BitWidth) 1733 return; 1734 1735 APInt InDemandedMask = (Mask << ShAmt); 1736 // If any of the demanded bits are produced by the sign extension, we also 1737 // demand the input sign bit. 1738 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1739 if (HighBits.getBoolValue()) 1740 InDemandedMask |= APInt::getSignBit(BitWidth); 1741 1742 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1743 Depth+1); 1744 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1745 KnownZero = KnownZero.lshr(ShAmt); 1746 KnownOne = KnownOne.lshr(ShAmt); 1747 1748 // Handle the sign bits. 1749 APInt SignBit = APInt::getSignBit(BitWidth); 1750 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1751 1752 if (KnownZero.intersects(SignBit)) { 1753 KnownZero |= HighBits; // New bits are known zero. 1754 } else if (KnownOne.intersects(SignBit)) { 1755 KnownOne |= HighBits; // New bits are known one. 1756 } 1757 } 1758 return; 1759 case ISD::SIGN_EXTEND_INREG: { 1760 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1761 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1762 1763 // Sign extension. Compute the demanded bits in the result that are not 1764 // present in the input. 1765 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1766 1767 APInt InSignBit = APInt::getSignBit(EBits); 1768 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1769 1770 // If the sign extended bits are demanded, we know that the sign 1771 // bit is demanded. 1772 InSignBit.zext(BitWidth); 1773 if (NewBits.getBoolValue()) 1774 InputDemandedBits |= InSignBit; 1775 1776 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1777 KnownZero, KnownOne, Depth+1); 1778 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1779 1780 // If the sign bit of the input is known set or clear, then we know the 1781 // top bits of the result. 1782 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1783 KnownZero |= NewBits; 1784 KnownOne &= ~NewBits; 1785 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1786 KnownOne |= NewBits; 1787 KnownZero &= ~NewBits; 1788 } else { // Input sign bit unknown 1789 KnownZero &= ~NewBits; 1790 KnownOne &= ~NewBits; 1791 } 1792 return; 1793 } 1794 case ISD::CTTZ: 1795 case ISD::CTLZ: 1796 case ISD::CTPOP: { 1797 unsigned LowBits = Log2_32(BitWidth)+1; 1798 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1799 KnownOne.clear(); 1800 return; 1801 } 1802 case ISD::LOAD: { 1803 if (ISD::isZEXTLoad(Op.getNode())) { 1804 LoadSDNode *LD = cast<LoadSDNode>(Op); 1805 EVT VT = LD->getMemoryVT(); 1806 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1807 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1808 } 1809 return; 1810 } 1811 case ISD::ZERO_EXTEND: { 1812 EVT InVT = Op.getOperand(0).getValueType(); 1813 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1814 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1815 APInt InMask = Mask; 1816 InMask.trunc(InBits); 1817 KnownZero.trunc(InBits); 1818 KnownOne.trunc(InBits); 1819 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1820 KnownZero.zext(BitWidth); 1821 KnownOne.zext(BitWidth); 1822 KnownZero |= NewBits; 1823 return; 1824 } 1825 case ISD::SIGN_EXTEND: { 1826 EVT InVT = Op.getOperand(0).getValueType(); 1827 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1828 APInt InSignBit = APInt::getSignBit(InBits); 1829 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1830 APInt InMask = Mask; 1831 InMask.trunc(InBits); 1832 1833 // If any of the sign extended bits are demanded, we know that the sign 1834 // bit is demanded. Temporarily set this bit in the mask for our callee. 1835 if (NewBits.getBoolValue()) 1836 InMask |= InSignBit; 1837 1838 KnownZero.trunc(InBits); 1839 KnownOne.trunc(InBits); 1840 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1841 1842 // Note if the sign bit is known to be zero or one. 1843 bool SignBitKnownZero = KnownZero.isNegative(); 1844 bool SignBitKnownOne = KnownOne.isNegative(); 1845 assert(!(SignBitKnownZero && SignBitKnownOne) && 1846 "Sign bit can't be known to be both zero and one!"); 1847 1848 // If the sign bit wasn't actually demanded by our caller, we don't 1849 // want it set in the KnownZero and KnownOne result values. Reset the 1850 // mask and reapply it to the result values. 1851 InMask = Mask; 1852 InMask.trunc(InBits); 1853 KnownZero &= InMask; 1854 KnownOne &= InMask; 1855 1856 KnownZero.zext(BitWidth); 1857 KnownOne.zext(BitWidth); 1858 1859 // If the sign bit is known zero or one, the top bits match. 1860 if (SignBitKnownZero) 1861 KnownZero |= NewBits; 1862 else if (SignBitKnownOne) 1863 KnownOne |= NewBits; 1864 return; 1865 } 1866 case ISD::ANY_EXTEND: { 1867 EVT InVT = Op.getOperand(0).getValueType(); 1868 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1869 APInt InMask = Mask; 1870 InMask.trunc(InBits); 1871 KnownZero.trunc(InBits); 1872 KnownOne.trunc(InBits); 1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1874 KnownZero.zext(BitWidth); 1875 KnownOne.zext(BitWidth); 1876 return; 1877 } 1878 case ISD::TRUNCATE: { 1879 EVT InVT = Op.getOperand(0).getValueType(); 1880 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1881 APInt InMask = Mask; 1882 InMask.zext(InBits); 1883 KnownZero.zext(InBits); 1884 KnownOne.zext(InBits); 1885 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1886 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1887 KnownZero.trunc(BitWidth); 1888 KnownOne.trunc(BitWidth); 1889 break; 1890 } 1891 case ISD::AssertZext: { 1892 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1893 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1894 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1895 KnownOne, Depth+1); 1896 KnownZero |= (~InMask) & Mask; 1897 return; 1898 } 1899 case ISD::FGETSIGN: 1900 // All bits are zero except the low bit. 1901 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1902 return; 1903 1904 case ISD::SUB: { 1905 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1906 // We know that the top bits of C-X are clear if X contains less bits 1907 // than C (i.e. no wrap-around can happen). For example, 20-X is 1908 // positive if we can prove that X is >= 0 and < 16. 1909 if (CLHS->getAPIntValue().isNonNegative()) { 1910 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1911 // NLZ can't be BitWidth with no sign bit 1912 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1913 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1914 Depth+1); 1915 1916 // If all of the MaskV bits are known to be zero, then we know the 1917 // output top bits are zero, because we now know that the output is 1918 // from [0-C]. 1919 if ((KnownZero2 & MaskV) == MaskV) { 1920 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1921 // Top bits known zero. 1922 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1923 } 1924 } 1925 } 1926 } 1927 // fall through 1928 case ISD::ADD: { 1929 // Output known-0 bits are known if clear or set in both the low clear bits 1930 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1931 // low 3 bits clear. 1932 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1933 BitWidth - Mask.countLeadingZeros()); 1934 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1935 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1936 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1937 1938 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1939 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1940 KnownZeroOut = std::min(KnownZeroOut, 1941 KnownZero2.countTrailingOnes()); 1942 1943 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1944 return; 1945 } 1946 case ISD::SREM: 1947 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1948 const APInt &RA = Rem->getAPIntValue().abs(); 1949 if (RA.isPowerOf2()) { 1950 APInt LowBits = RA - 1; 1951 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1952 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1953 1954 // The low bits of the first operand are unchanged by the srem. 1955 KnownZero = KnownZero2 & LowBits; 1956 KnownOne = KnownOne2 & LowBits; 1957 1958 // If the first operand is non-negative or has all low bits zero, then 1959 // the upper bits are all zero. 1960 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1961 KnownZero |= ~LowBits; 1962 1963 // If the first operand is negative and not all low bits are zero, then 1964 // the upper bits are all one. 1965 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1966 KnownOne |= ~LowBits; 1967 1968 KnownZero &= Mask; 1969 KnownOne &= Mask; 1970 1971 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1972 } 1973 } 1974 return; 1975 case ISD::UREM: { 1976 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1977 const APInt &RA = Rem->getAPIntValue(); 1978 if (RA.isPowerOf2()) { 1979 APInt LowBits = (RA - 1); 1980 APInt Mask2 = LowBits & Mask; 1981 KnownZero |= ~LowBits & Mask; 1982 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1983 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1984 break; 1985 } 1986 } 1987 1988 // Since the result is less than or equal to either operand, any leading 1989 // zero bits in either operand must also exist in the result. 1990 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1991 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1992 Depth+1); 1993 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1994 Depth+1); 1995 1996 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1997 KnownZero2.countLeadingOnes()); 1998 KnownOne.clear(); 1999 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2000 return; 2001 } 2002 default: 2003 // Allow the target to implement this method for its nodes. 2004 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2005 case ISD::INTRINSIC_WO_CHAIN: 2006 case ISD::INTRINSIC_W_CHAIN: 2007 case ISD::INTRINSIC_VOID: 2008 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2009 Depth); 2010 } 2011 return; 2012 } 2013} 2014 2015/// ComputeNumSignBits - Return the number of times the sign bit of the 2016/// register is replicated into the other bits. We know that at least 1 bit 2017/// is always equal to the sign bit (itself), but other cases can give us 2018/// information. For example, immediately after an "SRA X, 2", we know that 2019/// the top 3 bits are all equal to each other, so we return 3. 2020unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2021 EVT VT = Op.getValueType(); 2022 assert(VT.isInteger() && "Invalid VT!"); 2023 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2024 unsigned Tmp, Tmp2; 2025 unsigned FirstAnswer = 1; 2026 2027 if (Depth == 6) 2028 return 1; // Limit search depth. 2029 2030 switch (Op.getOpcode()) { 2031 default: break; 2032 case ISD::AssertSext: 2033 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2034 return VTBits-Tmp+1; 2035 case ISD::AssertZext: 2036 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2037 return VTBits-Tmp; 2038 2039 case ISD::Constant: { 2040 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2041 // If negative, return # leading ones. 2042 if (Val.isNegative()) 2043 return Val.countLeadingOnes(); 2044 2045 // Return # leading zeros. 2046 return Val.countLeadingZeros(); 2047 } 2048 2049 case ISD::SIGN_EXTEND: 2050 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2051 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2052 2053 case ISD::SIGN_EXTEND_INREG: 2054 // Max of the input and what this extends. 2055 Tmp = 2056 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2057 Tmp = VTBits-Tmp+1; 2058 2059 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2060 return std::max(Tmp, Tmp2); 2061 2062 case ISD::SRA: 2063 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2064 // SRA X, C -> adds C sign bits. 2065 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2066 Tmp += C->getZExtValue(); 2067 if (Tmp > VTBits) Tmp = VTBits; 2068 } 2069 return Tmp; 2070 case ISD::SHL: 2071 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2072 // shl destroys sign bits. 2073 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2074 if (C->getZExtValue() >= VTBits || // Bad shift. 2075 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2076 return Tmp - C->getZExtValue(); 2077 } 2078 break; 2079 case ISD::AND: 2080 case ISD::OR: 2081 case ISD::XOR: // NOT is handled here. 2082 // Logical binary ops preserve the number of sign bits at the worst. 2083 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2084 if (Tmp != 1) { 2085 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2086 FirstAnswer = std::min(Tmp, Tmp2); 2087 // We computed what we know about the sign bits as our first 2088 // answer. Now proceed to the generic code that uses 2089 // ComputeMaskedBits, and pick whichever answer is better. 2090 } 2091 break; 2092 2093 case ISD::SELECT: 2094 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2095 if (Tmp == 1) return 1; // Early out. 2096 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2097 return std::min(Tmp, Tmp2); 2098 2099 case ISD::SADDO: 2100 case ISD::UADDO: 2101 case ISD::SSUBO: 2102 case ISD::USUBO: 2103 case ISD::SMULO: 2104 case ISD::UMULO: 2105 if (Op.getResNo() != 1) 2106 break; 2107 // The boolean result conforms to getBooleanContents. Fall through. 2108 case ISD::SETCC: 2109 // If setcc returns 0/-1, all bits are sign bits. 2110 if (TLI.getBooleanContents() == 2111 TargetLowering::ZeroOrNegativeOneBooleanContent) 2112 return VTBits; 2113 break; 2114 case ISD::ROTL: 2115 case ISD::ROTR: 2116 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2117 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2118 2119 // Handle rotate right by N like a rotate left by 32-N. 2120 if (Op.getOpcode() == ISD::ROTR) 2121 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2122 2123 // If we aren't rotating out all of the known-in sign bits, return the 2124 // number that are left. This handles rotl(sext(x), 1) for example. 2125 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2126 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2127 } 2128 break; 2129 case ISD::ADD: 2130 // Add can have at most one carry bit. Thus we know that the output 2131 // is, at worst, one more bit than the inputs. 2132 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2133 if (Tmp == 1) return 1; // Early out. 2134 2135 // Special case decrementing a value (ADD X, -1): 2136 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2137 if (CRHS->isAllOnesValue()) { 2138 APInt KnownZero, KnownOne; 2139 APInt Mask = APInt::getAllOnesValue(VTBits); 2140 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2141 2142 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2143 // sign bits set. 2144 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2145 return VTBits; 2146 2147 // If we are subtracting one from a positive number, there is no carry 2148 // out of the result. 2149 if (KnownZero.isNegative()) 2150 return Tmp; 2151 } 2152 2153 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2154 if (Tmp2 == 1) return 1; 2155 return std::min(Tmp, Tmp2)-1; 2156 break; 2157 2158 case ISD::SUB: 2159 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2160 if (Tmp2 == 1) return 1; 2161 2162 // Handle NEG. 2163 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2164 if (CLHS->isNullValue()) { 2165 APInt KnownZero, KnownOne; 2166 APInt Mask = APInt::getAllOnesValue(VTBits); 2167 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2168 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2169 // sign bits set. 2170 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2171 return VTBits; 2172 2173 // If the input is known to be positive (the sign bit is known clear), 2174 // the output of the NEG has the same number of sign bits as the input. 2175 if (KnownZero.isNegative()) 2176 return Tmp2; 2177 2178 // Otherwise, we treat this like a SUB. 2179 } 2180 2181 // Sub can have at most one carry bit. Thus we know that the output 2182 // is, at worst, one more bit than the inputs. 2183 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2184 if (Tmp == 1) return 1; // Early out. 2185 return std::min(Tmp, Tmp2)-1; 2186 break; 2187 case ISD::TRUNCATE: 2188 // FIXME: it's tricky to do anything useful for this, but it is an important 2189 // case for targets like X86. 2190 break; 2191 } 2192 2193 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2194 if (Op.getOpcode() == ISD::LOAD) { 2195 LoadSDNode *LD = cast<LoadSDNode>(Op); 2196 unsigned ExtType = LD->getExtensionType(); 2197 switch (ExtType) { 2198 default: break; 2199 case ISD::SEXTLOAD: // '17' bits known 2200 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2201 return VTBits-Tmp+1; 2202 case ISD::ZEXTLOAD: // '16' bits known 2203 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2204 return VTBits-Tmp; 2205 } 2206 } 2207 2208 // Allow the target to implement this method for its nodes. 2209 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2210 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2211 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2212 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2213 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2214 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2215 } 2216 2217 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2218 // use this information. 2219 APInt KnownZero, KnownOne; 2220 APInt Mask = APInt::getAllOnesValue(VTBits); 2221 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2222 2223 if (KnownZero.isNegative()) { // sign bit is 0 2224 Mask = KnownZero; 2225 } else if (KnownOne.isNegative()) { // sign bit is 1; 2226 Mask = KnownOne; 2227 } else { 2228 // Nothing known. 2229 return FirstAnswer; 2230 } 2231 2232 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2233 // the number of identical bits in the top of the input value. 2234 Mask = ~Mask; 2235 Mask <<= Mask.getBitWidth()-VTBits; 2236 // Return # leading zeros. We use 'min' here in case Val was zero before 2237 // shifting. We don't want to return '64' as for an i32 "0". 2238 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2239} 2240 2241bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2242 // If we're told that NaNs won't happen, assume they won't. 2243 if (FiniteOnlyFPMath()) 2244 return true; 2245 2246 // If the value is a constant, we can obviously see if it is a NaN or not. 2247 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2248 return !C->getValueAPF().isNaN(); 2249 2250 // TODO: Recognize more cases here. 2251 2252 return false; 2253} 2254 2255bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2256 // If the value is a constant, we can obviously see if it is a zero or not. 2257 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2258 return !C->isZero(); 2259 2260 // TODO: Recognize more cases here. 2261 2262 return false; 2263} 2264 2265bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2266 // Check the obvious case. 2267 if (A == B) return true; 2268 2269 // For for negative and positive zero. 2270 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2271 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2272 if (CA->isZero() && CB->isZero()) return true; 2273 2274 // Otherwise they may not be equal. 2275 return false; 2276} 2277 2278bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2279 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2280 if (!GA) return false; 2281 if (GA->getOffset() != 0) return false; 2282 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2283 if (!GV) return false; 2284 return MF->getMMI().hasDebugInfo(); 2285} 2286 2287 2288/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2289/// element of the result of the vector shuffle. 2290SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2291 unsigned i) { 2292 EVT VT = N->getValueType(0); 2293 DebugLoc dl = N->getDebugLoc(); 2294 if (N->getMaskElt(i) < 0) 2295 return getUNDEF(VT.getVectorElementType()); 2296 unsigned Index = N->getMaskElt(i); 2297 unsigned NumElems = VT.getVectorNumElements(); 2298 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2299 Index %= NumElems; 2300 2301 if (V.getOpcode() == ISD::BIT_CONVERT) { 2302 V = V.getOperand(0); 2303 EVT VVT = V.getValueType(); 2304 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2305 return SDValue(); 2306 } 2307 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2308 return (Index == 0) ? V.getOperand(0) 2309 : getUNDEF(VT.getVectorElementType()); 2310 if (V.getOpcode() == ISD::BUILD_VECTOR) 2311 return V.getOperand(Index); 2312 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2313 return getShuffleScalarElt(SVN, Index); 2314 return SDValue(); 2315} 2316 2317 2318/// getNode - Gets or creates the specified node. 2319/// 2320SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2321 FoldingSetNodeID ID; 2322 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2323 void *IP = 0; 2324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2325 return SDValue(E, 0); 2326 2327 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2328 CSEMap.InsertNode(N, IP); 2329 2330 AllNodes.push_back(N); 2331#ifndef NDEBUG 2332 VerifyNode(N); 2333#endif 2334 return SDValue(N, 0); 2335} 2336 2337SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2338 EVT VT, SDValue Operand) { 2339 // Constant fold unary operations with an integer constant operand. 2340 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2341 const APInt &Val = C->getAPIntValue(); 2342 switch (Opcode) { 2343 default: break; 2344 case ISD::SIGN_EXTEND: 2345 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2346 case ISD::ANY_EXTEND: 2347 case ISD::ZERO_EXTEND: 2348 case ISD::TRUNCATE: 2349 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2350 case ISD::UINT_TO_FP: 2351 case ISD::SINT_TO_FP: { 2352 const uint64_t zero[] = {0, 0}; 2353 // No compile time operations on ppcf128. 2354 if (VT == MVT::ppcf128) break; 2355 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2356 (void)apf.convertFromAPInt(Val, 2357 Opcode==ISD::SINT_TO_FP, 2358 APFloat::rmNearestTiesToEven); 2359 return getConstantFP(apf, VT); 2360 } 2361 case ISD::BIT_CONVERT: 2362 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2363 return getConstantFP(Val.bitsToFloat(), VT); 2364 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2365 return getConstantFP(Val.bitsToDouble(), VT); 2366 break; 2367 case ISD::BSWAP: 2368 return getConstant(Val.byteSwap(), VT); 2369 case ISD::CTPOP: 2370 return getConstant(Val.countPopulation(), VT); 2371 case ISD::CTLZ: 2372 return getConstant(Val.countLeadingZeros(), VT); 2373 case ISD::CTTZ: 2374 return getConstant(Val.countTrailingZeros(), VT); 2375 } 2376 } 2377 2378 // Constant fold unary operations with a floating point constant operand. 2379 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2380 APFloat V = C->getValueAPF(); // make copy 2381 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2382 switch (Opcode) { 2383 case ISD::FNEG: 2384 V.changeSign(); 2385 return getConstantFP(V, VT); 2386 case ISD::FABS: 2387 V.clearSign(); 2388 return getConstantFP(V, VT); 2389 case ISD::FP_ROUND: 2390 case ISD::FP_EXTEND: { 2391 bool ignored; 2392 // This can return overflow, underflow, or inexact; we don't care. 2393 // FIXME need to be more flexible about rounding mode. 2394 (void)V.convert(*EVTToAPFloatSemantics(VT), 2395 APFloat::rmNearestTiesToEven, &ignored); 2396 return getConstantFP(V, VT); 2397 } 2398 case ISD::FP_TO_SINT: 2399 case ISD::FP_TO_UINT: { 2400 integerPart x[2]; 2401 bool ignored; 2402 assert(integerPartWidth >= 64); 2403 // FIXME need to be more flexible about rounding mode. 2404 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2405 Opcode==ISD::FP_TO_SINT, 2406 APFloat::rmTowardZero, &ignored); 2407 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2408 break; 2409 APInt api(VT.getSizeInBits(), 2, x); 2410 return getConstant(api, VT); 2411 } 2412 case ISD::BIT_CONVERT: 2413 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2414 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2415 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2416 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2417 break; 2418 } 2419 } 2420 } 2421 2422 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2423 switch (Opcode) { 2424 case ISD::TokenFactor: 2425 case ISD::MERGE_VALUES: 2426 case ISD::CONCAT_VECTORS: 2427 return Operand; // Factor, merge or concat of one node? No need. 2428 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2429 case ISD::FP_EXTEND: 2430 assert(VT.isFloatingPoint() && 2431 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2432 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2433 assert((!VT.isVector() || 2434 VT.getVectorNumElements() == 2435 Operand.getValueType().getVectorNumElements()) && 2436 "Vector element count mismatch!"); 2437 if (Operand.getOpcode() == ISD::UNDEF) 2438 return getUNDEF(VT); 2439 break; 2440 case ISD::SIGN_EXTEND: 2441 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2442 "Invalid SIGN_EXTEND!"); 2443 if (Operand.getValueType() == VT) return Operand; // noop extension 2444 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2445 "Invalid sext node, dst < src!"); 2446 assert((!VT.isVector() || 2447 VT.getVectorNumElements() == 2448 Operand.getValueType().getVectorNumElements()) && 2449 "Vector element count mismatch!"); 2450 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2451 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2452 break; 2453 case ISD::ZERO_EXTEND: 2454 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2455 "Invalid ZERO_EXTEND!"); 2456 if (Operand.getValueType() == VT) return Operand; // noop extension 2457 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2458 "Invalid zext node, dst < src!"); 2459 assert((!VT.isVector() || 2460 VT.getVectorNumElements() == 2461 Operand.getValueType().getVectorNumElements()) && 2462 "Vector element count mismatch!"); 2463 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2464 return getNode(ISD::ZERO_EXTEND, DL, VT, 2465 Operand.getNode()->getOperand(0)); 2466 break; 2467 case ISD::ANY_EXTEND: 2468 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2469 "Invalid ANY_EXTEND!"); 2470 if (Operand.getValueType() == VT) return Operand; // noop extension 2471 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2472 "Invalid anyext node, dst < src!"); 2473 assert((!VT.isVector() || 2474 VT.getVectorNumElements() == 2475 Operand.getValueType().getVectorNumElements()) && 2476 "Vector element count mismatch!"); 2477 2478 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2479 OpOpcode == ISD::ANY_EXTEND) 2480 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2481 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2482 2483 // (ext (trunx x)) -> x 2484 if (OpOpcode == ISD::TRUNCATE) { 2485 SDValue OpOp = Operand.getNode()->getOperand(0); 2486 if (OpOp.getValueType() == VT) 2487 return OpOp; 2488 } 2489 break; 2490 case ISD::TRUNCATE: 2491 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2492 "Invalid TRUNCATE!"); 2493 if (Operand.getValueType() == VT) return Operand; // noop truncate 2494 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2495 "Invalid truncate node, src < dst!"); 2496 assert((!VT.isVector() || 2497 VT.getVectorNumElements() == 2498 Operand.getValueType().getVectorNumElements()) && 2499 "Vector element count mismatch!"); 2500 if (OpOpcode == ISD::TRUNCATE) 2501 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2502 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2503 OpOpcode == ISD::ANY_EXTEND) { 2504 // If the source is smaller than the dest, we still need an extend. 2505 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2506 .bitsLT(VT.getScalarType())) 2507 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2508 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2509 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2510 else 2511 return Operand.getNode()->getOperand(0); 2512 } 2513 break; 2514 case ISD::BIT_CONVERT: 2515 // Basic sanity checking. 2516 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2517 && "Cannot BIT_CONVERT between types of different sizes!"); 2518 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2519 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2520 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2521 if (OpOpcode == ISD::UNDEF) 2522 return getUNDEF(VT); 2523 break; 2524 case ISD::SCALAR_TO_VECTOR: 2525 assert(VT.isVector() && !Operand.getValueType().isVector() && 2526 (VT.getVectorElementType() == Operand.getValueType() || 2527 (VT.getVectorElementType().isInteger() && 2528 Operand.getValueType().isInteger() && 2529 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2530 "Illegal SCALAR_TO_VECTOR node!"); 2531 if (OpOpcode == ISD::UNDEF) 2532 return getUNDEF(VT); 2533 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2534 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2535 isa<ConstantSDNode>(Operand.getOperand(1)) && 2536 Operand.getConstantOperandVal(1) == 0 && 2537 Operand.getOperand(0).getValueType() == VT) 2538 return Operand.getOperand(0); 2539 break; 2540 case ISD::FNEG: 2541 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2542 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2543 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2544 Operand.getNode()->getOperand(0)); 2545 if (OpOpcode == ISD::FNEG) // --X -> X 2546 return Operand.getNode()->getOperand(0); 2547 break; 2548 case ISD::FABS: 2549 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2550 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2551 break; 2552 } 2553 2554 SDNode *N; 2555 SDVTList VTs = getVTList(VT); 2556 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2557 FoldingSetNodeID ID; 2558 SDValue Ops[1] = { Operand }; 2559 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2560 void *IP = 0; 2561 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2562 return SDValue(E, 0); 2563 2564 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2565 CSEMap.InsertNode(N, IP); 2566 } else { 2567 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2568 } 2569 2570 AllNodes.push_back(N); 2571#ifndef NDEBUG 2572 VerifyNode(N); 2573#endif 2574 return SDValue(N, 0); 2575} 2576 2577SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2578 EVT VT, 2579 ConstantSDNode *Cst1, 2580 ConstantSDNode *Cst2) { 2581 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2582 2583 switch (Opcode) { 2584 case ISD::ADD: return getConstant(C1 + C2, VT); 2585 case ISD::SUB: return getConstant(C1 - C2, VT); 2586 case ISD::MUL: return getConstant(C1 * C2, VT); 2587 case ISD::UDIV: 2588 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2589 break; 2590 case ISD::UREM: 2591 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2592 break; 2593 case ISD::SDIV: 2594 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2595 break; 2596 case ISD::SREM: 2597 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2598 break; 2599 case ISD::AND: return getConstant(C1 & C2, VT); 2600 case ISD::OR: return getConstant(C1 | C2, VT); 2601 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2602 case ISD::SHL: return getConstant(C1 << C2, VT); 2603 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2604 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2605 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2606 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2607 default: break; 2608 } 2609 2610 return SDValue(); 2611} 2612 2613SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2614 SDValue N1, SDValue N2) { 2615 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2616 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2617 switch (Opcode) { 2618 default: break; 2619 case ISD::TokenFactor: 2620 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2621 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2622 // Fold trivial token factors. 2623 if (N1.getOpcode() == ISD::EntryToken) return N2; 2624 if (N2.getOpcode() == ISD::EntryToken) return N1; 2625 if (N1 == N2) return N1; 2626 break; 2627 case ISD::CONCAT_VECTORS: 2628 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2629 // one big BUILD_VECTOR. 2630 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2631 N2.getOpcode() == ISD::BUILD_VECTOR) { 2632 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2633 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2634 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2635 } 2636 break; 2637 case ISD::AND: 2638 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2639 assert(N1.getValueType() == N2.getValueType() && 2640 N1.getValueType() == VT && "Binary operator types must match!"); 2641 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2642 // worth handling here. 2643 if (N2C && N2C->isNullValue()) 2644 return N2; 2645 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2646 return N1; 2647 break; 2648 case ISD::OR: 2649 case ISD::XOR: 2650 case ISD::ADD: 2651 case ISD::SUB: 2652 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2653 assert(N1.getValueType() == N2.getValueType() && 2654 N1.getValueType() == VT && "Binary operator types must match!"); 2655 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2656 // it's worth handling here. 2657 if (N2C && N2C->isNullValue()) 2658 return N1; 2659 break; 2660 case ISD::UDIV: 2661 case ISD::UREM: 2662 case ISD::MULHU: 2663 case ISD::MULHS: 2664 case ISD::MUL: 2665 case ISD::SDIV: 2666 case ISD::SREM: 2667 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2668 assert(N1.getValueType() == N2.getValueType() && 2669 N1.getValueType() == VT && "Binary operator types must match!"); 2670 break; 2671 case ISD::FADD: 2672 case ISD::FSUB: 2673 case ISD::FMUL: 2674 case ISD::FDIV: 2675 case ISD::FREM: 2676 if (UnsafeFPMath) { 2677 if (Opcode == ISD::FADD) { 2678 // 0+x --> x 2679 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2680 if (CFP->getValueAPF().isZero()) 2681 return N2; 2682 // x+0 --> x 2683 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2684 if (CFP->getValueAPF().isZero()) 2685 return N1; 2686 } else if (Opcode == ISD::FSUB) { 2687 // x-0 --> x 2688 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2689 if (CFP->getValueAPF().isZero()) 2690 return N1; 2691 } 2692 } 2693 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2694 assert(N1.getValueType() == N2.getValueType() && 2695 N1.getValueType() == VT && "Binary operator types must match!"); 2696 break; 2697 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2698 assert(N1.getValueType() == VT && 2699 N1.getValueType().isFloatingPoint() && 2700 N2.getValueType().isFloatingPoint() && 2701 "Invalid FCOPYSIGN!"); 2702 break; 2703 case ISD::SHL: 2704 case ISD::SRA: 2705 case ISD::SRL: 2706 case ISD::ROTL: 2707 case ISD::ROTR: 2708 assert(VT == N1.getValueType() && 2709 "Shift operators return type must be the same as their first arg"); 2710 assert(VT.isInteger() && N2.getValueType().isInteger() && 2711 "Shifts only work on integers"); 2712 2713 // Always fold shifts of i1 values so the code generator doesn't need to 2714 // handle them. Since we know the size of the shift has to be less than the 2715 // size of the value, the shift/rotate count is guaranteed to be zero. 2716 if (VT == MVT::i1) 2717 return N1; 2718 if (N2C && N2C->isNullValue()) 2719 return N1; 2720 break; 2721 case ISD::FP_ROUND_INREG: { 2722 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2723 assert(VT == N1.getValueType() && "Not an inreg round!"); 2724 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2725 "Cannot FP_ROUND_INREG integer types"); 2726 assert(EVT.isVector() == VT.isVector() && 2727 "FP_ROUND_INREG type should be vector iff the operand " 2728 "type is vector!"); 2729 assert((!EVT.isVector() || 2730 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2731 "Vector element counts must match in FP_ROUND_INREG"); 2732 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2733 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2734 break; 2735 } 2736 case ISD::FP_ROUND: 2737 assert(VT.isFloatingPoint() && 2738 N1.getValueType().isFloatingPoint() && 2739 VT.bitsLE(N1.getValueType()) && 2740 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2741 if (N1.getValueType() == VT) return N1; // noop conversion. 2742 break; 2743 case ISD::AssertSext: 2744 case ISD::AssertZext: { 2745 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2746 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2747 assert(VT.isInteger() && EVT.isInteger() && 2748 "Cannot *_EXTEND_INREG FP types"); 2749 assert(!EVT.isVector() && 2750 "AssertSExt/AssertZExt type should be the vector element type " 2751 "rather than the vector type!"); 2752 assert(EVT.bitsLE(VT) && "Not extending!"); 2753 if (VT == EVT) return N1; // noop assertion. 2754 break; 2755 } 2756 case ISD::SIGN_EXTEND_INREG: { 2757 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2758 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2759 assert(VT.isInteger() && EVT.isInteger() && 2760 "Cannot *_EXTEND_INREG FP types"); 2761 assert(EVT.isVector() == VT.isVector() && 2762 "SIGN_EXTEND_INREG type should be vector iff the operand " 2763 "type is vector!"); 2764 assert((!EVT.isVector() || 2765 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2766 "Vector element counts must match in SIGN_EXTEND_INREG"); 2767 assert(EVT.bitsLE(VT) && "Not extending!"); 2768 if (EVT == VT) return N1; // Not actually extending 2769 2770 if (N1C) { 2771 APInt Val = N1C->getAPIntValue(); 2772 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2773 Val <<= Val.getBitWidth()-FromBits; 2774 Val = Val.ashr(Val.getBitWidth()-FromBits); 2775 return getConstant(Val, VT); 2776 } 2777 break; 2778 } 2779 case ISD::EXTRACT_VECTOR_ELT: 2780 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2781 if (N1.getOpcode() == ISD::UNDEF) 2782 return getUNDEF(VT); 2783 2784 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2785 // expanding copies of large vectors from registers. 2786 if (N2C && 2787 N1.getOpcode() == ISD::CONCAT_VECTORS && 2788 N1.getNumOperands() > 0) { 2789 unsigned Factor = 2790 N1.getOperand(0).getValueType().getVectorNumElements(); 2791 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2792 N1.getOperand(N2C->getZExtValue() / Factor), 2793 getConstant(N2C->getZExtValue() % Factor, 2794 N2.getValueType())); 2795 } 2796 2797 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2798 // expanding large vector constants. 2799 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2800 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2801 EVT VEltTy = N1.getValueType().getVectorElementType(); 2802 if (Elt.getValueType() != VEltTy) { 2803 // If the vector element type is not legal, the BUILD_VECTOR operands 2804 // are promoted and implicitly truncated. Make that explicit here. 2805 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2806 } 2807 if (VT != VEltTy) { 2808 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2809 // result is implicitly extended. 2810 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2811 } 2812 return Elt; 2813 } 2814 2815 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2816 // operations are lowered to scalars. 2817 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2818 // If the indices are the same, return the inserted element else 2819 // if the indices are known different, extract the element from 2820 // the original vector. 2821 SDValue N1Op2 = N1.getOperand(2); 2822 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2823 2824 if (N1Op2C && N2C) { 2825 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2826 if (VT == N1.getOperand(1).getValueType()) 2827 return N1.getOperand(1); 2828 else 2829 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2830 } 2831 2832 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2833 } 2834 } 2835 break; 2836 case ISD::EXTRACT_ELEMENT: 2837 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2838 assert(!N1.getValueType().isVector() && !VT.isVector() && 2839 (N1.getValueType().isInteger() == VT.isInteger()) && 2840 "Wrong types for EXTRACT_ELEMENT!"); 2841 2842 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2843 // 64-bit integers into 32-bit parts. Instead of building the extract of 2844 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2845 if (N1.getOpcode() == ISD::BUILD_PAIR) 2846 return N1.getOperand(N2C->getZExtValue()); 2847 2848 // EXTRACT_ELEMENT of a constant int is also very common. 2849 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2850 unsigned ElementSize = VT.getSizeInBits(); 2851 unsigned Shift = ElementSize * N2C->getZExtValue(); 2852 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2853 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2854 } 2855 break; 2856 case ISD::EXTRACT_SUBVECTOR: 2857 if (N1.getValueType() == VT) // Trivial extraction. 2858 return N1; 2859 break; 2860 } 2861 2862 if (N1C) { 2863 if (N2C) { 2864 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2865 if (SV.getNode()) return SV; 2866 } else { // Cannonicalize constant to RHS if commutative 2867 if (isCommutativeBinOp(Opcode)) { 2868 std::swap(N1C, N2C); 2869 std::swap(N1, N2); 2870 } 2871 } 2872 } 2873 2874 // Constant fold FP operations. 2875 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2876 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2877 if (N1CFP) { 2878 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2879 // Cannonicalize constant to RHS if commutative 2880 std::swap(N1CFP, N2CFP); 2881 std::swap(N1, N2); 2882 } else if (N2CFP && VT != MVT::ppcf128) { 2883 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2884 APFloat::opStatus s; 2885 switch (Opcode) { 2886 case ISD::FADD: 2887 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2888 if (s != APFloat::opInvalidOp) 2889 return getConstantFP(V1, VT); 2890 break; 2891 case ISD::FSUB: 2892 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2893 if (s!=APFloat::opInvalidOp) 2894 return getConstantFP(V1, VT); 2895 break; 2896 case ISD::FMUL: 2897 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2898 if (s!=APFloat::opInvalidOp) 2899 return getConstantFP(V1, VT); 2900 break; 2901 case ISD::FDIV: 2902 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2903 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2904 return getConstantFP(V1, VT); 2905 break; 2906 case ISD::FREM : 2907 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2908 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2909 return getConstantFP(V1, VT); 2910 break; 2911 case ISD::FCOPYSIGN: 2912 V1.copySign(V2); 2913 return getConstantFP(V1, VT); 2914 default: break; 2915 } 2916 } 2917 } 2918 2919 // Canonicalize an UNDEF to the RHS, even over a constant. 2920 if (N1.getOpcode() == ISD::UNDEF) { 2921 if (isCommutativeBinOp(Opcode)) { 2922 std::swap(N1, N2); 2923 } else { 2924 switch (Opcode) { 2925 case ISD::FP_ROUND_INREG: 2926 case ISD::SIGN_EXTEND_INREG: 2927 case ISD::SUB: 2928 case ISD::FSUB: 2929 case ISD::FDIV: 2930 case ISD::FREM: 2931 case ISD::SRA: 2932 return N1; // fold op(undef, arg2) -> undef 2933 case ISD::UDIV: 2934 case ISD::SDIV: 2935 case ISD::UREM: 2936 case ISD::SREM: 2937 case ISD::SRL: 2938 case ISD::SHL: 2939 if (!VT.isVector()) 2940 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2941 // For vectors, we can't easily build an all zero vector, just return 2942 // the LHS. 2943 return N2; 2944 } 2945 } 2946 } 2947 2948 // Fold a bunch of operators when the RHS is undef. 2949 if (N2.getOpcode() == ISD::UNDEF) { 2950 switch (Opcode) { 2951 case ISD::XOR: 2952 if (N1.getOpcode() == ISD::UNDEF) 2953 // Handle undef ^ undef -> 0 special case. This is a common 2954 // idiom (misuse). 2955 return getConstant(0, VT); 2956 // fallthrough 2957 case ISD::ADD: 2958 case ISD::ADDC: 2959 case ISD::ADDE: 2960 case ISD::SUB: 2961 case ISD::UDIV: 2962 case ISD::SDIV: 2963 case ISD::UREM: 2964 case ISD::SREM: 2965 return N2; // fold op(arg1, undef) -> undef 2966 case ISD::FADD: 2967 case ISD::FSUB: 2968 case ISD::FMUL: 2969 case ISD::FDIV: 2970 case ISD::FREM: 2971 if (UnsafeFPMath) 2972 return N2; 2973 break; 2974 case ISD::MUL: 2975 case ISD::AND: 2976 case ISD::SRL: 2977 case ISD::SHL: 2978 if (!VT.isVector()) 2979 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2980 // For vectors, we can't easily build an all zero vector, just return 2981 // the LHS. 2982 return N1; 2983 case ISD::OR: 2984 if (!VT.isVector()) 2985 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2986 // For vectors, we can't easily build an all one vector, just return 2987 // the LHS. 2988 return N1; 2989 case ISD::SRA: 2990 return N1; 2991 } 2992 } 2993 2994 // Memoize this node if possible. 2995 SDNode *N; 2996 SDVTList VTs = getVTList(VT); 2997 if (VT != MVT::Flag) { 2998 SDValue Ops[] = { N1, N2 }; 2999 FoldingSetNodeID ID; 3000 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3001 void *IP = 0; 3002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3003 return SDValue(E, 0); 3004 3005 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3006 CSEMap.InsertNode(N, IP); 3007 } else { 3008 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3009 } 3010 3011 AllNodes.push_back(N); 3012#ifndef NDEBUG 3013 VerifyNode(N); 3014#endif 3015 return SDValue(N, 0); 3016} 3017 3018SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3019 SDValue N1, SDValue N2, SDValue N3) { 3020 // Perform various simplifications. 3021 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3022 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 3023 switch (Opcode) { 3024 case ISD::CONCAT_VECTORS: 3025 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3026 // one big BUILD_VECTOR. 3027 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3028 N2.getOpcode() == ISD::BUILD_VECTOR && 3029 N3.getOpcode() == ISD::BUILD_VECTOR) { 3030 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 3031 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 3032 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 3033 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3034 } 3035 break; 3036 case ISD::SETCC: { 3037 // Use FoldSetCC to simplify SETCC's. 3038 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3039 if (Simp.getNode()) return Simp; 3040 break; 3041 } 3042 case ISD::SELECT: 3043 if (N1C) { 3044 if (N1C->getZExtValue()) 3045 return N2; // select true, X, Y -> X 3046 else 3047 return N3; // select false, X, Y -> Y 3048 } 3049 3050 if (N2 == N3) return N2; // select C, X, X -> X 3051 break; 3052 case ISD::BRCOND: 3053 if (N2C) { 3054 if (N2C->getZExtValue()) // Unconditional branch 3055 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3056 else 3057 return N1; // Never-taken branch 3058 } 3059 break; 3060 case ISD::VECTOR_SHUFFLE: 3061 llvm_unreachable("should use getVectorShuffle constructor!"); 3062 break; 3063 case ISD::BIT_CONVERT: 3064 // Fold bit_convert nodes from a type to themselves. 3065 if (N1.getValueType() == VT) 3066 return N1; 3067 break; 3068 } 3069 3070 // Memoize node if it doesn't produce a flag. 3071 SDNode *N; 3072 SDVTList VTs = getVTList(VT); 3073 if (VT != MVT::Flag) { 3074 SDValue Ops[] = { N1, N2, N3 }; 3075 FoldingSetNodeID ID; 3076 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3077 void *IP = 0; 3078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3079 return SDValue(E, 0); 3080 3081 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3082 CSEMap.InsertNode(N, IP); 3083 } else { 3084 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3085 } 3086 3087 AllNodes.push_back(N); 3088#ifndef NDEBUG 3089 VerifyNode(N); 3090#endif 3091 return SDValue(N, 0); 3092} 3093 3094SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3095 SDValue N1, SDValue N2, SDValue N3, 3096 SDValue N4) { 3097 SDValue Ops[] = { N1, N2, N3, N4 }; 3098 return getNode(Opcode, DL, VT, Ops, 4); 3099} 3100 3101SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3102 SDValue N1, SDValue N2, SDValue N3, 3103 SDValue N4, SDValue N5) { 3104 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3105 return getNode(Opcode, DL, VT, Ops, 5); 3106} 3107 3108/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3109/// the incoming stack arguments to be loaded from the stack. 3110SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3111 SmallVector<SDValue, 8> ArgChains; 3112 3113 // Include the original chain at the beginning of the list. When this is 3114 // used by target LowerCall hooks, this helps legalize find the 3115 // CALLSEQ_BEGIN node. 3116 ArgChains.push_back(Chain); 3117 3118 // Add a chain value for each stack argument. 3119 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3120 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3121 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3122 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3123 if (FI->getIndex() < 0) 3124 ArgChains.push_back(SDValue(L, 1)); 3125 3126 // Build a tokenfactor for all the chains. 3127 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3128 &ArgChains[0], ArgChains.size()); 3129} 3130 3131/// getMemsetValue - Vectorized representation of the memset value 3132/// operand. 3133static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3134 DebugLoc dl) { 3135 assert(Value.getOpcode() != ISD::UNDEF); 3136 3137 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3138 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3139 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3140 unsigned Shift = 8; 3141 for (unsigned i = NumBits; i > 8; i >>= 1) { 3142 Val = (Val << Shift) | Val; 3143 Shift <<= 1; 3144 } 3145 if (VT.isInteger()) 3146 return DAG.getConstant(Val, VT); 3147 return DAG.getConstantFP(APFloat(Val), VT); 3148 } 3149 3150 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3151 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3152 unsigned Shift = 8; 3153 for (unsigned i = NumBits; i > 8; i >>= 1) { 3154 Value = DAG.getNode(ISD::OR, dl, VT, 3155 DAG.getNode(ISD::SHL, dl, VT, Value, 3156 DAG.getConstant(Shift, 3157 TLI.getShiftAmountTy())), 3158 Value); 3159 Shift <<= 1; 3160 } 3161 3162 return Value; 3163} 3164 3165/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3166/// used when a memcpy is turned into a memset when the source is a constant 3167/// string ptr. 3168static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3169 const TargetLowering &TLI, 3170 std::string &Str, unsigned Offset) { 3171 // Handle vector with all elements zero. 3172 if (Str.empty()) { 3173 if (VT.isInteger()) 3174 return DAG.getConstant(0, VT); 3175 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3176 VT.getSimpleVT().SimpleTy == MVT::f64) 3177 return DAG.getConstantFP(0.0, VT); 3178 else if (VT.isVector()) { 3179 unsigned NumElts = VT.getVectorNumElements(); 3180 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3181 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3182 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3183 EltVT, NumElts))); 3184 } else 3185 llvm_unreachable("Expected type!"); 3186 } 3187 3188 assert(!VT.isVector() && "Can't handle vector type here!"); 3189 unsigned NumBits = VT.getSizeInBits(); 3190 unsigned MSB = NumBits / 8; 3191 uint64_t Val = 0; 3192 if (TLI.isLittleEndian()) 3193 Offset = Offset + MSB - 1; 3194 for (unsigned i = 0; i != MSB; ++i) { 3195 Val = (Val << 8) | (unsigned char)Str[Offset]; 3196 Offset += TLI.isLittleEndian() ? -1 : 1; 3197 } 3198 return DAG.getConstant(Val, VT); 3199} 3200 3201/// getMemBasePlusOffset - Returns base and offset node for the 3202/// 3203static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3204 SelectionDAG &DAG) { 3205 EVT VT = Base.getValueType(); 3206 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3207 VT, Base, DAG.getConstant(Offset, VT)); 3208} 3209 3210/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3211/// 3212static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3213 unsigned SrcDelta = 0; 3214 GlobalAddressSDNode *G = NULL; 3215 if (Src.getOpcode() == ISD::GlobalAddress) 3216 G = cast<GlobalAddressSDNode>(Src); 3217 else if (Src.getOpcode() == ISD::ADD && 3218 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3219 Src.getOperand(1).getOpcode() == ISD::Constant) { 3220 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3221 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3222 } 3223 if (!G) 3224 return false; 3225 3226 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3227 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3228 return true; 3229 3230 return false; 3231} 3232 3233/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3234/// to replace the memset / memcpy. Return true if the number of memory ops 3235/// is below the threshold. It returns the types of the sequence of 3236/// memory ops to perform memset / memcpy by reference. 3237static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3238 unsigned Limit, uint64_t Size, 3239 unsigned DstAlign, unsigned SrcAlign, 3240 bool NonScalarIntSafe, 3241 bool MemcpyStrSrc, 3242 SelectionDAG &DAG, 3243 const TargetLowering &TLI) { 3244 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3245 "Expecting memcpy / memset source to meet alignment requirement!"); 3246 // If 'SrcAlign' is zero, that means the memory operation does not need load 3247 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3248 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3249 // specified alignment of the memory operation. If it is zero, that means 3250 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3251 // indicates whether the memcpy source is constant so it does not need to be 3252 // loaded. 3253 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3254 NonScalarIntSafe, MemcpyStrSrc, 3255 DAG.getMachineFunction()); 3256 3257 if (VT == MVT::Other) { 3258 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3259 TLI.allowsUnalignedMemoryAccesses(VT)) { 3260 VT = TLI.getPointerTy(); 3261 } else { 3262 switch (DstAlign & 7) { 3263 case 0: VT = MVT::i64; break; 3264 case 4: VT = MVT::i32; break; 3265 case 2: VT = MVT::i16; break; 3266 default: VT = MVT::i8; break; 3267 } 3268 } 3269 3270 MVT LVT = MVT::i64; 3271 while (!TLI.isTypeLegal(LVT)) 3272 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3273 assert(LVT.isInteger()); 3274 3275 if (VT.bitsGT(LVT)) 3276 VT = LVT; 3277 } 3278 3279 // If we're optimizing for size, and there is a limit, bump the maximum number 3280 // of operations inserted down to 4. This is a wild guess that approximates 3281 // the size of a call to memcpy or memset (3 arguments + call). 3282 if (Limit != ~0U) { 3283 const Function *F = DAG.getMachineFunction().getFunction(); 3284 if (F->hasFnAttr(Attribute::OptimizeForSize)) 3285 Limit = 4; 3286 } 3287 3288 unsigned NumMemOps = 0; 3289 while (Size != 0) { 3290 unsigned VTSize = VT.getSizeInBits() / 8; 3291 while (VTSize > Size) { 3292 // For now, only use non-vector load / store's for the left-over pieces. 3293 if (VT.isVector() || VT.isFloatingPoint()) { 3294 VT = MVT::i64; 3295 while (!TLI.isTypeLegal(VT)) 3296 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3297 VTSize = VT.getSizeInBits() / 8; 3298 } else { 3299 // This can result in a type that is not legal on the target, e.g. 3300 // 1 or 2 bytes on PPC. 3301 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3302 VTSize >>= 1; 3303 } 3304 } 3305 3306 if (++NumMemOps > Limit) 3307 return false; 3308 MemOps.push_back(VT); 3309 Size -= VTSize; 3310 } 3311 3312 return true; 3313} 3314 3315static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3316 SDValue Chain, SDValue Dst, 3317 SDValue Src, uint64_t Size, 3318 unsigned Align, bool isVol, 3319 bool AlwaysInline, 3320 const Value *DstSV, uint64_t DstSVOff, 3321 const Value *SrcSV, uint64_t SrcSVOff) { 3322 // Turn a memcpy of undef to nop. 3323 if (Src.getOpcode() == ISD::UNDEF) 3324 return Chain; 3325 3326 // Expand memcpy to a series of load and store ops if the size operand falls 3327 // below a certain threshold. 3328 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3329 std::vector<EVT> MemOps; 3330 bool DstAlignCanChange = false; 3331 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3332 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3333 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3334 DstAlignCanChange = true; 3335 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3336 if (Align > SrcAlign) 3337 SrcAlign = Align; 3338 std::string Str; 3339 bool CopyFromStr = isMemSrcFromString(Src, Str); 3340 bool isZeroStr = CopyFromStr && Str.empty(); 3341 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(); 3342 3343 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3344 (DstAlignCanChange ? 0 : Align), 3345 (isZeroStr ? 0 : SrcAlign), 3346 true, CopyFromStr, DAG, TLI)) 3347 return SDValue(); 3348 3349 if (DstAlignCanChange) { 3350 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3351 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3352 if (NewAlign > Align) { 3353 // Give the stack frame object a larger alignment if needed. 3354 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3355 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3356 Align = NewAlign; 3357 } 3358 } 3359 3360 SmallVector<SDValue, 8> OutChains; 3361 unsigned NumMemOps = MemOps.size(); 3362 uint64_t SrcOff = 0, DstOff = 0; 3363 for (unsigned i = 0; i != NumMemOps; ++i) { 3364 EVT VT = MemOps[i]; 3365 unsigned VTSize = VT.getSizeInBits() / 8; 3366 SDValue Value, Store; 3367 3368 if (CopyFromStr && 3369 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3370 // It's unlikely a store of a vector immediate can be done in a single 3371 // instruction. It would require a load from a constantpool first. 3372 // We only handle zero vectors here. 3373 // FIXME: Handle other cases where store of vector immediate is done in 3374 // a single instruction. 3375 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3376 Store = DAG.getStore(Chain, dl, Value, 3377 getMemBasePlusOffset(Dst, DstOff, DAG), 3378 DstSV, DstSVOff + DstOff, isVol, false, Align); 3379 } else { 3380 // The type might not be legal for the target. This should only happen 3381 // if the type is smaller than a legal type, as on PPC, so the right 3382 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3383 // to Load/Store if NVT==VT. 3384 // FIXME does the case above also need this? 3385 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3386 assert(NVT.bitsGE(VT)); 3387 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3388 getMemBasePlusOffset(Src, SrcOff, DAG), 3389 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3390 MinAlign(SrcAlign, SrcOff)); 3391 Store = DAG.getTruncStore(Chain, dl, Value, 3392 getMemBasePlusOffset(Dst, DstOff, DAG), 3393 DstSV, DstSVOff + DstOff, VT, isVol, false, 3394 Align); 3395 } 3396 OutChains.push_back(Store); 3397 SrcOff += VTSize; 3398 DstOff += VTSize; 3399 } 3400 3401 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3402 &OutChains[0], OutChains.size()); 3403} 3404 3405static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3406 SDValue Chain, SDValue Dst, 3407 SDValue Src, uint64_t Size, 3408 unsigned Align, bool isVol, 3409 bool AlwaysInline, 3410 const Value *DstSV, uint64_t DstSVOff, 3411 const Value *SrcSV, uint64_t SrcSVOff) { 3412 // Turn a memmove of undef to nop. 3413 if (Src.getOpcode() == ISD::UNDEF) 3414 return Chain; 3415 3416 // Expand memmove to a series of load and store ops if the size operand falls 3417 // below a certain threshold. 3418 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3419 std::vector<EVT> MemOps; 3420 bool DstAlignCanChange = false; 3421 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3422 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3423 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3424 DstAlignCanChange = true; 3425 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3426 if (Align > SrcAlign) 3427 SrcAlign = Align; 3428 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(); 3429 3430 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3431 (DstAlignCanChange ? 0 : Align), 3432 SrcAlign, true, false, DAG, TLI)) 3433 return SDValue(); 3434 3435 if (DstAlignCanChange) { 3436 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3437 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3438 if (NewAlign > Align) { 3439 // Give the stack frame object a larger alignment if needed. 3440 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3441 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3442 Align = NewAlign; 3443 } 3444 } 3445 3446 uint64_t SrcOff = 0, DstOff = 0; 3447 SmallVector<SDValue, 8> LoadValues; 3448 SmallVector<SDValue, 8> LoadChains; 3449 SmallVector<SDValue, 8> OutChains; 3450 unsigned NumMemOps = MemOps.size(); 3451 for (unsigned i = 0; i < NumMemOps; i++) { 3452 EVT VT = MemOps[i]; 3453 unsigned VTSize = VT.getSizeInBits() / 8; 3454 SDValue Value, Store; 3455 3456 Value = DAG.getLoad(VT, dl, Chain, 3457 getMemBasePlusOffset(Src, SrcOff, DAG), 3458 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3459 LoadValues.push_back(Value); 3460 LoadChains.push_back(Value.getValue(1)); 3461 SrcOff += VTSize; 3462 } 3463 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3464 &LoadChains[0], LoadChains.size()); 3465 OutChains.clear(); 3466 for (unsigned i = 0; i < NumMemOps; i++) { 3467 EVT VT = MemOps[i]; 3468 unsigned VTSize = VT.getSizeInBits() / 8; 3469 SDValue Value, Store; 3470 3471 Store = DAG.getStore(Chain, dl, LoadValues[i], 3472 getMemBasePlusOffset(Dst, DstOff, DAG), 3473 DstSV, DstSVOff + DstOff, isVol, false, Align); 3474 OutChains.push_back(Store); 3475 DstOff += VTSize; 3476 } 3477 3478 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3479 &OutChains[0], OutChains.size()); 3480} 3481 3482static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3483 SDValue Chain, SDValue Dst, 3484 SDValue Src, uint64_t Size, 3485 unsigned Align, bool isVol, 3486 const Value *DstSV, uint64_t DstSVOff) { 3487 // Turn a memset of undef to nop. 3488 if (Src.getOpcode() == ISD::UNDEF) 3489 return Chain; 3490 3491 // Expand memset to a series of load/store ops if the size operand 3492 // falls below a certain threshold. 3493 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3494 std::vector<EVT> MemOps; 3495 bool DstAlignCanChange = false; 3496 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3497 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3498 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3499 DstAlignCanChange = true; 3500 bool NonScalarIntSafe = 3501 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3502 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3503 Size, (DstAlignCanChange ? 0 : Align), 0, 3504 NonScalarIntSafe, false, DAG, TLI)) 3505 return SDValue(); 3506 3507 if (DstAlignCanChange) { 3508 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3509 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3510 if (NewAlign > Align) { 3511 // Give the stack frame object a larger alignment if needed. 3512 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3513 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3514 Align = NewAlign; 3515 } 3516 } 3517 3518 SmallVector<SDValue, 8> OutChains; 3519 uint64_t DstOff = 0; 3520 unsigned NumMemOps = MemOps.size(); 3521 for (unsigned i = 0; i < NumMemOps; i++) { 3522 EVT VT = MemOps[i]; 3523 unsigned VTSize = VT.getSizeInBits() / 8; 3524 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3525 SDValue Store = DAG.getStore(Chain, dl, Value, 3526 getMemBasePlusOffset(Dst, DstOff, DAG), 3527 DstSV, DstSVOff + DstOff, isVol, false, 0); 3528 OutChains.push_back(Store); 3529 DstOff += VTSize; 3530 } 3531 3532 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3533 &OutChains[0], OutChains.size()); 3534} 3535 3536SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3537 SDValue Src, SDValue Size, 3538 unsigned Align, bool isVol, bool AlwaysInline, 3539 const Value *DstSV, uint64_t DstSVOff, 3540 const Value *SrcSV, uint64_t SrcSVOff) { 3541 3542 // Check to see if we should lower the memcpy to loads and stores first. 3543 // For cases within the target-specified limits, this is the best choice. 3544 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3545 if (ConstantSize) { 3546 // Memcpy with size zero? Just return the original chain. 3547 if (ConstantSize->isNullValue()) 3548 return Chain; 3549 3550 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3551 ConstantSize->getZExtValue(),Align, 3552 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3553 if (Result.getNode()) 3554 return Result; 3555 } 3556 3557 // Then check to see if we should lower the memcpy with target-specific 3558 // code. If the target chooses to do this, this is the next best. 3559 SDValue Result = 3560 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3561 isVol, AlwaysInline, 3562 DstSV, DstSVOff, SrcSV, SrcSVOff); 3563 if (Result.getNode()) 3564 return Result; 3565 3566 // If we really need inline code and the target declined to provide it, 3567 // use a (potentially long) sequence of loads and stores. 3568 if (AlwaysInline) { 3569 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3570 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3571 ConstantSize->getZExtValue(), Align, isVol, 3572 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3573 } 3574 3575 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3576 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3577 // respect volatile, so they may do things like read or write memory 3578 // beyond the given memory regions. But fixing this isn't easy, and most 3579 // people don't care. 3580 3581 // Emit a library call. 3582 TargetLowering::ArgListTy Args; 3583 TargetLowering::ArgListEntry Entry; 3584 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3585 Entry.Node = Dst; Args.push_back(Entry); 3586 Entry.Node = Src; Args.push_back(Entry); 3587 Entry.Node = Size; Args.push_back(Entry); 3588 // FIXME: pass in DebugLoc 3589 std::pair<SDValue,SDValue> CallResult = 3590 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3591 false, false, false, false, 0, 3592 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3593 /*isReturnValueUsed=*/false, 3594 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3595 TLI.getPointerTy()), 3596 Args, *this, dl); 3597 return CallResult.second; 3598} 3599 3600SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3601 SDValue Src, SDValue Size, 3602 unsigned Align, bool isVol, 3603 const Value *DstSV, uint64_t DstSVOff, 3604 const Value *SrcSV, uint64_t SrcSVOff) { 3605 3606 // Check to see if we should lower the memmove to loads and stores first. 3607 // For cases within the target-specified limits, this is the best choice. 3608 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3609 if (ConstantSize) { 3610 // Memmove with size zero? Just return the original chain. 3611 if (ConstantSize->isNullValue()) 3612 return Chain; 3613 3614 SDValue Result = 3615 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3616 ConstantSize->getZExtValue(), Align, isVol, 3617 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3618 if (Result.getNode()) 3619 return Result; 3620 } 3621 3622 // Then check to see if we should lower the memmove with target-specific 3623 // code. If the target chooses to do this, this is the next best. 3624 SDValue Result = 3625 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3626 DstSV, DstSVOff, SrcSV, SrcSVOff); 3627 if (Result.getNode()) 3628 return Result; 3629 3630 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3631 // not be safe. See memcpy above for more details. 3632 3633 // Emit a library call. 3634 TargetLowering::ArgListTy Args; 3635 TargetLowering::ArgListEntry Entry; 3636 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3637 Entry.Node = Dst; Args.push_back(Entry); 3638 Entry.Node = Src; Args.push_back(Entry); 3639 Entry.Node = Size; Args.push_back(Entry); 3640 // FIXME: pass in DebugLoc 3641 std::pair<SDValue,SDValue> CallResult = 3642 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3643 false, false, false, false, 0, 3644 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3645 /*isReturnValueUsed=*/false, 3646 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3647 TLI.getPointerTy()), 3648 Args, *this, dl); 3649 return CallResult.second; 3650} 3651 3652SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3653 SDValue Src, SDValue Size, 3654 unsigned Align, bool isVol, 3655 const Value *DstSV, uint64_t DstSVOff) { 3656 3657 // Check to see if we should lower the memset to stores first. 3658 // For cases within the target-specified limits, this is the best choice. 3659 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3660 if (ConstantSize) { 3661 // Memset with size zero? Just return the original chain. 3662 if (ConstantSize->isNullValue()) 3663 return Chain; 3664 3665 SDValue Result = 3666 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3667 Align, isVol, DstSV, DstSVOff); 3668 3669 if (Result.getNode()) 3670 return Result; 3671 } 3672 3673 // Then check to see if we should lower the memset with target-specific 3674 // code. If the target chooses to do this, this is the next best. 3675 SDValue Result = 3676 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3677 DstSV, DstSVOff); 3678 if (Result.getNode()) 3679 return Result; 3680 3681 // Emit a library call. 3682 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3683 TargetLowering::ArgListTy Args; 3684 TargetLowering::ArgListEntry Entry; 3685 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3686 Args.push_back(Entry); 3687 // Extend or truncate the argument to be an i32 value for the call. 3688 if (Src.getValueType().bitsGT(MVT::i32)) 3689 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3690 else 3691 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3692 Entry.Node = Src; 3693 Entry.Ty = Type::getInt32Ty(*getContext()); 3694 Entry.isSExt = true; 3695 Args.push_back(Entry); 3696 Entry.Node = Size; 3697 Entry.Ty = IntPtrTy; 3698 Entry.isSExt = false; 3699 Args.push_back(Entry); 3700 // FIXME: pass in DebugLoc 3701 std::pair<SDValue,SDValue> CallResult = 3702 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3703 false, false, false, false, 0, 3704 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3705 /*isReturnValueUsed=*/false, 3706 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3707 TLI.getPointerTy()), 3708 Args, *this, dl); 3709 return CallResult.second; 3710} 3711 3712SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3713 SDValue Chain, 3714 SDValue Ptr, SDValue Cmp, 3715 SDValue Swp, const Value* PtrVal, 3716 unsigned Alignment) { 3717 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3718 Alignment = getEVTAlignment(MemVT); 3719 3720 // Check if the memory reference references a frame index 3721 if (!PtrVal) 3722 if (const FrameIndexSDNode *FI = 3723 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3724 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3725 3726 MachineFunction &MF = getMachineFunction(); 3727 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3728 3729 // For now, atomics are considered to be volatile always. 3730 Flags |= MachineMemOperand::MOVolatile; 3731 3732 MachineMemOperand *MMO = 3733 MF.getMachineMemOperand(PtrVal, Flags, 0, 3734 MemVT.getStoreSize(), Alignment); 3735 3736 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3737} 3738 3739SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3740 SDValue Chain, 3741 SDValue Ptr, SDValue Cmp, 3742 SDValue Swp, MachineMemOperand *MMO) { 3743 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3744 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3745 3746 EVT VT = Cmp.getValueType(); 3747 3748 SDVTList VTs = getVTList(VT, MVT::Other); 3749 FoldingSetNodeID ID; 3750 ID.AddInteger(MemVT.getRawBits()); 3751 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3752 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3753 void* IP = 0; 3754 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3755 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3756 return SDValue(E, 0); 3757 } 3758 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3759 Ptr, Cmp, Swp, MMO); 3760 CSEMap.InsertNode(N, IP); 3761 AllNodes.push_back(N); 3762 return SDValue(N, 0); 3763} 3764 3765SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3766 SDValue Chain, 3767 SDValue Ptr, SDValue Val, 3768 const Value* PtrVal, 3769 unsigned Alignment) { 3770 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3771 Alignment = getEVTAlignment(MemVT); 3772 3773 // Check if the memory reference references a frame index 3774 if (!PtrVal) 3775 if (const FrameIndexSDNode *FI = 3776 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3777 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3778 3779 MachineFunction &MF = getMachineFunction(); 3780 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3781 3782 // For now, atomics are considered to be volatile always. 3783 Flags |= MachineMemOperand::MOVolatile; 3784 3785 MachineMemOperand *MMO = 3786 MF.getMachineMemOperand(PtrVal, Flags, 0, 3787 MemVT.getStoreSize(), Alignment); 3788 3789 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3790} 3791 3792SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3793 SDValue Chain, 3794 SDValue Ptr, SDValue Val, 3795 MachineMemOperand *MMO) { 3796 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3797 Opcode == ISD::ATOMIC_LOAD_SUB || 3798 Opcode == ISD::ATOMIC_LOAD_AND || 3799 Opcode == ISD::ATOMIC_LOAD_OR || 3800 Opcode == ISD::ATOMIC_LOAD_XOR || 3801 Opcode == ISD::ATOMIC_LOAD_NAND || 3802 Opcode == ISD::ATOMIC_LOAD_MIN || 3803 Opcode == ISD::ATOMIC_LOAD_MAX || 3804 Opcode == ISD::ATOMIC_LOAD_UMIN || 3805 Opcode == ISD::ATOMIC_LOAD_UMAX || 3806 Opcode == ISD::ATOMIC_SWAP) && 3807 "Invalid Atomic Op"); 3808 3809 EVT VT = Val.getValueType(); 3810 3811 SDVTList VTs = getVTList(VT, MVT::Other); 3812 FoldingSetNodeID ID; 3813 ID.AddInteger(MemVT.getRawBits()); 3814 SDValue Ops[] = {Chain, Ptr, Val}; 3815 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3816 void* IP = 0; 3817 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3818 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3819 return SDValue(E, 0); 3820 } 3821 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3822 Ptr, Val, MMO); 3823 CSEMap.InsertNode(N, IP); 3824 AllNodes.push_back(N); 3825 return SDValue(N, 0); 3826} 3827 3828/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3829/// Allowed to return something different (and simpler) if Simplify is true. 3830SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3831 DebugLoc dl) { 3832 if (NumOps == 1) 3833 return Ops[0]; 3834 3835 SmallVector<EVT, 4> VTs; 3836 VTs.reserve(NumOps); 3837 for (unsigned i = 0; i < NumOps; ++i) 3838 VTs.push_back(Ops[i].getValueType()); 3839 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3840 Ops, NumOps); 3841} 3842 3843SDValue 3844SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3845 const EVT *VTs, unsigned NumVTs, 3846 const SDValue *Ops, unsigned NumOps, 3847 EVT MemVT, const Value *srcValue, int SVOff, 3848 unsigned Align, bool Vol, 3849 bool ReadMem, bool WriteMem) { 3850 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3851 MemVT, srcValue, SVOff, Align, Vol, 3852 ReadMem, WriteMem); 3853} 3854 3855SDValue 3856SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3857 const SDValue *Ops, unsigned NumOps, 3858 EVT MemVT, const Value *srcValue, int SVOff, 3859 unsigned Align, bool Vol, 3860 bool ReadMem, bool WriteMem) { 3861 if (Align == 0) // Ensure that codegen never sees alignment 0 3862 Align = getEVTAlignment(MemVT); 3863 3864 MachineFunction &MF = getMachineFunction(); 3865 unsigned Flags = 0; 3866 if (WriteMem) 3867 Flags |= MachineMemOperand::MOStore; 3868 if (ReadMem) 3869 Flags |= MachineMemOperand::MOLoad; 3870 if (Vol) 3871 Flags |= MachineMemOperand::MOVolatile; 3872 MachineMemOperand *MMO = 3873 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3874 MemVT.getStoreSize(), Align); 3875 3876 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3877} 3878 3879SDValue 3880SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3881 const SDValue *Ops, unsigned NumOps, 3882 EVT MemVT, MachineMemOperand *MMO) { 3883 assert((Opcode == ISD::INTRINSIC_VOID || 3884 Opcode == ISD::INTRINSIC_W_CHAIN || 3885 (Opcode <= INT_MAX && 3886 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3887 "Opcode is not a memory-accessing opcode!"); 3888 3889 // Memoize the node unless it returns a flag. 3890 MemIntrinsicSDNode *N; 3891 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3892 FoldingSetNodeID ID; 3893 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3894 void *IP = 0; 3895 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3896 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3897 return SDValue(E, 0); 3898 } 3899 3900 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3901 MemVT, MMO); 3902 CSEMap.InsertNode(N, IP); 3903 } else { 3904 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3905 MemVT, MMO); 3906 } 3907 AllNodes.push_back(N); 3908 return SDValue(N, 0); 3909} 3910 3911SDValue 3912SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3913 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3914 SDValue Ptr, SDValue Offset, 3915 const Value *SV, int SVOffset, EVT MemVT, 3916 bool isVolatile, bool isNonTemporal, 3917 unsigned Alignment) { 3918 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3919 Alignment = getEVTAlignment(VT); 3920 3921 // Check if the memory reference references a frame index 3922 if (!SV) 3923 if (const FrameIndexSDNode *FI = 3924 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3925 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3926 3927 MachineFunction &MF = getMachineFunction(); 3928 unsigned Flags = MachineMemOperand::MOLoad; 3929 if (isVolatile) 3930 Flags |= MachineMemOperand::MOVolatile; 3931 if (isNonTemporal) 3932 Flags |= MachineMemOperand::MONonTemporal; 3933 MachineMemOperand *MMO = 3934 MF.getMachineMemOperand(SV, Flags, SVOffset, 3935 MemVT.getStoreSize(), Alignment); 3936 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3937} 3938 3939SDValue 3940SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3941 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3942 SDValue Ptr, SDValue Offset, EVT MemVT, 3943 MachineMemOperand *MMO) { 3944 if (VT == MemVT) { 3945 ExtType = ISD::NON_EXTLOAD; 3946 } else if (ExtType == ISD::NON_EXTLOAD) { 3947 assert(VT == MemVT && "Non-extending load from different memory type!"); 3948 } else { 3949 // Extending load. 3950 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3951 "Should only be an extending load, not truncating!"); 3952 assert(VT.isInteger() == MemVT.isInteger() && 3953 "Cannot convert from FP to Int or Int -> FP!"); 3954 assert(VT.isVector() == MemVT.isVector() && 3955 "Cannot use trunc store to convert to or from a vector!"); 3956 assert((!VT.isVector() || 3957 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3958 "Cannot use trunc store to change the number of vector elements!"); 3959 } 3960 3961 bool Indexed = AM != ISD::UNINDEXED; 3962 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3963 "Unindexed load with an offset!"); 3964 3965 SDVTList VTs = Indexed ? 3966 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3967 SDValue Ops[] = { Chain, Ptr, Offset }; 3968 FoldingSetNodeID ID; 3969 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3970 ID.AddInteger(MemVT.getRawBits()); 3971 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3972 MMO->isNonTemporal())); 3973 void *IP = 0; 3974 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3975 cast<LoadSDNode>(E)->refineAlignment(MMO); 3976 return SDValue(E, 0); 3977 } 3978 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3979 MemVT, MMO); 3980 CSEMap.InsertNode(N, IP); 3981 AllNodes.push_back(N); 3982 return SDValue(N, 0); 3983} 3984 3985SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3986 SDValue Chain, SDValue Ptr, 3987 const Value *SV, int SVOffset, 3988 bool isVolatile, bool isNonTemporal, 3989 unsigned Alignment) { 3990 SDValue Undef = getUNDEF(Ptr.getValueType()); 3991 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3992 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3993} 3994 3995SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3996 SDValue Chain, SDValue Ptr, 3997 const Value *SV, 3998 int SVOffset, EVT MemVT, 3999 bool isVolatile, bool isNonTemporal, 4000 unsigned Alignment) { 4001 SDValue Undef = getUNDEF(Ptr.getValueType()); 4002 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 4003 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 4004} 4005 4006SDValue 4007SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4008 SDValue Offset, ISD::MemIndexedMode AM) { 4009 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4010 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4011 "Load is already a indexed load!"); 4012 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 4013 LD->getChain(), Base, Offset, LD->getSrcValue(), 4014 LD->getSrcValueOffset(), LD->getMemoryVT(), 4015 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4016} 4017 4018SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4019 SDValue Ptr, const Value *SV, int SVOffset, 4020 bool isVolatile, bool isNonTemporal, 4021 unsigned Alignment) { 4022 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4023 Alignment = getEVTAlignment(Val.getValueType()); 4024 4025 // Check if the memory reference references a frame index 4026 if (!SV) 4027 if (const FrameIndexSDNode *FI = 4028 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4029 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4030 4031 MachineFunction &MF = getMachineFunction(); 4032 unsigned Flags = MachineMemOperand::MOStore; 4033 if (isVolatile) 4034 Flags |= MachineMemOperand::MOVolatile; 4035 if (isNonTemporal) 4036 Flags |= MachineMemOperand::MONonTemporal; 4037 MachineMemOperand *MMO = 4038 MF.getMachineMemOperand(SV, Flags, SVOffset, 4039 Val.getValueType().getStoreSize(), Alignment); 4040 4041 return getStore(Chain, dl, Val, Ptr, MMO); 4042} 4043 4044SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4045 SDValue Ptr, MachineMemOperand *MMO) { 4046 EVT VT = Val.getValueType(); 4047 SDVTList VTs = getVTList(MVT::Other); 4048 SDValue Undef = getUNDEF(Ptr.getValueType()); 4049 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4050 FoldingSetNodeID ID; 4051 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4052 ID.AddInteger(VT.getRawBits()); 4053 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4054 MMO->isNonTemporal())); 4055 void *IP = 0; 4056 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4057 cast<StoreSDNode>(E)->refineAlignment(MMO); 4058 return SDValue(E, 0); 4059 } 4060 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4061 false, VT, MMO); 4062 CSEMap.InsertNode(N, IP); 4063 AllNodes.push_back(N); 4064 return SDValue(N, 0); 4065} 4066 4067SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4068 SDValue Ptr, const Value *SV, 4069 int SVOffset, EVT SVT, 4070 bool isVolatile, bool isNonTemporal, 4071 unsigned Alignment) { 4072 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4073 Alignment = getEVTAlignment(SVT); 4074 4075 // Check if the memory reference references a frame index 4076 if (!SV) 4077 if (const FrameIndexSDNode *FI = 4078 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4079 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4080 4081 MachineFunction &MF = getMachineFunction(); 4082 unsigned Flags = MachineMemOperand::MOStore; 4083 if (isVolatile) 4084 Flags |= MachineMemOperand::MOVolatile; 4085 if (isNonTemporal) 4086 Flags |= MachineMemOperand::MONonTemporal; 4087 MachineMemOperand *MMO = 4088 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4089 4090 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4091} 4092 4093SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4094 SDValue Ptr, EVT SVT, 4095 MachineMemOperand *MMO) { 4096 EVT VT = Val.getValueType(); 4097 4098 if (VT == SVT) 4099 return getStore(Chain, dl, Val, Ptr, MMO); 4100 4101 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4102 "Should only be a truncating store, not extending!"); 4103 assert(VT.isInteger() == SVT.isInteger() && 4104 "Can't do FP-INT conversion!"); 4105 assert(VT.isVector() == SVT.isVector() && 4106 "Cannot use trunc store to convert to or from a vector!"); 4107 assert((!VT.isVector() || 4108 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4109 "Cannot use trunc store to change the number of vector elements!"); 4110 4111 SDVTList VTs = getVTList(MVT::Other); 4112 SDValue Undef = getUNDEF(Ptr.getValueType()); 4113 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4114 FoldingSetNodeID ID; 4115 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4116 ID.AddInteger(SVT.getRawBits()); 4117 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4118 MMO->isNonTemporal())); 4119 void *IP = 0; 4120 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4121 cast<StoreSDNode>(E)->refineAlignment(MMO); 4122 return SDValue(E, 0); 4123 } 4124 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4125 true, SVT, MMO); 4126 CSEMap.InsertNode(N, IP); 4127 AllNodes.push_back(N); 4128 return SDValue(N, 0); 4129} 4130 4131SDValue 4132SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4133 SDValue Offset, ISD::MemIndexedMode AM) { 4134 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4135 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4136 "Store is already a indexed store!"); 4137 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4138 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4139 FoldingSetNodeID ID; 4140 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4141 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4142 ID.AddInteger(ST->getRawSubclassData()); 4143 void *IP = 0; 4144 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4145 return SDValue(E, 0); 4146 4147 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4148 ST->isTruncatingStore(), 4149 ST->getMemoryVT(), 4150 ST->getMemOperand()); 4151 CSEMap.InsertNode(N, IP); 4152 AllNodes.push_back(N); 4153 return SDValue(N, 0); 4154} 4155 4156SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4157 SDValue Chain, SDValue Ptr, 4158 SDValue SV) { 4159 SDValue Ops[] = { Chain, Ptr, SV }; 4160 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4161} 4162 4163SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4164 const SDUse *Ops, unsigned NumOps) { 4165 switch (NumOps) { 4166 case 0: return getNode(Opcode, DL, VT); 4167 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4168 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4169 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4170 default: break; 4171 } 4172 4173 // Copy from an SDUse array into an SDValue array for use with 4174 // the regular getNode logic. 4175 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4176 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4177} 4178 4179SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4180 const SDValue *Ops, unsigned NumOps) { 4181 switch (NumOps) { 4182 case 0: return getNode(Opcode, DL, VT); 4183 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4184 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4185 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4186 default: break; 4187 } 4188 4189 switch (Opcode) { 4190 default: break; 4191 case ISD::SELECT_CC: { 4192 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4193 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4194 "LHS and RHS of condition must have same type!"); 4195 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4196 "True and False arms of SelectCC must have same type!"); 4197 assert(Ops[2].getValueType() == VT && 4198 "select_cc node must be of same type as true and false value!"); 4199 break; 4200 } 4201 case ISD::BR_CC: { 4202 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4203 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4204 "LHS/RHS of comparison should match types!"); 4205 break; 4206 } 4207 } 4208 4209 // Memoize nodes. 4210 SDNode *N; 4211 SDVTList VTs = getVTList(VT); 4212 4213 if (VT != MVT::Flag) { 4214 FoldingSetNodeID ID; 4215 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4216 void *IP = 0; 4217 4218 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4219 return SDValue(E, 0); 4220 4221 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4222 CSEMap.InsertNode(N, IP); 4223 } else { 4224 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4225 } 4226 4227 AllNodes.push_back(N); 4228#ifndef NDEBUG 4229 VerifyNode(N); 4230#endif 4231 return SDValue(N, 0); 4232} 4233 4234SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4235 const std::vector<EVT> &ResultTys, 4236 const SDValue *Ops, unsigned NumOps) { 4237 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4238 Ops, NumOps); 4239} 4240 4241SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4242 const EVT *VTs, unsigned NumVTs, 4243 const SDValue *Ops, unsigned NumOps) { 4244 if (NumVTs == 1) 4245 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4246 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4247} 4248 4249SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4250 const SDValue *Ops, unsigned NumOps) { 4251 if (VTList.NumVTs == 1) 4252 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4253 4254#if 0 4255 switch (Opcode) { 4256 // FIXME: figure out how to safely handle things like 4257 // int foo(int x) { return 1 << (x & 255); } 4258 // int bar() { return foo(256); } 4259 case ISD::SRA_PARTS: 4260 case ISD::SRL_PARTS: 4261 case ISD::SHL_PARTS: 4262 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4263 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4264 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4265 else if (N3.getOpcode() == ISD::AND) 4266 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4267 // If the and is only masking out bits that cannot effect the shift, 4268 // eliminate the and. 4269 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4270 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4271 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4272 } 4273 break; 4274 } 4275#endif 4276 4277 // Memoize the node unless it returns a flag. 4278 SDNode *N; 4279 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4280 FoldingSetNodeID ID; 4281 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4282 void *IP = 0; 4283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4284 return SDValue(E, 0); 4285 4286 if (NumOps == 1) { 4287 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4288 } else if (NumOps == 2) { 4289 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4290 } else if (NumOps == 3) { 4291 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4292 Ops[2]); 4293 } else { 4294 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4295 } 4296 CSEMap.InsertNode(N, IP); 4297 } else { 4298 if (NumOps == 1) { 4299 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4300 } else if (NumOps == 2) { 4301 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4302 } else if (NumOps == 3) { 4303 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4304 Ops[2]); 4305 } else { 4306 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4307 } 4308 } 4309 AllNodes.push_back(N); 4310#ifndef NDEBUG 4311 VerifyNode(N); 4312#endif 4313 return SDValue(N, 0); 4314} 4315 4316SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4317 return getNode(Opcode, DL, VTList, 0, 0); 4318} 4319 4320SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4321 SDValue N1) { 4322 SDValue Ops[] = { N1 }; 4323 return getNode(Opcode, DL, VTList, Ops, 1); 4324} 4325 4326SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4327 SDValue N1, SDValue N2) { 4328 SDValue Ops[] = { N1, N2 }; 4329 return getNode(Opcode, DL, VTList, Ops, 2); 4330} 4331 4332SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4333 SDValue N1, SDValue N2, SDValue N3) { 4334 SDValue Ops[] = { N1, N2, N3 }; 4335 return getNode(Opcode, DL, VTList, Ops, 3); 4336} 4337 4338SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4339 SDValue N1, SDValue N2, SDValue N3, 4340 SDValue N4) { 4341 SDValue Ops[] = { N1, N2, N3, N4 }; 4342 return getNode(Opcode, DL, VTList, Ops, 4); 4343} 4344 4345SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4346 SDValue N1, SDValue N2, SDValue N3, 4347 SDValue N4, SDValue N5) { 4348 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4349 return getNode(Opcode, DL, VTList, Ops, 5); 4350} 4351 4352SDVTList SelectionDAG::getVTList(EVT VT) { 4353 return makeVTList(SDNode::getValueTypeList(VT), 1); 4354} 4355 4356SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4357 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4358 E = VTList.rend(); I != E; ++I) 4359 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4360 return *I; 4361 4362 EVT *Array = Allocator.Allocate<EVT>(2); 4363 Array[0] = VT1; 4364 Array[1] = VT2; 4365 SDVTList Result = makeVTList(Array, 2); 4366 VTList.push_back(Result); 4367 return Result; 4368} 4369 4370SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4371 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4372 E = VTList.rend(); I != E; ++I) 4373 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4374 I->VTs[2] == VT3) 4375 return *I; 4376 4377 EVT *Array = Allocator.Allocate<EVT>(3); 4378 Array[0] = VT1; 4379 Array[1] = VT2; 4380 Array[2] = VT3; 4381 SDVTList Result = makeVTList(Array, 3); 4382 VTList.push_back(Result); 4383 return Result; 4384} 4385 4386SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4387 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4388 E = VTList.rend(); I != E; ++I) 4389 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4390 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4391 return *I; 4392 4393 EVT *Array = Allocator.Allocate<EVT>(4); 4394 Array[0] = VT1; 4395 Array[1] = VT2; 4396 Array[2] = VT3; 4397 Array[3] = VT4; 4398 SDVTList Result = makeVTList(Array, 4); 4399 VTList.push_back(Result); 4400 return Result; 4401} 4402 4403SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4404 switch (NumVTs) { 4405 case 0: llvm_unreachable("Cannot have nodes without results!"); 4406 case 1: return getVTList(VTs[0]); 4407 case 2: return getVTList(VTs[0], VTs[1]); 4408 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4409 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4410 default: break; 4411 } 4412 4413 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4414 E = VTList.rend(); I != E; ++I) { 4415 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4416 continue; 4417 4418 bool NoMatch = false; 4419 for (unsigned i = 2; i != NumVTs; ++i) 4420 if (VTs[i] != I->VTs[i]) { 4421 NoMatch = true; 4422 break; 4423 } 4424 if (!NoMatch) 4425 return *I; 4426 } 4427 4428 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4429 std::copy(VTs, VTs+NumVTs, Array); 4430 SDVTList Result = makeVTList(Array, NumVTs); 4431 VTList.push_back(Result); 4432 return Result; 4433} 4434 4435 4436/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4437/// specified operands. If the resultant node already exists in the DAG, 4438/// this does not modify the specified node, instead it returns the node that 4439/// already exists. If the resultant node does not exist in the DAG, the 4440/// input node is returned. As a degenerate case, if you specify the same 4441/// input operands as the node already has, the input node is returned. 4442SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4443 SDNode *N = InN.getNode(); 4444 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4445 4446 // Check to see if there is no change. 4447 if (Op == N->getOperand(0)) return InN; 4448 4449 // See if the modified node already exists. 4450 void *InsertPos = 0; 4451 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4452 return SDValue(Existing, InN.getResNo()); 4453 4454 // Nope it doesn't. Remove the node from its current place in the maps. 4455 if (InsertPos) 4456 if (!RemoveNodeFromCSEMaps(N)) 4457 InsertPos = 0; 4458 4459 // Now we update the operands. 4460 N->OperandList[0].set(Op); 4461 4462 // If this gets put into a CSE map, add it. 4463 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4464 return InN; 4465} 4466 4467SDValue SelectionDAG:: 4468UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4469 SDNode *N = InN.getNode(); 4470 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4471 4472 // Check to see if there is no change. 4473 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4474 return InN; // No operands changed, just return the input node. 4475 4476 // See if the modified node already exists. 4477 void *InsertPos = 0; 4478 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4479 return SDValue(Existing, InN.getResNo()); 4480 4481 // Nope it doesn't. Remove the node from its current place in the maps. 4482 if (InsertPos) 4483 if (!RemoveNodeFromCSEMaps(N)) 4484 InsertPos = 0; 4485 4486 // Now we update the operands. 4487 if (N->OperandList[0] != Op1) 4488 N->OperandList[0].set(Op1); 4489 if (N->OperandList[1] != Op2) 4490 N->OperandList[1].set(Op2); 4491 4492 // If this gets put into a CSE map, add it. 4493 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4494 return InN; 4495} 4496 4497SDValue SelectionDAG:: 4498UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4499 SDValue Ops[] = { Op1, Op2, Op3 }; 4500 return UpdateNodeOperands(N, Ops, 3); 4501} 4502 4503SDValue SelectionDAG:: 4504UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4505 SDValue Op3, SDValue Op4) { 4506 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4507 return UpdateNodeOperands(N, Ops, 4); 4508} 4509 4510SDValue SelectionDAG:: 4511UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4512 SDValue Op3, SDValue Op4, SDValue Op5) { 4513 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4514 return UpdateNodeOperands(N, Ops, 5); 4515} 4516 4517SDValue SelectionDAG:: 4518UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4519 SDNode *N = InN.getNode(); 4520 assert(N->getNumOperands() == NumOps && 4521 "Update with wrong number of operands"); 4522 4523 // Check to see if there is no change. 4524 bool AnyChange = false; 4525 for (unsigned i = 0; i != NumOps; ++i) { 4526 if (Ops[i] != N->getOperand(i)) { 4527 AnyChange = true; 4528 break; 4529 } 4530 } 4531 4532 // No operands changed, just return the input node. 4533 if (!AnyChange) return InN; 4534 4535 // See if the modified node already exists. 4536 void *InsertPos = 0; 4537 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4538 return SDValue(Existing, InN.getResNo()); 4539 4540 // Nope it doesn't. Remove the node from its current place in the maps. 4541 if (InsertPos) 4542 if (!RemoveNodeFromCSEMaps(N)) 4543 InsertPos = 0; 4544 4545 // Now we update the operands. 4546 for (unsigned i = 0; i != NumOps; ++i) 4547 if (N->OperandList[i] != Ops[i]) 4548 N->OperandList[i].set(Ops[i]); 4549 4550 // If this gets put into a CSE map, add it. 4551 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4552 return InN; 4553} 4554 4555/// DropOperands - Release the operands and set this node to have 4556/// zero operands. 4557void SDNode::DropOperands() { 4558 // Unlike the code in MorphNodeTo that does this, we don't need to 4559 // watch for dead nodes here. 4560 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4561 SDUse &Use = *I++; 4562 Use.set(SDValue()); 4563 } 4564} 4565 4566/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4567/// machine opcode. 4568/// 4569SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4570 EVT VT) { 4571 SDVTList VTs = getVTList(VT); 4572 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4573} 4574 4575SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4576 EVT VT, SDValue Op1) { 4577 SDVTList VTs = getVTList(VT); 4578 SDValue Ops[] = { Op1 }; 4579 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4580} 4581 4582SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4583 EVT VT, SDValue Op1, 4584 SDValue Op2) { 4585 SDVTList VTs = getVTList(VT); 4586 SDValue Ops[] = { Op1, Op2 }; 4587 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4588} 4589 4590SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4591 EVT VT, SDValue Op1, 4592 SDValue Op2, SDValue Op3) { 4593 SDVTList VTs = getVTList(VT); 4594 SDValue Ops[] = { Op1, Op2, Op3 }; 4595 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4596} 4597 4598SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4599 EVT VT, const SDValue *Ops, 4600 unsigned NumOps) { 4601 SDVTList VTs = getVTList(VT); 4602 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4603} 4604 4605SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4606 EVT VT1, EVT VT2, const SDValue *Ops, 4607 unsigned NumOps) { 4608 SDVTList VTs = getVTList(VT1, VT2); 4609 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4610} 4611 4612SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4613 EVT VT1, EVT VT2) { 4614 SDVTList VTs = getVTList(VT1, VT2); 4615 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4616} 4617 4618SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4619 EVT VT1, EVT VT2, EVT VT3, 4620 const SDValue *Ops, unsigned NumOps) { 4621 SDVTList VTs = getVTList(VT1, VT2, VT3); 4622 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4623} 4624 4625SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4626 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4627 const SDValue *Ops, unsigned NumOps) { 4628 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4629 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4630} 4631 4632SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4633 EVT VT1, EVT VT2, 4634 SDValue Op1) { 4635 SDVTList VTs = getVTList(VT1, VT2); 4636 SDValue Ops[] = { Op1 }; 4637 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4638} 4639 4640SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4641 EVT VT1, EVT VT2, 4642 SDValue Op1, SDValue Op2) { 4643 SDVTList VTs = getVTList(VT1, VT2); 4644 SDValue Ops[] = { Op1, Op2 }; 4645 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4646} 4647 4648SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4649 EVT VT1, EVT VT2, 4650 SDValue Op1, SDValue Op2, 4651 SDValue Op3) { 4652 SDVTList VTs = getVTList(VT1, VT2); 4653 SDValue Ops[] = { Op1, Op2, Op3 }; 4654 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4655} 4656 4657SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4658 EVT VT1, EVT VT2, EVT VT3, 4659 SDValue Op1, SDValue Op2, 4660 SDValue Op3) { 4661 SDVTList VTs = getVTList(VT1, VT2, VT3); 4662 SDValue Ops[] = { Op1, Op2, Op3 }; 4663 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4664} 4665 4666SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4667 SDVTList VTs, const SDValue *Ops, 4668 unsigned NumOps) { 4669 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4670 // Reset the NodeID to -1. 4671 N->setNodeId(-1); 4672 return N; 4673} 4674 4675/// MorphNodeTo - This *mutates* the specified node to have the specified 4676/// return type, opcode, and operands. 4677/// 4678/// Note that MorphNodeTo returns the resultant node. If there is already a 4679/// node of the specified opcode and operands, it returns that node instead of 4680/// the current one. Note that the DebugLoc need not be the same. 4681/// 4682/// Using MorphNodeTo is faster than creating a new node and swapping it in 4683/// with ReplaceAllUsesWith both because it often avoids allocating a new 4684/// node, and because it doesn't require CSE recalculation for any of 4685/// the node's users. 4686/// 4687SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4688 SDVTList VTs, const SDValue *Ops, 4689 unsigned NumOps) { 4690 // If an identical node already exists, use it. 4691 void *IP = 0; 4692 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4693 FoldingSetNodeID ID; 4694 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4695 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4696 return ON; 4697 } 4698 4699 if (!RemoveNodeFromCSEMaps(N)) 4700 IP = 0; 4701 4702 // Start the morphing. 4703 N->NodeType = Opc; 4704 N->ValueList = VTs.VTs; 4705 N->NumValues = VTs.NumVTs; 4706 4707 // Clear the operands list, updating used nodes to remove this from their 4708 // use list. Keep track of any operands that become dead as a result. 4709 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4710 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4711 SDUse &Use = *I++; 4712 SDNode *Used = Use.getNode(); 4713 Use.set(SDValue()); 4714 if (Used->use_empty()) 4715 DeadNodeSet.insert(Used); 4716 } 4717 4718 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4719 // Initialize the memory references information. 4720 MN->setMemRefs(0, 0); 4721 // If NumOps is larger than the # of operands we can have in a 4722 // MachineSDNode, reallocate the operand list. 4723 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4724 if (MN->OperandsNeedDelete) 4725 delete[] MN->OperandList; 4726 if (NumOps > array_lengthof(MN->LocalOperands)) 4727 // We're creating a final node that will live unmorphed for the 4728 // remainder of the current SelectionDAG iteration, so we can allocate 4729 // the operands directly out of a pool with no recycling metadata. 4730 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4731 Ops, NumOps); 4732 else 4733 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4734 MN->OperandsNeedDelete = false; 4735 } else 4736 MN->InitOperands(MN->OperandList, Ops, NumOps); 4737 } else { 4738 // If NumOps is larger than the # of operands we currently have, reallocate 4739 // the operand list. 4740 if (NumOps > N->NumOperands) { 4741 if (N->OperandsNeedDelete) 4742 delete[] N->OperandList; 4743 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4744 N->OperandsNeedDelete = true; 4745 } else 4746 N->InitOperands(N->OperandList, Ops, NumOps); 4747 } 4748 4749 // Delete any nodes that are still dead after adding the uses for the 4750 // new operands. 4751 if (!DeadNodeSet.empty()) { 4752 SmallVector<SDNode *, 16> DeadNodes; 4753 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4754 E = DeadNodeSet.end(); I != E; ++I) 4755 if ((*I)->use_empty()) 4756 DeadNodes.push_back(*I); 4757 RemoveDeadNodes(DeadNodes); 4758 } 4759 4760 if (IP) 4761 CSEMap.InsertNode(N, IP); // Memoize the new node. 4762 return N; 4763} 4764 4765 4766/// getMachineNode - These are used for target selectors to create a new node 4767/// with specified return type(s), MachineInstr opcode, and operands. 4768/// 4769/// Note that getMachineNode returns the resultant node. If there is already a 4770/// node of the specified opcode and operands, it returns that node instead of 4771/// the current one. 4772MachineSDNode * 4773SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4774 SDVTList VTs = getVTList(VT); 4775 return getMachineNode(Opcode, dl, VTs, 0, 0); 4776} 4777 4778MachineSDNode * 4779SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4780 SDVTList VTs = getVTList(VT); 4781 SDValue Ops[] = { Op1 }; 4782 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4783} 4784 4785MachineSDNode * 4786SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4787 SDValue Op1, SDValue Op2) { 4788 SDVTList VTs = getVTList(VT); 4789 SDValue Ops[] = { Op1, Op2 }; 4790 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4791} 4792 4793MachineSDNode * 4794SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4795 SDValue Op1, SDValue Op2, SDValue Op3) { 4796 SDVTList VTs = getVTList(VT); 4797 SDValue Ops[] = { Op1, Op2, Op3 }; 4798 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4799} 4800 4801MachineSDNode * 4802SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4803 const SDValue *Ops, unsigned NumOps) { 4804 SDVTList VTs = getVTList(VT); 4805 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4806} 4807 4808MachineSDNode * 4809SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4810 SDVTList VTs = getVTList(VT1, VT2); 4811 return getMachineNode(Opcode, dl, VTs, 0, 0); 4812} 4813 4814MachineSDNode * 4815SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4816 EVT VT1, EVT VT2, SDValue Op1) { 4817 SDVTList VTs = getVTList(VT1, VT2); 4818 SDValue Ops[] = { Op1 }; 4819 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4820} 4821 4822MachineSDNode * 4823SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4824 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4825 SDVTList VTs = getVTList(VT1, VT2); 4826 SDValue Ops[] = { Op1, Op2 }; 4827 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4828} 4829 4830MachineSDNode * 4831SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4832 EVT VT1, EVT VT2, SDValue Op1, 4833 SDValue Op2, SDValue Op3) { 4834 SDVTList VTs = getVTList(VT1, VT2); 4835 SDValue Ops[] = { Op1, Op2, Op3 }; 4836 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4837} 4838 4839MachineSDNode * 4840SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4841 EVT VT1, EVT VT2, 4842 const SDValue *Ops, unsigned NumOps) { 4843 SDVTList VTs = getVTList(VT1, VT2); 4844 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4845} 4846 4847MachineSDNode * 4848SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4849 EVT VT1, EVT VT2, EVT VT3, 4850 SDValue Op1, SDValue Op2) { 4851 SDVTList VTs = getVTList(VT1, VT2, VT3); 4852 SDValue Ops[] = { Op1, Op2 }; 4853 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4854} 4855 4856MachineSDNode * 4857SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4858 EVT VT1, EVT VT2, EVT VT3, 4859 SDValue Op1, SDValue Op2, SDValue Op3) { 4860 SDVTList VTs = getVTList(VT1, VT2, VT3); 4861 SDValue Ops[] = { Op1, Op2, Op3 }; 4862 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4863} 4864 4865MachineSDNode * 4866SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4867 EVT VT1, EVT VT2, EVT VT3, 4868 const SDValue *Ops, unsigned NumOps) { 4869 SDVTList VTs = getVTList(VT1, VT2, VT3); 4870 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4871} 4872 4873MachineSDNode * 4874SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4875 EVT VT2, EVT VT3, EVT VT4, 4876 const SDValue *Ops, unsigned NumOps) { 4877 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4878 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4879} 4880 4881MachineSDNode * 4882SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4883 const std::vector<EVT> &ResultTys, 4884 const SDValue *Ops, unsigned NumOps) { 4885 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4886 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4887} 4888 4889MachineSDNode * 4890SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4891 const SDValue *Ops, unsigned NumOps) { 4892 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4893 MachineSDNode *N; 4894 void *IP; 4895 4896 if (DoCSE) { 4897 FoldingSetNodeID ID; 4898 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4899 IP = 0; 4900 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4901 return cast<MachineSDNode>(E); 4902 } 4903 4904 // Allocate a new MachineSDNode. 4905 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4906 4907 // Initialize the operands list. 4908 if (NumOps > array_lengthof(N->LocalOperands)) 4909 // We're creating a final node that will live unmorphed for the 4910 // remainder of the current SelectionDAG iteration, so we can allocate 4911 // the operands directly out of a pool with no recycling metadata. 4912 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4913 Ops, NumOps); 4914 else 4915 N->InitOperands(N->LocalOperands, Ops, NumOps); 4916 N->OperandsNeedDelete = false; 4917 4918 if (DoCSE) 4919 CSEMap.InsertNode(N, IP); 4920 4921 AllNodes.push_back(N); 4922#ifndef NDEBUG 4923 VerifyNode(N); 4924#endif 4925 return N; 4926} 4927 4928/// getTargetExtractSubreg - A convenience function for creating 4929/// TargetOpcode::EXTRACT_SUBREG nodes. 4930SDValue 4931SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4932 SDValue Operand) { 4933 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4934 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4935 VT, Operand, SRIdxVal); 4936 return SDValue(Subreg, 0); 4937} 4938 4939/// getTargetInsertSubreg - A convenience function for creating 4940/// TargetOpcode::INSERT_SUBREG nodes. 4941SDValue 4942SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4943 SDValue Operand, SDValue Subreg) { 4944 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4945 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4946 VT, Operand, Subreg, SRIdxVal); 4947 return SDValue(Result, 0); 4948} 4949 4950/// getNodeIfExists - Get the specified node if it's already available, or 4951/// else return NULL. 4952SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4953 const SDValue *Ops, unsigned NumOps) { 4954 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4955 FoldingSetNodeID ID; 4956 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4957 void *IP = 0; 4958 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4959 return E; 4960 } 4961 return NULL; 4962} 4963 4964/// getDbgValue - Creates a SDDbgValue node. 4965/// 4966SDDbgValue * 4967SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4968 DebugLoc DL, unsigned O) { 4969 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4970} 4971 4972SDDbgValue * 4973SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4974 DebugLoc DL, unsigned O) { 4975 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4976} 4977 4978SDDbgValue * 4979SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4980 DebugLoc DL, unsigned O) { 4981 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4982} 4983 4984namespace { 4985 4986/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4987/// pointed to by a use iterator is deleted, increment the use iterator 4988/// so that it doesn't dangle. 4989/// 4990/// This class also manages a "downlink" DAGUpdateListener, to forward 4991/// messages to ReplaceAllUsesWith's callers. 4992/// 4993class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4994 SelectionDAG::DAGUpdateListener *DownLink; 4995 SDNode::use_iterator &UI; 4996 SDNode::use_iterator &UE; 4997 4998 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4999 // Increment the iterator as needed. 5000 while (UI != UE && N == *UI) 5001 ++UI; 5002 5003 // Then forward the message. 5004 if (DownLink) DownLink->NodeDeleted(N, E); 5005 } 5006 5007 virtual void NodeUpdated(SDNode *N) { 5008 // Just forward the message. 5009 if (DownLink) DownLink->NodeUpdated(N); 5010 } 5011 5012public: 5013 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5014 SDNode::use_iterator &ui, 5015 SDNode::use_iterator &ue) 5016 : DownLink(dl), UI(ui), UE(ue) {} 5017}; 5018 5019} 5020 5021/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5022/// This can cause recursive merging of nodes in the DAG. 5023/// 5024/// This version assumes From has a single result value. 5025/// 5026void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5027 DAGUpdateListener *UpdateListener) { 5028 SDNode *From = FromN.getNode(); 5029 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5030 "Cannot replace with this method!"); 5031 assert(From != To.getNode() && "Cannot replace uses of with self"); 5032 5033 // Iterate over all the existing uses of From. New uses will be added 5034 // to the beginning of the use list, which we avoid visiting. 5035 // This specifically avoids visiting uses of From that arise while the 5036 // replacement is happening, because any such uses would be the result 5037 // of CSE: If an existing node looks like From after one of its operands 5038 // is replaced by To, we don't want to replace of all its users with To 5039 // too. See PR3018 for more info. 5040 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5041 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5042 while (UI != UE) { 5043 SDNode *User = *UI; 5044 5045 // This node is about to morph, remove its old self from the CSE maps. 5046 RemoveNodeFromCSEMaps(User); 5047 5048 // A user can appear in a use list multiple times, and when this 5049 // happens the uses are usually next to each other in the list. 5050 // To help reduce the number of CSE recomputations, process all 5051 // the uses of this user that we can find this way. 5052 do { 5053 SDUse &Use = UI.getUse(); 5054 ++UI; 5055 Use.set(To); 5056 } while (UI != UE && *UI == User); 5057 5058 // Now that we have modified User, add it back to the CSE maps. If it 5059 // already exists there, recursively merge the results together. 5060 AddModifiedNodeToCSEMaps(User, &Listener); 5061 } 5062} 5063 5064/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5065/// This can cause recursive merging of nodes in the DAG. 5066/// 5067/// This version assumes that for each value of From, there is a 5068/// corresponding value in To in the same position with the same type. 5069/// 5070void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5071 DAGUpdateListener *UpdateListener) { 5072#ifndef NDEBUG 5073 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5074 assert((!From->hasAnyUseOfValue(i) || 5075 From->getValueType(i) == To->getValueType(i)) && 5076 "Cannot use this version of ReplaceAllUsesWith!"); 5077#endif 5078 5079 // Handle the trivial case. 5080 if (From == To) 5081 return; 5082 5083 // Iterate over just the existing users of From. See the comments in 5084 // the ReplaceAllUsesWith above. 5085 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5086 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5087 while (UI != UE) { 5088 SDNode *User = *UI; 5089 5090 // This node is about to morph, remove its old self from the CSE maps. 5091 RemoveNodeFromCSEMaps(User); 5092 5093 // A user can appear in a use list multiple times, and when this 5094 // happens the uses are usually next to each other in the list. 5095 // To help reduce the number of CSE recomputations, process all 5096 // the uses of this user that we can find this way. 5097 do { 5098 SDUse &Use = UI.getUse(); 5099 ++UI; 5100 Use.setNode(To); 5101 } while (UI != UE && *UI == User); 5102 5103 // Now that we have modified User, add it back to the CSE maps. If it 5104 // already exists there, recursively merge the results together. 5105 AddModifiedNodeToCSEMaps(User, &Listener); 5106 } 5107} 5108 5109/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5110/// This can cause recursive merging of nodes in the DAG. 5111/// 5112/// This version can replace From with any result values. To must match the 5113/// number and types of values returned by From. 5114void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5115 const SDValue *To, 5116 DAGUpdateListener *UpdateListener) { 5117 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5118 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5119 5120 // Iterate over just the existing users of From. See the comments in 5121 // the ReplaceAllUsesWith above. 5122 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5123 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5124 while (UI != UE) { 5125 SDNode *User = *UI; 5126 5127 // This node is about to morph, remove its old self from the CSE maps. 5128 RemoveNodeFromCSEMaps(User); 5129 5130 // A user can appear in a use list multiple times, and when this 5131 // happens the uses are usually next to each other in the list. 5132 // To help reduce the number of CSE recomputations, process all 5133 // the uses of this user that we can find this way. 5134 do { 5135 SDUse &Use = UI.getUse(); 5136 const SDValue &ToOp = To[Use.getResNo()]; 5137 ++UI; 5138 Use.set(ToOp); 5139 } while (UI != UE && *UI == User); 5140 5141 // Now that we have modified User, add it back to the CSE maps. If it 5142 // already exists there, recursively merge the results together. 5143 AddModifiedNodeToCSEMaps(User, &Listener); 5144 } 5145} 5146 5147/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5148/// uses of other values produced by From.getNode() alone. The Deleted 5149/// vector is handled the same way as for ReplaceAllUsesWith. 5150void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5151 DAGUpdateListener *UpdateListener){ 5152 // Handle the really simple, really trivial case efficiently. 5153 if (From == To) return; 5154 5155 // Handle the simple, trivial, case efficiently. 5156 if (From.getNode()->getNumValues() == 1) { 5157 ReplaceAllUsesWith(From, To, UpdateListener); 5158 return; 5159 } 5160 5161 // Iterate over just the existing users of From. See the comments in 5162 // the ReplaceAllUsesWith above. 5163 SDNode::use_iterator UI = From.getNode()->use_begin(), 5164 UE = From.getNode()->use_end(); 5165 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5166 while (UI != UE) { 5167 SDNode *User = *UI; 5168 bool UserRemovedFromCSEMaps = false; 5169 5170 // A user can appear in a use list multiple times, and when this 5171 // happens the uses are usually next to each other in the list. 5172 // To help reduce the number of CSE recomputations, process all 5173 // the uses of this user that we can find this way. 5174 do { 5175 SDUse &Use = UI.getUse(); 5176 5177 // Skip uses of different values from the same node. 5178 if (Use.getResNo() != From.getResNo()) { 5179 ++UI; 5180 continue; 5181 } 5182 5183 // If this node hasn't been modified yet, it's still in the CSE maps, 5184 // so remove its old self from the CSE maps. 5185 if (!UserRemovedFromCSEMaps) { 5186 RemoveNodeFromCSEMaps(User); 5187 UserRemovedFromCSEMaps = true; 5188 } 5189 5190 ++UI; 5191 Use.set(To); 5192 } while (UI != UE && *UI == User); 5193 5194 // We are iterating over all uses of the From node, so if a use 5195 // doesn't use the specific value, no changes are made. 5196 if (!UserRemovedFromCSEMaps) 5197 continue; 5198 5199 // Now that we have modified User, add it back to the CSE maps. If it 5200 // already exists there, recursively merge the results together. 5201 AddModifiedNodeToCSEMaps(User, &Listener); 5202 } 5203} 5204 5205namespace { 5206 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5207 /// to record information about a use. 5208 struct UseMemo { 5209 SDNode *User; 5210 unsigned Index; 5211 SDUse *Use; 5212 }; 5213 5214 /// operator< - Sort Memos by User. 5215 bool operator<(const UseMemo &L, const UseMemo &R) { 5216 return (intptr_t)L.User < (intptr_t)R.User; 5217 } 5218} 5219 5220/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5221/// uses of other values produced by From.getNode() alone. The same value 5222/// may appear in both the From and To list. The Deleted vector is 5223/// handled the same way as for ReplaceAllUsesWith. 5224void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5225 const SDValue *To, 5226 unsigned Num, 5227 DAGUpdateListener *UpdateListener){ 5228 // Handle the simple, trivial case efficiently. 5229 if (Num == 1) 5230 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5231 5232 // Read up all the uses and make records of them. This helps 5233 // processing new uses that are introduced during the 5234 // replacement process. 5235 SmallVector<UseMemo, 4> Uses; 5236 for (unsigned i = 0; i != Num; ++i) { 5237 unsigned FromResNo = From[i].getResNo(); 5238 SDNode *FromNode = From[i].getNode(); 5239 for (SDNode::use_iterator UI = FromNode->use_begin(), 5240 E = FromNode->use_end(); UI != E; ++UI) { 5241 SDUse &Use = UI.getUse(); 5242 if (Use.getResNo() == FromResNo) { 5243 UseMemo Memo = { *UI, i, &Use }; 5244 Uses.push_back(Memo); 5245 } 5246 } 5247 } 5248 5249 // Sort the uses, so that all the uses from a given User are together. 5250 std::sort(Uses.begin(), Uses.end()); 5251 5252 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5253 UseIndex != UseIndexEnd; ) { 5254 // We know that this user uses some value of From. If it is the right 5255 // value, update it. 5256 SDNode *User = Uses[UseIndex].User; 5257 5258 // This node is about to morph, remove its old self from the CSE maps. 5259 RemoveNodeFromCSEMaps(User); 5260 5261 // The Uses array is sorted, so all the uses for a given User 5262 // are next to each other in the list. 5263 // To help reduce the number of CSE recomputations, process all 5264 // the uses of this user that we can find this way. 5265 do { 5266 unsigned i = Uses[UseIndex].Index; 5267 SDUse &Use = *Uses[UseIndex].Use; 5268 ++UseIndex; 5269 5270 Use.set(To[i]); 5271 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5272 5273 // Now that we have modified User, add it back to the CSE maps. If it 5274 // already exists there, recursively merge the results together. 5275 AddModifiedNodeToCSEMaps(User, UpdateListener); 5276 } 5277} 5278 5279/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5280/// based on their topological order. It returns the maximum id and a vector 5281/// of the SDNodes* in assigned order by reference. 5282unsigned SelectionDAG::AssignTopologicalOrder() { 5283 5284 unsigned DAGSize = 0; 5285 5286 // SortedPos tracks the progress of the algorithm. Nodes before it are 5287 // sorted, nodes after it are unsorted. When the algorithm completes 5288 // it is at the end of the list. 5289 allnodes_iterator SortedPos = allnodes_begin(); 5290 5291 // Visit all the nodes. Move nodes with no operands to the front of 5292 // the list immediately. Annotate nodes that do have operands with their 5293 // operand count. Before we do this, the Node Id fields of the nodes 5294 // may contain arbitrary values. After, the Node Id fields for nodes 5295 // before SortedPos will contain the topological sort index, and the 5296 // Node Id fields for nodes At SortedPos and after will contain the 5297 // count of outstanding operands. 5298 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5299 SDNode *N = I++; 5300 checkForCycles(N); 5301 unsigned Degree = N->getNumOperands(); 5302 if (Degree == 0) { 5303 // A node with no uses, add it to the result array immediately. 5304 N->setNodeId(DAGSize++); 5305 allnodes_iterator Q = N; 5306 if (Q != SortedPos) 5307 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5308 assert(SortedPos != AllNodes.end() && "Overran node list"); 5309 ++SortedPos; 5310 } else { 5311 // Temporarily use the Node Id as scratch space for the degree count. 5312 N->setNodeId(Degree); 5313 } 5314 } 5315 5316 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5317 // such that by the time the end is reached all nodes will be sorted. 5318 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5319 SDNode *N = I; 5320 checkForCycles(N); 5321 // N is in sorted position, so all its uses have one less operand 5322 // that needs to be sorted. 5323 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5324 UI != UE; ++UI) { 5325 SDNode *P = *UI; 5326 unsigned Degree = P->getNodeId(); 5327 assert(Degree != 0 && "Invalid node degree"); 5328 --Degree; 5329 if (Degree == 0) { 5330 // All of P's operands are sorted, so P may sorted now. 5331 P->setNodeId(DAGSize++); 5332 if (P != SortedPos) 5333 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5334 assert(SortedPos != AllNodes.end() && "Overran node list"); 5335 ++SortedPos; 5336 } else { 5337 // Update P's outstanding operand count. 5338 P->setNodeId(Degree); 5339 } 5340 } 5341 if (I == SortedPos) { 5342#ifndef NDEBUG 5343 SDNode *S = ++I; 5344 dbgs() << "Overran sorted position:\n"; 5345 S->dumprFull(); 5346#endif 5347 llvm_unreachable(0); 5348 } 5349 } 5350 5351 assert(SortedPos == AllNodes.end() && 5352 "Topological sort incomplete!"); 5353 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5354 "First node in topological sort is not the entry token!"); 5355 assert(AllNodes.front().getNodeId() == 0 && 5356 "First node in topological sort has non-zero id!"); 5357 assert(AllNodes.front().getNumOperands() == 0 && 5358 "First node in topological sort has operands!"); 5359 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5360 "Last node in topologic sort has unexpected id!"); 5361 assert(AllNodes.back().use_empty() && 5362 "Last node in topologic sort has users!"); 5363 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5364 return DAGSize; 5365} 5366 5367/// AssignOrdering - Assign an order to the SDNode. 5368void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5369 assert(SD && "Trying to assign an order to a null node!"); 5370 Ordering->add(SD, Order); 5371} 5372 5373/// GetOrdering - Get the order for the SDNode. 5374unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5375 assert(SD && "Trying to get the order of a null node!"); 5376 return Ordering->getOrder(SD); 5377} 5378 5379/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5380/// value is produced by SD. 5381void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5382 DbgInfo->add(DB, SD, isParameter); 5383 if (SD) 5384 SD->setHasDebugValue(true); 5385} 5386 5387//===----------------------------------------------------------------------===// 5388// SDNode Class 5389//===----------------------------------------------------------------------===// 5390 5391HandleSDNode::~HandleSDNode() { 5392 DropOperands(); 5393} 5394 5395GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5396 EVT VT, int64_t o, unsigned char TF) 5397 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5398 TheGlobal = GA; 5399} 5400 5401MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5402 MachineMemOperand *mmo) 5403 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5404 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5405 MMO->isNonTemporal()); 5406 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5407 assert(isNonTemporal() == MMO->isNonTemporal() && 5408 "Non-temporal encoding error!"); 5409 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5410} 5411 5412MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5413 const SDValue *Ops, unsigned NumOps, EVT memvt, 5414 MachineMemOperand *mmo) 5415 : SDNode(Opc, dl, VTs, Ops, NumOps), 5416 MemoryVT(memvt), MMO(mmo) { 5417 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5418 MMO->isNonTemporal()); 5419 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5420 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5421} 5422 5423/// Profile - Gather unique data for the node. 5424/// 5425void SDNode::Profile(FoldingSetNodeID &ID) const { 5426 AddNodeIDNode(ID, this); 5427} 5428 5429namespace { 5430 struct EVTArray { 5431 std::vector<EVT> VTs; 5432 5433 EVTArray() { 5434 VTs.reserve(MVT::LAST_VALUETYPE); 5435 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5436 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5437 } 5438 }; 5439} 5440 5441static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5442static ManagedStatic<EVTArray> SimpleVTArray; 5443static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5444 5445/// getValueTypeList - Return a pointer to the specified value type. 5446/// 5447const EVT *SDNode::getValueTypeList(EVT VT) { 5448 if (VT.isExtended()) { 5449 sys::SmartScopedLock<true> Lock(*VTMutex); 5450 return &(*EVTs->insert(VT).first); 5451 } else { 5452 assert(VT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE && 5453 "Value type out of range!"); 5454 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5455 } 5456} 5457 5458/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5459/// indicated value. This method ignores uses of other values defined by this 5460/// operation. 5461bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5462 assert(Value < getNumValues() && "Bad value!"); 5463 5464 // TODO: Only iterate over uses of a given value of the node 5465 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5466 if (UI.getUse().getResNo() == Value) { 5467 if (NUses == 0) 5468 return false; 5469 --NUses; 5470 } 5471 } 5472 5473 // Found exactly the right number of uses? 5474 return NUses == 0; 5475} 5476 5477 5478/// hasAnyUseOfValue - Return true if there are any use of the indicated 5479/// value. This method ignores uses of other values defined by this operation. 5480bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5481 assert(Value < getNumValues() && "Bad value!"); 5482 5483 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5484 if (UI.getUse().getResNo() == Value) 5485 return true; 5486 5487 return false; 5488} 5489 5490 5491/// isOnlyUserOf - Return true if this node is the only use of N. 5492/// 5493bool SDNode::isOnlyUserOf(SDNode *N) const { 5494 bool Seen = false; 5495 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5496 SDNode *User = *I; 5497 if (User == this) 5498 Seen = true; 5499 else 5500 return false; 5501 } 5502 5503 return Seen; 5504} 5505 5506/// isOperand - Return true if this node is an operand of N. 5507/// 5508bool SDValue::isOperandOf(SDNode *N) const { 5509 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5510 if (*this == N->getOperand(i)) 5511 return true; 5512 return false; 5513} 5514 5515bool SDNode::isOperandOf(SDNode *N) const { 5516 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5517 if (this == N->OperandList[i].getNode()) 5518 return true; 5519 return false; 5520} 5521 5522/// reachesChainWithoutSideEffects - Return true if this operand (which must 5523/// be a chain) reaches the specified operand without crossing any 5524/// side-effecting instructions. In practice, this looks through token 5525/// factors and non-volatile loads. In order to remain efficient, this only 5526/// looks a couple of nodes in, it does not do an exhaustive search. 5527bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5528 unsigned Depth) const { 5529 if (*this == Dest) return true; 5530 5531 // Don't search too deeply, we just want to be able to see through 5532 // TokenFactor's etc. 5533 if (Depth == 0) return false; 5534 5535 // If this is a token factor, all inputs to the TF happen in parallel. If any 5536 // of the operands of the TF reach dest, then we can do the xform. 5537 if (getOpcode() == ISD::TokenFactor) { 5538 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5539 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5540 return true; 5541 return false; 5542 } 5543 5544 // Loads don't have side effects, look through them. 5545 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5546 if (!Ld->isVolatile()) 5547 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5548 } 5549 return false; 5550} 5551 5552/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5553/// is either an operand of N or it can be reached by traversing up the operands. 5554/// NOTE: this is an expensive method. Use it carefully. 5555bool SDNode::isPredecessorOf(SDNode *N) const { 5556 SmallPtrSet<SDNode *, 32> Visited; 5557 SmallVector<SDNode *, 16> Worklist; 5558 Worklist.push_back(N); 5559 5560 do { 5561 N = Worklist.pop_back_val(); 5562 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5563 SDNode *Op = N->getOperand(i).getNode(); 5564 if (Op == this) 5565 return true; 5566 if (Visited.insert(Op)) 5567 Worklist.push_back(Op); 5568 } 5569 } while (!Worklist.empty()); 5570 5571 return false; 5572} 5573 5574uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5575 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5576 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5577} 5578 5579std::string SDNode::getOperationName(const SelectionDAG *G) const { 5580 switch (getOpcode()) { 5581 default: 5582 if (getOpcode() < ISD::BUILTIN_OP_END) 5583 return "<<Unknown DAG Node>>"; 5584 if (isMachineOpcode()) { 5585 if (G) 5586 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5587 if (getMachineOpcode() < TII->getNumOpcodes()) 5588 return TII->get(getMachineOpcode()).getName(); 5589 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5590 } 5591 if (G) { 5592 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5593 const char *Name = TLI.getTargetNodeName(getOpcode()); 5594 if (Name) return Name; 5595 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5596 } 5597 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5598 5599#ifndef NDEBUG 5600 case ISD::DELETED_NODE: 5601 return "<<Deleted Node!>>"; 5602#endif 5603 case ISD::PREFETCH: return "Prefetch"; 5604 case ISD::MEMBARRIER: return "MemBarrier"; 5605 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5606 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5607 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5608 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5609 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5610 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5611 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5612 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5613 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5614 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5615 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5616 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5617 case ISD::PCMARKER: return "PCMarker"; 5618 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5619 case ISD::SRCVALUE: return "SrcValue"; 5620 case ISD::MDNODE_SDNODE: return "MDNode"; 5621 case ISD::EntryToken: return "EntryToken"; 5622 case ISD::TokenFactor: return "TokenFactor"; 5623 case ISD::AssertSext: return "AssertSext"; 5624 case ISD::AssertZext: return "AssertZext"; 5625 5626 case ISD::BasicBlock: return "BasicBlock"; 5627 case ISD::VALUETYPE: return "ValueType"; 5628 case ISD::Register: return "Register"; 5629 5630 case ISD::Constant: return "Constant"; 5631 case ISD::ConstantFP: return "ConstantFP"; 5632 case ISD::GlobalAddress: return "GlobalAddress"; 5633 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5634 case ISD::FrameIndex: return "FrameIndex"; 5635 case ISD::JumpTable: return "JumpTable"; 5636 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5637 case ISD::RETURNADDR: return "RETURNADDR"; 5638 case ISD::FRAMEADDR: return "FRAMEADDR"; 5639 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5640 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5641 case ISD::LSDAADDR: return "LSDAADDR"; 5642 case ISD::EHSELECTION: return "EHSELECTION"; 5643 case ISD::EH_RETURN: return "EH_RETURN"; 5644 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5645 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5646 case ISD::ConstantPool: return "ConstantPool"; 5647 case ISD::ExternalSymbol: return "ExternalSymbol"; 5648 case ISD::BlockAddress: return "BlockAddress"; 5649 case ISD::INTRINSIC_WO_CHAIN: 5650 case ISD::INTRINSIC_VOID: 5651 case ISD::INTRINSIC_W_CHAIN: { 5652 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5653 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5654 if (IID < Intrinsic::num_intrinsics) 5655 return Intrinsic::getName((Intrinsic::ID)IID); 5656 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5657 return TII->getName(IID); 5658 llvm_unreachable("Invalid intrinsic ID"); 5659 } 5660 5661 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5662 case ISD::TargetConstant: return "TargetConstant"; 5663 case ISD::TargetConstantFP:return "TargetConstantFP"; 5664 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5665 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5666 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5667 case ISD::TargetJumpTable: return "TargetJumpTable"; 5668 case ISD::TargetConstantPool: return "TargetConstantPool"; 5669 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5670 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5671 5672 case ISD::CopyToReg: return "CopyToReg"; 5673 case ISD::CopyFromReg: return "CopyFromReg"; 5674 case ISD::UNDEF: return "undef"; 5675 case ISD::MERGE_VALUES: return "merge_values"; 5676 case ISD::INLINEASM: return "inlineasm"; 5677 case ISD::EH_LABEL: return "eh_label"; 5678 case ISD::HANDLENODE: return "handlenode"; 5679 5680 // Unary operators 5681 case ISD::FABS: return "fabs"; 5682 case ISD::FNEG: return "fneg"; 5683 case ISD::FSQRT: return "fsqrt"; 5684 case ISD::FSIN: return "fsin"; 5685 case ISD::FCOS: return "fcos"; 5686 case ISD::FTRUNC: return "ftrunc"; 5687 case ISD::FFLOOR: return "ffloor"; 5688 case ISD::FCEIL: return "fceil"; 5689 case ISD::FRINT: return "frint"; 5690 case ISD::FNEARBYINT: return "fnearbyint"; 5691 case ISD::FEXP: return "fexp"; 5692 case ISD::FEXP2: return "fexp2"; 5693 case ISD::FLOG: return "flog"; 5694 case ISD::FLOG2: return "flog2"; 5695 case ISD::FLOG10: return "flog10"; 5696 5697 // Binary operators 5698 case ISD::ADD: return "add"; 5699 case ISD::SUB: return "sub"; 5700 case ISD::MUL: return "mul"; 5701 case ISD::MULHU: return "mulhu"; 5702 case ISD::MULHS: return "mulhs"; 5703 case ISD::SDIV: return "sdiv"; 5704 case ISD::UDIV: return "udiv"; 5705 case ISD::SREM: return "srem"; 5706 case ISD::UREM: return "urem"; 5707 case ISD::SMUL_LOHI: return "smul_lohi"; 5708 case ISD::UMUL_LOHI: return "umul_lohi"; 5709 case ISD::SDIVREM: return "sdivrem"; 5710 case ISD::UDIVREM: return "udivrem"; 5711 case ISD::AND: return "and"; 5712 case ISD::OR: return "or"; 5713 case ISD::XOR: return "xor"; 5714 case ISD::SHL: return "shl"; 5715 case ISD::SRA: return "sra"; 5716 case ISD::SRL: return "srl"; 5717 case ISD::ROTL: return "rotl"; 5718 case ISD::ROTR: return "rotr"; 5719 case ISD::FADD: return "fadd"; 5720 case ISD::FSUB: return "fsub"; 5721 case ISD::FMUL: return "fmul"; 5722 case ISD::FDIV: return "fdiv"; 5723 case ISD::FREM: return "frem"; 5724 case ISD::FCOPYSIGN: return "fcopysign"; 5725 case ISD::FGETSIGN: return "fgetsign"; 5726 case ISD::FPOW: return "fpow"; 5727 5728 case ISD::FPOWI: return "fpowi"; 5729 case ISD::SETCC: return "setcc"; 5730 case ISD::VSETCC: return "vsetcc"; 5731 case ISD::SELECT: return "select"; 5732 case ISD::SELECT_CC: return "select_cc"; 5733 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5734 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5735 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5736 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5737 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5738 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5739 case ISD::CARRY_FALSE: return "carry_false"; 5740 case ISD::ADDC: return "addc"; 5741 case ISD::ADDE: return "adde"; 5742 case ISD::SADDO: return "saddo"; 5743 case ISD::UADDO: return "uaddo"; 5744 case ISD::SSUBO: return "ssubo"; 5745 case ISD::USUBO: return "usubo"; 5746 case ISD::SMULO: return "smulo"; 5747 case ISD::UMULO: return "umulo"; 5748 case ISD::SUBC: return "subc"; 5749 case ISD::SUBE: return "sube"; 5750 case ISD::SHL_PARTS: return "shl_parts"; 5751 case ISD::SRA_PARTS: return "sra_parts"; 5752 case ISD::SRL_PARTS: return "srl_parts"; 5753 5754 // Conversion operators. 5755 case ISD::SIGN_EXTEND: return "sign_extend"; 5756 case ISD::ZERO_EXTEND: return "zero_extend"; 5757 case ISD::ANY_EXTEND: return "any_extend"; 5758 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5759 case ISD::TRUNCATE: return "truncate"; 5760 case ISD::FP_ROUND: return "fp_round"; 5761 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5762 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5763 case ISD::FP_EXTEND: return "fp_extend"; 5764 5765 case ISD::SINT_TO_FP: return "sint_to_fp"; 5766 case ISD::UINT_TO_FP: return "uint_to_fp"; 5767 case ISD::FP_TO_SINT: return "fp_to_sint"; 5768 case ISD::FP_TO_UINT: return "fp_to_uint"; 5769 case ISD::BIT_CONVERT: return "bit_convert"; 5770 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5771 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5772 5773 case ISD::CONVERT_RNDSAT: { 5774 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5775 default: llvm_unreachable("Unknown cvt code!"); 5776 case ISD::CVT_FF: return "cvt_ff"; 5777 case ISD::CVT_FS: return "cvt_fs"; 5778 case ISD::CVT_FU: return "cvt_fu"; 5779 case ISD::CVT_SF: return "cvt_sf"; 5780 case ISD::CVT_UF: return "cvt_uf"; 5781 case ISD::CVT_SS: return "cvt_ss"; 5782 case ISD::CVT_SU: return "cvt_su"; 5783 case ISD::CVT_US: return "cvt_us"; 5784 case ISD::CVT_UU: return "cvt_uu"; 5785 } 5786 } 5787 5788 // Control flow instructions 5789 case ISD::BR: return "br"; 5790 case ISD::BRIND: return "brind"; 5791 case ISD::BR_JT: return "br_jt"; 5792 case ISD::BRCOND: return "brcond"; 5793 case ISD::BR_CC: return "br_cc"; 5794 case ISD::CALLSEQ_START: return "callseq_start"; 5795 case ISD::CALLSEQ_END: return "callseq_end"; 5796 5797 // Other operators 5798 case ISD::LOAD: return "load"; 5799 case ISD::STORE: return "store"; 5800 case ISD::VAARG: return "vaarg"; 5801 case ISD::VACOPY: return "vacopy"; 5802 case ISD::VAEND: return "vaend"; 5803 case ISD::VASTART: return "vastart"; 5804 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5805 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5806 case ISD::BUILD_PAIR: return "build_pair"; 5807 case ISD::STACKSAVE: return "stacksave"; 5808 case ISD::STACKRESTORE: return "stackrestore"; 5809 case ISD::TRAP: return "trap"; 5810 5811 // Bit manipulation 5812 case ISD::BSWAP: return "bswap"; 5813 case ISD::CTPOP: return "ctpop"; 5814 case ISD::CTTZ: return "cttz"; 5815 case ISD::CTLZ: return "ctlz"; 5816 5817 // Trampolines 5818 case ISD::TRAMPOLINE: return "trampoline"; 5819 5820 case ISD::CONDCODE: 5821 switch (cast<CondCodeSDNode>(this)->get()) { 5822 default: llvm_unreachable("Unknown setcc condition!"); 5823 case ISD::SETOEQ: return "setoeq"; 5824 case ISD::SETOGT: return "setogt"; 5825 case ISD::SETOGE: return "setoge"; 5826 case ISD::SETOLT: return "setolt"; 5827 case ISD::SETOLE: return "setole"; 5828 case ISD::SETONE: return "setone"; 5829 5830 case ISD::SETO: return "seto"; 5831 case ISD::SETUO: return "setuo"; 5832 case ISD::SETUEQ: return "setue"; 5833 case ISD::SETUGT: return "setugt"; 5834 case ISD::SETUGE: return "setuge"; 5835 case ISD::SETULT: return "setult"; 5836 case ISD::SETULE: return "setule"; 5837 case ISD::SETUNE: return "setune"; 5838 5839 case ISD::SETEQ: return "seteq"; 5840 case ISD::SETGT: return "setgt"; 5841 case ISD::SETGE: return "setge"; 5842 case ISD::SETLT: return "setlt"; 5843 case ISD::SETLE: return "setle"; 5844 case ISD::SETNE: return "setne"; 5845 } 5846 } 5847} 5848 5849const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5850 switch (AM) { 5851 default: 5852 return ""; 5853 case ISD::PRE_INC: 5854 return "<pre-inc>"; 5855 case ISD::PRE_DEC: 5856 return "<pre-dec>"; 5857 case ISD::POST_INC: 5858 return "<post-inc>"; 5859 case ISD::POST_DEC: 5860 return "<post-dec>"; 5861 } 5862} 5863 5864std::string ISD::ArgFlagsTy::getArgFlagsString() { 5865 std::string S = "< "; 5866 5867 if (isZExt()) 5868 S += "zext "; 5869 if (isSExt()) 5870 S += "sext "; 5871 if (isInReg()) 5872 S += "inreg "; 5873 if (isSRet()) 5874 S += "sret "; 5875 if (isByVal()) 5876 S += "byval "; 5877 if (isNest()) 5878 S += "nest "; 5879 if (getByValAlign()) 5880 S += "byval-align:" + utostr(getByValAlign()) + " "; 5881 if (getOrigAlign()) 5882 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5883 if (getByValSize()) 5884 S += "byval-size:" + utostr(getByValSize()) + " "; 5885 return S + ">"; 5886} 5887 5888void SDNode::dump() const { dump(0); } 5889void SDNode::dump(const SelectionDAG *G) const { 5890 print(dbgs(), G); 5891} 5892 5893void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5894 OS << (void*)this << ": "; 5895 5896 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5897 if (i) OS << ","; 5898 if (getValueType(i) == MVT::Other) 5899 OS << "ch"; 5900 else 5901 OS << getValueType(i).getEVTString(); 5902 } 5903 OS << " = " << getOperationName(G); 5904} 5905 5906void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5907 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5908 if (!MN->memoperands_empty()) { 5909 OS << "<"; 5910 OS << "Mem:"; 5911 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5912 e = MN->memoperands_end(); i != e; ++i) { 5913 OS << **i; 5914 if (next(i) != e) 5915 OS << " "; 5916 } 5917 OS << ">"; 5918 } 5919 } else if (const ShuffleVectorSDNode *SVN = 5920 dyn_cast<ShuffleVectorSDNode>(this)) { 5921 OS << "<"; 5922 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5923 int Idx = SVN->getMaskElt(i); 5924 if (i) OS << ","; 5925 if (Idx < 0) 5926 OS << "u"; 5927 else 5928 OS << Idx; 5929 } 5930 OS << ">"; 5931 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5932 OS << '<' << CSDN->getAPIntValue() << '>'; 5933 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5934 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5935 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5936 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5937 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5938 else { 5939 OS << "<APFloat("; 5940 CSDN->getValueAPF().bitcastToAPInt().dump(); 5941 OS << ")>"; 5942 } 5943 } else if (const GlobalAddressSDNode *GADN = 5944 dyn_cast<GlobalAddressSDNode>(this)) { 5945 int64_t offset = GADN->getOffset(); 5946 OS << '<'; 5947 WriteAsOperand(OS, GADN->getGlobal()); 5948 OS << '>'; 5949 if (offset > 0) 5950 OS << " + " << offset; 5951 else 5952 OS << " " << offset; 5953 if (unsigned int TF = GADN->getTargetFlags()) 5954 OS << " [TF=" << TF << ']'; 5955 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5956 OS << "<" << FIDN->getIndex() << ">"; 5957 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5958 OS << "<" << JTDN->getIndex() << ">"; 5959 if (unsigned int TF = JTDN->getTargetFlags()) 5960 OS << " [TF=" << TF << ']'; 5961 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5962 int offset = CP->getOffset(); 5963 if (CP->isMachineConstantPoolEntry()) 5964 OS << "<" << *CP->getMachineCPVal() << ">"; 5965 else 5966 OS << "<" << *CP->getConstVal() << ">"; 5967 if (offset > 0) 5968 OS << " + " << offset; 5969 else 5970 OS << " " << offset; 5971 if (unsigned int TF = CP->getTargetFlags()) 5972 OS << " [TF=" << TF << ']'; 5973 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5974 OS << "<"; 5975 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5976 if (LBB) 5977 OS << LBB->getName() << " "; 5978 OS << (const void*)BBDN->getBasicBlock() << ">"; 5979 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5980 if (G && R->getReg() && 5981 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5982 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5983 } else { 5984 OS << " %reg" << R->getReg(); 5985 } 5986 } else if (const ExternalSymbolSDNode *ES = 5987 dyn_cast<ExternalSymbolSDNode>(this)) { 5988 OS << "'" << ES->getSymbol() << "'"; 5989 if (unsigned int TF = ES->getTargetFlags()) 5990 OS << " [TF=" << TF << ']'; 5991 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5992 if (M->getValue()) 5993 OS << "<" << M->getValue() << ">"; 5994 else 5995 OS << "<null>"; 5996 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5997 if (MD->getMD()) 5998 OS << "<" << MD->getMD() << ">"; 5999 else 6000 OS << "<null>"; 6001 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 6002 OS << ":" << N->getVT().getEVTString(); 6003 } 6004 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 6005 OS << "<" << *LD->getMemOperand(); 6006 6007 bool doExt = true; 6008 switch (LD->getExtensionType()) { 6009 default: doExt = false; break; 6010 case ISD::EXTLOAD: OS << ", anyext"; break; 6011 case ISD::SEXTLOAD: OS << ", sext"; break; 6012 case ISD::ZEXTLOAD: OS << ", zext"; break; 6013 } 6014 if (doExt) 6015 OS << " from " << LD->getMemoryVT().getEVTString(); 6016 6017 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6018 if (*AM) 6019 OS << ", " << AM; 6020 6021 OS << ">"; 6022 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6023 OS << "<" << *ST->getMemOperand(); 6024 6025 if (ST->isTruncatingStore()) 6026 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6027 6028 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6029 if (*AM) 6030 OS << ", " << AM; 6031 6032 OS << ">"; 6033 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6034 OS << "<" << *M->getMemOperand() << ">"; 6035 } else if (const BlockAddressSDNode *BA = 6036 dyn_cast<BlockAddressSDNode>(this)) { 6037 OS << "<"; 6038 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6039 OS << ", "; 6040 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6041 OS << ">"; 6042 if (unsigned int TF = BA->getTargetFlags()) 6043 OS << " [TF=" << TF << ']'; 6044 } 6045 6046 if (G) 6047 if (unsigned Order = G->GetOrdering(this)) 6048 OS << " [ORD=" << Order << ']'; 6049 6050 if (getNodeId() != -1) 6051 OS << " [ID=" << getNodeId() << ']'; 6052 6053 DebugLoc dl = getDebugLoc(); 6054 if (G && !dl.isUnknown()) { 6055 DIScope 6056 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6057 OS << " dbg:"; 6058 // Omit the directory, since it's usually long and uninteresting. 6059 if (Scope.Verify()) 6060 OS << Scope.getFilename(); 6061 else 6062 OS << "<unknown>"; 6063 OS << ':' << dl.getLine(); 6064 if (dl.getCol() != 0) 6065 OS << ':' << dl.getCol(); 6066 } 6067} 6068 6069void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6070 print_types(OS, G); 6071 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6072 if (i) OS << ", "; else OS << " "; 6073 OS << (void*)getOperand(i).getNode(); 6074 if (unsigned RN = getOperand(i).getResNo()) 6075 OS << ":" << RN; 6076 } 6077 print_details(OS, G); 6078} 6079 6080static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6081 const SelectionDAG *G, unsigned depth, 6082 unsigned indent) 6083{ 6084 if (depth == 0) 6085 return; 6086 6087 OS.indent(indent); 6088 6089 N->print(OS, G); 6090 6091 if (depth < 1) 6092 return; 6093 6094 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6095 OS << '\n'; 6096 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6097 } 6098} 6099 6100void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6101 unsigned depth) const { 6102 printrWithDepthHelper(OS, this, G, depth, 0); 6103} 6104 6105void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6106 // Don't print impossibly deep things. 6107 printrWithDepth(OS, G, 100); 6108} 6109 6110void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6111 printrWithDepth(dbgs(), G, depth); 6112} 6113 6114void SDNode::dumprFull(const SelectionDAG *G) const { 6115 // Don't print impossibly deep things. 6116 dumprWithDepth(G, 100); 6117} 6118 6119static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6120 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6121 if (N->getOperand(i).getNode()->hasOneUse()) 6122 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6123 else 6124 dbgs() << "\n" << std::string(indent+2, ' ') 6125 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6126 6127 6128 dbgs() << "\n"; 6129 dbgs().indent(indent); 6130 N->dump(G); 6131} 6132 6133SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6134 assert(N->getNumValues() == 1 && 6135 "Can't unroll a vector with multiple results!"); 6136 6137 EVT VT = N->getValueType(0); 6138 unsigned NE = VT.getVectorNumElements(); 6139 EVT EltVT = VT.getVectorElementType(); 6140 DebugLoc dl = N->getDebugLoc(); 6141 6142 SmallVector<SDValue, 8> Scalars; 6143 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6144 6145 // If ResNE is 0, fully unroll the vector op. 6146 if (ResNE == 0) 6147 ResNE = NE; 6148 else if (NE > ResNE) 6149 NE = ResNE; 6150 6151 unsigned i; 6152 for (i= 0; i != NE; ++i) { 6153 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6154 SDValue Operand = N->getOperand(j); 6155 EVT OperandVT = Operand.getValueType(); 6156 if (OperandVT.isVector()) { 6157 // A vector operand; extract a single element. 6158 EVT OperandEltVT = OperandVT.getVectorElementType(); 6159 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6160 OperandEltVT, 6161 Operand, 6162 getConstant(i, MVT::i32)); 6163 } else { 6164 // A scalar operand; just use it as is. 6165 Operands[j] = Operand; 6166 } 6167 } 6168 6169 switch (N->getOpcode()) { 6170 default: 6171 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6172 &Operands[0], Operands.size())); 6173 break; 6174 case ISD::SHL: 6175 case ISD::SRA: 6176 case ISD::SRL: 6177 case ISD::ROTL: 6178 case ISD::ROTR: 6179 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6180 getShiftAmountOperand(Operands[1]))); 6181 break; 6182 case ISD::SIGN_EXTEND_INREG: 6183 case ISD::FP_ROUND_INREG: { 6184 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6185 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6186 Operands[0], 6187 getValueType(ExtVT))); 6188 } 6189 } 6190 } 6191 6192 for (; i < ResNE; ++i) 6193 Scalars.push_back(getUNDEF(EltVT)); 6194 6195 return getNode(ISD::BUILD_VECTOR, dl, 6196 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6197 &Scalars[0], Scalars.size()); 6198} 6199 6200 6201/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6202/// location that is 'Dist' units away from the location that the 'Base' load 6203/// is loading from. 6204bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6205 unsigned Bytes, int Dist) const { 6206 if (LD->getChain() != Base->getChain()) 6207 return false; 6208 EVT VT = LD->getValueType(0); 6209 if (VT.getSizeInBits() / 8 != Bytes) 6210 return false; 6211 6212 SDValue Loc = LD->getOperand(1); 6213 SDValue BaseLoc = Base->getOperand(1); 6214 if (Loc.getOpcode() == ISD::FrameIndex) { 6215 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6216 return false; 6217 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6218 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6219 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6220 int FS = MFI->getObjectSize(FI); 6221 int BFS = MFI->getObjectSize(BFI); 6222 if (FS != BFS || FS != (int)Bytes) return false; 6223 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6224 } 6225 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6226 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6227 if (V && (V->getSExtValue() == Dist*Bytes)) 6228 return true; 6229 } 6230 6231 const GlobalValue *GV1 = NULL; 6232 const GlobalValue *GV2 = NULL; 6233 int64_t Offset1 = 0; 6234 int64_t Offset2 = 0; 6235 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6236 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6237 if (isGA1 && isGA2 && GV1 == GV2) 6238 return Offset1 == (Offset2 + Dist*Bytes); 6239 return false; 6240} 6241 6242 6243/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6244/// it cannot be inferred. 6245unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6246 // If this is a GlobalAddress + cst, return the alignment. 6247 const GlobalValue *GV; 6248 int64_t GVOffset = 0; 6249 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6250 // If GV has specified alignment, then use it. Otherwise, use the preferred 6251 // alignment. 6252 unsigned Align = GV->getAlignment(); 6253 if (!Align) { 6254 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6255 if (GVar->hasInitializer()) { 6256 const TargetData *TD = TLI.getTargetData(); 6257 Align = TD->getPreferredAlignment(GVar); 6258 } 6259 } 6260 } 6261 return MinAlign(Align, GVOffset); 6262 } 6263 6264 // If this is a direct reference to a stack slot, use information about the 6265 // stack slot's alignment. 6266 int FrameIdx = 1 << 31; 6267 int64_t FrameOffset = 0; 6268 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6269 FrameIdx = FI->getIndex(); 6270 } else if (Ptr.getOpcode() == ISD::ADD && 6271 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6272 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6273 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6274 FrameOffset = Ptr.getConstantOperandVal(1); 6275 } 6276 6277 if (FrameIdx != (1 << 31)) { 6278 // FIXME: Handle FI+CST. 6279 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6280 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6281 FrameOffset); 6282 if (MFI.isFixedObjectIndex(FrameIdx)) { 6283 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6284 6285 // The alignment of the frame index can be determined from its offset from 6286 // the incoming frame position. If the frame object is at offset 32 and 6287 // the stack is guaranteed to be 16-byte aligned, then we know that the 6288 // object is 16-byte aligned. 6289 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6290 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6291 6292 // Finally, the frame object itself may have a known alignment. Factor 6293 // the alignment + offset into a new alignment. For example, if we know 6294 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6295 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6296 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6297 return std::max(Align, FIInfoAlign); 6298 } 6299 return FIInfoAlign; 6300 } 6301 6302 return 0; 6303} 6304 6305void SelectionDAG::dump() const { 6306 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6307 6308 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6309 I != E; ++I) { 6310 const SDNode *N = I; 6311 if (!N->hasOneUse() && N != getRoot().getNode()) 6312 DumpNodes(N, 2, this); 6313 } 6314 6315 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6316 6317 dbgs() << "\n\n"; 6318} 6319 6320void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6321 print_types(OS, G); 6322 print_details(OS, G); 6323} 6324 6325typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6326static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6327 const SelectionDAG *G, VisitedSDNodeSet &once) { 6328 if (!once.insert(N)) // If we've been here before, return now. 6329 return; 6330 6331 // Dump the current SDNode, but don't end the line yet. 6332 OS << std::string(indent, ' '); 6333 N->printr(OS, G); 6334 6335 // Having printed this SDNode, walk the children: 6336 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6337 const SDNode *child = N->getOperand(i).getNode(); 6338 6339 if (i) OS << ","; 6340 OS << " "; 6341 6342 if (child->getNumOperands() == 0) { 6343 // This child has no grandchildren; print it inline right here. 6344 child->printr(OS, G); 6345 once.insert(child); 6346 } else { // Just the address. FIXME: also print the child's opcode. 6347 OS << (void*)child; 6348 if (unsigned RN = N->getOperand(i).getResNo()) 6349 OS << ":" << RN; 6350 } 6351 } 6352 6353 OS << "\n"; 6354 6355 // Dump children that have grandchildren on their own line(s). 6356 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6357 const SDNode *child = N->getOperand(i).getNode(); 6358 DumpNodesr(OS, child, indent+2, G, once); 6359 } 6360} 6361 6362void SDNode::dumpr() const { 6363 VisitedSDNodeSet once; 6364 DumpNodesr(dbgs(), this, 0, 0, once); 6365} 6366 6367void SDNode::dumpr(const SelectionDAG *G) const { 6368 VisitedSDNodeSet once; 6369 DumpNodesr(dbgs(), this, 0, G, once); 6370} 6371 6372 6373// getAddressSpace - Return the address space this GlobalAddress belongs to. 6374unsigned GlobalAddressSDNode::getAddressSpace() const { 6375 return getGlobal()->getType()->getAddressSpace(); 6376} 6377 6378 6379const Type *ConstantPoolSDNode::getType() const { 6380 if (isMachineConstantPoolEntry()) 6381 return Val.MachineCPVal->getType(); 6382 return Val.ConstVal->getType(); 6383} 6384 6385bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6386 APInt &SplatUndef, 6387 unsigned &SplatBitSize, 6388 bool &HasAnyUndefs, 6389 unsigned MinSplatBits, 6390 bool isBigEndian) { 6391 EVT VT = getValueType(0); 6392 assert(VT.isVector() && "Expected a vector type"); 6393 unsigned sz = VT.getSizeInBits(); 6394 if (MinSplatBits > sz) 6395 return false; 6396 6397 SplatValue = APInt(sz, 0); 6398 SplatUndef = APInt(sz, 0); 6399 6400 // Get the bits. Bits with undefined values (when the corresponding element 6401 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6402 // in SplatValue. If any of the values are not constant, give up and return 6403 // false. 6404 unsigned int nOps = getNumOperands(); 6405 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6406 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6407 6408 for (unsigned j = 0; j < nOps; ++j) { 6409 unsigned i = isBigEndian ? nOps-1-j : j; 6410 SDValue OpVal = getOperand(i); 6411 unsigned BitPos = j * EltBitSize; 6412 6413 if (OpVal.getOpcode() == ISD::UNDEF) 6414 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6415 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6416 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6417 zextOrTrunc(sz) << BitPos; 6418 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6419 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6420 else 6421 return false; 6422 } 6423 6424 // The build_vector is all constants or undefs. Find the smallest element 6425 // size that splats the vector. 6426 6427 HasAnyUndefs = (SplatUndef != 0); 6428 while (sz > 8) { 6429 6430 unsigned HalfSize = sz / 2; 6431 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6432 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6433 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6434 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6435 6436 // If the two halves do not match (ignoring undef bits), stop here. 6437 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6438 MinSplatBits > HalfSize) 6439 break; 6440 6441 SplatValue = HighValue | LowValue; 6442 SplatUndef = HighUndef & LowUndef; 6443 6444 sz = HalfSize; 6445 } 6446 6447 SplatBitSize = sz; 6448 return true; 6449} 6450 6451bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6452 // Find the first non-undef value in the shuffle mask. 6453 unsigned i, e; 6454 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6455 /* search */; 6456 6457 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6458 6459 // Make sure all remaining elements are either undef or the same as the first 6460 // non-undef value. 6461 for (int Idx = Mask[i]; i != e; ++i) 6462 if (Mask[i] >= 0 && Mask[i] != Idx) 6463 return false; 6464 return true; 6465} 6466 6467#ifdef XDEBUG 6468static void checkForCyclesHelper(const SDNode *N, 6469 SmallPtrSet<const SDNode*, 32> &Visited, 6470 SmallPtrSet<const SDNode*, 32> &Checked) { 6471 // If this node has already been checked, don't check it again. 6472 if (Checked.count(N)) 6473 return; 6474 6475 // If a node has already been visited on this depth-first walk, reject it as 6476 // a cycle. 6477 if (!Visited.insert(N)) { 6478 dbgs() << "Offending node:\n"; 6479 N->dumprFull(); 6480 errs() << "Detected cycle in SelectionDAG\n"; 6481 abort(); 6482 } 6483 6484 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6485 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6486 6487 Checked.insert(N); 6488 Visited.erase(N); 6489} 6490#endif 6491 6492void llvm::checkForCycles(const llvm::SDNode *N) { 6493#ifdef XDEBUG 6494 assert(N && "Checking nonexistant SDNode"); 6495 SmallPtrSet<const SDNode*, 32> visited; 6496 SmallPtrSet<const SDNode*, 32> checked; 6497 checkForCyclesHelper(N, visited, checked); 6498#endif 6499} 6500 6501void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6502 checkForCycles(DAG->getRoot().getNode()); 6503} 6504