SelectionDAG.cpp revision 97e001dec7d8972c2734ea63ca020d9136172ba0
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Target/TargetLowering.h" 20#include <iostream> 21#include <set> 22#include <cmath> 23#include <algorithm> 24using namespace llvm; 25 26static bool isCommutativeBinOp(unsigned Opcode) { 27 switch (Opcode) { 28 case ISD::ADD: 29 case ISD::MUL: 30 case ISD::AND: 31 case ISD::OR: 32 case ISD::XOR: return true; 33 default: return false; // FIXME: Need commutative info for user ops! 34 } 35} 36 37static bool isAssociativeBinOp(unsigned Opcode) { 38 switch (Opcode) { 39 case ISD::ADD: 40 case ISD::MUL: 41 case ISD::AND: 42 case ISD::OR: 43 case ISD::XOR: return true; 44 default: return false; // FIXME: Need associative info for user ops! 45 } 46} 47 48static unsigned ExactLog2(uint64_t Val) { 49 unsigned Count = 0; 50 while (Val != 1) { 51 Val >>= 1; 52 ++Count; 53 } 54 return Count; 55} 56 57// isInvertibleForFree - Return true if there is no cost to emitting the logical 58// inverse of this node. 59static bool isInvertibleForFree(SDOperand N) { 60 if (isa<ConstantSDNode>(N.Val)) return true; 61 if (isa<SetCCSDNode>(N.Val) && N.Val->hasOneUse()) 62 return true; 63 return false; 64} 65 66 67/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 68/// when given the operation for (X op Y). 69ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 70 // To perform this operation, we just need to swap the L and G bits of the 71 // operation. 72 unsigned OldL = (Operation >> 2) & 1; 73 unsigned OldG = (Operation >> 1) & 1; 74 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 75 (OldL << 1) | // New G bit 76 (OldG << 2)); // New L bit. 77} 78 79/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 80/// 'op' is a valid SetCC operation. 81ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 82 unsigned Operation = Op; 83 if (isInteger) 84 Operation ^= 7; // Flip L, G, E bits, but not U. 85 else 86 Operation ^= 15; // Flip all of the condition bits. 87 if (Operation > ISD::SETTRUE2) 88 Operation &= ~8; // Don't let N and U bits get set. 89 return ISD::CondCode(Operation); 90} 91 92 93/// isSignedOp - For an integer comparison, return 1 if the comparison is a 94/// signed operation and 2 if the result is an unsigned comparison. Return zero 95/// if the operation does not depend on the sign of the input (setne and seteq). 96static int isSignedOp(ISD::CondCode Opcode) { 97 switch (Opcode) { 98 default: assert(0 && "Illegal integer setcc operation!"); 99 case ISD::SETEQ: 100 case ISD::SETNE: return 0; 101 case ISD::SETLT: 102 case ISD::SETLE: 103 case ISD::SETGT: 104 case ISD::SETGE: return 1; 105 case ISD::SETULT: 106 case ISD::SETULE: 107 case ISD::SETUGT: 108 case ISD::SETUGE: return 2; 109 } 110} 111 112/// getSetCCOrOperation - Return the result of a logical OR between different 113/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 114/// returns SETCC_INVALID if it is not possible to represent the resultant 115/// comparison. 116ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 117 bool isInteger) { 118 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 119 // Cannot fold a signed integer setcc with an unsigned integer setcc. 120 return ISD::SETCC_INVALID; 121 122 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 123 124 // If the N and U bits get set then the resultant comparison DOES suddenly 125 // care about orderedness, and is true when ordered. 126 if (Op > ISD::SETTRUE2) 127 Op &= ~16; // Clear the N bit. 128 return ISD::CondCode(Op); 129} 130 131/// getSetCCAndOperation - Return the result of a logical AND between different 132/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 133/// function returns zero if it is not possible to represent the resultant 134/// comparison. 135ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 136 bool isInteger) { 137 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 138 // Cannot fold a signed setcc with an unsigned setcc. 139 return ISD::SETCC_INVALID; 140 141 // Combine all of the condition bits. 142 return ISD::CondCode(Op1 & Op2); 143} 144 145const TargetMachine &SelectionDAG::getTarget() const { 146 return TLI.getTargetMachine(); 147} 148 149 150/// RemoveDeadNodes - This method deletes all unreachable nodes in the 151/// SelectionDAG, including nodes (like loads) that have uses of their token 152/// chain but no other uses and no side effect. If a node is passed in as an 153/// argument, it is used as the seed for node deletion. 154void SelectionDAG::RemoveDeadNodes(SDNode *N) { 155 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 156 157 // Create a dummy node (which is not added to allnodes), that adds a reference 158 // to the root node, preventing it from being deleted. 159 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot()); 160 161 DeleteNodeIfDead(N, &AllNodeSet); 162 163 Restart: 164 unsigned NumNodes = AllNodeSet.size(); 165 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 166 I != E; ++I) { 167 // Try to delete this node. 168 DeleteNodeIfDead(*I, &AllNodeSet); 169 170 // If we actually deleted any nodes, do not use invalid iterators in 171 // AllNodeSet. 172 if (AllNodeSet.size() != NumNodes) 173 goto Restart; 174 } 175 176 // Restore AllNodes. 177 if (AllNodes.size() != NumNodes) 178 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 179 180 // If the root changed (e.g. it was a dead load, update the root). 181 setRoot(DummyNode->getOperand(0)); 182 183 // Now that we are done with the dummy node, delete it. 184 DummyNode->getOperand(0).Val->removeUser(DummyNode); 185 delete DummyNode; 186} 187 188void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 189 if (!N->use_empty()) 190 return; 191 192 // Okay, we really are going to delete this node. First take this out of the 193 // appropriate CSE map. 194 switch (N->getOpcode()) { 195 case ISD::Constant: 196 Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 197 N->getValueType(0))); 198 break; 199 case ISD::ConstantFP: { 200 union { 201 double DV; 202 uint64_t IV; 203 }; 204 DV = cast<ConstantFPSDNode>(N)->getValue(); 205 ConstantFPs.erase(std::make_pair(IV, N->getValueType(0))); 206 break; 207 } 208 case ISD::GlobalAddress: 209 GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 210 break; 211 case ISD::FrameIndex: 212 FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 213 break; 214 case ISD::ConstantPool: 215 ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->getIndex()); 216 break; 217 case ISD::BasicBlock: 218 BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 219 break; 220 case ISD::ExternalSymbol: 221 ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 222 break; 223 224 case ISD::LOAD: 225 Loads.erase(std::make_pair(N->getOperand(1), 226 std::make_pair(N->getOperand(0), 227 N->getValueType(0)))); 228 break; 229 case ISD::SETCC: 230 SetCCs.erase(std::make_pair(std::make_pair(N->getOperand(0), 231 N->getOperand(1)), 232 std::make_pair( 233 cast<SetCCSDNode>(N)->getCondition(), 234 N->getValueType(0)))); 235 break; 236 case ISD::TRUNCSTORE: 237 case ISD::SIGN_EXTEND_INREG: 238 case ISD::FP_ROUND_INREG: 239 case ISD::EXTLOAD: 240 case ISD::SEXTLOAD: 241 case ISD::ZEXTLOAD: { 242 EVTStruct NN; 243 NN.Opcode = N->getOpcode(); 244 NN.VT = N->getValueType(0); 245 NN.EVT = cast<MVTSDNode>(N)->getExtraValueType(); 246 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 247 NN.Ops.push_back(N->getOperand(i)); 248 MVTSDNodes.erase(NN); 249 break; 250 } 251 default: 252 if (N->getNumOperands() == 1) 253 UnaryOps.erase(std::make_pair(N->getOpcode(), 254 std::make_pair(N->getOperand(0), 255 N->getValueType(0)))); 256 else if (N->getNumOperands() == 2) 257 BinaryOps.erase(std::make_pair(N->getOpcode(), 258 std::make_pair(N->getOperand(0), 259 N->getOperand(1)))); 260 break; 261 } 262 263 // Next, brutally remove the operand list. 264 while (!N->Operands.empty()) { 265 SDNode *O = N->Operands.back().Val; 266 N->Operands.pop_back(); 267 O->removeUser(N); 268 269 // Now that we removed this operand, see if there are no uses of it left. 270 DeleteNodeIfDead(O, NodeSet); 271 } 272 273 // Remove the node from the nodes set and delete it. 274 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 275 AllNodeSet.erase(N); 276 277 // Now that the node is gone, check to see if any of the operands of this node 278 // are dead now. 279 delete N; 280} 281 282 283SelectionDAG::~SelectionDAG() { 284 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 285 delete AllNodes[i]; 286} 287 288SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 289 if (Op.getValueType() == VT) return Op; 290 int64_t Imm = ~0ULL >> 64-MVT::getSizeInBits(VT); 291 return getNode(ISD::AND, Op.getValueType(), Op, 292 getConstant(Imm, Op.getValueType())); 293} 294 295SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 296 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 297 // Mask out any bits that are not valid for this constant. 298 if (VT != MVT::i64) 299 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 300 301 SDNode *&N = Constants[std::make_pair(Val, VT)]; 302 if (N) return SDOperand(N, 0); 303 N = new ConstantSDNode(Val, VT); 304 AllNodes.push_back(N); 305 return SDOperand(N, 0); 306} 307 308SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 309 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 310 if (VT == MVT::f32) 311 Val = (float)Val; // Mask out extra precision. 312 313 // Do the map lookup using the actual bit pattern for the floating point 314 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 315 // we don't have issues with SNANs. 316 union { 317 double DV; 318 uint64_t IV; 319 }; 320 321 DV = Val; 322 323 SDNode *&N = ConstantFPs[std::make_pair(IV, VT)]; 324 if (N) return SDOperand(N, 0); 325 N = new ConstantFPSDNode(Val, VT); 326 AllNodes.push_back(N); 327 return SDOperand(N, 0); 328} 329 330 331 332SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 333 MVT::ValueType VT) { 334 SDNode *&N = GlobalValues[GV]; 335 if (N) return SDOperand(N, 0); 336 N = new GlobalAddressSDNode(GV,VT); 337 AllNodes.push_back(N); 338 return SDOperand(N, 0); 339} 340 341SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 342 SDNode *&N = FrameIndices[FI]; 343 if (N) return SDOperand(N, 0); 344 N = new FrameIndexSDNode(FI, VT); 345 AllNodes.push_back(N); 346 return SDOperand(N, 0); 347} 348 349SDOperand SelectionDAG::getConstantPool(unsigned CPIdx, MVT::ValueType VT) { 350 SDNode *N = ConstantPoolIndices[CPIdx]; 351 if (N) return SDOperand(N, 0); 352 N = new ConstantPoolSDNode(CPIdx, VT); 353 AllNodes.push_back(N); 354 return SDOperand(N, 0); 355} 356 357SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 358 SDNode *&N = BBNodes[MBB]; 359 if (N) return SDOperand(N, 0); 360 N = new BasicBlockSDNode(MBB); 361 AllNodes.push_back(N); 362 return SDOperand(N, 0); 363} 364 365SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 366 SDNode *&N = ExternalSymbols[Sym]; 367 if (N) return SDOperand(N, 0); 368 N = new ExternalSymbolSDNode(Sym, VT); 369 AllNodes.push_back(N); 370 return SDOperand(N, 0); 371} 372 373SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, 374 SDOperand N1, SDOperand N2) { 375 // These setcc operations always fold. 376 switch (Cond) { 377 default: break; 378 case ISD::SETFALSE: 379 case ISD::SETFALSE2: return getConstant(0, VT); 380 case ISD::SETTRUE: 381 case ISD::SETTRUE2: return getConstant(1, VT); 382 } 383 384 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 385 uint64_t C2 = N2C->getValue(); 386 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 387 uint64_t C1 = N1C->getValue(); 388 389 // Sign extend the operands if required 390 if (ISD::isSignedIntSetCC(Cond)) { 391 C1 = N1C->getSignExtended(); 392 C2 = N2C->getSignExtended(); 393 } 394 395 switch (Cond) { 396 default: assert(0 && "Unknown integer setcc!"); 397 case ISD::SETEQ: return getConstant(C1 == C2, VT); 398 case ISD::SETNE: return getConstant(C1 != C2, VT); 399 case ISD::SETULT: return getConstant(C1 < C2, VT); 400 case ISD::SETUGT: return getConstant(C1 > C2, VT); 401 case ISD::SETULE: return getConstant(C1 <= C2, VT); 402 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 403 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 404 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 405 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 406 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 407 } 408 } else { 409 uint64_t MinVal, MaxVal; 410 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 411 if (ISD::isSignedIntSetCC(Cond)) { 412 MinVal = 1ULL << (OperandBitSize-1); 413 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 414 MaxVal = ~0ULL >> (65-OperandBitSize); 415 else 416 MaxVal = 0; 417 } else { 418 MinVal = 0; 419 MaxVal = ~0ULL >> (64-OperandBitSize); 420 } 421 422 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 423 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 424 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 425 --C2; // X >= C1 --> X > (C1-1) 426 Cond = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT; 427 N2 = getConstant(C2, N2.getValueType()); 428 N2C = cast<ConstantSDNode>(N2.Val); 429 } 430 431 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 432 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 433 ++C2; // X <= C1 --> X < (C1+1) 434 Cond = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; 435 N2 = getConstant(C2, N2.getValueType()); 436 N2C = cast<ConstantSDNode>(N2.Val); 437 } 438 439 // If we have setult X, 1, turn it into seteq X, 0 440 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 441 return getSetCC(ISD::SETEQ, VT, N1, 442 getConstant(MinVal, N1.getValueType())); 443 // If we have setult X, 1, turn it into seteq X, 0 444 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 445 return getSetCC(ISD::SETEQ, VT, N1, 446 getConstant(MaxVal, N1.getValueType())); 447 448 // If we have "setcc X, C1", check to see if we can shrink the immediate 449 // by changing cc. 450 451 // SETUGT X, SINTMAX -> SETLT X, 0 452 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 453 C2 == (~0ULL >> (65-OperandBitSize))) 454 return getSetCC(ISD::SETLT, VT, N1, getConstant(0, N2.getValueType())); 455 456 // FIXME: Implement the rest of these. 457 458 } 459 } else if (isa<ConstantSDNode>(N1.Val)) { 460 // Ensure that the constant occurs on the RHS. 461 return getSetCC(ISD::getSetCCSwappedOperands(Cond), VT, N2, N1); 462 } 463 464 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 465 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 466 double C1 = N1C->getValue(), C2 = N2C->getValue(); 467 468 switch (Cond) { 469 default: break; // FIXME: Implement the rest of these! 470 case ISD::SETEQ: return getConstant(C1 == C2, VT); 471 case ISD::SETNE: return getConstant(C1 != C2, VT); 472 case ISD::SETLT: return getConstant(C1 < C2, VT); 473 case ISD::SETGT: return getConstant(C1 > C2, VT); 474 case ISD::SETLE: return getConstant(C1 <= C2, VT); 475 case ISD::SETGE: return getConstant(C1 >= C2, VT); 476 } 477 } else { 478 // Ensure that the constant occurs on the RHS. 479 Cond = ISD::getSetCCSwappedOperands(Cond); 480 std::swap(N1, N2); 481 } 482 483 if (N1 == N2) { 484 // We can always fold X == Y for integer setcc's. 485 if (MVT::isInteger(N1.getValueType())) 486 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 487 unsigned UOF = ISD::getUnorderedFlavor(Cond); 488 if (UOF == 2) // FP operators that are undefined on NaNs. 489 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 490 if (UOF == ISD::isTrueWhenEqual(Cond)) 491 return getConstant(UOF, VT); 492 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO 493 // if it is not already. 494 Cond = UOF == 0 ? ISD::SETUO : ISD::SETO; 495 } 496 497 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 498 MVT::isInteger(N1.getValueType())) { 499 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB || 500 N1.getOpcode() == ISD::XOR) { 501 // Simplify (X+Y) == (X+Z) --> Y == Z 502 if (N1.getOpcode() == N2.getOpcode()) { 503 if (N1.getOperand(0) == N2.getOperand(0)) 504 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1)); 505 if (N1.getOperand(1) == N2.getOperand(1)) 506 return getSetCC(Cond, VT, N1.getOperand(0), N2.getOperand(0)); 507 if (isCommutativeBinOp(N1.getOpcode())) { 508 // If X op Y == Y op X, try other combinations. 509 if (N1.getOperand(0) == N2.getOperand(1)) 510 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(0)); 511 if (N1.getOperand(1) == N2.getOperand(0)) 512 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1)); 513 } 514 } 515 516 // FIXME: move this stuff to the DAG Combiner when it exists! 517 518 // Simplify (X+Z) == X --> Z == 0 519 if (N1.getOperand(0) == N2) 520 return getSetCC(Cond, VT, N1.getOperand(1), 521 getConstant(0, N1.getValueType())); 522 if (N1.getOperand(1) == N2) { 523 if (isCommutativeBinOp(N1.getOpcode())) 524 return getSetCC(Cond, VT, N1.getOperand(0), 525 getConstant(0, N1.getValueType())); 526 else { 527 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); 528 // (Z-X) == X --> Z == X<<1 529 return getSetCC(Cond, VT, N1.getOperand(0), 530 getNode(ISD::SHL, N2.getValueType(), 531 N2, getConstant(1, TLI.getShiftAmountTy()))); 532 } 533 } 534 } 535 536 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || 537 N2.getOpcode() == ISD::XOR) { 538 // Simplify X == (X+Z) --> Z == 0 539 if (N2.getOperand(0) == N1) 540 return getSetCC(Cond, VT, N2.getOperand(1), 541 getConstant(0, N2.getValueType())); 542 else if (N2.getOperand(1) == N1) 543 return getSetCC(Cond, VT, N2.getOperand(0), 544 getConstant(0, N2.getValueType())); 545 } 546 } 547 548 SetCCSDNode *&N = SetCCs[std::make_pair(std::make_pair(N1, N2), 549 std::make_pair(Cond, VT))]; 550 if (N) return SDOperand(N, 0); 551 N = new SetCCSDNode(Cond, N1, N2); 552 N->setValueTypes(VT); 553 AllNodes.push_back(N); 554 return SDOperand(N, 0); 555} 556 557 558 559/// getNode - Gets or creates the specified node. 560/// 561SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 562 SDNode *N = new SDNode(Opcode, VT); 563 AllNodes.push_back(N); 564 return SDOperand(N, 0); 565} 566 567SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 568 SDOperand Operand) { 569 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 570 uint64_t Val = C->getValue(); 571 switch (Opcode) { 572 default: break; 573 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 574 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 575 case ISD::TRUNCATE: return getConstant(Val, VT); 576 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 577 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 578 } 579 } 580 581 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 582 switch (Opcode) { 583 case ISD::FNEG: 584 return getConstantFP(-C->getValue(), VT); 585 case ISD::FP_ROUND: 586 case ISD::FP_EXTEND: 587 return getConstantFP(C->getValue(), VT); 588 case ISD::FP_TO_SINT: 589 return getConstant((int64_t)C->getValue(), VT); 590 case ISD::FP_TO_UINT: 591 return getConstant((uint64_t)C->getValue(), VT); 592 } 593 594 unsigned OpOpcode = Operand.Val->getOpcode(); 595 switch (Opcode) { 596 case ISD::TokenFactor: 597 return Operand; // Factor of one node? No factor. 598 case ISD::SIGN_EXTEND: 599 if (Operand.getValueType() == VT) return Operand; // noop extension 600 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 601 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 602 break; 603 case ISD::ZERO_EXTEND: 604 if (Operand.getValueType() == VT) return Operand; // noop extension 605 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 606 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 607 break; 608 case ISD::TRUNCATE: 609 if (Operand.getValueType() == VT) return Operand; // noop truncate 610 if (OpOpcode == ISD::TRUNCATE) 611 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 612 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) { 613 // If the source is smaller than the dest, we still need an extend. 614 if (Operand.Val->getOperand(0).getValueType() < VT) 615 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 616 else if (Operand.Val->getOperand(0).getValueType() > VT) 617 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 618 else 619 return Operand.Val->getOperand(0); 620 } 621 break; 622 case ISD::FNEG: 623 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X) 624 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1), 625 Operand.Val->getOperand(0)); 626 if (OpOpcode == ISD::FNEG) // --X -> X 627 return Operand.Val->getOperand(0); 628 break; 629 case ISD::FABS: 630 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 631 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 632 break; 633 } 634 635 SDNode *&N = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 636 if (N) return SDOperand(N, 0); 637 N = new SDNode(Opcode, Operand); 638 N->setValueTypes(VT); 639 AllNodes.push_back(N); 640 return SDOperand(N, 0); 641} 642 643SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 644 SDOperand N1, SDOperand N2) { 645#ifndef NDEBUG 646 switch (Opcode) { 647 case ISD::TokenFactor: 648 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 649 N2.getValueType() == MVT::Other && "Invalid token factor!"); 650 break; 651 case ISD::AND: 652 case ISD::OR: 653 case ISD::XOR: 654 case ISD::UDIV: 655 case ISD::UREM: 656 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 657 // fall through 658 case ISD::ADD: 659 case ISD::SUB: 660 case ISD::MUL: 661 case ISD::SDIV: 662 case ISD::SREM: 663 assert(N1.getValueType() == N2.getValueType() && 664 N1.getValueType() == VT && "Binary operator types must match!"); 665 break; 666 667 case ISD::SHL: 668 case ISD::SRA: 669 case ISD::SRL: 670 assert(VT == N1.getValueType() && 671 "Shift operators return type must be the same as their first arg"); 672 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 673 VT != MVT::i1 && "Shifts only work on integers"); 674 break; 675 default: break; 676 } 677#endif 678 679 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 680 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 681 if (N1C) { 682 if (N2C) { 683 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 684 switch (Opcode) { 685 case ISD::ADD: return getConstant(C1 + C2, VT); 686 case ISD::SUB: return getConstant(C1 - C2, VT); 687 case ISD::MUL: return getConstant(C1 * C2, VT); 688 case ISD::UDIV: 689 if (C2) return getConstant(C1 / C2, VT); 690 break; 691 case ISD::UREM : 692 if (C2) return getConstant(C1 % C2, VT); 693 break; 694 case ISD::SDIV : 695 if (C2) return getConstant(N1C->getSignExtended() / 696 N2C->getSignExtended(), VT); 697 break; 698 case ISD::SREM : 699 if (C2) return getConstant(N1C->getSignExtended() % 700 N2C->getSignExtended(), VT); 701 break; 702 case ISD::AND : return getConstant(C1 & C2, VT); 703 case ISD::OR : return getConstant(C1 | C2, VT); 704 case ISD::XOR : return getConstant(C1 ^ C2, VT); 705 case ISD::SHL : return getConstant(C1 << (int)C2, VT); 706 case ISD::SRL : return getConstant(C1 >> (unsigned)C2, VT); 707 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 708 default: break; 709 } 710 711 } else { // Cannonicalize constant to RHS if commutative 712 if (isCommutativeBinOp(Opcode)) { 713 std::swap(N1C, N2C); 714 std::swap(N1, N2); 715 } 716 } 717 718 switch (Opcode) { 719 default: break; 720 case ISD::SHL: // shl 0, X -> 0 721 if (N1C->isNullValue()) return N1; 722 break; 723 case ISD::SRL: // srl 0, X -> 0 724 if (N1C->isNullValue()) return N1; 725 break; 726 case ISD::SRA: // sra -1, X -> -1 727 if (N1C->isAllOnesValue()) return N1; 728 break; 729 } 730 } 731 732 if (N2C) { 733 uint64_t C2 = N2C->getValue(); 734 735 switch (Opcode) { 736 case ISD::ADD: 737 if (!C2) return N1; // add X, 0 -> X 738 break; 739 case ISD::SUB: 740 if (!C2) return N1; // sub X, 0 -> X 741 break; 742 case ISD::MUL: 743 if (!C2) return N2; // mul X, 0 -> 0 744 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X 745 return getNode(ISD::SUB, VT, getConstant(0, VT), N1); 746 747 // FIXME: Move this to the DAG combiner when it exists. 748 if ((C2 & C2-1) == 0) { 749 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy()); 750 return getNode(ISD::SHL, VT, N1, ShAmt); 751 } 752 break; 753 754 case ISD::UDIV: 755 // FIXME: Move this to the DAG combiner when it exists. 756 if ((C2 & C2-1) == 0 && C2) { 757 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy()); 758 return getNode(ISD::SRL, VT, N1, ShAmt); 759 } 760 break; 761 762 case ISD::SHL: 763 case ISD::SRL: 764 case ISD::SRA: 765 // If the shift amount is bigger than the size of the data, then all the 766 // bits are shifted out. Simplify to loading constant zero. 767 if (C2 >= MVT::getSizeInBits(N1.getValueType())) { 768 return getNode(ISD::UNDEF, N1.getValueType()); 769 } 770 if (C2 == 0) return N1; 771 break; 772 773 case ISD::AND: 774 if (!C2) return N2; // X and 0 -> 0 775 if (N2C->isAllOnesValue()) 776 return N1; // X and -1 -> X 777 778 // FIXME: Should add a corresponding version of this for 779 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which 780 // we don't have yet. 781 782 // and (sign_extend_inreg x:16:32), 1 -> and x, 1 783 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) { 784 // If we are masking out the part of our input that was extended, just 785 // mask the input to the extension directly. 786 unsigned ExtendBits = 787 MVT::getSizeInBits(cast<MVTSDNode>(N1)->getExtraValueType()); 788 if ((C2 & (~0ULL << ExtendBits)) == 0) 789 return getNode(ISD::AND, VT, N1.getOperand(0), N2); 790 } 791 if (N1.getOpcode() == ISD::AND) 792 if (ConstantSDNode *OpRHS = dyn_cast<ConstantSDNode>(N1.getOperand(1))) 793 return getNode(ISD::AND, VT, N1.getOperand(0), 794 getNode(ISD::AND, VT, N1.getOperand(1), N2)); 795 796 // If we are anding the result of a setcc, and we know setcc always 797 // returns 0 or 1, simplify the RHS to either be 0 or 1 798 if (N1.getOpcode() == ISD::SETCC && C2 != 1 && 799 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult) 800 if (C2 & 1) 801 return getNode(ISD::AND, VT, N1, getConstant(1, VT)); 802 else 803 return getConstant(0, VT); 804 805 if (N1.getOpcode() == ISD::ZEXTLOAD) { 806 // If we are anding the result of a zext load, realize that the top bits 807 // of the loaded value are already zero to simplify C2. 808 unsigned SrcBits = 809 MVT::getSizeInBits(cast<MVTSDNode>(N1)->getExtraValueType()); 810 uint64_t C3 = C2 & (~0ULL >> (64-SrcBits)); 811 if (C3 != C2) 812 return getNode(ISD::AND, VT, N1, getConstant(C3, VT)); 813 else if (C2 == (~0ULL >> (64-SrcBits))) 814 return N1; // Anding out just what is already masked. 815 } 816 break; 817 case ISD::OR: 818 if (!C2)return N1; // X or 0 -> X 819 if (N2C->isAllOnesValue()) 820 return N2; // X or -1 -> -1 821 break; 822 case ISD::XOR: 823 if (!C2) return N1; // X xor 0 -> X 824 if (N2C->isAllOnesValue()) { 825 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1.Val)){ 826 // !(X op Y) -> (X !op Y) 827 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType()); 828 return getSetCC(ISD::getSetCCInverse(SetCC->getCondition(),isInteger), 829 SetCC->getValueType(0), 830 SetCC->getOperand(0), SetCC->getOperand(1)); 831 } else if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) { 832 SDNode *Op = N1.Val; 833 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible 834 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible 835 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1); 836 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) { 837 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS 838 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS 839 if (Op->getOpcode() == ISD::AND) 840 return getNode(ISD::OR, VT, LHS, RHS); 841 return getNode(ISD::AND, VT, LHS, RHS); 842 } 843 } 844 // X xor -1 -> not(x) ? 845 } 846 break; 847 } 848 849 // Reassociate ((X op C1) op C2) if possible. 850 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode)) 851 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1))) 852 return getNode(Opcode, VT, N1.Val->getOperand(0), 853 getNode(Opcode, VT, N2, N1.Val->getOperand(1))); 854 } 855 856 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 857 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 858 if (N1CFP) 859 if (N2CFP) { 860 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 861 switch (Opcode) { 862 case ISD::ADD: return getConstantFP(C1 + C2, VT); 863 case ISD::SUB: return getConstantFP(C1 - C2, VT); 864 case ISD::MUL: return getConstantFP(C1 * C2, VT); 865 case ISD::SDIV: 866 if (C2) return getConstantFP(C1 / C2, VT); 867 break; 868 case ISD::SREM : 869 if (C2) return getConstantFP(fmod(C1, C2), VT); 870 break; 871 default: break; 872 } 873 874 } else { // Cannonicalize constant to RHS if commutative 875 if (isCommutativeBinOp(Opcode)) { 876 std::swap(N1CFP, N2CFP); 877 std::swap(N1, N2); 878 } 879 } 880 881 // Finally, fold operations that do not require constants. 882 switch (Opcode) { 883 case ISD::TokenFactor: 884 if (N1.getOpcode() == ISD::EntryToken) 885 return N2; 886 if (N2.getOpcode() == ISD::EntryToken) 887 return N1; 888 break; 889 890 case ISD::AND: 891 case ISD::OR: 892 if (SetCCSDNode *LHS = dyn_cast<SetCCSDNode>(N1.Val)) 893 if (SetCCSDNode *RHS = dyn_cast<SetCCSDNode>(N2.Val)) { 894 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0); 895 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1); 896 ISD::CondCode Op2 = RHS->getCondition(); 897 898 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y) 899 if (LL == RR && LR == RL) { 900 Op2 = ISD::getSetCCSwappedOperands(Op2); 901 goto MatchedBackwards; 902 } 903 904 if (LL == RL && LR == RR) { 905 MatchedBackwards: 906 ISD::CondCode Result; 907 bool isInteger = MVT::isInteger(LL.getValueType()); 908 if (Opcode == ISD::OR) 909 Result = ISD::getSetCCOrOperation(LHS->getCondition(), Op2, 910 isInteger); 911 else 912 Result = ISD::getSetCCAndOperation(LHS->getCondition(), Op2, 913 isInteger); 914 if (Result != ISD::SETCC_INVALID) 915 return getSetCC(Result, LHS->getValueType(0), LL, LR); 916 } 917 } 918 break; 919 case ISD::XOR: 920 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0 921 break; 922 case ISD::ADD: 923 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B 924 return getNode(ISD::SUB, VT, N1, N2.getOperand(0)); 925 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A 926 return getNode(ISD::SUB, VT, N2, N1.getOperand(0)); 927 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) && 928 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0) 929 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A 930 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) && 931 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0) 932 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B 933 break; 934 case ISD::SUB: 935 if (N1.getOpcode() == ISD::ADD) { 936 if (N1.Val->getOperand(0) == N2) 937 return N1.Val->getOperand(1); // (A+B)-A == B 938 if (N1.Val->getOperand(1) == N2) 939 return N1.Val->getOperand(0); // (A+B)-B == A 940 } 941 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B 942 return getNode(ISD::ADD, VT, N1, N2.getOperand(0)); 943 break; 944 case ISD::SHL: 945 case ISD::SRL: 946 case ISD::SRA: 947 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 948 cast<MVTSDNode>(N2)->getExtraValueType() != MVT::i1) 949 return getNode(Opcode, VT, N1, N2.getOperand(0)); 950 else if (N2.getOpcode() == ISD::AND) 951 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 952 // If the and is only masking out bits that cannot effect the shift, 953 // eliminate the and. 954 unsigned NumBits = MVT::getSizeInBits(VT); 955 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 956 return getNode(Opcode, VT, N1, N2.getOperand(0)); 957 } 958 959 break; 960 } 961 962 SDNode *&N = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 963 if (N) return SDOperand(N, 0); 964 N = new SDNode(Opcode, N1, N2); 965 N->setValueTypes(VT); 966 967 AllNodes.push_back(N); 968 return SDOperand(N, 0); 969} 970 971SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 972 SDOperand Chain, SDOperand Ptr) { 973 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 974 if (N) return SDOperand(N, 0); 975 N = new SDNode(ISD::LOAD, Chain, Ptr); 976 977 // Loads have a token chain. 978 N->setValueTypes(VT, MVT::Other); 979 AllNodes.push_back(N); 980 return SDOperand(N, 0); 981} 982 983 984SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 985 SDOperand N1, SDOperand N2, SDOperand N3) { 986 // Perform various simplifications. 987 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 988 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 989 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 990 switch (Opcode) { 991 case ISD::SELECT: 992 if (N1C) 993 if (N1C->getValue()) 994 return N2; // select true, X, Y -> X 995 else 996 return N3; // select false, X, Y -> Y 997 998 if (N2 == N3) return N2; // select C, X, X -> X 999 1000 if (VT == MVT::i1) { // Boolean SELECT 1001 if (N2C) { 1002 if (N2C->getValue()) // select C, 1, X -> C | X 1003 return getNode(ISD::OR, VT, N1, N3); 1004 else // select C, 0, X -> ~C & X 1005 return getNode(ISD::AND, VT, 1006 getNode(ISD::XOR, N1.getValueType(), N1, 1007 getConstant(1, N1.getValueType())), N3); 1008 } else if (N3C) { 1009 if (N3C->getValue()) // select C, X, 1 -> ~C | X 1010 return getNode(ISD::OR, VT, 1011 getNode(ISD::XOR, N1.getValueType(), N1, 1012 getConstant(1, N1.getValueType())), N2); 1013 else // select C, X, 0 -> C & X 1014 return getNode(ISD::AND, VT, N1, N2); 1015 } 1016 1017 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y 1018 return getNode(ISD::OR, VT, N1, N3); 1019 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y 1020 return getNode(ISD::AND, VT, N1, N2); 1021 } 1022 1023 // If this is a selectcc, check to see if we can simplify the result. 1024 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1)) { 1025 if (ConstantFPSDNode *CFP = 1026 dyn_cast<ConstantFPSDNode>(SetCC->getOperand(1))) 1027 if (CFP->getValue() == 0.0) { // Allow either -0.0 or 0.0 1028 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 1029 if ((SetCC->getCondition() == ISD::SETGE || 1030 SetCC->getCondition() == ISD::SETGT) && 1031 N2 == SetCC->getOperand(0) && N3.getOpcode() == ISD::FNEG && 1032 N3.getOperand(0) == N2) 1033 return getNode(ISD::FABS, VT, N2); 1034 1035 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 1036 if ((SetCC->getCondition() == ISD::SETLT || 1037 SetCC->getCondition() == ISD::SETLE) && 1038 N3 == SetCC->getOperand(0) && N2.getOpcode() == ISD::FNEG && 1039 N2.getOperand(0) == N3) 1040 return getNode(ISD::FABS, VT, N3); 1041 } 1042 } 1043 break; 1044 case ISD::BRCOND: 1045 if (N2C) 1046 if (N2C->getValue()) // Unconditional branch 1047 return getNode(ISD::BR, MVT::Other, N1, N3); 1048 else 1049 return N1; // Never-taken branch 1050 break; 1051 case ISD::SRA_PARTS: 1052 case ISD::SRL_PARTS: 1053 case ISD::SHL_PARTS: 1054 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 1055 cast<MVTSDNode>(N3)->getExtraValueType() != MVT::i1) 1056 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1057 else if (N3.getOpcode() == ISD::AND) 1058 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 1059 // If the and is only masking out bits that cannot effect the shift, 1060 // eliminate the and. 1061 unsigned NumBits = MVT::getSizeInBits(VT)*2; 1062 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1063 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1064 } 1065 1066 1067 break; 1068 } 1069 1070 SDNode *N = new SDNode(Opcode, N1, N2, N3); 1071 switch (Opcode) { 1072 default: 1073 N->setValueTypes(VT); 1074 break; 1075 case ISD::DYNAMIC_STACKALLOC: // DYNAMIC_STACKALLOC produces pointer and chain 1076 N->setValueTypes(VT, MVT::Other); 1077 break; 1078 1079 case ISD::SRA_PARTS: 1080 case ISD::SRL_PARTS: 1081 case ISD::SHL_PARTS: { 1082 std::vector<MVT::ValueType> V(N->getNumOperands()-1, VT); 1083 N->setValueTypes(V); 1084 break; 1085 } 1086 } 1087 1088 // FIXME: memoize NODES 1089 AllNodes.push_back(N); 1090 return SDOperand(N, 0); 1091} 1092 1093SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1094 std::vector<SDOperand> &Children) { 1095 switch (Children.size()) { 1096 case 0: return getNode(Opcode, VT); 1097 case 1: return getNode(Opcode, VT, Children[0]); 1098 case 2: return getNode(Opcode, VT, Children[0], Children[1]); 1099 case 3: return getNode(Opcode, VT, Children[0], Children[1], Children[2]); 1100 default: break; 1101 } 1102 1103 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Children[1].Val); 1104 switch (Opcode) { 1105 default: break; 1106 case ISD::BRCONDTWOWAY: 1107 if (N1C) 1108 if (N1C->getValue()) // Unconditional branch to true dest. 1109 return getNode(ISD::BR, MVT::Other, Children[0], Children[2]); 1110 else // Unconditional branch to false dest. 1111 return getNode(ISD::BR, MVT::Other, Children[0], Children[3]); 1112 break; 1113 } 1114 1115 // FIXME: MEMOIZE!! 1116 SDNode *N = new SDNode(Opcode, Children); 1117 if (Opcode != ISD::ADD_PARTS && Opcode != ISD::SUB_PARTS) { 1118 N->setValueTypes(VT); 1119 } else { 1120 std::vector<MVT::ValueType> V(N->getNumOperands()/2, VT); 1121 N->setValueTypes(V); 1122 } 1123 AllNodes.push_back(N); 1124 return SDOperand(N, 0); 1125} 1126 1127SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1128 MVT::ValueType EVT) { 1129 1130 switch (Opcode) { 1131 default: assert(0 && "Bad opcode for this accessor!"); 1132 case ISD::FP_ROUND_INREG: 1133 assert(VT == N1.getValueType() && "Not an inreg round!"); 1134 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 1135 "Cannot FP_ROUND_INREG integer types"); 1136 if (EVT == VT) return N1; // Not actually rounding 1137 assert(EVT < VT && "Not rounding down!"); 1138 1139 if (isa<ConstantFPSDNode>(N1)) 1140 return getNode(ISD::FP_EXTEND, VT, getNode(ISD::FP_ROUND, EVT, N1)); 1141 break; 1142 case ISD::SIGN_EXTEND_INREG: 1143 assert(VT == N1.getValueType() && "Not an inreg extend!"); 1144 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 1145 "Cannot *_EXTEND_INREG FP types"); 1146 if (EVT == VT) return N1; // Not actually extending 1147 assert(EVT < VT && "Not extending!"); 1148 1149 // Extending a constant? Just return the extended constant. 1150 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 1151 SDOperand Tmp = getNode(ISD::TRUNCATE, EVT, N1); 1152 return getNode(ISD::SIGN_EXTEND, VT, Tmp); 1153 } 1154 1155 // If we are sign extending an extension, use the original source. 1156 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) 1157 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT) 1158 return N1; 1159 1160 // If we are sign extending a sextload, return just the load. 1161 if (N1.getOpcode() == ISD::SEXTLOAD && Opcode == ISD::SIGN_EXTEND_INREG) 1162 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT) 1163 return N1; 1164 1165 // If we are extending the result of a setcc, and we already know the 1166 // contents of the top bits, eliminate the extension. 1167 if (N1.getOpcode() == ISD::SETCC && 1168 TLI.getSetCCResultContents() == 1169 TargetLowering::ZeroOrNegativeOneSetCCResult) 1170 return N1; 1171 1172 // If we are sign extending the result of an (and X, C) operation, and we 1173 // know the extended bits are zeros already, don't do the extend. 1174 if (N1.getOpcode() == ISD::AND) 1175 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1176 uint64_t Mask = N1C->getValue(); 1177 unsigned NumBits = MVT::getSizeInBits(EVT); 1178 if ((Mask & (~0ULL << (NumBits-1))) == 0) 1179 return N1; 1180 } 1181 break; 1182 } 1183 1184 EVTStruct NN; 1185 NN.Opcode = Opcode; 1186 NN.VT = VT; 1187 NN.EVT = EVT; 1188 NN.Ops.push_back(N1); 1189 1190 SDNode *&N = MVTSDNodes[NN]; 1191 if (N) return SDOperand(N, 0); 1192 N = new MVTSDNode(Opcode, VT, N1, EVT); 1193 AllNodes.push_back(N); 1194 return SDOperand(N, 0); 1195} 1196 1197SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1198 SDOperand N2, MVT::ValueType EVT) { 1199 switch (Opcode) { 1200 default: assert(0 && "Bad opcode for this accessor!"); 1201 case ISD::EXTLOAD: 1202 case ISD::SEXTLOAD: 1203 case ISD::ZEXTLOAD: 1204 // If they are asking for an extending load from/to the same thing, return a 1205 // normal load. 1206 if (VT == EVT) 1207 return getNode(ISD::LOAD, VT, N1, N2); 1208 assert(EVT < VT && "Should only be an extending load, not truncating!"); 1209 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(VT)) && 1210 "Cannot sign/zero extend a FP load!"); 1211 assert(MVT::isInteger(VT) == MVT::isInteger(EVT) && 1212 "Cannot convert from FP to Int or Int -> FP!"); 1213 break; 1214 } 1215 1216 EVTStruct NN; 1217 NN.Opcode = Opcode; 1218 NN.VT = VT; 1219 NN.EVT = EVT; 1220 NN.Ops.push_back(N1); 1221 NN.Ops.push_back(N2); 1222 1223 SDNode *&N = MVTSDNodes[NN]; 1224 if (N) return SDOperand(N, 0); 1225 N = new MVTSDNode(Opcode, VT, MVT::Other, N1, N2, EVT); 1226 AllNodes.push_back(N); 1227 return SDOperand(N, 0); 1228} 1229 1230SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1231 SDOperand N2, SDOperand N3, MVT::ValueType EVT) { 1232 switch (Opcode) { 1233 default: assert(0 && "Bad opcode for this accessor!"); 1234 case ISD::TRUNCSTORE: 1235#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1236 // If this is a truncating store of a constant, convert to the desired type 1237 // and store it instead. 1238 if (isa<Constant>(N1)) { 1239 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1240 if (isa<Constant>(Op)) 1241 N1 = Op; 1242 } 1243 // Also for ConstantFP? 1244#endif 1245 if (N1.getValueType() == EVT) // Normal store? 1246 return getNode(ISD::STORE, VT, N1, N2, N3); 1247 assert(N2.getValueType() > EVT && "Not a truncation?"); 1248 assert(MVT::isInteger(N2.getValueType()) == MVT::isInteger(EVT) && 1249 "Can't do FP-INT conversion!"); 1250 break; 1251 } 1252 1253 EVTStruct NN; 1254 NN.Opcode = Opcode; 1255 NN.VT = VT; 1256 NN.EVT = EVT; 1257 NN.Ops.push_back(N1); 1258 NN.Ops.push_back(N2); 1259 NN.Ops.push_back(N3); 1260 1261 SDNode *&N = MVTSDNodes[NN]; 1262 if (N) return SDOperand(N, 0); 1263 N = new MVTSDNode(Opcode, VT, N1, N2, N3, EVT); 1264 AllNodes.push_back(N); 1265 return SDOperand(N, 0); 1266} 1267 1268 1269/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 1270/// indicated value. This method ignores uses of other values defined by this 1271/// operation. 1272bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 1273 assert(Value < getNumValues() && "Bad value!"); 1274 1275 // If there is only one value, this is easy. 1276 if (getNumValues() == 1) 1277 return use_size() == NUses; 1278 if (Uses.size() < NUses) return false; 1279 1280 SDOperand TheValue(this, Value); 1281 1282 std::set<SDNode*> UsersHandled; 1283 1284 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 1285 UI != E; ++UI) { 1286 SDNode *User = *UI; 1287 if (User->getNumOperands() == 1 || 1288 UsersHandled.insert(User).second) // First time we've seen this? 1289 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 1290 if (User->getOperand(i) == TheValue) { 1291 if (NUses == 0) 1292 return false; // too many uses 1293 --NUses; 1294 } 1295 } 1296 1297 // Found exactly the right number of uses? 1298 return NUses == 0; 1299} 1300 1301 1302const char *SDNode::getOperationName() const { 1303 switch (getOpcode()) { 1304 default: return "<<Unknown>>"; 1305 case ISD::PCMARKER: return "PCMarker"; 1306 case ISD::EntryToken: return "EntryToken"; 1307 case ISD::TokenFactor: return "TokenFactor"; 1308 case ISD::Constant: return "Constant"; 1309 case ISD::ConstantFP: return "ConstantFP"; 1310 case ISD::GlobalAddress: return "GlobalAddress"; 1311 case ISD::FrameIndex: return "FrameIndex"; 1312 case ISD::BasicBlock: return "BasicBlock"; 1313 case ISD::ExternalSymbol: return "ExternalSymbol"; 1314 case ISD::ConstantPool: return "ConstantPoolIndex"; 1315 case ISD::CopyToReg: return "CopyToReg"; 1316 case ISD::CopyFromReg: return "CopyFromReg"; 1317 case ISD::ImplicitDef: return "ImplicitDef"; 1318 case ISD::UNDEF: return "undef"; 1319 1320 // Unary operators 1321 case ISD::FABS: return "fabs"; 1322 case ISD::FNEG: return "fneg"; 1323 1324 // Binary operators 1325 case ISD::ADD: return "add"; 1326 case ISD::SUB: return "sub"; 1327 case ISD::MUL: return "mul"; 1328 case ISD::MULHU: return "mulhu"; 1329 case ISD::MULHS: return "mulhs"; 1330 case ISD::SDIV: return "sdiv"; 1331 case ISD::UDIV: return "udiv"; 1332 case ISD::SREM: return "srem"; 1333 case ISD::UREM: return "urem"; 1334 case ISD::AND: return "and"; 1335 case ISD::OR: return "or"; 1336 case ISD::XOR: return "xor"; 1337 case ISD::SHL: return "shl"; 1338 case ISD::SRA: return "sra"; 1339 case ISD::SRL: return "srl"; 1340 1341 case ISD::SELECT: return "select"; 1342 case ISD::ADD_PARTS: return "add_parts"; 1343 case ISD::SUB_PARTS: return "sub_parts"; 1344 case ISD::SHL_PARTS: return "shl_parts"; 1345 case ISD::SRA_PARTS: return "sra_parts"; 1346 case ISD::SRL_PARTS: return "srl_parts"; 1347 1348 // Conversion operators. 1349 case ISD::SIGN_EXTEND: return "sign_extend"; 1350 case ISD::ZERO_EXTEND: return "zero_extend"; 1351 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 1352 case ISD::TRUNCATE: return "truncate"; 1353 case ISD::FP_ROUND: return "fp_round"; 1354 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 1355 case ISD::FP_EXTEND: return "fp_extend"; 1356 1357 case ISD::SINT_TO_FP: return "sint_to_fp"; 1358 case ISD::UINT_TO_FP: return "uint_to_fp"; 1359 case ISD::FP_TO_SINT: return "fp_to_sint"; 1360 case ISD::FP_TO_UINT: return "fp_to_uint"; 1361 1362 // Control flow instructions 1363 case ISD::BR: return "br"; 1364 case ISD::BRCOND: return "brcond"; 1365 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 1366 case ISD::RET: return "ret"; 1367 case ISD::CALL: return "call"; 1368 case ISD::ADJCALLSTACKDOWN: return "adjcallstackdown"; 1369 case ISD::ADJCALLSTACKUP: return "adjcallstackup"; 1370 1371 // Other operators 1372 case ISD::LOAD: return "load"; 1373 case ISD::STORE: return "store"; 1374 case ISD::EXTLOAD: return "extload"; 1375 case ISD::SEXTLOAD: return "sextload"; 1376 case ISD::ZEXTLOAD: return "zextload"; 1377 case ISD::TRUNCSTORE: return "truncstore"; 1378 1379 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 1380 case ISD::EXTRACT_ELEMENT: return "extract_element"; 1381 case ISD::BUILD_PAIR: return "build_pair"; 1382 case ISD::MEMSET: return "memset"; 1383 case ISD::MEMCPY: return "memcpy"; 1384 case ISD::MEMMOVE: return "memmove"; 1385 1386 case ISD::SETCC: 1387 const SetCCSDNode *SetCC = cast<SetCCSDNode>(this); 1388 switch (SetCC->getCondition()) { 1389 default: assert(0 && "Unknown setcc condition!"); 1390 case ISD::SETOEQ: return "setcc:setoeq"; 1391 case ISD::SETOGT: return "setcc:setogt"; 1392 case ISD::SETOGE: return "setcc:setoge"; 1393 case ISD::SETOLT: return "setcc:setolt"; 1394 case ISD::SETOLE: return "setcc:setole"; 1395 case ISD::SETONE: return "setcc:setone"; 1396 1397 case ISD::SETO: return "setcc:seto"; 1398 case ISD::SETUO: return "setcc:setuo"; 1399 case ISD::SETUEQ: return "setcc:setue"; 1400 case ISD::SETUGT: return "setcc:setugt"; 1401 case ISD::SETUGE: return "setcc:setuge"; 1402 case ISD::SETULT: return "setcc:setult"; 1403 case ISD::SETULE: return "setcc:setule"; 1404 case ISD::SETUNE: return "setcc:setune"; 1405 1406 case ISD::SETEQ: return "setcc:seteq"; 1407 case ISD::SETGT: return "setcc:setgt"; 1408 case ISD::SETGE: return "setcc:setge"; 1409 case ISD::SETLT: return "setcc:setlt"; 1410 case ISD::SETLE: return "setcc:setle"; 1411 case ISD::SETNE: return "setcc:setne"; 1412 } 1413 } 1414} 1415 1416void SDNode::dump() const { 1417 std::cerr << (void*)this << ": "; 1418 1419 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 1420 if (i) std::cerr << ","; 1421 if (getValueType(i) == MVT::Other) 1422 std::cerr << "ch"; 1423 else 1424 std::cerr << MVT::getValueTypeString(getValueType(i)); 1425 } 1426 std::cerr << " = " << getOperationName(); 1427 1428 std::cerr << " "; 1429 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1430 if (i) std::cerr << ", "; 1431 std::cerr << (void*)getOperand(i).Val; 1432 if (unsigned RN = getOperand(i).ResNo) 1433 std::cerr << ":" << RN; 1434 } 1435 1436 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 1437 std::cerr << "<" << CSDN->getValue() << ">"; 1438 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 1439 std::cerr << "<" << CSDN->getValue() << ">"; 1440 } else if (const GlobalAddressSDNode *GADN = 1441 dyn_cast<GlobalAddressSDNode>(this)) { 1442 std::cerr << "<"; 1443 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 1444 } else if (const FrameIndexSDNode *FIDN = 1445 dyn_cast<FrameIndexSDNode>(this)) { 1446 std::cerr << "<" << FIDN->getIndex() << ">"; 1447 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 1448 std::cerr << "<" << CP->getIndex() << ">"; 1449 } else if (const BasicBlockSDNode *BBDN = 1450 dyn_cast<BasicBlockSDNode>(this)) { 1451 std::cerr << "<"; 1452 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 1453 if (LBB) 1454 std::cerr << LBB->getName() << " "; 1455 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 1456 } else if (const RegSDNode *C2V = dyn_cast<RegSDNode>(this)) { 1457 std::cerr << "<reg #" << C2V->getReg() << ">"; 1458 } else if (const ExternalSymbolSDNode *ES = 1459 dyn_cast<ExternalSymbolSDNode>(this)) { 1460 std::cerr << "'" << ES->getSymbol() << "'"; 1461 } else if (const MVTSDNode *M = dyn_cast<MVTSDNode>(this)) { 1462 std::cerr << " - Ty = " << MVT::getValueTypeString(M->getExtraValueType()); 1463 } 1464} 1465 1466static void DumpNodes(SDNode *N, unsigned indent) { 1467 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 1468 if (N->getOperand(i).Val->hasOneUse()) 1469 DumpNodes(N->getOperand(i).Val, indent+2); 1470 else 1471 std::cerr << "\n" << std::string(indent+2, ' ') 1472 << (void*)N->getOperand(i).Val << ": <multiple use>"; 1473 1474 1475 std::cerr << "\n" << std::string(indent, ' '); 1476 N->dump(); 1477} 1478 1479void SelectionDAG::dump() const { 1480 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 1481 std::vector<SDNode*> Nodes(AllNodes); 1482 std::sort(Nodes.begin(), Nodes.end()); 1483 1484 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 1485 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 1486 DumpNodes(Nodes[i], 2); 1487 } 1488 1489 DumpNodes(getRoot().Val, 2); 1490 1491 std::cerr << "\n\n"; 1492} 1493 1494