SelectionDAG.cpp revision af23f8e403d68e3f96eb5eb63e50e3aec4ea01c9
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeDbgValue.h" 16#include "SDNodeOrdering.h" 17#include "llvm/ADT/SetVector.h" 18#include "llvm/ADT/SmallPtrSet.h" 19#include "llvm/ADT/SmallSet.h" 20#include "llvm/ADT/SmallVector.h" 21#include "llvm/ADT/StringExtras.h" 22#include "llvm/Analysis/TargetTransformInfo.h" 23#include "llvm/Analysis/ValueTracking.h" 24#include "llvm/Assembly/Writer.h" 25#include "llvm/CodeGen/MachineBasicBlock.h" 26#include "llvm/CodeGen/MachineConstantPool.h" 27#include "llvm/CodeGen/MachineFrameInfo.h" 28#include "llvm/CodeGen/MachineModuleInfo.h" 29#include "llvm/DebugInfo.h" 30#include "llvm/IR/CallingConv.h" 31#include "llvm/IR/Constants.h" 32#include "llvm/IR/DataLayout.h" 33#include "llvm/IR/DerivedTypes.h" 34#include "llvm/IR/Function.h" 35#include "llvm/IR/GlobalAlias.h" 36#include "llvm/IR/GlobalVariable.h" 37#include "llvm/IR/Intrinsics.h" 38#include "llvm/Support/CommandLine.h" 39#include "llvm/Support/Debug.h" 40#include "llvm/Support/ErrorHandling.h" 41#include "llvm/Support/ManagedStatic.h" 42#include "llvm/Support/MathExtras.h" 43#include "llvm/Support/Mutex.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/Target/TargetInstrInfo.h" 46#include "llvm/Target/TargetIntrinsicInfo.h" 47#include "llvm/Target/TargetLowering.h" 48#include "llvm/Target/TargetMachine.h" 49#include "llvm/Target/TargetOptions.h" 50#include "llvm/Target/TargetRegisterInfo.h" 51#include "llvm/Target/TargetSelectionDAGInfo.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63// Default null implementations of the callbacks. 64void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} 65void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} 66 67//===----------------------------------------------------------------------===// 68// ConstantFPSDNode Class 69//===----------------------------------------------------------------------===// 70 71/// isExactlyValue - We don't rely on operator== working on double values, as 72/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 73/// As such, this method can be used to do an exact bit-for-bit comparison of 74/// two floating point values. 75bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 76 return getValueAPF().bitwiseIsEqual(V); 77} 78 79bool ConstantFPSDNode::isValueValidForType(EVT VT, 80 const APFloat& Val) { 81 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 82 83 // convert modifies in place, so make a copy. 84 APFloat Val2 = APFloat(Val); 85 bool losesInfo; 86 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT), 87 APFloat::rmNearestTiesToEven, 88 &losesInfo); 89 return !losesInfo; 90} 91 92//===----------------------------------------------------------------------===// 93// ISD Namespace 94//===----------------------------------------------------------------------===// 95 96/// isBuildVectorAllOnes - Return true if the specified node is a 97/// BUILD_VECTOR where all of the elements are ~0 or undef. 98bool ISD::isBuildVectorAllOnes(const SDNode *N) { 99 // Look through a bit convert. 100 if (N->getOpcode() == ISD::BITCAST) 101 N = N->getOperand(0).getNode(); 102 103 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 104 105 unsigned i = 0, e = N->getNumOperands(); 106 107 // Skip over all of the undef values. 108 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 109 ++i; 110 111 // Do not accept an all-undef vector. 112 if (i == e) return false; 113 114 // Do not accept build_vectors that aren't all constants or which have non-~0 115 // elements. We have to be a bit careful here, as the type of the constant 116 // may not be the same as the type of the vector elements due to type 117 // legalization (the elements are promoted to a legal type for the target and 118 // a vector of a type may be legal when the base element type is not). 119 // We only want to check enough bits to cover the vector elements, because 120 // we care if the resultant vector is all ones, not whether the individual 121 // constants are. 122 SDValue NotZero = N->getOperand(i); 123 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 124 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) { 125 if (CN->getAPIntValue().countTrailingOnes() < EltSize) 126 return false; 127 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) { 128 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) 129 return false; 130 } else 131 return false; 132 133 // Okay, we have at least one ~0 value, check to see if the rest match or are 134 // undefs. Even with the above element type twiddling, this should be OK, as 135 // the same type legalization should have applied to all the elements. 136 for (++i; i != e; ++i) 137 if (N->getOperand(i) != NotZero && 138 N->getOperand(i).getOpcode() != ISD::UNDEF) 139 return false; 140 return true; 141} 142 143 144/// isBuildVectorAllZeros - Return true if the specified node is a 145/// BUILD_VECTOR where all of the elements are 0 or undef. 146bool ISD::isBuildVectorAllZeros(const SDNode *N) { 147 // Look through a bit convert. 148 if (N->getOpcode() == ISD::BITCAST) 149 N = N->getOperand(0).getNode(); 150 151 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 152 153 unsigned i = 0, e = N->getNumOperands(); 154 155 // Skip over all of the undef values. 156 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 157 ++i; 158 159 // Do not accept an all-undef vector. 160 if (i == e) return false; 161 162 // Do not accept build_vectors that aren't all constants or which have non-0 163 // elements. 164 SDValue Zero = N->getOperand(i); 165 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) { 166 if (!CN->isNullValue()) 167 return false; 168 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) { 169 if (!CFPN->getValueAPF().isPosZero()) 170 return false; 171 } else 172 return false; 173 174 // Okay, we have at least one 0 value, check to see if the rest match or are 175 // undefs. 176 for (++i; i != e; ++i) 177 if (N->getOperand(i) != Zero && 178 N->getOperand(i).getOpcode() != ISD::UNDEF) 179 return false; 180 return true; 181} 182 183/// isScalarToVector - Return true if the specified node is a 184/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 185/// element is not an undef. 186bool ISD::isScalarToVector(const SDNode *N) { 187 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 188 return true; 189 190 if (N->getOpcode() != ISD::BUILD_VECTOR) 191 return false; 192 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 193 return false; 194 unsigned NumElems = N->getNumOperands(); 195 if (NumElems == 1) 196 return false; 197 for (unsigned i = 1; i < NumElems; ++i) { 198 SDValue V = N->getOperand(i); 199 if (V.getOpcode() != ISD::UNDEF) 200 return false; 201 } 202 return true; 203} 204 205/// allOperandsUndef - Return true if the node has at least one operand 206/// and all operands of the specified node are ISD::UNDEF. 207bool ISD::allOperandsUndef(const SDNode *N) { 208 // Return false if the node has no operands. 209 // This is "logically inconsistent" with the definition of "all" but 210 // is probably the desired behavior. 211 if (N->getNumOperands() == 0) 212 return false; 213 214 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i) 215 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 216 return false; 217 218 return true; 219} 220 221/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 222/// when given the operation for (X op Y). 223ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 224 // To perform this operation, we just need to swap the L and G bits of the 225 // operation. 226 unsigned OldL = (Operation >> 2) & 1; 227 unsigned OldG = (Operation >> 1) & 1; 228 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 229 (OldL << 1) | // New G bit 230 (OldG << 2)); // New L bit. 231} 232 233/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 234/// 'op' is a valid SetCC operation. 235ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 236 unsigned Operation = Op; 237 if (isInteger) 238 Operation ^= 7; // Flip L, G, E bits, but not U. 239 else 240 Operation ^= 15; // Flip all of the condition bits. 241 242 if (Operation > ISD::SETTRUE2) 243 Operation &= ~8; // Don't let N and U bits get set. 244 245 return ISD::CondCode(Operation); 246} 247 248 249/// isSignedOp - For an integer comparison, return 1 if the comparison is a 250/// signed operation and 2 if the result is an unsigned comparison. Return zero 251/// if the operation does not depend on the sign of the input (setne and seteq). 252static int isSignedOp(ISD::CondCode Opcode) { 253 switch (Opcode) { 254 default: llvm_unreachable("Illegal integer setcc operation!"); 255 case ISD::SETEQ: 256 case ISD::SETNE: return 0; 257 case ISD::SETLT: 258 case ISD::SETLE: 259 case ISD::SETGT: 260 case ISD::SETGE: return 1; 261 case ISD::SETULT: 262 case ISD::SETULE: 263 case ISD::SETUGT: 264 case ISD::SETUGE: return 2; 265 } 266} 267 268/// getSetCCOrOperation - Return the result of a logical OR between different 269/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 270/// returns SETCC_INVALID if it is not possible to represent the resultant 271/// comparison. 272ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 273 bool isInteger) { 274 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 275 // Cannot fold a signed integer setcc with an unsigned integer setcc. 276 return ISD::SETCC_INVALID; 277 278 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 279 280 // If the N and U bits get set then the resultant comparison DOES suddenly 281 // care about orderedness, and is true when ordered. 282 if (Op > ISD::SETTRUE2) 283 Op &= ~16; // Clear the U bit if the N bit is set. 284 285 // Canonicalize illegal integer setcc's. 286 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 287 Op = ISD::SETNE; 288 289 return ISD::CondCode(Op); 290} 291 292/// getSetCCAndOperation - Return the result of a logical AND between different 293/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 294/// function returns zero if it is not possible to represent the resultant 295/// comparison. 296ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 297 bool isInteger) { 298 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 299 // Cannot fold a signed setcc with an unsigned setcc. 300 return ISD::SETCC_INVALID; 301 302 // Combine all of the condition bits. 303 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 304 305 // Canonicalize illegal integer setcc's. 306 if (isInteger) { 307 switch (Result) { 308 default: break; 309 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 310 case ISD::SETOEQ: // SETEQ & SETU[LG]E 311 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 312 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 313 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 314 } 315 } 316 317 return Result; 318} 319 320//===----------------------------------------------------------------------===// 321// SDNode Profile Support 322//===----------------------------------------------------------------------===// 323 324/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 325/// 326static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 327 ID.AddInteger(OpC); 328} 329 330/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 331/// solely with their pointer. 332static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 333 ID.AddPointer(VTList.VTs); 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDValue *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 347/// 348static void AddNodeIDOperands(FoldingSetNodeID &ID, 349 const SDUse *Ops, unsigned NumOps) { 350 for (; NumOps; --NumOps, ++Ops) { 351 ID.AddPointer(Ops->getNode()); 352 ID.AddInteger(Ops->getResNo()); 353 } 354} 355 356static void AddNodeIDNode(FoldingSetNodeID &ID, 357 unsigned short OpC, SDVTList VTList, 358 const SDValue *OpList, unsigned N) { 359 AddNodeIDOpcode(ID, OpC); 360 AddNodeIDValueTypes(ID, VTList); 361 AddNodeIDOperands(ID, OpList, N); 362} 363 364/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 365/// the NodeID data. 366static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 367 switch (N->getOpcode()) { 368 case ISD::TargetExternalSymbol: 369 case ISD::ExternalSymbol: 370 llvm_unreachable("Should only be used on nodes with operands"); 371 default: break; // Normal nodes don't need extra info. 372 case ISD::TargetConstant: 373 case ISD::Constant: 374 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 375 break; 376 case ISD::TargetConstantFP: 377 case ISD::ConstantFP: { 378 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 379 break; 380 } 381 case ISD::TargetGlobalAddress: 382 case ISD::GlobalAddress: 383 case ISD::TargetGlobalTLSAddress: 384 case ISD::GlobalTLSAddress: { 385 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 386 ID.AddPointer(GA->getGlobal()); 387 ID.AddInteger(GA->getOffset()); 388 ID.AddInteger(GA->getTargetFlags()); 389 ID.AddInteger(GA->getAddressSpace()); 390 break; 391 } 392 case ISD::BasicBlock: 393 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 394 break; 395 case ISD::Register: 396 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 397 break; 398 case ISD::RegisterMask: 399 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 400 break; 401 case ISD::SRCVALUE: 402 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 403 break; 404 case ISD::FrameIndex: 405 case ISD::TargetFrameIndex: 406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 407 break; 408 case ISD::JumpTable: 409 case ISD::TargetJumpTable: 410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 411 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 412 break; 413 case ISD::ConstantPool: 414 case ISD::TargetConstantPool: { 415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 416 ID.AddInteger(CP->getAlignment()); 417 ID.AddInteger(CP->getOffset()); 418 if (CP->isMachineConstantPoolEntry()) 419 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 420 else 421 ID.AddPointer(CP->getConstVal()); 422 ID.AddInteger(CP->getTargetFlags()); 423 break; 424 } 425 case ISD::TargetIndex: { 426 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N); 427 ID.AddInteger(TI->getIndex()); 428 ID.AddInteger(TI->getOffset()); 429 ID.AddInteger(TI->getTargetFlags()); 430 break; 431 } 432 case ISD::LOAD: { 433 const LoadSDNode *LD = cast<LoadSDNode>(N); 434 ID.AddInteger(LD->getMemoryVT().getRawBits()); 435 ID.AddInteger(LD->getRawSubclassData()); 436 ID.AddInteger(LD->getPointerInfo().getAddrSpace()); 437 break; 438 } 439 case ISD::STORE: { 440 const StoreSDNode *ST = cast<StoreSDNode>(N); 441 ID.AddInteger(ST->getMemoryVT().getRawBits()); 442 ID.AddInteger(ST->getRawSubclassData()); 443 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 444 break; 445 } 446 case ISD::ATOMIC_CMP_SWAP: 447 case ISD::ATOMIC_SWAP: 448 case ISD::ATOMIC_LOAD_ADD: 449 case ISD::ATOMIC_LOAD_SUB: 450 case ISD::ATOMIC_LOAD_AND: 451 case ISD::ATOMIC_LOAD_OR: 452 case ISD::ATOMIC_LOAD_XOR: 453 case ISD::ATOMIC_LOAD_NAND: 454 case ISD::ATOMIC_LOAD_MIN: 455 case ISD::ATOMIC_LOAD_MAX: 456 case ISD::ATOMIC_LOAD_UMIN: 457 case ISD::ATOMIC_LOAD_UMAX: 458 case ISD::ATOMIC_LOAD: 459 case ISD::ATOMIC_STORE: { 460 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 461 ID.AddInteger(AT->getMemoryVT().getRawBits()); 462 ID.AddInteger(AT->getRawSubclassData()); 463 ID.AddInteger(AT->getPointerInfo().getAddrSpace()); 464 break; 465 } 466 case ISD::PREFETCH: { 467 const MemSDNode *PF = cast<MemSDNode>(N); 468 ID.AddInteger(PF->getPointerInfo().getAddrSpace()); 469 break; 470 } 471 case ISD::VECTOR_SHUFFLE: { 472 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 473 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 474 i != e; ++i) 475 ID.AddInteger(SVN->getMaskElt(i)); 476 break; 477 } 478 case ISD::TargetBlockAddress: 479 case ISD::BlockAddress: { 480 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N); 481 ID.AddPointer(BA->getBlockAddress()); 482 ID.AddInteger(BA->getOffset()); 483 ID.AddInteger(BA->getTargetFlags()); 484 break; 485 } 486 } // end switch (N->getOpcode()) 487 488 // Target specific memory nodes could also have address spaces to check. 489 if (N->isTargetMemoryOpcode()) 490 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); 491} 492 493/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 494/// data. 495static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 496 AddNodeIDOpcode(ID, N->getOpcode()); 497 // Add the return value info. 498 AddNodeIDValueTypes(ID, N->getVTList()); 499 // Add the operand info. 500 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 501 502 // Handle SDNode leafs with special info. 503 AddNodeIDCustom(ID, N); 504} 505 506/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 507/// the CSE map that carries volatility, temporalness, indexing mode, and 508/// extension/truncation information. 509/// 510static inline unsigned 511encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 512 bool isNonTemporal, bool isInvariant) { 513 assert((ConvType & 3) == ConvType && 514 "ConvType may not require more than 2 bits!"); 515 assert((AM & 7) == AM && 516 "AM may not require more than 3 bits!"); 517 return ConvType | 518 (AM << 2) | 519 (isVolatile << 5) | 520 (isNonTemporal << 6) | 521 (isInvariant << 7); 522} 523 524//===----------------------------------------------------------------------===// 525// SelectionDAG Class 526//===----------------------------------------------------------------------===// 527 528/// doNotCSE - Return true if CSE should not be performed for this node. 529static bool doNotCSE(SDNode *N) { 530 if (N->getValueType(0) == MVT::Glue) 531 return true; // Never CSE anything that produces a flag. 532 533 switch (N->getOpcode()) { 534 default: break; 535 case ISD::HANDLENODE: 536 case ISD::EH_LABEL: 537 return true; // Never CSE these nodes. 538 } 539 540 // Check that remaining values produced are not flags. 541 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 542 if (N->getValueType(i) == MVT::Glue) 543 return true; // Never CSE anything that produces a flag. 544 545 return false; 546} 547 548/// RemoveDeadNodes - This method deletes all unreachable nodes in the 549/// SelectionDAG. 550void SelectionDAG::RemoveDeadNodes() { 551 // Create a dummy node (which is not added to allnodes), that adds a reference 552 // to the root node, preventing it from being deleted. 553 HandleSDNode Dummy(getRoot()); 554 555 SmallVector<SDNode*, 128> DeadNodes; 556 557 // Add all obviously-dead nodes to the DeadNodes worklist. 558 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 559 if (I->use_empty()) 560 DeadNodes.push_back(I); 561 562 RemoveDeadNodes(DeadNodes); 563 564 // If the root changed (e.g. it was a dead load, update the root). 565 setRoot(Dummy.getValue()); 566} 567 568/// RemoveDeadNodes - This method deletes the unreachable nodes in the 569/// given list, and any nodes that become unreachable as a result. 570void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) { 571 572 // Process the worklist, deleting the nodes and adding their uses to the 573 // worklist. 574 while (!DeadNodes.empty()) { 575 SDNode *N = DeadNodes.pop_back_val(); 576 577 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 578 DUL->NodeDeleted(N, 0); 579 580 // Take the node out of the appropriate CSE map. 581 RemoveNodeFromCSEMaps(N); 582 583 // Next, brutally remove the operand list. This is safe to do, as there are 584 // no cycles in the graph. 585 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 586 SDUse &Use = *I++; 587 SDNode *Operand = Use.getNode(); 588 Use.set(SDValue()); 589 590 // Now that we removed this operand, see if there are no uses of it left. 591 if (Operand->use_empty()) 592 DeadNodes.push_back(Operand); 593 } 594 595 DeallocateNode(N); 596 } 597} 598 599void SelectionDAG::RemoveDeadNode(SDNode *N){ 600 SmallVector<SDNode*, 16> DeadNodes(1, N); 601 602 // Create a dummy node that adds a reference to the root node, preventing 603 // it from being deleted. (This matters if the root is an operand of the 604 // dead node.) 605 HandleSDNode Dummy(getRoot()); 606 607 RemoveDeadNodes(DeadNodes); 608} 609 610void SelectionDAG::DeleteNode(SDNode *N) { 611 // First take this out of the appropriate CSE map. 612 RemoveNodeFromCSEMaps(N); 613 614 // Finally, remove uses due to operands of this node, remove from the 615 // AllNodes list, and delete the node. 616 DeleteNodeNotInCSEMaps(N); 617} 618 619void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 620 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 621 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 622 623 // Drop all of the operands and decrement used node's use counts. 624 N->DropOperands(); 625 626 DeallocateNode(N); 627} 628 629void SelectionDAG::DeallocateNode(SDNode *N) { 630 if (N->OperandsNeedDelete) 631 delete[] N->OperandList; 632 633 // Set the opcode to DELETED_NODE to help catch bugs when node 634 // memory is reallocated. 635 N->NodeType = ISD::DELETED_NODE; 636 637 NodeAllocator.Deallocate(AllNodes.remove(N)); 638 639 // Remove the ordering of this node. 640 Ordering->remove(N); 641 642 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 643 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 644 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 645 DbgVals[i]->setIsInvalidated(); 646} 647 648/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 649/// correspond to it. This is useful when we're about to delete or repurpose 650/// the node. We don't want future request for structurally identical nodes 651/// to return N anymore. 652bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 653 bool Erased = false; 654 switch (N->getOpcode()) { 655 case ISD::HANDLENODE: return false; // noop. 656 case ISD::CONDCODE: 657 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 658 "Cond code doesn't exist!"); 659 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 660 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 661 break; 662 case ISD::ExternalSymbol: 663 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 664 break; 665 case ISD::TargetExternalSymbol: { 666 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 667 Erased = TargetExternalSymbols.erase( 668 std::pair<std::string,unsigned char>(ESN->getSymbol(), 669 ESN->getTargetFlags())); 670 break; 671 } 672 case ISD::VALUETYPE: { 673 EVT VT = cast<VTSDNode>(N)->getVT(); 674 if (VT.isExtended()) { 675 Erased = ExtendedValueTypeNodes.erase(VT); 676 } else { 677 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 678 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 679 } 680 break; 681 } 682 default: 683 // Remove it from the CSE Map. 684 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 685 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 686 Erased = CSEMap.RemoveNode(N); 687 break; 688 } 689#ifndef NDEBUG 690 // Verify that the node was actually in one of the CSE maps, unless it has a 691 // flag result (which cannot be CSE'd) or is one of the special cases that are 692 // not subject to CSE. 693 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 694 !N->isMachineOpcode() && !doNotCSE(N)) { 695 N->dump(this); 696 dbgs() << "\n"; 697 llvm_unreachable("Node is not in map!"); 698 } 699#endif 700 return Erased; 701} 702 703/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 704/// maps and modified in place. Add it back to the CSE maps, unless an identical 705/// node already exists, in which case transfer all its users to the existing 706/// node. This transfer can potentially trigger recursive merging. 707/// 708void 709SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) { 710 // For node types that aren't CSE'd, just act as if no identical node 711 // already exists. 712 if (!doNotCSE(N)) { 713 SDNode *Existing = CSEMap.GetOrInsertNode(N); 714 if (Existing != N) { 715 // If there was already an existing matching node, use ReplaceAllUsesWith 716 // to replace the dead one with the existing one. This can cause 717 // recursive merging of other unrelated nodes down the line. 718 ReplaceAllUsesWith(N, Existing); 719 720 // N is now dead. Inform the listeners and delete it. 721 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 722 DUL->NodeDeleted(N, Existing); 723 DeleteNodeNotInCSEMaps(N); 724 return; 725 } 726 } 727 728 // If the node doesn't already exist, we updated it. Inform listeners. 729 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 730 DUL->NodeUpdated(N); 731} 732 733/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 734/// were replaced with those specified. If this node is never memoized, 735/// return null, otherwise return a pointer to the slot it would take. If a 736/// node already exists with these operands, the slot will be non-null. 737SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 738 void *&InsertPos) { 739 if (doNotCSE(N)) 740 return 0; 741 742 SDValue Ops[] = { Op }; 743 FoldingSetNodeID ID; 744 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 745 AddNodeIDCustom(ID, N); 746 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 747 return Node; 748} 749 750/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 751/// were replaced with those specified. If this node is never memoized, 752/// return null, otherwise return a pointer to the slot it would take. If a 753/// node already exists with these operands, the slot will be non-null. 754SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 755 SDValue Op1, SDValue Op2, 756 void *&InsertPos) { 757 if (doNotCSE(N)) 758 return 0; 759 760 SDValue Ops[] = { Op1, Op2 }; 761 FoldingSetNodeID ID; 762 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 763 AddNodeIDCustom(ID, N); 764 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 765 return Node; 766} 767 768 769/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 770/// were replaced with those specified. If this node is never memoized, 771/// return null, otherwise return a pointer to the slot it would take. If a 772/// node already exists with these operands, the slot will be non-null. 773SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 774 const SDValue *Ops,unsigned NumOps, 775 void *&InsertPos) { 776 if (doNotCSE(N)) 777 return 0; 778 779 FoldingSetNodeID ID; 780 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 781 AddNodeIDCustom(ID, N); 782 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 783 return Node; 784} 785 786#ifndef NDEBUG 787/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 788static void VerifyNodeCommon(SDNode *N) { 789 switch (N->getOpcode()) { 790 default: 791 break; 792 case ISD::BUILD_PAIR: { 793 EVT VT = N->getValueType(0); 794 assert(N->getNumValues() == 1 && "Too many results!"); 795 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 796 "Wrong return type!"); 797 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 798 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 799 "Mismatched operand types!"); 800 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 801 "Wrong operand type!"); 802 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 803 "Wrong return type size"); 804 break; 805 } 806 case ISD::BUILD_VECTOR: { 807 assert(N->getNumValues() == 1 && "Too many results!"); 808 assert(N->getValueType(0).isVector() && "Wrong return type!"); 809 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 810 "Wrong number of operands!"); 811 EVT EltVT = N->getValueType(0).getVectorElementType(); 812 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 813 assert((I->getValueType() == EltVT || 814 (EltVT.isInteger() && I->getValueType().isInteger() && 815 EltVT.bitsLE(I->getValueType()))) && 816 "Wrong operand type!"); 817 assert(I->getValueType() == N->getOperand(0).getValueType() && 818 "Operands must all have the same type"); 819 } 820 break; 821 } 822 } 823} 824 825/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 826static void VerifySDNode(SDNode *N) { 827 // The SDNode allocators cannot be used to allocate nodes with fields that are 828 // not present in an SDNode! 829 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 830 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 831 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 832 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 833 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 834 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 835 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 836 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 837 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 838 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 839 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 840 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 841 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 842 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 843 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 844 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 845 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 846 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 847 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 848 849 VerifyNodeCommon(N); 850} 851 852/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 853/// invalid. 854static void VerifyMachineNode(SDNode *N) { 855 // The MachineNode allocators cannot be used to allocate nodes with fields 856 // that are not present in a MachineNode! 857 // Currently there are no such nodes. 858 859 VerifyNodeCommon(N); 860} 861#endif // NDEBUG 862 863/// getEVTAlignment - Compute the default alignment value for the 864/// given type. 865/// 866unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 867 Type *Ty = VT == MVT::iPTR ? 868 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 869 VT.getTypeForEVT(*getContext()); 870 871 return TLI.getDataLayout()->getABITypeAlignment(Ty); 872} 873 874// EntryNode could meaningfully have debug info if we can find it... 875SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 876 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 877 TTI(0), OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), 878 getVTList(MVT::Other)), 879 Root(getEntryNode()), Ordering(0), UpdateListeners(0) { 880 AllNodes.push_back(&EntryNode); 881 Ordering = new SDNodeOrdering(); 882 DbgInfo = new SDDbgInfo(); 883} 884 885void SelectionDAG::init(MachineFunction &mf, const TargetTransformInfo *tti) { 886 MF = &mf; 887 TTI = tti; 888 Context = &mf.getFunction()->getContext(); 889} 890 891SelectionDAG::~SelectionDAG() { 892 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners"); 893 allnodes_clear(); 894 delete Ordering; 895 delete DbgInfo; 896} 897 898void SelectionDAG::allnodes_clear() { 899 assert(&*AllNodes.begin() == &EntryNode); 900 AllNodes.remove(AllNodes.begin()); 901 while (!AllNodes.empty()) 902 DeallocateNode(AllNodes.begin()); 903} 904 905void SelectionDAG::clear() { 906 allnodes_clear(); 907 OperandAllocator.Reset(); 908 CSEMap.clear(); 909 910 ExtendedValueTypeNodes.clear(); 911 ExternalSymbols.clear(); 912 TargetExternalSymbols.clear(); 913 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 914 static_cast<CondCodeSDNode*>(0)); 915 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 916 static_cast<SDNode*>(0)); 917 918 EntryNode.UseList = 0; 919 AllNodes.push_back(&EntryNode); 920 Root = getEntryNode(); 921 Ordering->clear(); 922 DbgInfo->clear(); 923} 924 925SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 926 return VT.bitsGT(Op.getValueType()) ? 927 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 928 getNode(ISD::TRUNCATE, DL, VT, Op); 929} 930 931SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 932 return VT.bitsGT(Op.getValueType()) ? 933 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 934 getNode(ISD::TRUNCATE, DL, VT, Op); 935} 936 937SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 938 return VT.bitsGT(Op.getValueType()) ? 939 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 940 getNode(ISD::TRUNCATE, DL, VT, Op); 941} 942 943SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 944 assert(!VT.isVector() && 945 "getZeroExtendInReg should use the vector element type instead of " 946 "the vector type!"); 947 if (Op.getValueType() == VT) return Op; 948 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 949 APInt Imm = APInt::getLowBitsSet(BitWidth, 950 VT.getSizeInBits()); 951 return getNode(ISD::AND, DL, Op.getValueType(), Op, 952 getConstant(Imm, Op.getValueType())); 953} 954 955/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 956/// 957SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 958 EVT EltVT = VT.getScalarType(); 959 SDValue NegOne = 960 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 961 return getNode(ISD::XOR, DL, VT, Val, NegOne); 962} 963 964SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 965 EVT EltVT = VT.getScalarType(); 966 assert((EltVT.getSizeInBits() >= 64 || 967 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 968 "getConstant with a uint64_t value that doesn't fit in the type!"); 969 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 970} 971 972SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 973 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 974} 975 976SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 977 assert(VT.isInteger() && "Cannot create FP integer constant!"); 978 979 EVT EltVT = VT.getScalarType(); 980 const ConstantInt *Elt = &Val; 981 982 // In some cases the vector type is legal but the element type is illegal and 983 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 984 // inserted value (the type does not need to match the vector element type). 985 // Any extra bits introduced will be truncated away. 986 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 987 TargetLowering::TypePromoteInteger) { 988 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 989 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 990 Elt = ConstantInt::get(*getContext(), NewVal); 991 } 992 993 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 994 "APInt size does not match type size!"); 995 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 996 FoldingSetNodeID ID; 997 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 998 ID.AddPointer(Elt); 999 void *IP = 0; 1000 SDNode *N = NULL; 1001 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1002 if (!VT.isVector()) 1003 return SDValue(N, 0); 1004 1005 if (!N) { 1006 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 1007 CSEMap.InsertNode(N, IP); 1008 AllNodes.push_back(N); 1009 } 1010 1011 SDValue Result(N, 0); 1012 if (VT.isVector()) { 1013 SmallVector<SDValue, 8> Ops; 1014 Ops.assign(VT.getVectorNumElements(), Result); 1015 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1016 } 1017 return Result; 1018} 1019 1020SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 1021 return getConstant(Val, TLI.getPointerTy(), isTarget); 1022} 1023 1024 1025SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1026 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1027} 1028 1029SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1030 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1031 1032 EVT EltVT = VT.getScalarType(); 1033 1034 // Do the map lookup using the actual bit pattern for the floating point 1035 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1036 // we don't have issues with SNANs. 1037 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1038 FoldingSetNodeID ID; 1039 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1040 ID.AddPointer(&V); 1041 void *IP = 0; 1042 SDNode *N = NULL; 1043 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1044 if (!VT.isVector()) 1045 return SDValue(N, 0); 1046 1047 if (!N) { 1048 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1049 CSEMap.InsertNode(N, IP); 1050 AllNodes.push_back(N); 1051 } 1052 1053 SDValue Result(N, 0); 1054 if (VT.isVector()) { 1055 SmallVector<SDValue, 8> Ops; 1056 Ops.assign(VT.getVectorNumElements(), Result); 1057 // FIXME DebugLoc info might be appropriate here 1058 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1059 } 1060 return Result; 1061} 1062 1063SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1064 EVT EltVT = VT.getScalarType(); 1065 if (EltVT==MVT::f32) 1066 return getConstantFP(APFloat((float)Val), VT, isTarget); 1067 else if (EltVT==MVT::f64) 1068 return getConstantFP(APFloat(Val), VT, isTarget); 1069 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 || 1070 EltVT==MVT::f16) { 1071 bool ignored; 1072 APFloat apf = APFloat(Val); 1073 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1074 &ignored); 1075 return getConstantFP(apf, VT, isTarget); 1076 } else 1077 llvm_unreachable("Unsupported type in getConstantFP"); 1078} 1079 1080SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1081 EVT VT, int64_t Offset, 1082 bool isTargetGA, 1083 unsigned char TargetFlags) { 1084 assert((TargetFlags == 0 || isTargetGA) && 1085 "Cannot set target flags on target-independent globals"); 1086 1087 // Truncate (with sign-extension) the offset value to the pointer size. 1088 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 1089 if (BitWidth < 64) 1090 Offset = SignExtend64(Offset, BitWidth); 1091 1092 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1093 if (!GVar) { 1094 // If GV is an alias then use the aliasee for determining thread-localness. 1095 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1096 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1097 } 1098 1099 unsigned Opc; 1100 if (GVar && GVar->isThreadLocal()) 1101 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1102 else 1103 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1104 1105 FoldingSetNodeID ID; 1106 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1107 ID.AddPointer(GV); 1108 ID.AddInteger(Offset); 1109 ID.AddInteger(TargetFlags); 1110 ID.AddInteger(GV->getType()->getAddressSpace()); 1111 void *IP = 0; 1112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1113 return SDValue(E, 0); 1114 1115 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1116 Offset, TargetFlags); 1117 CSEMap.InsertNode(N, IP); 1118 AllNodes.push_back(N); 1119 return SDValue(N, 0); 1120} 1121 1122SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1123 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1124 FoldingSetNodeID ID; 1125 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1126 ID.AddInteger(FI); 1127 void *IP = 0; 1128 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1129 return SDValue(E, 0); 1130 1131 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1132 CSEMap.InsertNode(N, IP); 1133 AllNodes.push_back(N); 1134 return SDValue(N, 0); 1135} 1136 1137SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1138 unsigned char TargetFlags) { 1139 assert((TargetFlags == 0 || isTarget) && 1140 "Cannot set target flags on target-independent jump tables"); 1141 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1142 FoldingSetNodeID ID; 1143 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1144 ID.AddInteger(JTI); 1145 ID.AddInteger(TargetFlags); 1146 void *IP = 0; 1147 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1148 return SDValue(E, 0); 1149 1150 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1151 TargetFlags); 1152 CSEMap.InsertNode(N, IP); 1153 AllNodes.push_back(N); 1154 return SDValue(N, 0); 1155} 1156 1157SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1158 unsigned Alignment, int Offset, 1159 bool isTarget, 1160 unsigned char TargetFlags) { 1161 assert((TargetFlags == 0 || isTarget) && 1162 "Cannot set target flags on target-independent globals"); 1163 if (Alignment == 0) 1164 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType()); 1165 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1166 FoldingSetNodeID ID; 1167 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1168 ID.AddInteger(Alignment); 1169 ID.AddInteger(Offset); 1170 ID.AddPointer(C); 1171 ID.AddInteger(TargetFlags); 1172 void *IP = 0; 1173 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1174 return SDValue(E, 0); 1175 1176 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1177 Alignment, TargetFlags); 1178 CSEMap.InsertNode(N, IP); 1179 AllNodes.push_back(N); 1180 return SDValue(N, 0); 1181} 1182 1183 1184SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1185 unsigned Alignment, int Offset, 1186 bool isTarget, 1187 unsigned char TargetFlags) { 1188 assert((TargetFlags == 0 || isTarget) && 1189 "Cannot set target flags on target-independent globals"); 1190 if (Alignment == 0) 1191 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType()); 1192 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1193 FoldingSetNodeID ID; 1194 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1195 ID.AddInteger(Alignment); 1196 ID.AddInteger(Offset); 1197 C->addSelectionDAGCSEId(ID); 1198 ID.AddInteger(TargetFlags); 1199 void *IP = 0; 1200 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1201 return SDValue(E, 0); 1202 1203 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1204 Alignment, TargetFlags); 1205 CSEMap.InsertNode(N, IP); 1206 AllNodes.push_back(N); 1207 return SDValue(N, 0); 1208} 1209 1210SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset, 1211 unsigned char TargetFlags) { 1212 FoldingSetNodeID ID; 1213 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0); 1214 ID.AddInteger(Index); 1215 ID.AddInteger(Offset); 1216 ID.AddInteger(TargetFlags); 1217 void *IP = 0; 1218 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1219 return SDValue(E, 0); 1220 1221 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, 1222 TargetFlags); 1223 CSEMap.InsertNode(N, IP); 1224 AllNodes.push_back(N); 1225 return SDValue(N, 0); 1226} 1227 1228SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1229 FoldingSetNodeID ID; 1230 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1231 ID.AddPointer(MBB); 1232 void *IP = 0; 1233 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1234 return SDValue(E, 0); 1235 1236 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1237 CSEMap.InsertNode(N, IP); 1238 AllNodes.push_back(N); 1239 return SDValue(N, 0); 1240} 1241 1242SDValue SelectionDAG::getValueType(EVT VT) { 1243 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1244 ValueTypeNodes.size()) 1245 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1246 1247 SDNode *&N = VT.isExtended() ? 1248 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1249 1250 if (N) return SDValue(N, 0); 1251 N = new (NodeAllocator) VTSDNode(VT); 1252 AllNodes.push_back(N); 1253 return SDValue(N, 0); 1254} 1255 1256SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1257 SDNode *&N = ExternalSymbols[Sym]; 1258 if (N) return SDValue(N, 0); 1259 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1260 AllNodes.push_back(N); 1261 return SDValue(N, 0); 1262} 1263 1264SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1265 unsigned char TargetFlags) { 1266 SDNode *&N = 1267 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1268 TargetFlags)]; 1269 if (N) return SDValue(N, 0); 1270 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1271 AllNodes.push_back(N); 1272 return SDValue(N, 0); 1273} 1274 1275SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1276 if ((unsigned)Cond >= CondCodeNodes.size()) 1277 CondCodeNodes.resize(Cond+1); 1278 1279 if (CondCodeNodes[Cond] == 0) { 1280 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1281 CondCodeNodes[Cond] = N; 1282 AllNodes.push_back(N); 1283 } 1284 1285 return SDValue(CondCodeNodes[Cond], 0); 1286} 1287 1288// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1289// the shuffle mask M that point at N1 to point at N2, and indices that point 1290// N2 to point at N1. 1291static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1292 std::swap(N1, N2); 1293 int NElts = M.size(); 1294 for (int i = 0; i != NElts; ++i) { 1295 if (M[i] >= NElts) 1296 M[i] -= NElts; 1297 else if (M[i] >= 0) 1298 M[i] += NElts; 1299 } 1300} 1301 1302SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1303 SDValue N2, const int *Mask) { 1304 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1305 assert(VT.isVector() && N1.getValueType().isVector() && 1306 "Vector Shuffle VTs must be a vectors"); 1307 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1308 && "Vector Shuffle VTs must have same element type"); 1309 1310 // Canonicalize shuffle undef, undef -> undef 1311 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1312 return getUNDEF(VT); 1313 1314 // Validate that all indices in Mask are within the range of the elements 1315 // input to the shuffle. 1316 unsigned NElts = VT.getVectorNumElements(); 1317 SmallVector<int, 8> MaskVec; 1318 for (unsigned i = 0; i != NElts; ++i) { 1319 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1320 MaskVec.push_back(Mask[i]); 1321 } 1322 1323 // Canonicalize shuffle v, v -> v, undef 1324 if (N1 == N2) { 1325 N2 = getUNDEF(VT); 1326 for (unsigned i = 0; i != NElts; ++i) 1327 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1328 } 1329 1330 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1331 if (N1.getOpcode() == ISD::UNDEF) 1332 commuteShuffle(N1, N2, MaskVec); 1333 1334 // Canonicalize all index into lhs, -> shuffle lhs, undef 1335 // Canonicalize all index into rhs, -> shuffle rhs, undef 1336 bool AllLHS = true, AllRHS = true; 1337 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1338 for (unsigned i = 0; i != NElts; ++i) { 1339 if (MaskVec[i] >= (int)NElts) { 1340 if (N2Undef) 1341 MaskVec[i] = -1; 1342 else 1343 AllLHS = false; 1344 } else if (MaskVec[i] >= 0) { 1345 AllRHS = false; 1346 } 1347 } 1348 if (AllLHS && AllRHS) 1349 return getUNDEF(VT); 1350 if (AllLHS && !N2Undef) 1351 N2 = getUNDEF(VT); 1352 if (AllRHS) { 1353 N1 = getUNDEF(VT); 1354 commuteShuffle(N1, N2, MaskVec); 1355 } 1356 1357 // If Identity shuffle, or all shuffle in to undef, return that node. 1358 bool AllUndef = true; 1359 bool Identity = true; 1360 for (unsigned i = 0; i != NElts; ++i) { 1361 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1362 if (MaskVec[i] >= 0) AllUndef = false; 1363 } 1364 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1365 return N1; 1366 if (AllUndef) 1367 return getUNDEF(VT); 1368 1369 FoldingSetNodeID ID; 1370 SDValue Ops[2] = { N1, N2 }; 1371 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1372 for (unsigned i = 0; i != NElts; ++i) 1373 ID.AddInteger(MaskVec[i]); 1374 1375 void* IP = 0; 1376 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1377 return SDValue(E, 0); 1378 1379 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1380 // SDNode doesn't have access to it. This memory will be "leaked" when 1381 // the node is deallocated, but recovered when the NodeAllocator is released. 1382 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1383 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1384 1385 ShuffleVectorSDNode *N = 1386 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1387 CSEMap.InsertNode(N, IP); 1388 AllNodes.push_back(N); 1389 return SDValue(N, 0); 1390} 1391 1392SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1393 SDValue Val, SDValue DTy, 1394 SDValue STy, SDValue Rnd, SDValue Sat, 1395 ISD::CvtCode Code) { 1396 // If the src and dest types are the same and the conversion is between 1397 // integer types of the same sign or two floats, no conversion is necessary. 1398 if (DTy == STy && 1399 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1400 return Val; 1401 1402 FoldingSetNodeID ID; 1403 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1404 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1405 void* IP = 0; 1406 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1407 return SDValue(E, 0); 1408 1409 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1410 Code); 1411 CSEMap.InsertNode(N, IP); 1412 AllNodes.push_back(N); 1413 return SDValue(N, 0); 1414} 1415 1416SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1417 FoldingSetNodeID ID; 1418 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1419 ID.AddInteger(RegNo); 1420 void *IP = 0; 1421 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1422 return SDValue(E, 0); 1423 1424 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1425 CSEMap.InsertNode(N, IP); 1426 AllNodes.push_back(N); 1427 return SDValue(N, 0); 1428} 1429 1430SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1431 FoldingSetNodeID ID; 1432 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1433 ID.AddPointer(RegMask); 1434 void *IP = 0; 1435 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1436 return SDValue(E, 0); 1437 1438 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1439 CSEMap.InsertNode(N, IP); 1440 AllNodes.push_back(N); 1441 return SDValue(N, 0); 1442} 1443 1444SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1445 FoldingSetNodeID ID; 1446 SDValue Ops[] = { Root }; 1447 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1448 ID.AddPointer(Label); 1449 void *IP = 0; 1450 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1451 return SDValue(E, 0); 1452 1453 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1454 CSEMap.InsertNode(N, IP); 1455 AllNodes.push_back(N); 1456 return SDValue(N, 0); 1457} 1458 1459 1460SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1461 int64_t Offset, 1462 bool isTarget, 1463 unsigned char TargetFlags) { 1464 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1465 1466 FoldingSetNodeID ID; 1467 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1468 ID.AddPointer(BA); 1469 ID.AddInteger(Offset); 1470 ID.AddInteger(TargetFlags); 1471 void *IP = 0; 1472 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1473 return SDValue(E, 0); 1474 1475 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset, 1476 TargetFlags); 1477 CSEMap.InsertNode(N, IP); 1478 AllNodes.push_back(N); 1479 return SDValue(N, 0); 1480} 1481 1482SDValue SelectionDAG::getSrcValue(const Value *V) { 1483 assert((!V || V->getType()->isPointerTy()) && 1484 "SrcValue is not a pointer?"); 1485 1486 FoldingSetNodeID ID; 1487 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1488 ID.AddPointer(V); 1489 1490 void *IP = 0; 1491 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1492 return SDValue(E, 0); 1493 1494 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1495 CSEMap.InsertNode(N, IP); 1496 AllNodes.push_back(N); 1497 return SDValue(N, 0); 1498} 1499 1500/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1501SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1502 FoldingSetNodeID ID; 1503 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1504 ID.AddPointer(MD); 1505 1506 void *IP = 0; 1507 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1508 return SDValue(E, 0); 1509 1510 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1511 CSEMap.InsertNode(N, IP); 1512 AllNodes.push_back(N); 1513 return SDValue(N, 0); 1514} 1515 1516 1517/// getShiftAmountOperand - Return the specified value casted to 1518/// the target's desired shift amount type. 1519SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1520 EVT OpTy = Op.getValueType(); 1521 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1522 if (OpTy == ShTy || OpTy.isVector()) return Op; 1523 1524 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1525 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1526} 1527 1528/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1529/// specified value type. 1530SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1531 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1532 unsigned ByteSize = VT.getStoreSize(); 1533 Type *Ty = VT.getTypeForEVT(*getContext()); 1534 unsigned StackAlign = 1535 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign); 1536 1537 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1538 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1539} 1540 1541/// CreateStackTemporary - Create a stack temporary suitable for holding 1542/// either of the specified value types. 1543SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1544 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1545 VT2.getStoreSizeInBits())/8; 1546 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1547 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1548 const DataLayout *TD = TLI.getDataLayout(); 1549 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1550 TD->getPrefTypeAlignment(Ty2)); 1551 1552 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1553 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1554 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1555} 1556 1557SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1558 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1559 // These setcc operations always fold. 1560 switch (Cond) { 1561 default: break; 1562 case ISD::SETFALSE: 1563 case ISD::SETFALSE2: return getConstant(0, VT); 1564 case ISD::SETTRUE: 1565 case ISD::SETTRUE2: return getConstant(1, VT); 1566 1567 case ISD::SETOEQ: 1568 case ISD::SETOGT: 1569 case ISD::SETOGE: 1570 case ISD::SETOLT: 1571 case ISD::SETOLE: 1572 case ISD::SETONE: 1573 case ISD::SETO: 1574 case ISD::SETUO: 1575 case ISD::SETUEQ: 1576 case ISD::SETUNE: 1577 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1578 break; 1579 } 1580 1581 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1582 const APInt &C2 = N2C->getAPIntValue(); 1583 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1584 const APInt &C1 = N1C->getAPIntValue(); 1585 1586 switch (Cond) { 1587 default: llvm_unreachable("Unknown integer setcc!"); 1588 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1589 case ISD::SETNE: return getConstant(C1 != C2, VT); 1590 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1591 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1592 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1593 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1594 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1595 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1596 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1597 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1598 } 1599 } 1600 } 1601 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1602 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1603 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1604 switch (Cond) { 1605 default: break; 1606 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1607 return getUNDEF(VT); 1608 // fall through 1609 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1610 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1611 return getUNDEF(VT); 1612 // fall through 1613 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1614 R==APFloat::cmpLessThan, VT); 1615 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1616 return getUNDEF(VT); 1617 // fall through 1618 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1619 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1620 return getUNDEF(VT); 1621 // fall through 1622 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1623 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1624 return getUNDEF(VT); 1625 // fall through 1626 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1627 R==APFloat::cmpEqual, VT); 1628 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1629 return getUNDEF(VT); 1630 // fall through 1631 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1632 R==APFloat::cmpEqual, VT); 1633 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1634 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1635 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1636 R==APFloat::cmpEqual, VT); 1637 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1638 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1639 R==APFloat::cmpLessThan, VT); 1640 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1641 R==APFloat::cmpUnordered, VT); 1642 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1643 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1644 } 1645 } else { 1646 // Ensure that the constant occurs on the RHS. 1647 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1648 } 1649 } 1650 1651 // Could not fold it. 1652 return SDValue(); 1653} 1654 1655/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1656/// use this predicate to simplify operations downstream. 1657bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1658 // This predicate is not safe for vector operations. 1659 if (Op.getValueType().isVector()) 1660 return false; 1661 1662 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1663 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1664} 1665 1666/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1667/// this predicate to simplify operations downstream. Mask is known to be zero 1668/// for bits that V cannot have. 1669bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1670 unsigned Depth) const { 1671 APInt KnownZero, KnownOne; 1672 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1673 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1674 return (KnownZero & Mask) == Mask; 1675} 1676 1677/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1678/// known to be either zero or one and return them in the KnownZero/KnownOne 1679/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1680/// processing. 1681void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1682 APInt &KnownOne, unsigned Depth) const { 1683 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1684 1685 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1686 if (Depth == 6) 1687 return; // Limit search depth. 1688 1689 APInt KnownZero2, KnownOne2; 1690 1691 switch (Op.getOpcode()) { 1692 case ISD::Constant: 1693 // We know all of the bits for a constant! 1694 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1695 KnownZero = ~KnownOne; 1696 return; 1697 case ISD::AND: 1698 // If either the LHS or the RHS are Zero, the result is zero. 1699 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1700 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1701 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1702 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1703 1704 // Output known-1 bits are only known if set in both the LHS & RHS. 1705 KnownOne &= KnownOne2; 1706 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1707 KnownZero |= KnownZero2; 1708 return; 1709 case ISD::OR: 1710 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1711 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1712 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1713 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1714 1715 // Output known-0 bits are only known if clear in both the LHS & RHS. 1716 KnownZero &= KnownZero2; 1717 // Output known-1 are known to be set if set in either the LHS | RHS. 1718 KnownOne |= KnownOne2; 1719 return; 1720 case ISD::XOR: { 1721 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1722 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1723 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1724 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1725 1726 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1727 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1728 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1729 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1730 KnownZero = KnownZeroOut; 1731 return; 1732 } 1733 case ISD::MUL: { 1734 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1735 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1737 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1738 1739 // If low bits are zero in either operand, output low known-0 bits. 1740 // Also compute a conserative estimate for high known-0 bits. 1741 // More trickiness is possible, but this is sufficient for the 1742 // interesting case of alignment computation. 1743 KnownOne.clearAllBits(); 1744 unsigned TrailZ = KnownZero.countTrailingOnes() + 1745 KnownZero2.countTrailingOnes(); 1746 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1747 KnownZero2.countLeadingOnes(), 1748 BitWidth) - BitWidth; 1749 1750 TrailZ = std::min(TrailZ, BitWidth); 1751 LeadZ = std::min(LeadZ, BitWidth); 1752 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1753 APInt::getHighBitsSet(BitWidth, LeadZ); 1754 return; 1755 } 1756 case ISD::UDIV: { 1757 // For the purposes of computing leading zeros we can conservatively 1758 // treat a udiv as a logical right shift by the power of 2 known to 1759 // be less than the denominator. 1760 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1761 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1762 1763 KnownOne2.clearAllBits(); 1764 KnownZero2.clearAllBits(); 1765 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1766 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1767 if (RHSUnknownLeadingOnes != BitWidth) 1768 LeadZ = std::min(BitWidth, 1769 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1770 1771 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1772 return; 1773 } 1774 case ISD::SELECT: 1775 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1776 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1777 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1778 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1779 1780 // Only known if known in both the LHS and RHS. 1781 KnownOne &= KnownOne2; 1782 KnownZero &= KnownZero2; 1783 return; 1784 case ISD::SELECT_CC: 1785 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1786 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1787 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1788 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1789 1790 // Only known if known in both the LHS and RHS. 1791 KnownOne &= KnownOne2; 1792 KnownZero &= KnownZero2; 1793 return; 1794 case ISD::SADDO: 1795 case ISD::UADDO: 1796 case ISD::SSUBO: 1797 case ISD::USUBO: 1798 case ISD::SMULO: 1799 case ISD::UMULO: 1800 if (Op.getResNo() != 1) 1801 return; 1802 // The boolean result conforms to getBooleanContents. Fall through. 1803 case ISD::SETCC: 1804 // If we know the result of a setcc has the top bits zero, use this info. 1805 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1806 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1807 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1808 return; 1809 case ISD::SHL: 1810 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1811 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1812 unsigned ShAmt = SA->getZExtValue(); 1813 1814 // If the shift count is an invalid immediate, don't do anything. 1815 if (ShAmt >= BitWidth) 1816 return; 1817 1818 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1819 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1820 KnownZero <<= ShAmt; 1821 KnownOne <<= ShAmt; 1822 // low bits known zero. 1823 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1824 } 1825 return; 1826 case ISD::SRL: 1827 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1828 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1829 unsigned ShAmt = SA->getZExtValue(); 1830 1831 // If the shift count is an invalid immediate, don't do anything. 1832 if (ShAmt >= BitWidth) 1833 return; 1834 1835 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1836 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1837 KnownZero = KnownZero.lshr(ShAmt); 1838 KnownOne = KnownOne.lshr(ShAmt); 1839 1840 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1841 KnownZero |= HighBits; // High bits known zero. 1842 } 1843 return; 1844 case ISD::SRA: 1845 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1846 unsigned ShAmt = SA->getZExtValue(); 1847 1848 // If the shift count is an invalid immediate, don't do anything. 1849 if (ShAmt >= BitWidth) 1850 return; 1851 1852 // If any of the demanded bits are produced by the sign extension, we also 1853 // demand the input sign bit. 1854 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1855 1856 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1857 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1858 KnownZero = KnownZero.lshr(ShAmt); 1859 KnownOne = KnownOne.lshr(ShAmt); 1860 1861 // Handle the sign bits. 1862 APInt SignBit = APInt::getSignBit(BitWidth); 1863 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1864 1865 if (KnownZero.intersects(SignBit)) { 1866 KnownZero |= HighBits; // New bits are known zero. 1867 } else if (KnownOne.intersects(SignBit)) { 1868 KnownOne |= HighBits; // New bits are known one. 1869 } 1870 } 1871 return; 1872 case ISD::SIGN_EXTEND_INREG: { 1873 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1874 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1875 1876 // Sign extension. Compute the demanded bits in the result that are not 1877 // present in the input. 1878 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1879 1880 APInt InSignBit = APInt::getSignBit(EBits); 1881 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1882 1883 // If the sign extended bits are demanded, we know that the sign 1884 // bit is demanded. 1885 InSignBit = InSignBit.zext(BitWidth); 1886 if (NewBits.getBoolValue()) 1887 InputDemandedBits |= InSignBit; 1888 1889 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1890 KnownOne &= InputDemandedBits; 1891 KnownZero &= InputDemandedBits; 1892 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1893 1894 // If the sign bit of the input is known set or clear, then we know the 1895 // top bits of the result. 1896 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1897 KnownZero |= NewBits; 1898 KnownOne &= ~NewBits; 1899 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1900 KnownOne |= NewBits; 1901 KnownZero &= ~NewBits; 1902 } else { // Input sign bit unknown 1903 KnownZero &= ~NewBits; 1904 KnownOne &= ~NewBits; 1905 } 1906 return; 1907 } 1908 case ISD::CTTZ: 1909 case ISD::CTTZ_ZERO_UNDEF: 1910 case ISD::CTLZ: 1911 case ISD::CTLZ_ZERO_UNDEF: 1912 case ISD::CTPOP: { 1913 unsigned LowBits = Log2_32(BitWidth)+1; 1914 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1915 KnownOne.clearAllBits(); 1916 return; 1917 } 1918 case ISD::LOAD: { 1919 LoadSDNode *LD = cast<LoadSDNode>(Op); 1920 if (ISD::isZEXTLoad(Op.getNode())) { 1921 EVT VT = LD->getMemoryVT(); 1922 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1923 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1924 } else if (const MDNode *Ranges = LD->getRanges()) { 1925 computeMaskedBitsLoad(*Ranges, KnownZero); 1926 } 1927 return; 1928 } 1929 case ISD::ZERO_EXTEND: { 1930 EVT InVT = Op.getOperand(0).getValueType(); 1931 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1932 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1933 KnownZero = KnownZero.trunc(InBits); 1934 KnownOne = KnownOne.trunc(InBits); 1935 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1936 KnownZero = KnownZero.zext(BitWidth); 1937 KnownOne = KnownOne.zext(BitWidth); 1938 KnownZero |= NewBits; 1939 return; 1940 } 1941 case ISD::SIGN_EXTEND: { 1942 EVT InVT = Op.getOperand(0).getValueType(); 1943 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1944 APInt InSignBit = APInt::getSignBit(InBits); 1945 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1946 1947 KnownZero = KnownZero.trunc(InBits); 1948 KnownOne = KnownOne.trunc(InBits); 1949 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1950 1951 // Note if the sign bit is known to be zero or one. 1952 bool SignBitKnownZero = KnownZero.isNegative(); 1953 bool SignBitKnownOne = KnownOne.isNegative(); 1954 assert(!(SignBitKnownZero && SignBitKnownOne) && 1955 "Sign bit can't be known to be both zero and one!"); 1956 1957 KnownZero = KnownZero.zext(BitWidth); 1958 KnownOne = KnownOne.zext(BitWidth); 1959 1960 // If the sign bit is known zero or one, the top bits match. 1961 if (SignBitKnownZero) 1962 KnownZero |= NewBits; 1963 else if (SignBitKnownOne) 1964 KnownOne |= NewBits; 1965 return; 1966 } 1967 case ISD::ANY_EXTEND: { 1968 EVT InVT = Op.getOperand(0).getValueType(); 1969 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1970 KnownZero = KnownZero.trunc(InBits); 1971 KnownOne = KnownOne.trunc(InBits); 1972 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1973 KnownZero = KnownZero.zext(BitWidth); 1974 KnownOne = KnownOne.zext(BitWidth); 1975 return; 1976 } 1977 case ISD::TRUNCATE: { 1978 EVT InVT = Op.getOperand(0).getValueType(); 1979 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1980 KnownZero = KnownZero.zext(InBits); 1981 KnownOne = KnownOne.zext(InBits); 1982 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1983 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1984 KnownZero = KnownZero.trunc(BitWidth); 1985 KnownOne = KnownOne.trunc(BitWidth); 1986 break; 1987 } 1988 case ISD::AssertZext: { 1989 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1990 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1991 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1992 KnownZero |= (~InMask); 1993 KnownOne &= (~KnownZero); 1994 return; 1995 } 1996 case ISD::FGETSIGN: 1997 // All bits are zero except the low bit. 1998 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1999 return; 2000 2001 case ISD::SUB: { 2002 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 2003 // We know that the top bits of C-X are clear if X contains less bits 2004 // than C (i.e. no wrap-around can happen). For example, 20-X is 2005 // positive if we can prove that X is >= 0 and < 16. 2006 if (CLHS->getAPIntValue().isNonNegative()) { 2007 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 2008 // NLZ can't be BitWidth with no sign bit 2009 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 2010 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2011 2012 // If all of the MaskV bits are known to be zero, then we know the 2013 // output top bits are zero, because we now know that the output is 2014 // from [0-C]. 2015 if ((KnownZero2 & MaskV) == MaskV) { 2016 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 2017 // Top bits known zero. 2018 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 2019 } 2020 } 2021 } 2022 } 2023 // fall through 2024 case ISD::ADD: 2025 case ISD::ADDE: { 2026 // Output known-0 bits are known if clear or set in both the low clear bits 2027 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2028 // low 3 bits clear. 2029 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 2030 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2031 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2032 2033 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2034 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2035 KnownZeroOut = std::min(KnownZeroOut, 2036 KnownZero2.countTrailingOnes()); 2037 2038 if (Op.getOpcode() == ISD::ADD) { 2039 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2040 return; 2041 } 2042 2043 // With ADDE, a carry bit may be added in, so we can only use this 2044 // information if we know (at least) that the low two bits are clear. We 2045 // then return to the caller that the low bit is unknown but that other bits 2046 // are known zero. 2047 if (KnownZeroOut >= 2) // ADDE 2048 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2049 return; 2050 } 2051 case ISD::SREM: 2052 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2053 const APInt &RA = Rem->getAPIntValue().abs(); 2054 if (RA.isPowerOf2()) { 2055 APInt LowBits = RA - 1; 2056 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2057 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2058 2059 // The low bits of the first operand are unchanged by the srem. 2060 KnownZero = KnownZero2 & LowBits; 2061 KnownOne = KnownOne2 & LowBits; 2062 2063 // If the first operand is non-negative or has all low bits zero, then 2064 // the upper bits are all zero. 2065 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2066 KnownZero |= ~LowBits; 2067 2068 // If the first operand is negative and not all low bits are zero, then 2069 // the upper bits are all one. 2070 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2071 KnownOne |= ~LowBits; 2072 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2073 } 2074 } 2075 return; 2076 case ISD::UREM: { 2077 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2078 const APInt &RA = Rem->getAPIntValue(); 2079 if (RA.isPowerOf2()) { 2080 APInt LowBits = (RA - 1); 2081 KnownZero |= ~LowBits; 2082 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2083 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2084 break; 2085 } 2086 } 2087 2088 // Since the result is less than or equal to either operand, any leading 2089 // zero bits in either operand must also exist in the result. 2090 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2091 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2092 2093 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2094 KnownZero2.countLeadingOnes()); 2095 KnownOne.clearAllBits(); 2096 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2097 return; 2098 } 2099 case ISD::FrameIndex: 2100 case ISD::TargetFrameIndex: 2101 if (unsigned Align = InferPtrAlignment(Op)) { 2102 // The low bits are known zero if the pointer is aligned. 2103 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2104 return; 2105 } 2106 break; 2107 2108 default: 2109 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2110 break; 2111 // Fallthrough 2112 case ISD::INTRINSIC_WO_CHAIN: 2113 case ISD::INTRINSIC_W_CHAIN: 2114 case ISD::INTRINSIC_VOID: 2115 // Allow the target to implement this method for its nodes. 2116 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2117 return; 2118 } 2119} 2120 2121/// ComputeNumSignBits - Return the number of times the sign bit of the 2122/// register is replicated into the other bits. We know that at least 1 bit 2123/// is always equal to the sign bit (itself), but other cases can give us 2124/// information. For example, immediately after an "SRA X, 2", we know that 2125/// the top 3 bits are all equal to each other, so we return 3. 2126unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2127 EVT VT = Op.getValueType(); 2128 assert(VT.isInteger() && "Invalid VT!"); 2129 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2130 unsigned Tmp, Tmp2; 2131 unsigned FirstAnswer = 1; 2132 2133 if (Depth == 6) 2134 return 1; // Limit search depth. 2135 2136 switch (Op.getOpcode()) { 2137 default: break; 2138 case ISD::AssertSext: 2139 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2140 return VTBits-Tmp+1; 2141 case ISD::AssertZext: 2142 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2143 return VTBits-Tmp; 2144 2145 case ISD::Constant: { 2146 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2147 return Val.getNumSignBits(); 2148 } 2149 2150 case ISD::SIGN_EXTEND: 2151 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2152 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2153 2154 case ISD::SIGN_EXTEND_INREG: 2155 // Max of the input and what this extends. 2156 Tmp = 2157 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2158 Tmp = VTBits-Tmp+1; 2159 2160 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2161 return std::max(Tmp, Tmp2); 2162 2163 case ISD::SRA: 2164 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2165 // SRA X, C -> adds C sign bits. 2166 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2167 Tmp += C->getZExtValue(); 2168 if (Tmp > VTBits) Tmp = VTBits; 2169 } 2170 return Tmp; 2171 case ISD::SHL: 2172 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2173 // shl destroys sign bits. 2174 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2175 if (C->getZExtValue() >= VTBits || // Bad shift. 2176 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2177 return Tmp - C->getZExtValue(); 2178 } 2179 break; 2180 case ISD::AND: 2181 case ISD::OR: 2182 case ISD::XOR: // NOT is handled here. 2183 // Logical binary ops preserve the number of sign bits at the worst. 2184 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2185 if (Tmp != 1) { 2186 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2187 FirstAnswer = std::min(Tmp, Tmp2); 2188 // We computed what we know about the sign bits as our first 2189 // answer. Now proceed to the generic code that uses 2190 // ComputeMaskedBits, and pick whichever answer is better. 2191 } 2192 break; 2193 2194 case ISD::SELECT: 2195 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2196 if (Tmp == 1) return 1; // Early out. 2197 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2198 return std::min(Tmp, Tmp2); 2199 2200 case ISD::SADDO: 2201 case ISD::UADDO: 2202 case ISD::SSUBO: 2203 case ISD::USUBO: 2204 case ISD::SMULO: 2205 case ISD::UMULO: 2206 if (Op.getResNo() != 1) 2207 break; 2208 // The boolean result conforms to getBooleanContents. Fall through. 2209 case ISD::SETCC: 2210 // If setcc returns 0/-1, all bits are sign bits. 2211 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2212 TargetLowering::ZeroOrNegativeOneBooleanContent) 2213 return VTBits; 2214 break; 2215 case ISD::ROTL: 2216 case ISD::ROTR: 2217 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2218 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2219 2220 // Handle rotate right by N like a rotate left by 32-N. 2221 if (Op.getOpcode() == ISD::ROTR) 2222 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2223 2224 // If we aren't rotating out all of the known-in sign bits, return the 2225 // number that are left. This handles rotl(sext(x), 1) for example. 2226 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2227 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2228 } 2229 break; 2230 case ISD::ADD: 2231 // Add can have at most one carry bit. Thus we know that the output 2232 // is, at worst, one more bit than the inputs. 2233 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2234 if (Tmp == 1) return 1; // Early out. 2235 2236 // Special case decrementing a value (ADD X, -1): 2237 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2238 if (CRHS->isAllOnesValue()) { 2239 APInt KnownZero, KnownOne; 2240 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2241 2242 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2243 // sign bits set. 2244 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2245 return VTBits; 2246 2247 // If we are subtracting one from a positive number, there is no carry 2248 // out of the result. 2249 if (KnownZero.isNegative()) 2250 return Tmp; 2251 } 2252 2253 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2254 if (Tmp2 == 1) return 1; 2255 return std::min(Tmp, Tmp2)-1; 2256 2257 case ISD::SUB: 2258 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2259 if (Tmp2 == 1) return 1; 2260 2261 // Handle NEG. 2262 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2263 if (CLHS->isNullValue()) { 2264 APInt KnownZero, KnownOne; 2265 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2266 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2267 // sign bits set. 2268 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2269 return VTBits; 2270 2271 // If the input is known to be positive (the sign bit is known clear), 2272 // the output of the NEG has the same number of sign bits as the input. 2273 if (KnownZero.isNegative()) 2274 return Tmp2; 2275 2276 // Otherwise, we treat this like a SUB. 2277 } 2278 2279 // Sub can have at most one carry bit. Thus we know that the output 2280 // is, at worst, one more bit than the inputs. 2281 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2282 if (Tmp == 1) return 1; // Early out. 2283 return std::min(Tmp, Tmp2)-1; 2284 case ISD::TRUNCATE: 2285 // FIXME: it's tricky to do anything useful for this, but it is an important 2286 // case for targets like X86. 2287 break; 2288 } 2289 2290 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2291 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 2292 unsigned ExtType = LD->getExtensionType(); 2293 switch (ExtType) { 2294 default: break; 2295 case ISD::SEXTLOAD: // '17' bits known 2296 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2297 return VTBits-Tmp+1; 2298 case ISD::ZEXTLOAD: // '16' bits known 2299 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2300 return VTBits-Tmp; 2301 } 2302 } 2303 2304 // Allow the target to implement this method for its nodes. 2305 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2306 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2307 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2308 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2309 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2310 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2311 } 2312 2313 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2314 // use this information. 2315 APInt KnownZero, KnownOne; 2316 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2317 2318 APInt Mask; 2319 if (KnownZero.isNegative()) { // sign bit is 0 2320 Mask = KnownZero; 2321 } else if (KnownOne.isNegative()) { // sign bit is 1; 2322 Mask = KnownOne; 2323 } else { 2324 // Nothing known. 2325 return FirstAnswer; 2326 } 2327 2328 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2329 // the number of identical bits in the top of the input value. 2330 Mask = ~Mask; 2331 Mask <<= Mask.getBitWidth()-VTBits; 2332 // Return # leading zeros. We use 'min' here in case Val was zero before 2333 // shifting. We don't want to return '64' as for an i32 "0". 2334 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2335} 2336 2337/// isBaseWithConstantOffset - Return true if the specified operand is an 2338/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2339/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2340/// semantics as an ADD. This handles the equivalence: 2341/// X|Cst == X+Cst iff X&Cst = 0. 2342bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2343 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2344 !isa<ConstantSDNode>(Op.getOperand(1))) 2345 return false; 2346 2347 if (Op.getOpcode() == ISD::OR && 2348 !MaskedValueIsZero(Op.getOperand(0), 2349 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2350 return false; 2351 2352 return true; 2353} 2354 2355 2356bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2357 // If we're told that NaNs won't happen, assume they won't. 2358 if (getTarget().Options.NoNaNsFPMath) 2359 return true; 2360 2361 // If the value is a constant, we can obviously see if it is a NaN or not. 2362 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2363 return !C->getValueAPF().isNaN(); 2364 2365 // TODO: Recognize more cases here. 2366 2367 return false; 2368} 2369 2370bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2371 // If the value is a constant, we can obviously see if it is a zero or not. 2372 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2373 return !C->isZero(); 2374 2375 // TODO: Recognize more cases here. 2376 switch (Op.getOpcode()) { 2377 default: break; 2378 case ISD::OR: 2379 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2380 return !C->isNullValue(); 2381 break; 2382 } 2383 2384 return false; 2385} 2386 2387bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2388 // Check the obvious case. 2389 if (A == B) return true; 2390 2391 // For for negative and positive zero. 2392 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2393 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2394 if (CA->isZero() && CB->isZero()) return true; 2395 2396 // Otherwise they may not be equal. 2397 return false; 2398} 2399 2400/// getNode - Gets or creates the specified node. 2401/// 2402SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2403 FoldingSetNodeID ID; 2404 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2405 void *IP = 0; 2406 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2407 return SDValue(E, 0); 2408 2409 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2410 CSEMap.InsertNode(N, IP); 2411 2412 AllNodes.push_back(N); 2413#ifndef NDEBUG 2414 VerifySDNode(N); 2415#endif 2416 return SDValue(N, 0); 2417} 2418 2419SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2420 EVT VT, SDValue Operand) { 2421 // Constant fold unary operations with an integer constant operand. 2422 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2423 const APInt &Val = C->getAPIntValue(); 2424 switch (Opcode) { 2425 default: break; 2426 case ISD::SIGN_EXTEND: 2427 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2428 case ISD::ANY_EXTEND: 2429 case ISD::ZERO_EXTEND: 2430 case ISD::TRUNCATE: 2431 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2432 case ISD::UINT_TO_FP: 2433 case ISD::SINT_TO_FP: { 2434 APFloat apf(EVTToAPFloatSemantics(VT), 2435 APInt::getNullValue(VT.getSizeInBits())); 2436 (void)apf.convertFromAPInt(Val, 2437 Opcode==ISD::SINT_TO_FP, 2438 APFloat::rmNearestTiesToEven); 2439 return getConstantFP(apf, VT); 2440 } 2441 case ISD::BITCAST: 2442 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2443 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT); 2444 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2445 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT); 2446 break; 2447 case ISD::BSWAP: 2448 return getConstant(Val.byteSwap(), VT); 2449 case ISD::CTPOP: 2450 return getConstant(Val.countPopulation(), VT); 2451 case ISD::CTLZ: 2452 case ISD::CTLZ_ZERO_UNDEF: 2453 return getConstant(Val.countLeadingZeros(), VT); 2454 case ISD::CTTZ: 2455 case ISD::CTTZ_ZERO_UNDEF: 2456 return getConstant(Val.countTrailingZeros(), VT); 2457 } 2458 } 2459 2460 // Constant fold unary operations with a floating point constant operand. 2461 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2462 APFloat V = C->getValueAPF(); // make copy 2463 switch (Opcode) { 2464 case ISD::FNEG: 2465 V.changeSign(); 2466 return getConstantFP(V, VT); 2467 case ISD::FABS: 2468 V.clearSign(); 2469 return getConstantFP(V, VT); 2470 case ISD::FCEIL: { 2471 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive); 2472 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2473 return getConstantFP(V, VT); 2474 break; 2475 } 2476 case ISD::FTRUNC: { 2477 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero); 2478 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2479 return getConstantFP(V, VT); 2480 break; 2481 } 2482 case ISD::FFLOOR: { 2483 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative); 2484 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2485 return getConstantFP(V, VT); 2486 break; 2487 } 2488 case ISD::FP_EXTEND: { 2489 bool ignored; 2490 // This can return overflow, underflow, or inexact; we don't care. 2491 // FIXME need to be more flexible about rounding mode. 2492 (void)V.convert(EVTToAPFloatSemantics(VT), 2493 APFloat::rmNearestTiesToEven, &ignored); 2494 return getConstantFP(V, VT); 2495 } 2496 case ISD::FP_TO_SINT: 2497 case ISD::FP_TO_UINT: { 2498 integerPart x[2]; 2499 bool ignored; 2500 assert(integerPartWidth >= 64); 2501 // FIXME need to be more flexible about rounding mode. 2502 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2503 Opcode==ISD::FP_TO_SINT, 2504 APFloat::rmTowardZero, &ignored); 2505 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2506 break; 2507 APInt api(VT.getSizeInBits(), x); 2508 return getConstant(api, VT); 2509 } 2510 case ISD::BITCAST: 2511 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2512 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2513 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2514 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2515 break; 2516 } 2517 } 2518 2519 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2520 switch (Opcode) { 2521 case ISD::TokenFactor: 2522 case ISD::MERGE_VALUES: 2523 case ISD::CONCAT_VECTORS: 2524 return Operand; // Factor, merge or concat of one node? No need. 2525 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2526 case ISD::FP_EXTEND: 2527 assert(VT.isFloatingPoint() && 2528 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2529 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2530 assert((!VT.isVector() || 2531 VT.getVectorNumElements() == 2532 Operand.getValueType().getVectorNumElements()) && 2533 "Vector element count mismatch!"); 2534 if (Operand.getOpcode() == ISD::UNDEF) 2535 return getUNDEF(VT); 2536 break; 2537 case ISD::SIGN_EXTEND: 2538 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2539 "Invalid SIGN_EXTEND!"); 2540 if (Operand.getValueType() == VT) return Operand; // noop extension 2541 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2542 "Invalid sext node, dst < src!"); 2543 assert((!VT.isVector() || 2544 VT.getVectorNumElements() == 2545 Operand.getValueType().getVectorNumElements()) && 2546 "Vector element count mismatch!"); 2547 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2548 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2549 else if (OpOpcode == ISD::UNDEF) 2550 // sext(undef) = 0, because the top bits will all be the same. 2551 return getConstant(0, VT); 2552 break; 2553 case ISD::ZERO_EXTEND: 2554 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2555 "Invalid ZERO_EXTEND!"); 2556 if (Operand.getValueType() == VT) return Operand; // noop extension 2557 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2558 "Invalid zext node, dst < src!"); 2559 assert((!VT.isVector() || 2560 VT.getVectorNumElements() == 2561 Operand.getValueType().getVectorNumElements()) && 2562 "Vector element count mismatch!"); 2563 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2564 return getNode(ISD::ZERO_EXTEND, DL, VT, 2565 Operand.getNode()->getOperand(0)); 2566 else if (OpOpcode == ISD::UNDEF) 2567 // zext(undef) = 0, because the top bits will be zero. 2568 return getConstant(0, VT); 2569 break; 2570 case ISD::ANY_EXTEND: 2571 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2572 "Invalid ANY_EXTEND!"); 2573 if (Operand.getValueType() == VT) return Operand; // noop extension 2574 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2575 "Invalid anyext node, dst < src!"); 2576 assert((!VT.isVector() || 2577 VT.getVectorNumElements() == 2578 Operand.getValueType().getVectorNumElements()) && 2579 "Vector element count mismatch!"); 2580 2581 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2582 OpOpcode == ISD::ANY_EXTEND) 2583 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2584 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2585 else if (OpOpcode == ISD::UNDEF) 2586 return getUNDEF(VT); 2587 2588 // (ext (trunx x)) -> x 2589 if (OpOpcode == ISD::TRUNCATE) { 2590 SDValue OpOp = Operand.getNode()->getOperand(0); 2591 if (OpOp.getValueType() == VT) 2592 return OpOp; 2593 } 2594 break; 2595 case ISD::TRUNCATE: 2596 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2597 "Invalid TRUNCATE!"); 2598 if (Operand.getValueType() == VT) return Operand; // noop truncate 2599 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2600 "Invalid truncate node, src < dst!"); 2601 assert((!VT.isVector() || 2602 VT.getVectorNumElements() == 2603 Operand.getValueType().getVectorNumElements()) && 2604 "Vector element count mismatch!"); 2605 if (OpOpcode == ISD::TRUNCATE) 2606 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2607 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2608 OpOpcode == ISD::ANY_EXTEND) { 2609 // If the source is smaller than the dest, we still need an extend. 2610 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2611 .bitsLT(VT.getScalarType())) 2612 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2613 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2614 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2615 return Operand.getNode()->getOperand(0); 2616 } 2617 if (OpOpcode == ISD::UNDEF) 2618 return getUNDEF(VT); 2619 break; 2620 case ISD::BITCAST: 2621 // Basic sanity checking. 2622 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2623 && "Cannot BITCAST between types of different sizes!"); 2624 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2625 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2626 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2627 if (OpOpcode == ISD::UNDEF) 2628 return getUNDEF(VT); 2629 break; 2630 case ISD::SCALAR_TO_VECTOR: 2631 assert(VT.isVector() && !Operand.getValueType().isVector() && 2632 (VT.getVectorElementType() == Operand.getValueType() || 2633 (VT.getVectorElementType().isInteger() && 2634 Operand.getValueType().isInteger() && 2635 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2636 "Illegal SCALAR_TO_VECTOR node!"); 2637 if (OpOpcode == ISD::UNDEF) 2638 return getUNDEF(VT); 2639 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2640 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2641 isa<ConstantSDNode>(Operand.getOperand(1)) && 2642 Operand.getConstantOperandVal(1) == 0 && 2643 Operand.getOperand(0).getValueType() == VT) 2644 return Operand.getOperand(0); 2645 break; 2646 case ISD::FNEG: 2647 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2648 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2649 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2650 Operand.getNode()->getOperand(0)); 2651 if (OpOpcode == ISD::FNEG) // --X -> X 2652 return Operand.getNode()->getOperand(0); 2653 break; 2654 case ISD::FABS: 2655 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2656 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2657 break; 2658 } 2659 2660 SDNode *N; 2661 SDVTList VTs = getVTList(VT); 2662 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2663 FoldingSetNodeID ID; 2664 SDValue Ops[1] = { Operand }; 2665 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2666 void *IP = 0; 2667 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2668 return SDValue(E, 0); 2669 2670 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2671 CSEMap.InsertNode(N, IP); 2672 } else { 2673 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2674 } 2675 2676 AllNodes.push_back(N); 2677#ifndef NDEBUG 2678 VerifySDNode(N); 2679#endif 2680 return SDValue(N, 0); 2681} 2682 2683SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT, 2684 SDNode *Cst1, SDNode *Cst2) { 2685 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs; 2686 SmallVector<SDValue, 4> Outputs; 2687 EVT SVT = VT.getScalarType(); 2688 2689 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1); 2690 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2); 2691 if (Scalar1 && Scalar2) { 2692 // Scalar instruction. 2693 Inputs.push_back(std::make_pair(Scalar1, Scalar2)); 2694 } else { 2695 // For vectors extract each constant element into Inputs so we can constant 2696 // fold them individually. 2697 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1); 2698 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2); 2699 if (!BV1 || !BV2) 2700 return SDValue(); 2701 2702 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!"); 2703 2704 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) { 2705 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I)); 2706 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I)); 2707 if (!V1 || !V2) // Not a constant, bail. 2708 return SDValue(); 2709 2710 // Avoid BUILD_VECTOR nodes that perform implicit truncation. 2711 // FIXME: This is valid and could be handled by truncating the APInts. 2712 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT) 2713 return SDValue(); 2714 2715 Inputs.push_back(std::make_pair(V1, V2)); 2716 } 2717 } 2718 2719 // We have a number of constant values, constant fold them element by element. 2720 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) { 2721 const APInt &C1 = Inputs[I].first->getAPIntValue(); 2722 const APInt &C2 = Inputs[I].second->getAPIntValue(); 2723 2724 switch (Opcode) { 2725 case ISD::ADD: 2726 Outputs.push_back(getConstant(C1 + C2, SVT)); 2727 break; 2728 case ISD::SUB: 2729 Outputs.push_back(getConstant(C1 - C2, SVT)); 2730 break; 2731 case ISD::MUL: 2732 Outputs.push_back(getConstant(C1 * C2, SVT)); 2733 break; 2734 case ISD::UDIV: 2735 if (!C2.getBoolValue()) 2736 return SDValue(); 2737 Outputs.push_back(getConstant(C1.udiv(C2), SVT)); 2738 break; 2739 case ISD::UREM: 2740 if (!C2.getBoolValue()) 2741 return SDValue(); 2742 Outputs.push_back(getConstant(C1.urem(C2), SVT)); 2743 break; 2744 case ISD::SDIV: 2745 if (!C2.getBoolValue()) 2746 return SDValue(); 2747 Outputs.push_back(getConstant(C1.sdiv(C2), SVT)); 2748 break; 2749 case ISD::SREM: 2750 if (!C2.getBoolValue()) 2751 return SDValue(); 2752 Outputs.push_back(getConstant(C1.srem(C2), SVT)); 2753 break; 2754 case ISD::AND: 2755 Outputs.push_back(getConstant(C1 & C2, SVT)); 2756 break; 2757 case ISD::OR: 2758 Outputs.push_back(getConstant(C1 | C2, SVT)); 2759 break; 2760 case ISD::XOR: 2761 Outputs.push_back(getConstant(C1 ^ C2, SVT)); 2762 break; 2763 case ISD::SHL: 2764 Outputs.push_back(getConstant(C1 << C2, SVT)); 2765 break; 2766 case ISD::SRL: 2767 Outputs.push_back(getConstant(C1.lshr(C2), SVT)); 2768 break; 2769 case ISD::SRA: 2770 Outputs.push_back(getConstant(C1.ashr(C2), SVT)); 2771 break; 2772 case ISD::ROTL: 2773 Outputs.push_back(getConstant(C1.rotl(C2), SVT)); 2774 break; 2775 case ISD::ROTR: 2776 Outputs.push_back(getConstant(C1.rotr(C2), SVT)); 2777 break; 2778 default: 2779 return SDValue(); 2780 } 2781 } 2782 2783 // Handle the scalar case first. 2784 if (Outputs.size() == 1) 2785 return Outputs.back(); 2786 2787 // Otherwise build a big vector out of the scalar elements we generated. 2788 return getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, Outputs.data(), 2789 Outputs.size()); 2790} 2791 2792SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, 2793 SDValue N2) { 2794 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2795 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2796 switch (Opcode) { 2797 default: break; 2798 case ISD::TokenFactor: 2799 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2800 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2801 // Fold trivial token factors. 2802 if (N1.getOpcode() == ISD::EntryToken) return N2; 2803 if (N2.getOpcode() == ISD::EntryToken) return N1; 2804 if (N1 == N2) return N1; 2805 break; 2806 case ISD::CONCAT_VECTORS: 2807 // Concat of UNDEFs is UNDEF. 2808 if (N1.getOpcode() == ISD::UNDEF && 2809 N2.getOpcode() == ISD::UNDEF) 2810 return getUNDEF(VT); 2811 2812 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2813 // one big BUILD_VECTOR. 2814 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2815 N2.getOpcode() == ISD::BUILD_VECTOR) { 2816 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2817 N1.getNode()->op_end()); 2818 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2819 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2820 } 2821 break; 2822 case ISD::AND: 2823 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2824 assert(N1.getValueType() == N2.getValueType() && 2825 N1.getValueType() == VT && "Binary operator types must match!"); 2826 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2827 // worth handling here. 2828 if (N2C && N2C->isNullValue()) 2829 return N2; 2830 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2831 return N1; 2832 break; 2833 case ISD::OR: 2834 case ISD::XOR: 2835 case ISD::ADD: 2836 case ISD::SUB: 2837 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2838 assert(N1.getValueType() == N2.getValueType() && 2839 N1.getValueType() == VT && "Binary operator types must match!"); 2840 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2841 // it's worth handling here. 2842 if (N2C && N2C->isNullValue()) 2843 return N1; 2844 break; 2845 case ISD::UDIV: 2846 case ISD::UREM: 2847 case ISD::MULHU: 2848 case ISD::MULHS: 2849 case ISD::MUL: 2850 case ISD::SDIV: 2851 case ISD::SREM: 2852 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2853 assert(N1.getValueType() == N2.getValueType() && 2854 N1.getValueType() == VT && "Binary operator types must match!"); 2855 break; 2856 case ISD::FADD: 2857 case ISD::FSUB: 2858 case ISD::FMUL: 2859 case ISD::FDIV: 2860 case ISD::FREM: 2861 if (getTarget().Options.UnsafeFPMath) { 2862 if (Opcode == ISD::FADD) { 2863 // 0+x --> x 2864 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2865 if (CFP->getValueAPF().isZero()) 2866 return N2; 2867 // x+0 --> x 2868 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2869 if (CFP->getValueAPF().isZero()) 2870 return N1; 2871 } else if (Opcode == ISD::FSUB) { 2872 // x-0 --> x 2873 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2874 if (CFP->getValueAPF().isZero()) 2875 return N1; 2876 } else if (Opcode == ISD::FMUL) { 2877 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1); 2878 SDValue V = N2; 2879 2880 // If the first operand isn't the constant, try the second 2881 if (!CFP) { 2882 CFP = dyn_cast<ConstantFPSDNode>(N2); 2883 V = N1; 2884 } 2885 2886 if (CFP) { 2887 // 0*x --> 0 2888 if (CFP->isZero()) 2889 return SDValue(CFP,0); 2890 // 1*x --> x 2891 if (CFP->isExactlyValue(1.0)) 2892 return V; 2893 } 2894 } 2895 } 2896 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2897 assert(N1.getValueType() == N2.getValueType() && 2898 N1.getValueType() == VT && "Binary operator types must match!"); 2899 break; 2900 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2901 assert(N1.getValueType() == VT && 2902 N1.getValueType().isFloatingPoint() && 2903 N2.getValueType().isFloatingPoint() && 2904 "Invalid FCOPYSIGN!"); 2905 break; 2906 case ISD::SHL: 2907 case ISD::SRA: 2908 case ISD::SRL: 2909 case ISD::ROTL: 2910 case ISD::ROTR: 2911 assert(VT == N1.getValueType() && 2912 "Shift operators return type must be the same as their first arg"); 2913 assert(VT.isInteger() && N2.getValueType().isInteger() && 2914 "Shifts only work on integers"); 2915 // Verify that the shift amount VT is bit enough to hold valid shift 2916 // amounts. This catches things like trying to shift an i1024 value by an 2917 // i8, which is easy to fall into in generic code that uses 2918 // TLI.getShiftAmount(). 2919 assert(N2.getValueType().getSizeInBits() >= 2920 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2921 "Invalid use of small shift amount with oversized value!"); 2922 2923 // Always fold shifts of i1 values so the code generator doesn't need to 2924 // handle them. Since we know the size of the shift has to be less than the 2925 // size of the value, the shift/rotate count is guaranteed to be zero. 2926 if (VT == MVT::i1) 2927 return N1; 2928 if (N2C && N2C->isNullValue()) 2929 return N1; 2930 break; 2931 case ISD::FP_ROUND_INREG: { 2932 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2933 assert(VT == N1.getValueType() && "Not an inreg round!"); 2934 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2935 "Cannot FP_ROUND_INREG integer types"); 2936 assert(EVT.isVector() == VT.isVector() && 2937 "FP_ROUND_INREG type should be vector iff the operand " 2938 "type is vector!"); 2939 assert((!EVT.isVector() || 2940 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2941 "Vector element counts must match in FP_ROUND_INREG"); 2942 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2943 (void)EVT; 2944 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2945 break; 2946 } 2947 case ISD::FP_ROUND: 2948 assert(VT.isFloatingPoint() && 2949 N1.getValueType().isFloatingPoint() && 2950 VT.bitsLE(N1.getValueType()) && 2951 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2952 if (N1.getValueType() == VT) return N1; // noop conversion. 2953 break; 2954 case ISD::AssertSext: 2955 case ISD::AssertZext: { 2956 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2957 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2958 assert(VT.isInteger() && EVT.isInteger() && 2959 "Cannot *_EXTEND_INREG FP types"); 2960 assert(!EVT.isVector() && 2961 "AssertSExt/AssertZExt type should be the vector element type " 2962 "rather than the vector type!"); 2963 assert(EVT.bitsLE(VT) && "Not extending!"); 2964 if (VT == EVT) return N1; // noop assertion. 2965 break; 2966 } 2967 case ISD::SIGN_EXTEND_INREG: { 2968 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2969 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2970 assert(VT.isInteger() && EVT.isInteger() && 2971 "Cannot *_EXTEND_INREG FP types"); 2972 assert(EVT.isVector() == VT.isVector() && 2973 "SIGN_EXTEND_INREG type should be vector iff the operand " 2974 "type is vector!"); 2975 assert((!EVT.isVector() || 2976 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2977 "Vector element counts must match in SIGN_EXTEND_INREG"); 2978 assert(EVT.bitsLE(VT) && "Not extending!"); 2979 if (EVT == VT) return N1; // Not actually extending 2980 2981 if (N1C) { 2982 APInt Val = N1C->getAPIntValue(); 2983 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2984 Val <<= Val.getBitWidth()-FromBits; 2985 Val = Val.ashr(Val.getBitWidth()-FromBits); 2986 return getConstant(Val, VT); 2987 } 2988 break; 2989 } 2990 case ISD::EXTRACT_VECTOR_ELT: 2991 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2992 if (N1.getOpcode() == ISD::UNDEF) 2993 return getUNDEF(VT); 2994 2995 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2996 // expanding copies of large vectors from registers. 2997 if (N2C && 2998 N1.getOpcode() == ISD::CONCAT_VECTORS && 2999 N1.getNumOperands() > 0) { 3000 unsigned Factor = 3001 N1.getOperand(0).getValueType().getVectorNumElements(); 3002 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 3003 N1.getOperand(N2C->getZExtValue() / Factor), 3004 getConstant(N2C->getZExtValue() % Factor, 3005 N2.getValueType())); 3006 } 3007 3008 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 3009 // expanding large vector constants. 3010 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 3011 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 3012 3013 if (VT != Elt.getValueType()) 3014 // If the vector element type is not legal, the BUILD_VECTOR operands 3015 // are promoted and implicitly truncated, and the result implicitly 3016 // extended. Make that explicit here. 3017 Elt = getAnyExtOrTrunc(Elt, DL, VT); 3018 3019 return Elt; 3020 } 3021 3022 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 3023 // operations are lowered to scalars. 3024 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 3025 // If the indices are the same, return the inserted element else 3026 // if the indices are known different, extract the element from 3027 // the original vector. 3028 SDValue N1Op2 = N1.getOperand(2); 3029 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 3030 3031 if (N1Op2C && N2C) { 3032 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 3033 if (VT == N1.getOperand(1).getValueType()) 3034 return N1.getOperand(1); 3035 else 3036 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 3037 } 3038 3039 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 3040 } 3041 } 3042 break; 3043 case ISD::EXTRACT_ELEMENT: 3044 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 3045 assert(!N1.getValueType().isVector() && !VT.isVector() && 3046 (N1.getValueType().isInteger() == VT.isInteger()) && 3047 N1.getValueType() != VT && 3048 "Wrong types for EXTRACT_ELEMENT!"); 3049 3050 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 3051 // 64-bit integers into 32-bit parts. Instead of building the extract of 3052 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 3053 if (N1.getOpcode() == ISD::BUILD_PAIR) 3054 return N1.getOperand(N2C->getZExtValue()); 3055 3056 // EXTRACT_ELEMENT of a constant int is also very common. 3057 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 3058 unsigned ElementSize = VT.getSizeInBits(); 3059 unsigned Shift = ElementSize * N2C->getZExtValue(); 3060 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 3061 return getConstant(ShiftedVal.trunc(ElementSize), VT); 3062 } 3063 break; 3064 case ISD::EXTRACT_SUBVECTOR: { 3065 SDValue Index = N2; 3066 if (VT.isSimple() && N1.getValueType().isSimple()) { 3067 assert(VT.isVector() && N1.getValueType().isVector() && 3068 "Extract subvector VTs must be a vectors!"); 3069 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 3070 "Extract subvector VTs must have the same element type!"); 3071 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 3072 "Extract subvector must be from larger vector to smaller vector!"); 3073 3074 if (isa<ConstantSDNode>(Index.getNode())) { 3075 assert((VT.getVectorNumElements() + 3076 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3077 <= N1.getValueType().getVectorNumElements()) 3078 && "Extract subvector overflow!"); 3079 } 3080 3081 // Trivial extraction. 3082 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 3083 return N1; 3084 } 3085 break; 3086 } 3087 } 3088 3089 // Perform trivial constant folding. 3090 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()); 3091 if (SV.getNode()) return SV; 3092 3093 // Canonicalize constant to RHS if commutative. 3094 if (N1C && !N2C && isCommutativeBinOp(Opcode)) { 3095 std::swap(N1C, N2C); 3096 std::swap(N1, N2); 3097 } 3098 3099 // Constant fold FP operations. 3100 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 3101 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 3102 if (N1CFP) { 3103 if (!N2CFP && isCommutativeBinOp(Opcode)) { 3104 // Canonicalize constant to RHS if commutative. 3105 std::swap(N1CFP, N2CFP); 3106 std::swap(N1, N2); 3107 } else if (N2CFP) { 3108 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3109 APFloat::opStatus s; 3110 switch (Opcode) { 3111 case ISD::FADD: 3112 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3113 if (s != APFloat::opInvalidOp) 3114 return getConstantFP(V1, VT); 3115 break; 3116 case ISD::FSUB: 3117 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3118 if (s!=APFloat::opInvalidOp) 3119 return getConstantFP(V1, VT); 3120 break; 3121 case ISD::FMUL: 3122 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3123 if (s!=APFloat::opInvalidOp) 3124 return getConstantFP(V1, VT); 3125 break; 3126 case ISD::FDIV: 3127 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3128 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3129 return getConstantFP(V1, VT); 3130 break; 3131 case ISD::FREM : 3132 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3133 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3134 return getConstantFP(V1, VT); 3135 break; 3136 case ISD::FCOPYSIGN: 3137 V1.copySign(V2); 3138 return getConstantFP(V1, VT); 3139 default: break; 3140 } 3141 } 3142 3143 if (Opcode == ISD::FP_ROUND) { 3144 APFloat V = N1CFP->getValueAPF(); // make copy 3145 bool ignored; 3146 // This can return overflow, underflow, or inexact; we don't care. 3147 // FIXME need to be more flexible about rounding mode. 3148 (void)V.convert(EVTToAPFloatSemantics(VT), 3149 APFloat::rmNearestTiesToEven, &ignored); 3150 return getConstantFP(V, VT); 3151 } 3152 } 3153 3154 // Canonicalize an UNDEF to the RHS, even over a constant. 3155 if (N1.getOpcode() == ISD::UNDEF) { 3156 if (isCommutativeBinOp(Opcode)) { 3157 std::swap(N1, N2); 3158 } else { 3159 switch (Opcode) { 3160 case ISD::FP_ROUND_INREG: 3161 case ISD::SIGN_EXTEND_INREG: 3162 case ISD::SUB: 3163 case ISD::FSUB: 3164 case ISD::FDIV: 3165 case ISD::FREM: 3166 case ISD::SRA: 3167 return N1; // fold op(undef, arg2) -> undef 3168 case ISD::UDIV: 3169 case ISD::SDIV: 3170 case ISD::UREM: 3171 case ISD::SREM: 3172 case ISD::SRL: 3173 case ISD::SHL: 3174 if (!VT.isVector()) 3175 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3176 // For vectors, we can't easily build an all zero vector, just return 3177 // the LHS. 3178 return N2; 3179 } 3180 } 3181 } 3182 3183 // Fold a bunch of operators when the RHS is undef. 3184 if (N2.getOpcode() == ISD::UNDEF) { 3185 switch (Opcode) { 3186 case ISD::XOR: 3187 if (N1.getOpcode() == ISD::UNDEF) 3188 // Handle undef ^ undef -> 0 special case. This is a common 3189 // idiom (misuse). 3190 return getConstant(0, VT); 3191 // fallthrough 3192 case ISD::ADD: 3193 case ISD::ADDC: 3194 case ISD::ADDE: 3195 case ISD::SUB: 3196 case ISD::UDIV: 3197 case ISD::SDIV: 3198 case ISD::UREM: 3199 case ISD::SREM: 3200 return N2; // fold op(arg1, undef) -> undef 3201 case ISD::FADD: 3202 case ISD::FSUB: 3203 case ISD::FMUL: 3204 case ISD::FDIV: 3205 case ISD::FREM: 3206 if (getTarget().Options.UnsafeFPMath) 3207 return N2; 3208 break; 3209 case ISD::MUL: 3210 case ISD::AND: 3211 case ISD::SRL: 3212 case ISD::SHL: 3213 if (!VT.isVector()) 3214 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3215 // For vectors, we can't easily build an all zero vector, just return 3216 // the LHS. 3217 return N1; 3218 case ISD::OR: 3219 if (!VT.isVector()) 3220 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3221 // For vectors, we can't easily build an all one vector, just return 3222 // the LHS. 3223 return N1; 3224 case ISD::SRA: 3225 return N1; 3226 } 3227 } 3228 3229 // Memoize this node if possible. 3230 SDNode *N; 3231 SDVTList VTs = getVTList(VT); 3232 if (VT != MVT::Glue) { 3233 SDValue Ops[] = { N1, N2 }; 3234 FoldingSetNodeID ID; 3235 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3236 void *IP = 0; 3237 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3238 return SDValue(E, 0); 3239 3240 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3241 CSEMap.InsertNode(N, IP); 3242 } else { 3243 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3244 } 3245 3246 AllNodes.push_back(N); 3247#ifndef NDEBUG 3248 VerifySDNode(N); 3249#endif 3250 return SDValue(N, 0); 3251} 3252 3253SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3254 SDValue N1, SDValue N2, SDValue N3) { 3255 // Perform various simplifications. 3256 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3257 switch (Opcode) { 3258 case ISD::CONCAT_VECTORS: 3259 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3260 // one big BUILD_VECTOR. 3261 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3262 N2.getOpcode() == ISD::BUILD_VECTOR && 3263 N3.getOpcode() == ISD::BUILD_VECTOR) { 3264 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3265 N1.getNode()->op_end()); 3266 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3267 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3268 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3269 } 3270 break; 3271 case ISD::SETCC: { 3272 // Use FoldSetCC to simplify SETCC's. 3273 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3274 if (Simp.getNode()) return Simp; 3275 break; 3276 } 3277 case ISD::SELECT: 3278 if (N1C) { 3279 if (N1C->getZExtValue()) 3280 return N2; // select true, X, Y -> X 3281 return N3; // select false, X, Y -> Y 3282 } 3283 3284 if (N2 == N3) return N2; // select C, X, X -> X 3285 break; 3286 case ISD::VECTOR_SHUFFLE: 3287 llvm_unreachable("should use getVectorShuffle constructor!"); 3288 case ISD::INSERT_SUBVECTOR: { 3289 SDValue Index = N3; 3290 if (VT.isSimple() && N1.getValueType().isSimple() 3291 && N2.getValueType().isSimple()) { 3292 assert(VT.isVector() && N1.getValueType().isVector() && 3293 N2.getValueType().isVector() && 3294 "Insert subvector VTs must be a vectors"); 3295 assert(VT == N1.getValueType() && 3296 "Dest and insert subvector source types must match!"); 3297 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3298 "Insert subvector must be from smaller vector to larger vector!"); 3299 if (isa<ConstantSDNode>(Index.getNode())) { 3300 assert((N2.getValueType().getVectorNumElements() + 3301 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3302 <= VT.getVectorNumElements()) 3303 && "Insert subvector overflow!"); 3304 } 3305 3306 // Trivial insertion. 3307 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3308 return N2; 3309 } 3310 break; 3311 } 3312 case ISD::BITCAST: 3313 // Fold bit_convert nodes from a type to themselves. 3314 if (N1.getValueType() == VT) 3315 return N1; 3316 break; 3317 } 3318 3319 // Memoize node if it doesn't produce a flag. 3320 SDNode *N; 3321 SDVTList VTs = getVTList(VT); 3322 if (VT != MVT::Glue) { 3323 SDValue Ops[] = { N1, N2, N3 }; 3324 FoldingSetNodeID ID; 3325 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3326 void *IP = 0; 3327 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3328 return SDValue(E, 0); 3329 3330 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3331 CSEMap.InsertNode(N, IP); 3332 } else { 3333 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3334 } 3335 3336 AllNodes.push_back(N); 3337#ifndef NDEBUG 3338 VerifySDNode(N); 3339#endif 3340 return SDValue(N, 0); 3341} 3342 3343SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3344 SDValue N1, SDValue N2, SDValue N3, 3345 SDValue N4) { 3346 SDValue Ops[] = { N1, N2, N3, N4 }; 3347 return getNode(Opcode, DL, VT, Ops, 4); 3348} 3349 3350SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3351 SDValue N1, SDValue N2, SDValue N3, 3352 SDValue N4, SDValue N5) { 3353 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3354 return getNode(Opcode, DL, VT, Ops, 5); 3355} 3356 3357/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3358/// the incoming stack arguments to be loaded from the stack. 3359SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3360 SmallVector<SDValue, 8> ArgChains; 3361 3362 // Include the original chain at the beginning of the list. When this is 3363 // used by target LowerCall hooks, this helps legalize find the 3364 // CALLSEQ_BEGIN node. 3365 ArgChains.push_back(Chain); 3366 3367 // Add a chain value for each stack argument. 3368 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3369 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3370 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3371 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3372 if (FI->getIndex() < 0) 3373 ArgChains.push_back(SDValue(L, 1)); 3374 3375 // Build a tokenfactor for all the chains. 3376 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3377 &ArgChains[0], ArgChains.size()); 3378} 3379 3380/// getMemsetValue - Vectorized representation of the memset value 3381/// operand. 3382static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3383 DebugLoc dl) { 3384 assert(Value.getOpcode() != ISD::UNDEF); 3385 3386 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3387 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3388 assert(C->getAPIntValue().getBitWidth() == 8); 3389 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue()); 3390 if (VT.isInteger()) 3391 return DAG.getConstant(Val, VT); 3392 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT); 3393 } 3394 3395 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3396 if (NumBits > 8) { 3397 // Use a multiplication with 0x010101... to extend the input to the 3398 // required length. 3399 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01)); 3400 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3401 } 3402 3403 return Value; 3404} 3405 3406/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3407/// used when a memcpy is turned into a memset when the source is a constant 3408/// string ptr. 3409static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3410 const TargetLowering &TLI, StringRef Str) { 3411 // Handle vector with all elements zero. 3412 if (Str.empty()) { 3413 if (VT.isInteger()) 3414 return DAG.getConstant(0, VT); 3415 else if (VT == MVT::f32 || VT == MVT::f64) 3416 return DAG.getConstantFP(0.0, VT); 3417 else if (VT.isVector()) { 3418 unsigned NumElts = VT.getVectorNumElements(); 3419 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3420 return DAG.getNode(ISD::BITCAST, dl, VT, 3421 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3422 EltVT, NumElts))); 3423 } else 3424 llvm_unreachable("Expected type!"); 3425 } 3426 3427 assert(!VT.isVector() && "Can't handle vector type here!"); 3428 unsigned NumVTBits = VT.getSizeInBits(); 3429 unsigned NumVTBytes = NumVTBits / 8; 3430 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3431 3432 APInt Val(NumVTBits, 0); 3433 if (TLI.isLittleEndian()) { 3434 for (unsigned i = 0; i != NumBytes; ++i) 3435 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3436 } else { 3437 for (unsigned i = 0; i != NumBytes; ++i) 3438 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3439 } 3440 3441 // If the "cost" of materializing the integer immediate is 1 or free, then 3442 // it is cost effective to turn the load into the immediate. 3443 const TargetTransformInfo *TTI = DAG.getTargetTransformInfo(); 3444 if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2) 3445 return DAG.getConstant(Val, VT); 3446 return SDValue(0, 0); 3447} 3448 3449/// getMemBasePlusOffset - Returns base and offset node for the 3450/// 3451static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3452 SelectionDAG &DAG) { 3453 EVT VT = Base.getValueType(); 3454 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3455 VT, Base, DAG.getConstant(Offset, VT)); 3456} 3457 3458/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3459/// 3460static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3461 unsigned SrcDelta = 0; 3462 GlobalAddressSDNode *G = NULL; 3463 if (Src.getOpcode() == ISD::GlobalAddress) 3464 G = cast<GlobalAddressSDNode>(Src); 3465 else if (Src.getOpcode() == ISD::ADD && 3466 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3467 Src.getOperand(1).getOpcode() == ISD::Constant) { 3468 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3469 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3470 } 3471 if (!G) 3472 return false; 3473 3474 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3475} 3476 3477/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3478/// to replace the memset / memcpy. Return true if the number of memory ops 3479/// is below the threshold. It returns the types of the sequence of 3480/// memory ops to perform memset / memcpy by reference. 3481static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3482 unsigned Limit, uint64_t Size, 3483 unsigned DstAlign, unsigned SrcAlign, 3484 bool IsMemset, 3485 bool ZeroMemset, 3486 bool MemcpyStrSrc, 3487 bool AllowOverlap, 3488 SelectionDAG &DAG, 3489 const TargetLowering &TLI) { 3490 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3491 "Expecting memcpy / memset source to meet alignment requirement!"); 3492 // If 'SrcAlign' is zero, that means the memory operation does not need to 3493 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3494 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3495 // is the specified alignment of the memory operation. If it is zero, that 3496 // means it's possible to change the alignment of the destination. 3497 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3498 // not need to be loaded. 3499 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3500 IsMemset, ZeroMemset, MemcpyStrSrc, 3501 DAG.getMachineFunction()); 3502 3503 if (VT == MVT::Other) { 3504 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() || 3505 TLI.allowsUnalignedMemoryAccesses(VT)) { 3506 VT = TLI.getPointerTy(); 3507 } else { 3508 switch (DstAlign & 7) { 3509 case 0: VT = MVT::i64; break; 3510 case 4: VT = MVT::i32; break; 3511 case 2: VT = MVT::i16; break; 3512 default: VT = MVT::i8; break; 3513 } 3514 } 3515 3516 MVT LVT = MVT::i64; 3517 while (!TLI.isTypeLegal(LVT)) 3518 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3519 assert(LVT.isInteger()); 3520 3521 if (VT.bitsGT(LVT)) 3522 VT = LVT; 3523 } 3524 3525 unsigned NumMemOps = 0; 3526 while (Size != 0) { 3527 unsigned VTSize = VT.getSizeInBits() / 8; 3528 while (VTSize > Size) { 3529 // For now, only use non-vector load / store's for the left-over pieces. 3530 EVT NewVT = VT; 3531 unsigned NewVTSize; 3532 3533 bool Found = false; 3534 if (VT.isVector() || VT.isFloatingPoint()) { 3535 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32; 3536 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) && 3537 TLI.isSafeMemOpType(NewVT.getSimpleVT())) 3538 Found = true; 3539 else if (NewVT == MVT::i64 && 3540 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) && 3541 TLI.isSafeMemOpType(MVT::f64)) { 3542 // i64 is usually not legal on 32-bit targets, but f64 may be. 3543 NewVT = MVT::f64; 3544 Found = true; 3545 } 3546 } 3547 3548 if (!Found) { 3549 do { 3550 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1); 3551 if (NewVT == MVT::i8) 3552 break; 3553 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT())); 3554 } 3555 NewVTSize = NewVT.getSizeInBits() / 8; 3556 3557 // If the new VT cannot cover all of the remaining bits, then consider 3558 // issuing a (or a pair of) unaligned and overlapping load / store. 3559 // FIXME: Only does this for 64-bit or more since we don't have proper 3560 // cost model for unaligned load / store. 3561 bool Fast; 3562 if (NumMemOps && AllowOverlap && 3563 VTSize >= 8 && NewVTSize < Size && 3564 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast) 3565 VTSize = Size; 3566 else { 3567 VT = NewVT; 3568 VTSize = NewVTSize; 3569 } 3570 } 3571 3572 if (++NumMemOps > Limit) 3573 return false; 3574 3575 MemOps.push_back(VT); 3576 Size -= VTSize; 3577 } 3578 3579 return true; 3580} 3581 3582static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3583 SDValue Chain, SDValue Dst, 3584 SDValue Src, uint64_t Size, 3585 unsigned Align, bool isVol, 3586 bool AlwaysInline, 3587 MachinePointerInfo DstPtrInfo, 3588 MachinePointerInfo SrcPtrInfo) { 3589 // Turn a memcpy of undef to nop. 3590 if (Src.getOpcode() == ISD::UNDEF) 3591 return Chain; 3592 3593 // Expand memcpy to a series of load and store ops if the size operand falls 3594 // below a certain threshold. 3595 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3596 // rather than maybe a humongous number of loads and stores. 3597 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3598 std::vector<EVT> MemOps; 3599 bool DstAlignCanChange = false; 3600 MachineFunction &MF = DAG.getMachineFunction(); 3601 MachineFrameInfo *MFI = MF.getFrameInfo(); 3602 bool OptSize = 3603 MF.getFunction()->getAttributes(). 3604 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3605 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3606 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3607 DstAlignCanChange = true; 3608 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3609 if (Align > SrcAlign) 3610 SrcAlign = Align; 3611 StringRef Str; 3612 bool CopyFromStr = isMemSrcFromString(Src, Str); 3613 bool isZeroStr = CopyFromStr && Str.empty(); 3614 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3615 3616 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3617 (DstAlignCanChange ? 0 : Align), 3618 (isZeroStr ? 0 : SrcAlign), 3619 false, false, CopyFromStr, true, DAG, TLI)) 3620 return SDValue(); 3621 3622 if (DstAlignCanChange) { 3623 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3624 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3625 3626 // Don't promote to an alignment that would require dynamic stack 3627 // realignment. 3628 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); 3629 if (!TRI->needsStackRealignment(MF)) 3630 while (NewAlign > Align && 3631 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign)) 3632 NewAlign /= 2; 3633 3634 if (NewAlign > Align) { 3635 // Give the stack frame object a larger alignment if needed. 3636 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3637 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3638 Align = NewAlign; 3639 } 3640 } 3641 3642 SmallVector<SDValue, 8> OutChains; 3643 unsigned NumMemOps = MemOps.size(); 3644 uint64_t SrcOff = 0, DstOff = 0; 3645 for (unsigned i = 0; i != NumMemOps; ++i) { 3646 EVT VT = MemOps[i]; 3647 unsigned VTSize = VT.getSizeInBits() / 8; 3648 SDValue Value, Store; 3649 3650 if (VTSize > Size) { 3651 // Issuing an unaligned load / store pair that overlaps with the previous 3652 // pair. Adjust the offset accordingly. 3653 assert(i == NumMemOps-1 && i != 0); 3654 SrcOff -= VTSize - Size; 3655 DstOff -= VTSize - Size; 3656 } 3657 3658 if (CopyFromStr && 3659 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3660 // It's unlikely a store of a vector immediate can be done in a single 3661 // instruction. It would require a load from a constantpool first. 3662 // We only handle zero vectors here. 3663 // FIXME: Handle other cases where store of vector immediate is done in 3664 // a single instruction. 3665 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3666 if (Value.getNode()) 3667 Store = DAG.getStore(Chain, dl, Value, 3668 getMemBasePlusOffset(Dst, DstOff, DAG), 3669 DstPtrInfo.getWithOffset(DstOff), isVol, 3670 false, Align); 3671 } 3672 3673 if (!Store.getNode()) { 3674 // The type might not be legal for the target. This should only happen 3675 // if the type is smaller than a legal type, as on PPC, so the right 3676 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3677 // to Load/Store if NVT==VT. 3678 // FIXME does the case above also need this? 3679 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3680 assert(NVT.bitsGE(VT)); 3681 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3682 getMemBasePlusOffset(Src, SrcOff, DAG), 3683 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3684 MinAlign(SrcAlign, SrcOff)); 3685 Store = DAG.getTruncStore(Chain, dl, Value, 3686 getMemBasePlusOffset(Dst, DstOff, DAG), 3687 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3688 false, Align); 3689 } 3690 OutChains.push_back(Store); 3691 SrcOff += VTSize; 3692 DstOff += VTSize; 3693 Size -= VTSize; 3694 } 3695 3696 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3697 &OutChains[0], OutChains.size()); 3698} 3699 3700static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3701 SDValue Chain, SDValue Dst, 3702 SDValue Src, uint64_t Size, 3703 unsigned Align, bool isVol, 3704 bool AlwaysInline, 3705 MachinePointerInfo DstPtrInfo, 3706 MachinePointerInfo SrcPtrInfo) { 3707 // Turn a memmove of undef to nop. 3708 if (Src.getOpcode() == ISD::UNDEF) 3709 return Chain; 3710 3711 // Expand memmove to a series of load and store ops if the size operand falls 3712 // below a certain threshold. 3713 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3714 std::vector<EVT> MemOps; 3715 bool DstAlignCanChange = false; 3716 MachineFunction &MF = DAG.getMachineFunction(); 3717 MachineFrameInfo *MFI = MF.getFrameInfo(); 3718 bool OptSize = MF.getFunction()->getAttributes(). 3719 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3720 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3721 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3722 DstAlignCanChange = true; 3723 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3724 if (Align > SrcAlign) 3725 SrcAlign = Align; 3726 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3727 3728 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3729 (DstAlignCanChange ? 0 : Align), SrcAlign, 3730 false, false, false, false, DAG, TLI)) 3731 return SDValue(); 3732 3733 if (DstAlignCanChange) { 3734 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3735 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3736 if (NewAlign > Align) { 3737 // Give the stack frame object a larger alignment if needed. 3738 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3739 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3740 Align = NewAlign; 3741 } 3742 } 3743 3744 uint64_t SrcOff = 0, DstOff = 0; 3745 SmallVector<SDValue, 8> LoadValues; 3746 SmallVector<SDValue, 8> LoadChains; 3747 SmallVector<SDValue, 8> OutChains; 3748 unsigned NumMemOps = MemOps.size(); 3749 for (unsigned i = 0; i < NumMemOps; i++) { 3750 EVT VT = MemOps[i]; 3751 unsigned VTSize = VT.getSizeInBits() / 8; 3752 SDValue Value, Store; 3753 3754 Value = DAG.getLoad(VT, dl, Chain, 3755 getMemBasePlusOffset(Src, SrcOff, DAG), 3756 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3757 false, false, SrcAlign); 3758 LoadValues.push_back(Value); 3759 LoadChains.push_back(Value.getValue(1)); 3760 SrcOff += VTSize; 3761 } 3762 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3763 &LoadChains[0], LoadChains.size()); 3764 OutChains.clear(); 3765 for (unsigned i = 0; i < NumMemOps; i++) { 3766 EVT VT = MemOps[i]; 3767 unsigned VTSize = VT.getSizeInBits() / 8; 3768 SDValue Value, Store; 3769 3770 Store = DAG.getStore(Chain, dl, LoadValues[i], 3771 getMemBasePlusOffset(Dst, DstOff, DAG), 3772 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3773 OutChains.push_back(Store); 3774 DstOff += VTSize; 3775 } 3776 3777 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3778 &OutChains[0], OutChains.size()); 3779} 3780 3781static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3782 SDValue Chain, SDValue Dst, 3783 SDValue Src, uint64_t Size, 3784 unsigned Align, bool isVol, 3785 MachinePointerInfo DstPtrInfo) { 3786 // Turn a memset of undef to nop. 3787 if (Src.getOpcode() == ISD::UNDEF) 3788 return Chain; 3789 3790 // Expand memset to a series of load/store ops if the size operand 3791 // falls below a certain threshold. 3792 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3793 std::vector<EVT> MemOps; 3794 bool DstAlignCanChange = false; 3795 MachineFunction &MF = DAG.getMachineFunction(); 3796 MachineFrameInfo *MFI = MF.getFrameInfo(); 3797 bool OptSize = MF.getFunction()->getAttributes(). 3798 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3799 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3800 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3801 DstAlignCanChange = true; 3802 bool IsZeroVal = 3803 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3804 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3805 Size, (DstAlignCanChange ? 0 : Align), 0, 3806 true, IsZeroVal, false, true, DAG, TLI)) 3807 return SDValue(); 3808 3809 if (DstAlignCanChange) { 3810 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3811 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3812 if (NewAlign > Align) { 3813 // Give the stack frame object a larger alignment if needed. 3814 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3815 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3816 Align = NewAlign; 3817 } 3818 } 3819 3820 SmallVector<SDValue, 8> OutChains; 3821 uint64_t DstOff = 0; 3822 unsigned NumMemOps = MemOps.size(); 3823 3824 // Find the largest store and generate the bit pattern for it. 3825 EVT LargestVT = MemOps[0]; 3826 for (unsigned i = 1; i < NumMemOps; i++) 3827 if (MemOps[i].bitsGT(LargestVT)) 3828 LargestVT = MemOps[i]; 3829 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3830 3831 for (unsigned i = 0; i < NumMemOps; i++) { 3832 EVT VT = MemOps[i]; 3833 unsigned VTSize = VT.getSizeInBits() / 8; 3834 if (VTSize > Size) { 3835 // Issuing an unaligned load / store pair that overlaps with the previous 3836 // pair. Adjust the offset accordingly. 3837 assert(i == NumMemOps-1 && i != 0); 3838 DstOff -= VTSize - Size; 3839 } 3840 3841 // If this store is smaller than the largest store see whether we can get 3842 // the smaller value for free with a truncate. 3843 SDValue Value = MemSetValue; 3844 if (VT.bitsLT(LargestVT)) { 3845 if (!LargestVT.isVector() && !VT.isVector() && 3846 TLI.isTruncateFree(LargestVT, VT)) 3847 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3848 else 3849 Value = getMemsetValue(Src, VT, DAG, dl); 3850 } 3851 assert(Value.getValueType() == VT && "Value with wrong type."); 3852 SDValue Store = DAG.getStore(Chain, dl, Value, 3853 getMemBasePlusOffset(Dst, DstOff, DAG), 3854 DstPtrInfo.getWithOffset(DstOff), 3855 isVol, false, Align); 3856 OutChains.push_back(Store); 3857 DstOff += VT.getSizeInBits() / 8; 3858 Size -= VTSize; 3859 } 3860 3861 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3862 &OutChains[0], OutChains.size()); 3863} 3864 3865SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3866 SDValue Src, SDValue Size, 3867 unsigned Align, bool isVol, bool AlwaysInline, 3868 MachinePointerInfo DstPtrInfo, 3869 MachinePointerInfo SrcPtrInfo) { 3870 assert(Align && "The SDAG layer expects explicit alignment and reservers 0"); 3871 3872 // Check to see if we should lower the memcpy to loads and stores first. 3873 // For cases within the target-specified limits, this is the best choice. 3874 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3875 if (ConstantSize) { 3876 // Memcpy with size zero? Just return the original chain. 3877 if (ConstantSize->isNullValue()) 3878 return Chain; 3879 3880 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3881 ConstantSize->getZExtValue(),Align, 3882 isVol, false, DstPtrInfo, SrcPtrInfo); 3883 if (Result.getNode()) 3884 return Result; 3885 } 3886 3887 // Then check to see if we should lower the memcpy with target-specific 3888 // code. If the target chooses to do this, this is the next best. 3889 SDValue Result = 3890 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3891 isVol, AlwaysInline, 3892 DstPtrInfo, SrcPtrInfo); 3893 if (Result.getNode()) 3894 return Result; 3895 3896 // If we really need inline code and the target declined to provide it, 3897 // use a (potentially long) sequence of loads and stores. 3898 if (AlwaysInline) { 3899 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3900 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3901 ConstantSize->getZExtValue(), Align, isVol, 3902 true, DstPtrInfo, SrcPtrInfo); 3903 } 3904 3905 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3906 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3907 // respect volatile, so they may do things like read or write memory 3908 // beyond the given memory regions. But fixing this isn't easy, and most 3909 // people don't care. 3910 3911 // Emit a library call. 3912 TargetLowering::ArgListTy Args; 3913 TargetLowering::ArgListEntry Entry; 3914 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext()); 3915 Entry.Node = Dst; Args.push_back(Entry); 3916 Entry.Node = Src; Args.push_back(Entry); 3917 Entry.Node = Size; Args.push_back(Entry); 3918 // FIXME: pass in DebugLoc 3919 TargetLowering:: 3920 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3921 false, false, false, false, 0, 3922 TLI.getLibcallCallingConv(RTLIB::MEMCPY), 3923 /*isTailCall=*/false, 3924 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3925 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3926 TLI.getPointerTy()), 3927 Args, *this, dl); 3928 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3929 3930 return CallResult.second; 3931} 3932 3933SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3934 SDValue Src, SDValue Size, 3935 unsigned Align, bool isVol, 3936 MachinePointerInfo DstPtrInfo, 3937 MachinePointerInfo SrcPtrInfo) { 3938 assert(Align && "The SDAG layer expects explicit alignment and reservers 0"); 3939 3940 // Check to see if we should lower the memmove to loads and stores first. 3941 // For cases within the target-specified limits, this is the best choice. 3942 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3943 if (ConstantSize) { 3944 // Memmove with size zero? Just return the original chain. 3945 if (ConstantSize->isNullValue()) 3946 return Chain; 3947 3948 SDValue Result = 3949 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3950 ConstantSize->getZExtValue(), Align, isVol, 3951 false, DstPtrInfo, SrcPtrInfo); 3952 if (Result.getNode()) 3953 return Result; 3954 } 3955 3956 // Then check to see if we should lower the memmove with target-specific 3957 // code. If the target chooses to do this, this is the next best. 3958 SDValue Result = 3959 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3960 DstPtrInfo, SrcPtrInfo); 3961 if (Result.getNode()) 3962 return Result; 3963 3964 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3965 // not be safe. See memcpy above for more details. 3966 3967 // Emit a library call. 3968 TargetLowering::ArgListTy Args; 3969 TargetLowering::ArgListEntry Entry; 3970 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext()); 3971 Entry.Node = Dst; Args.push_back(Entry); 3972 Entry.Node = Src; Args.push_back(Entry); 3973 Entry.Node = Size; Args.push_back(Entry); 3974 // FIXME: pass in DebugLoc 3975 TargetLowering:: 3976 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3977 false, false, false, false, 0, 3978 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), 3979 /*isTailCall=*/false, 3980 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3981 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3982 TLI.getPointerTy()), 3983 Args, *this, dl); 3984 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3985 3986 return CallResult.second; 3987} 3988 3989SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3990 SDValue Src, SDValue Size, 3991 unsigned Align, bool isVol, 3992 MachinePointerInfo DstPtrInfo) { 3993 assert(Align && "The SDAG layer expects explicit alignment and reservers 0"); 3994 3995 // Check to see if we should lower the memset to stores first. 3996 // For cases within the target-specified limits, this is the best choice. 3997 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3998 if (ConstantSize) { 3999 // Memset with size zero? Just return the original chain. 4000 if (ConstantSize->isNullValue()) 4001 return Chain; 4002 4003 SDValue Result = 4004 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 4005 Align, isVol, DstPtrInfo); 4006 4007 if (Result.getNode()) 4008 return Result; 4009 } 4010 4011 // Then check to see if we should lower the memset with target-specific 4012 // code. If the target chooses to do this, this is the next best. 4013 SDValue Result = 4014 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 4015 DstPtrInfo); 4016 if (Result.getNode()) 4017 return Result; 4018 4019 // Emit a library call. 4020 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext()); 4021 TargetLowering::ArgListTy Args; 4022 TargetLowering::ArgListEntry Entry; 4023 Entry.Node = Dst; Entry.Ty = IntPtrTy; 4024 Args.push_back(Entry); 4025 // Extend or truncate the argument to be an i32 value for the call. 4026 if (Src.getValueType().bitsGT(MVT::i32)) 4027 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 4028 else 4029 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 4030 Entry.Node = Src; 4031 Entry.Ty = Type::getInt32Ty(*getContext()); 4032 Entry.isSExt = true; 4033 Args.push_back(Entry); 4034 Entry.Node = Size; 4035 Entry.Ty = IntPtrTy; 4036 Entry.isSExt = false; 4037 Args.push_back(Entry); 4038 // FIXME: pass in DebugLoc 4039 TargetLowering:: 4040 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 4041 false, false, false, false, 0, 4042 TLI.getLibcallCallingConv(RTLIB::MEMSET), 4043 /*isTailCall=*/false, 4044 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 4045 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 4046 TLI.getPointerTy()), 4047 Args, *this, dl); 4048 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 4049 4050 return CallResult.second; 4051} 4052 4053SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4054 SDValue Chain, SDValue Ptr, SDValue Cmp, 4055 SDValue Swp, MachinePointerInfo PtrInfo, 4056 unsigned Alignment, 4057 AtomicOrdering Ordering, 4058 SynchronizationScope SynchScope) { 4059 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4060 Alignment = getEVTAlignment(MemVT); 4061 4062 MachineFunction &MF = getMachineFunction(); 4063 4064 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE. 4065 // For now, atomics are considered to be volatile always. 4066 // FIXME: Volatile isn't really correct; we should keep track of atomic 4067 // orderings in the memoperand. 4068 unsigned Flags = MachineMemOperand::MOVolatile; 4069 if (Opcode != ISD::ATOMIC_STORE) 4070 Flags |= MachineMemOperand::MOLoad; 4071 if (Opcode != ISD::ATOMIC_LOAD) 4072 Flags |= MachineMemOperand::MOStore; 4073 4074 MachineMemOperand *MMO = 4075 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 4076 4077 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 4078 Ordering, SynchScope); 4079} 4080 4081SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4082 SDValue Chain, 4083 SDValue Ptr, SDValue Cmp, 4084 SDValue Swp, MachineMemOperand *MMO, 4085 AtomicOrdering Ordering, 4086 SynchronizationScope SynchScope) { 4087 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 4088 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 4089 4090 EVT VT = Cmp.getValueType(); 4091 4092 SDVTList VTs = getVTList(VT, MVT::Other); 4093 FoldingSetNodeID ID; 4094 ID.AddInteger(MemVT.getRawBits()); 4095 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 4096 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 4097 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4098 void* IP = 0; 4099 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4100 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4101 return SDValue(E, 0); 4102 } 4103 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4104 Ptr, Cmp, Swp, MMO, Ordering, 4105 SynchScope); 4106 CSEMap.InsertNode(N, IP); 4107 AllNodes.push_back(N); 4108 return SDValue(N, 0); 4109} 4110 4111SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4112 SDValue Chain, 4113 SDValue Ptr, SDValue Val, 4114 const Value* PtrVal, 4115 unsigned Alignment, 4116 AtomicOrdering Ordering, 4117 SynchronizationScope SynchScope) { 4118 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4119 Alignment = getEVTAlignment(MemVT); 4120 4121 MachineFunction &MF = getMachineFunction(); 4122 // An atomic store does not load. An atomic load does not store. 4123 // (An atomicrmw obviously both loads and stores.) 4124 // For now, atomics are considered to be volatile always, and they are 4125 // chained as such. 4126 // FIXME: Volatile isn't really correct; we should keep track of atomic 4127 // orderings in the memoperand. 4128 unsigned Flags = MachineMemOperand::MOVolatile; 4129 if (Opcode != ISD::ATOMIC_STORE) 4130 Flags |= MachineMemOperand::MOLoad; 4131 if (Opcode != ISD::ATOMIC_LOAD) 4132 Flags |= MachineMemOperand::MOStore; 4133 4134 MachineMemOperand *MMO = 4135 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4136 MemVT.getStoreSize(), Alignment); 4137 4138 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 4139 Ordering, SynchScope); 4140} 4141 4142SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4143 SDValue Chain, 4144 SDValue Ptr, SDValue Val, 4145 MachineMemOperand *MMO, 4146 AtomicOrdering Ordering, 4147 SynchronizationScope SynchScope) { 4148 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 4149 Opcode == ISD::ATOMIC_LOAD_SUB || 4150 Opcode == ISD::ATOMIC_LOAD_AND || 4151 Opcode == ISD::ATOMIC_LOAD_OR || 4152 Opcode == ISD::ATOMIC_LOAD_XOR || 4153 Opcode == ISD::ATOMIC_LOAD_NAND || 4154 Opcode == ISD::ATOMIC_LOAD_MIN || 4155 Opcode == ISD::ATOMIC_LOAD_MAX || 4156 Opcode == ISD::ATOMIC_LOAD_UMIN || 4157 Opcode == ISD::ATOMIC_LOAD_UMAX || 4158 Opcode == ISD::ATOMIC_SWAP || 4159 Opcode == ISD::ATOMIC_STORE) && 4160 "Invalid Atomic Op"); 4161 4162 EVT VT = Val.getValueType(); 4163 4164 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 4165 getVTList(VT, MVT::Other); 4166 FoldingSetNodeID ID; 4167 ID.AddInteger(MemVT.getRawBits()); 4168 SDValue Ops[] = {Chain, Ptr, Val}; 4169 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 4170 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4171 void* IP = 0; 4172 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4173 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4174 return SDValue(E, 0); 4175 } 4176 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4177 Ptr, Val, MMO, 4178 Ordering, SynchScope); 4179 CSEMap.InsertNode(N, IP); 4180 AllNodes.push_back(N); 4181 return SDValue(N, 0); 4182} 4183 4184SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4185 EVT VT, SDValue Chain, 4186 SDValue Ptr, 4187 const Value* PtrVal, 4188 unsigned Alignment, 4189 AtomicOrdering Ordering, 4190 SynchronizationScope SynchScope) { 4191 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4192 Alignment = getEVTAlignment(MemVT); 4193 4194 MachineFunction &MF = getMachineFunction(); 4195 // An atomic store does not load. An atomic load does not store. 4196 // (An atomicrmw obviously both loads and stores.) 4197 // For now, atomics are considered to be volatile always, and they are 4198 // chained as such. 4199 // FIXME: Volatile isn't really correct; we should keep track of atomic 4200 // orderings in the memoperand. 4201 unsigned Flags = MachineMemOperand::MOVolatile; 4202 if (Opcode != ISD::ATOMIC_STORE) 4203 Flags |= MachineMemOperand::MOLoad; 4204 if (Opcode != ISD::ATOMIC_LOAD) 4205 Flags |= MachineMemOperand::MOStore; 4206 4207 MachineMemOperand *MMO = 4208 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4209 MemVT.getStoreSize(), Alignment); 4210 4211 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4212 Ordering, SynchScope); 4213} 4214 4215SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4216 EVT VT, SDValue Chain, 4217 SDValue Ptr, 4218 MachineMemOperand *MMO, 4219 AtomicOrdering Ordering, 4220 SynchronizationScope SynchScope) { 4221 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4222 4223 SDVTList VTs = getVTList(VT, MVT::Other); 4224 FoldingSetNodeID ID; 4225 ID.AddInteger(MemVT.getRawBits()); 4226 SDValue Ops[] = {Chain, Ptr}; 4227 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 4228 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4229 void* IP = 0; 4230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4231 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4232 return SDValue(E, 0); 4233 } 4234 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4235 Ptr, MMO, Ordering, SynchScope); 4236 CSEMap.InsertNode(N, IP); 4237 AllNodes.push_back(N); 4238 return SDValue(N, 0); 4239} 4240 4241/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4242SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4243 DebugLoc dl) { 4244 if (NumOps == 1) 4245 return Ops[0]; 4246 4247 SmallVector<EVT, 4> VTs; 4248 VTs.reserve(NumOps); 4249 for (unsigned i = 0; i < NumOps; ++i) 4250 VTs.push_back(Ops[i].getValueType()); 4251 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4252 Ops, NumOps); 4253} 4254 4255SDValue 4256SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4257 const EVT *VTs, unsigned NumVTs, 4258 const SDValue *Ops, unsigned NumOps, 4259 EVT MemVT, MachinePointerInfo PtrInfo, 4260 unsigned Align, bool Vol, 4261 bool ReadMem, bool WriteMem) { 4262 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4263 MemVT, PtrInfo, Align, Vol, 4264 ReadMem, WriteMem); 4265} 4266 4267SDValue 4268SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4269 const SDValue *Ops, unsigned NumOps, 4270 EVT MemVT, MachinePointerInfo PtrInfo, 4271 unsigned Align, bool Vol, 4272 bool ReadMem, bool WriteMem) { 4273 if (Align == 0) // Ensure that codegen never sees alignment 0 4274 Align = getEVTAlignment(MemVT); 4275 4276 MachineFunction &MF = getMachineFunction(); 4277 unsigned Flags = 0; 4278 if (WriteMem) 4279 Flags |= MachineMemOperand::MOStore; 4280 if (ReadMem) 4281 Flags |= MachineMemOperand::MOLoad; 4282 if (Vol) 4283 Flags |= MachineMemOperand::MOVolatile; 4284 MachineMemOperand *MMO = 4285 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4286 4287 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4288} 4289 4290SDValue 4291SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4292 const SDValue *Ops, unsigned NumOps, 4293 EVT MemVT, MachineMemOperand *MMO) { 4294 assert((Opcode == ISD::INTRINSIC_VOID || 4295 Opcode == ISD::INTRINSIC_W_CHAIN || 4296 Opcode == ISD::PREFETCH || 4297 Opcode == ISD::LIFETIME_START || 4298 Opcode == ISD::LIFETIME_END || 4299 (Opcode <= INT_MAX && 4300 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4301 "Opcode is not a memory-accessing opcode!"); 4302 4303 // Memoize the node unless it returns a flag. 4304 MemIntrinsicSDNode *N; 4305 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4306 FoldingSetNodeID ID; 4307 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4308 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4309 void *IP = 0; 4310 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4311 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4312 return SDValue(E, 0); 4313 } 4314 4315 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4316 MemVT, MMO); 4317 CSEMap.InsertNode(N, IP); 4318 } else { 4319 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4320 MemVT, MMO); 4321 } 4322 AllNodes.push_back(N); 4323 return SDValue(N, 0); 4324} 4325 4326/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4327/// MachinePointerInfo record from it. This is particularly useful because the 4328/// code generator has many cases where it doesn't bother passing in a 4329/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4330static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4331 // If this is FI+Offset, we can model it. 4332 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4333 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4334 4335 // If this is (FI+Offset1)+Offset2, we can model it. 4336 if (Ptr.getOpcode() != ISD::ADD || 4337 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4338 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4339 return MachinePointerInfo(); 4340 4341 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4342 return MachinePointerInfo::getFixedStack(FI, Offset+ 4343 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4344} 4345 4346/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4347/// MachinePointerInfo record from it. This is particularly useful because the 4348/// code generator has many cases where it doesn't bother passing in a 4349/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4350static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4351 // If the 'Offset' value isn't a constant, we can't handle this. 4352 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4353 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4354 if (OffsetOp.getOpcode() == ISD::UNDEF) 4355 return InferPointerInfo(Ptr); 4356 return MachinePointerInfo(); 4357} 4358 4359 4360SDValue 4361SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4362 EVT VT, DebugLoc dl, SDValue Chain, 4363 SDValue Ptr, SDValue Offset, 4364 MachinePointerInfo PtrInfo, EVT MemVT, 4365 bool isVolatile, bool isNonTemporal, bool isInvariant, 4366 unsigned Alignment, const MDNode *TBAAInfo, 4367 const MDNode *Ranges) { 4368 assert(Chain.getValueType() == MVT::Other && 4369 "Invalid chain type"); 4370 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4371 Alignment = getEVTAlignment(VT); 4372 4373 unsigned Flags = MachineMemOperand::MOLoad; 4374 if (isVolatile) 4375 Flags |= MachineMemOperand::MOVolatile; 4376 if (isNonTemporal) 4377 Flags |= MachineMemOperand::MONonTemporal; 4378 if (isInvariant) 4379 Flags |= MachineMemOperand::MOInvariant; 4380 4381 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4382 // clients. 4383 if (PtrInfo.V == 0) 4384 PtrInfo = InferPointerInfo(Ptr, Offset); 4385 4386 MachineFunction &MF = getMachineFunction(); 4387 MachineMemOperand *MMO = 4388 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4389 TBAAInfo, Ranges); 4390 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4391} 4392 4393SDValue 4394SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4395 EVT VT, DebugLoc dl, SDValue Chain, 4396 SDValue Ptr, SDValue Offset, EVT MemVT, 4397 MachineMemOperand *MMO) { 4398 if (VT == MemVT) { 4399 ExtType = ISD::NON_EXTLOAD; 4400 } else if (ExtType == ISD::NON_EXTLOAD) { 4401 assert(VT == MemVT && "Non-extending load from different memory type!"); 4402 } else { 4403 // Extending load. 4404 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4405 "Should only be an extending load, not truncating!"); 4406 assert(VT.isInteger() == MemVT.isInteger() && 4407 "Cannot convert from FP to Int or Int -> FP!"); 4408 assert(VT.isVector() == MemVT.isVector() && 4409 "Cannot use trunc store to convert to or from a vector!"); 4410 assert((!VT.isVector() || 4411 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4412 "Cannot use trunc store to change the number of vector elements!"); 4413 } 4414 4415 bool Indexed = AM != ISD::UNINDEXED; 4416 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4417 "Unindexed load with an offset!"); 4418 4419 SDVTList VTs = Indexed ? 4420 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4421 SDValue Ops[] = { Chain, Ptr, Offset }; 4422 FoldingSetNodeID ID; 4423 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4424 ID.AddInteger(MemVT.getRawBits()); 4425 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4426 MMO->isNonTemporal(), 4427 MMO->isInvariant())); 4428 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4429 void *IP = 0; 4430 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4431 cast<LoadSDNode>(E)->refineAlignment(MMO); 4432 return SDValue(E, 0); 4433 } 4434 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4435 MemVT, MMO); 4436 CSEMap.InsertNode(N, IP); 4437 AllNodes.push_back(N); 4438 return SDValue(N, 0); 4439} 4440 4441SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4442 SDValue Chain, SDValue Ptr, 4443 MachinePointerInfo PtrInfo, 4444 bool isVolatile, bool isNonTemporal, 4445 bool isInvariant, unsigned Alignment, 4446 const MDNode *TBAAInfo, 4447 const MDNode *Ranges) { 4448 SDValue Undef = getUNDEF(Ptr.getValueType()); 4449 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4450 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4451 TBAAInfo, Ranges); 4452} 4453 4454SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4455 SDValue Chain, SDValue Ptr, 4456 MachinePointerInfo PtrInfo, EVT MemVT, 4457 bool isVolatile, bool isNonTemporal, 4458 unsigned Alignment, const MDNode *TBAAInfo) { 4459 SDValue Undef = getUNDEF(Ptr.getValueType()); 4460 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4461 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4462 TBAAInfo); 4463} 4464 4465 4466SDValue 4467SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4468 SDValue Offset, ISD::MemIndexedMode AM) { 4469 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4470 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4471 "Load is already a indexed load!"); 4472 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4473 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4474 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4475 false, LD->getAlignment()); 4476} 4477 4478SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4479 SDValue Ptr, MachinePointerInfo PtrInfo, 4480 bool isVolatile, bool isNonTemporal, 4481 unsigned Alignment, const MDNode *TBAAInfo) { 4482 assert(Chain.getValueType() == MVT::Other && 4483 "Invalid chain type"); 4484 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4485 Alignment = getEVTAlignment(Val.getValueType()); 4486 4487 unsigned Flags = MachineMemOperand::MOStore; 4488 if (isVolatile) 4489 Flags |= MachineMemOperand::MOVolatile; 4490 if (isNonTemporal) 4491 Flags |= MachineMemOperand::MONonTemporal; 4492 4493 if (PtrInfo.V == 0) 4494 PtrInfo = InferPointerInfo(Ptr); 4495 4496 MachineFunction &MF = getMachineFunction(); 4497 MachineMemOperand *MMO = 4498 MF.getMachineMemOperand(PtrInfo, Flags, 4499 Val.getValueType().getStoreSize(), Alignment, 4500 TBAAInfo); 4501 4502 return getStore(Chain, dl, Val, Ptr, MMO); 4503} 4504 4505SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4506 SDValue Ptr, MachineMemOperand *MMO) { 4507 assert(Chain.getValueType() == MVT::Other && 4508 "Invalid chain type"); 4509 EVT VT = Val.getValueType(); 4510 SDVTList VTs = getVTList(MVT::Other); 4511 SDValue Undef = getUNDEF(Ptr.getValueType()); 4512 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4513 FoldingSetNodeID ID; 4514 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4515 ID.AddInteger(VT.getRawBits()); 4516 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4517 MMO->isNonTemporal(), MMO->isInvariant())); 4518 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4519 void *IP = 0; 4520 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4521 cast<StoreSDNode>(E)->refineAlignment(MMO); 4522 return SDValue(E, 0); 4523 } 4524 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4525 false, VT, MMO); 4526 CSEMap.InsertNode(N, IP); 4527 AllNodes.push_back(N); 4528 return SDValue(N, 0); 4529} 4530 4531SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4532 SDValue Ptr, MachinePointerInfo PtrInfo, 4533 EVT SVT,bool isVolatile, bool isNonTemporal, 4534 unsigned Alignment, 4535 const MDNode *TBAAInfo) { 4536 assert(Chain.getValueType() == MVT::Other && 4537 "Invalid chain type"); 4538 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4539 Alignment = getEVTAlignment(SVT); 4540 4541 unsigned Flags = MachineMemOperand::MOStore; 4542 if (isVolatile) 4543 Flags |= MachineMemOperand::MOVolatile; 4544 if (isNonTemporal) 4545 Flags |= MachineMemOperand::MONonTemporal; 4546 4547 if (PtrInfo.V == 0) 4548 PtrInfo = InferPointerInfo(Ptr); 4549 4550 MachineFunction &MF = getMachineFunction(); 4551 MachineMemOperand *MMO = 4552 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4553 TBAAInfo); 4554 4555 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4556} 4557 4558SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4559 SDValue Ptr, EVT SVT, 4560 MachineMemOperand *MMO) { 4561 EVT VT = Val.getValueType(); 4562 4563 assert(Chain.getValueType() == MVT::Other && 4564 "Invalid chain type"); 4565 if (VT == SVT) 4566 return getStore(Chain, dl, Val, Ptr, MMO); 4567 4568 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4569 "Should only be a truncating store, not extending!"); 4570 assert(VT.isInteger() == SVT.isInteger() && 4571 "Can't do FP-INT conversion!"); 4572 assert(VT.isVector() == SVT.isVector() && 4573 "Cannot use trunc store to convert to or from a vector!"); 4574 assert((!VT.isVector() || 4575 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4576 "Cannot use trunc store to change the number of vector elements!"); 4577 4578 SDVTList VTs = getVTList(MVT::Other); 4579 SDValue Undef = getUNDEF(Ptr.getValueType()); 4580 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4581 FoldingSetNodeID ID; 4582 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4583 ID.AddInteger(SVT.getRawBits()); 4584 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4585 MMO->isNonTemporal(), MMO->isInvariant())); 4586 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4587 void *IP = 0; 4588 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4589 cast<StoreSDNode>(E)->refineAlignment(MMO); 4590 return SDValue(E, 0); 4591 } 4592 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4593 true, SVT, MMO); 4594 CSEMap.InsertNode(N, IP); 4595 AllNodes.push_back(N); 4596 return SDValue(N, 0); 4597} 4598 4599SDValue 4600SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4601 SDValue Offset, ISD::MemIndexedMode AM) { 4602 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4603 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4604 "Store is already a indexed store!"); 4605 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4606 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4607 FoldingSetNodeID ID; 4608 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4609 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4610 ID.AddInteger(ST->getRawSubclassData()); 4611 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 4612 void *IP = 0; 4613 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4614 return SDValue(E, 0); 4615 4616 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4617 ST->isTruncatingStore(), 4618 ST->getMemoryVT(), 4619 ST->getMemOperand()); 4620 CSEMap.InsertNode(N, IP); 4621 AllNodes.push_back(N); 4622 return SDValue(N, 0); 4623} 4624 4625SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4626 SDValue Chain, SDValue Ptr, 4627 SDValue SV, 4628 unsigned Align) { 4629 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4630 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4631} 4632 4633SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4634 const SDUse *Ops, unsigned NumOps) { 4635 switch (NumOps) { 4636 case 0: return getNode(Opcode, DL, VT); 4637 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4638 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4639 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4640 default: break; 4641 } 4642 4643 // Copy from an SDUse array into an SDValue array for use with 4644 // the regular getNode logic. 4645 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4646 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4647} 4648 4649SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4650 const SDValue *Ops, unsigned NumOps) { 4651 switch (NumOps) { 4652 case 0: return getNode(Opcode, DL, VT); 4653 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4654 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4655 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4656 default: break; 4657 } 4658 4659 switch (Opcode) { 4660 default: break; 4661 case ISD::SELECT_CC: { 4662 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4663 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4664 "LHS and RHS of condition must have same type!"); 4665 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4666 "True and False arms of SelectCC must have same type!"); 4667 assert(Ops[2].getValueType() == VT && 4668 "select_cc node must be of same type as true and false value!"); 4669 break; 4670 } 4671 case ISD::BR_CC: { 4672 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4673 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4674 "LHS/RHS of comparison should match types!"); 4675 break; 4676 } 4677 } 4678 4679 // Memoize nodes. 4680 SDNode *N; 4681 SDVTList VTs = getVTList(VT); 4682 4683 if (VT != MVT::Glue) { 4684 FoldingSetNodeID ID; 4685 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4686 void *IP = 0; 4687 4688 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4689 return SDValue(E, 0); 4690 4691 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4692 CSEMap.InsertNode(N, IP); 4693 } else { 4694 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4695 } 4696 4697 AllNodes.push_back(N); 4698#ifndef NDEBUG 4699 VerifySDNode(N); 4700#endif 4701 return SDValue(N, 0); 4702} 4703 4704SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4705 const std::vector<EVT> &ResultTys, 4706 const SDValue *Ops, unsigned NumOps) { 4707 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4708 Ops, NumOps); 4709} 4710 4711SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4712 const EVT *VTs, unsigned NumVTs, 4713 const SDValue *Ops, unsigned NumOps) { 4714 if (NumVTs == 1) 4715 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4716 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4717} 4718 4719SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4720 const SDValue *Ops, unsigned NumOps) { 4721 if (VTList.NumVTs == 1) 4722 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4723 4724#if 0 4725 switch (Opcode) { 4726 // FIXME: figure out how to safely handle things like 4727 // int foo(int x) { return 1 << (x & 255); } 4728 // int bar() { return foo(256); } 4729 case ISD::SRA_PARTS: 4730 case ISD::SRL_PARTS: 4731 case ISD::SHL_PARTS: 4732 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4733 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4734 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4735 else if (N3.getOpcode() == ISD::AND) 4736 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4737 // If the and is only masking out bits that cannot effect the shift, 4738 // eliminate the and. 4739 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4740 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4741 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4742 } 4743 break; 4744 } 4745#endif 4746 4747 // Memoize the node unless it returns a flag. 4748 SDNode *N; 4749 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4750 FoldingSetNodeID ID; 4751 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4752 void *IP = 0; 4753 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4754 return SDValue(E, 0); 4755 4756 if (NumOps == 1) { 4757 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4758 } else if (NumOps == 2) { 4759 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4760 } else if (NumOps == 3) { 4761 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4762 Ops[2]); 4763 } else { 4764 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4765 } 4766 CSEMap.InsertNode(N, IP); 4767 } else { 4768 if (NumOps == 1) { 4769 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4770 } else if (NumOps == 2) { 4771 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4772 } else if (NumOps == 3) { 4773 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4774 Ops[2]); 4775 } else { 4776 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4777 } 4778 } 4779 AllNodes.push_back(N); 4780#ifndef NDEBUG 4781 VerifySDNode(N); 4782#endif 4783 return SDValue(N, 0); 4784} 4785 4786SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4787 return getNode(Opcode, DL, VTList, 0, 0); 4788} 4789 4790SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4791 SDValue N1) { 4792 SDValue Ops[] = { N1 }; 4793 return getNode(Opcode, DL, VTList, Ops, 1); 4794} 4795 4796SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4797 SDValue N1, SDValue N2) { 4798 SDValue Ops[] = { N1, N2 }; 4799 return getNode(Opcode, DL, VTList, Ops, 2); 4800} 4801 4802SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4803 SDValue N1, SDValue N2, SDValue N3) { 4804 SDValue Ops[] = { N1, N2, N3 }; 4805 return getNode(Opcode, DL, VTList, Ops, 3); 4806} 4807 4808SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4809 SDValue N1, SDValue N2, SDValue N3, 4810 SDValue N4) { 4811 SDValue Ops[] = { N1, N2, N3, N4 }; 4812 return getNode(Opcode, DL, VTList, Ops, 4); 4813} 4814 4815SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4816 SDValue N1, SDValue N2, SDValue N3, 4817 SDValue N4, SDValue N5) { 4818 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4819 return getNode(Opcode, DL, VTList, Ops, 5); 4820} 4821 4822SDVTList SelectionDAG::getVTList(EVT VT) { 4823 return makeVTList(SDNode::getValueTypeList(VT), 1); 4824} 4825 4826SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4827 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4828 E = VTList.rend(); I != E; ++I) 4829 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4830 return *I; 4831 4832 EVT *Array = Allocator.Allocate<EVT>(2); 4833 Array[0] = VT1; 4834 Array[1] = VT2; 4835 SDVTList Result = makeVTList(Array, 2); 4836 VTList.push_back(Result); 4837 return Result; 4838} 4839 4840SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4841 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4842 E = VTList.rend(); I != E; ++I) 4843 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4844 I->VTs[2] == VT3) 4845 return *I; 4846 4847 EVT *Array = Allocator.Allocate<EVT>(3); 4848 Array[0] = VT1; 4849 Array[1] = VT2; 4850 Array[2] = VT3; 4851 SDVTList Result = makeVTList(Array, 3); 4852 VTList.push_back(Result); 4853 return Result; 4854} 4855 4856SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4857 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4858 E = VTList.rend(); I != E; ++I) 4859 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4860 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4861 return *I; 4862 4863 EVT *Array = Allocator.Allocate<EVT>(4); 4864 Array[0] = VT1; 4865 Array[1] = VT2; 4866 Array[2] = VT3; 4867 Array[3] = VT4; 4868 SDVTList Result = makeVTList(Array, 4); 4869 VTList.push_back(Result); 4870 return Result; 4871} 4872 4873SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4874 switch (NumVTs) { 4875 case 0: llvm_unreachable("Cannot have nodes without results!"); 4876 case 1: return getVTList(VTs[0]); 4877 case 2: return getVTList(VTs[0], VTs[1]); 4878 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4879 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4880 default: break; 4881 } 4882 4883 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4884 E = VTList.rend(); I != E; ++I) { 4885 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4886 continue; 4887 4888 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2])) 4889 return *I; 4890 } 4891 4892 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4893 std::copy(VTs, VTs+NumVTs, Array); 4894 SDVTList Result = makeVTList(Array, NumVTs); 4895 VTList.push_back(Result); 4896 return Result; 4897} 4898 4899 4900/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4901/// specified operands. If the resultant node already exists in the DAG, 4902/// this does not modify the specified node, instead it returns the node that 4903/// already exists. If the resultant node does not exist in the DAG, the 4904/// input node is returned. As a degenerate case, if you specify the same 4905/// input operands as the node already has, the input node is returned. 4906SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4907 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4908 4909 // Check to see if there is no change. 4910 if (Op == N->getOperand(0)) return N; 4911 4912 // See if the modified node already exists. 4913 void *InsertPos = 0; 4914 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4915 return Existing; 4916 4917 // Nope it doesn't. Remove the node from its current place in the maps. 4918 if (InsertPos) 4919 if (!RemoveNodeFromCSEMaps(N)) 4920 InsertPos = 0; 4921 4922 // Now we update the operands. 4923 N->OperandList[0].set(Op); 4924 4925 // If this gets put into a CSE map, add it. 4926 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4927 return N; 4928} 4929 4930SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4931 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4932 4933 // Check to see if there is no change. 4934 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4935 return N; // No operands changed, just return the input node. 4936 4937 // See if the modified node already exists. 4938 void *InsertPos = 0; 4939 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4940 return Existing; 4941 4942 // Nope it doesn't. Remove the node from its current place in the maps. 4943 if (InsertPos) 4944 if (!RemoveNodeFromCSEMaps(N)) 4945 InsertPos = 0; 4946 4947 // Now we update the operands. 4948 if (N->OperandList[0] != Op1) 4949 N->OperandList[0].set(Op1); 4950 if (N->OperandList[1] != Op2) 4951 N->OperandList[1].set(Op2); 4952 4953 // If this gets put into a CSE map, add it. 4954 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4955 return N; 4956} 4957 4958SDNode *SelectionDAG:: 4959UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4960 SDValue Ops[] = { Op1, Op2, Op3 }; 4961 return UpdateNodeOperands(N, Ops, 3); 4962} 4963 4964SDNode *SelectionDAG:: 4965UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4966 SDValue Op3, SDValue Op4) { 4967 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4968 return UpdateNodeOperands(N, Ops, 4); 4969} 4970 4971SDNode *SelectionDAG:: 4972UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4973 SDValue Op3, SDValue Op4, SDValue Op5) { 4974 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4975 return UpdateNodeOperands(N, Ops, 5); 4976} 4977 4978SDNode *SelectionDAG:: 4979UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4980 assert(N->getNumOperands() == NumOps && 4981 "Update with wrong number of operands"); 4982 4983 // Check to see if there is no change. 4984 bool AnyChange = false; 4985 for (unsigned i = 0; i != NumOps; ++i) { 4986 if (Ops[i] != N->getOperand(i)) { 4987 AnyChange = true; 4988 break; 4989 } 4990 } 4991 4992 // No operands changed, just return the input node. 4993 if (!AnyChange) return N; 4994 4995 // See if the modified node already exists. 4996 void *InsertPos = 0; 4997 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4998 return Existing; 4999 5000 // Nope it doesn't. Remove the node from its current place in the maps. 5001 if (InsertPos) 5002 if (!RemoveNodeFromCSEMaps(N)) 5003 InsertPos = 0; 5004 5005 // Now we update the operands. 5006 for (unsigned i = 0; i != NumOps; ++i) 5007 if (N->OperandList[i] != Ops[i]) 5008 N->OperandList[i].set(Ops[i]); 5009 5010 // If this gets put into a CSE map, add it. 5011 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 5012 return N; 5013} 5014 5015/// DropOperands - Release the operands and set this node to have 5016/// zero operands. 5017void SDNode::DropOperands() { 5018 // Unlike the code in MorphNodeTo that does this, we don't need to 5019 // watch for dead nodes here. 5020 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 5021 SDUse &Use = *I++; 5022 Use.set(SDValue()); 5023 } 5024} 5025 5026/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 5027/// machine opcode. 5028/// 5029SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5030 EVT VT) { 5031 SDVTList VTs = getVTList(VT); 5032 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 5033} 5034 5035SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5036 EVT VT, SDValue Op1) { 5037 SDVTList VTs = getVTList(VT); 5038 SDValue Ops[] = { Op1 }; 5039 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5040} 5041 5042SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5043 EVT VT, SDValue Op1, 5044 SDValue Op2) { 5045 SDVTList VTs = getVTList(VT); 5046 SDValue Ops[] = { Op1, Op2 }; 5047 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5048} 5049 5050SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5051 EVT VT, SDValue Op1, 5052 SDValue Op2, SDValue Op3) { 5053 SDVTList VTs = getVTList(VT); 5054 SDValue Ops[] = { Op1, Op2, Op3 }; 5055 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5056} 5057 5058SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5059 EVT VT, const SDValue *Ops, 5060 unsigned NumOps) { 5061 SDVTList VTs = getVTList(VT); 5062 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5063} 5064 5065SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5066 EVT VT1, EVT VT2, const SDValue *Ops, 5067 unsigned NumOps) { 5068 SDVTList VTs = getVTList(VT1, VT2); 5069 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5070} 5071 5072SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5073 EVT VT1, EVT VT2) { 5074 SDVTList VTs = getVTList(VT1, VT2); 5075 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 5076} 5077 5078SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5079 EVT VT1, EVT VT2, EVT VT3, 5080 const SDValue *Ops, unsigned NumOps) { 5081 SDVTList VTs = getVTList(VT1, VT2, VT3); 5082 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5083} 5084 5085SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5086 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 5087 const SDValue *Ops, unsigned NumOps) { 5088 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5089 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5090} 5091 5092SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5093 EVT VT1, EVT VT2, 5094 SDValue Op1) { 5095 SDVTList VTs = getVTList(VT1, VT2); 5096 SDValue Ops[] = { Op1 }; 5097 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5098} 5099 5100SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5101 EVT VT1, EVT VT2, 5102 SDValue Op1, SDValue Op2) { 5103 SDVTList VTs = getVTList(VT1, VT2); 5104 SDValue Ops[] = { Op1, Op2 }; 5105 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5106} 5107 5108SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5109 EVT VT1, EVT VT2, 5110 SDValue Op1, SDValue Op2, 5111 SDValue Op3) { 5112 SDVTList VTs = getVTList(VT1, VT2); 5113 SDValue Ops[] = { Op1, Op2, Op3 }; 5114 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5115} 5116 5117SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5118 EVT VT1, EVT VT2, EVT VT3, 5119 SDValue Op1, SDValue Op2, 5120 SDValue Op3) { 5121 SDVTList VTs = getVTList(VT1, VT2, VT3); 5122 SDValue Ops[] = { Op1, Op2, Op3 }; 5123 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5124} 5125 5126SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5127 SDVTList VTs, const SDValue *Ops, 5128 unsigned NumOps) { 5129 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 5130 // Reset the NodeID to -1. 5131 N->setNodeId(-1); 5132 return N; 5133} 5134 5135/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away 5136/// the line number information on the merged node since it is not possible to 5137/// preserve the information that operation is associated with multiple lines. 5138/// This will make the debugger working better at -O0, were there is a higher 5139/// probability having other instructions associated with that line. 5140/// 5141SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) { 5142 DebugLoc NLoc = N->getDebugLoc(); 5143 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) { 5144 N->setDebugLoc(DebugLoc()); 5145 } 5146 return N; 5147} 5148 5149/// MorphNodeTo - This *mutates* the specified node to have the specified 5150/// return type, opcode, and operands. 5151/// 5152/// Note that MorphNodeTo returns the resultant node. If there is already a 5153/// node of the specified opcode and operands, it returns that node instead of 5154/// the current one. Note that the DebugLoc need not be the same. 5155/// 5156/// Using MorphNodeTo is faster than creating a new node and swapping it in 5157/// with ReplaceAllUsesWith both because it often avoids allocating a new 5158/// node, and because it doesn't require CSE recalculation for any of 5159/// the node's users. 5160/// 5161SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 5162 SDVTList VTs, const SDValue *Ops, 5163 unsigned NumOps) { 5164 // If an identical node already exists, use it. 5165 void *IP = 0; 5166 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 5167 FoldingSetNodeID ID; 5168 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 5169 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 5170 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc()); 5171 } 5172 5173 if (!RemoveNodeFromCSEMaps(N)) 5174 IP = 0; 5175 5176 // Start the morphing. 5177 N->NodeType = Opc; 5178 N->ValueList = VTs.VTs; 5179 N->NumValues = VTs.NumVTs; 5180 5181 // Clear the operands list, updating used nodes to remove this from their 5182 // use list. Keep track of any operands that become dead as a result. 5183 SmallPtrSet<SDNode*, 16> DeadNodeSet; 5184 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 5185 SDUse &Use = *I++; 5186 SDNode *Used = Use.getNode(); 5187 Use.set(SDValue()); 5188 if (Used->use_empty()) 5189 DeadNodeSet.insert(Used); 5190 } 5191 5192 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 5193 // Initialize the memory references information. 5194 MN->setMemRefs(0, 0); 5195 // If NumOps is larger than the # of operands we can have in a 5196 // MachineSDNode, reallocate the operand list. 5197 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 5198 if (MN->OperandsNeedDelete) 5199 delete[] MN->OperandList; 5200 if (NumOps > array_lengthof(MN->LocalOperands)) 5201 // We're creating a final node that will live unmorphed for the 5202 // remainder of the current SelectionDAG iteration, so we can allocate 5203 // the operands directly out of a pool with no recycling metadata. 5204 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5205 Ops, NumOps); 5206 else 5207 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5208 MN->OperandsNeedDelete = false; 5209 } else 5210 MN->InitOperands(MN->OperandList, Ops, NumOps); 5211 } else { 5212 // If NumOps is larger than the # of operands we currently have, reallocate 5213 // the operand list. 5214 if (NumOps > N->NumOperands) { 5215 if (N->OperandsNeedDelete) 5216 delete[] N->OperandList; 5217 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5218 N->OperandsNeedDelete = true; 5219 } else 5220 N->InitOperands(N->OperandList, Ops, NumOps); 5221 } 5222 5223 // Delete any nodes that are still dead after adding the uses for the 5224 // new operands. 5225 if (!DeadNodeSet.empty()) { 5226 SmallVector<SDNode *, 16> DeadNodes; 5227 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5228 E = DeadNodeSet.end(); I != E; ++I) 5229 if ((*I)->use_empty()) 5230 DeadNodes.push_back(*I); 5231 RemoveDeadNodes(DeadNodes); 5232 } 5233 5234 if (IP) 5235 CSEMap.InsertNode(N, IP); // Memoize the new node. 5236 return N; 5237} 5238 5239 5240/// getMachineNode - These are used for target selectors to create a new node 5241/// with specified return type(s), MachineInstr opcode, and operands. 5242/// 5243/// Note that getMachineNode returns the resultant node. If there is already a 5244/// node of the specified opcode and operands, it returns that node instead of 5245/// the current one. 5246MachineSDNode * 5247SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5248 SDVTList VTs = getVTList(VT); 5249 return getMachineNode(Opcode, dl, VTs, 0, 0); 5250} 5251 5252MachineSDNode * 5253SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5254 SDVTList VTs = getVTList(VT); 5255 SDValue Ops[] = { Op1 }; 5256 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5257} 5258 5259MachineSDNode * 5260SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5261 SDValue Op1, SDValue Op2) { 5262 SDVTList VTs = getVTList(VT); 5263 SDValue Ops[] = { Op1, Op2 }; 5264 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5265} 5266 5267MachineSDNode * 5268SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5269 SDValue Op1, SDValue Op2, SDValue Op3) { 5270 SDVTList VTs = getVTList(VT); 5271 SDValue Ops[] = { Op1, Op2, Op3 }; 5272 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5273} 5274 5275MachineSDNode * 5276SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5277 const SDValue *Ops, unsigned NumOps) { 5278 SDVTList VTs = getVTList(VT); 5279 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5280} 5281 5282MachineSDNode * 5283SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5284 SDVTList VTs = getVTList(VT1, VT2); 5285 return getMachineNode(Opcode, dl, VTs, 0, 0); 5286} 5287 5288MachineSDNode * 5289SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5290 EVT VT1, EVT VT2, SDValue Op1) { 5291 SDVTList VTs = getVTList(VT1, VT2); 5292 SDValue Ops[] = { Op1 }; 5293 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5294} 5295 5296MachineSDNode * 5297SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5298 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5299 SDVTList VTs = getVTList(VT1, VT2); 5300 SDValue Ops[] = { Op1, Op2 }; 5301 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5302} 5303 5304MachineSDNode * 5305SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5306 EVT VT1, EVT VT2, SDValue Op1, 5307 SDValue Op2, SDValue Op3) { 5308 SDVTList VTs = getVTList(VT1, VT2); 5309 SDValue Ops[] = { Op1, Op2, Op3 }; 5310 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5311} 5312 5313MachineSDNode * 5314SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5315 EVT VT1, EVT VT2, 5316 const SDValue *Ops, unsigned NumOps) { 5317 SDVTList VTs = getVTList(VT1, VT2); 5318 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5319} 5320 5321MachineSDNode * 5322SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5323 EVT VT1, EVT VT2, EVT VT3, 5324 SDValue Op1, SDValue Op2) { 5325 SDVTList VTs = getVTList(VT1, VT2, VT3); 5326 SDValue Ops[] = { Op1, Op2 }; 5327 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5328} 5329 5330MachineSDNode * 5331SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5332 EVT VT1, EVT VT2, EVT VT3, 5333 SDValue Op1, SDValue Op2, SDValue Op3) { 5334 SDVTList VTs = getVTList(VT1, VT2, VT3); 5335 SDValue Ops[] = { Op1, Op2, Op3 }; 5336 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5337} 5338 5339MachineSDNode * 5340SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5341 EVT VT1, EVT VT2, EVT VT3, 5342 const SDValue *Ops, unsigned NumOps) { 5343 SDVTList VTs = getVTList(VT1, VT2, VT3); 5344 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5345} 5346 5347MachineSDNode * 5348SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5349 EVT VT2, EVT VT3, EVT VT4, 5350 const SDValue *Ops, unsigned NumOps) { 5351 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5352 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5353} 5354 5355MachineSDNode * 5356SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5357 const std::vector<EVT> &ResultTys, 5358 const SDValue *Ops, unsigned NumOps) { 5359 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5360 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5361} 5362 5363MachineSDNode * 5364SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5365 const SDValue *Ops, unsigned NumOps) { 5366 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5367 MachineSDNode *N; 5368 void *IP = 0; 5369 5370 if (DoCSE) { 5371 FoldingSetNodeID ID; 5372 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5373 IP = 0; 5374 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5375 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL)); 5376 } 5377 } 5378 5379 // Allocate a new MachineSDNode. 5380 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5381 5382 // Initialize the operands list. 5383 if (NumOps > array_lengthof(N->LocalOperands)) 5384 // We're creating a final node that will live unmorphed for the 5385 // remainder of the current SelectionDAG iteration, so we can allocate 5386 // the operands directly out of a pool with no recycling metadata. 5387 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5388 Ops, NumOps); 5389 else 5390 N->InitOperands(N->LocalOperands, Ops, NumOps); 5391 N->OperandsNeedDelete = false; 5392 5393 if (DoCSE) 5394 CSEMap.InsertNode(N, IP); 5395 5396 AllNodes.push_back(N); 5397#ifndef NDEBUG 5398 VerifyMachineNode(N); 5399#endif 5400 return N; 5401} 5402 5403/// getTargetExtractSubreg - A convenience function for creating 5404/// TargetOpcode::EXTRACT_SUBREG nodes. 5405SDValue 5406SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5407 SDValue Operand) { 5408 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5409 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5410 VT, Operand, SRIdxVal); 5411 return SDValue(Subreg, 0); 5412} 5413 5414/// getTargetInsertSubreg - A convenience function for creating 5415/// TargetOpcode::INSERT_SUBREG nodes. 5416SDValue 5417SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5418 SDValue Operand, SDValue Subreg) { 5419 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5420 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5421 VT, Operand, Subreg, SRIdxVal); 5422 return SDValue(Result, 0); 5423} 5424 5425/// getNodeIfExists - Get the specified node if it's already available, or 5426/// else return NULL. 5427SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5428 const SDValue *Ops, unsigned NumOps) { 5429 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5430 FoldingSetNodeID ID; 5431 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5432 void *IP = 0; 5433 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5434 return E; 5435 } 5436 return NULL; 5437} 5438 5439/// getDbgValue - Creates a SDDbgValue node. 5440/// 5441SDDbgValue * 5442SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5443 DebugLoc DL, unsigned O) { 5444 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5445} 5446 5447SDDbgValue * 5448SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5449 DebugLoc DL, unsigned O) { 5450 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5451} 5452 5453SDDbgValue * 5454SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5455 DebugLoc DL, unsigned O) { 5456 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5457} 5458 5459namespace { 5460 5461/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5462/// pointed to by a use iterator is deleted, increment the use iterator 5463/// so that it doesn't dangle. 5464/// 5465class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5466 SDNode::use_iterator &UI; 5467 SDNode::use_iterator &UE; 5468 5469 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5470 // Increment the iterator as needed. 5471 while (UI != UE && N == *UI) 5472 ++UI; 5473 } 5474 5475public: 5476 RAUWUpdateListener(SelectionDAG &d, 5477 SDNode::use_iterator &ui, 5478 SDNode::use_iterator &ue) 5479 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {} 5480}; 5481 5482} 5483 5484/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5485/// This can cause recursive merging of nodes in the DAG. 5486/// 5487/// This version assumes From has a single result value. 5488/// 5489void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) { 5490 SDNode *From = FromN.getNode(); 5491 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5492 "Cannot replace with this method!"); 5493 assert(From != To.getNode() && "Cannot replace uses of with self"); 5494 5495 // Iterate over all the existing uses of From. New uses will be added 5496 // to the beginning of the use list, which we avoid visiting. 5497 // This specifically avoids visiting uses of From that arise while the 5498 // replacement is happening, because any such uses would be the result 5499 // of CSE: If an existing node looks like From after one of its operands 5500 // is replaced by To, we don't want to replace of all its users with To 5501 // too. See PR3018 for more info. 5502 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5503 RAUWUpdateListener Listener(*this, UI, UE); 5504 while (UI != UE) { 5505 SDNode *User = *UI; 5506 5507 // This node is about to morph, remove its old self from the CSE maps. 5508 RemoveNodeFromCSEMaps(User); 5509 5510 // A user can appear in a use list multiple times, and when this 5511 // happens the uses are usually next to each other in the list. 5512 // To help reduce the number of CSE recomputations, process all 5513 // the uses of this user that we can find this way. 5514 do { 5515 SDUse &Use = UI.getUse(); 5516 ++UI; 5517 Use.set(To); 5518 } while (UI != UE && *UI == User); 5519 5520 // Now that we have modified User, add it back to the CSE maps. If it 5521 // already exists there, recursively merge the results together. 5522 AddModifiedNodeToCSEMaps(User); 5523 } 5524 5525 // If we just RAUW'd the root, take note. 5526 if (FromN == getRoot()) 5527 setRoot(To); 5528} 5529 5530/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5531/// This can cause recursive merging of nodes in the DAG. 5532/// 5533/// This version assumes that for each value of From, there is a 5534/// corresponding value in To in the same position with the same type. 5535/// 5536void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 5537#ifndef NDEBUG 5538 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5539 assert((!From->hasAnyUseOfValue(i) || 5540 From->getValueType(i) == To->getValueType(i)) && 5541 "Cannot use this version of ReplaceAllUsesWith!"); 5542#endif 5543 5544 // Handle the trivial case. 5545 if (From == To) 5546 return; 5547 5548 // Iterate over just the existing users of From. See the comments in 5549 // the ReplaceAllUsesWith above. 5550 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5551 RAUWUpdateListener Listener(*this, UI, UE); 5552 while (UI != UE) { 5553 SDNode *User = *UI; 5554 5555 // This node is about to morph, remove its old self from the CSE maps. 5556 RemoveNodeFromCSEMaps(User); 5557 5558 // A user can appear in a use list multiple times, and when this 5559 // happens the uses are usually next to each other in the list. 5560 // To help reduce the number of CSE recomputations, process all 5561 // the uses of this user that we can find this way. 5562 do { 5563 SDUse &Use = UI.getUse(); 5564 ++UI; 5565 Use.setNode(To); 5566 } while (UI != UE && *UI == User); 5567 5568 // Now that we have modified User, add it back to the CSE maps. If it 5569 // already exists there, recursively merge the results together. 5570 AddModifiedNodeToCSEMaps(User); 5571 } 5572 5573 // If we just RAUW'd the root, take note. 5574 if (From == getRoot().getNode()) 5575 setRoot(SDValue(To, getRoot().getResNo())); 5576} 5577 5578/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5579/// This can cause recursive merging of nodes in the DAG. 5580/// 5581/// This version can replace From with any result values. To must match the 5582/// number and types of values returned by From. 5583void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) { 5584 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5585 return ReplaceAllUsesWith(SDValue(From, 0), To[0]); 5586 5587 // Iterate over just the existing users of From. See the comments in 5588 // the ReplaceAllUsesWith above. 5589 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5590 RAUWUpdateListener Listener(*this, UI, UE); 5591 while (UI != UE) { 5592 SDNode *User = *UI; 5593 5594 // This node is about to morph, remove its old self from the CSE maps. 5595 RemoveNodeFromCSEMaps(User); 5596 5597 // A user can appear in a use list multiple times, and when this 5598 // happens the uses are usually next to each other in the list. 5599 // To help reduce the number of CSE recomputations, process all 5600 // the uses of this user that we can find this way. 5601 do { 5602 SDUse &Use = UI.getUse(); 5603 const SDValue &ToOp = To[Use.getResNo()]; 5604 ++UI; 5605 Use.set(ToOp); 5606 } while (UI != UE && *UI == User); 5607 5608 // Now that we have modified User, add it back to the CSE maps. If it 5609 // already exists there, recursively merge the results together. 5610 AddModifiedNodeToCSEMaps(User); 5611 } 5612 5613 // If we just RAUW'd the root, take note. 5614 if (From == getRoot().getNode()) 5615 setRoot(SDValue(To[getRoot().getResNo()])); 5616} 5617 5618/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5619/// uses of other values produced by From.getNode() alone. The Deleted 5620/// vector is handled the same way as for ReplaceAllUsesWith. 5621void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){ 5622 // Handle the really simple, really trivial case efficiently. 5623 if (From == To) return; 5624 5625 // Handle the simple, trivial, case efficiently. 5626 if (From.getNode()->getNumValues() == 1) { 5627 ReplaceAllUsesWith(From, To); 5628 return; 5629 } 5630 5631 // Iterate over just the existing users of From. See the comments in 5632 // the ReplaceAllUsesWith above. 5633 SDNode::use_iterator UI = From.getNode()->use_begin(), 5634 UE = From.getNode()->use_end(); 5635 RAUWUpdateListener Listener(*this, UI, UE); 5636 while (UI != UE) { 5637 SDNode *User = *UI; 5638 bool UserRemovedFromCSEMaps = false; 5639 5640 // A user can appear in a use list multiple times, and when this 5641 // happens the uses are usually next to each other in the list. 5642 // To help reduce the number of CSE recomputations, process all 5643 // the uses of this user that we can find this way. 5644 do { 5645 SDUse &Use = UI.getUse(); 5646 5647 // Skip uses of different values from the same node. 5648 if (Use.getResNo() != From.getResNo()) { 5649 ++UI; 5650 continue; 5651 } 5652 5653 // If this node hasn't been modified yet, it's still in the CSE maps, 5654 // so remove its old self from the CSE maps. 5655 if (!UserRemovedFromCSEMaps) { 5656 RemoveNodeFromCSEMaps(User); 5657 UserRemovedFromCSEMaps = true; 5658 } 5659 5660 ++UI; 5661 Use.set(To); 5662 } while (UI != UE && *UI == User); 5663 5664 // We are iterating over all uses of the From node, so if a use 5665 // doesn't use the specific value, no changes are made. 5666 if (!UserRemovedFromCSEMaps) 5667 continue; 5668 5669 // Now that we have modified User, add it back to the CSE maps. If it 5670 // already exists there, recursively merge the results together. 5671 AddModifiedNodeToCSEMaps(User); 5672 } 5673 5674 // If we just RAUW'd the root, take note. 5675 if (From == getRoot()) 5676 setRoot(To); 5677} 5678 5679namespace { 5680 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5681 /// to record information about a use. 5682 struct UseMemo { 5683 SDNode *User; 5684 unsigned Index; 5685 SDUse *Use; 5686 }; 5687 5688 /// operator< - Sort Memos by User. 5689 bool operator<(const UseMemo &L, const UseMemo &R) { 5690 return (intptr_t)L.User < (intptr_t)R.User; 5691 } 5692} 5693 5694/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5695/// uses of other values produced by From.getNode() alone. The same value 5696/// may appear in both the From and To list. The Deleted vector is 5697/// handled the same way as for ReplaceAllUsesWith. 5698void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5699 const SDValue *To, 5700 unsigned Num){ 5701 // Handle the simple, trivial case efficiently. 5702 if (Num == 1) 5703 return ReplaceAllUsesOfValueWith(*From, *To); 5704 5705 // Read up all the uses and make records of them. This helps 5706 // processing new uses that are introduced during the 5707 // replacement process. 5708 SmallVector<UseMemo, 4> Uses; 5709 for (unsigned i = 0; i != Num; ++i) { 5710 unsigned FromResNo = From[i].getResNo(); 5711 SDNode *FromNode = From[i].getNode(); 5712 for (SDNode::use_iterator UI = FromNode->use_begin(), 5713 E = FromNode->use_end(); UI != E; ++UI) { 5714 SDUse &Use = UI.getUse(); 5715 if (Use.getResNo() == FromResNo) { 5716 UseMemo Memo = { *UI, i, &Use }; 5717 Uses.push_back(Memo); 5718 } 5719 } 5720 } 5721 5722 // Sort the uses, so that all the uses from a given User are together. 5723 std::sort(Uses.begin(), Uses.end()); 5724 5725 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5726 UseIndex != UseIndexEnd; ) { 5727 // We know that this user uses some value of From. If it is the right 5728 // value, update it. 5729 SDNode *User = Uses[UseIndex].User; 5730 5731 // This node is about to morph, remove its old self from the CSE maps. 5732 RemoveNodeFromCSEMaps(User); 5733 5734 // The Uses array is sorted, so all the uses for a given User 5735 // are next to each other in the list. 5736 // To help reduce the number of CSE recomputations, process all 5737 // the uses of this user that we can find this way. 5738 do { 5739 unsigned i = Uses[UseIndex].Index; 5740 SDUse &Use = *Uses[UseIndex].Use; 5741 ++UseIndex; 5742 5743 Use.set(To[i]); 5744 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5745 5746 // Now that we have modified User, add it back to the CSE maps. If it 5747 // already exists there, recursively merge the results together. 5748 AddModifiedNodeToCSEMaps(User); 5749 } 5750} 5751 5752/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5753/// based on their topological order. It returns the maximum id and a vector 5754/// of the SDNodes* in assigned order by reference. 5755unsigned SelectionDAG::AssignTopologicalOrder() { 5756 5757 unsigned DAGSize = 0; 5758 5759 // SortedPos tracks the progress of the algorithm. Nodes before it are 5760 // sorted, nodes after it are unsorted. When the algorithm completes 5761 // it is at the end of the list. 5762 allnodes_iterator SortedPos = allnodes_begin(); 5763 5764 // Visit all the nodes. Move nodes with no operands to the front of 5765 // the list immediately. Annotate nodes that do have operands with their 5766 // operand count. Before we do this, the Node Id fields of the nodes 5767 // may contain arbitrary values. After, the Node Id fields for nodes 5768 // before SortedPos will contain the topological sort index, and the 5769 // Node Id fields for nodes At SortedPos and after will contain the 5770 // count of outstanding operands. 5771 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5772 SDNode *N = I++; 5773 checkForCycles(N); 5774 unsigned Degree = N->getNumOperands(); 5775 if (Degree == 0) { 5776 // A node with no uses, add it to the result array immediately. 5777 N->setNodeId(DAGSize++); 5778 allnodes_iterator Q = N; 5779 if (Q != SortedPos) 5780 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5781 assert(SortedPos != AllNodes.end() && "Overran node list"); 5782 ++SortedPos; 5783 } else { 5784 // Temporarily use the Node Id as scratch space for the degree count. 5785 N->setNodeId(Degree); 5786 } 5787 } 5788 5789 // Visit all the nodes. As we iterate, move nodes into sorted order, 5790 // such that by the time the end is reached all nodes will be sorted. 5791 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5792 SDNode *N = I; 5793 checkForCycles(N); 5794 // N is in sorted position, so all its uses have one less operand 5795 // that needs to be sorted. 5796 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5797 UI != UE; ++UI) { 5798 SDNode *P = *UI; 5799 unsigned Degree = P->getNodeId(); 5800 assert(Degree != 0 && "Invalid node degree"); 5801 --Degree; 5802 if (Degree == 0) { 5803 // All of P's operands are sorted, so P may sorted now. 5804 P->setNodeId(DAGSize++); 5805 if (P != SortedPos) 5806 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5807 assert(SortedPos != AllNodes.end() && "Overran node list"); 5808 ++SortedPos; 5809 } else { 5810 // Update P's outstanding operand count. 5811 P->setNodeId(Degree); 5812 } 5813 } 5814 if (I == SortedPos) { 5815#ifndef NDEBUG 5816 SDNode *S = ++I; 5817 dbgs() << "Overran sorted position:\n"; 5818 S->dumprFull(); 5819#endif 5820 llvm_unreachable(0); 5821 } 5822 } 5823 5824 assert(SortedPos == AllNodes.end() && 5825 "Topological sort incomplete!"); 5826 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5827 "First node in topological sort is not the entry token!"); 5828 assert(AllNodes.front().getNodeId() == 0 && 5829 "First node in topological sort has non-zero id!"); 5830 assert(AllNodes.front().getNumOperands() == 0 && 5831 "First node in topological sort has operands!"); 5832 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5833 "Last node in topologic sort has unexpected id!"); 5834 assert(AllNodes.back().use_empty() && 5835 "Last node in topologic sort has users!"); 5836 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5837 return DAGSize; 5838} 5839 5840/// AssignOrdering - Assign an order to the SDNode. 5841void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5842 assert(SD && "Trying to assign an order to a null node!"); 5843 Ordering->add(SD, Order); 5844} 5845 5846/// GetOrdering - Get the order for the SDNode. 5847unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5848 assert(SD && "Trying to get the order of a null node!"); 5849 return Ordering->getOrder(SD); 5850} 5851 5852/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5853/// value is produced by SD. 5854void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5855 DbgInfo->add(DB, SD, isParameter); 5856 if (SD) 5857 SD->setHasDebugValue(true); 5858} 5859 5860/// TransferDbgValues - Transfer SDDbgValues. 5861void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5862 if (From == To || !From.getNode()->getHasDebugValue()) 5863 return; 5864 SDNode *FromNode = From.getNode(); 5865 SDNode *ToNode = To.getNode(); 5866 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5867 SmallVector<SDDbgValue *, 2> ClonedDVs; 5868 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5869 I != E; ++I) { 5870 SDDbgValue *Dbg = *I; 5871 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5872 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5873 Dbg->getOffset(), Dbg->getDebugLoc(), 5874 Dbg->getOrder()); 5875 ClonedDVs.push_back(Clone); 5876 } 5877 } 5878 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5879 E = ClonedDVs.end(); I != E; ++I) 5880 AddDbgValue(*I, ToNode, false); 5881} 5882 5883//===----------------------------------------------------------------------===// 5884// SDNode Class 5885//===----------------------------------------------------------------------===// 5886 5887HandleSDNode::~HandleSDNode() { 5888 DropOperands(); 5889} 5890 5891GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5892 const GlobalValue *GA, 5893 EVT VT, int64_t o, unsigned char TF) 5894 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5895 TheGlobal = GA; 5896} 5897 5898MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5899 MachineMemOperand *mmo) 5900 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5901 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5902 MMO->isNonTemporal(), MMO->isInvariant()); 5903 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5904 assert(isNonTemporal() == MMO->isNonTemporal() && 5905 "Non-temporal encoding error!"); 5906 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5907} 5908 5909MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5910 const SDValue *Ops, unsigned NumOps, EVT memvt, 5911 MachineMemOperand *mmo) 5912 : SDNode(Opc, dl, VTs, Ops, NumOps), 5913 MemoryVT(memvt), MMO(mmo) { 5914 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5915 MMO->isNonTemporal(), MMO->isInvariant()); 5916 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5917 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5918} 5919 5920/// Profile - Gather unique data for the node. 5921/// 5922void SDNode::Profile(FoldingSetNodeID &ID) const { 5923 AddNodeIDNode(ID, this); 5924} 5925 5926namespace { 5927 struct EVTArray { 5928 std::vector<EVT> VTs; 5929 5930 EVTArray() { 5931 VTs.reserve(MVT::LAST_VALUETYPE); 5932 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5933 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5934 } 5935 }; 5936} 5937 5938static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5939static ManagedStatic<EVTArray> SimpleVTArray; 5940static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5941 5942/// getValueTypeList - Return a pointer to the specified value type. 5943/// 5944const EVT *SDNode::getValueTypeList(EVT VT) { 5945 if (VT.isExtended()) { 5946 sys::SmartScopedLock<true> Lock(*VTMutex); 5947 return &(*EVTs->insert(VT).first); 5948 } else { 5949 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5950 "Value type out of range!"); 5951 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5952 } 5953} 5954 5955/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5956/// indicated value. This method ignores uses of other values defined by this 5957/// operation. 5958bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5959 assert(Value < getNumValues() && "Bad value!"); 5960 5961 // TODO: Only iterate over uses of a given value of the node 5962 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5963 if (UI.getUse().getResNo() == Value) { 5964 if (NUses == 0) 5965 return false; 5966 --NUses; 5967 } 5968 } 5969 5970 // Found exactly the right number of uses? 5971 return NUses == 0; 5972} 5973 5974 5975/// hasAnyUseOfValue - Return true if there are any use of the indicated 5976/// value. This method ignores uses of other values defined by this operation. 5977bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5978 assert(Value < getNumValues() && "Bad value!"); 5979 5980 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5981 if (UI.getUse().getResNo() == Value) 5982 return true; 5983 5984 return false; 5985} 5986 5987 5988/// isOnlyUserOf - Return true if this node is the only use of N. 5989/// 5990bool SDNode::isOnlyUserOf(SDNode *N) const { 5991 bool Seen = false; 5992 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5993 SDNode *User = *I; 5994 if (User == this) 5995 Seen = true; 5996 else 5997 return false; 5998 } 5999 6000 return Seen; 6001} 6002 6003/// isOperand - Return true if this node is an operand of N. 6004/// 6005bool SDValue::isOperandOf(SDNode *N) const { 6006 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6007 if (*this == N->getOperand(i)) 6008 return true; 6009 return false; 6010} 6011 6012bool SDNode::isOperandOf(SDNode *N) const { 6013 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 6014 if (this == N->OperandList[i].getNode()) 6015 return true; 6016 return false; 6017} 6018 6019/// reachesChainWithoutSideEffects - Return true if this operand (which must 6020/// be a chain) reaches the specified operand without crossing any 6021/// side-effecting instructions on any chain path. In practice, this looks 6022/// through token factors and non-volatile loads. In order to remain efficient, 6023/// this only looks a couple of nodes in, it does not do an exhaustive search. 6024bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 6025 unsigned Depth) const { 6026 if (*this == Dest) return true; 6027 6028 // Don't search too deeply, we just want to be able to see through 6029 // TokenFactor's etc. 6030 if (Depth == 0) return false; 6031 6032 // If this is a token factor, all inputs to the TF happen in parallel. If any 6033 // of the operands of the TF does not reach dest, then we cannot do the xform. 6034 if (getOpcode() == ISD::TokenFactor) { 6035 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 6036 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 6037 return false; 6038 return true; 6039 } 6040 6041 // Loads don't have side effects, look through them. 6042 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 6043 if (!Ld->isVolatile()) 6044 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 6045 } 6046 return false; 6047} 6048 6049/// hasPredecessor - Return true if N is a predecessor of this node. 6050/// N is either an operand of this node, or can be reached by recursively 6051/// traversing up the operands. 6052/// NOTE: This is an expensive method. Use it carefully. 6053bool SDNode::hasPredecessor(const SDNode *N) const { 6054 SmallPtrSet<const SDNode *, 32> Visited; 6055 SmallVector<const SDNode *, 16> Worklist; 6056 return hasPredecessorHelper(N, Visited, Worklist); 6057} 6058 6059bool SDNode::hasPredecessorHelper(const SDNode *N, 6060 SmallPtrSet<const SDNode *, 32> &Visited, 6061 SmallVector<const SDNode *, 16> &Worklist) const { 6062 if (Visited.empty()) { 6063 Worklist.push_back(this); 6064 } else { 6065 // Take a look in the visited set. If we've already encountered this node 6066 // we needn't search further. 6067 if (Visited.count(N)) 6068 return true; 6069 } 6070 6071 // Haven't visited N yet. Continue the search. 6072 while (!Worklist.empty()) { 6073 const SDNode *M = Worklist.pop_back_val(); 6074 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 6075 SDNode *Op = M->getOperand(i).getNode(); 6076 if (Visited.insert(Op)) 6077 Worklist.push_back(Op); 6078 if (Op == N) 6079 return true; 6080 } 6081 } 6082 6083 return false; 6084} 6085 6086uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 6087 assert(Num < NumOperands && "Invalid child # of SDNode!"); 6088 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 6089} 6090 6091SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6092 assert(N->getNumValues() == 1 && 6093 "Can't unroll a vector with multiple results!"); 6094 6095 EVT VT = N->getValueType(0); 6096 unsigned NE = VT.getVectorNumElements(); 6097 EVT EltVT = VT.getVectorElementType(); 6098 DebugLoc dl = N->getDebugLoc(); 6099 6100 SmallVector<SDValue, 8> Scalars; 6101 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6102 6103 // If ResNE is 0, fully unroll the vector op. 6104 if (ResNE == 0) 6105 ResNE = NE; 6106 else if (NE > ResNE) 6107 NE = ResNE; 6108 6109 unsigned i; 6110 for (i= 0; i != NE; ++i) { 6111 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6112 SDValue Operand = N->getOperand(j); 6113 EVT OperandVT = Operand.getValueType(); 6114 if (OperandVT.isVector()) { 6115 // A vector operand; extract a single element. 6116 EVT OperandEltVT = OperandVT.getVectorElementType(); 6117 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6118 OperandEltVT, 6119 Operand, 6120 getConstant(i, TLI.getPointerTy())); 6121 } else { 6122 // A scalar operand; just use it as is. 6123 Operands[j] = Operand; 6124 } 6125 } 6126 6127 switch (N->getOpcode()) { 6128 default: 6129 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6130 &Operands[0], Operands.size())); 6131 break; 6132 case ISD::VSELECT: 6133 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6134 &Operands[0], Operands.size())); 6135 break; 6136 case ISD::SHL: 6137 case ISD::SRA: 6138 case ISD::SRL: 6139 case ISD::ROTL: 6140 case ISD::ROTR: 6141 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6142 getShiftAmountOperand(Operands[0].getValueType(), 6143 Operands[1]))); 6144 break; 6145 case ISD::SIGN_EXTEND_INREG: 6146 case ISD::FP_ROUND_INREG: { 6147 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6148 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6149 Operands[0], 6150 getValueType(ExtVT))); 6151 } 6152 } 6153 } 6154 6155 for (; i < ResNE; ++i) 6156 Scalars.push_back(getUNDEF(EltVT)); 6157 6158 return getNode(ISD::BUILD_VECTOR, dl, 6159 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6160 &Scalars[0], Scalars.size()); 6161} 6162 6163 6164/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6165/// location that is 'Dist' units away from the location that the 'Base' load 6166/// is loading from. 6167bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6168 unsigned Bytes, int Dist) const { 6169 if (LD->getChain() != Base->getChain()) 6170 return false; 6171 EVT VT = LD->getValueType(0); 6172 if (VT.getSizeInBits() / 8 != Bytes) 6173 return false; 6174 6175 SDValue Loc = LD->getOperand(1); 6176 SDValue BaseLoc = Base->getOperand(1); 6177 if (Loc.getOpcode() == ISD::FrameIndex) { 6178 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6179 return false; 6180 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6181 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6182 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6183 int FS = MFI->getObjectSize(FI); 6184 int BFS = MFI->getObjectSize(BFI); 6185 if (FS != BFS || FS != (int)Bytes) return false; 6186 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6187 } 6188 6189 // Handle X+C 6190 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6191 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6192 return true; 6193 6194 const GlobalValue *GV1 = NULL; 6195 const GlobalValue *GV2 = NULL; 6196 int64_t Offset1 = 0; 6197 int64_t Offset2 = 0; 6198 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6199 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6200 if (isGA1 && isGA2 && GV1 == GV2) 6201 return Offset1 == (Offset2 + Dist*Bytes); 6202 return false; 6203} 6204 6205 6206/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6207/// it cannot be inferred. 6208unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6209 // If this is a GlobalAddress + cst, return the alignment. 6210 const GlobalValue *GV; 6211 int64_t GVOffset = 0; 6212 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6213 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 6214 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6215 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6216 TLI.getDataLayout()); 6217 unsigned AlignBits = KnownZero.countTrailingOnes(); 6218 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6219 if (Align) 6220 return MinAlign(Align, GVOffset); 6221 } 6222 6223 // If this is a direct reference to a stack slot, use information about the 6224 // stack slot's alignment. 6225 int FrameIdx = 1 << 31; 6226 int64_t FrameOffset = 0; 6227 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6228 FrameIdx = FI->getIndex(); 6229 } else if (isBaseWithConstantOffset(Ptr) && 6230 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6231 // Handle FI+Cst 6232 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6233 FrameOffset = Ptr.getConstantOperandVal(1); 6234 } 6235 6236 if (FrameIdx != (1 << 31)) { 6237 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6238 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6239 FrameOffset); 6240 return FIInfoAlign; 6241 } 6242 6243 return 0; 6244} 6245 6246// getAddressSpace - Return the address space this GlobalAddress belongs to. 6247unsigned GlobalAddressSDNode::getAddressSpace() const { 6248 return getGlobal()->getType()->getAddressSpace(); 6249} 6250 6251 6252Type *ConstantPoolSDNode::getType() const { 6253 if (isMachineConstantPoolEntry()) 6254 return Val.MachineCPVal->getType(); 6255 return Val.ConstVal->getType(); 6256} 6257 6258bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6259 APInt &SplatUndef, 6260 unsigned &SplatBitSize, 6261 bool &HasAnyUndefs, 6262 unsigned MinSplatBits, 6263 bool isBigEndian) { 6264 EVT VT = getValueType(0); 6265 assert(VT.isVector() && "Expected a vector type"); 6266 unsigned sz = VT.getSizeInBits(); 6267 if (MinSplatBits > sz) 6268 return false; 6269 6270 SplatValue = APInt(sz, 0); 6271 SplatUndef = APInt(sz, 0); 6272 6273 // Get the bits. Bits with undefined values (when the corresponding element 6274 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6275 // in SplatValue. If any of the values are not constant, give up and return 6276 // false. 6277 unsigned int nOps = getNumOperands(); 6278 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6279 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6280 6281 for (unsigned j = 0; j < nOps; ++j) { 6282 unsigned i = isBigEndian ? nOps-1-j : j; 6283 SDValue OpVal = getOperand(i); 6284 unsigned BitPos = j * EltBitSize; 6285 6286 if (OpVal.getOpcode() == ISD::UNDEF) 6287 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6288 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6289 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6290 zextOrTrunc(sz) << BitPos; 6291 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6292 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6293 else 6294 return false; 6295 } 6296 6297 // The build_vector is all constants or undefs. Find the smallest element 6298 // size that splats the vector. 6299 6300 HasAnyUndefs = (SplatUndef != 0); 6301 while (sz > 8) { 6302 6303 unsigned HalfSize = sz / 2; 6304 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6305 APInt LowValue = SplatValue.trunc(HalfSize); 6306 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6307 APInt LowUndef = SplatUndef.trunc(HalfSize); 6308 6309 // If the two halves do not match (ignoring undef bits), stop here. 6310 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6311 MinSplatBits > HalfSize) 6312 break; 6313 6314 SplatValue = HighValue | LowValue; 6315 SplatUndef = HighUndef & LowUndef; 6316 6317 sz = HalfSize; 6318 } 6319 6320 SplatBitSize = sz; 6321 return true; 6322} 6323 6324bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6325 // Find the first non-undef value in the shuffle mask. 6326 unsigned i, e; 6327 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6328 /* search */; 6329 6330 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6331 6332 // Make sure all remaining elements are either undef or the same as the first 6333 // non-undef value. 6334 for (int Idx = Mask[i]; i != e; ++i) 6335 if (Mask[i] >= 0 && Mask[i] != Idx) 6336 return false; 6337 return true; 6338} 6339 6340#ifdef XDEBUG 6341static void checkForCyclesHelper(const SDNode *N, 6342 SmallPtrSet<const SDNode*, 32> &Visited, 6343 SmallPtrSet<const SDNode*, 32> &Checked) { 6344 // If this node has already been checked, don't check it again. 6345 if (Checked.count(N)) 6346 return; 6347 6348 // If a node has already been visited on this depth-first walk, reject it as 6349 // a cycle. 6350 if (!Visited.insert(N)) { 6351 dbgs() << "Offending node:\n"; 6352 N->dumprFull(); 6353 errs() << "Detected cycle in SelectionDAG\n"; 6354 abort(); 6355 } 6356 6357 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6358 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6359 6360 Checked.insert(N); 6361 Visited.erase(N); 6362} 6363#endif 6364 6365void llvm::checkForCycles(const llvm::SDNode *N) { 6366#ifdef XDEBUG 6367 assert(N && "Checking nonexistant SDNode"); 6368 SmallPtrSet<const SDNode*, 32> visited; 6369 SmallPtrSet<const SDNode*, 32> checked; 6370 checkForCyclesHelper(N, visited, checked); 6371#endif 6372} 6373 6374void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6375 checkForCycles(DAG->getRoot().getNode()); 6376} 6377