SelectionDAG.cpp revision bbc54b614225d792d47d5d1dc1aa6767f4657f25
1cf2cfa174ca878c144e17e9fc60ca8e9070d7dededisonn@google.com//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2cf2cfa174ca878c144e17e9fc60ca8e9070d7dededisonn@google.com// 38cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com// The LLVM Compiler Infrastructure 4cf2cfa174ca878c144e17e9fc60ca8e9070d7dededisonn@google.com// 5cf2cfa174ca878c144e17e9fc60ca8e9070d7dededisonn@google.com// This file is distributed under the University of Illinois Open Source 6cf2cfa174ca878c144e17e9fc60ca8e9070d7dededisonn@google.com// License. See LICENSE.TXT for details. 78cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com// 8cf2cfa174ca878c144e17e9fc60ca8e9070d7dededisonn@google.com//===----------------------------------------------------------------------===// 98cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com// 10cf2cfa174ca878c144e17e9fc60ca8e9070d7dededisonn@google.com// This implements the SelectionDAG class. 118cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com// 128cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com//===----------------------------------------------------------------------===// 138cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com 148cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/CodeGen/SelectionDAG.h" 158cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "SDNodeOrdering.h" 168cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "SDNodeDbgValue.h" 178cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/Constants.h" 188cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/Analysis/DebugInfo.h" 198cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/Analysis/ValueTracking.h" 208cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/Function.h" 218cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/GlobalAlias.h" 228cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/GlobalVariable.h" 238cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/Intrinsics.h" 248cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/DerivedTypes.h" 258cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/Assembly/Writer.h" 268cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/CallingConv.h" 278cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/CodeGen/MachineBasicBlock.h" 288cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/CodeGen/MachineConstantPool.h" 298cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/CodeGen/MachineFrameInfo.h" 308cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/CodeGen/MachineModuleInfo.h" 318cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/CodeGen/PseudoSourceValue.h" 328cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/Target/TargetRegisterInfo.h" 338cee797901763ab0922eb9ef484cfdcbc94bee54edisonn@google.com#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetFrameInfo.h" 35#include "llvm/Target/TargetLowering.h" 36#include "llvm/Target/TargetSelectionDAGInfo.h" 37#include "llvm/Target/TargetOptions.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetIntrinsicInfo.h" 40#include "llvm/Target/TargetMachine.h" 41#include "llvm/Support/CommandLine.h" 42#include "llvm/Support/Debug.h" 43#include "llvm/Support/ErrorHandling.h" 44#include "llvm/Support/ManagedStatic.h" 45#include "llvm/Support/MathExtras.h" 46#include "llvm/Support/raw_ostream.h" 47#include "llvm/System/Mutex.h" 48#include "llvm/ADT/SetVector.h" 49#include "llvm/ADT/SmallPtrSet.h" 50#include "llvm/ADT/SmallSet.h" 51#include "llvm/ADT/SmallVector.h" 52#include "llvm/ADT/StringExtras.h" 53#include <algorithm> 54#include <cmath> 55using namespace llvm; 56 57/// makeVTList - Return an instance of the SDVTList struct initialized with the 58/// specified members. 59static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 60 SDVTList Res = {VTs, NumVTs}; 61 return Res; 62} 63 64static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 65 switch (VT.getSimpleVT().SimpleTy) { 66 default: llvm_unreachable("Unknown FP format"); 67 case MVT::f32: return &APFloat::IEEEsingle; 68 case MVT::f64: return &APFloat::IEEEdouble; 69 case MVT::f80: return &APFloat::x87DoubleExtended; 70 case MVT::f128: return &APFloat::IEEEquad; 71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 72 } 73} 74 75SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 76 77//===----------------------------------------------------------------------===// 78// ConstantFPSDNode Class 79//===----------------------------------------------------------------------===// 80 81/// isExactlyValue - We don't rely on operator== working on double values, as 82/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 83/// As such, this method can be used to do an exact bit-for-bit comparison of 84/// two floating point values. 85bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 86 return getValueAPF().bitwiseIsEqual(V); 87} 88 89bool ConstantFPSDNode::isValueValidForType(EVT VT, 90 const APFloat& Val) { 91 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 92 93 // PPC long double cannot be converted to any other type. 94 if (VT == MVT::ppcf128 || 95 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 96 return false; 97 98 // convert modifies in place, so make a copy. 99 APFloat Val2 = APFloat(Val); 100 bool losesInfo; 101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 102 &losesInfo); 103 return !losesInfo; 104} 105 106//===----------------------------------------------------------------------===// 107// ISD Namespace 108//===----------------------------------------------------------------------===// 109 110/// isBuildVectorAllOnes - Return true if the specified node is a 111/// BUILD_VECTOR where all of the elements are ~0 or undef. 112bool ISD::isBuildVectorAllOnes(const SDNode *N) { 113 // Look through a bit convert. 114 if (N->getOpcode() == ISD::BIT_CONVERT) 115 N = N->getOperand(0).getNode(); 116 117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 118 119 unsigned i = 0, e = N->getNumOperands(); 120 121 // Skip over all of the undef values. 122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 123 ++i; 124 125 // Do not accept an all-undef vector. 126 if (i == e) return false; 127 128 // Do not accept build_vectors that aren't all constants or which have non-~0 129 // elements. 130 SDValue NotZero = N->getOperand(i); 131 if (isa<ConstantSDNode>(NotZero)) { 132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 133 return false; 134 } else if (isa<ConstantFPSDNode>(NotZero)) { 135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 136 bitcastToAPInt().isAllOnesValue()) 137 return false; 138 } else 139 return false; 140 141 // Okay, we have at least one ~0 value, check to see if the rest match or are 142 // undefs. 143 for (++i; i != e; ++i) 144 if (N->getOperand(i) != NotZero && 145 N->getOperand(i).getOpcode() != ISD::UNDEF) 146 return false; 147 return true; 148} 149 150 151/// isBuildVectorAllZeros - Return true if the specified node is a 152/// BUILD_VECTOR where all of the elements are 0 or undef. 153bool ISD::isBuildVectorAllZeros(const SDNode *N) { 154 // Look through a bit convert. 155 if (N->getOpcode() == ISD::BIT_CONVERT) 156 N = N->getOperand(0).getNode(); 157 158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 159 160 unsigned i = 0, e = N->getNumOperands(); 161 162 // Skip over all of the undef values. 163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 164 ++i; 165 166 // Do not accept an all-undef vector. 167 if (i == e) return false; 168 169 // Do not accept build_vectors that aren't all constants or which have non-0 170 // elements. 171 SDValue Zero = N->getOperand(i); 172 if (isa<ConstantSDNode>(Zero)) { 173 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 174 return false; 175 } else if (isa<ConstantFPSDNode>(Zero)) { 176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 177 return false; 178 } else 179 return false; 180 181 // Okay, we have at least one 0 value, check to see if the rest match or are 182 // undefs. 183 for (++i; i != e; ++i) 184 if (N->getOperand(i) != Zero && 185 N->getOperand(i).getOpcode() != ISD::UNDEF) 186 return false; 187 return true; 188} 189 190/// isScalarToVector - Return true if the specified node is a 191/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 192/// element is not an undef. 193bool ISD::isScalarToVector(const SDNode *N) { 194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 195 return true; 196 197 if (N->getOpcode() != ISD::BUILD_VECTOR) 198 return false; 199 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 200 return false; 201 unsigned NumElems = N->getNumOperands(); 202 for (unsigned i = 1; i < NumElems; ++i) { 203 SDValue V = N->getOperand(i); 204 if (V.getOpcode() != ISD::UNDEF) 205 return false; 206 } 207 return true; 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 231 if (Operation > ISD::SETTRUE2) 232 Operation &= ~8; // Don't let N and U bits get set. 233 234 return ISD::CondCode(Operation); 235} 236 237 238/// isSignedOp - For an integer comparison, return 1 if the comparison is a 239/// signed operation and 2 if the result is an unsigned comparison. Return zero 240/// if the operation does not depend on the sign of the input (setne and seteq). 241static int isSignedOp(ISD::CondCode Opcode) { 242 switch (Opcode) { 243 default: llvm_unreachable("Illegal integer setcc operation!"); 244 case ISD::SETEQ: 245 case ISD::SETNE: return 0; 246 case ISD::SETLT: 247 case ISD::SETLE: 248 case ISD::SETGT: 249 case ISD::SETGE: return 1; 250 case ISD::SETULT: 251 case ISD::SETULE: 252 case ISD::SETUGT: 253 case ISD::SETUGE: return 2; 254 } 255} 256 257/// getSetCCOrOperation - Return the result of a logical OR between different 258/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 259/// returns SETCC_INVALID if it is not possible to represent the resultant 260/// comparison. 261ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 262 bool isInteger) { 263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 264 // Cannot fold a signed integer setcc with an unsigned integer setcc. 265 return ISD::SETCC_INVALID; 266 267 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 268 269 // If the N and U bits get set then the resultant comparison DOES suddenly 270 // care about orderedness, and is true when ordered. 271 if (Op > ISD::SETTRUE2) 272 Op &= ~16; // Clear the U bit if the N bit is set. 273 274 // Canonicalize illegal integer setcc's. 275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 276 Op = ISD::SETNE; 277 278 return ISD::CondCode(Op); 279} 280 281/// getSetCCAndOperation - Return the result of a logical AND between different 282/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 283/// function returns zero if it is not possible to represent the resultant 284/// comparison. 285ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 286 bool isInteger) { 287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 288 // Cannot fold a signed setcc with an unsigned setcc. 289 return ISD::SETCC_INVALID; 290 291 // Combine all of the condition bits. 292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 293 294 // Canonicalize illegal integer setcc's. 295 if (isInteger) { 296 switch (Result) { 297 default: break; 298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 299 case ISD::SETOEQ: // SETEQ & SETU[LG]E 300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 303 } 304 } 305 306 return Result; 307} 308 309//===----------------------------------------------------------------------===// 310// SDNode Profile Support 311//===----------------------------------------------------------------------===// 312 313/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 314/// 315static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 316 ID.AddInteger(OpC); 317} 318 319/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 320/// solely with their pointer. 321static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 322 ID.AddPointer(VTList.VTs); 323} 324 325/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 326/// 327static void AddNodeIDOperands(FoldingSetNodeID &ID, 328 const SDValue *Ops, unsigned NumOps) { 329 for (; NumOps; --NumOps, ++Ops) { 330 ID.AddPointer(Ops->getNode()); 331 ID.AddInteger(Ops->getResNo()); 332 } 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDUse *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345static void AddNodeIDNode(FoldingSetNodeID &ID, 346 unsigned short OpC, SDVTList VTList, 347 const SDValue *OpList, unsigned N) { 348 AddNodeIDOpcode(ID, OpC); 349 AddNodeIDValueTypes(ID, VTList); 350 AddNodeIDOperands(ID, OpList, N); 351} 352 353/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 354/// the NodeID data. 355static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 356 switch (N->getOpcode()) { 357 case ISD::TargetExternalSymbol: 358 case ISD::ExternalSymbol: 359 llvm_unreachable("Should only be used on nodes with operands"); 360 default: break; // Normal nodes don't need extra info. 361 case ISD::TargetConstant: 362 case ISD::Constant: 363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 364 break; 365 case ISD::TargetConstantFP: 366 case ISD::ConstantFP: { 367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 368 break; 369 } 370 case ISD::TargetGlobalAddress: 371 case ISD::GlobalAddress: 372 case ISD::TargetGlobalTLSAddress: 373 case ISD::GlobalTLSAddress: { 374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 375 ID.AddPointer(GA->getGlobal()); 376 ID.AddInteger(GA->getOffset()); 377 ID.AddInteger(GA->getTargetFlags()); 378 break; 379 } 380 case ISD::BasicBlock: 381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 382 break; 383 case ISD::Register: 384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 385 break; 386 387 case ISD::SRCVALUE: 388 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 389 break; 390 case ISD::FrameIndex: 391 case ISD::TargetFrameIndex: 392 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 393 break; 394 case ISD::JumpTable: 395 case ISD::TargetJumpTable: 396 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 398 break; 399 case ISD::ConstantPool: 400 case ISD::TargetConstantPool: { 401 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 402 ID.AddInteger(CP->getAlignment()); 403 ID.AddInteger(CP->getOffset()); 404 if (CP->isMachineConstantPoolEntry()) 405 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 406 else 407 ID.AddPointer(CP->getConstVal()); 408 ID.AddInteger(CP->getTargetFlags()); 409 break; 410 } 411 case ISD::LOAD: { 412 const LoadSDNode *LD = cast<LoadSDNode>(N); 413 ID.AddInteger(LD->getMemoryVT().getRawBits()); 414 ID.AddInteger(LD->getRawSubclassData()); 415 break; 416 } 417 case ISD::STORE: { 418 const StoreSDNode *ST = cast<StoreSDNode>(N); 419 ID.AddInteger(ST->getMemoryVT().getRawBits()); 420 ID.AddInteger(ST->getRawSubclassData()); 421 break; 422 } 423 case ISD::ATOMIC_CMP_SWAP: 424 case ISD::ATOMIC_SWAP: 425 case ISD::ATOMIC_LOAD_ADD: 426 case ISD::ATOMIC_LOAD_SUB: 427 case ISD::ATOMIC_LOAD_AND: 428 case ISD::ATOMIC_LOAD_OR: 429 case ISD::ATOMIC_LOAD_XOR: 430 case ISD::ATOMIC_LOAD_NAND: 431 case ISD::ATOMIC_LOAD_MIN: 432 case ISD::ATOMIC_LOAD_MAX: 433 case ISD::ATOMIC_LOAD_UMIN: 434 case ISD::ATOMIC_LOAD_UMAX: { 435 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 436 ID.AddInteger(AT->getMemoryVT().getRawBits()); 437 ID.AddInteger(AT->getRawSubclassData()); 438 break; 439 } 440 case ISD::VECTOR_SHUFFLE: { 441 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 442 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 443 i != e; ++i) 444 ID.AddInteger(SVN->getMaskElt(i)); 445 break; 446 } 447 case ISD::TargetBlockAddress: 448 case ISD::BlockAddress: { 449 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 450 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 451 break; 452 } 453 } // end switch (N->getOpcode()) 454} 455 456/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 457/// data. 458static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 459 AddNodeIDOpcode(ID, N->getOpcode()); 460 // Add the return value info. 461 AddNodeIDValueTypes(ID, N->getVTList()); 462 // Add the operand info. 463 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 464 465 // Handle SDNode leafs with special info. 466 AddNodeIDCustom(ID, N); 467} 468 469/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 470/// the CSE map that carries volatility, temporalness, indexing mode, and 471/// extension/truncation information. 472/// 473static inline unsigned 474encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 475 bool isNonTemporal) { 476 assert((ConvType & 3) == ConvType && 477 "ConvType may not require more than 2 bits!"); 478 assert((AM & 7) == AM && 479 "AM may not require more than 3 bits!"); 480 return ConvType | 481 (AM << 2) | 482 (isVolatile << 5) | 483 (isNonTemporal << 6); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::EH_LABEL: 499 return true; // Never CSE these nodes. 500 } 501 502 // Check that remaining values produced are not flags. 503 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 504 if (N->getValueType(i) == MVT::Flag) 505 return true; // Never CSE anything that produces a flag. 506 507 return false; 508} 509 510/// RemoveDeadNodes - This method deletes all unreachable nodes in the 511/// SelectionDAG. 512void SelectionDAG::RemoveDeadNodes() { 513 // Create a dummy node (which is not added to allnodes), that adds a reference 514 // to the root node, preventing it from being deleted. 515 HandleSDNode Dummy(getRoot()); 516 517 SmallVector<SDNode*, 128> DeadNodes; 518 519 // Add all obviously-dead nodes to the DeadNodes worklist. 520 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 521 if (I->use_empty()) 522 DeadNodes.push_back(I); 523 524 RemoveDeadNodes(DeadNodes); 525 526 // If the root changed (e.g. it was a dead load, update the root). 527 setRoot(Dummy.getValue()); 528} 529 530/// RemoveDeadNodes - This method deletes the unreachable nodes in the 531/// given list, and any nodes that become unreachable as a result. 532void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 533 DAGUpdateListener *UpdateListener) { 534 535 // Process the worklist, deleting the nodes and adding their uses to the 536 // worklist. 537 while (!DeadNodes.empty()) { 538 SDNode *N = DeadNodes.pop_back_val(); 539 540 if (UpdateListener) 541 UpdateListener->NodeDeleted(N, 0); 542 543 // Take the node out of the appropriate CSE map. 544 RemoveNodeFromCSEMaps(N); 545 546 // Next, brutally remove the operand list. This is safe to do, as there are 547 // no cycles in the graph. 548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 549 SDUse &Use = *I++; 550 SDNode *Operand = Use.getNode(); 551 Use.set(SDValue()); 552 553 // Now that we removed this operand, see if there are no uses of it left. 554 if (Operand->use_empty()) 555 DeadNodes.push_back(Operand); 556 } 557 558 DeallocateNode(N); 559 } 560} 561 562void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 563 SmallVector<SDNode*, 16> DeadNodes(1, N); 564 RemoveDeadNodes(DeadNodes, UpdateListener); 565} 566 567void SelectionDAG::DeleteNode(SDNode *N) { 568 // First take this out of the appropriate CSE map. 569 RemoveNodeFromCSEMaps(N); 570 571 // Finally, remove uses due to operands of this node, remove from the 572 // AllNodes list, and delete the node. 573 DeleteNodeNotInCSEMaps(N); 574} 575 576void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 577 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 578 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 579 580 // Drop all of the operands and decrement used node's use counts. 581 N->DropOperands(); 582 583 DeallocateNode(N); 584} 585 586void SelectionDAG::DeallocateNode(SDNode *N) { 587 if (N->OperandsNeedDelete) 588 delete[] N->OperandList; 589 590 // Set the opcode to DELETED_NODE to help catch bugs when node 591 // memory is reallocated. 592 N->NodeType = ISD::DELETED_NODE; 593 594 NodeAllocator.Deallocate(AllNodes.remove(N)); 595 596 // Remove the ordering of this node. 597 Ordering->remove(N); 598 599 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 600 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 601 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 602 DbgVals[i]->setIsInvalidated(); 603} 604 605/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 606/// correspond to it. This is useful when we're about to delete or repurpose 607/// the node. We don't want future request for structurally identical nodes 608/// to return N anymore. 609bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 610 bool Erased = false; 611 switch (N->getOpcode()) { 612 case ISD::EntryToken: 613 llvm_unreachable("EntryToken should not be in CSEMaps!"); 614 return false; 615 case ISD::HANDLENODE: return false; // noop. 616 case ISD::CONDCODE: 617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 618 "Cond code doesn't exist!"); 619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 621 break; 622 case ISD::ExternalSymbol: 623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 624 break; 625 case ISD::TargetExternalSymbol: { 626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 627 Erased = TargetExternalSymbols.erase( 628 std::pair<std::string,unsigned char>(ESN->getSymbol(), 629 ESN->getTargetFlags())); 630 break; 631 } 632 case ISD::VALUETYPE: { 633 EVT VT = cast<VTSDNode>(N)->getVT(); 634 if (VT.isExtended()) { 635 Erased = ExtendedValueTypeNodes.erase(VT); 636 } else { 637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 639 } 640 break; 641 } 642 default: 643 // Remove it from the CSE Map. 644 Erased = CSEMap.RemoveNode(N); 645 break; 646 } 647#ifndef NDEBUG 648 // Verify that the node was actually in one of the CSE maps, unless it has a 649 // flag result (which cannot be CSE'd) or is one of the special cases that are 650 // not subject to CSE. 651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 652 !N->isMachineOpcode() && !doNotCSE(N)) { 653 N->dump(this); 654 dbgs() << "\n"; 655 llvm_unreachable("Node is not in map!"); 656 } 657#endif 658 return Erased; 659} 660 661/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 662/// maps and modified in place. Add it back to the CSE maps, unless an identical 663/// node already exists, in which case transfer all its users to the existing 664/// node. This transfer can potentially trigger recursive merging. 665/// 666void 667SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 668 DAGUpdateListener *UpdateListener) { 669 // For node types that aren't CSE'd, just act as if no identical node 670 // already exists. 671 if (!doNotCSE(N)) { 672 SDNode *Existing = CSEMap.GetOrInsertNode(N); 673 if (Existing != N) { 674 // If there was already an existing matching node, use ReplaceAllUsesWith 675 // to replace the dead one with the existing one. This can cause 676 // recursive merging of other unrelated nodes down the line. 677 ReplaceAllUsesWith(N, Existing, UpdateListener); 678 679 // N is now dead. Inform the listener if it exists and delete it. 680 if (UpdateListener) 681 UpdateListener->NodeDeleted(N, Existing); 682 DeleteNodeNotInCSEMaps(N); 683 return; 684 } 685 } 686 687 // If the node doesn't already exist, we updated it. Inform a listener if 688 // it exists. 689 if (UpdateListener) 690 UpdateListener->NodeUpdated(N); 691} 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 698 void *&InsertPos) { 699 if (doNotCSE(N)) 700 return 0; 701 702 SDValue Ops[] = { Op }; 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 705 AddNodeIDCustom(ID, N); 706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 707 return Node; 708} 709 710/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 711/// were replaced with those specified. If this node is never memoized, 712/// return null, otherwise return a pointer to the slot it would take. If a 713/// node already exists with these operands, the slot will be non-null. 714SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 715 SDValue Op1, SDValue Op2, 716 void *&InsertPos) { 717 if (doNotCSE(N)) 718 return 0; 719 720 SDValue Ops[] = { Op1, Op2 }; 721 FoldingSetNodeID ID; 722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 723 AddNodeIDCustom(ID, N); 724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 725 return Node; 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 747void SelectionDAG::VerifyNode(SDNode *N) { 748 switch (N->getOpcode()) { 749 default: 750 break; 751 case ISD::BUILD_PAIR: { 752 EVT VT = N->getValueType(0); 753 assert(N->getNumValues() == 1 && "Too many results!"); 754 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 755 "Wrong return type!"); 756 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 757 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 758 "Mismatched operand types!"); 759 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 760 "Wrong operand type!"); 761 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 762 "Wrong return type size"); 763 break; 764 } 765 case ISD::BUILD_VECTOR: { 766 assert(N->getNumValues() == 1 && "Too many results!"); 767 assert(N->getValueType(0).isVector() && "Wrong return type!"); 768 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 769 "Wrong number of operands!"); 770 EVT EltVT = N->getValueType(0).getVectorElementType(); 771 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 772 assert((I->getValueType() == EltVT || 773 (EltVT.isInteger() && I->getValueType().isInteger() && 774 EltVT.bitsLE(I->getValueType()))) && 775 "Wrong operand type!"); 776 break; 777 } 778 } 779} 780 781/// getEVTAlignment - Compute the default alignment value for the 782/// given type. 783/// 784unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 785 const Type *Ty = VT == MVT::iPTR ? 786 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 787 VT.getTypeForEVT(*getContext()); 788 789 return TLI.getTargetData()->getABITypeAlignment(Ty); 790} 791 792// EntryNode could meaningfully have debug info if we can find it... 793SelectionDAG::SelectionDAG(const TargetMachine &tm) 794 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 795 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 796 Root(getEntryNode()), Ordering(0) { 797 AllNodes.push_back(&EntryNode); 798 Ordering = new SDNodeOrdering(); 799 DbgInfo = new SDDbgInfo(); 800} 801 802void SelectionDAG::init(MachineFunction &mf) { 803 MF = &mf; 804 Context = &mf.getFunction()->getContext(); 805} 806 807SelectionDAG::~SelectionDAG() { 808 allnodes_clear(); 809 delete Ordering; 810 delete DbgInfo; 811} 812 813void SelectionDAG::allnodes_clear() { 814 assert(&*AllNodes.begin() == &EntryNode); 815 AllNodes.remove(AllNodes.begin()); 816 while (!AllNodes.empty()) 817 DeallocateNode(AllNodes.begin()); 818} 819 820void SelectionDAG::clear() { 821 allnodes_clear(); 822 OperandAllocator.Reset(); 823 CSEMap.clear(); 824 825 ExtendedValueTypeNodes.clear(); 826 ExternalSymbols.clear(); 827 TargetExternalSymbols.clear(); 828 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 829 static_cast<CondCodeSDNode*>(0)); 830 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 831 static_cast<SDNode*>(0)); 832 833 EntryNode.UseList = 0; 834 AllNodes.push_back(&EntryNode); 835 Root = getEntryNode(); 836 Ordering->clear(); 837 DbgInfo->clear(); 838} 839 840SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 841 return VT.bitsGT(Op.getValueType()) ? 842 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 843 getNode(ISD::TRUNCATE, DL, VT, Op); 844} 845 846SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 847 return VT.bitsGT(Op.getValueType()) ? 848 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 849 getNode(ISD::TRUNCATE, DL, VT, Op); 850} 851 852SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 853 assert(!VT.isVector() && 854 "getZeroExtendInReg should use the vector element type instead of " 855 "the vector type!"); 856 if (Op.getValueType() == VT) return Op; 857 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 858 APInt Imm = APInt::getLowBitsSet(BitWidth, 859 VT.getSizeInBits()); 860 return getNode(ISD::AND, DL, Op.getValueType(), Op, 861 getConstant(Imm, Op.getValueType())); 862} 863 864/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 865/// 866SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 867 EVT EltVT = VT.getScalarType(); 868 SDValue NegOne = 869 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 870 return getNode(ISD::XOR, DL, VT, Val, NegOne); 871} 872 873SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 874 EVT EltVT = VT.getScalarType(); 875 assert((EltVT.getSizeInBits() >= 64 || 876 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 877 "getConstant with a uint64_t value that doesn't fit in the type!"); 878 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 879} 880 881SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 882 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 883} 884 885SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 886 assert(VT.isInteger() && "Cannot create FP integer constant!"); 887 888 EVT EltVT = VT.getScalarType(); 889 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 890 "APInt size does not match type size!"); 891 892 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 893 FoldingSetNodeID ID; 894 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 895 ID.AddPointer(&Val); 896 void *IP = 0; 897 SDNode *N = NULL; 898 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 899 if (!VT.isVector()) 900 return SDValue(N, 0); 901 902 if (!N) { 903 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 904 CSEMap.InsertNode(N, IP); 905 AllNodes.push_back(N); 906 } 907 908 SDValue Result(N, 0); 909 if (VT.isVector()) { 910 SmallVector<SDValue, 8> Ops; 911 Ops.assign(VT.getVectorNumElements(), Result); 912 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 913 } 914 return Result; 915} 916 917SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 918 return getConstant(Val, TLI.getPointerTy(), isTarget); 919} 920 921 922SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 923 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 924} 925 926SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 927 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 928 929 EVT EltVT = VT.getScalarType(); 930 931 // Do the map lookup using the actual bit pattern for the floating point 932 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 933 // we don't have issues with SNANs. 934 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 935 FoldingSetNodeID ID; 936 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 937 ID.AddPointer(&V); 938 void *IP = 0; 939 SDNode *N = NULL; 940 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 941 if (!VT.isVector()) 942 return SDValue(N, 0); 943 944 if (!N) { 945 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 946 CSEMap.InsertNode(N, IP); 947 AllNodes.push_back(N); 948 } 949 950 SDValue Result(N, 0); 951 if (VT.isVector()) { 952 SmallVector<SDValue, 8> Ops; 953 Ops.assign(VT.getVectorNumElements(), Result); 954 // FIXME DebugLoc info might be appropriate here 955 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 956 } 957 return Result; 958} 959 960SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 961 EVT EltVT = VT.getScalarType(); 962 if (EltVT==MVT::f32) 963 return getConstantFP(APFloat((float)Val), VT, isTarget); 964 else if (EltVT==MVT::f64) 965 return getConstantFP(APFloat(Val), VT, isTarget); 966 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 967 bool ignored; 968 APFloat apf = APFloat(Val); 969 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 970 &ignored); 971 return getConstantFP(apf, VT, isTarget); 972 } else { 973 assert(0 && "Unsupported type in getConstantFP"); 974 return SDValue(); 975 } 976} 977 978SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 979 EVT VT, int64_t Offset, 980 bool isTargetGA, 981 unsigned char TargetFlags) { 982 assert((TargetFlags == 0 || isTargetGA) && 983 "Cannot set target flags on target-independent globals"); 984 985 // Truncate (with sign-extension) the offset value to the pointer size. 986 EVT PTy = TLI.getPointerTy(); 987 unsigned BitWidth = PTy.getSizeInBits(); 988 if (BitWidth < 64) 989 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 990 991 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 992 if (!GVar) { 993 // If GV is an alias then use the aliasee for determining thread-localness. 994 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 995 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 996 } 997 998 unsigned Opc; 999 if (GVar && GVar->isThreadLocal()) 1000 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1001 else 1002 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1003 1004 FoldingSetNodeID ID; 1005 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1006 ID.AddPointer(GV); 1007 ID.AddInteger(Offset); 1008 ID.AddInteger(TargetFlags); 1009 void *IP = 0; 1010 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1011 return SDValue(E, 0); 1012 1013 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1014 Offset, TargetFlags); 1015 CSEMap.InsertNode(N, IP); 1016 AllNodes.push_back(N); 1017 return SDValue(N, 0); 1018} 1019 1020SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1021 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1022 FoldingSetNodeID ID; 1023 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1024 ID.AddInteger(FI); 1025 void *IP = 0; 1026 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1027 return SDValue(E, 0); 1028 1029 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1030 CSEMap.InsertNode(N, IP); 1031 AllNodes.push_back(N); 1032 return SDValue(N, 0); 1033} 1034 1035SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1036 unsigned char TargetFlags) { 1037 assert((TargetFlags == 0 || isTarget) && 1038 "Cannot set target flags on target-independent jump tables"); 1039 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1040 FoldingSetNodeID ID; 1041 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1042 ID.AddInteger(JTI); 1043 ID.AddInteger(TargetFlags); 1044 void *IP = 0; 1045 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1046 return SDValue(E, 0); 1047 1048 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1049 TargetFlags); 1050 CSEMap.InsertNode(N, IP); 1051 AllNodes.push_back(N); 1052 return SDValue(N, 0); 1053} 1054 1055SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1056 unsigned Alignment, int Offset, 1057 bool isTarget, 1058 unsigned char TargetFlags) { 1059 assert((TargetFlags == 0 || isTarget) && 1060 "Cannot set target flags on target-independent globals"); 1061 if (Alignment == 0) 1062 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1063 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1064 FoldingSetNodeID ID; 1065 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1066 ID.AddInteger(Alignment); 1067 ID.AddInteger(Offset); 1068 ID.AddPointer(C); 1069 ID.AddInteger(TargetFlags); 1070 void *IP = 0; 1071 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1072 return SDValue(E, 0); 1073 1074 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1075 Alignment, TargetFlags); 1076 CSEMap.InsertNode(N, IP); 1077 AllNodes.push_back(N); 1078 return SDValue(N, 0); 1079} 1080 1081 1082SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1083 unsigned Alignment, int Offset, 1084 bool isTarget, 1085 unsigned char TargetFlags) { 1086 assert((TargetFlags == 0 || isTarget) && 1087 "Cannot set target flags on target-independent globals"); 1088 if (Alignment == 0) 1089 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1090 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1091 FoldingSetNodeID ID; 1092 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1093 ID.AddInteger(Alignment); 1094 ID.AddInteger(Offset); 1095 C->AddSelectionDAGCSEId(ID); 1096 ID.AddInteger(TargetFlags); 1097 void *IP = 0; 1098 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1099 return SDValue(E, 0); 1100 1101 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1102 Alignment, TargetFlags); 1103 CSEMap.InsertNode(N, IP); 1104 AllNodes.push_back(N); 1105 return SDValue(N, 0); 1106} 1107 1108SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1109 FoldingSetNodeID ID; 1110 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1111 ID.AddPointer(MBB); 1112 void *IP = 0; 1113 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1114 return SDValue(E, 0); 1115 1116 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1117 CSEMap.InsertNode(N, IP); 1118 AllNodes.push_back(N); 1119 return SDValue(N, 0); 1120} 1121 1122SDValue SelectionDAG::getValueType(EVT VT) { 1123 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1124 ValueTypeNodes.size()) 1125 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1126 1127 SDNode *&N = VT.isExtended() ? 1128 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1129 1130 if (N) return SDValue(N, 0); 1131 N = new (NodeAllocator) VTSDNode(VT); 1132 AllNodes.push_back(N); 1133 return SDValue(N, 0); 1134} 1135 1136SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1137 SDNode *&N = ExternalSymbols[Sym]; 1138 if (N) return SDValue(N, 0); 1139 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1140 AllNodes.push_back(N); 1141 return SDValue(N, 0); 1142} 1143 1144SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1145 unsigned char TargetFlags) { 1146 SDNode *&N = 1147 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1148 TargetFlags)]; 1149 if (N) return SDValue(N, 0); 1150 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1151 AllNodes.push_back(N); 1152 return SDValue(N, 0); 1153} 1154 1155SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1156 if ((unsigned)Cond >= CondCodeNodes.size()) 1157 CondCodeNodes.resize(Cond+1); 1158 1159 if (CondCodeNodes[Cond] == 0) { 1160 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1161 CondCodeNodes[Cond] = N; 1162 AllNodes.push_back(N); 1163 } 1164 1165 return SDValue(CondCodeNodes[Cond], 0); 1166} 1167 1168// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1169// the shuffle mask M that point at N1 to point at N2, and indices that point 1170// N2 to point at N1. 1171static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1172 std::swap(N1, N2); 1173 int NElts = M.size(); 1174 for (int i = 0; i != NElts; ++i) { 1175 if (M[i] >= NElts) 1176 M[i] -= NElts; 1177 else if (M[i] >= 0) 1178 M[i] += NElts; 1179 } 1180} 1181 1182SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1183 SDValue N2, const int *Mask) { 1184 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1185 assert(VT.isVector() && N1.getValueType().isVector() && 1186 "Vector Shuffle VTs must be a vectors"); 1187 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1188 && "Vector Shuffle VTs must have same element type"); 1189 1190 // Canonicalize shuffle undef, undef -> undef 1191 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1192 return getUNDEF(VT); 1193 1194 // Validate that all indices in Mask are within the range of the elements 1195 // input to the shuffle. 1196 unsigned NElts = VT.getVectorNumElements(); 1197 SmallVector<int, 8> MaskVec; 1198 for (unsigned i = 0; i != NElts; ++i) { 1199 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1200 MaskVec.push_back(Mask[i]); 1201 } 1202 1203 // Canonicalize shuffle v, v -> v, undef 1204 if (N1 == N2) { 1205 N2 = getUNDEF(VT); 1206 for (unsigned i = 0; i != NElts; ++i) 1207 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1208 } 1209 1210 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1211 if (N1.getOpcode() == ISD::UNDEF) 1212 commuteShuffle(N1, N2, MaskVec); 1213 1214 // Canonicalize all index into lhs, -> shuffle lhs, undef 1215 // Canonicalize all index into rhs, -> shuffle rhs, undef 1216 bool AllLHS = true, AllRHS = true; 1217 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1218 for (unsigned i = 0; i != NElts; ++i) { 1219 if (MaskVec[i] >= (int)NElts) { 1220 if (N2Undef) 1221 MaskVec[i] = -1; 1222 else 1223 AllLHS = false; 1224 } else if (MaskVec[i] >= 0) { 1225 AllRHS = false; 1226 } 1227 } 1228 if (AllLHS && AllRHS) 1229 return getUNDEF(VT); 1230 if (AllLHS && !N2Undef) 1231 N2 = getUNDEF(VT); 1232 if (AllRHS) { 1233 N1 = getUNDEF(VT); 1234 commuteShuffle(N1, N2, MaskVec); 1235 } 1236 1237 // If Identity shuffle, or all shuffle in to undef, return that node. 1238 bool AllUndef = true; 1239 bool Identity = true; 1240 for (unsigned i = 0; i != NElts; ++i) { 1241 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1242 if (MaskVec[i] >= 0) AllUndef = false; 1243 } 1244 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1245 return N1; 1246 if (AllUndef) 1247 return getUNDEF(VT); 1248 1249 FoldingSetNodeID ID; 1250 SDValue Ops[2] = { N1, N2 }; 1251 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1252 for (unsigned i = 0; i != NElts; ++i) 1253 ID.AddInteger(MaskVec[i]); 1254 1255 void* IP = 0; 1256 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1257 return SDValue(E, 0); 1258 1259 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1260 // SDNode doesn't have access to it. This memory will be "leaked" when 1261 // the node is deallocated, but recovered when the NodeAllocator is released. 1262 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1263 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1264 1265 ShuffleVectorSDNode *N = 1266 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1267 CSEMap.InsertNode(N, IP); 1268 AllNodes.push_back(N); 1269 return SDValue(N, 0); 1270} 1271 1272SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1273 SDValue Val, SDValue DTy, 1274 SDValue STy, SDValue Rnd, SDValue Sat, 1275 ISD::CvtCode Code) { 1276 // If the src and dest types are the same and the conversion is between 1277 // integer types of the same sign or two floats, no conversion is necessary. 1278 if (DTy == STy && 1279 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1280 return Val; 1281 1282 FoldingSetNodeID ID; 1283 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1284 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1285 void* IP = 0; 1286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1287 return SDValue(E, 0); 1288 1289 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1290 Code); 1291 CSEMap.InsertNode(N, IP); 1292 AllNodes.push_back(N); 1293 return SDValue(N, 0); 1294} 1295 1296SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1297 FoldingSetNodeID ID; 1298 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1299 ID.AddInteger(RegNo); 1300 void *IP = 0; 1301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1302 return SDValue(E, 0); 1303 1304 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1305 CSEMap.InsertNode(N, IP); 1306 AllNodes.push_back(N); 1307 return SDValue(N, 0); 1308} 1309 1310SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1311 FoldingSetNodeID ID; 1312 SDValue Ops[] = { Root }; 1313 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1314 ID.AddPointer(Label); 1315 void *IP = 0; 1316 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1317 return SDValue(E, 0); 1318 1319 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1320 CSEMap.InsertNode(N, IP); 1321 AllNodes.push_back(N); 1322 return SDValue(N, 0); 1323} 1324 1325 1326SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1327 bool isTarget, 1328 unsigned char TargetFlags) { 1329 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1330 1331 FoldingSetNodeID ID; 1332 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1333 ID.AddPointer(BA); 1334 ID.AddInteger(TargetFlags); 1335 void *IP = 0; 1336 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1337 return SDValue(E, 0); 1338 1339 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1340 CSEMap.InsertNode(N, IP); 1341 AllNodes.push_back(N); 1342 return SDValue(N, 0); 1343} 1344 1345SDValue SelectionDAG::getSrcValue(const Value *V) { 1346 assert((!V || V->getType()->isPointerTy()) && 1347 "SrcValue is not a pointer?"); 1348 1349 FoldingSetNodeID ID; 1350 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1351 ID.AddPointer(V); 1352 1353 void *IP = 0; 1354 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1355 return SDValue(E, 0); 1356 1357 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1358 CSEMap.InsertNode(N, IP); 1359 AllNodes.push_back(N); 1360 return SDValue(N, 0); 1361} 1362 1363/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1364SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1365 FoldingSetNodeID ID; 1366 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1367 ID.AddPointer(MD); 1368 1369 void *IP = 0; 1370 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1371 return SDValue(E, 0); 1372 1373 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1374 CSEMap.InsertNode(N, IP); 1375 AllNodes.push_back(N); 1376 return SDValue(N, 0); 1377} 1378 1379 1380/// getShiftAmountOperand - Return the specified value casted to 1381/// the target's desired shift amount type. 1382SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1383 EVT OpTy = Op.getValueType(); 1384 MVT ShTy = TLI.getShiftAmountTy(); 1385 if (OpTy == ShTy || OpTy.isVector()) return Op; 1386 1387 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1388 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1389} 1390 1391/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1392/// specified value type. 1393SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1394 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1395 unsigned ByteSize = VT.getStoreSize(); 1396 const Type *Ty = VT.getTypeForEVT(*getContext()); 1397 unsigned StackAlign = 1398 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1399 1400 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1401 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1402} 1403 1404/// CreateStackTemporary - Create a stack temporary suitable for holding 1405/// either of the specified value types. 1406SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1407 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1408 VT2.getStoreSizeInBits())/8; 1409 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1410 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1411 const TargetData *TD = TLI.getTargetData(); 1412 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1413 TD->getPrefTypeAlignment(Ty2)); 1414 1415 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1416 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1417 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1418} 1419 1420SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1421 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1422 // These setcc operations always fold. 1423 switch (Cond) { 1424 default: break; 1425 case ISD::SETFALSE: 1426 case ISD::SETFALSE2: return getConstant(0, VT); 1427 case ISD::SETTRUE: 1428 case ISD::SETTRUE2: return getConstant(1, VT); 1429 1430 case ISD::SETOEQ: 1431 case ISD::SETOGT: 1432 case ISD::SETOGE: 1433 case ISD::SETOLT: 1434 case ISD::SETOLE: 1435 case ISD::SETONE: 1436 case ISD::SETO: 1437 case ISD::SETUO: 1438 case ISD::SETUEQ: 1439 case ISD::SETUNE: 1440 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1441 break; 1442 } 1443 1444 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1445 const APInt &C2 = N2C->getAPIntValue(); 1446 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1447 const APInt &C1 = N1C->getAPIntValue(); 1448 1449 switch (Cond) { 1450 default: llvm_unreachable("Unknown integer setcc!"); 1451 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1452 case ISD::SETNE: return getConstant(C1 != C2, VT); 1453 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1454 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1455 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1456 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1457 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1458 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1459 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1460 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1461 } 1462 } 1463 } 1464 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1465 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1466 // No compile time operations on this type yet. 1467 if (N1C->getValueType(0) == MVT::ppcf128) 1468 return SDValue(); 1469 1470 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1471 switch (Cond) { 1472 default: break; 1473 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1474 return getUNDEF(VT); 1475 // fall through 1476 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1477 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1478 return getUNDEF(VT); 1479 // fall through 1480 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1481 R==APFloat::cmpLessThan, VT); 1482 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1483 return getUNDEF(VT); 1484 // fall through 1485 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1486 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1487 return getUNDEF(VT); 1488 // fall through 1489 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1490 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1491 return getUNDEF(VT); 1492 // fall through 1493 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1494 R==APFloat::cmpEqual, VT); 1495 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1496 return getUNDEF(VT); 1497 // fall through 1498 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1499 R==APFloat::cmpEqual, VT); 1500 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1501 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1502 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1503 R==APFloat::cmpEqual, VT); 1504 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1505 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1506 R==APFloat::cmpLessThan, VT); 1507 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1508 R==APFloat::cmpUnordered, VT); 1509 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1510 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1511 } 1512 } else { 1513 // Ensure that the constant occurs on the RHS. 1514 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1515 } 1516 } 1517 1518 // Could not fold it. 1519 return SDValue(); 1520} 1521 1522/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1523/// use this predicate to simplify operations downstream. 1524bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1525 // This predicate is not safe for vector operations. 1526 if (Op.getValueType().isVector()) 1527 return false; 1528 1529 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1530 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1531} 1532 1533/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1534/// this predicate to simplify operations downstream. Mask is known to be zero 1535/// for bits that V cannot have. 1536bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1537 unsigned Depth) const { 1538 APInt KnownZero, KnownOne; 1539 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1540 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1541 return (KnownZero & Mask) == Mask; 1542} 1543 1544/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1545/// known to be either zero or one and return them in the KnownZero/KnownOne 1546/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1547/// processing. 1548void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1549 APInt &KnownZero, APInt &KnownOne, 1550 unsigned Depth) const { 1551 unsigned BitWidth = Mask.getBitWidth(); 1552 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1553 "Mask size mismatches value type size!"); 1554 1555 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1556 if (Depth == 6 || Mask == 0) 1557 return; // Limit search depth. 1558 1559 APInt KnownZero2, KnownOne2; 1560 1561 switch (Op.getOpcode()) { 1562 case ISD::Constant: 1563 // We know all of the bits for a constant! 1564 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1565 KnownZero = ~KnownOne & Mask; 1566 return; 1567 case ISD::AND: 1568 // If either the LHS or the RHS are Zero, the result is zero. 1569 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1570 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1571 KnownZero2, KnownOne2, Depth+1); 1572 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1573 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1574 1575 // Output known-1 bits are only known if set in both the LHS & RHS. 1576 KnownOne &= KnownOne2; 1577 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1578 KnownZero |= KnownZero2; 1579 return; 1580 case ISD::OR: 1581 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1582 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1583 KnownZero2, KnownOne2, Depth+1); 1584 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1585 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1586 1587 // Output known-0 bits are only known if clear in both the LHS & RHS. 1588 KnownZero &= KnownZero2; 1589 // Output known-1 are known to be set if set in either the LHS | RHS. 1590 KnownOne |= KnownOne2; 1591 return; 1592 case ISD::XOR: { 1593 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1594 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1595 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1596 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1597 1598 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1599 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1600 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1601 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1602 KnownZero = KnownZeroOut; 1603 return; 1604 } 1605 case ISD::MUL: { 1606 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1607 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1608 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1609 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1610 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1611 1612 // If low bits are zero in either operand, output low known-0 bits. 1613 // Also compute a conserative estimate for high known-0 bits. 1614 // More trickiness is possible, but this is sufficient for the 1615 // interesting case of alignment computation. 1616 KnownOne.clear(); 1617 unsigned TrailZ = KnownZero.countTrailingOnes() + 1618 KnownZero2.countTrailingOnes(); 1619 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1620 KnownZero2.countLeadingOnes(), 1621 BitWidth) - BitWidth; 1622 1623 TrailZ = std::min(TrailZ, BitWidth); 1624 LeadZ = std::min(LeadZ, BitWidth); 1625 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1626 APInt::getHighBitsSet(BitWidth, LeadZ); 1627 KnownZero &= Mask; 1628 return; 1629 } 1630 case ISD::UDIV: { 1631 // For the purposes of computing leading zeros we can conservatively 1632 // treat a udiv as a logical right shift by the power of 2 known to 1633 // be less than the denominator. 1634 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1635 ComputeMaskedBits(Op.getOperand(0), 1636 AllOnes, KnownZero2, KnownOne2, Depth+1); 1637 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1638 1639 KnownOne2.clear(); 1640 KnownZero2.clear(); 1641 ComputeMaskedBits(Op.getOperand(1), 1642 AllOnes, KnownZero2, KnownOne2, Depth+1); 1643 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1644 if (RHSUnknownLeadingOnes != BitWidth) 1645 LeadZ = std::min(BitWidth, 1646 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1647 1648 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1649 return; 1650 } 1651 case ISD::SELECT: 1652 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1653 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1654 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1655 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1656 1657 // Only known if known in both the LHS and RHS. 1658 KnownOne &= KnownOne2; 1659 KnownZero &= KnownZero2; 1660 return; 1661 case ISD::SELECT_CC: 1662 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1663 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1664 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1665 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1666 1667 // Only known if known in both the LHS and RHS. 1668 KnownOne &= KnownOne2; 1669 KnownZero &= KnownZero2; 1670 return; 1671 case ISD::SADDO: 1672 case ISD::UADDO: 1673 case ISD::SSUBO: 1674 case ISD::USUBO: 1675 case ISD::SMULO: 1676 case ISD::UMULO: 1677 if (Op.getResNo() != 1) 1678 return; 1679 // The boolean result conforms to getBooleanContents. Fall through. 1680 case ISD::SETCC: 1681 // If we know the result of a setcc has the top bits zero, use this info. 1682 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1683 BitWidth > 1) 1684 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1685 return; 1686 case ISD::SHL: 1687 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1688 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1689 unsigned ShAmt = SA->getZExtValue(); 1690 1691 // If the shift count is an invalid immediate, don't do anything. 1692 if (ShAmt >= BitWidth) 1693 return; 1694 1695 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1696 KnownZero, KnownOne, Depth+1); 1697 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1698 KnownZero <<= ShAmt; 1699 KnownOne <<= ShAmt; 1700 // low bits known zero. 1701 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1702 } 1703 return; 1704 case ISD::SRL: 1705 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1706 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1707 unsigned ShAmt = SA->getZExtValue(); 1708 1709 // If the shift count is an invalid immediate, don't do anything. 1710 if (ShAmt >= BitWidth) 1711 return; 1712 1713 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1714 KnownZero, KnownOne, Depth+1); 1715 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1716 KnownZero = KnownZero.lshr(ShAmt); 1717 KnownOne = KnownOne.lshr(ShAmt); 1718 1719 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1720 KnownZero |= HighBits; // High bits known zero. 1721 } 1722 return; 1723 case ISD::SRA: 1724 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1725 unsigned ShAmt = SA->getZExtValue(); 1726 1727 // If the shift count is an invalid immediate, don't do anything. 1728 if (ShAmt >= BitWidth) 1729 return; 1730 1731 APInt InDemandedMask = (Mask << ShAmt); 1732 // If any of the demanded bits are produced by the sign extension, we also 1733 // demand the input sign bit. 1734 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1735 if (HighBits.getBoolValue()) 1736 InDemandedMask |= APInt::getSignBit(BitWidth); 1737 1738 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1739 Depth+1); 1740 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1741 KnownZero = KnownZero.lshr(ShAmt); 1742 KnownOne = KnownOne.lshr(ShAmt); 1743 1744 // Handle the sign bits. 1745 APInt SignBit = APInt::getSignBit(BitWidth); 1746 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1747 1748 if (KnownZero.intersects(SignBit)) { 1749 KnownZero |= HighBits; // New bits are known zero. 1750 } else if (KnownOne.intersects(SignBit)) { 1751 KnownOne |= HighBits; // New bits are known one. 1752 } 1753 } 1754 return; 1755 case ISD::SIGN_EXTEND_INREG: { 1756 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1757 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1758 1759 // Sign extension. Compute the demanded bits in the result that are not 1760 // present in the input. 1761 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1762 1763 APInt InSignBit = APInt::getSignBit(EBits); 1764 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1765 1766 // If the sign extended bits are demanded, we know that the sign 1767 // bit is demanded. 1768 InSignBit.zext(BitWidth); 1769 if (NewBits.getBoolValue()) 1770 InputDemandedBits |= InSignBit; 1771 1772 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1773 KnownZero, KnownOne, Depth+1); 1774 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1775 1776 // If the sign bit of the input is known set or clear, then we know the 1777 // top bits of the result. 1778 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1779 KnownZero |= NewBits; 1780 KnownOne &= ~NewBits; 1781 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1782 KnownOne |= NewBits; 1783 KnownZero &= ~NewBits; 1784 } else { // Input sign bit unknown 1785 KnownZero &= ~NewBits; 1786 KnownOne &= ~NewBits; 1787 } 1788 return; 1789 } 1790 case ISD::CTTZ: 1791 case ISD::CTLZ: 1792 case ISD::CTPOP: { 1793 unsigned LowBits = Log2_32(BitWidth)+1; 1794 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1795 KnownOne.clear(); 1796 return; 1797 } 1798 case ISD::LOAD: { 1799 if (ISD::isZEXTLoad(Op.getNode())) { 1800 LoadSDNode *LD = cast<LoadSDNode>(Op); 1801 EVT VT = LD->getMemoryVT(); 1802 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1803 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1804 } 1805 return; 1806 } 1807 case ISD::ZERO_EXTEND: { 1808 EVT InVT = Op.getOperand(0).getValueType(); 1809 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1810 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1811 APInt InMask = Mask; 1812 InMask.trunc(InBits); 1813 KnownZero.trunc(InBits); 1814 KnownOne.trunc(InBits); 1815 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1816 KnownZero.zext(BitWidth); 1817 KnownOne.zext(BitWidth); 1818 KnownZero |= NewBits; 1819 return; 1820 } 1821 case ISD::SIGN_EXTEND: { 1822 EVT InVT = Op.getOperand(0).getValueType(); 1823 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1824 APInt InSignBit = APInt::getSignBit(InBits); 1825 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1826 APInt InMask = Mask; 1827 InMask.trunc(InBits); 1828 1829 // If any of the sign extended bits are demanded, we know that the sign 1830 // bit is demanded. Temporarily set this bit in the mask for our callee. 1831 if (NewBits.getBoolValue()) 1832 InMask |= InSignBit; 1833 1834 KnownZero.trunc(InBits); 1835 KnownOne.trunc(InBits); 1836 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1837 1838 // Note if the sign bit is known to be zero or one. 1839 bool SignBitKnownZero = KnownZero.isNegative(); 1840 bool SignBitKnownOne = KnownOne.isNegative(); 1841 assert(!(SignBitKnownZero && SignBitKnownOne) && 1842 "Sign bit can't be known to be both zero and one!"); 1843 1844 // If the sign bit wasn't actually demanded by our caller, we don't 1845 // want it set in the KnownZero and KnownOne result values. Reset the 1846 // mask and reapply it to the result values. 1847 InMask = Mask; 1848 InMask.trunc(InBits); 1849 KnownZero &= InMask; 1850 KnownOne &= InMask; 1851 1852 KnownZero.zext(BitWidth); 1853 KnownOne.zext(BitWidth); 1854 1855 // If the sign bit is known zero or one, the top bits match. 1856 if (SignBitKnownZero) 1857 KnownZero |= NewBits; 1858 else if (SignBitKnownOne) 1859 KnownOne |= NewBits; 1860 return; 1861 } 1862 case ISD::ANY_EXTEND: { 1863 EVT InVT = Op.getOperand(0).getValueType(); 1864 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1865 APInt InMask = Mask; 1866 InMask.trunc(InBits); 1867 KnownZero.trunc(InBits); 1868 KnownOne.trunc(InBits); 1869 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1870 KnownZero.zext(BitWidth); 1871 KnownOne.zext(BitWidth); 1872 return; 1873 } 1874 case ISD::TRUNCATE: { 1875 EVT InVT = Op.getOperand(0).getValueType(); 1876 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1877 APInt InMask = Mask; 1878 InMask.zext(InBits); 1879 KnownZero.zext(InBits); 1880 KnownOne.zext(InBits); 1881 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1882 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1883 KnownZero.trunc(BitWidth); 1884 KnownOne.trunc(BitWidth); 1885 break; 1886 } 1887 case ISD::AssertZext: { 1888 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1889 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1890 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1891 KnownOne, Depth+1); 1892 KnownZero |= (~InMask) & Mask; 1893 return; 1894 } 1895 case ISD::FGETSIGN: 1896 // All bits are zero except the low bit. 1897 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1898 return; 1899 1900 case ISD::SUB: { 1901 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1902 // We know that the top bits of C-X are clear if X contains less bits 1903 // than C (i.e. no wrap-around can happen). For example, 20-X is 1904 // positive if we can prove that X is >= 0 and < 16. 1905 if (CLHS->getAPIntValue().isNonNegative()) { 1906 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1907 // NLZ can't be BitWidth with no sign bit 1908 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1909 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1910 Depth+1); 1911 1912 // If all of the MaskV bits are known to be zero, then we know the 1913 // output top bits are zero, because we now know that the output is 1914 // from [0-C]. 1915 if ((KnownZero2 & MaskV) == MaskV) { 1916 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1917 // Top bits known zero. 1918 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1919 } 1920 } 1921 } 1922 } 1923 // fall through 1924 case ISD::ADD: { 1925 // Output known-0 bits are known if clear or set in both the low clear bits 1926 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1927 // low 3 bits clear. 1928 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1929 BitWidth - Mask.countLeadingZeros()); 1930 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1931 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1932 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1933 1934 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1935 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1936 KnownZeroOut = std::min(KnownZeroOut, 1937 KnownZero2.countTrailingOnes()); 1938 1939 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1940 return; 1941 } 1942 case ISD::SREM: 1943 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1944 const APInt &RA = Rem->getAPIntValue().abs(); 1945 if (RA.isPowerOf2()) { 1946 APInt LowBits = RA - 1; 1947 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1948 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1949 1950 // The low bits of the first operand are unchanged by the srem. 1951 KnownZero = KnownZero2 & LowBits; 1952 KnownOne = KnownOne2 & LowBits; 1953 1954 // If the first operand is non-negative or has all low bits zero, then 1955 // the upper bits are all zero. 1956 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1957 KnownZero |= ~LowBits; 1958 1959 // If the first operand is negative and not all low bits are zero, then 1960 // the upper bits are all one. 1961 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1962 KnownOne |= ~LowBits; 1963 1964 KnownZero &= Mask; 1965 KnownOne &= Mask; 1966 1967 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1968 } 1969 } 1970 return; 1971 case ISD::UREM: { 1972 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1973 const APInt &RA = Rem->getAPIntValue(); 1974 if (RA.isPowerOf2()) { 1975 APInt LowBits = (RA - 1); 1976 APInt Mask2 = LowBits & Mask; 1977 KnownZero |= ~LowBits & Mask; 1978 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1979 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1980 break; 1981 } 1982 } 1983 1984 // Since the result is less than or equal to either operand, any leading 1985 // zero bits in either operand must also exist in the result. 1986 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1987 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1988 Depth+1); 1989 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1990 Depth+1); 1991 1992 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1993 KnownZero2.countLeadingOnes()); 1994 KnownOne.clear(); 1995 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1996 return; 1997 } 1998 default: 1999 // Allow the target to implement this method for its nodes. 2000 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2001 case ISD::INTRINSIC_WO_CHAIN: 2002 case ISD::INTRINSIC_W_CHAIN: 2003 case ISD::INTRINSIC_VOID: 2004 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2005 Depth); 2006 } 2007 return; 2008 } 2009} 2010 2011/// ComputeNumSignBits - Return the number of times the sign bit of the 2012/// register is replicated into the other bits. We know that at least 1 bit 2013/// is always equal to the sign bit (itself), but other cases can give us 2014/// information. For example, immediately after an "SRA X, 2", we know that 2015/// the top 3 bits are all equal to each other, so we return 3. 2016unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2017 EVT VT = Op.getValueType(); 2018 assert(VT.isInteger() && "Invalid VT!"); 2019 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2020 unsigned Tmp, Tmp2; 2021 unsigned FirstAnswer = 1; 2022 2023 if (Depth == 6) 2024 return 1; // Limit search depth. 2025 2026 switch (Op.getOpcode()) { 2027 default: break; 2028 case ISD::AssertSext: 2029 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2030 return VTBits-Tmp+1; 2031 case ISD::AssertZext: 2032 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2033 return VTBits-Tmp; 2034 2035 case ISD::Constant: { 2036 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2037 // If negative, return # leading ones. 2038 if (Val.isNegative()) 2039 return Val.countLeadingOnes(); 2040 2041 // Return # leading zeros. 2042 return Val.countLeadingZeros(); 2043 } 2044 2045 case ISD::SIGN_EXTEND: 2046 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2047 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2048 2049 case ISD::SIGN_EXTEND_INREG: 2050 // Max of the input and what this extends. 2051 Tmp = 2052 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2053 Tmp = VTBits-Tmp+1; 2054 2055 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2056 return std::max(Tmp, Tmp2); 2057 2058 case ISD::SRA: 2059 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2060 // SRA X, C -> adds C sign bits. 2061 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2062 Tmp += C->getZExtValue(); 2063 if (Tmp > VTBits) Tmp = VTBits; 2064 } 2065 return Tmp; 2066 case ISD::SHL: 2067 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2068 // shl destroys sign bits. 2069 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2070 if (C->getZExtValue() >= VTBits || // Bad shift. 2071 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2072 return Tmp - C->getZExtValue(); 2073 } 2074 break; 2075 case ISD::AND: 2076 case ISD::OR: 2077 case ISD::XOR: // NOT is handled here. 2078 // Logical binary ops preserve the number of sign bits at the worst. 2079 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2080 if (Tmp != 1) { 2081 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2082 FirstAnswer = std::min(Tmp, Tmp2); 2083 // We computed what we know about the sign bits as our first 2084 // answer. Now proceed to the generic code that uses 2085 // ComputeMaskedBits, and pick whichever answer is better. 2086 } 2087 break; 2088 2089 case ISD::SELECT: 2090 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2091 if (Tmp == 1) return 1; // Early out. 2092 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2093 return std::min(Tmp, Tmp2); 2094 2095 case ISD::SADDO: 2096 case ISD::UADDO: 2097 case ISD::SSUBO: 2098 case ISD::USUBO: 2099 case ISD::SMULO: 2100 case ISD::UMULO: 2101 if (Op.getResNo() != 1) 2102 break; 2103 // The boolean result conforms to getBooleanContents. Fall through. 2104 case ISD::SETCC: 2105 // If setcc returns 0/-1, all bits are sign bits. 2106 if (TLI.getBooleanContents() == 2107 TargetLowering::ZeroOrNegativeOneBooleanContent) 2108 return VTBits; 2109 break; 2110 case ISD::ROTL: 2111 case ISD::ROTR: 2112 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2113 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2114 2115 // Handle rotate right by N like a rotate left by 32-N. 2116 if (Op.getOpcode() == ISD::ROTR) 2117 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2118 2119 // If we aren't rotating out all of the known-in sign bits, return the 2120 // number that are left. This handles rotl(sext(x), 1) for example. 2121 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2122 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2123 } 2124 break; 2125 case ISD::ADD: 2126 // Add can have at most one carry bit. Thus we know that the output 2127 // is, at worst, one more bit than the inputs. 2128 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2129 if (Tmp == 1) return 1; // Early out. 2130 2131 // Special case decrementing a value (ADD X, -1): 2132 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2133 if (CRHS->isAllOnesValue()) { 2134 APInt KnownZero, KnownOne; 2135 APInt Mask = APInt::getAllOnesValue(VTBits); 2136 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2137 2138 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2139 // sign bits set. 2140 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2141 return VTBits; 2142 2143 // If we are subtracting one from a positive number, there is no carry 2144 // out of the result. 2145 if (KnownZero.isNegative()) 2146 return Tmp; 2147 } 2148 2149 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2150 if (Tmp2 == 1) return 1; 2151 return std::min(Tmp, Tmp2)-1; 2152 break; 2153 2154 case ISD::SUB: 2155 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2156 if (Tmp2 == 1) return 1; 2157 2158 // Handle NEG. 2159 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2160 if (CLHS->isNullValue()) { 2161 APInt KnownZero, KnownOne; 2162 APInt Mask = APInt::getAllOnesValue(VTBits); 2163 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2164 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2165 // sign bits set. 2166 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2167 return VTBits; 2168 2169 // If the input is known to be positive (the sign bit is known clear), 2170 // the output of the NEG has the same number of sign bits as the input. 2171 if (KnownZero.isNegative()) 2172 return Tmp2; 2173 2174 // Otherwise, we treat this like a SUB. 2175 } 2176 2177 // Sub can have at most one carry bit. Thus we know that the output 2178 // is, at worst, one more bit than the inputs. 2179 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2180 if (Tmp == 1) return 1; // Early out. 2181 return std::min(Tmp, Tmp2)-1; 2182 break; 2183 case ISD::TRUNCATE: 2184 // FIXME: it's tricky to do anything useful for this, but it is an important 2185 // case for targets like X86. 2186 break; 2187 } 2188 2189 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2190 if (Op.getOpcode() == ISD::LOAD) { 2191 LoadSDNode *LD = cast<LoadSDNode>(Op); 2192 unsigned ExtType = LD->getExtensionType(); 2193 switch (ExtType) { 2194 default: break; 2195 case ISD::SEXTLOAD: // '17' bits known 2196 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2197 return VTBits-Tmp+1; 2198 case ISD::ZEXTLOAD: // '16' bits known 2199 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2200 return VTBits-Tmp; 2201 } 2202 } 2203 2204 // Allow the target to implement this method for its nodes. 2205 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2206 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2207 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2208 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2209 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2210 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2211 } 2212 2213 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2214 // use this information. 2215 APInt KnownZero, KnownOne; 2216 APInt Mask = APInt::getAllOnesValue(VTBits); 2217 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2218 2219 if (KnownZero.isNegative()) { // sign bit is 0 2220 Mask = KnownZero; 2221 } else if (KnownOne.isNegative()) { // sign bit is 1; 2222 Mask = KnownOne; 2223 } else { 2224 // Nothing known. 2225 return FirstAnswer; 2226 } 2227 2228 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2229 // the number of identical bits in the top of the input value. 2230 Mask = ~Mask; 2231 Mask <<= Mask.getBitWidth()-VTBits; 2232 // Return # leading zeros. We use 'min' here in case Val was zero before 2233 // shifting. We don't want to return '64' as for an i32 "0". 2234 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2235} 2236 2237bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2238 // If we're told that NaNs won't happen, assume they won't. 2239 if (NoNaNsFPMath) 2240 return true; 2241 2242 // If the value is a constant, we can obviously see if it is a NaN or not. 2243 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2244 return !C->getValueAPF().isNaN(); 2245 2246 // TODO: Recognize more cases here. 2247 2248 return false; 2249} 2250 2251bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2252 // If the value is a constant, we can obviously see if it is a zero or not. 2253 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2254 return !C->isZero(); 2255 2256 // TODO: Recognize more cases here. 2257 2258 return false; 2259} 2260 2261bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2262 // Check the obvious case. 2263 if (A == B) return true; 2264 2265 // For for negative and positive zero. 2266 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2267 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2268 if (CA->isZero() && CB->isZero()) return true; 2269 2270 // Otherwise they may not be equal. 2271 return false; 2272} 2273 2274bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2275 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2276 if (!GA) return false; 2277 if (GA->getOffset() != 0) return false; 2278 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2279 if (!GV) return false; 2280 return MF->getMMI().hasDebugInfo(); 2281} 2282 2283 2284/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2285/// element of the result of the vector shuffle. 2286SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2287 unsigned i) { 2288 EVT VT = N->getValueType(0); 2289 if (N->getMaskElt(i) < 0) 2290 return getUNDEF(VT.getVectorElementType()); 2291 unsigned Index = N->getMaskElt(i); 2292 unsigned NumElems = VT.getVectorNumElements(); 2293 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2294 Index %= NumElems; 2295 2296 if (V.getOpcode() == ISD::BIT_CONVERT) { 2297 V = V.getOperand(0); 2298 EVT VVT = V.getValueType(); 2299 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2300 return SDValue(); 2301 } 2302 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2303 return (Index == 0) ? V.getOperand(0) 2304 : getUNDEF(VT.getVectorElementType()); 2305 if (V.getOpcode() == ISD::BUILD_VECTOR) 2306 return V.getOperand(Index); 2307 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2308 return getShuffleScalarElt(SVN, Index); 2309 return SDValue(); 2310} 2311 2312 2313/// getNode - Gets or creates the specified node. 2314/// 2315SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2316 FoldingSetNodeID ID; 2317 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2318 void *IP = 0; 2319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2320 return SDValue(E, 0); 2321 2322 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2323 CSEMap.InsertNode(N, IP); 2324 2325 AllNodes.push_back(N); 2326#ifndef NDEBUG 2327 VerifyNode(N); 2328#endif 2329 return SDValue(N, 0); 2330} 2331 2332SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2333 EVT VT, SDValue Operand) { 2334 // Constant fold unary operations with an integer constant operand. 2335 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2336 const APInt &Val = C->getAPIntValue(); 2337 switch (Opcode) { 2338 default: break; 2339 case ISD::SIGN_EXTEND: 2340 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2341 case ISD::ANY_EXTEND: 2342 case ISD::ZERO_EXTEND: 2343 case ISD::TRUNCATE: 2344 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2345 case ISD::UINT_TO_FP: 2346 case ISD::SINT_TO_FP: { 2347 const uint64_t zero[] = {0, 0}; 2348 // No compile time operations on ppcf128. 2349 if (VT == MVT::ppcf128) break; 2350 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2351 (void)apf.convertFromAPInt(Val, 2352 Opcode==ISD::SINT_TO_FP, 2353 APFloat::rmNearestTiesToEven); 2354 return getConstantFP(apf, VT); 2355 } 2356 case ISD::BIT_CONVERT: 2357 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2358 return getConstantFP(Val.bitsToFloat(), VT); 2359 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2360 return getConstantFP(Val.bitsToDouble(), VT); 2361 break; 2362 case ISD::BSWAP: 2363 return getConstant(Val.byteSwap(), VT); 2364 case ISD::CTPOP: 2365 return getConstant(Val.countPopulation(), VT); 2366 case ISD::CTLZ: 2367 return getConstant(Val.countLeadingZeros(), VT); 2368 case ISD::CTTZ: 2369 return getConstant(Val.countTrailingZeros(), VT); 2370 } 2371 } 2372 2373 // Constant fold unary operations with a floating point constant operand. 2374 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2375 APFloat V = C->getValueAPF(); // make copy 2376 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2377 switch (Opcode) { 2378 case ISD::FNEG: 2379 V.changeSign(); 2380 return getConstantFP(V, VT); 2381 case ISD::FABS: 2382 V.clearSign(); 2383 return getConstantFP(V, VT); 2384 case ISD::FP_ROUND: 2385 case ISD::FP_EXTEND: { 2386 bool ignored; 2387 // This can return overflow, underflow, or inexact; we don't care. 2388 // FIXME need to be more flexible about rounding mode. 2389 (void)V.convert(*EVTToAPFloatSemantics(VT), 2390 APFloat::rmNearestTiesToEven, &ignored); 2391 return getConstantFP(V, VT); 2392 } 2393 case ISD::FP_TO_SINT: 2394 case ISD::FP_TO_UINT: { 2395 integerPart x[2]; 2396 bool ignored; 2397 assert(integerPartWidth >= 64); 2398 // FIXME need to be more flexible about rounding mode. 2399 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2400 Opcode==ISD::FP_TO_SINT, 2401 APFloat::rmTowardZero, &ignored); 2402 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2403 break; 2404 APInt api(VT.getSizeInBits(), 2, x); 2405 return getConstant(api, VT); 2406 } 2407 case ISD::BIT_CONVERT: 2408 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2409 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2410 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2411 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2412 break; 2413 } 2414 } 2415 } 2416 2417 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2418 switch (Opcode) { 2419 case ISD::TokenFactor: 2420 case ISD::MERGE_VALUES: 2421 case ISD::CONCAT_VECTORS: 2422 return Operand; // Factor, merge or concat of one node? No need. 2423 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2424 case ISD::FP_EXTEND: 2425 assert(VT.isFloatingPoint() && 2426 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2427 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2428 assert((!VT.isVector() || 2429 VT.getVectorNumElements() == 2430 Operand.getValueType().getVectorNumElements()) && 2431 "Vector element count mismatch!"); 2432 if (Operand.getOpcode() == ISD::UNDEF) 2433 return getUNDEF(VT); 2434 break; 2435 case ISD::SIGN_EXTEND: 2436 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2437 "Invalid SIGN_EXTEND!"); 2438 if (Operand.getValueType() == VT) return Operand; // noop extension 2439 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2440 "Invalid sext node, dst < src!"); 2441 assert((!VT.isVector() || 2442 VT.getVectorNumElements() == 2443 Operand.getValueType().getVectorNumElements()) && 2444 "Vector element count mismatch!"); 2445 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2446 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2447 break; 2448 case ISD::ZERO_EXTEND: 2449 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2450 "Invalid ZERO_EXTEND!"); 2451 if (Operand.getValueType() == VT) return Operand; // noop extension 2452 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2453 "Invalid zext node, dst < src!"); 2454 assert((!VT.isVector() || 2455 VT.getVectorNumElements() == 2456 Operand.getValueType().getVectorNumElements()) && 2457 "Vector element count mismatch!"); 2458 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2459 return getNode(ISD::ZERO_EXTEND, DL, VT, 2460 Operand.getNode()->getOperand(0)); 2461 break; 2462 case ISD::ANY_EXTEND: 2463 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2464 "Invalid ANY_EXTEND!"); 2465 if (Operand.getValueType() == VT) return Operand; // noop extension 2466 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2467 "Invalid anyext node, dst < src!"); 2468 assert((!VT.isVector() || 2469 VT.getVectorNumElements() == 2470 Operand.getValueType().getVectorNumElements()) && 2471 "Vector element count mismatch!"); 2472 2473 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2474 OpOpcode == ISD::ANY_EXTEND) 2475 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2476 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2477 2478 // (ext (trunx x)) -> x 2479 if (OpOpcode == ISD::TRUNCATE) { 2480 SDValue OpOp = Operand.getNode()->getOperand(0); 2481 if (OpOp.getValueType() == VT) 2482 return OpOp; 2483 } 2484 break; 2485 case ISD::TRUNCATE: 2486 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2487 "Invalid TRUNCATE!"); 2488 if (Operand.getValueType() == VT) return Operand; // noop truncate 2489 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2490 "Invalid truncate node, src < dst!"); 2491 assert((!VT.isVector() || 2492 VT.getVectorNumElements() == 2493 Operand.getValueType().getVectorNumElements()) && 2494 "Vector element count mismatch!"); 2495 if (OpOpcode == ISD::TRUNCATE) 2496 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2497 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2498 OpOpcode == ISD::ANY_EXTEND) { 2499 // If the source is smaller than the dest, we still need an extend. 2500 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2501 .bitsLT(VT.getScalarType())) 2502 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2503 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2504 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2505 else 2506 return Operand.getNode()->getOperand(0); 2507 } 2508 break; 2509 case ISD::BIT_CONVERT: 2510 // Basic sanity checking. 2511 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2512 && "Cannot BIT_CONVERT between types of different sizes!"); 2513 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2514 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2515 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2516 if (OpOpcode == ISD::UNDEF) 2517 return getUNDEF(VT); 2518 break; 2519 case ISD::SCALAR_TO_VECTOR: 2520 assert(VT.isVector() && !Operand.getValueType().isVector() && 2521 (VT.getVectorElementType() == Operand.getValueType() || 2522 (VT.getVectorElementType().isInteger() && 2523 Operand.getValueType().isInteger() && 2524 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2525 "Illegal SCALAR_TO_VECTOR node!"); 2526 if (OpOpcode == ISD::UNDEF) 2527 return getUNDEF(VT); 2528 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2529 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2530 isa<ConstantSDNode>(Operand.getOperand(1)) && 2531 Operand.getConstantOperandVal(1) == 0 && 2532 Operand.getOperand(0).getValueType() == VT) 2533 return Operand.getOperand(0); 2534 break; 2535 case ISD::FNEG: 2536 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2537 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2538 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2539 Operand.getNode()->getOperand(0)); 2540 if (OpOpcode == ISD::FNEG) // --X -> X 2541 return Operand.getNode()->getOperand(0); 2542 break; 2543 case ISD::FABS: 2544 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2545 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2546 break; 2547 } 2548 2549 SDNode *N; 2550 SDVTList VTs = getVTList(VT); 2551 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2552 FoldingSetNodeID ID; 2553 SDValue Ops[1] = { Operand }; 2554 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2555 void *IP = 0; 2556 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2557 return SDValue(E, 0); 2558 2559 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2560 CSEMap.InsertNode(N, IP); 2561 } else { 2562 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2563 } 2564 2565 AllNodes.push_back(N); 2566#ifndef NDEBUG 2567 VerifyNode(N); 2568#endif 2569 return SDValue(N, 0); 2570} 2571 2572SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2573 EVT VT, 2574 ConstantSDNode *Cst1, 2575 ConstantSDNode *Cst2) { 2576 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2577 2578 switch (Opcode) { 2579 case ISD::ADD: return getConstant(C1 + C2, VT); 2580 case ISD::SUB: return getConstant(C1 - C2, VT); 2581 case ISD::MUL: return getConstant(C1 * C2, VT); 2582 case ISD::UDIV: 2583 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2584 break; 2585 case ISD::UREM: 2586 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2587 break; 2588 case ISD::SDIV: 2589 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2590 break; 2591 case ISD::SREM: 2592 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2593 break; 2594 case ISD::AND: return getConstant(C1 & C2, VT); 2595 case ISD::OR: return getConstant(C1 | C2, VT); 2596 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2597 case ISD::SHL: return getConstant(C1 << C2, VT); 2598 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2599 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2600 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2601 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2602 default: break; 2603 } 2604 2605 return SDValue(); 2606} 2607 2608SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2609 SDValue N1, SDValue N2) { 2610 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2611 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2612 switch (Opcode) { 2613 default: break; 2614 case ISD::TokenFactor: 2615 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2616 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2617 // Fold trivial token factors. 2618 if (N1.getOpcode() == ISD::EntryToken) return N2; 2619 if (N2.getOpcode() == ISD::EntryToken) return N1; 2620 if (N1 == N2) return N1; 2621 break; 2622 case ISD::CONCAT_VECTORS: 2623 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2624 // one big BUILD_VECTOR. 2625 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2626 N2.getOpcode() == ISD::BUILD_VECTOR) { 2627 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2628 N1.getNode()->op_end()); 2629 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2630 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2631 } 2632 break; 2633 case ISD::AND: 2634 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2635 assert(N1.getValueType() == N2.getValueType() && 2636 N1.getValueType() == VT && "Binary operator types must match!"); 2637 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2638 // worth handling here. 2639 if (N2C && N2C->isNullValue()) 2640 return N2; 2641 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2642 return N1; 2643 break; 2644 case ISD::OR: 2645 case ISD::XOR: 2646 case ISD::ADD: 2647 case ISD::SUB: 2648 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2649 assert(N1.getValueType() == N2.getValueType() && 2650 N1.getValueType() == VT && "Binary operator types must match!"); 2651 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2652 // it's worth handling here. 2653 if (N2C && N2C->isNullValue()) 2654 return N1; 2655 break; 2656 case ISD::UDIV: 2657 case ISD::UREM: 2658 case ISD::MULHU: 2659 case ISD::MULHS: 2660 case ISD::MUL: 2661 case ISD::SDIV: 2662 case ISD::SREM: 2663 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2664 assert(N1.getValueType() == N2.getValueType() && 2665 N1.getValueType() == VT && "Binary operator types must match!"); 2666 break; 2667 case ISD::FADD: 2668 case ISD::FSUB: 2669 case ISD::FMUL: 2670 case ISD::FDIV: 2671 case ISD::FREM: 2672 if (UnsafeFPMath) { 2673 if (Opcode == ISD::FADD) { 2674 // 0+x --> x 2675 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2676 if (CFP->getValueAPF().isZero()) 2677 return N2; 2678 // x+0 --> x 2679 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2680 if (CFP->getValueAPF().isZero()) 2681 return N1; 2682 } else if (Opcode == ISD::FSUB) { 2683 // x-0 --> x 2684 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2685 if (CFP->getValueAPF().isZero()) 2686 return N1; 2687 } 2688 } 2689 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2690 assert(N1.getValueType() == N2.getValueType() && 2691 N1.getValueType() == VT && "Binary operator types must match!"); 2692 break; 2693 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2694 assert(N1.getValueType() == VT && 2695 N1.getValueType().isFloatingPoint() && 2696 N2.getValueType().isFloatingPoint() && 2697 "Invalid FCOPYSIGN!"); 2698 break; 2699 case ISD::SHL: 2700 case ISD::SRA: 2701 case ISD::SRL: 2702 case ISD::ROTL: 2703 case ISD::ROTR: 2704 assert(VT == N1.getValueType() && 2705 "Shift operators return type must be the same as their first arg"); 2706 assert(VT.isInteger() && N2.getValueType().isInteger() && 2707 "Shifts only work on integers"); 2708 2709 // Always fold shifts of i1 values so the code generator doesn't need to 2710 // handle them. Since we know the size of the shift has to be less than the 2711 // size of the value, the shift/rotate count is guaranteed to be zero. 2712 if (VT == MVT::i1) 2713 return N1; 2714 if (N2C && N2C->isNullValue()) 2715 return N1; 2716 break; 2717 case ISD::FP_ROUND_INREG: { 2718 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2719 assert(VT == N1.getValueType() && "Not an inreg round!"); 2720 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2721 "Cannot FP_ROUND_INREG integer types"); 2722 assert(EVT.isVector() == VT.isVector() && 2723 "FP_ROUND_INREG type should be vector iff the operand " 2724 "type is vector!"); 2725 assert((!EVT.isVector() || 2726 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2727 "Vector element counts must match in FP_ROUND_INREG"); 2728 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2729 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2730 break; 2731 } 2732 case ISD::FP_ROUND: 2733 assert(VT.isFloatingPoint() && 2734 N1.getValueType().isFloatingPoint() && 2735 VT.bitsLE(N1.getValueType()) && 2736 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2737 if (N1.getValueType() == VT) return N1; // noop conversion. 2738 break; 2739 case ISD::AssertSext: 2740 case ISD::AssertZext: { 2741 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2742 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2743 assert(VT.isInteger() && EVT.isInteger() && 2744 "Cannot *_EXTEND_INREG FP types"); 2745 assert(!EVT.isVector() && 2746 "AssertSExt/AssertZExt type should be the vector element type " 2747 "rather than the vector type!"); 2748 assert(EVT.bitsLE(VT) && "Not extending!"); 2749 if (VT == EVT) return N1; // noop assertion. 2750 break; 2751 } 2752 case ISD::SIGN_EXTEND_INREG: { 2753 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2754 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2755 assert(VT.isInteger() && EVT.isInteger() && 2756 "Cannot *_EXTEND_INREG FP types"); 2757 assert(EVT.isVector() == VT.isVector() && 2758 "SIGN_EXTEND_INREG type should be vector iff the operand " 2759 "type is vector!"); 2760 assert((!EVT.isVector() || 2761 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2762 "Vector element counts must match in SIGN_EXTEND_INREG"); 2763 assert(EVT.bitsLE(VT) && "Not extending!"); 2764 if (EVT == VT) return N1; // Not actually extending 2765 2766 if (N1C) { 2767 APInt Val = N1C->getAPIntValue(); 2768 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2769 Val <<= Val.getBitWidth()-FromBits; 2770 Val = Val.ashr(Val.getBitWidth()-FromBits); 2771 return getConstant(Val, VT); 2772 } 2773 break; 2774 } 2775 case ISD::EXTRACT_VECTOR_ELT: 2776 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2777 if (N1.getOpcode() == ISD::UNDEF) 2778 return getUNDEF(VT); 2779 2780 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2781 // expanding copies of large vectors from registers. 2782 if (N2C && 2783 N1.getOpcode() == ISD::CONCAT_VECTORS && 2784 N1.getNumOperands() > 0) { 2785 unsigned Factor = 2786 N1.getOperand(0).getValueType().getVectorNumElements(); 2787 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2788 N1.getOperand(N2C->getZExtValue() / Factor), 2789 getConstant(N2C->getZExtValue() % Factor, 2790 N2.getValueType())); 2791 } 2792 2793 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2794 // expanding large vector constants. 2795 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2796 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2797 EVT VEltTy = N1.getValueType().getVectorElementType(); 2798 if (Elt.getValueType() != VEltTy) { 2799 // If the vector element type is not legal, the BUILD_VECTOR operands 2800 // are promoted and implicitly truncated. Make that explicit here. 2801 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2802 } 2803 if (VT != VEltTy) { 2804 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2805 // result is implicitly extended. 2806 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2807 } 2808 return Elt; 2809 } 2810 2811 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2812 // operations are lowered to scalars. 2813 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2814 // If the indices are the same, return the inserted element else 2815 // if the indices are known different, extract the element from 2816 // the original vector. 2817 SDValue N1Op2 = N1.getOperand(2); 2818 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2819 2820 if (N1Op2C && N2C) { 2821 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2822 if (VT == N1.getOperand(1).getValueType()) 2823 return N1.getOperand(1); 2824 else 2825 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2826 } 2827 2828 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2829 } 2830 } 2831 break; 2832 case ISD::EXTRACT_ELEMENT: 2833 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2834 assert(!N1.getValueType().isVector() && !VT.isVector() && 2835 (N1.getValueType().isInteger() == VT.isInteger()) && 2836 "Wrong types for EXTRACT_ELEMENT!"); 2837 2838 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2839 // 64-bit integers into 32-bit parts. Instead of building the extract of 2840 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2841 if (N1.getOpcode() == ISD::BUILD_PAIR) 2842 return N1.getOperand(N2C->getZExtValue()); 2843 2844 // EXTRACT_ELEMENT of a constant int is also very common. 2845 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2846 unsigned ElementSize = VT.getSizeInBits(); 2847 unsigned Shift = ElementSize * N2C->getZExtValue(); 2848 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2849 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2850 } 2851 break; 2852 case ISD::EXTRACT_SUBVECTOR: 2853 if (N1.getValueType() == VT) // Trivial extraction. 2854 return N1; 2855 break; 2856 } 2857 2858 if (N1C) { 2859 if (N2C) { 2860 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2861 if (SV.getNode()) return SV; 2862 } else { // Cannonicalize constant to RHS if commutative 2863 if (isCommutativeBinOp(Opcode)) { 2864 std::swap(N1C, N2C); 2865 std::swap(N1, N2); 2866 } 2867 } 2868 } 2869 2870 // Constant fold FP operations. 2871 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2872 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2873 if (N1CFP) { 2874 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2875 // Cannonicalize constant to RHS if commutative 2876 std::swap(N1CFP, N2CFP); 2877 std::swap(N1, N2); 2878 } else if (N2CFP && VT != MVT::ppcf128) { 2879 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2880 APFloat::opStatus s; 2881 switch (Opcode) { 2882 case ISD::FADD: 2883 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2884 if (s != APFloat::opInvalidOp) 2885 return getConstantFP(V1, VT); 2886 break; 2887 case ISD::FSUB: 2888 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2889 if (s!=APFloat::opInvalidOp) 2890 return getConstantFP(V1, VT); 2891 break; 2892 case ISD::FMUL: 2893 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2894 if (s!=APFloat::opInvalidOp) 2895 return getConstantFP(V1, VT); 2896 break; 2897 case ISD::FDIV: 2898 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2899 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2900 return getConstantFP(V1, VT); 2901 break; 2902 case ISD::FREM : 2903 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2904 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2905 return getConstantFP(V1, VT); 2906 break; 2907 case ISD::FCOPYSIGN: 2908 V1.copySign(V2); 2909 return getConstantFP(V1, VT); 2910 default: break; 2911 } 2912 } 2913 } 2914 2915 // Canonicalize an UNDEF to the RHS, even over a constant. 2916 if (N1.getOpcode() == ISD::UNDEF) { 2917 if (isCommutativeBinOp(Opcode)) { 2918 std::swap(N1, N2); 2919 } else { 2920 switch (Opcode) { 2921 case ISD::FP_ROUND_INREG: 2922 case ISD::SIGN_EXTEND_INREG: 2923 case ISD::SUB: 2924 case ISD::FSUB: 2925 case ISD::FDIV: 2926 case ISD::FREM: 2927 case ISD::SRA: 2928 return N1; // fold op(undef, arg2) -> undef 2929 case ISD::UDIV: 2930 case ISD::SDIV: 2931 case ISD::UREM: 2932 case ISD::SREM: 2933 case ISD::SRL: 2934 case ISD::SHL: 2935 if (!VT.isVector()) 2936 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2937 // For vectors, we can't easily build an all zero vector, just return 2938 // the LHS. 2939 return N2; 2940 } 2941 } 2942 } 2943 2944 // Fold a bunch of operators when the RHS is undef. 2945 if (N2.getOpcode() == ISD::UNDEF) { 2946 switch (Opcode) { 2947 case ISD::XOR: 2948 if (N1.getOpcode() == ISD::UNDEF) 2949 // Handle undef ^ undef -> 0 special case. This is a common 2950 // idiom (misuse). 2951 return getConstant(0, VT); 2952 // fallthrough 2953 case ISD::ADD: 2954 case ISD::ADDC: 2955 case ISD::ADDE: 2956 case ISD::SUB: 2957 case ISD::UDIV: 2958 case ISD::SDIV: 2959 case ISD::UREM: 2960 case ISD::SREM: 2961 return N2; // fold op(arg1, undef) -> undef 2962 case ISD::FADD: 2963 case ISD::FSUB: 2964 case ISD::FMUL: 2965 case ISD::FDIV: 2966 case ISD::FREM: 2967 if (UnsafeFPMath) 2968 return N2; 2969 break; 2970 case ISD::MUL: 2971 case ISD::AND: 2972 case ISD::SRL: 2973 case ISD::SHL: 2974 if (!VT.isVector()) 2975 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2976 // For vectors, we can't easily build an all zero vector, just return 2977 // the LHS. 2978 return N1; 2979 case ISD::OR: 2980 if (!VT.isVector()) 2981 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2982 // For vectors, we can't easily build an all one vector, just return 2983 // the LHS. 2984 return N1; 2985 case ISD::SRA: 2986 return N1; 2987 } 2988 } 2989 2990 // Memoize this node if possible. 2991 SDNode *N; 2992 SDVTList VTs = getVTList(VT); 2993 if (VT != MVT::Flag) { 2994 SDValue Ops[] = { N1, N2 }; 2995 FoldingSetNodeID ID; 2996 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2997 void *IP = 0; 2998 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2999 return SDValue(E, 0); 3000 3001 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3002 CSEMap.InsertNode(N, IP); 3003 } else { 3004 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3005 } 3006 3007 AllNodes.push_back(N); 3008#ifndef NDEBUG 3009 VerifyNode(N); 3010#endif 3011 return SDValue(N, 0); 3012} 3013 3014SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3015 SDValue N1, SDValue N2, SDValue N3) { 3016 // Perform various simplifications. 3017 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3018 switch (Opcode) { 3019 case ISD::CONCAT_VECTORS: 3020 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3021 // one big BUILD_VECTOR. 3022 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3023 N2.getOpcode() == ISD::BUILD_VECTOR && 3024 N3.getOpcode() == ISD::BUILD_VECTOR) { 3025 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3026 N1.getNode()->op_end()); 3027 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3028 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3029 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3030 } 3031 break; 3032 case ISD::SETCC: { 3033 // Use FoldSetCC to simplify SETCC's. 3034 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3035 if (Simp.getNode()) return Simp; 3036 break; 3037 } 3038 case ISD::SELECT: 3039 if (N1C) { 3040 if (N1C->getZExtValue()) 3041 return N2; // select true, X, Y -> X 3042 else 3043 return N3; // select false, X, Y -> Y 3044 } 3045 3046 if (N2 == N3) return N2; // select C, X, X -> X 3047 break; 3048 case ISD::VECTOR_SHUFFLE: 3049 llvm_unreachable("should use getVectorShuffle constructor!"); 3050 break; 3051 case ISD::BIT_CONVERT: 3052 // Fold bit_convert nodes from a type to themselves. 3053 if (N1.getValueType() == VT) 3054 return N1; 3055 break; 3056 } 3057 3058 // Memoize node if it doesn't produce a flag. 3059 SDNode *N; 3060 SDVTList VTs = getVTList(VT); 3061 if (VT != MVT::Flag) { 3062 SDValue Ops[] = { N1, N2, N3 }; 3063 FoldingSetNodeID ID; 3064 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3065 void *IP = 0; 3066 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3067 return SDValue(E, 0); 3068 3069 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3070 CSEMap.InsertNode(N, IP); 3071 } else { 3072 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3073 } 3074 3075 AllNodes.push_back(N); 3076#ifndef NDEBUG 3077 VerifyNode(N); 3078#endif 3079 return SDValue(N, 0); 3080} 3081 3082SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3083 SDValue N1, SDValue N2, SDValue N3, 3084 SDValue N4) { 3085 SDValue Ops[] = { N1, N2, N3, N4 }; 3086 return getNode(Opcode, DL, VT, Ops, 4); 3087} 3088 3089SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3090 SDValue N1, SDValue N2, SDValue N3, 3091 SDValue N4, SDValue N5) { 3092 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3093 return getNode(Opcode, DL, VT, Ops, 5); 3094} 3095 3096/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3097/// the incoming stack arguments to be loaded from the stack. 3098SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3099 SmallVector<SDValue, 8> ArgChains; 3100 3101 // Include the original chain at the beginning of the list. When this is 3102 // used by target LowerCall hooks, this helps legalize find the 3103 // CALLSEQ_BEGIN node. 3104 ArgChains.push_back(Chain); 3105 3106 // Add a chain value for each stack argument. 3107 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3108 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3109 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3110 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3111 if (FI->getIndex() < 0) 3112 ArgChains.push_back(SDValue(L, 1)); 3113 3114 // Build a tokenfactor for all the chains. 3115 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3116 &ArgChains[0], ArgChains.size()); 3117} 3118 3119/// getMemsetValue - Vectorized representation of the memset value 3120/// operand. 3121static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3122 DebugLoc dl) { 3123 assert(Value.getOpcode() != ISD::UNDEF); 3124 3125 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3126 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3127 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3128 unsigned Shift = 8; 3129 for (unsigned i = NumBits; i > 8; i >>= 1) { 3130 Val = (Val << Shift) | Val; 3131 Shift <<= 1; 3132 } 3133 if (VT.isInteger()) 3134 return DAG.getConstant(Val, VT); 3135 return DAG.getConstantFP(APFloat(Val), VT); 3136 } 3137 3138 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3139 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3140 unsigned Shift = 8; 3141 for (unsigned i = NumBits; i > 8; i >>= 1) { 3142 Value = DAG.getNode(ISD::OR, dl, VT, 3143 DAG.getNode(ISD::SHL, dl, VT, Value, 3144 DAG.getConstant(Shift, 3145 TLI.getShiftAmountTy())), 3146 Value); 3147 Shift <<= 1; 3148 } 3149 3150 return Value; 3151} 3152 3153/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3154/// used when a memcpy is turned into a memset when the source is a constant 3155/// string ptr. 3156static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3157 const TargetLowering &TLI, 3158 std::string &Str, unsigned Offset) { 3159 // Handle vector with all elements zero. 3160 if (Str.empty()) { 3161 if (VT.isInteger()) 3162 return DAG.getConstant(0, VT); 3163 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3164 VT.getSimpleVT().SimpleTy == MVT::f64) 3165 return DAG.getConstantFP(0.0, VT); 3166 else if (VT.isVector()) { 3167 unsigned NumElts = VT.getVectorNumElements(); 3168 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3169 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3170 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3171 EltVT, NumElts))); 3172 } else 3173 llvm_unreachable("Expected type!"); 3174 } 3175 3176 assert(!VT.isVector() && "Can't handle vector type here!"); 3177 unsigned NumBits = VT.getSizeInBits(); 3178 unsigned MSB = NumBits / 8; 3179 uint64_t Val = 0; 3180 if (TLI.isLittleEndian()) 3181 Offset = Offset + MSB - 1; 3182 for (unsigned i = 0; i != MSB; ++i) { 3183 Val = (Val << 8) | (unsigned char)Str[Offset]; 3184 Offset += TLI.isLittleEndian() ? -1 : 1; 3185 } 3186 return DAG.getConstant(Val, VT); 3187} 3188 3189/// getMemBasePlusOffset - Returns base and offset node for the 3190/// 3191static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3192 SelectionDAG &DAG) { 3193 EVT VT = Base.getValueType(); 3194 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3195 VT, Base, DAG.getConstant(Offset, VT)); 3196} 3197 3198/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3199/// 3200static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3201 unsigned SrcDelta = 0; 3202 GlobalAddressSDNode *G = NULL; 3203 if (Src.getOpcode() == ISD::GlobalAddress) 3204 G = cast<GlobalAddressSDNode>(Src); 3205 else if (Src.getOpcode() == ISD::ADD && 3206 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3207 Src.getOperand(1).getOpcode() == ISD::Constant) { 3208 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3209 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3210 } 3211 if (!G) 3212 return false; 3213 3214 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3215 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3216 return true; 3217 3218 return false; 3219} 3220 3221/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3222/// to replace the memset / memcpy. Return true if the number of memory ops 3223/// is below the threshold. It returns the types of the sequence of 3224/// memory ops to perform memset / memcpy by reference. 3225static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3226 unsigned Limit, uint64_t Size, 3227 unsigned DstAlign, unsigned SrcAlign, 3228 bool NonScalarIntSafe, 3229 bool MemcpyStrSrc, 3230 SelectionDAG &DAG, 3231 const TargetLowering &TLI) { 3232 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3233 "Expecting memcpy / memset source to meet alignment requirement!"); 3234 // If 'SrcAlign' is zero, that means the memory operation does not need load 3235 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3236 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3237 // specified alignment of the memory operation. If it is zero, that means 3238 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3239 // indicates whether the memcpy source is constant so it does not need to be 3240 // loaded. 3241 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3242 NonScalarIntSafe, MemcpyStrSrc, 3243 DAG.getMachineFunction()); 3244 3245 if (VT == MVT::Other) { 3246 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3247 TLI.allowsUnalignedMemoryAccesses(VT)) { 3248 VT = TLI.getPointerTy(); 3249 } else { 3250 switch (DstAlign & 7) { 3251 case 0: VT = MVT::i64; break; 3252 case 4: VT = MVT::i32; break; 3253 case 2: VT = MVT::i16; break; 3254 default: VT = MVT::i8; break; 3255 } 3256 } 3257 3258 MVT LVT = MVT::i64; 3259 while (!TLI.isTypeLegal(LVT)) 3260 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3261 assert(LVT.isInteger()); 3262 3263 if (VT.bitsGT(LVT)) 3264 VT = LVT; 3265 } 3266 3267 // If we're optimizing for size, and there is a limit, bump the maximum number 3268 // of operations inserted down to 4. This is a wild guess that approximates 3269 // the size of a call to memcpy or memset (3 arguments + call). 3270 if (Limit != ~0U) { 3271 const Function *F = DAG.getMachineFunction().getFunction(); 3272 if (F->hasFnAttr(Attribute::OptimizeForSize)) 3273 Limit = 4; 3274 } 3275 3276 unsigned NumMemOps = 0; 3277 while (Size != 0) { 3278 unsigned VTSize = VT.getSizeInBits() / 8; 3279 while (VTSize > Size) { 3280 // For now, only use non-vector load / store's for the left-over pieces. 3281 if (VT.isVector() || VT.isFloatingPoint()) { 3282 VT = MVT::i64; 3283 while (!TLI.isTypeLegal(VT)) 3284 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3285 VTSize = VT.getSizeInBits() / 8; 3286 } else { 3287 // This can result in a type that is not legal on the target, e.g. 3288 // 1 or 2 bytes on PPC. 3289 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3290 VTSize >>= 1; 3291 } 3292 } 3293 3294 if (++NumMemOps > Limit) 3295 return false; 3296 MemOps.push_back(VT); 3297 Size -= VTSize; 3298 } 3299 3300 return true; 3301} 3302 3303static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3304 SDValue Chain, SDValue Dst, 3305 SDValue Src, uint64_t Size, 3306 unsigned Align, bool isVol, 3307 bool AlwaysInline, 3308 const Value *DstSV, uint64_t DstSVOff, 3309 const Value *SrcSV, uint64_t SrcSVOff) { 3310 // Turn a memcpy of undef to nop. 3311 if (Src.getOpcode() == ISD::UNDEF) 3312 return Chain; 3313 3314 // Expand memcpy to a series of load and store ops if the size operand falls 3315 // below a certain threshold. 3316 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3317 std::vector<EVT> MemOps; 3318 bool DstAlignCanChange = false; 3319 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3320 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3321 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3322 DstAlignCanChange = true; 3323 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3324 if (Align > SrcAlign) 3325 SrcAlign = Align; 3326 std::string Str; 3327 bool CopyFromStr = isMemSrcFromString(Src, Str); 3328 bool isZeroStr = CopyFromStr && Str.empty(); 3329 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(); 3330 3331 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3332 (DstAlignCanChange ? 0 : Align), 3333 (isZeroStr ? 0 : SrcAlign), 3334 true, CopyFromStr, DAG, TLI)) 3335 return SDValue(); 3336 3337 if (DstAlignCanChange) { 3338 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3339 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3340 if (NewAlign > Align) { 3341 // Give the stack frame object a larger alignment if needed. 3342 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3343 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3344 Align = NewAlign; 3345 } 3346 } 3347 3348 SmallVector<SDValue, 8> OutChains; 3349 unsigned NumMemOps = MemOps.size(); 3350 uint64_t SrcOff = 0, DstOff = 0; 3351 for (unsigned i = 0; i != NumMemOps; ++i) { 3352 EVT VT = MemOps[i]; 3353 unsigned VTSize = VT.getSizeInBits() / 8; 3354 SDValue Value, Store; 3355 3356 if (CopyFromStr && 3357 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3358 // It's unlikely a store of a vector immediate can be done in a single 3359 // instruction. It would require a load from a constantpool first. 3360 // We only handle zero vectors here. 3361 // FIXME: Handle other cases where store of vector immediate is done in 3362 // a single instruction. 3363 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3364 Store = DAG.getStore(Chain, dl, Value, 3365 getMemBasePlusOffset(Dst, DstOff, DAG), 3366 DstSV, DstSVOff + DstOff, isVol, false, Align); 3367 } else { 3368 // The type might not be legal for the target. This should only happen 3369 // if the type is smaller than a legal type, as on PPC, so the right 3370 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3371 // to Load/Store if NVT==VT. 3372 // FIXME does the case above also need this? 3373 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3374 assert(NVT.bitsGE(VT)); 3375 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain, 3376 getMemBasePlusOffset(Src, SrcOff, DAG), 3377 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3378 MinAlign(SrcAlign, SrcOff)); 3379 Store = DAG.getTruncStore(Chain, dl, Value, 3380 getMemBasePlusOffset(Dst, DstOff, DAG), 3381 DstSV, DstSVOff + DstOff, VT, isVol, false, 3382 Align); 3383 } 3384 OutChains.push_back(Store); 3385 SrcOff += VTSize; 3386 DstOff += VTSize; 3387 } 3388 3389 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3390 &OutChains[0], OutChains.size()); 3391} 3392 3393static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3394 SDValue Chain, SDValue Dst, 3395 SDValue Src, uint64_t Size, 3396 unsigned Align, bool isVol, 3397 bool AlwaysInline, 3398 const Value *DstSV, uint64_t DstSVOff, 3399 const Value *SrcSV, uint64_t SrcSVOff) { 3400 // Turn a memmove of undef to nop. 3401 if (Src.getOpcode() == ISD::UNDEF) 3402 return Chain; 3403 3404 // Expand memmove to a series of load and store ops if the size operand falls 3405 // below a certain threshold. 3406 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3407 std::vector<EVT> MemOps; 3408 bool DstAlignCanChange = false; 3409 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3410 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3411 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3412 DstAlignCanChange = true; 3413 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3414 if (Align > SrcAlign) 3415 SrcAlign = Align; 3416 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(); 3417 3418 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3419 (DstAlignCanChange ? 0 : Align), 3420 SrcAlign, true, false, DAG, TLI)) 3421 return SDValue(); 3422 3423 if (DstAlignCanChange) { 3424 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3425 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3426 if (NewAlign > Align) { 3427 // Give the stack frame object a larger alignment if needed. 3428 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3429 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3430 Align = NewAlign; 3431 } 3432 } 3433 3434 uint64_t SrcOff = 0, DstOff = 0; 3435 SmallVector<SDValue, 8> LoadValues; 3436 SmallVector<SDValue, 8> LoadChains; 3437 SmallVector<SDValue, 8> OutChains; 3438 unsigned NumMemOps = MemOps.size(); 3439 for (unsigned i = 0; i < NumMemOps; i++) { 3440 EVT VT = MemOps[i]; 3441 unsigned VTSize = VT.getSizeInBits() / 8; 3442 SDValue Value, Store; 3443 3444 Value = DAG.getLoad(VT, dl, Chain, 3445 getMemBasePlusOffset(Src, SrcOff, DAG), 3446 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3447 LoadValues.push_back(Value); 3448 LoadChains.push_back(Value.getValue(1)); 3449 SrcOff += VTSize; 3450 } 3451 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3452 &LoadChains[0], LoadChains.size()); 3453 OutChains.clear(); 3454 for (unsigned i = 0; i < NumMemOps; i++) { 3455 EVT VT = MemOps[i]; 3456 unsigned VTSize = VT.getSizeInBits() / 8; 3457 SDValue Value, Store; 3458 3459 Store = DAG.getStore(Chain, dl, LoadValues[i], 3460 getMemBasePlusOffset(Dst, DstOff, DAG), 3461 DstSV, DstSVOff + DstOff, isVol, false, Align); 3462 OutChains.push_back(Store); 3463 DstOff += VTSize; 3464 } 3465 3466 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3467 &OutChains[0], OutChains.size()); 3468} 3469 3470static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3471 SDValue Chain, SDValue Dst, 3472 SDValue Src, uint64_t Size, 3473 unsigned Align, bool isVol, 3474 const Value *DstSV, uint64_t DstSVOff) { 3475 // Turn a memset of undef to nop. 3476 if (Src.getOpcode() == ISD::UNDEF) 3477 return Chain; 3478 3479 // Expand memset to a series of load/store ops if the size operand 3480 // falls below a certain threshold. 3481 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3482 std::vector<EVT> MemOps; 3483 bool DstAlignCanChange = false; 3484 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3485 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3486 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3487 DstAlignCanChange = true; 3488 bool NonScalarIntSafe = 3489 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3490 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3491 Size, (DstAlignCanChange ? 0 : Align), 0, 3492 NonScalarIntSafe, false, DAG, TLI)) 3493 return SDValue(); 3494 3495 if (DstAlignCanChange) { 3496 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3497 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3498 if (NewAlign > Align) { 3499 // Give the stack frame object a larger alignment if needed. 3500 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3501 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3502 Align = NewAlign; 3503 } 3504 } 3505 3506 SmallVector<SDValue, 8> OutChains; 3507 uint64_t DstOff = 0; 3508 unsigned NumMemOps = MemOps.size(); 3509 for (unsigned i = 0; i < NumMemOps; i++) { 3510 EVT VT = MemOps[i]; 3511 unsigned VTSize = VT.getSizeInBits() / 8; 3512 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3513 SDValue Store = DAG.getStore(Chain, dl, Value, 3514 getMemBasePlusOffset(Dst, DstOff, DAG), 3515 DstSV, DstSVOff + DstOff, isVol, false, 0); 3516 OutChains.push_back(Store); 3517 DstOff += VTSize; 3518 } 3519 3520 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3521 &OutChains[0], OutChains.size()); 3522} 3523 3524SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3525 SDValue Src, SDValue Size, 3526 unsigned Align, bool isVol, bool AlwaysInline, 3527 const Value *DstSV, uint64_t DstSVOff, 3528 const Value *SrcSV, uint64_t SrcSVOff) { 3529 3530 // Check to see if we should lower the memcpy to loads and stores first. 3531 // For cases within the target-specified limits, this is the best choice. 3532 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3533 if (ConstantSize) { 3534 // Memcpy with size zero? Just return the original chain. 3535 if (ConstantSize->isNullValue()) 3536 return Chain; 3537 3538 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3539 ConstantSize->getZExtValue(),Align, 3540 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3541 if (Result.getNode()) 3542 return Result; 3543 } 3544 3545 // Then check to see if we should lower the memcpy with target-specific 3546 // code. If the target chooses to do this, this is the next best. 3547 SDValue Result = 3548 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3549 isVol, AlwaysInline, 3550 DstSV, DstSVOff, SrcSV, SrcSVOff); 3551 if (Result.getNode()) 3552 return Result; 3553 3554 // If we really need inline code and the target declined to provide it, 3555 // use a (potentially long) sequence of loads and stores. 3556 if (AlwaysInline) { 3557 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3558 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3559 ConstantSize->getZExtValue(), Align, isVol, 3560 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3561 } 3562 3563 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3564 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3565 // respect volatile, so they may do things like read or write memory 3566 // beyond the given memory regions. But fixing this isn't easy, and most 3567 // people don't care. 3568 3569 // Emit a library call. 3570 TargetLowering::ArgListTy Args; 3571 TargetLowering::ArgListEntry Entry; 3572 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3573 Entry.Node = Dst; Args.push_back(Entry); 3574 Entry.Node = Src; Args.push_back(Entry); 3575 Entry.Node = Size; Args.push_back(Entry); 3576 // FIXME: pass in DebugLoc 3577 std::pair<SDValue,SDValue> CallResult = 3578 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3579 false, false, false, false, 0, 3580 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3581 /*isReturnValueUsed=*/false, 3582 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3583 TLI.getPointerTy()), 3584 Args, *this, dl); 3585 return CallResult.second; 3586} 3587 3588SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3589 SDValue Src, SDValue Size, 3590 unsigned Align, bool isVol, 3591 const Value *DstSV, uint64_t DstSVOff, 3592 const Value *SrcSV, uint64_t SrcSVOff) { 3593 3594 // Check to see if we should lower the memmove to loads and stores first. 3595 // For cases within the target-specified limits, this is the best choice. 3596 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3597 if (ConstantSize) { 3598 // Memmove with size zero? Just return the original chain. 3599 if (ConstantSize->isNullValue()) 3600 return Chain; 3601 3602 SDValue Result = 3603 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3604 ConstantSize->getZExtValue(), Align, isVol, 3605 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3606 if (Result.getNode()) 3607 return Result; 3608 } 3609 3610 // Then check to see if we should lower the memmove with target-specific 3611 // code. If the target chooses to do this, this is the next best. 3612 SDValue Result = 3613 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3614 DstSV, DstSVOff, SrcSV, SrcSVOff); 3615 if (Result.getNode()) 3616 return Result; 3617 3618 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3619 // not be safe. See memcpy above for more details. 3620 3621 // Emit a library call. 3622 TargetLowering::ArgListTy Args; 3623 TargetLowering::ArgListEntry Entry; 3624 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3625 Entry.Node = Dst; Args.push_back(Entry); 3626 Entry.Node = Src; Args.push_back(Entry); 3627 Entry.Node = Size; Args.push_back(Entry); 3628 // FIXME: pass in DebugLoc 3629 std::pair<SDValue,SDValue> CallResult = 3630 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3631 false, false, false, false, 0, 3632 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3633 /*isReturnValueUsed=*/false, 3634 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3635 TLI.getPointerTy()), 3636 Args, *this, dl); 3637 return CallResult.second; 3638} 3639 3640SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3641 SDValue Src, SDValue Size, 3642 unsigned Align, bool isVol, 3643 const Value *DstSV, uint64_t DstSVOff) { 3644 3645 // Check to see if we should lower the memset to stores first. 3646 // For cases within the target-specified limits, this is the best choice. 3647 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3648 if (ConstantSize) { 3649 // Memset with size zero? Just return the original chain. 3650 if (ConstantSize->isNullValue()) 3651 return Chain; 3652 3653 SDValue Result = 3654 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3655 Align, isVol, DstSV, DstSVOff); 3656 3657 if (Result.getNode()) 3658 return Result; 3659 } 3660 3661 // Then check to see if we should lower the memset with target-specific 3662 // code. If the target chooses to do this, this is the next best. 3663 SDValue Result = 3664 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3665 DstSV, DstSVOff); 3666 if (Result.getNode()) 3667 return Result; 3668 3669 // Emit a library call. 3670 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3671 TargetLowering::ArgListTy Args; 3672 TargetLowering::ArgListEntry Entry; 3673 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3674 Args.push_back(Entry); 3675 // Extend or truncate the argument to be an i32 value for the call. 3676 if (Src.getValueType().bitsGT(MVT::i32)) 3677 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3678 else 3679 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3680 Entry.Node = Src; 3681 Entry.Ty = Type::getInt32Ty(*getContext()); 3682 Entry.isSExt = true; 3683 Args.push_back(Entry); 3684 Entry.Node = Size; 3685 Entry.Ty = IntPtrTy; 3686 Entry.isSExt = false; 3687 Args.push_back(Entry); 3688 // FIXME: pass in DebugLoc 3689 std::pair<SDValue,SDValue> CallResult = 3690 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3691 false, false, false, false, 0, 3692 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3693 /*isReturnValueUsed=*/false, 3694 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3695 TLI.getPointerTy()), 3696 Args, *this, dl); 3697 return CallResult.second; 3698} 3699 3700SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3701 SDValue Chain, 3702 SDValue Ptr, SDValue Cmp, 3703 SDValue Swp, const Value* PtrVal, 3704 unsigned Alignment) { 3705 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3706 Alignment = getEVTAlignment(MemVT); 3707 3708 // Check if the memory reference references a frame index 3709 if (!PtrVal) 3710 if (const FrameIndexSDNode *FI = 3711 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3712 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3713 3714 MachineFunction &MF = getMachineFunction(); 3715 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3716 3717 // For now, atomics are considered to be volatile always. 3718 Flags |= MachineMemOperand::MOVolatile; 3719 3720 MachineMemOperand *MMO = 3721 MF.getMachineMemOperand(PtrVal, Flags, 0, 3722 MemVT.getStoreSize(), Alignment); 3723 3724 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3725} 3726 3727SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3728 SDValue Chain, 3729 SDValue Ptr, SDValue Cmp, 3730 SDValue Swp, MachineMemOperand *MMO) { 3731 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3732 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3733 3734 EVT VT = Cmp.getValueType(); 3735 3736 SDVTList VTs = getVTList(VT, MVT::Other); 3737 FoldingSetNodeID ID; 3738 ID.AddInteger(MemVT.getRawBits()); 3739 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3740 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3741 void* IP = 0; 3742 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3743 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3744 return SDValue(E, 0); 3745 } 3746 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3747 Ptr, Cmp, Swp, MMO); 3748 CSEMap.InsertNode(N, IP); 3749 AllNodes.push_back(N); 3750 return SDValue(N, 0); 3751} 3752 3753SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3754 SDValue Chain, 3755 SDValue Ptr, SDValue Val, 3756 const Value* PtrVal, 3757 unsigned Alignment) { 3758 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3759 Alignment = getEVTAlignment(MemVT); 3760 3761 // Check if the memory reference references a frame index 3762 if (!PtrVal) 3763 if (const FrameIndexSDNode *FI = 3764 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3765 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3766 3767 MachineFunction &MF = getMachineFunction(); 3768 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3769 3770 // For now, atomics are considered to be volatile always. 3771 Flags |= MachineMemOperand::MOVolatile; 3772 3773 MachineMemOperand *MMO = 3774 MF.getMachineMemOperand(PtrVal, Flags, 0, 3775 MemVT.getStoreSize(), Alignment); 3776 3777 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3778} 3779 3780SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3781 SDValue Chain, 3782 SDValue Ptr, SDValue Val, 3783 MachineMemOperand *MMO) { 3784 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3785 Opcode == ISD::ATOMIC_LOAD_SUB || 3786 Opcode == ISD::ATOMIC_LOAD_AND || 3787 Opcode == ISD::ATOMIC_LOAD_OR || 3788 Opcode == ISD::ATOMIC_LOAD_XOR || 3789 Opcode == ISD::ATOMIC_LOAD_NAND || 3790 Opcode == ISD::ATOMIC_LOAD_MIN || 3791 Opcode == ISD::ATOMIC_LOAD_MAX || 3792 Opcode == ISD::ATOMIC_LOAD_UMIN || 3793 Opcode == ISD::ATOMIC_LOAD_UMAX || 3794 Opcode == ISD::ATOMIC_SWAP) && 3795 "Invalid Atomic Op"); 3796 3797 EVT VT = Val.getValueType(); 3798 3799 SDVTList VTs = getVTList(VT, MVT::Other); 3800 FoldingSetNodeID ID; 3801 ID.AddInteger(MemVT.getRawBits()); 3802 SDValue Ops[] = {Chain, Ptr, Val}; 3803 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3804 void* IP = 0; 3805 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3806 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3807 return SDValue(E, 0); 3808 } 3809 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3810 Ptr, Val, MMO); 3811 CSEMap.InsertNode(N, IP); 3812 AllNodes.push_back(N); 3813 return SDValue(N, 0); 3814} 3815 3816/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3817/// Allowed to return something different (and simpler) if Simplify is true. 3818SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3819 DebugLoc dl) { 3820 if (NumOps == 1) 3821 return Ops[0]; 3822 3823 SmallVector<EVT, 4> VTs; 3824 VTs.reserve(NumOps); 3825 for (unsigned i = 0; i < NumOps; ++i) 3826 VTs.push_back(Ops[i].getValueType()); 3827 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3828 Ops, NumOps); 3829} 3830 3831SDValue 3832SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3833 const EVT *VTs, unsigned NumVTs, 3834 const SDValue *Ops, unsigned NumOps, 3835 EVT MemVT, const Value *srcValue, int SVOff, 3836 unsigned Align, bool Vol, 3837 bool ReadMem, bool WriteMem) { 3838 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3839 MemVT, srcValue, SVOff, Align, Vol, 3840 ReadMem, WriteMem); 3841} 3842 3843SDValue 3844SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3845 const SDValue *Ops, unsigned NumOps, 3846 EVT MemVT, const Value *srcValue, int SVOff, 3847 unsigned Align, bool Vol, 3848 bool ReadMem, bool WriteMem) { 3849 if (Align == 0) // Ensure that codegen never sees alignment 0 3850 Align = getEVTAlignment(MemVT); 3851 3852 MachineFunction &MF = getMachineFunction(); 3853 unsigned Flags = 0; 3854 if (WriteMem) 3855 Flags |= MachineMemOperand::MOStore; 3856 if (ReadMem) 3857 Flags |= MachineMemOperand::MOLoad; 3858 if (Vol) 3859 Flags |= MachineMemOperand::MOVolatile; 3860 MachineMemOperand *MMO = 3861 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3862 MemVT.getStoreSize(), Align); 3863 3864 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3865} 3866 3867SDValue 3868SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3869 const SDValue *Ops, unsigned NumOps, 3870 EVT MemVT, MachineMemOperand *MMO) { 3871 assert((Opcode == ISD::INTRINSIC_VOID || 3872 Opcode == ISD::INTRINSIC_W_CHAIN || 3873 (Opcode <= INT_MAX && 3874 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3875 "Opcode is not a memory-accessing opcode!"); 3876 3877 // Memoize the node unless it returns a flag. 3878 MemIntrinsicSDNode *N; 3879 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3880 FoldingSetNodeID ID; 3881 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3882 void *IP = 0; 3883 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3884 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3885 return SDValue(E, 0); 3886 } 3887 3888 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3889 MemVT, MMO); 3890 CSEMap.InsertNode(N, IP); 3891 } else { 3892 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3893 MemVT, MMO); 3894 } 3895 AllNodes.push_back(N); 3896 return SDValue(N, 0); 3897} 3898 3899SDValue 3900SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3901 EVT VT, DebugLoc dl, SDValue Chain, 3902 SDValue Ptr, SDValue Offset, 3903 const Value *SV, int SVOffset, EVT MemVT, 3904 bool isVolatile, bool isNonTemporal, 3905 unsigned Alignment) { 3906 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3907 Alignment = getEVTAlignment(VT); 3908 3909 // Check if the memory reference references a frame index 3910 if (!SV) 3911 if (const FrameIndexSDNode *FI = 3912 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3913 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3914 3915 MachineFunction &MF = getMachineFunction(); 3916 unsigned Flags = MachineMemOperand::MOLoad; 3917 if (isVolatile) 3918 Flags |= MachineMemOperand::MOVolatile; 3919 if (isNonTemporal) 3920 Flags |= MachineMemOperand::MONonTemporal; 3921 MachineMemOperand *MMO = 3922 MF.getMachineMemOperand(SV, Flags, SVOffset, 3923 MemVT.getStoreSize(), Alignment); 3924 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 3925} 3926 3927SDValue 3928SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3929 EVT VT, DebugLoc dl, SDValue Chain, 3930 SDValue Ptr, SDValue Offset, EVT MemVT, 3931 MachineMemOperand *MMO) { 3932 if (VT == MemVT) { 3933 ExtType = ISD::NON_EXTLOAD; 3934 } else if (ExtType == ISD::NON_EXTLOAD) { 3935 assert(VT == MemVT && "Non-extending load from different memory type!"); 3936 } else { 3937 // Extending load. 3938 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3939 "Should only be an extending load, not truncating!"); 3940 assert(VT.isInteger() == MemVT.isInteger() && 3941 "Cannot convert from FP to Int or Int -> FP!"); 3942 assert(VT.isVector() == MemVT.isVector() && 3943 "Cannot use trunc store to convert to or from a vector!"); 3944 assert((!VT.isVector() || 3945 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3946 "Cannot use trunc store to change the number of vector elements!"); 3947 } 3948 3949 bool Indexed = AM != ISD::UNINDEXED; 3950 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3951 "Unindexed load with an offset!"); 3952 3953 SDVTList VTs = Indexed ? 3954 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3955 SDValue Ops[] = { Chain, Ptr, Offset }; 3956 FoldingSetNodeID ID; 3957 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3958 ID.AddInteger(MemVT.getRawBits()); 3959 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3960 MMO->isNonTemporal())); 3961 void *IP = 0; 3962 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3963 cast<LoadSDNode>(E)->refineAlignment(MMO); 3964 return SDValue(E, 0); 3965 } 3966 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3967 MemVT, MMO); 3968 CSEMap.InsertNode(N, IP); 3969 AllNodes.push_back(N); 3970 return SDValue(N, 0); 3971} 3972 3973SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3974 SDValue Chain, SDValue Ptr, 3975 const Value *SV, int SVOffset, 3976 bool isVolatile, bool isNonTemporal, 3977 unsigned Alignment) { 3978 SDValue Undef = getUNDEF(Ptr.getValueType()); 3979 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 3980 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3981} 3982 3983SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl, 3984 SDValue Chain, SDValue Ptr, 3985 const Value *SV, 3986 int SVOffset, EVT MemVT, 3987 bool isVolatile, bool isNonTemporal, 3988 unsigned Alignment) { 3989 SDValue Undef = getUNDEF(Ptr.getValueType()); 3990 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 3991 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3992} 3993 3994SDValue 3995SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3996 SDValue Offset, ISD::MemIndexedMode AM) { 3997 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3998 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3999 "Load is already a indexed load!"); 4000 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4001 LD->getChain(), Base, Offset, LD->getSrcValue(), 4002 LD->getSrcValueOffset(), LD->getMemoryVT(), 4003 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4004} 4005 4006SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4007 SDValue Ptr, const Value *SV, int SVOffset, 4008 bool isVolatile, bool isNonTemporal, 4009 unsigned Alignment) { 4010 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4011 Alignment = getEVTAlignment(Val.getValueType()); 4012 4013 // Check if the memory reference references a frame index 4014 if (!SV) 4015 if (const FrameIndexSDNode *FI = 4016 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4017 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4018 4019 MachineFunction &MF = getMachineFunction(); 4020 unsigned Flags = MachineMemOperand::MOStore; 4021 if (isVolatile) 4022 Flags |= MachineMemOperand::MOVolatile; 4023 if (isNonTemporal) 4024 Flags |= MachineMemOperand::MONonTemporal; 4025 MachineMemOperand *MMO = 4026 MF.getMachineMemOperand(SV, Flags, SVOffset, 4027 Val.getValueType().getStoreSize(), Alignment); 4028 4029 return getStore(Chain, dl, Val, Ptr, MMO); 4030} 4031 4032SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4033 SDValue Ptr, MachineMemOperand *MMO) { 4034 EVT VT = Val.getValueType(); 4035 SDVTList VTs = getVTList(MVT::Other); 4036 SDValue Undef = getUNDEF(Ptr.getValueType()); 4037 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4038 FoldingSetNodeID ID; 4039 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4040 ID.AddInteger(VT.getRawBits()); 4041 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4042 MMO->isNonTemporal())); 4043 void *IP = 0; 4044 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4045 cast<StoreSDNode>(E)->refineAlignment(MMO); 4046 return SDValue(E, 0); 4047 } 4048 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4049 false, VT, MMO); 4050 CSEMap.InsertNode(N, IP); 4051 AllNodes.push_back(N); 4052 return SDValue(N, 0); 4053} 4054 4055SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4056 SDValue Ptr, const Value *SV, 4057 int SVOffset, EVT SVT, 4058 bool isVolatile, bool isNonTemporal, 4059 unsigned Alignment) { 4060 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4061 Alignment = getEVTAlignment(SVT); 4062 4063 // Check if the memory reference references a frame index 4064 if (!SV) 4065 if (const FrameIndexSDNode *FI = 4066 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4067 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4068 4069 MachineFunction &MF = getMachineFunction(); 4070 unsigned Flags = MachineMemOperand::MOStore; 4071 if (isVolatile) 4072 Flags |= MachineMemOperand::MOVolatile; 4073 if (isNonTemporal) 4074 Flags |= MachineMemOperand::MONonTemporal; 4075 MachineMemOperand *MMO = 4076 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4077 4078 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4079} 4080 4081SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4082 SDValue Ptr, EVT SVT, 4083 MachineMemOperand *MMO) { 4084 EVT VT = Val.getValueType(); 4085 4086 if (VT == SVT) 4087 return getStore(Chain, dl, Val, Ptr, MMO); 4088 4089 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4090 "Should only be a truncating store, not extending!"); 4091 assert(VT.isInteger() == SVT.isInteger() && 4092 "Can't do FP-INT conversion!"); 4093 assert(VT.isVector() == SVT.isVector() && 4094 "Cannot use trunc store to convert to or from a vector!"); 4095 assert((!VT.isVector() || 4096 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4097 "Cannot use trunc store to change the number of vector elements!"); 4098 4099 SDVTList VTs = getVTList(MVT::Other); 4100 SDValue Undef = getUNDEF(Ptr.getValueType()); 4101 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4102 FoldingSetNodeID ID; 4103 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4104 ID.AddInteger(SVT.getRawBits()); 4105 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4106 MMO->isNonTemporal())); 4107 void *IP = 0; 4108 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4109 cast<StoreSDNode>(E)->refineAlignment(MMO); 4110 return SDValue(E, 0); 4111 } 4112 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4113 true, SVT, MMO); 4114 CSEMap.InsertNode(N, IP); 4115 AllNodes.push_back(N); 4116 return SDValue(N, 0); 4117} 4118 4119SDValue 4120SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4121 SDValue Offset, ISD::MemIndexedMode AM) { 4122 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4123 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4124 "Store is already a indexed store!"); 4125 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4126 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4127 FoldingSetNodeID ID; 4128 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4129 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4130 ID.AddInteger(ST->getRawSubclassData()); 4131 void *IP = 0; 4132 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4133 return SDValue(E, 0); 4134 4135 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4136 ST->isTruncatingStore(), 4137 ST->getMemoryVT(), 4138 ST->getMemOperand()); 4139 CSEMap.InsertNode(N, IP); 4140 AllNodes.push_back(N); 4141 return SDValue(N, 0); 4142} 4143 4144SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4145 SDValue Chain, SDValue Ptr, 4146 SDValue SV, 4147 unsigned Align) { 4148 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4149 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4150} 4151 4152SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4153 const SDUse *Ops, unsigned NumOps) { 4154 switch (NumOps) { 4155 case 0: return getNode(Opcode, DL, VT); 4156 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4157 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4158 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4159 default: break; 4160 } 4161 4162 // Copy from an SDUse array into an SDValue array for use with 4163 // the regular getNode logic. 4164 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4165 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4166} 4167 4168SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4169 const SDValue *Ops, unsigned NumOps) { 4170 switch (NumOps) { 4171 case 0: return getNode(Opcode, DL, VT); 4172 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4173 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4174 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4175 default: break; 4176 } 4177 4178 switch (Opcode) { 4179 default: break; 4180 case ISD::SELECT_CC: { 4181 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4182 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4183 "LHS and RHS of condition must have same type!"); 4184 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4185 "True and False arms of SelectCC must have same type!"); 4186 assert(Ops[2].getValueType() == VT && 4187 "select_cc node must be of same type as true and false value!"); 4188 break; 4189 } 4190 case ISD::BR_CC: { 4191 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4192 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4193 "LHS/RHS of comparison should match types!"); 4194 break; 4195 } 4196 } 4197 4198 // Memoize nodes. 4199 SDNode *N; 4200 SDVTList VTs = getVTList(VT); 4201 4202 if (VT != MVT::Flag) { 4203 FoldingSetNodeID ID; 4204 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4205 void *IP = 0; 4206 4207 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4208 return SDValue(E, 0); 4209 4210 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4211 CSEMap.InsertNode(N, IP); 4212 } else { 4213 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4214 } 4215 4216 AllNodes.push_back(N); 4217#ifndef NDEBUG 4218 VerifyNode(N); 4219#endif 4220 return SDValue(N, 0); 4221} 4222 4223SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4224 const std::vector<EVT> &ResultTys, 4225 const SDValue *Ops, unsigned NumOps) { 4226 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4227 Ops, NumOps); 4228} 4229 4230SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4231 const EVT *VTs, unsigned NumVTs, 4232 const SDValue *Ops, unsigned NumOps) { 4233 if (NumVTs == 1) 4234 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4235 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4236} 4237 4238SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4239 const SDValue *Ops, unsigned NumOps) { 4240 if (VTList.NumVTs == 1) 4241 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4242 4243#if 0 4244 switch (Opcode) { 4245 // FIXME: figure out how to safely handle things like 4246 // int foo(int x) { return 1 << (x & 255); } 4247 // int bar() { return foo(256); } 4248 case ISD::SRA_PARTS: 4249 case ISD::SRL_PARTS: 4250 case ISD::SHL_PARTS: 4251 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4252 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4253 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4254 else if (N3.getOpcode() == ISD::AND) 4255 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4256 // If the and is only masking out bits that cannot effect the shift, 4257 // eliminate the and. 4258 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4259 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4260 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4261 } 4262 break; 4263 } 4264#endif 4265 4266 // Memoize the node unless it returns a flag. 4267 SDNode *N; 4268 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4269 FoldingSetNodeID ID; 4270 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4271 void *IP = 0; 4272 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4273 return SDValue(E, 0); 4274 4275 if (NumOps == 1) { 4276 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4277 } else if (NumOps == 2) { 4278 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4279 } else if (NumOps == 3) { 4280 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4281 Ops[2]); 4282 } else { 4283 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4284 } 4285 CSEMap.InsertNode(N, IP); 4286 } else { 4287 if (NumOps == 1) { 4288 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4289 } else if (NumOps == 2) { 4290 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4291 } else if (NumOps == 3) { 4292 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4293 Ops[2]); 4294 } else { 4295 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4296 } 4297 } 4298 AllNodes.push_back(N); 4299#ifndef NDEBUG 4300 VerifyNode(N); 4301#endif 4302 return SDValue(N, 0); 4303} 4304 4305SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4306 return getNode(Opcode, DL, VTList, 0, 0); 4307} 4308 4309SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4310 SDValue N1) { 4311 SDValue Ops[] = { N1 }; 4312 return getNode(Opcode, DL, VTList, Ops, 1); 4313} 4314 4315SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4316 SDValue N1, SDValue N2) { 4317 SDValue Ops[] = { N1, N2 }; 4318 return getNode(Opcode, DL, VTList, Ops, 2); 4319} 4320 4321SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4322 SDValue N1, SDValue N2, SDValue N3) { 4323 SDValue Ops[] = { N1, N2, N3 }; 4324 return getNode(Opcode, DL, VTList, Ops, 3); 4325} 4326 4327SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4328 SDValue N1, SDValue N2, SDValue N3, 4329 SDValue N4) { 4330 SDValue Ops[] = { N1, N2, N3, N4 }; 4331 return getNode(Opcode, DL, VTList, Ops, 4); 4332} 4333 4334SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4335 SDValue N1, SDValue N2, SDValue N3, 4336 SDValue N4, SDValue N5) { 4337 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4338 return getNode(Opcode, DL, VTList, Ops, 5); 4339} 4340 4341SDVTList SelectionDAG::getVTList(EVT VT) { 4342 return makeVTList(SDNode::getValueTypeList(VT), 1); 4343} 4344 4345SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4346 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4347 E = VTList.rend(); I != E; ++I) 4348 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4349 return *I; 4350 4351 EVT *Array = Allocator.Allocate<EVT>(2); 4352 Array[0] = VT1; 4353 Array[1] = VT2; 4354 SDVTList Result = makeVTList(Array, 2); 4355 VTList.push_back(Result); 4356 return Result; 4357} 4358 4359SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4360 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4361 E = VTList.rend(); I != E; ++I) 4362 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4363 I->VTs[2] == VT3) 4364 return *I; 4365 4366 EVT *Array = Allocator.Allocate<EVT>(3); 4367 Array[0] = VT1; 4368 Array[1] = VT2; 4369 Array[2] = VT3; 4370 SDVTList Result = makeVTList(Array, 3); 4371 VTList.push_back(Result); 4372 return Result; 4373} 4374 4375SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4376 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4377 E = VTList.rend(); I != E; ++I) 4378 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4379 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4380 return *I; 4381 4382 EVT *Array = Allocator.Allocate<EVT>(4); 4383 Array[0] = VT1; 4384 Array[1] = VT2; 4385 Array[2] = VT3; 4386 Array[3] = VT4; 4387 SDVTList Result = makeVTList(Array, 4); 4388 VTList.push_back(Result); 4389 return Result; 4390} 4391 4392SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4393 switch (NumVTs) { 4394 case 0: llvm_unreachable("Cannot have nodes without results!"); 4395 case 1: return getVTList(VTs[0]); 4396 case 2: return getVTList(VTs[0], VTs[1]); 4397 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4398 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4399 default: break; 4400 } 4401 4402 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4403 E = VTList.rend(); I != E; ++I) { 4404 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4405 continue; 4406 4407 bool NoMatch = false; 4408 for (unsigned i = 2; i != NumVTs; ++i) 4409 if (VTs[i] != I->VTs[i]) { 4410 NoMatch = true; 4411 break; 4412 } 4413 if (!NoMatch) 4414 return *I; 4415 } 4416 4417 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4418 std::copy(VTs, VTs+NumVTs, Array); 4419 SDVTList Result = makeVTList(Array, NumVTs); 4420 VTList.push_back(Result); 4421 return Result; 4422} 4423 4424 4425/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4426/// specified operands. If the resultant node already exists in the DAG, 4427/// this does not modify the specified node, instead it returns the node that 4428/// already exists. If the resultant node does not exist in the DAG, the 4429/// input node is returned. As a degenerate case, if you specify the same 4430/// input operands as the node already has, the input node is returned. 4431SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4432 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4433 4434 // Check to see if there is no change. 4435 if (Op == N->getOperand(0)) return N; 4436 4437 // See if the modified node already exists. 4438 void *InsertPos = 0; 4439 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4440 return Existing; 4441 4442 // Nope it doesn't. Remove the node from its current place in the maps. 4443 if (InsertPos) 4444 if (!RemoveNodeFromCSEMaps(N)) 4445 InsertPos = 0; 4446 4447 // Now we update the operands. 4448 N->OperandList[0].set(Op); 4449 4450 // If this gets put into a CSE map, add it. 4451 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4452 return N; 4453} 4454 4455SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4456 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4457 4458 // Check to see if there is no change. 4459 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4460 return N; // No operands changed, just return the input node. 4461 4462 // See if the modified node already exists. 4463 void *InsertPos = 0; 4464 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4465 return Existing; 4466 4467 // Nope it doesn't. Remove the node from its current place in the maps. 4468 if (InsertPos) 4469 if (!RemoveNodeFromCSEMaps(N)) 4470 InsertPos = 0; 4471 4472 // Now we update the operands. 4473 if (N->OperandList[0] != Op1) 4474 N->OperandList[0].set(Op1); 4475 if (N->OperandList[1] != Op2) 4476 N->OperandList[1].set(Op2); 4477 4478 // If this gets put into a CSE map, add it. 4479 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4480 return N; 4481} 4482 4483SDNode *SelectionDAG:: 4484UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4485 SDValue Ops[] = { Op1, Op2, Op3 }; 4486 return UpdateNodeOperands(N, Ops, 3); 4487} 4488 4489SDNode *SelectionDAG:: 4490UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4491 SDValue Op3, SDValue Op4) { 4492 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4493 return UpdateNodeOperands(N, Ops, 4); 4494} 4495 4496SDNode *SelectionDAG:: 4497UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4498 SDValue Op3, SDValue Op4, SDValue Op5) { 4499 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4500 return UpdateNodeOperands(N, Ops, 5); 4501} 4502 4503SDNode *SelectionDAG:: 4504UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4505 assert(N->getNumOperands() == NumOps && 4506 "Update with wrong number of operands"); 4507 4508 // Check to see if there is no change. 4509 bool AnyChange = false; 4510 for (unsigned i = 0; i != NumOps; ++i) { 4511 if (Ops[i] != N->getOperand(i)) { 4512 AnyChange = true; 4513 break; 4514 } 4515 } 4516 4517 // No operands changed, just return the input node. 4518 if (!AnyChange) return N; 4519 4520 // See if the modified node already exists. 4521 void *InsertPos = 0; 4522 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4523 return Existing; 4524 4525 // Nope it doesn't. Remove the node from its current place in the maps. 4526 if (InsertPos) 4527 if (!RemoveNodeFromCSEMaps(N)) 4528 InsertPos = 0; 4529 4530 // Now we update the operands. 4531 for (unsigned i = 0; i != NumOps; ++i) 4532 if (N->OperandList[i] != Ops[i]) 4533 N->OperandList[i].set(Ops[i]); 4534 4535 // If this gets put into a CSE map, add it. 4536 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4537 return N; 4538} 4539 4540/// DropOperands - Release the operands and set this node to have 4541/// zero operands. 4542void SDNode::DropOperands() { 4543 // Unlike the code in MorphNodeTo that does this, we don't need to 4544 // watch for dead nodes here. 4545 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4546 SDUse &Use = *I++; 4547 Use.set(SDValue()); 4548 } 4549} 4550 4551/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4552/// machine opcode. 4553/// 4554SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4555 EVT VT) { 4556 SDVTList VTs = getVTList(VT); 4557 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4558} 4559 4560SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4561 EVT VT, SDValue Op1) { 4562 SDVTList VTs = getVTList(VT); 4563 SDValue Ops[] = { Op1 }; 4564 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4565} 4566 4567SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4568 EVT VT, SDValue Op1, 4569 SDValue Op2) { 4570 SDVTList VTs = getVTList(VT); 4571 SDValue Ops[] = { Op1, Op2 }; 4572 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4573} 4574 4575SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4576 EVT VT, SDValue Op1, 4577 SDValue Op2, SDValue Op3) { 4578 SDVTList VTs = getVTList(VT); 4579 SDValue Ops[] = { Op1, Op2, Op3 }; 4580 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4581} 4582 4583SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4584 EVT VT, const SDValue *Ops, 4585 unsigned NumOps) { 4586 SDVTList VTs = getVTList(VT); 4587 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4588} 4589 4590SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4591 EVT VT1, EVT VT2, const SDValue *Ops, 4592 unsigned NumOps) { 4593 SDVTList VTs = getVTList(VT1, VT2); 4594 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4595} 4596 4597SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4598 EVT VT1, EVT VT2) { 4599 SDVTList VTs = getVTList(VT1, VT2); 4600 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4601} 4602 4603SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4604 EVT VT1, EVT VT2, EVT VT3, 4605 const SDValue *Ops, unsigned NumOps) { 4606 SDVTList VTs = getVTList(VT1, VT2, VT3); 4607 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4608} 4609 4610SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4611 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4612 const SDValue *Ops, unsigned NumOps) { 4613 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4614 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4615} 4616 4617SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4618 EVT VT1, EVT VT2, 4619 SDValue Op1) { 4620 SDVTList VTs = getVTList(VT1, VT2); 4621 SDValue Ops[] = { Op1 }; 4622 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4623} 4624 4625SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4626 EVT VT1, EVT VT2, 4627 SDValue Op1, SDValue Op2) { 4628 SDVTList VTs = getVTList(VT1, VT2); 4629 SDValue Ops[] = { Op1, Op2 }; 4630 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4631} 4632 4633SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4634 EVT VT1, EVT VT2, 4635 SDValue Op1, SDValue Op2, 4636 SDValue Op3) { 4637 SDVTList VTs = getVTList(VT1, VT2); 4638 SDValue Ops[] = { Op1, Op2, Op3 }; 4639 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4640} 4641 4642SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4643 EVT VT1, EVT VT2, EVT VT3, 4644 SDValue Op1, SDValue Op2, 4645 SDValue Op3) { 4646 SDVTList VTs = getVTList(VT1, VT2, VT3); 4647 SDValue Ops[] = { Op1, Op2, Op3 }; 4648 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4649} 4650 4651SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4652 SDVTList VTs, const SDValue *Ops, 4653 unsigned NumOps) { 4654 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4655 // Reset the NodeID to -1. 4656 N->setNodeId(-1); 4657 return N; 4658} 4659 4660/// MorphNodeTo - This *mutates* the specified node to have the specified 4661/// return type, opcode, and operands. 4662/// 4663/// Note that MorphNodeTo returns the resultant node. If there is already a 4664/// node of the specified opcode and operands, it returns that node instead of 4665/// the current one. Note that the DebugLoc need not be the same. 4666/// 4667/// Using MorphNodeTo is faster than creating a new node and swapping it in 4668/// with ReplaceAllUsesWith both because it often avoids allocating a new 4669/// node, and because it doesn't require CSE recalculation for any of 4670/// the node's users. 4671/// 4672SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4673 SDVTList VTs, const SDValue *Ops, 4674 unsigned NumOps) { 4675 // If an identical node already exists, use it. 4676 void *IP = 0; 4677 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4678 FoldingSetNodeID ID; 4679 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4680 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4681 return ON; 4682 } 4683 4684 if (!RemoveNodeFromCSEMaps(N)) 4685 IP = 0; 4686 4687 // Start the morphing. 4688 N->NodeType = Opc; 4689 N->ValueList = VTs.VTs; 4690 N->NumValues = VTs.NumVTs; 4691 4692 // Clear the operands list, updating used nodes to remove this from their 4693 // use list. Keep track of any operands that become dead as a result. 4694 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4695 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4696 SDUse &Use = *I++; 4697 SDNode *Used = Use.getNode(); 4698 Use.set(SDValue()); 4699 if (Used->use_empty()) 4700 DeadNodeSet.insert(Used); 4701 } 4702 4703 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4704 // Initialize the memory references information. 4705 MN->setMemRefs(0, 0); 4706 // If NumOps is larger than the # of operands we can have in a 4707 // MachineSDNode, reallocate the operand list. 4708 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4709 if (MN->OperandsNeedDelete) 4710 delete[] MN->OperandList; 4711 if (NumOps > array_lengthof(MN->LocalOperands)) 4712 // We're creating a final node that will live unmorphed for the 4713 // remainder of the current SelectionDAG iteration, so we can allocate 4714 // the operands directly out of a pool with no recycling metadata. 4715 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4716 Ops, NumOps); 4717 else 4718 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4719 MN->OperandsNeedDelete = false; 4720 } else 4721 MN->InitOperands(MN->OperandList, Ops, NumOps); 4722 } else { 4723 // If NumOps is larger than the # of operands we currently have, reallocate 4724 // the operand list. 4725 if (NumOps > N->NumOperands) { 4726 if (N->OperandsNeedDelete) 4727 delete[] N->OperandList; 4728 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4729 N->OperandsNeedDelete = true; 4730 } else 4731 N->InitOperands(N->OperandList, Ops, NumOps); 4732 } 4733 4734 // Delete any nodes that are still dead after adding the uses for the 4735 // new operands. 4736 if (!DeadNodeSet.empty()) { 4737 SmallVector<SDNode *, 16> DeadNodes; 4738 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4739 E = DeadNodeSet.end(); I != E; ++I) 4740 if ((*I)->use_empty()) 4741 DeadNodes.push_back(*I); 4742 RemoveDeadNodes(DeadNodes); 4743 } 4744 4745 if (IP) 4746 CSEMap.InsertNode(N, IP); // Memoize the new node. 4747 return N; 4748} 4749 4750 4751/// getMachineNode - These are used for target selectors to create a new node 4752/// with specified return type(s), MachineInstr opcode, and operands. 4753/// 4754/// Note that getMachineNode returns the resultant node. If there is already a 4755/// node of the specified opcode and operands, it returns that node instead of 4756/// the current one. 4757MachineSDNode * 4758SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4759 SDVTList VTs = getVTList(VT); 4760 return getMachineNode(Opcode, dl, VTs, 0, 0); 4761} 4762 4763MachineSDNode * 4764SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4765 SDVTList VTs = getVTList(VT); 4766 SDValue Ops[] = { Op1 }; 4767 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4768} 4769 4770MachineSDNode * 4771SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4772 SDValue Op1, SDValue Op2) { 4773 SDVTList VTs = getVTList(VT); 4774 SDValue Ops[] = { Op1, Op2 }; 4775 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4776} 4777 4778MachineSDNode * 4779SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4780 SDValue Op1, SDValue Op2, SDValue Op3) { 4781 SDVTList VTs = getVTList(VT); 4782 SDValue Ops[] = { Op1, Op2, Op3 }; 4783 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4784} 4785 4786MachineSDNode * 4787SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4788 const SDValue *Ops, unsigned NumOps) { 4789 SDVTList VTs = getVTList(VT); 4790 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4791} 4792 4793MachineSDNode * 4794SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4795 SDVTList VTs = getVTList(VT1, VT2); 4796 return getMachineNode(Opcode, dl, VTs, 0, 0); 4797} 4798 4799MachineSDNode * 4800SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4801 EVT VT1, EVT VT2, SDValue Op1) { 4802 SDVTList VTs = getVTList(VT1, VT2); 4803 SDValue Ops[] = { Op1 }; 4804 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4805} 4806 4807MachineSDNode * 4808SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4809 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4810 SDVTList VTs = getVTList(VT1, VT2); 4811 SDValue Ops[] = { Op1, Op2 }; 4812 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4813} 4814 4815MachineSDNode * 4816SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4817 EVT VT1, EVT VT2, SDValue Op1, 4818 SDValue Op2, SDValue Op3) { 4819 SDVTList VTs = getVTList(VT1, VT2); 4820 SDValue Ops[] = { Op1, Op2, Op3 }; 4821 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4822} 4823 4824MachineSDNode * 4825SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4826 EVT VT1, EVT VT2, 4827 const SDValue *Ops, unsigned NumOps) { 4828 SDVTList VTs = getVTList(VT1, VT2); 4829 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4830} 4831 4832MachineSDNode * 4833SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4834 EVT VT1, EVT VT2, EVT VT3, 4835 SDValue Op1, SDValue Op2) { 4836 SDVTList VTs = getVTList(VT1, VT2, VT3); 4837 SDValue Ops[] = { Op1, Op2 }; 4838 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4839} 4840 4841MachineSDNode * 4842SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4843 EVT VT1, EVT VT2, EVT VT3, 4844 SDValue Op1, SDValue Op2, SDValue Op3) { 4845 SDVTList VTs = getVTList(VT1, VT2, VT3); 4846 SDValue Ops[] = { Op1, Op2, Op3 }; 4847 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4848} 4849 4850MachineSDNode * 4851SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4852 EVT VT1, EVT VT2, EVT VT3, 4853 const SDValue *Ops, unsigned NumOps) { 4854 SDVTList VTs = getVTList(VT1, VT2, VT3); 4855 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4856} 4857 4858MachineSDNode * 4859SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4860 EVT VT2, EVT VT3, EVT VT4, 4861 const SDValue *Ops, unsigned NumOps) { 4862 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4863 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4864} 4865 4866MachineSDNode * 4867SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4868 const std::vector<EVT> &ResultTys, 4869 const SDValue *Ops, unsigned NumOps) { 4870 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4871 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4872} 4873 4874MachineSDNode * 4875SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4876 const SDValue *Ops, unsigned NumOps) { 4877 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4878 MachineSDNode *N; 4879 void *IP; 4880 4881 if (DoCSE) { 4882 FoldingSetNodeID ID; 4883 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4884 IP = 0; 4885 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4886 return cast<MachineSDNode>(E); 4887 } 4888 4889 // Allocate a new MachineSDNode. 4890 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4891 4892 // Initialize the operands list. 4893 if (NumOps > array_lengthof(N->LocalOperands)) 4894 // We're creating a final node that will live unmorphed for the 4895 // remainder of the current SelectionDAG iteration, so we can allocate 4896 // the operands directly out of a pool with no recycling metadata. 4897 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4898 Ops, NumOps); 4899 else 4900 N->InitOperands(N->LocalOperands, Ops, NumOps); 4901 N->OperandsNeedDelete = false; 4902 4903 if (DoCSE) 4904 CSEMap.InsertNode(N, IP); 4905 4906 AllNodes.push_back(N); 4907#ifndef NDEBUG 4908 VerifyNode(N); 4909#endif 4910 return N; 4911} 4912 4913/// getTargetExtractSubreg - A convenience function for creating 4914/// TargetOpcode::EXTRACT_SUBREG nodes. 4915SDValue 4916SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4917 SDValue Operand) { 4918 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4919 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4920 VT, Operand, SRIdxVal); 4921 return SDValue(Subreg, 0); 4922} 4923 4924/// getTargetInsertSubreg - A convenience function for creating 4925/// TargetOpcode::INSERT_SUBREG nodes. 4926SDValue 4927SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4928 SDValue Operand, SDValue Subreg) { 4929 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4930 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4931 VT, Operand, Subreg, SRIdxVal); 4932 return SDValue(Result, 0); 4933} 4934 4935/// getNodeIfExists - Get the specified node if it's already available, or 4936/// else return NULL. 4937SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4938 const SDValue *Ops, unsigned NumOps) { 4939 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4940 FoldingSetNodeID ID; 4941 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4942 void *IP = 0; 4943 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4944 return E; 4945 } 4946 return NULL; 4947} 4948 4949/// getDbgValue - Creates a SDDbgValue node. 4950/// 4951SDDbgValue * 4952SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4953 DebugLoc DL, unsigned O) { 4954 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4955} 4956 4957SDDbgValue * 4958SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4959 DebugLoc DL, unsigned O) { 4960 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4961} 4962 4963SDDbgValue * 4964SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4965 DebugLoc DL, unsigned O) { 4966 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4967} 4968 4969namespace { 4970 4971/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4972/// pointed to by a use iterator is deleted, increment the use iterator 4973/// so that it doesn't dangle. 4974/// 4975/// This class also manages a "downlink" DAGUpdateListener, to forward 4976/// messages to ReplaceAllUsesWith's callers. 4977/// 4978class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4979 SelectionDAG::DAGUpdateListener *DownLink; 4980 SDNode::use_iterator &UI; 4981 SDNode::use_iterator &UE; 4982 4983 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4984 // Increment the iterator as needed. 4985 while (UI != UE && N == *UI) 4986 ++UI; 4987 4988 // Then forward the message. 4989 if (DownLink) DownLink->NodeDeleted(N, E); 4990 } 4991 4992 virtual void NodeUpdated(SDNode *N) { 4993 // Just forward the message. 4994 if (DownLink) DownLink->NodeUpdated(N); 4995 } 4996 4997public: 4998 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4999 SDNode::use_iterator &ui, 5000 SDNode::use_iterator &ue) 5001 : DownLink(dl), UI(ui), UE(ue) {} 5002}; 5003 5004} 5005 5006/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5007/// This can cause recursive merging of nodes in the DAG. 5008/// 5009/// This version assumes From has a single result value. 5010/// 5011void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5012 DAGUpdateListener *UpdateListener) { 5013 SDNode *From = FromN.getNode(); 5014 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5015 "Cannot replace with this method!"); 5016 assert(From != To.getNode() && "Cannot replace uses of with self"); 5017 5018 // Iterate over all the existing uses of From. New uses will be added 5019 // to the beginning of the use list, which we avoid visiting. 5020 // This specifically avoids visiting uses of From that arise while the 5021 // replacement is happening, because any such uses would be the result 5022 // of CSE: If an existing node looks like From after one of its operands 5023 // is replaced by To, we don't want to replace of all its users with To 5024 // too. See PR3018 for more info. 5025 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5026 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5027 while (UI != UE) { 5028 SDNode *User = *UI; 5029 5030 // This node is about to morph, remove its old self from the CSE maps. 5031 RemoveNodeFromCSEMaps(User); 5032 5033 // A user can appear in a use list multiple times, and when this 5034 // happens the uses are usually next to each other in the list. 5035 // To help reduce the number of CSE recomputations, process all 5036 // the uses of this user that we can find this way. 5037 do { 5038 SDUse &Use = UI.getUse(); 5039 ++UI; 5040 Use.set(To); 5041 } while (UI != UE && *UI == User); 5042 5043 // Now that we have modified User, add it back to the CSE maps. If it 5044 // already exists there, recursively merge the results together. 5045 AddModifiedNodeToCSEMaps(User, &Listener); 5046 } 5047} 5048 5049/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5050/// This can cause recursive merging of nodes in the DAG. 5051/// 5052/// This version assumes that for each value of From, there is a 5053/// corresponding value in To in the same position with the same type. 5054/// 5055void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5056 DAGUpdateListener *UpdateListener) { 5057#ifndef NDEBUG 5058 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5059 assert((!From->hasAnyUseOfValue(i) || 5060 From->getValueType(i) == To->getValueType(i)) && 5061 "Cannot use this version of ReplaceAllUsesWith!"); 5062#endif 5063 5064 // Handle the trivial case. 5065 if (From == To) 5066 return; 5067 5068 // Iterate over just the existing users of From. See the comments in 5069 // the ReplaceAllUsesWith above. 5070 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5071 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5072 while (UI != UE) { 5073 SDNode *User = *UI; 5074 5075 // This node is about to morph, remove its old self from the CSE maps. 5076 RemoveNodeFromCSEMaps(User); 5077 5078 // A user can appear in a use list multiple times, and when this 5079 // happens the uses are usually next to each other in the list. 5080 // To help reduce the number of CSE recomputations, process all 5081 // the uses of this user that we can find this way. 5082 do { 5083 SDUse &Use = UI.getUse(); 5084 ++UI; 5085 Use.setNode(To); 5086 } while (UI != UE && *UI == User); 5087 5088 // Now that we have modified User, add it back to the CSE maps. If it 5089 // already exists there, recursively merge the results together. 5090 AddModifiedNodeToCSEMaps(User, &Listener); 5091 } 5092} 5093 5094/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5095/// This can cause recursive merging of nodes in the DAG. 5096/// 5097/// This version can replace From with any result values. To must match the 5098/// number and types of values returned by From. 5099void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5100 const SDValue *To, 5101 DAGUpdateListener *UpdateListener) { 5102 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5103 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5104 5105 // Iterate over just the existing users of From. See the comments in 5106 // the ReplaceAllUsesWith above. 5107 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5108 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5109 while (UI != UE) { 5110 SDNode *User = *UI; 5111 5112 // This node is about to morph, remove its old self from the CSE maps. 5113 RemoveNodeFromCSEMaps(User); 5114 5115 // A user can appear in a use list multiple times, and when this 5116 // happens the uses are usually next to each other in the list. 5117 // To help reduce the number of CSE recomputations, process all 5118 // the uses of this user that we can find this way. 5119 do { 5120 SDUse &Use = UI.getUse(); 5121 const SDValue &ToOp = To[Use.getResNo()]; 5122 ++UI; 5123 Use.set(ToOp); 5124 } while (UI != UE && *UI == User); 5125 5126 // Now that we have modified User, add it back to the CSE maps. If it 5127 // already exists there, recursively merge the results together. 5128 AddModifiedNodeToCSEMaps(User, &Listener); 5129 } 5130} 5131 5132/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5133/// uses of other values produced by From.getNode() alone. The Deleted 5134/// vector is handled the same way as for ReplaceAllUsesWith. 5135void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5136 DAGUpdateListener *UpdateListener){ 5137 // Handle the really simple, really trivial case efficiently. 5138 if (From == To) return; 5139 5140 // Handle the simple, trivial, case efficiently. 5141 if (From.getNode()->getNumValues() == 1) { 5142 ReplaceAllUsesWith(From, To, UpdateListener); 5143 return; 5144 } 5145 5146 // Iterate over just the existing users of From. See the comments in 5147 // the ReplaceAllUsesWith above. 5148 SDNode::use_iterator UI = From.getNode()->use_begin(), 5149 UE = From.getNode()->use_end(); 5150 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5151 while (UI != UE) { 5152 SDNode *User = *UI; 5153 bool UserRemovedFromCSEMaps = false; 5154 5155 // A user can appear in a use list multiple times, and when this 5156 // happens the uses are usually next to each other in the list. 5157 // To help reduce the number of CSE recomputations, process all 5158 // the uses of this user that we can find this way. 5159 do { 5160 SDUse &Use = UI.getUse(); 5161 5162 // Skip uses of different values from the same node. 5163 if (Use.getResNo() != From.getResNo()) { 5164 ++UI; 5165 continue; 5166 } 5167 5168 // If this node hasn't been modified yet, it's still in the CSE maps, 5169 // so remove its old self from the CSE maps. 5170 if (!UserRemovedFromCSEMaps) { 5171 RemoveNodeFromCSEMaps(User); 5172 UserRemovedFromCSEMaps = true; 5173 } 5174 5175 ++UI; 5176 Use.set(To); 5177 } while (UI != UE && *UI == User); 5178 5179 // We are iterating over all uses of the From node, so if a use 5180 // doesn't use the specific value, no changes are made. 5181 if (!UserRemovedFromCSEMaps) 5182 continue; 5183 5184 // Now that we have modified User, add it back to the CSE maps. If it 5185 // already exists there, recursively merge the results together. 5186 AddModifiedNodeToCSEMaps(User, &Listener); 5187 } 5188} 5189 5190namespace { 5191 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5192 /// to record information about a use. 5193 struct UseMemo { 5194 SDNode *User; 5195 unsigned Index; 5196 SDUse *Use; 5197 }; 5198 5199 /// operator< - Sort Memos by User. 5200 bool operator<(const UseMemo &L, const UseMemo &R) { 5201 return (intptr_t)L.User < (intptr_t)R.User; 5202 } 5203} 5204 5205/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5206/// uses of other values produced by From.getNode() alone. The same value 5207/// may appear in both the From and To list. The Deleted vector is 5208/// handled the same way as for ReplaceAllUsesWith. 5209void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5210 const SDValue *To, 5211 unsigned Num, 5212 DAGUpdateListener *UpdateListener){ 5213 // Handle the simple, trivial case efficiently. 5214 if (Num == 1) 5215 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5216 5217 // Read up all the uses and make records of them. This helps 5218 // processing new uses that are introduced during the 5219 // replacement process. 5220 SmallVector<UseMemo, 4> Uses; 5221 for (unsigned i = 0; i != Num; ++i) { 5222 unsigned FromResNo = From[i].getResNo(); 5223 SDNode *FromNode = From[i].getNode(); 5224 for (SDNode::use_iterator UI = FromNode->use_begin(), 5225 E = FromNode->use_end(); UI != E; ++UI) { 5226 SDUse &Use = UI.getUse(); 5227 if (Use.getResNo() == FromResNo) { 5228 UseMemo Memo = { *UI, i, &Use }; 5229 Uses.push_back(Memo); 5230 } 5231 } 5232 } 5233 5234 // Sort the uses, so that all the uses from a given User are together. 5235 std::sort(Uses.begin(), Uses.end()); 5236 5237 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5238 UseIndex != UseIndexEnd; ) { 5239 // We know that this user uses some value of From. If it is the right 5240 // value, update it. 5241 SDNode *User = Uses[UseIndex].User; 5242 5243 // This node is about to morph, remove its old self from the CSE maps. 5244 RemoveNodeFromCSEMaps(User); 5245 5246 // The Uses array is sorted, so all the uses for a given User 5247 // are next to each other in the list. 5248 // To help reduce the number of CSE recomputations, process all 5249 // the uses of this user that we can find this way. 5250 do { 5251 unsigned i = Uses[UseIndex].Index; 5252 SDUse &Use = *Uses[UseIndex].Use; 5253 ++UseIndex; 5254 5255 Use.set(To[i]); 5256 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5257 5258 // Now that we have modified User, add it back to the CSE maps. If it 5259 // already exists there, recursively merge the results together. 5260 AddModifiedNodeToCSEMaps(User, UpdateListener); 5261 } 5262} 5263 5264/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5265/// based on their topological order. It returns the maximum id and a vector 5266/// of the SDNodes* in assigned order by reference. 5267unsigned SelectionDAG::AssignTopologicalOrder() { 5268 5269 unsigned DAGSize = 0; 5270 5271 // SortedPos tracks the progress of the algorithm. Nodes before it are 5272 // sorted, nodes after it are unsorted. When the algorithm completes 5273 // it is at the end of the list. 5274 allnodes_iterator SortedPos = allnodes_begin(); 5275 5276 // Visit all the nodes. Move nodes with no operands to the front of 5277 // the list immediately. Annotate nodes that do have operands with their 5278 // operand count. Before we do this, the Node Id fields of the nodes 5279 // may contain arbitrary values. After, the Node Id fields for nodes 5280 // before SortedPos will contain the topological sort index, and the 5281 // Node Id fields for nodes At SortedPos and after will contain the 5282 // count of outstanding operands. 5283 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5284 SDNode *N = I++; 5285 checkForCycles(N); 5286 unsigned Degree = N->getNumOperands(); 5287 if (Degree == 0) { 5288 // A node with no uses, add it to the result array immediately. 5289 N->setNodeId(DAGSize++); 5290 allnodes_iterator Q = N; 5291 if (Q != SortedPos) 5292 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5293 assert(SortedPos != AllNodes.end() && "Overran node list"); 5294 ++SortedPos; 5295 } else { 5296 // Temporarily use the Node Id as scratch space for the degree count. 5297 N->setNodeId(Degree); 5298 } 5299 } 5300 5301 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5302 // such that by the time the end is reached all nodes will be sorted. 5303 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5304 SDNode *N = I; 5305 checkForCycles(N); 5306 // N is in sorted position, so all its uses have one less operand 5307 // that needs to be sorted. 5308 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5309 UI != UE; ++UI) { 5310 SDNode *P = *UI; 5311 unsigned Degree = P->getNodeId(); 5312 assert(Degree != 0 && "Invalid node degree"); 5313 --Degree; 5314 if (Degree == 0) { 5315 // All of P's operands are sorted, so P may sorted now. 5316 P->setNodeId(DAGSize++); 5317 if (P != SortedPos) 5318 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5319 assert(SortedPos != AllNodes.end() && "Overran node list"); 5320 ++SortedPos; 5321 } else { 5322 // Update P's outstanding operand count. 5323 P->setNodeId(Degree); 5324 } 5325 } 5326 if (I == SortedPos) { 5327#ifndef NDEBUG 5328 SDNode *S = ++I; 5329 dbgs() << "Overran sorted position:\n"; 5330 S->dumprFull(); 5331#endif 5332 llvm_unreachable(0); 5333 } 5334 } 5335 5336 assert(SortedPos == AllNodes.end() && 5337 "Topological sort incomplete!"); 5338 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5339 "First node in topological sort is not the entry token!"); 5340 assert(AllNodes.front().getNodeId() == 0 && 5341 "First node in topological sort has non-zero id!"); 5342 assert(AllNodes.front().getNumOperands() == 0 && 5343 "First node in topological sort has operands!"); 5344 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5345 "Last node in topologic sort has unexpected id!"); 5346 assert(AllNodes.back().use_empty() && 5347 "Last node in topologic sort has users!"); 5348 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5349 return DAGSize; 5350} 5351 5352/// AssignOrdering - Assign an order to the SDNode. 5353void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5354 assert(SD && "Trying to assign an order to a null node!"); 5355 Ordering->add(SD, Order); 5356} 5357 5358/// GetOrdering - Get the order for the SDNode. 5359unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5360 assert(SD && "Trying to get the order of a null node!"); 5361 return Ordering->getOrder(SD); 5362} 5363 5364/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5365/// value is produced by SD. 5366void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5367 DbgInfo->add(DB, SD, isParameter); 5368 if (SD) 5369 SD->setHasDebugValue(true); 5370} 5371 5372//===----------------------------------------------------------------------===// 5373// SDNode Class 5374//===----------------------------------------------------------------------===// 5375 5376HandleSDNode::~HandleSDNode() { 5377 DropOperands(); 5378} 5379 5380GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5381 const GlobalValue *GA, 5382 EVT VT, int64_t o, unsigned char TF) 5383 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5384 TheGlobal = GA; 5385} 5386 5387MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5388 MachineMemOperand *mmo) 5389 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5390 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5391 MMO->isNonTemporal()); 5392 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5393 assert(isNonTemporal() == MMO->isNonTemporal() && 5394 "Non-temporal encoding error!"); 5395 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5396} 5397 5398MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5399 const SDValue *Ops, unsigned NumOps, EVT memvt, 5400 MachineMemOperand *mmo) 5401 : SDNode(Opc, dl, VTs, Ops, NumOps), 5402 MemoryVT(memvt), MMO(mmo) { 5403 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5404 MMO->isNonTemporal()); 5405 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5406 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5407} 5408 5409/// Profile - Gather unique data for the node. 5410/// 5411void SDNode::Profile(FoldingSetNodeID &ID) const { 5412 AddNodeIDNode(ID, this); 5413} 5414 5415namespace { 5416 struct EVTArray { 5417 std::vector<EVT> VTs; 5418 5419 EVTArray() { 5420 VTs.reserve(MVT::LAST_VALUETYPE); 5421 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5422 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5423 } 5424 }; 5425} 5426 5427static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5428static ManagedStatic<EVTArray> SimpleVTArray; 5429static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5430 5431/// getValueTypeList - Return a pointer to the specified value type. 5432/// 5433const EVT *SDNode::getValueTypeList(EVT VT) { 5434 if (VT.isExtended()) { 5435 sys::SmartScopedLock<true> Lock(*VTMutex); 5436 return &(*EVTs->insert(VT).first); 5437 } else { 5438 assert(VT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE && 5439 "Value type out of range!"); 5440 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5441 } 5442} 5443 5444/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5445/// indicated value. This method ignores uses of other values defined by this 5446/// operation. 5447bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5448 assert(Value < getNumValues() && "Bad value!"); 5449 5450 // TODO: Only iterate over uses of a given value of the node 5451 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5452 if (UI.getUse().getResNo() == Value) { 5453 if (NUses == 0) 5454 return false; 5455 --NUses; 5456 } 5457 } 5458 5459 // Found exactly the right number of uses? 5460 return NUses == 0; 5461} 5462 5463 5464/// hasAnyUseOfValue - Return true if there are any use of the indicated 5465/// value. This method ignores uses of other values defined by this operation. 5466bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5467 assert(Value < getNumValues() && "Bad value!"); 5468 5469 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5470 if (UI.getUse().getResNo() == Value) 5471 return true; 5472 5473 return false; 5474} 5475 5476 5477/// isOnlyUserOf - Return true if this node is the only use of N. 5478/// 5479bool SDNode::isOnlyUserOf(SDNode *N) const { 5480 bool Seen = false; 5481 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5482 SDNode *User = *I; 5483 if (User == this) 5484 Seen = true; 5485 else 5486 return false; 5487 } 5488 5489 return Seen; 5490} 5491 5492/// isOperand - Return true if this node is an operand of N. 5493/// 5494bool SDValue::isOperandOf(SDNode *N) const { 5495 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5496 if (*this == N->getOperand(i)) 5497 return true; 5498 return false; 5499} 5500 5501bool SDNode::isOperandOf(SDNode *N) const { 5502 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5503 if (this == N->OperandList[i].getNode()) 5504 return true; 5505 return false; 5506} 5507 5508/// reachesChainWithoutSideEffects - Return true if this operand (which must 5509/// be a chain) reaches the specified operand without crossing any 5510/// side-effecting instructions. In practice, this looks through token 5511/// factors and non-volatile loads. In order to remain efficient, this only 5512/// looks a couple of nodes in, it does not do an exhaustive search. 5513bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5514 unsigned Depth) const { 5515 if (*this == Dest) return true; 5516 5517 // Don't search too deeply, we just want to be able to see through 5518 // TokenFactor's etc. 5519 if (Depth == 0) return false; 5520 5521 // If this is a token factor, all inputs to the TF happen in parallel. If any 5522 // of the operands of the TF reach dest, then we can do the xform. 5523 if (getOpcode() == ISD::TokenFactor) { 5524 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5525 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5526 return true; 5527 return false; 5528 } 5529 5530 // Loads don't have side effects, look through them. 5531 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5532 if (!Ld->isVolatile()) 5533 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5534 } 5535 return false; 5536} 5537 5538/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5539/// is either an operand of N or it can be reached by traversing up the operands. 5540/// NOTE: this is an expensive method. Use it carefully. 5541bool SDNode::isPredecessorOf(SDNode *N) const { 5542 SmallPtrSet<SDNode *, 32> Visited; 5543 SmallVector<SDNode *, 16> Worklist; 5544 Worklist.push_back(N); 5545 5546 do { 5547 N = Worklist.pop_back_val(); 5548 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5549 SDNode *Op = N->getOperand(i).getNode(); 5550 if (Op == this) 5551 return true; 5552 if (Visited.insert(Op)) 5553 Worklist.push_back(Op); 5554 } 5555 } while (!Worklist.empty()); 5556 5557 return false; 5558} 5559 5560uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5561 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5562 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5563} 5564 5565std::string SDNode::getOperationName(const SelectionDAG *G) const { 5566 switch (getOpcode()) { 5567 default: 5568 if (getOpcode() < ISD::BUILTIN_OP_END) 5569 return "<<Unknown DAG Node>>"; 5570 if (isMachineOpcode()) { 5571 if (G) 5572 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5573 if (getMachineOpcode() < TII->getNumOpcodes()) 5574 return TII->get(getMachineOpcode()).getName(); 5575 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5576 } 5577 if (G) { 5578 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5579 const char *Name = TLI.getTargetNodeName(getOpcode()); 5580 if (Name) return Name; 5581 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5582 } 5583 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5584 5585#ifndef NDEBUG 5586 case ISD::DELETED_NODE: 5587 return "<<Deleted Node!>>"; 5588#endif 5589 case ISD::PREFETCH: return "Prefetch"; 5590 case ISD::MEMBARRIER: return "MemBarrier"; 5591 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5592 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5593 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5594 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5595 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5596 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5597 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5598 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5599 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5600 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5601 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5602 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5603 case ISD::PCMARKER: return "PCMarker"; 5604 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5605 case ISD::SRCVALUE: return "SrcValue"; 5606 case ISD::MDNODE_SDNODE: return "MDNode"; 5607 case ISD::EntryToken: return "EntryToken"; 5608 case ISD::TokenFactor: return "TokenFactor"; 5609 case ISD::AssertSext: return "AssertSext"; 5610 case ISD::AssertZext: return "AssertZext"; 5611 5612 case ISD::BasicBlock: return "BasicBlock"; 5613 case ISD::VALUETYPE: return "ValueType"; 5614 case ISD::Register: return "Register"; 5615 5616 case ISD::Constant: return "Constant"; 5617 case ISD::ConstantFP: return "ConstantFP"; 5618 case ISD::GlobalAddress: return "GlobalAddress"; 5619 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5620 case ISD::FrameIndex: return "FrameIndex"; 5621 case ISD::JumpTable: return "JumpTable"; 5622 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5623 case ISD::RETURNADDR: return "RETURNADDR"; 5624 case ISD::FRAMEADDR: return "FRAMEADDR"; 5625 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5626 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5627 case ISD::LSDAADDR: return "LSDAADDR"; 5628 case ISD::EHSELECTION: return "EHSELECTION"; 5629 case ISD::EH_RETURN: return "EH_RETURN"; 5630 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5631 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5632 case ISD::ConstantPool: return "ConstantPool"; 5633 case ISD::ExternalSymbol: return "ExternalSymbol"; 5634 case ISD::BlockAddress: return "BlockAddress"; 5635 case ISD::INTRINSIC_WO_CHAIN: 5636 case ISD::INTRINSIC_VOID: 5637 case ISD::INTRINSIC_W_CHAIN: { 5638 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5639 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5640 if (IID < Intrinsic::num_intrinsics) 5641 return Intrinsic::getName((Intrinsic::ID)IID); 5642 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5643 return TII->getName(IID); 5644 llvm_unreachable("Invalid intrinsic ID"); 5645 } 5646 5647 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5648 case ISD::TargetConstant: return "TargetConstant"; 5649 case ISD::TargetConstantFP:return "TargetConstantFP"; 5650 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5651 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5652 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5653 case ISD::TargetJumpTable: return "TargetJumpTable"; 5654 case ISD::TargetConstantPool: return "TargetConstantPool"; 5655 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5656 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5657 5658 case ISD::CopyToReg: return "CopyToReg"; 5659 case ISD::CopyFromReg: return "CopyFromReg"; 5660 case ISD::UNDEF: return "undef"; 5661 case ISD::MERGE_VALUES: return "merge_values"; 5662 case ISD::INLINEASM: return "inlineasm"; 5663 case ISD::EH_LABEL: return "eh_label"; 5664 case ISD::HANDLENODE: return "handlenode"; 5665 5666 // Unary operators 5667 case ISD::FABS: return "fabs"; 5668 case ISD::FNEG: return "fneg"; 5669 case ISD::FSQRT: return "fsqrt"; 5670 case ISD::FSIN: return "fsin"; 5671 case ISD::FCOS: return "fcos"; 5672 case ISD::FTRUNC: return "ftrunc"; 5673 case ISD::FFLOOR: return "ffloor"; 5674 case ISD::FCEIL: return "fceil"; 5675 case ISD::FRINT: return "frint"; 5676 case ISD::FNEARBYINT: return "fnearbyint"; 5677 case ISD::FEXP: return "fexp"; 5678 case ISD::FEXP2: return "fexp2"; 5679 case ISD::FLOG: return "flog"; 5680 case ISD::FLOG2: return "flog2"; 5681 case ISD::FLOG10: return "flog10"; 5682 5683 // Binary operators 5684 case ISD::ADD: return "add"; 5685 case ISD::SUB: return "sub"; 5686 case ISD::MUL: return "mul"; 5687 case ISD::MULHU: return "mulhu"; 5688 case ISD::MULHS: return "mulhs"; 5689 case ISD::SDIV: return "sdiv"; 5690 case ISD::UDIV: return "udiv"; 5691 case ISD::SREM: return "srem"; 5692 case ISD::UREM: return "urem"; 5693 case ISD::SMUL_LOHI: return "smul_lohi"; 5694 case ISD::UMUL_LOHI: return "umul_lohi"; 5695 case ISD::SDIVREM: return "sdivrem"; 5696 case ISD::UDIVREM: return "udivrem"; 5697 case ISD::AND: return "and"; 5698 case ISD::OR: return "or"; 5699 case ISD::XOR: return "xor"; 5700 case ISD::SHL: return "shl"; 5701 case ISD::SRA: return "sra"; 5702 case ISD::SRL: return "srl"; 5703 case ISD::ROTL: return "rotl"; 5704 case ISD::ROTR: return "rotr"; 5705 case ISD::FADD: return "fadd"; 5706 case ISD::FSUB: return "fsub"; 5707 case ISD::FMUL: return "fmul"; 5708 case ISD::FDIV: return "fdiv"; 5709 case ISD::FREM: return "frem"; 5710 case ISD::FCOPYSIGN: return "fcopysign"; 5711 case ISD::FGETSIGN: return "fgetsign"; 5712 case ISD::FPOW: return "fpow"; 5713 5714 case ISD::FPOWI: return "fpowi"; 5715 case ISD::SETCC: return "setcc"; 5716 case ISD::VSETCC: return "vsetcc"; 5717 case ISD::SELECT: return "select"; 5718 case ISD::SELECT_CC: return "select_cc"; 5719 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5720 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5721 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5722 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5723 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5724 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5725 case ISD::CARRY_FALSE: return "carry_false"; 5726 case ISD::ADDC: return "addc"; 5727 case ISD::ADDE: return "adde"; 5728 case ISD::SADDO: return "saddo"; 5729 case ISD::UADDO: return "uaddo"; 5730 case ISD::SSUBO: return "ssubo"; 5731 case ISD::USUBO: return "usubo"; 5732 case ISD::SMULO: return "smulo"; 5733 case ISD::UMULO: return "umulo"; 5734 case ISD::SUBC: return "subc"; 5735 case ISD::SUBE: return "sube"; 5736 case ISD::SHL_PARTS: return "shl_parts"; 5737 case ISD::SRA_PARTS: return "sra_parts"; 5738 case ISD::SRL_PARTS: return "srl_parts"; 5739 5740 // Conversion operators. 5741 case ISD::SIGN_EXTEND: return "sign_extend"; 5742 case ISD::ZERO_EXTEND: return "zero_extend"; 5743 case ISD::ANY_EXTEND: return "any_extend"; 5744 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5745 case ISD::TRUNCATE: return "truncate"; 5746 case ISD::FP_ROUND: return "fp_round"; 5747 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5748 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5749 case ISD::FP_EXTEND: return "fp_extend"; 5750 5751 case ISD::SINT_TO_FP: return "sint_to_fp"; 5752 case ISD::UINT_TO_FP: return "uint_to_fp"; 5753 case ISD::FP_TO_SINT: return "fp_to_sint"; 5754 case ISD::FP_TO_UINT: return "fp_to_uint"; 5755 case ISD::BIT_CONVERT: return "bit_convert"; 5756 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5757 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5758 5759 case ISD::CONVERT_RNDSAT: { 5760 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5761 default: llvm_unreachable("Unknown cvt code!"); 5762 case ISD::CVT_FF: return "cvt_ff"; 5763 case ISD::CVT_FS: return "cvt_fs"; 5764 case ISD::CVT_FU: return "cvt_fu"; 5765 case ISD::CVT_SF: return "cvt_sf"; 5766 case ISD::CVT_UF: return "cvt_uf"; 5767 case ISD::CVT_SS: return "cvt_ss"; 5768 case ISD::CVT_SU: return "cvt_su"; 5769 case ISD::CVT_US: return "cvt_us"; 5770 case ISD::CVT_UU: return "cvt_uu"; 5771 } 5772 } 5773 5774 // Control flow instructions 5775 case ISD::BR: return "br"; 5776 case ISD::BRIND: return "brind"; 5777 case ISD::BR_JT: return "br_jt"; 5778 case ISD::BRCOND: return "brcond"; 5779 case ISD::BR_CC: return "br_cc"; 5780 case ISD::CALLSEQ_START: return "callseq_start"; 5781 case ISD::CALLSEQ_END: return "callseq_end"; 5782 5783 // Other operators 5784 case ISD::LOAD: return "load"; 5785 case ISD::STORE: return "store"; 5786 case ISD::VAARG: return "vaarg"; 5787 case ISD::VACOPY: return "vacopy"; 5788 case ISD::VAEND: return "vaend"; 5789 case ISD::VASTART: return "vastart"; 5790 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5791 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5792 case ISD::BUILD_PAIR: return "build_pair"; 5793 case ISD::STACKSAVE: return "stacksave"; 5794 case ISD::STACKRESTORE: return "stackrestore"; 5795 case ISD::TRAP: return "trap"; 5796 5797 // Bit manipulation 5798 case ISD::BSWAP: return "bswap"; 5799 case ISD::CTPOP: return "ctpop"; 5800 case ISD::CTTZ: return "cttz"; 5801 case ISD::CTLZ: return "ctlz"; 5802 5803 // Trampolines 5804 case ISD::TRAMPOLINE: return "trampoline"; 5805 5806 case ISD::CONDCODE: 5807 switch (cast<CondCodeSDNode>(this)->get()) { 5808 default: llvm_unreachable("Unknown setcc condition!"); 5809 case ISD::SETOEQ: return "setoeq"; 5810 case ISD::SETOGT: return "setogt"; 5811 case ISD::SETOGE: return "setoge"; 5812 case ISD::SETOLT: return "setolt"; 5813 case ISD::SETOLE: return "setole"; 5814 case ISD::SETONE: return "setone"; 5815 5816 case ISD::SETO: return "seto"; 5817 case ISD::SETUO: return "setuo"; 5818 case ISD::SETUEQ: return "setue"; 5819 case ISD::SETUGT: return "setugt"; 5820 case ISD::SETUGE: return "setuge"; 5821 case ISD::SETULT: return "setult"; 5822 case ISD::SETULE: return "setule"; 5823 case ISD::SETUNE: return "setune"; 5824 5825 case ISD::SETEQ: return "seteq"; 5826 case ISD::SETGT: return "setgt"; 5827 case ISD::SETGE: return "setge"; 5828 case ISD::SETLT: return "setlt"; 5829 case ISD::SETLE: return "setle"; 5830 case ISD::SETNE: return "setne"; 5831 } 5832 } 5833} 5834 5835const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5836 switch (AM) { 5837 default: 5838 return ""; 5839 case ISD::PRE_INC: 5840 return "<pre-inc>"; 5841 case ISD::PRE_DEC: 5842 return "<pre-dec>"; 5843 case ISD::POST_INC: 5844 return "<post-inc>"; 5845 case ISD::POST_DEC: 5846 return "<post-dec>"; 5847 } 5848} 5849 5850std::string ISD::ArgFlagsTy::getArgFlagsString() { 5851 std::string S = "< "; 5852 5853 if (isZExt()) 5854 S += "zext "; 5855 if (isSExt()) 5856 S += "sext "; 5857 if (isInReg()) 5858 S += "inreg "; 5859 if (isSRet()) 5860 S += "sret "; 5861 if (isByVal()) 5862 S += "byval "; 5863 if (isNest()) 5864 S += "nest "; 5865 if (getByValAlign()) 5866 S += "byval-align:" + utostr(getByValAlign()) + " "; 5867 if (getOrigAlign()) 5868 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5869 if (getByValSize()) 5870 S += "byval-size:" + utostr(getByValSize()) + " "; 5871 return S + ">"; 5872} 5873 5874void SDNode::dump() const { dump(0); } 5875void SDNode::dump(const SelectionDAG *G) const { 5876 print(dbgs(), G); 5877} 5878 5879void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5880 OS << (void*)this << ": "; 5881 5882 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5883 if (i) OS << ","; 5884 if (getValueType(i) == MVT::Other) 5885 OS << "ch"; 5886 else 5887 OS << getValueType(i).getEVTString(); 5888 } 5889 OS << " = " << getOperationName(G); 5890} 5891 5892void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5893 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5894 if (!MN->memoperands_empty()) { 5895 OS << "<"; 5896 OS << "Mem:"; 5897 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5898 e = MN->memoperands_end(); i != e; ++i) { 5899 OS << **i; 5900 if (next(i) != e) 5901 OS << " "; 5902 } 5903 OS << ">"; 5904 } 5905 } else if (const ShuffleVectorSDNode *SVN = 5906 dyn_cast<ShuffleVectorSDNode>(this)) { 5907 OS << "<"; 5908 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5909 int Idx = SVN->getMaskElt(i); 5910 if (i) OS << ","; 5911 if (Idx < 0) 5912 OS << "u"; 5913 else 5914 OS << Idx; 5915 } 5916 OS << ">"; 5917 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5918 OS << '<' << CSDN->getAPIntValue() << '>'; 5919 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5920 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5921 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5922 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5923 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5924 else { 5925 OS << "<APFloat("; 5926 CSDN->getValueAPF().bitcastToAPInt().dump(); 5927 OS << ")>"; 5928 } 5929 } else if (const GlobalAddressSDNode *GADN = 5930 dyn_cast<GlobalAddressSDNode>(this)) { 5931 int64_t offset = GADN->getOffset(); 5932 OS << '<'; 5933 WriteAsOperand(OS, GADN->getGlobal()); 5934 OS << '>'; 5935 if (offset > 0) 5936 OS << " + " << offset; 5937 else 5938 OS << " " << offset; 5939 if (unsigned int TF = GADN->getTargetFlags()) 5940 OS << " [TF=" << TF << ']'; 5941 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5942 OS << "<" << FIDN->getIndex() << ">"; 5943 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5944 OS << "<" << JTDN->getIndex() << ">"; 5945 if (unsigned int TF = JTDN->getTargetFlags()) 5946 OS << " [TF=" << TF << ']'; 5947 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5948 int offset = CP->getOffset(); 5949 if (CP->isMachineConstantPoolEntry()) 5950 OS << "<" << *CP->getMachineCPVal() << ">"; 5951 else 5952 OS << "<" << *CP->getConstVal() << ">"; 5953 if (offset > 0) 5954 OS << " + " << offset; 5955 else 5956 OS << " " << offset; 5957 if (unsigned int TF = CP->getTargetFlags()) 5958 OS << " [TF=" << TF << ']'; 5959 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5960 OS << "<"; 5961 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5962 if (LBB) 5963 OS << LBB->getName() << " "; 5964 OS << (const void*)BBDN->getBasicBlock() << ">"; 5965 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5966 if (G && R->getReg() && 5967 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5968 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5969 } else { 5970 OS << " %reg" << R->getReg(); 5971 } 5972 } else if (const ExternalSymbolSDNode *ES = 5973 dyn_cast<ExternalSymbolSDNode>(this)) { 5974 OS << "'" << ES->getSymbol() << "'"; 5975 if (unsigned int TF = ES->getTargetFlags()) 5976 OS << " [TF=" << TF << ']'; 5977 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5978 if (M->getValue()) 5979 OS << "<" << M->getValue() << ">"; 5980 else 5981 OS << "<null>"; 5982 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5983 if (MD->getMD()) 5984 OS << "<" << MD->getMD() << ">"; 5985 else 5986 OS << "<null>"; 5987 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5988 OS << ":" << N->getVT().getEVTString(); 5989 } 5990 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5991 OS << "<" << *LD->getMemOperand(); 5992 5993 bool doExt = true; 5994 switch (LD->getExtensionType()) { 5995 default: doExt = false; break; 5996 case ISD::EXTLOAD: OS << ", anyext"; break; 5997 case ISD::SEXTLOAD: OS << ", sext"; break; 5998 case ISD::ZEXTLOAD: OS << ", zext"; break; 5999 } 6000 if (doExt) 6001 OS << " from " << LD->getMemoryVT().getEVTString(); 6002 6003 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6004 if (*AM) 6005 OS << ", " << AM; 6006 6007 OS << ">"; 6008 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6009 OS << "<" << *ST->getMemOperand(); 6010 6011 if (ST->isTruncatingStore()) 6012 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6013 6014 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6015 if (*AM) 6016 OS << ", " << AM; 6017 6018 OS << ">"; 6019 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6020 OS << "<" << *M->getMemOperand() << ">"; 6021 } else if (const BlockAddressSDNode *BA = 6022 dyn_cast<BlockAddressSDNode>(this)) { 6023 OS << "<"; 6024 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6025 OS << ", "; 6026 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6027 OS << ">"; 6028 if (unsigned int TF = BA->getTargetFlags()) 6029 OS << " [TF=" << TF << ']'; 6030 } 6031 6032 if (G) 6033 if (unsigned Order = G->GetOrdering(this)) 6034 OS << " [ORD=" << Order << ']'; 6035 6036 if (getNodeId() != -1) 6037 OS << " [ID=" << getNodeId() << ']'; 6038 6039 DebugLoc dl = getDebugLoc(); 6040 if (G && !dl.isUnknown()) { 6041 DIScope 6042 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6043 OS << " dbg:"; 6044 // Omit the directory, since it's usually long and uninteresting. 6045 if (Scope.Verify()) 6046 OS << Scope.getFilename(); 6047 else 6048 OS << "<unknown>"; 6049 OS << ':' << dl.getLine(); 6050 if (dl.getCol() != 0) 6051 OS << ':' << dl.getCol(); 6052 } 6053} 6054 6055void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6056 print_types(OS, G); 6057 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6058 if (i) OS << ", "; else OS << " "; 6059 OS << (void*)getOperand(i).getNode(); 6060 if (unsigned RN = getOperand(i).getResNo()) 6061 OS << ":" << RN; 6062 } 6063 print_details(OS, G); 6064} 6065 6066static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6067 const SelectionDAG *G, unsigned depth, 6068 unsigned indent) 6069{ 6070 if (depth == 0) 6071 return; 6072 6073 OS.indent(indent); 6074 6075 N->print(OS, G); 6076 6077 if (depth < 1) 6078 return; 6079 6080 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6081 OS << '\n'; 6082 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6083 } 6084} 6085 6086void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6087 unsigned depth) const { 6088 printrWithDepthHelper(OS, this, G, depth, 0); 6089} 6090 6091void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6092 // Don't print impossibly deep things. 6093 printrWithDepth(OS, G, 100); 6094} 6095 6096void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6097 printrWithDepth(dbgs(), G, depth); 6098} 6099 6100void SDNode::dumprFull(const SelectionDAG *G) const { 6101 // Don't print impossibly deep things. 6102 dumprWithDepth(G, 100); 6103} 6104 6105static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6106 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6107 if (N->getOperand(i).getNode()->hasOneUse()) 6108 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6109 else 6110 dbgs() << "\n" << std::string(indent+2, ' ') 6111 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6112 6113 6114 dbgs() << "\n"; 6115 dbgs().indent(indent); 6116 N->dump(G); 6117} 6118 6119SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6120 assert(N->getNumValues() == 1 && 6121 "Can't unroll a vector with multiple results!"); 6122 6123 EVT VT = N->getValueType(0); 6124 unsigned NE = VT.getVectorNumElements(); 6125 EVT EltVT = VT.getVectorElementType(); 6126 DebugLoc dl = N->getDebugLoc(); 6127 6128 SmallVector<SDValue, 8> Scalars; 6129 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6130 6131 // If ResNE is 0, fully unroll the vector op. 6132 if (ResNE == 0) 6133 ResNE = NE; 6134 else if (NE > ResNE) 6135 NE = ResNE; 6136 6137 unsigned i; 6138 for (i= 0; i != NE; ++i) { 6139 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6140 SDValue Operand = N->getOperand(j); 6141 EVT OperandVT = Operand.getValueType(); 6142 if (OperandVT.isVector()) { 6143 // A vector operand; extract a single element. 6144 EVT OperandEltVT = OperandVT.getVectorElementType(); 6145 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6146 OperandEltVT, 6147 Operand, 6148 getConstant(i, MVT::i32)); 6149 } else { 6150 // A scalar operand; just use it as is. 6151 Operands[j] = Operand; 6152 } 6153 } 6154 6155 switch (N->getOpcode()) { 6156 default: 6157 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6158 &Operands[0], Operands.size())); 6159 break; 6160 case ISD::SHL: 6161 case ISD::SRA: 6162 case ISD::SRL: 6163 case ISD::ROTL: 6164 case ISD::ROTR: 6165 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6166 getShiftAmountOperand(Operands[1]))); 6167 break; 6168 case ISD::SIGN_EXTEND_INREG: 6169 case ISD::FP_ROUND_INREG: { 6170 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6171 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6172 Operands[0], 6173 getValueType(ExtVT))); 6174 } 6175 } 6176 } 6177 6178 for (; i < ResNE; ++i) 6179 Scalars.push_back(getUNDEF(EltVT)); 6180 6181 return getNode(ISD::BUILD_VECTOR, dl, 6182 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6183 &Scalars[0], Scalars.size()); 6184} 6185 6186 6187/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6188/// location that is 'Dist' units away from the location that the 'Base' load 6189/// is loading from. 6190bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6191 unsigned Bytes, int Dist) const { 6192 if (LD->getChain() != Base->getChain()) 6193 return false; 6194 EVT VT = LD->getValueType(0); 6195 if (VT.getSizeInBits() / 8 != Bytes) 6196 return false; 6197 6198 SDValue Loc = LD->getOperand(1); 6199 SDValue BaseLoc = Base->getOperand(1); 6200 if (Loc.getOpcode() == ISD::FrameIndex) { 6201 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6202 return false; 6203 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6204 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6205 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6206 int FS = MFI->getObjectSize(FI); 6207 int BFS = MFI->getObjectSize(BFI); 6208 if (FS != BFS || FS != (int)Bytes) return false; 6209 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6210 } 6211 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6212 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6213 if (V && (V->getSExtValue() == Dist*Bytes)) 6214 return true; 6215 } 6216 6217 const GlobalValue *GV1 = NULL; 6218 const GlobalValue *GV2 = NULL; 6219 int64_t Offset1 = 0; 6220 int64_t Offset2 = 0; 6221 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6222 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6223 if (isGA1 && isGA2 && GV1 == GV2) 6224 return Offset1 == (Offset2 + Dist*Bytes); 6225 return false; 6226} 6227 6228 6229/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6230/// it cannot be inferred. 6231unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6232 // If this is a GlobalAddress + cst, return the alignment. 6233 const GlobalValue *GV; 6234 int64_t GVOffset = 0; 6235 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6236 // If GV has specified alignment, then use it. Otherwise, use the preferred 6237 // alignment. 6238 unsigned Align = GV->getAlignment(); 6239 if (!Align) { 6240 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6241 if (GVar->hasInitializer()) { 6242 const TargetData *TD = TLI.getTargetData(); 6243 Align = TD->getPreferredAlignment(GVar); 6244 } 6245 } 6246 } 6247 return MinAlign(Align, GVOffset); 6248 } 6249 6250 // If this is a direct reference to a stack slot, use information about the 6251 // stack slot's alignment. 6252 int FrameIdx = 1 << 31; 6253 int64_t FrameOffset = 0; 6254 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6255 FrameIdx = FI->getIndex(); 6256 } else if (Ptr.getOpcode() == ISD::ADD && 6257 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6258 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6259 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6260 FrameOffset = Ptr.getConstantOperandVal(1); 6261 } 6262 6263 if (FrameIdx != (1 << 31)) { 6264 // FIXME: Handle FI+CST. 6265 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6266 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6267 FrameOffset); 6268 return FIInfoAlign; 6269 } 6270 6271 return 0; 6272} 6273 6274void SelectionDAG::dump() const { 6275 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6276 6277 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6278 I != E; ++I) { 6279 const SDNode *N = I; 6280 if (!N->hasOneUse() && N != getRoot().getNode()) 6281 DumpNodes(N, 2, this); 6282 } 6283 6284 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6285 6286 dbgs() << "\n\n"; 6287} 6288 6289void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6290 print_types(OS, G); 6291 print_details(OS, G); 6292} 6293 6294typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6295static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6296 const SelectionDAG *G, VisitedSDNodeSet &once) { 6297 if (!once.insert(N)) // If we've been here before, return now. 6298 return; 6299 6300 // Dump the current SDNode, but don't end the line yet. 6301 OS << std::string(indent, ' '); 6302 N->printr(OS, G); 6303 6304 // Having printed this SDNode, walk the children: 6305 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6306 const SDNode *child = N->getOperand(i).getNode(); 6307 6308 if (i) OS << ","; 6309 OS << " "; 6310 6311 if (child->getNumOperands() == 0) { 6312 // This child has no grandchildren; print it inline right here. 6313 child->printr(OS, G); 6314 once.insert(child); 6315 } else { // Just the address. FIXME: also print the child's opcode. 6316 OS << (void*)child; 6317 if (unsigned RN = N->getOperand(i).getResNo()) 6318 OS << ":" << RN; 6319 } 6320 } 6321 6322 OS << "\n"; 6323 6324 // Dump children that have grandchildren on their own line(s). 6325 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6326 const SDNode *child = N->getOperand(i).getNode(); 6327 DumpNodesr(OS, child, indent+2, G, once); 6328 } 6329} 6330 6331void SDNode::dumpr() const { 6332 VisitedSDNodeSet once; 6333 DumpNodesr(dbgs(), this, 0, 0, once); 6334} 6335 6336void SDNode::dumpr(const SelectionDAG *G) const { 6337 VisitedSDNodeSet once; 6338 DumpNodesr(dbgs(), this, 0, G, once); 6339} 6340 6341 6342// getAddressSpace - Return the address space this GlobalAddress belongs to. 6343unsigned GlobalAddressSDNode::getAddressSpace() const { 6344 return getGlobal()->getType()->getAddressSpace(); 6345} 6346 6347 6348const Type *ConstantPoolSDNode::getType() const { 6349 if (isMachineConstantPoolEntry()) 6350 return Val.MachineCPVal->getType(); 6351 return Val.ConstVal->getType(); 6352} 6353 6354bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6355 APInt &SplatUndef, 6356 unsigned &SplatBitSize, 6357 bool &HasAnyUndefs, 6358 unsigned MinSplatBits, 6359 bool isBigEndian) { 6360 EVT VT = getValueType(0); 6361 assert(VT.isVector() && "Expected a vector type"); 6362 unsigned sz = VT.getSizeInBits(); 6363 if (MinSplatBits > sz) 6364 return false; 6365 6366 SplatValue = APInt(sz, 0); 6367 SplatUndef = APInt(sz, 0); 6368 6369 // Get the bits. Bits with undefined values (when the corresponding element 6370 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6371 // in SplatValue. If any of the values are not constant, give up and return 6372 // false. 6373 unsigned int nOps = getNumOperands(); 6374 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6375 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6376 6377 for (unsigned j = 0; j < nOps; ++j) { 6378 unsigned i = isBigEndian ? nOps-1-j : j; 6379 SDValue OpVal = getOperand(i); 6380 unsigned BitPos = j * EltBitSize; 6381 6382 if (OpVal.getOpcode() == ISD::UNDEF) 6383 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6384 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6385 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6386 zextOrTrunc(sz) << BitPos; 6387 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6388 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6389 else 6390 return false; 6391 } 6392 6393 // The build_vector is all constants or undefs. Find the smallest element 6394 // size that splats the vector. 6395 6396 HasAnyUndefs = (SplatUndef != 0); 6397 while (sz > 8) { 6398 6399 unsigned HalfSize = sz / 2; 6400 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6401 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6402 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6403 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6404 6405 // If the two halves do not match (ignoring undef bits), stop here. 6406 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6407 MinSplatBits > HalfSize) 6408 break; 6409 6410 SplatValue = HighValue | LowValue; 6411 SplatUndef = HighUndef & LowUndef; 6412 6413 sz = HalfSize; 6414 } 6415 6416 SplatBitSize = sz; 6417 return true; 6418} 6419 6420bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6421 // Find the first non-undef value in the shuffle mask. 6422 unsigned i, e; 6423 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6424 /* search */; 6425 6426 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6427 6428 // Make sure all remaining elements are either undef or the same as the first 6429 // non-undef value. 6430 for (int Idx = Mask[i]; i != e; ++i) 6431 if (Mask[i] >= 0 && Mask[i] != Idx) 6432 return false; 6433 return true; 6434} 6435 6436#ifdef XDEBUG 6437static void checkForCyclesHelper(const SDNode *N, 6438 SmallPtrSet<const SDNode*, 32> &Visited, 6439 SmallPtrSet<const SDNode*, 32> &Checked) { 6440 // If this node has already been checked, don't check it again. 6441 if (Checked.count(N)) 6442 return; 6443 6444 // If a node has already been visited on this depth-first walk, reject it as 6445 // a cycle. 6446 if (!Visited.insert(N)) { 6447 dbgs() << "Offending node:\n"; 6448 N->dumprFull(); 6449 errs() << "Detected cycle in SelectionDAG\n"; 6450 abort(); 6451 } 6452 6453 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6454 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6455 6456 Checked.insert(N); 6457 Visited.erase(N); 6458} 6459#endif 6460 6461void llvm::checkForCycles(const llvm::SDNode *N) { 6462#ifdef XDEBUG 6463 assert(N && "Checking nonexistant SDNode"); 6464 SmallPtrSet<const SDNode*, 32> visited; 6465 SmallPtrSet<const SDNode*, 32> checked; 6466 checkForCyclesHelper(N, visited, checked); 6467#endif 6468} 6469 6470void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6471 checkForCycles(DAG->getRoot().getNode()); 6472} 6473