SelectionDAG.cpp revision bfcb3051899b7141a946d769fcf6e8a8453bc530
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/ValueTracking.h" 19#include "llvm/Function.h" 20#include "llvm/GlobalAlias.h" 21#include "llvm/GlobalVariable.h" 22#include "llvm/Intrinsics.h" 23#include "llvm/DerivedTypes.h" 24#include "llvm/Assembly/Writer.h" 25#include "llvm/CallingConv.h" 26#include "llvm/CodeGen/MachineBasicBlock.h" 27#include "llvm/CodeGen/MachineConstantPool.h" 28#include "llvm/CodeGen/MachineFrameInfo.h" 29#include "llvm/CodeGen/MachineModuleInfo.h" 30#include "llvm/CodeGen/PseudoSourceValue.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetFrameInfo.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/System/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f32: return &APFloat::IEEEsingle; 66 case MVT::f64: return &APFloat::IEEEdouble; 67 case MVT::f80: return &APFloat::x87DoubleExtended; 68 case MVT::f128: return &APFloat::IEEEquad; 69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 70 } 71} 72 73SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 74 75//===----------------------------------------------------------------------===// 76// ConstantFPSDNode Class 77//===----------------------------------------------------------------------===// 78 79/// isExactlyValue - We don't rely on operator== working on double values, as 80/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 81/// As such, this method can be used to do an exact bit-for-bit comparison of 82/// two floating point values. 83bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 84 return getValueAPF().bitwiseIsEqual(V); 85} 86 87bool ConstantFPSDNode::isValueValidForType(EVT VT, 88 const APFloat& Val) { 89 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 90 91 // PPC long double cannot be converted to any other type. 92 if (VT == MVT::ppcf128 || 93 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 94 return false; 95 96 // convert modifies in place, so make a copy. 97 APFloat Val2 = APFloat(Val); 98 bool losesInfo; 99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 100 &losesInfo); 101 return !losesInfo; 102} 103 104//===----------------------------------------------------------------------===// 105// ISD Namespace 106//===----------------------------------------------------------------------===// 107 108/// isBuildVectorAllOnes - Return true if the specified node is a 109/// BUILD_VECTOR where all of the elements are ~0 or undef. 110bool ISD::isBuildVectorAllOnes(const SDNode *N) { 111 // Look through a bit convert. 112 if (N->getOpcode() == ISD::BIT_CONVERT) 113 N = N->getOperand(0).getNode(); 114 115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 116 117 unsigned i = 0, e = N->getNumOperands(); 118 119 // Skip over all of the undef values. 120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 121 ++i; 122 123 // Do not accept an all-undef vector. 124 if (i == e) return false; 125 126 // Do not accept build_vectors that aren't all constants or which have non-~0 127 // elements. 128 SDValue NotZero = N->getOperand(i); 129 if (isa<ConstantSDNode>(NotZero)) { 130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 131 return false; 132 } else if (isa<ConstantFPSDNode>(NotZero)) { 133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 134 bitcastToAPInt().isAllOnesValue()) 135 return false; 136 } else 137 return false; 138 139 // Okay, we have at least one ~0 value, check to see if the rest match or are 140 // undefs. 141 for (++i; i != e; ++i) 142 if (N->getOperand(i) != NotZero && 143 N->getOperand(i).getOpcode() != ISD::UNDEF) 144 return false; 145 return true; 146} 147 148 149/// isBuildVectorAllZeros - Return true if the specified node is a 150/// BUILD_VECTOR where all of the elements are 0 or undef. 151bool ISD::isBuildVectorAllZeros(const SDNode *N) { 152 // Look through a bit convert. 153 if (N->getOpcode() == ISD::BIT_CONVERT) 154 N = N->getOperand(0).getNode(); 155 156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 157 158 unsigned i = 0, e = N->getNumOperands(); 159 160 // Skip over all of the undef values. 161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 162 ++i; 163 164 // Do not accept an all-undef vector. 165 if (i == e) return false; 166 167 // Do not accept build_vectors that aren't all constants or which have non-0 168 // elements. 169 SDValue Zero = N->getOperand(i); 170 if (isa<ConstantSDNode>(Zero)) { 171 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 172 return false; 173 } else if (isa<ConstantFPSDNode>(Zero)) { 174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 175 return false; 176 } else 177 return false; 178 179 // Okay, we have at least one 0 value, check to see if the rest match or are 180 // undefs. 181 for (++i; i != e; ++i) 182 if (N->getOperand(i) != Zero && 183 N->getOperand(i).getOpcode() != ISD::UNDEF) 184 return false; 185 return true; 186} 187 188/// isScalarToVector - Return true if the specified node is a 189/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 190/// element is not an undef. 191bool ISD::isScalarToVector(const SDNode *N) { 192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 193 return true; 194 195 if (N->getOpcode() != ISD::BUILD_VECTOR) 196 return false; 197 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 198 return false; 199 unsigned NumElems = N->getNumOperands(); 200 for (unsigned i = 1; i < NumElems; ++i) { 201 SDValue V = N->getOperand(i); 202 if (V.getOpcode() != ISD::UNDEF) 203 return false; 204 } 205 return true; 206} 207 208/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 209/// when given the operation for (X op Y). 210ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 211 // To perform this operation, we just need to swap the L and G bits of the 212 // operation. 213 unsigned OldL = (Operation >> 2) & 1; 214 unsigned OldG = (Operation >> 1) & 1; 215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 216 (OldL << 1) | // New G bit 217 (OldG << 2)); // New L bit. 218} 219 220/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 221/// 'op' is a valid SetCC operation. 222ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 223 unsigned Operation = Op; 224 if (isInteger) 225 Operation ^= 7; // Flip L, G, E bits, but not U. 226 else 227 Operation ^= 15; // Flip all of the condition bits. 228 229 if (Operation > ISD::SETTRUE2) 230 Operation &= ~8; // Don't let N and U bits get set. 231 232 return ISD::CondCode(Operation); 233} 234 235 236/// isSignedOp - For an integer comparison, return 1 if the comparison is a 237/// signed operation and 2 if the result is an unsigned comparison. Return zero 238/// if the operation does not depend on the sign of the input (setne and seteq). 239static int isSignedOp(ISD::CondCode Opcode) { 240 switch (Opcode) { 241 default: llvm_unreachable("Illegal integer setcc operation!"); 242 case ISD::SETEQ: 243 case ISD::SETNE: return 0; 244 case ISD::SETLT: 245 case ISD::SETLE: 246 case ISD::SETGT: 247 case ISD::SETGE: return 1; 248 case ISD::SETULT: 249 case ISD::SETULE: 250 case ISD::SETUGT: 251 case ISD::SETUGE: return 2; 252 } 253} 254 255/// getSetCCOrOperation - Return the result of a logical OR between different 256/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 257/// returns SETCC_INVALID if it is not possible to represent the resultant 258/// comparison. 259ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 260 bool isInteger) { 261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 262 // Cannot fold a signed integer setcc with an unsigned integer setcc. 263 return ISD::SETCC_INVALID; 264 265 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 266 267 // If the N and U bits get set then the resultant comparison DOES suddenly 268 // care about orderedness, and is true when ordered. 269 if (Op > ISD::SETTRUE2) 270 Op &= ~16; // Clear the U bit if the N bit is set. 271 272 // Canonicalize illegal integer setcc's. 273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 274 Op = ISD::SETNE; 275 276 return ISD::CondCode(Op); 277} 278 279/// getSetCCAndOperation - Return the result of a logical AND between different 280/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 281/// function returns zero if it is not possible to represent the resultant 282/// comparison. 283ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 284 bool isInteger) { 285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 286 // Cannot fold a signed setcc with an unsigned setcc. 287 return ISD::SETCC_INVALID; 288 289 // Combine all of the condition bits. 290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 291 292 // Canonicalize illegal integer setcc's. 293 if (isInteger) { 294 switch (Result) { 295 default: break; 296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 297 case ISD::SETOEQ: // SETEQ & SETU[LG]E 298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 301 } 302 } 303 304 return Result; 305} 306 307const TargetMachine &SelectionDAG::getTarget() const { 308 return MF->getTarget(); 309} 310 311//===----------------------------------------------------------------------===// 312// SDNode Profile Support 313//===----------------------------------------------------------------------===// 314 315/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 316/// 317static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 318 ID.AddInteger(OpC); 319} 320 321/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 322/// solely with their pointer. 323static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 324 ID.AddPointer(VTList.VTs); 325} 326 327/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 328/// 329static void AddNodeIDOperands(FoldingSetNodeID &ID, 330 const SDValue *Ops, unsigned NumOps) { 331 for (; NumOps; --NumOps, ++Ops) { 332 ID.AddPointer(Ops->getNode()); 333 ID.AddInteger(Ops->getResNo()); 334 } 335} 336 337/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 338/// 339static void AddNodeIDOperands(FoldingSetNodeID &ID, 340 const SDUse *Ops, unsigned NumOps) { 341 for (; NumOps; --NumOps, ++Ops) { 342 ID.AddPointer(Ops->getNode()); 343 ID.AddInteger(Ops->getResNo()); 344 } 345} 346 347static void AddNodeIDNode(FoldingSetNodeID &ID, 348 unsigned short OpC, SDVTList VTList, 349 const SDValue *OpList, unsigned N) { 350 AddNodeIDOpcode(ID, OpC); 351 AddNodeIDValueTypes(ID, VTList); 352 AddNodeIDOperands(ID, OpList, N); 353} 354 355/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 356/// the NodeID data. 357static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 358 switch (N->getOpcode()) { 359 case ISD::TargetExternalSymbol: 360 case ISD::ExternalSymbol: 361 llvm_unreachable("Should only be used on nodes with operands"); 362 default: break; // Normal nodes don't need extra info. 363 case ISD::TargetConstant: 364 case ISD::Constant: 365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 366 break; 367 case ISD::TargetConstantFP: 368 case ISD::ConstantFP: { 369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 370 break; 371 } 372 case ISD::TargetGlobalAddress: 373 case ISD::GlobalAddress: 374 case ISD::TargetGlobalTLSAddress: 375 case ISD::GlobalTLSAddress: { 376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 377 ID.AddPointer(GA->getGlobal()); 378 ID.AddInteger(GA->getOffset()); 379 ID.AddInteger(GA->getTargetFlags()); 380 break; 381 } 382 case ISD::BasicBlock: 383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 384 break; 385 case ISD::Register: 386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 387 break; 388 389 case ISD::SRCVALUE: 390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 391 break; 392 case ISD::FrameIndex: 393 case ISD::TargetFrameIndex: 394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 395 break; 396 case ISD::JumpTable: 397 case ISD::TargetJumpTable: 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 400 break; 401 case ISD::ConstantPool: 402 case ISD::TargetConstantPool: { 403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 404 ID.AddInteger(CP->getAlignment()); 405 ID.AddInteger(CP->getOffset()); 406 if (CP->isMachineConstantPoolEntry()) 407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 408 else 409 ID.AddPointer(CP->getConstVal()); 410 ID.AddInteger(CP->getTargetFlags()); 411 break; 412 } 413 case ISD::LOAD: { 414 const LoadSDNode *LD = cast<LoadSDNode>(N); 415 ID.AddInteger(LD->getMemoryVT().getRawBits()); 416 ID.AddInteger(LD->getRawSubclassData()); 417 break; 418 } 419 case ISD::STORE: { 420 const StoreSDNode *ST = cast<StoreSDNode>(N); 421 ID.AddInteger(ST->getMemoryVT().getRawBits()); 422 ID.AddInteger(ST->getRawSubclassData()); 423 break; 424 } 425 case ISD::ATOMIC_CMP_SWAP: 426 case ISD::ATOMIC_SWAP: 427 case ISD::ATOMIC_LOAD_ADD: 428 case ISD::ATOMIC_LOAD_SUB: 429 case ISD::ATOMIC_LOAD_AND: 430 case ISD::ATOMIC_LOAD_OR: 431 case ISD::ATOMIC_LOAD_XOR: 432 case ISD::ATOMIC_LOAD_NAND: 433 case ISD::ATOMIC_LOAD_MIN: 434 case ISD::ATOMIC_LOAD_MAX: 435 case ISD::ATOMIC_LOAD_UMIN: 436 case ISD::ATOMIC_LOAD_UMAX: { 437 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 438 ID.AddInteger(AT->getMemoryVT().getRawBits()); 439 ID.AddInteger(AT->getRawSubclassData()); 440 break; 441 } 442 case ISD::VECTOR_SHUFFLE: { 443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 445 i != e; ++i) 446 ID.AddInteger(SVN->getMaskElt(i)); 447 break; 448 } 449 case ISD::TargetBlockAddress: 450 case ISD::BlockAddress: { 451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 453 break; 454 } 455 } // end switch (N->getOpcode()) 456} 457 458/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 459/// data. 460static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 461 AddNodeIDOpcode(ID, N->getOpcode()); 462 // Add the return value info. 463 AddNodeIDValueTypes(ID, N->getVTList()); 464 // Add the operand info. 465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 466 467 // Handle SDNode leafs with special info. 468 AddNodeIDCustom(ID, N); 469} 470 471/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 472/// the CSE map that carries volatility, temporalness, indexing mode, and 473/// extension/truncation information. 474/// 475static inline unsigned 476encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 477 bool isNonTemporal) { 478 assert((ConvType & 3) == ConvType && 479 "ConvType may not require more than 2 bits!"); 480 assert((AM & 7) == AM && 481 "AM may not require more than 3 bits!"); 482 return ConvType | 483 (AM << 2) | 484 (isVolatile << 5) | 485 (isNonTemporal << 6); 486} 487 488//===----------------------------------------------------------------------===// 489// SelectionDAG Class 490//===----------------------------------------------------------------------===// 491 492/// doNotCSE - Return true if CSE should not be performed for this node. 493static bool doNotCSE(SDNode *N) { 494 if (N->getValueType(0) == MVT::Flag) 495 return true; // Never CSE anything that produces a flag. 496 497 switch (N->getOpcode()) { 498 default: break; 499 case ISD::HANDLENODE: 500 case ISD::EH_LABEL: 501 return true; // Never CSE these nodes. 502 } 503 504 // Check that remaining values produced are not flags. 505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 506 if (N->getValueType(i) == MVT::Flag) 507 return true; // Never CSE anything that produces a flag. 508 509 return false; 510} 511 512/// RemoveDeadNodes - This method deletes all unreachable nodes in the 513/// SelectionDAG. 514void SelectionDAG::RemoveDeadNodes() { 515 // Create a dummy node (which is not added to allnodes), that adds a reference 516 // to the root node, preventing it from being deleted. 517 HandleSDNode Dummy(getRoot()); 518 519 SmallVector<SDNode*, 128> DeadNodes; 520 521 // Add all obviously-dead nodes to the DeadNodes worklist. 522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 523 if (I->use_empty()) 524 DeadNodes.push_back(I); 525 526 RemoveDeadNodes(DeadNodes); 527 528 // If the root changed (e.g. it was a dead load, update the root). 529 setRoot(Dummy.getValue()); 530} 531 532/// RemoveDeadNodes - This method deletes the unreachable nodes in the 533/// given list, and any nodes that become unreachable as a result. 534void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 535 DAGUpdateListener *UpdateListener) { 536 537 // Process the worklist, deleting the nodes and adding their uses to the 538 // worklist. 539 while (!DeadNodes.empty()) { 540 SDNode *N = DeadNodes.pop_back_val(); 541 542 if (UpdateListener) 543 UpdateListener->NodeDeleted(N, 0); 544 545 // Take the node out of the appropriate CSE map. 546 RemoveNodeFromCSEMaps(N); 547 548 // Next, brutally remove the operand list. This is safe to do, as there are 549 // no cycles in the graph. 550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 551 SDUse &Use = *I++; 552 SDNode *Operand = Use.getNode(); 553 Use.set(SDValue()); 554 555 // Now that we removed this operand, see if there are no uses of it left. 556 if (Operand->use_empty()) 557 DeadNodes.push_back(Operand); 558 } 559 560 DeallocateNode(N); 561 } 562} 563 564void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 565 SmallVector<SDNode*, 16> DeadNodes(1, N); 566 RemoveDeadNodes(DeadNodes, UpdateListener); 567} 568 569void SelectionDAG::DeleteNode(SDNode *N) { 570 // First take this out of the appropriate CSE map. 571 RemoveNodeFromCSEMaps(N); 572 573 // Finally, remove uses due to operands of this node, remove from the 574 // AllNodes list, and delete the node. 575 DeleteNodeNotInCSEMaps(N); 576} 577 578void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 579 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 580 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 581 582 // Drop all of the operands and decrement used node's use counts. 583 N->DropOperands(); 584 585 DeallocateNode(N); 586} 587 588void SelectionDAG::DeallocateNode(SDNode *N) { 589 if (N->OperandsNeedDelete) 590 delete[] N->OperandList; 591 592 // Set the opcode to DELETED_NODE to help catch bugs when node 593 // memory is reallocated. 594 N->NodeType = ISD::DELETED_NODE; 595 596 NodeAllocator.Deallocate(AllNodes.remove(N)); 597 598 // Remove the ordering of this node. 599 Ordering->remove(N); 600 601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 604 DbgVals[i]->setIsInvalidated(); 605} 606 607/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 608/// correspond to it. This is useful when we're about to delete or repurpose 609/// the node. We don't want future request for structurally identical nodes 610/// to return N anymore. 611bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 612 bool Erased = false; 613 switch (N->getOpcode()) { 614 case ISD::EntryToken: 615 llvm_unreachable("EntryToken should not be in CSEMaps!"); 616 return false; 617 case ISD::HANDLENODE: return false; // noop. 618 case ISD::CONDCODE: 619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 620 "Cond code doesn't exist!"); 621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 623 break; 624 case ISD::ExternalSymbol: 625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 626 break; 627 case ISD::TargetExternalSymbol: { 628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 629 Erased = TargetExternalSymbols.erase( 630 std::pair<std::string,unsigned char>(ESN->getSymbol(), 631 ESN->getTargetFlags())); 632 break; 633 } 634 case ISD::VALUETYPE: { 635 EVT VT = cast<VTSDNode>(N)->getVT(); 636 if (VT.isExtended()) { 637 Erased = ExtendedValueTypeNodes.erase(VT); 638 } else { 639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 641 } 642 break; 643 } 644 default: 645 // Remove it from the CSE Map. 646 Erased = CSEMap.RemoveNode(N); 647 break; 648 } 649#ifndef NDEBUG 650 // Verify that the node was actually in one of the CSE maps, unless it has a 651 // flag result (which cannot be CSE'd) or is one of the special cases that are 652 // not subject to CSE. 653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 654 !N->isMachineOpcode() && !doNotCSE(N)) { 655 N->dump(this); 656 dbgs() << "\n"; 657 llvm_unreachable("Node is not in map!"); 658 } 659#endif 660 return Erased; 661} 662 663/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 664/// maps and modified in place. Add it back to the CSE maps, unless an identical 665/// node already exists, in which case transfer all its users to the existing 666/// node. This transfer can potentially trigger recursive merging. 667/// 668void 669SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 670 DAGUpdateListener *UpdateListener) { 671 // For node types that aren't CSE'd, just act as if no identical node 672 // already exists. 673 if (!doNotCSE(N)) { 674 SDNode *Existing = CSEMap.GetOrInsertNode(N); 675 if (Existing != N) { 676 // If there was already an existing matching node, use ReplaceAllUsesWith 677 // to replace the dead one with the existing one. This can cause 678 // recursive merging of other unrelated nodes down the line. 679 ReplaceAllUsesWith(N, Existing, UpdateListener); 680 681 // N is now dead. Inform the listener if it exists and delete it. 682 if (UpdateListener) 683 UpdateListener->NodeDeleted(N, Existing); 684 DeleteNodeNotInCSEMaps(N); 685 return; 686 } 687 } 688 689 // If the node doesn't already exist, we updated it. Inform a listener if 690 // it exists. 691 if (UpdateListener) 692 UpdateListener->NodeUpdated(N); 693} 694 695/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 696/// were replaced with those specified. If this node is never memoized, 697/// return null, otherwise return a pointer to the slot it would take. If a 698/// node already exists with these operands, the slot will be non-null. 699SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 700 void *&InsertPos) { 701 if (doNotCSE(N)) 702 return 0; 703 704 SDValue Ops[] = { Op }; 705 FoldingSetNodeID ID; 706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 707 AddNodeIDCustom(ID, N); 708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 709 return Node; 710} 711 712/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 713/// were replaced with those specified. If this node is never memoized, 714/// return null, otherwise return a pointer to the slot it would take. If a 715/// node already exists with these operands, the slot will be non-null. 716SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 717 SDValue Op1, SDValue Op2, 718 void *&InsertPos) { 719 if (doNotCSE(N)) 720 return 0; 721 722 SDValue Ops[] = { Op1, Op2 }; 723 FoldingSetNodeID ID; 724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 725 AddNodeIDCustom(ID, N); 726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 727 return Node; 728} 729 730 731/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 732/// were replaced with those specified. If this node is never memoized, 733/// return null, otherwise return a pointer to the slot it would take. If a 734/// node already exists with these operands, the slot will be non-null. 735SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 736 const SDValue *Ops,unsigned NumOps, 737 void *&InsertPos) { 738 if (doNotCSE(N)) 739 return 0; 740 741 FoldingSetNodeID ID; 742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 743 AddNodeIDCustom(ID, N); 744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 745 return Node; 746} 747 748/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 749void SelectionDAG::VerifyNode(SDNode *N) { 750 switch (N->getOpcode()) { 751 default: 752 break; 753 case ISD::BUILD_PAIR: { 754 EVT VT = N->getValueType(0); 755 assert(N->getNumValues() == 1 && "Too many results!"); 756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 757 "Wrong return type!"); 758 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 760 "Mismatched operand types!"); 761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 762 "Wrong operand type!"); 763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 764 "Wrong return type size"); 765 break; 766 } 767 case ISD::BUILD_VECTOR: { 768 assert(N->getNumValues() == 1 && "Too many results!"); 769 assert(N->getValueType(0).isVector() && "Wrong return type!"); 770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 771 "Wrong number of operands!"); 772 EVT EltVT = N->getValueType(0).getVectorElementType(); 773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 774 assert((I->getValueType() == EltVT || 775 (EltVT.isInteger() && I->getValueType().isInteger() && 776 EltVT.bitsLE(I->getValueType()))) && 777 "Wrong operand type!"); 778 break; 779 } 780 } 781} 782 783/// getEVTAlignment - Compute the default alignment value for the 784/// given type. 785/// 786unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 787 const Type *Ty = VT == MVT::iPTR ? 788 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 789 VT.getTypeForEVT(*getContext()); 790 791 return TLI.getTargetData()->getABITypeAlignment(Ty); 792} 793 794// EntryNode could meaningfully have debug info if we can find it... 795SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 796 : TLI(tli), FLI(fli), DW(0), 797 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(), 798 getVTList(MVT::Other)), 799 Root(getEntryNode()), Ordering(0) { 800 AllNodes.push_back(&EntryNode); 801 Ordering = new SDNodeOrdering(); 802 DbgInfo = new SDDbgInfo(); 803} 804 805void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 806 DwarfWriter *dw) { 807 MF = &mf; 808 MMI = mmi; 809 DW = dw; 810 Context = &mf.getFunction()->getContext(); 811} 812 813SelectionDAG::~SelectionDAG() { 814 allnodes_clear(); 815 delete Ordering; 816 DbgInfo->clear(); 817 delete DbgInfo; 818} 819 820void SelectionDAG::allnodes_clear() { 821 assert(&*AllNodes.begin() == &EntryNode); 822 AllNodes.remove(AllNodes.begin()); 823 while (!AllNodes.empty()) 824 DeallocateNode(AllNodes.begin()); 825} 826 827void SelectionDAG::clear() { 828 allnodes_clear(); 829 OperandAllocator.Reset(); 830 CSEMap.clear(); 831 832 ExtendedValueTypeNodes.clear(); 833 ExternalSymbols.clear(); 834 TargetExternalSymbols.clear(); 835 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 836 static_cast<CondCodeSDNode*>(0)); 837 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 838 static_cast<SDNode*>(0)); 839 840 EntryNode.UseList = 0; 841 AllNodes.push_back(&EntryNode); 842 Root = getEntryNode(); 843 delete Ordering; 844 Ordering = new SDNodeOrdering(); 845 delete DbgInfo; 846 DbgInfo = new SDDbgInfo(); 847} 848 849SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 850 return VT.bitsGT(Op.getValueType()) ? 851 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 852 getNode(ISD::TRUNCATE, DL, VT, Op); 853} 854 855SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 856 return VT.bitsGT(Op.getValueType()) ? 857 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 858 getNode(ISD::TRUNCATE, DL, VT, Op); 859} 860 861SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 862 assert(!VT.isVector() && 863 "getZeroExtendInReg should use the vector element type instead of " 864 "the vector type!"); 865 if (Op.getValueType() == VT) return Op; 866 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 867 APInt Imm = APInt::getLowBitsSet(BitWidth, 868 VT.getSizeInBits()); 869 return getNode(ISD::AND, DL, Op.getValueType(), Op, 870 getConstant(Imm, Op.getValueType())); 871} 872 873/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 874/// 875SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 876 EVT EltVT = VT.getScalarType(); 877 SDValue NegOne = 878 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 879 return getNode(ISD::XOR, DL, VT, Val, NegOne); 880} 881 882SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 883 EVT EltVT = VT.getScalarType(); 884 assert((EltVT.getSizeInBits() >= 64 || 885 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 886 "getConstant with a uint64_t value that doesn't fit in the type!"); 887 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 888} 889 890SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 891 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 892} 893 894SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 895 assert(VT.isInteger() && "Cannot create FP integer constant!"); 896 897 EVT EltVT = VT.getScalarType(); 898 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 899 "APInt size does not match type size!"); 900 901 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 902 FoldingSetNodeID ID; 903 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 904 ID.AddPointer(&Val); 905 void *IP = 0; 906 SDNode *N = NULL; 907 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 908 if (!VT.isVector()) 909 return SDValue(N, 0); 910 911 if (!N) { 912 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 913 CSEMap.InsertNode(N, IP); 914 AllNodes.push_back(N); 915 } 916 917 SDValue Result(N, 0); 918 if (VT.isVector()) { 919 SmallVector<SDValue, 8> Ops; 920 Ops.assign(VT.getVectorNumElements(), Result); 921 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 922 VT, &Ops[0], Ops.size()); 923 } 924 return Result; 925} 926 927SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 928 return getConstant(Val, TLI.getPointerTy(), isTarget); 929} 930 931 932SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 933 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 934} 935 936SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 937 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 938 939 EVT EltVT = VT.getScalarType(); 940 941 // Do the map lookup using the actual bit pattern for the floating point 942 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 943 // we don't have issues with SNANs. 944 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 945 FoldingSetNodeID ID; 946 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 947 ID.AddPointer(&V); 948 void *IP = 0; 949 SDNode *N = NULL; 950 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 951 if (!VT.isVector()) 952 return SDValue(N, 0); 953 954 if (!N) { 955 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 956 CSEMap.InsertNode(N, IP); 957 AllNodes.push_back(N); 958 } 959 960 SDValue Result(N, 0); 961 if (VT.isVector()) { 962 SmallVector<SDValue, 8> Ops; 963 Ops.assign(VT.getVectorNumElements(), Result); 964 // FIXME DebugLoc info might be appropriate here 965 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 966 VT, &Ops[0], Ops.size()); 967 } 968 return Result; 969} 970 971SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 972 EVT EltVT = VT.getScalarType(); 973 if (EltVT==MVT::f32) 974 return getConstantFP(APFloat((float)Val), VT, isTarget); 975 else 976 return getConstantFP(APFloat(Val), VT, isTarget); 977} 978 979SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 980 EVT VT, int64_t Offset, 981 bool isTargetGA, 982 unsigned char TargetFlags) { 983 assert((TargetFlags == 0 || isTargetGA) && 984 "Cannot set target flags on target-independent globals"); 985 986 // Truncate (with sign-extension) the offset value to the pointer size. 987 EVT PTy = TLI.getPointerTy(); 988 unsigned BitWidth = PTy.getSizeInBits(); 989 if (BitWidth < 64) 990 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 991 992 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 993 if (!GVar) { 994 // If GV is an alias then use the aliasee for determining thread-localness. 995 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 996 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 997 } 998 999 unsigned Opc; 1000 if (GVar && GVar->isThreadLocal()) 1001 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1002 else 1003 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1004 1005 FoldingSetNodeID ID; 1006 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1007 ID.AddPointer(GV); 1008 ID.AddInteger(Offset); 1009 ID.AddInteger(TargetFlags); 1010 void *IP = 0; 1011 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1012 return SDValue(E, 0); 1013 1014 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1015 Offset, TargetFlags); 1016 CSEMap.InsertNode(N, IP); 1017 AllNodes.push_back(N); 1018 return SDValue(N, 0); 1019} 1020 1021SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1022 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1023 FoldingSetNodeID ID; 1024 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1025 ID.AddInteger(FI); 1026 void *IP = 0; 1027 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1028 return SDValue(E, 0); 1029 1030 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1031 CSEMap.InsertNode(N, IP); 1032 AllNodes.push_back(N); 1033 return SDValue(N, 0); 1034} 1035 1036SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1037 unsigned char TargetFlags) { 1038 assert((TargetFlags == 0 || isTarget) && 1039 "Cannot set target flags on target-independent jump tables"); 1040 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1041 FoldingSetNodeID ID; 1042 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1043 ID.AddInteger(JTI); 1044 ID.AddInteger(TargetFlags); 1045 void *IP = 0; 1046 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1047 return SDValue(E, 0); 1048 1049 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1050 TargetFlags); 1051 CSEMap.InsertNode(N, IP); 1052 AllNodes.push_back(N); 1053 return SDValue(N, 0); 1054} 1055 1056SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1057 unsigned Alignment, int Offset, 1058 bool isTarget, 1059 unsigned char TargetFlags) { 1060 assert((TargetFlags == 0 || isTarget) && 1061 "Cannot set target flags on target-independent globals"); 1062 if (Alignment == 0) 1063 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1064 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1065 FoldingSetNodeID ID; 1066 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1067 ID.AddInteger(Alignment); 1068 ID.AddInteger(Offset); 1069 ID.AddPointer(C); 1070 ID.AddInteger(TargetFlags); 1071 void *IP = 0; 1072 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1073 return SDValue(E, 0); 1074 1075 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1076 Alignment, TargetFlags); 1077 CSEMap.InsertNode(N, IP); 1078 AllNodes.push_back(N); 1079 return SDValue(N, 0); 1080} 1081 1082 1083SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1084 unsigned Alignment, int Offset, 1085 bool isTarget, 1086 unsigned char TargetFlags) { 1087 assert((TargetFlags == 0 || isTarget) && 1088 "Cannot set target flags on target-independent globals"); 1089 if (Alignment == 0) 1090 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1091 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1092 FoldingSetNodeID ID; 1093 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1094 ID.AddInteger(Alignment); 1095 ID.AddInteger(Offset); 1096 C->AddSelectionDAGCSEId(ID); 1097 ID.AddInteger(TargetFlags); 1098 void *IP = 0; 1099 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1100 return SDValue(E, 0); 1101 1102 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1103 Alignment, TargetFlags); 1104 CSEMap.InsertNode(N, IP); 1105 AllNodes.push_back(N); 1106 return SDValue(N, 0); 1107} 1108 1109SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1110 FoldingSetNodeID ID; 1111 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1112 ID.AddPointer(MBB); 1113 void *IP = 0; 1114 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1115 return SDValue(E, 0); 1116 1117 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1118 CSEMap.InsertNode(N, IP); 1119 AllNodes.push_back(N); 1120 return SDValue(N, 0); 1121} 1122 1123SDValue SelectionDAG::getValueType(EVT VT) { 1124 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1125 ValueTypeNodes.size()) 1126 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1127 1128 SDNode *&N = VT.isExtended() ? 1129 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1130 1131 if (N) return SDValue(N, 0); 1132 N = new (NodeAllocator) VTSDNode(VT); 1133 AllNodes.push_back(N); 1134 return SDValue(N, 0); 1135} 1136 1137SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1138 SDNode *&N = ExternalSymbols[Sym]; 1139 if (N) return SDValue(N, 0); 1140 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1141 AllNodes.push_back(N); 1142 return SDValue(N, 0); 1143} 1144 1145SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1146 unsigned char TargetFlags) { 1147 SDNode *&N = 1148 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1149 TargetFlags)]; 1150 if (N) return SDValue(N, 0); 1151 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1152 AllNodes.push_back(N); 1153 return SDValue(N, 0); 1154} 1155 1156SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1157 if ((unsigned)Cond >= CondCodeNodes.size()) 1158 CondCodeNodes.resize(Cond+1); 1159 1160 if (CondCodeNodes[Cond] == 0) { 1161 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1162 CondCodeNodes[Cond] = N; 1163 AllNodes.push_back(N); 1164 } 1165 1166 return SDValue(CondCodeNodes[Cond], 0); 1167} 1168 1169// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1170// the shuffle mask M that point at N1 to point at N2, and indices that point 1171// N2 to point at N1. 1172static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1173 std::swap(N1, N2); 1174 int NElts = M.size(); 1175 for (int i = 0; i != NElts; ++i) { 1176 if (M[i] >= NElts) 1177 M[i] -= NElts; 1178 else if (M[i] >= 0) 1179 M[i] += NElts; 1180 } 1181} 1182 1183SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1184 SDValue N2, const int *Mask) { 1185 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1186 assert(VT.isVector() && N1.getValueType().isVector() && 1187 "Vector Shuffle VTs must be a vectors"); 1188 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1189 && "Vector Shuffle VTs must have same element type"); 1190 1191 // Canonicalize shuffle undef, undef -> undef 1192 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1193 return getUNDEF(VT); 1194 1195 // Validate that all indices in Mask are within the range of the elements 1196 // input to the shuffle. 1197 unsigned NElts = VT.getVectorNumElements(); 1198 SmallVector<int, 8> MaskVec; 1199 for (unsigned i = 0; i != NElts; ++i) { 1200 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1201 MaskVec.push_back(Mask[i]); 1202 } 1203 1204 // Canonicalize shuffle v, v -> v, undef 1205 if (N1 == N2) { 1206 N2 = getUNDEF(VT); 1207 for (unsigned i = 0; i != NElts; ++i) 1208 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1209 } 1210 1211 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1212 if (N1.getOpcode() == ISD::UNDEF) 1213 commuteShuffle(N1, N2, MaskVec); 1214 1215 // Canonicalize all index into lhs, -> shuffle lhs, undef 1216 // Canonicalize all index into rhs, -> shuffle rhs, undef 1217 bool AllLHS = true, AllRHS = true; 1218 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1219 for (unsigned i = 0; i != NElts; ++i) { 1220 if (MaskVec[i] >= (int)NElts) { 1221 if (N2Undef) 1222 MaskVec[i] = -1; 1223 else 1224 AllLHS = false; 1225 } else if (MaskVec[i] >= 0) { 1226 AllRHS = false; 1227 } 1228 } 1229 if (AllLHS && AllRHS) 1230 return getUNDEF(VT); 1231 if (AllLHS && !N2Undef) 1232 N2 = getUNDEF(VT); 1233 if (AllRHS) { 1234 N1 = getUNDEF(VT); 1235 commuteShuffle(N1, N2, MaskVec); 1236 } 1237 1238 // If Identity shuffle, or all shuffle in to undef, return that node. 1239 bool AllUndef = true; 1240 bool Identity = true; 1241 for (unsigned i = 0; i != NElts; ++i) { 1242 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1243 if (MaskVec[i] >= 0) AllUndef = false; 1244 } 1245 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1246 return N1; 1247 if (AllUndef) 1248 return getUNDEF(VT); 1249 1250 FoldingSetNodeID ID; 1251 SDValue Ops[2] = { N1, N2 }; 1252 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1253 for (unsigned i = 0; i != NElts; ++i) 1254 ID.AddInteger(MaskVec[i]); 1255 1256 void* IP = 0; 1257 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1258 return SDValue(E, 0); 1259 1260 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1261 // SDNode doesn't have access to it. This memory will be "leaked" when 1262 // the node is deallocated, but recovered when the NodeAllocator is released. 1263 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1264 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1265 1266 ShuffleVectorSDNode *N = 1267 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1268 CSEMap.InsertNode(N, IP); 1269 AllNodes.push_back(N); 1270 return SDValue(N, 0); 1271} 1272 1273SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1274 SDValue Val, SDValue DTy, 1275 SDValue STy, SDValue Rnd, SDValue Sat, 1276 ISD::CvtCode Code) { 1277 // If the src and dest types are the same and the conversion is between 1278 // integer types of the same sign or two floats, no conversion is necessary. 1279 if (DTy == STy && 1280 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1281 return Val; 1282 1283 FoldingSetNodeID ID; 1284 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1285 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1286 void* IP = 0; 1287 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1288 return SDValue(E, 0); 1289 1290 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1291 Code); 1292 CSEMap.InsertNode(N, IP); 1293 AllNodes.push_back(N); 1294 return SDValue(N, 0); 1295} 1296 1297SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1298 FoldingSetNodeID ID; 1299 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1300 ID.AddInteger(RegNo); 1301 void *IP = 0; 1302 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1303 return SDValue(E, 0); 1304 1305 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1306 CSEMap.InsertNode(N, IP); 1307 AllNodes.push_back(N); 1308 return SDValue(N, 0); 1309} 1310 1311SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1312 FoldingSetNodeID ID; 1313 SDValue Ops[] = { Root }; 1314 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1315 ID.AddPointer(Label); 1316 void *IP = 0; 1317 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1318 return SDValue(E, 0); 1319 1320 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1321 CSEMap.InsertNode(N, IP); 1322 AllNodes.push_back(N); 1323 return SDValue(N, 0); 1324} 1325 1326 1327SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT, 1328 bool isTarget, 1329 unsigned char TargetFlags) { 1330 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1331 1332 FoldingSetNodeID ID; 1333 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1334 ID.AddPointer(BA); 1335 ID.AddInteger(TargetFlags); 1336 void *IP = 0; 1337 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1338 return SDValue(E, 0); 1339 1340 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1341 CSEMap.InsertNode(N, IP); 1342 AllNodes.push_back(N); 1343 return SDValue(N, 0); 1344} 1345 1346SDValue SelectionDAG::getSrcValue(const Value *V) { 1347 assert((!V || V->getType()->isPointerTy()) && 1348 "SrcValue is not a pointer?"); 1349 1350 FoldingSetNodeID ID; 1351 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1352 ID.AddPointer(V); 1353 1354 void *IP = 0; 1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1356 return SDValue(E, 0); 1357 1358 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1359 CSEMap.InsertNode(N, IP); 1360 AllNodes.push_back(N); 1361 return SDValue(N, 0); 1362} 1363 1364/// getShiftAmountOperand - Return the specified value casted to 1365/// the target's desired shift amount type. 1366SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1367 EVT OpTy = Op.getValueType(); 1368 MVT ShTy = TLI.getShiftAmountTy(); 1369 if (OpTy == ShTy || OpTy.isVector()) return Op; 1370 1371 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1372 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1373} 1374 1375/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1376/// specified value type. 1377SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1378 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1379 unsigned ByteSize = VT.getStoreSize(); 1380 const Type *Ty = VT.getTypeForEVT(*getContext()); 1381 unsigned StackAlign = 1382 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1383 1384 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1385 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1386} 1387 1388/// CreateStackTemporary - Create a stack temporary suitable for holding 1389/// either of the specified value types. 1390SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1391 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1392 VT2.getStoreSizeInBits())/8; 1393 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1394 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1395 const TargetData *TD = TLI.getTargetData(); 1396 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1397 TD->getPrefTypeAlignment(Ty2)); 1398 1399 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1400 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1401 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1402} 1403 1404SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1405 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1406 // These setcc operations always fold. 1407 switch (Cond) { 1408 default: break; 1409 case ISD::SETFALSE: 1410 case ISD::SETFALSE2: return getConstant(0, VT); 1411 case ISD::SETTRUE: 1412 case ISD::SETTRUE2: return getConstant(1, VT); 1413 1414 case ISD::SETOEQ: 1415 case ISD::SETOGT: 1416 case ISD::SETOGE: 1417 case ISD::SETOLT: 1418 case ISD::SETOLE: 1419 case ISD::SETONE: 1420 case ISD::SETO: 1421 case ISD::SETUO: 1422 case ISD::SETUEQ: 1423 case ISD::SETUNE: 1424 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1425 break; 1426 } 1427 1428 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1429 const APInt &C2 = N2C->getAPIntValue(); 1430 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1431 const APInt &C1 = N1C->getAPIntValue(); 1432 1433 switch (Cond) { 1434 default: llvm_unreachable("Unknown integer setcc!"); 1435 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1436 case ISD::SETNE: return getConstant(C1 != C2, VT); 1437 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1438 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1439 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1440 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1441 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1442 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1443 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1444 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1445 } 1446 } 1447 } 1448 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1449 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1450 // No compile time operations on this type yet. 1451 if (N1C->getValueType(0) == MVT::ppcf128) 1452 return SDValue(); 1453 1454 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1455 switch (Cond) { 1456 default: break; 1457 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1458 return getUNDEF(VT); 1459 // fall through 1460 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1461 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1462 return getUNDEF(VT); 1463 // fall through 1464 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1465 R==APFloat::cmpLessThan, VT); 1466 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1467 return getUNDEF(VT); 1468 // fall through 1469 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1470 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1471 return getUNDEF(VT); 1472 // fall through 1473 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1474 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1475 return getUNDEF(VT); 1476 // fall through 1477 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1478 R==APFloat::cmpEqual, VT); 1479 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1480 return getUNDEF(VT); 1481 // fall through 1482 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1483 R==APFloat::cmpEqual, VT); 1484 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1485 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1486 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1487 R==APFloat::cmpEqual, VT); 1488 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1489 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1490 R==APFloat::cmpLessThan, VT); 1491 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1492 R==APFloat::cmpUnordered, VT); 1493 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1494 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1495 } 1496 } else { 1497 // Ensure that the constant occurs on the RHS. 1498 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1499 } 1500 } 1501 1502 // Could not fold it. 1503 return SDValue(); 1504} 1505 1506/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1507/// use this predicate to simplify operations downstream. 1508bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1509 // This predicate is not safe for vector operations. 1510 if (Op.getValueType().isVector()) 1511 return false; 1512 1513 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1514 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1515} 1516 1517/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1518/// this predicate to simplify operations downstream. Mask is known to be zero 1519/// for bits that V cannot have. 1520bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1521 unsigned Depth) const { 1522 APInt KnownZero, KnownOne; 1523 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1524 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1525 return (KnownZero & Mask) == Mask; 1526} 1527 1528/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1529/// known to be either zero or one and return them in the KnownZero/KnownOne 1530/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1531/// processing. 1532void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1533 APInt &KnownZero, APInt &KnownOne, 1534 unsigned Depth) const { 1535 unsigned BitWidth = Mask.getBitWidth(); 1536 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1537 "Mask size mismatches value type size!"); 1538 1539 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1540 if (Depth == 6 || Mask == 0) 1541 return; // Limit search depth. 1542 1543 APInt KnownZero2, KnownOne2; 1544 1545 switch (Op.getOpcode()) { 1546 case ISD::Constant: 1547 // We know all of the bits for a constant! 1548 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1549 KnownZero = ~KnownOne & Mask; 1550 return; 1551 case ISD::AND: 1552 // If either the LHS or the RHS are Zero, the result is zero. 1553 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1554 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1555 KnownZero2, KnownOne2, Depth+1); 1556 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1557 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1558 1559 // Output known-1 bits are only known if set in both the LHS & RHS. 1560 KnownOne &= KnownOne2; 1561 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1562 KnownZero |= KnownZero2; 1563 return; 1564 case ISD::OR: 1565 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1566 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1567 KnownZero2, KnownOne2, Depth+1); 1568 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1569 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1570 1571 // Output known-0 bits are only known if clear in both the LHS & RHS. 1572 KnownZero &= KnownZero2; 1573 // Output known-1 are known to be set if set in either the LHS | RHS. 1574 KnownOne |= KnownOne2; 1575 return; 1576 case ISD::XOR: { 1577 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1578 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1579 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1580 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1581 1582 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1583 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1584 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1585 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1586 KnownZero = KnownZeroOut; 1587 return; 1588 } 1589 case ISD::MUL: { 1590 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1591 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1592 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1593 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1594 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1595 1596 // If low bits are zero in either operand, output low known-0 bits. 1597 // Also compute a conserative estimate for high known-0 bits. 1598 // More trickiness is possible, but this is sufficient for the 1599 // interesting case of alignment computation. 1600 KnownOne.clear(); 1601 unsigned TrailZ = KnownZero.countTrailingOnes() + 1602 KnownZero2.countTrailingOnes(); 1603 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1604 KnownZero2.countLeadingOnes(), 1605 BitWidth) - BitWidth; 1606 1607 TrailZ = std::min(TrailZ, BitWidth); 1608 LeadZ = std::min(LeadZ, BitWidth); 1609 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1610 APInt::getHighBitsSet(BitWidth, LeadZ); 1611 KnownZero &= Mask; 1612 return; 1613 } 1614 case ISD::UDIV: { 1615 // For the purposes of computing leading zeros we can conservatively 1616 // treat a udiv as a logical right shift by the power of 2 known to 1617 // be less than the denominator. 1618 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1619 ComputeMaskedBits(Op.getOperand(0), 1620 AllOnes, KnownZero2, KnownOne2, Depth+1); 1621 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1622 1623 KnownOne2.clear(); 1624 KnownZero2.clear(); 1625 ComputeMaskedBits(Op.getOperand(1), 1626 AllOnes, KnownZero2, KnownOne2, Depth+1); 1627 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1628 if (RHSUnknownLeadingOnes != BitWidth) 1629 LeadZ = std::min(BitWidth, 1630 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1631 1632 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1633 return; 1634 } 1635 case ISD::SELECT: 1636 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1637 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1638 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1639 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1640 1641 // Only known if known in both the LHS and RHS. 1642 KnownOne &= KnownOne2; 1643 KnownZero &= KnownZero2; 1644 return; 1645 case ISD::SELECT_CC: 1646 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1647 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1648 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1649 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1650 1651 // Only known if known in both the LHS and RHS. 1652 KnownOne &= KnownOne2; 1653 KnownZero &= KnownZero2; 1654 return; 1655 case ISD::SADDO: 1656 case ISD::UADDO: 1657 case ISD::SSUBO: 1658 case ISD::USUBO: 1659 case ISD::SMULO: 1660 case ISD::UMULO: 1661 if (Op.getResNo() != 1) 1662 return; 1663 // The boolean result conforms to getBooleanContents. Fall through. 1664 case ISD::SETCC: 1665 // If we know the result of a setcc has the top bits zero, use this info. 1666 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1667 BitWidth > 1) 1668 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1669 return; 1670 case ISD::SHL: 1671 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1672 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1673 unsigned ShAmt = SA->getZExtValue(); 1674 1675 // If the shift count is an invalid immediate, don't do anything. 1676 if (ShAmt >= BitWidth) 1677 return; 1678 1679 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1680 KnownZero, KnownOne, Depth+1); 1681 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1682 KnownZero <<= ShAmt; 1683 KnownOne <<= ShAmt; 1684 // low bits known zero. 1685 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1686 } 1687 return; 1688 case ISD::SRL: 1689 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1690 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1691 unsigned ShAmt = SA->getZExtValue(); 1692 1693 // If the shift count is an invalid immediate, don't do anything. 1694 if (ShAmt >= BitWidth) 1695 return; 1696 1697 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1698 KnownZero, KnownOne, Depth+1); 1699 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1700 KnownZero = KnownZero.lshr(ShAmt); 1701 KnownOne = KnownOne.lshr(ShAmt); 1702 1703 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1704 KnownZero |= HighBits; // High bits known zero. 1705 } 1706 return; 1707 case ISD::SRA: 1708 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1709 unsigned ShAmt = SA->getZExtValue(); 1710 1711 // If the shift count is an invalid immediate, don't do anything. 1712 if (ShAmt >= BitWidth) 1713 return; 1714 1715 APInt InDemandedMask = (Mask << ShAmt); 1716 // If any of the demanded bits are produced by the sign extension, we also 1717 // demand the input sign bit. 1718 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1719 if (HighBits.getBoolValue()) 1720 InDemandedMask |= APInt::getSignBit(BitWidth); 1721 1722 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1723 Depth+1); 1724 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1725 KnownZero = KnownZero.lshr(ShAmt); 1726 KnownOne = KnownOne.lshr(ShAmt); 1727 1728 // Handle the sign bits. 1729 APInt SignBit = APInt::getSignBit(BitWidth); 1730 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1731 1732 if (KnownZero.intersects(SignBit)) { 1733 KnownZero |= HighBits; // New bits are known zero. 1734 } else if (KnownOne.intersects(SignBit)) { 1735 KnownOne |= HighBits; // New bits are known one. 1736 } 1737 } 1738 return; 1739 case ISD::SIGN_EXTEND_INREG: { 1740 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1741 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1742 1743 // Sign extension. Compute the demanded bits in the result that are not 1744 // present in the input. 1745 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1746 1747 APInt InSignBit = APInt::getSignBit(EBits); 1748 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1749 1750 // If the sign extended bits are demanded, we know that the sign 1751 // bit is demanded. 1752 InSignBit.zext(BitWidth); 1753 if (NewBits.getBoolValue()) 1754 InputDemandedBits |= InSignBit; 1755 1756 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1757 KnownZero, KnownOne, Depth+1); 1758 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1759 1760 // If the sign bit of the input is known set or clear, then we know the 1761 // top bits of the result. 1762 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1763 KnownZero |= NewBits; 1764 KnownOne &= ~NewBits; 1765 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1766 KnownOne |= NewBits; 1767 KnownZero &= ~NewBits; 1768 } else { // Input sign bit unknown 1769 KnownZero &= ~NewBits; 1770 KnownOne &= ~NewBits; 1771 } 1772 return; 1773 } 1774 case ISD::CTTZ: 1775 case ISD::CTLZ: 1776 case ISD::CTPOP: { 1777 unsigned LowBits = Log2_32(BitWidth)+1; 1778 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1779 KnownOne.clear(); 1780 return; 1781 } 1782 case ISD::LOAD: { 1783 if (ISD::isZEXTLoad(Op.getNode())) { 1784 LoadSDNode *LD = cast<LoadSDNode>(Op); 1785 EVT VT = LD->getMemoryVT(); 1786 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1787 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1788 } 1789 return; 1790 } 1791 case ISD::ZERO_EXTEND: { 1792 EVT InVT = Op.getOperand(0).getValueType(); 1793 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1794 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1795 APInt InMask = Mask; 1796 InMask.trunc(InBits); 1797 KnownZero.trunc(InBits); 1798 KnownOne.trunc(InBits); 1799 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1800 KnownZero.zext(BitWidth); 1801 KnownOne.zext(BitWidth); 1802 KnownZero |= NewBits; 1803 return; 1804 } 1805 case ISD::SIGN_EXTEND: { 1806 EVT InVT = Op.getOperand(0).getValueType(); 1807 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1808 APInt InSignBit = APInt::getSignBit(InBits); 1809 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1810 APInt InMask = Mask; 1811 InMask.trunc(InBits); 1812 1813 // If any of the sign extended bits are demanded, we know that the sign 1814 // bit is demanded. Temporarily set this bit in the mask for our callee. 1815 if (NewBits.getBoolValue()) 1816 InMask |= InSignBit; 1817 1818 KnownZero.trunc(InBits); 1819 KnownOne.trunc(InBits); 1820 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1821 1822 // Note if the sign bit is known to be zero or one. 1823 bool SignBitKnownZero = KnownZero.isNegative(); 1824 bool SignBitKnownOne = KnownOne.isNegative(); 1825 assert(!(SignBitKnownZero && SignBitKnownOne) && 1826 "Sign bit can't be known to be both zero and one!"); 1827 1828 // If the sign bit wasn't actually demanded by our caller, we don't 1829 // want it set in the KnownZero and KnownOne result values. Reset the 1830 // mask and reapply it to the result values. 1831 InMask = Mask; 1832 InMask.trunc(InBits); 1833 KnownZero &= InMask; 1834 KnownOne &= InMask; 1835 1836 KnownZero.zext(BitWidth); 1837 KnownOne.zext(BitWidth); 1838 1839 // If the sign bit is known zero or one, the top bits match. 1840 if (SignBitKnownZero) 1841 KnownZero |= NewBits; 1842 else if (SignBitKnownOne) 1843 KnownOne |= NewBits; 1844 return; 1845 } 1846 case ISD::ANY_EXTEND: { 1847 EVT InVT = Op.getOperand(0).getValueType(); 1848 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1849 APInt InMask = Mask; 1850 InMask.trunc(InBits); 1851 KnownZero.trunc(InBits); 1852 KnownOne.trunc(InBits); 1853 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1854 KnownZero.zext(BitWidth); 1855 KnownOne.zext(BitWidth); 1856 return; 1857 } 1858 case ISD::TRUNCATE: { 1859 EVT InVT = Op.getOperand(0).getValueType(); 1860 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1861 APInt InMask = Mask; 1862 InMask.zext(InBits); 1863 KnownZero.zext(InBits); 1864 KnownOne.zext(InBits); 1865 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1866 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1867 KnownZero.trunc(BitWidth); 1868 KnownOne.trunc(BitWidth); 1869 break; 1870 } 1871 case ISD::AssertZext: { 1872 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1873 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1874 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1875 KnownOne, Depth+1); 1876 KnownZero |= (~InMask) & Mask; 1877 return; 1878 } 1879 case ISD::FGETSIGN: 1880 // All bits are zero except the low bit. 1881 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1882 return; 1883 1884 case ISD::SUB: { 1885 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1886 // We know that the top bits of C-X are clear if X contains less bits 1887 // than C (i.e. no wrap-around can happen). For example, 20-X is 1888 // positive if we can prove that X is >= 0 and < 16. 1889 if (CLHS->getAPIntValue().isNonNegative()) { 1890 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1891 // NLZ can't be BitWidth with no sign bit 1892 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1893 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1894 Depth+1); 1895 1896 // If all of the MaskV bits are known to be zero, then we know the 1897 // output top bits are zero, because we now know that the output is 1898 // from [0-C]. 1899 if ((KnownZero2 & MaskV) == MaskV) { 1900 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1901 // Top bits known zero. 1902 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1903 } 1904 } 1905 } 1906 } 1907 // fall through 1908 case ISD::ADD: { 1909 // Output known-0 bits are known if clear or set in both the low clear bits 1910 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1911 // low 3 bits clear. 1912 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1913 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1914 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1915 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1916 1917 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1918 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1919 KnownZeroOut = std::min(KnownZeroOut, 1920 KnownZero2.countTrailingOnes()); 1921 1922 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1923 return; 1924 } 1925 case ISD::SREM: 1926 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1927 const APInt &RA = Rem->getAPIntValue().abs(); 1928 if (RA.isPowerOf2()) { 1929 APInt LowBits = RA - 1; 1930 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1931 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1932 1933 // The low bits of the first operand are unchanged by the srem. 1934 KnownZero = KnownZero2 & LowBits; 1935 KnownOne = KnownOne2 & LowBits; 1936 1937 // If the first operand is non-negative or has all low bits zero, then 1938 // the upper bits are all zero. 1939 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1940 KnownZero |= ~LowBits; 1941 1942 // If the first operand is negative and not all low bits are zero, then 1943 // the upper bits are all one. 1944 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1945 KnownOne |= ~LowBits; 1946 1947 KnownZero &= Mask; 1948 KnownOne &= Mask; 1949 1950 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1951 } 1952 } 1953 return; 1954 case ISD::UREM: { 1955 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1956 const APInt &RA = Rem->getAPIntValue(); 1957 if (RA.isPowerOf2()) { 1958 APInt LowBits = (RA - 1); 1959 APInt Mask2 = LowBits & Mask; 1960 KnownZero |= ~LowBits & Mask; 1961 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1962 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1963 break; 1964 } 1965 } 1966 1967 // Since the result is less than or equal to either operand, any leading 1968 // zero bits in either operand must also exist in the result. 1969 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1970 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1971 Depth+1); 1972 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1973 Depth+1); 1974 1975 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1976 KnownZero2.countLeadingOnes()); 1977 KnownOne.clear(); 1978 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1979 return; 1980 } 1981 default: 1982 // Allow the target to implement this method for its nodes. 1983 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1984 case ISD::INTRINSIC_WO_CHAIN: 1985 case ISD::INTRINSIC_W_CHAIN: 1986 case ISD::INTRINSIC_VOID: 1987 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1988 Depth); 1989 } 1990 return; 1991 } 1992} 1993 1994/// ComputeNumSignBits - Return the number of times the sign bit of the 1995/// register is replicated into the other bits. We know that at least 1 bit 1996/// is always equal to the sign bit (itself), but other cases can give us 1997/// information. For example, immediately after an "SRA X, 2", we know that 1998/// the top 3 bits are all equal to each other, so we return 3. 1999unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2000 EVT VT = Op.getValueType(); 2001 assert(VT.isInteger() && "Invalid VT!"); 2002 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2003 unsigned Tmp, Tmp2; 2004 unsigned FirstAnswer = 1; 2005 2006 if (Depth == 6) 2007 return 1; // Limit search depth. 2008 2009 switch (Op.getOpcode()) { 2010 default: break; 2011 case ISD::AssertSext: 2012 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2013 return VTBits-Tmp+1; 2014 case ISD::AssertZext: 2015 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2016 return VTBits-Tmp; 2017 2018 case ISD::Constant: { 2019 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2020 // If negative, return # leading ones. 2021 if (Val.isNegative()) 2022 return Val.countLeadingOnes(); 2023 2024 // Return # leading zeros. 2025 return Val.countLeadingZeros(); 2026 } 2027 2028 case ISD::SIGN_EXTEND: 2029 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2030 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2031 2032 case ISD::SIGN_EXTEND_INREG: 2033 // Max of the input and what this extends. 2034 Tmp = 2035 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2036 Tmp = VTBits-Tmp+1; 2037 2038 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2039 return std::max(Tmp, Tmp2); 2040 2041 case ISD::SRA: 2042 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2043 // SRA X, C -> adds C sign bits. 2044 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2045 Tmp += C->getZExtValue(); 2046 if (Tmp > VTBits) Tmp = VTBits; 2047 } 2048 return Tmp; 2049 case ISD::SHL: 2050 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2051 // shl destroys sign bits. 2052 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2053 if (C->getZExtValue() >= VTBits || // Bad shift. 2054 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2055 return Tmp - C->getZExtValue(); 2056 } 2057 break; 2058 case ISD::AND: 2059 case ISD::OR: 2060 case ISD::XOR: // NOT is handled here. 2061 // Logical binary ops preserve the number of sign bits at the worst. 2062 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2063 if (Tmp != 1) { 2064 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2065 FirstAnswer = std::min(Tmp, Tmp2); 2066 // We computed what we know about the sign bits as our first 2067 // answer. Now proceed to the generic code that uses 2068 // ComputeMaskedBits, and pick whichever answer is better. 2069 } 2070 break; 2071 2072 case ISD::SELECT: 2073 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2074 if (Tmp == 1) return 1; // Early out. 2075 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2076 return std::min(Tmp, Tmp2); 2077 2078 case ISD::SADDO: 2079 case ISD::UADDO: 2080 case ISD::SSUBO: 2081 case ISD::USUBO: 2082 case ISD::SMULO: 2083 case ISD::UMULO: 2084 if (Op.getResNo() != 1) 2085 break; 2086 // The boolean result conforms to getBooleanContents. Fall through. 2087 case ISD::SETCC: 2088 // If setcc returns 0/-1, all bits are sign bits. 2089 if (TLI.getBooleanContents() == 2090 TargetLowering::ZeroOrNegativeOneBooleanContent) 2091 return VTBits; 2092 break; 2093 case ISD::ROTL: 2094 case ISD::ROTR: 2095 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2096 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2097 2098 // Handle rotate right by N like a rotate left by 32-N. 2099 if (Op.getOpcode() == ISD::ROTR) 2100 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2101 2102 // If we aren't rotating out all of the known-in sign bits, return the 2103 // number that are left. This handles rotl(sext(x), 1) for example. 2104 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2105 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2106 } 2107 break; 2108 case ISD::ADD: 2109 // Add can have at most one carry bit. Thus we know that the output 2110 // is, at worst, one more bit than the inputs. 2111 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2112 if (Tmp == 1) return 1; // Early out. 2113 2114 // Special case decrementing a value (ADD X, -1): 2115 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2116 if (CRHS->isAllOnesValue()) { 2117 APInt KnownZero, KnownOne; 2118 APInt Mask = APInt::getAllOnesValue(VTBits); 2119 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2120 2121 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2122 // sign bits set. 2123 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2124 return VTBits; 2125 2126 // If we are subtracting one from a positive number, there is no carry 2127 // out of the result. 2128 if (KnownZero.isNegative()) 2129 return Tmp; 2130 } 2131 2132 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2133 if (Tmp2 == 1) return 1; 2134 return std::min(Tmp, Tmp2)-1; 2135 break; 2136 2137 case ISD::SUB: 2138 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2139 if (Tmp2 == 1) return 1; 2140 2141 // Handle NEG. 2142 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2143 if (CLHS->isNullValue()) { 2144 APInt KnownZero, KnownOne; 2145 APInt Mask = APInt::getAllOnesValue(VTBits); 2146 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2147 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2148 // sign bits set. 2149 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2150 return VTBits; 2151 2152 // If the input is known to be positive (the sign bit is known clear), 2153 // the output of the NEG has the same number of sign bits as the input. 2154 if (KnownZero.isNegative()) 2155 return Tmp2; 2156 2157 // Otherwise, we treat this like a SUB. 2158 } 2159 2160 // Sub can have at most one carry bit. Thus we know that the output 2161 // is, at worst, one more bit than the inputs. 2162 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2163 if (Tmp == 1) return 1; // Early out. 2164 return std::min(Tmp, Tmp2)-1; 2165 break; 2166 case ISD::TRUNCATE: 2167 // FIXME: it's tricky to do anything useful for this, but it is an important 2168 // case for targets like X86. 2169 break; 2170 } 2171 2172 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2173 if (Op.getOpcode() == ISD::LOAD) { 2174 LoadSDNode *LD = cast<LoadSDNode>(Op); 2175 unsigned ExtType = LD->getExtensionType(); 2176 switch (ExtType) { 2177 default: break; 2178 case ISD::SEXTLOAD: // '17' bits known 2179 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2180 return VTBits-Tmp+1; 2181 case ISD::ZEXTLOAD: // '16' bits known 2182 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2183 return VTBits-Tmp; 2184 } 2185 } 2186 2187 // Allow the target to implement this method for its nodes. 2188 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2189 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2190 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2191 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2192 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2193 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2194 } 2195 2196 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2197 // use this information. 2198 APInt KnownZero, KnownOne; 2199 APInt Mask = APInt::getAllOnesValue(VTBits); 2200 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2201 2202 if (KnownZero.isNegative()) { // sign bit is 0 2203 Mask = KnownZero; 2204 } else if (KnownOne.isNegative()) { // sign bit is 1; 2205 Mask = KnownOne; 2206 } else { 2207 // Nothing known. 2208 return FirstAnswer; 2209 } 2210 2211 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2212 // the number of identical bits in the top of the input value. 2213 Mask = ~Mask; 2214 Mask <<= Mask.getBitWidth()-VTBits; 2215 // Return # leading zeros. We use 'min' here in case Val was zero before 2216 // shifting. We don't want to return '64' as for an i32 "0". 2217 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2218} 2219 2220bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2221 // If we're told that NaNs won't happen, assume they won't. 2222 if (FiniteOnlyFPMath()) 2223 return true; 2224 2225 // If the value is a constant, we can obviously see if it is a NaN or not. 2226 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2227 return !C->getValueAPF().isNaN(); 2228 2229 // TODO: Recognize more cases here. 2230 2231 return false; 2232} 2233 2234bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2235 // If the value is a constant, we can obviously see if it is a zero or not. 2236 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2237 return !C->isZero(); 2238 2239 // TODO: Recognize more cases here. 2240 2241 return false; 2242} 2243 2244bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2245 // Check the obvious case. 2246 if (A == B) return true; 2247 2248 // For for negative and positive zero. 2249 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2250 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2251 if (CA->isZero() && CB->isZero()) return true; 2252 2253 // Otherwise they may not be equal. 2254 return false; 2255} 2256 2257bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2258 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2259 if (!GA) return false; 2260 if (GA->getOffset() != 0) return false; 2261 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2262 if (!GV) return false; 2263 MachineModuleInfo *MMI = getMachineModuleInfo(); 2264 return MMI && MMI->hasDebugInfo(); 2265} 2266 2267 2268/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2269/// element of the result of the vector shuffle. 2270SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2271 unsigned i) { 2272 EVT VT = N->getValueType(0); 2273 DebugLoc dl = N->getDebugLoc(); 2274 if (N->getMaskElt(i) < 0) 2275 return getUNDEF(VT.getVectorElementType()); 2276 unsigned Index = N->getMaskElt(i); 2277 unsigned NumElems = VT.getVectorNumElements(); 2278 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2279 Index %= NumElems; 2280 2281 if (V.getOpcode() == ISD::BIT_CONVERT) { 2282 V = V.getOperand(0); 2283 EVT VVT = V.getValueType(); 2284 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2285 return SDValue(); 2286 } 2287 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2288 return (Index == 0) ? V.getOperand(0) 2289 : getUNDEF(VT.getVectorElementType()); 2290 if (V.getOpcode() == ISD::BUILD_VECTOR) 2291 return V.getOperand(Index); 2292 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2293 return getShuffleScalarElt(SVN, Index); 2294 return SDValue(); 2295} 2296 2297 2298/// getNode - Gets or creates the specified node. 2299/// 2300SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2301 FoldingSetNodeID ID; 2302 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2303 void *IP = 0; 2304 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2305 return SDValue(E, 0); 2306 2307 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2308 CSEMap.InsertNode(N, IP); 2309 2310 AllNodes.push_back(N); 2311#ifndef NDEBUG 2312 VerifyNode(N); 2313#endif 2314 return SDValue(N, 0); 2315} 2316 2317SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2318 EVT VT, SDValue Operand) { 2319 // Constant fold unary operations with an integer constant operand. 2320 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2321 const APInt &Val = C->getAPIntValue(); 2322 switch (Opcode) { 2323 default: break; 2324 case ISD::SIGN_EXTEND: 2325 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2326 case ISD::ANY_EXTEND: 2327 case ISD::ZERO_EXTEND: 2328 case ISD::TRUNCATE: 2329 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2330 case ISD::UINT_TO_FP: 2331 case ISD::SINT_TO_FP: { 2332 const uint64_t zero[] = {0, 0}; 2333 // No compile time operations on ppcf128. 2334 if (VT == MVT::ppcf128) break; 2335 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2336 (void)apf.convertFromAPInt(Val, 2337 Opcode==ISD::SINT_TO_FP, 2338 APFloat::rmNearestTiesToEven); 2339 return getConstantFP(apf, VT); 2340 } 2341 case ISD::BIT_CONVERT: 2342 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2343 return getConstantFP(Val.bitsToFloat(), VT); 2344 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2345 return getConstantFP(Val.bitsToDouble(), VT); 2346 break; 2347 case ISD::BSWAP: 2348 return getConstant(Val.byteSwap(), VT); 2349 case ISD::CTPOP: 2350 return getConstant(Val.countPopulation(), VT); 2351 case ISD::CTLZ: 2352 return getConstant(Val.countLeadingZeros(), VT); 2353 case ISD::CTTZ: 2354 return getConstant(Val.countTrailingZeros(), VT); 2355 } 2356 } 2357 2358 // Constant fold unary operations with a floating point constant operand. 2359 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2360 APFloat V = C->getValueAPF(); // make copy 2361 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2362 switch (Opcode) { 2363 case ISD::FNEG: 2364 V.changeSign(); 2365 return getConstantFP(V, VT); 2366 case ISD::FABS: 2367 V.clearSign(); 2368 return getConstantFP(V, VT); 2369 case ISD::FP_ROUND: 2370 case ISD::FP_EXTEND: { 2371 bool ignored; 2372 // This can return overflow, underflow, or inexact; we don't care. 2373 // FIXME need to be more flexible about rounding mode. 2374 (void)V.convert(*EVTToAPFloatSemantics(VT), 2375 APFloat::rmNearestTiesToEven, &ignored); 2376 return getConstantFP(V, VT); 2377 } 2378 case ISD::FP_TO_SINT: 2379 case ISD::FP_TO_UINT: { 2380 integerPart x[2]; 2381 bool ignored; 2382 assert(integerPartWidth >= 64); 2383 // FIXME need to be more flexible about rounding mode. 2384 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2385 Opcode==ISD::FP_TO_SINT, 2386 APFloat::rmTowardZero, &ignored); 2387 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2388 break; 2389 APInt api(VT.getSizeInBits(), 2, x); 2390 return getConstant(api, VT); 2391 } 2392 case ISD::BIT_CONVERT: 2393 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2394 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2395 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2396 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2397 break; 2398 } 2399 } 2400 } 2401 2402 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2403 switch (Opcode) { 2404 case ISD::TokenFactor: 2405 case ISD::MERGE_VALUES: 2406 case ISD::CONCAT_VECTORS: 2407 return Operand; // Factor, merge or concat of one node? No need. 2408 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2409 case ISD::FP_EXTEND: 2410 assert(VT.isFloatingPoint() && 2411 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2412 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2413 assert((!VT.isVector() || 2414 VT.getVectorNumElements() == 2415 Operand.getValueType().getVectorNumElements()) && 2416 "Vector element count mismatch!"); 2417 if (Operand.getOpcode() == ISD::UNDEF) 2418 return getUNDEF(VT); 2419 break; 2420 case ISD::SIGN_EXTEND: 2421 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2422 "Invalid SIGN_EXTEND!"); 2423 if (Operand.getValueType() == VT) return Operand; // noop extension 2424 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2425 "Invalid sext node, dst < src!"); 2426 assert((!VT.isVector() || 2427 VT.getVectorNumElements() == 2428 Operand.getValueType().getVectorNumElements()) && 2429 "Vector element count mismatch!"); 2430 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2431 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2432 break; 2433 case ISD::ZERO_EXTEND: 2434 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2435 "Invalid ZERO_EXTEND!"); 2436 if (Operand.getValueType() == VT) return Operand; // noop extension 2437 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2438 "Invalid zext node, dst < src!"); 2439 assert((!VT.isVector() || 2440 VT.getVectorNumElements() == 2441 Operand.getValueType().getVectorNumElements()) && 2442 "Vector element count mismatch!"); 2443 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2444 return getNode(ISD::ZERO_EXTEND, DL, VT, 2445 Operand.getNode()->getOperand(0)); 2446 break; 2447 case ISD::ANY_EXTEND: 2448 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2449 "Invalid ANY_EXTEND!"); 2450 if (Operand.getValueType() == VT) return Operand; // noop extension 2451 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2452 "Invalid anyext node, dst < src!"); 2453 assert((!VT.isVector() || 2454 VT.getVectorNumElements() == 2455 Operand.getValueType().getVectorNumElements()) && 2456 "Vector element count mismatch!"); 2457 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2458 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2459 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2460 break; 2461 case ISD::TRUNCATE: 2462 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2463 "Invalid TRUNCATE!"); 2464 if (Operand.getValueType() == VT) return Operand; // noop truncate 2465 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2466 "Invalid truncate node, src < dst!"); 2467 assert((!VT.isVector() || 2468 VT.getVectorNumElements() == 2469 Operand.getValueType().getVectorNumElements()) && 2470 "Vector element count mismatch!"); 2471 if (OpOpcode == ISD::TRUNCATE) 2472 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2473 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2474 OpOpcode == ISD::ANY_EXTEND) { 2475 // If the source is smaller than the dest, we still need an extend. 2476 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2477 .bitsLT(VT.getScalarType())) 2478 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2479 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2480 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2481 else 2482 return Operand.getNode()->getOperand(0); 2483 } 2484 break; 2485 case ISD::BIT_CONVERT: 2486 // Basic sanity checking. 2487 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2488 && "Cannot BIT_CONVERT between types of different sizes!"); 2489 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2490 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2491 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2492 if (OpOpcode == ISD::UNDEF) 2493 return getUNDEF(VT); 2494 break; 2495 case ISD::SCALAR_TO_VECTOR: 2496 assert(VT.isVector() && !Operand.getValueType().isVector() && 2497 (VT.getVectorElementType() == Operand.getValueType() || 2498 (VT.getVectorElementType().isInteger() && 2499 Operand.getValueType().isInteger() && 2500 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2501 "Illegal SCALAR_TO_VECTOR node!"); 2502 if (OpOpcode == ISD::UNDEF) 2503 return getUNDEF(VT); 2504 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2505 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2506 isa<ConstantSDNode>(Operand.getOperand(1)) && 2507 Operand.getConstantOperandVal(1) == 0 && 2508 Operand.getOperand(0).getValueType() == VT) 2509 return Operand.getOperand(0); 2510 break; 2511 case ISD::FNEG: 2512 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2513 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2514 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2515 Operand.getNode()->getOperand(0)); 2516 if (OpOpcode == ISD::FNEG) // --X -> X 2517 return Operand.getNode()->getOperand(0); 2518 break; 2519 case ISD::FABS: 2520 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2521 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2522 break; 2523 } 2524 2525 SDNode *N; 2526 SDVTList VTs = getVTList(VT); 2527 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2528 FoldingSetNodeID ID; 2529 SDValue Ops[1] = { Operand }; 2530 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2531 void *IP = 0; 2532 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2533 return SDValue(E, 0); 2534 2535 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2536 CSEMap.InsertNode(N, IP); 2537 } else { 2538 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2539 } 2540 2541 AllNodes.push_back(N); 2542#ifndef NDEBUG 2543 VerifyNode(N); 2544#endif 2545 return SDValue(N, 0); 2546} 2547 2548SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2549 EVT VT, 2550 ConstantSDNode *Cst1, 2551 ConstantSDNode *Cst2) { 2552 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2553 2554 switch (Opcode) { 2555 case ISD::ADD: return getConstant(C1 + C2, VT); 2556 case ISD::SUB: return getConstant(C1 - C2, VT); 2557 case ISD::MUL: return getConstant(C1 * C2, VT); 2558 case ISD::UDIV: 2559 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2560 break; 2561 case ISD::UREM: 2562 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2563 break; 2564 case ISD::SDIV: 2565 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2566 break; 2567 case ISD::SREM: 2568 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2569 break; 2570 case ISD::AND: return getConstant(C1 & C2, VT); 2571 case ISD::OR: return getConstant(C1 | C2, VT); 2572 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2573 case ISD::SHL: return getConstant(C1 << C2, VT); 2574 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2575 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2576 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2577 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2578 default: break; 2579 } 2580 2581 return SDValue(); 2582} 2583 2584SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2585 SDValue N1, SDValue N2) { 2586 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2587 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2588 switch (Opcode) { 2589 default: break; 2590 case ISD::TokenFactor: 2591 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2592 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2593 // Fold trivial token factors. 2594 if (N1.getOpcode() == ISD::EntryToken) return N2; 2595 if (N2.getOpcode() == ISD::EntryToken) return N1; 2596 if (N1 == N2) return N1; 2597 break; 2598 case ISD::CONCAT_VECTORS: 2599 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2600 // one big BUILD_VECTOR. 2601 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2602 N2.getOpcode() == ISD::BUILD_VECTOR) { 2603 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2604 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2605 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2606 } 2607 break; 2608 case ISD::AND: 2609 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2610 N1.getValueType() == VT && "Binary operator types must match!"); 2611 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2612 // worth handling here. 2613 if (N2C && N2C->isNullValue()) 2614 return N2; 2615 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2616 return N1; 2617 break; 2618 case ISD::OR: 2619 case ISD::XOR: 2620 case ISD::ADD: 2621 case ISD::SUB: 2622 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2623 N1.getValueType() == VT && "Binary operator types must match!"); 2624 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2625 // it's worth handling here. 2626 if (N2C && N2C->isNullValue()) 2627 return N1; 2628 break; 2629 case ISD::UDIV: 2630 case ISD::UREM: 2631 case ISD::MULHU: 2632 case ISD::MULHS: 2633 case ISD::MUL: 2634 case ISD::SDIV: 2635 case ISD::SREM: 2636 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2637 // fall through 2638 case ISD::FADD: 2639 case ISD::FSUB: 2640 case ISD::FMUL: 2641 case ISD::FDIV: 2642 case ISD::FREM: 2643 if (UnsafeFPMath) { 2644 if (Opcode == ISD::FADD) { 2645 // 0+x --> x 2646 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2647 if (CFP->getValueAPF().isZero()) 2648 return N2; 2649 // x+0 --> x 2650 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2651 if (CFP->getValueAPF().isZero()) 2652 return N1; 2653 } else if (Opcode == ISD::FSUB) { 2654 // x-0 --> x 2655 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2656 if (CFP->getValueAPF().isZero()) 2657 return N1; 2658 } 2659 } 2660 assert(N1.getValueType() == N2.getValueType() && 2661 N1.getValueType() == VT && "Binary operator types must match!"); 2662 break; 2663 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2664 assert(N1.getValueType() == VT && 2665 N1.getValueType().isFloatingPoint() && 2666 N2.getValueType().isFloatingPoint() && 2667 "Invalid FCOPYSIGN!"); 2668 break; 2669 case ISD::SHL: 2670 case ISD::SRA: 2671 case ISD::SRL: 2672 case ISD::ROTL: 2673 case ISD::ROTR: 2674 assert(VT == N1.getValueType() && 2675 "Shift operators return type must be the same as their first arg"); 2676 assert(VT.isInteger() && N2.getValueType().isInteger() && 2677 "Shifts only work on integers"); 2678 2679 // Always fold shifts of i1 values so the code generator doesn't need to 2680 // handle them. Since we know the size of the shift has to be less than the 2681 // size of the value, the shift/rotate count is guaranteed to be zero. 2682 if (VT == MVT::i1) 2683 return N1; 2684 if (N2C && N2C->isNullValue()) 2685 return N1; 2686 break; 2687 case ISD::FP_ROUND_INREG: { 2688 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2689 assert(VT == N1.getValueType() && "Not an inreg round!"); 2690 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2691 "Cannot FP_ROUND_INREG integer types"); 2692 assert(EVT.isVector() == VT.isVector() && 2693 "FP_ROUND_INREG type should be vector iff the operand " 2694 "type is vector!"); 2695 assert((!EVT.isVector() || 2696 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2697 "Vector element counts must match in FP_ROUND_INREG"); 2698 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2699 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2700 break; 2701 } 2702 case ISD::FP_ROUND: 2703 assert(VT.isFloatingPoint() && 2704 N1.getValueType().isFloatingPoint() && 2705 VT.bitsLE(N1.getValueType()) && 2706 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2707 if (N1.getValueType() == VT) return N1; // noop conversion. 2708 break; 2709 case ISD::AssertSext: 2710 case ISD::AssertZext: { 2711 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2712 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2713 assert(VT.isInteger() && EVT.isInteger() && 2714 "Cannot *_EXTEND_INREG FP types"); 2715 assert(!EVT.isVector() && 2716 "AssertSExt/AssertZExt type should be the vector element type " 2717 "rather than the vector type!"); 2718 assert(EVT.bitsLE(VT) && "Not extending!"); 2719 if (VT == EVT) return N1; // noop assertion. 2720 break; 2721 } 2722 case ISD::SIGN_EXTEND_INREG: { 2723 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2724 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2725 assert(VT.isInteger() && EVT.isInteger() && 2726 "Cannot *_EXTEND_INREG FP types"); 2727 assert(EVT.isVector() == VT.isVector() && 2728 "SIGN_EXTEND_INREG type should be vector iff the operand " 2729 "type is vector!"); 2730 assert((!EVT.isVector() || 2731 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2732 "Vector element counts must match in SIGN_EXTEND_INREG"); 2733 assert(EVT.bitsLE(VT) && "Not extending!"); 2734 if (EVT == VT) return N1; // Not actually extending 2735 2736 if (N1C) { 2737 APInt Val = N1C->getAPIntValue(); 2738 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2739 Val <<= Val.getBitWidth()-FromBits; 2740 Val = Val.ashr(Val.getBitWidth()-FromBits); 2741 return getConstant(Val, VT); 2742 } 2743 break; 2744 } 2745 case ISD::EXTRACT_VECTOR_ELT: 2746 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2747 if (N1.getOpcode() == ISD::UNDEF) 2748 return getUNDEF(VT); 2749 2750 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2751 // expanding copies of large vectors from registers. 2752 if (N2C && 2753 N1.getOpcode() == ISD::CONCAT_VECTORS && 2754 N1.getNumOperands() > 0) { 2755 unsigned Factor = 2756 N1.getOperand(0).getValueType().getVectorNumElements(); 2757 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2758 N1.getOperand(N2C->getZExtValue() / Factor), 2759 getConstant(N2C->getZExtValue() % Factor, 2760 N2.getValueType())); 2761 } 2762 2763 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2764 // expanding large vector constants. 2765 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2766 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2767 EVT VEltTy = N1.getValueType().getVectorElementType(); 2768 if (Elt.getValueType() != VEltTy) { 2769 // If the vector element type is not legal, the BUILD_VECTOR operands 2770 // are promoted and implicitly truncated. Make that explicit here. 2771 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2772 } 2773 if (VT != VEltTy) { 2774 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2775 // result is implicitly extended. 2776 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2777 } 2778 return Elt; 2779 } 2780 2781 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2782 // operations are lowered to scalars. 2783 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2784 // If the indices are the same, return the inserted element else 2785 // if the indices are known different, extract the element from 2786 // the original vector. 2787 if (N1.getOperand(2) == N2) { 2788 if (VT == N1.getOperand(1).getValueType()) 2789 return N1.getOperand(1); 2790 else 2791 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2792 } else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2793 isa<ConstantSDNode>(N2)) 2794 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2795 } 2796 break; 2797 case ISD::EXTRACT_ELEMENT: 2798 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2799 assert(!N1.getValueType().isVector() && !VT.isVector() && 2800 (N1.getValueType().isInteger() == VT.isInteger()) && 2801 "Wrong types for EXTRACT_ELEMENT!"); 2802 2803 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2804 // 64-bit integers into 32-bit parts. Instead of building the extract of 2805 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2806 if (N1.getOpcode() == ISD::BUILD_PAIR) 2807 return N1.getOperand(N2C->getZExtValue()); 2808 2809 // EXTRACT_ELEMENT of a constant int is also very common. 2810 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2811 unsigned ElementSize = VT.getSizeInBits(); 2812 unsigned Shift = ElementSize * N2C->getZExtValue(); 2813 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2814 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2815 } 2816 break; 2817 case ISD::EXTRACT_SUBVECTOR: 2818 if (N1.getValueType() == VT) // Trivial extraction. 2819 return N1; 2820 break; 2821 } 2822 2823 if (N1C) { 2824 if (N2C) { 2825 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2826 if (SV.getNode()) return SV; 2827 } else { // Cannonicalize constant to RHS if commutative 2828 if (isCommutativeBinOp(Opcode)) { 2829 std::swap(N1C, N2C); 2830 std::swap(N1, N2); 2831 } 2832 } 2833 } 2834 2835 // Constant fold FP operations. 2836 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2837 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2838 if (N1CFP) { 2839 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2840 // Cannonicalize constant to RHS if commutative 2841 std::swap(N1CFP, N2CFP); 2842 std::swap(N1, N2); 2843 } else if (N2CFP && VT != MVT::ppcf128) { 2844 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2845 APFloat::opStatus s; 2846 switch (Opcode) { 2847 case ISD::FADD: 2848 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2849 if (s != APFloat::opInvalidOp) 2850 return getConstantFP(V1, VT); 2851 break; 2852 case ISD::FSUB: 2853 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2854 if (s!=APFloat::opInvalidOp) 2855 return getConstantFP(V1, VT); 2856 break; 2857 case ISD::FMUL: 2858 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2859 if (s!=APFloat::opInvalidOp) 2860 return getConstantFP(V1, VT); 2861 break; 2862 case ISD::FDIV: 2863 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2864 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2865 return getConstantFP(V1, VT); 2866 break; 2867 case ISD::FREM : 2868 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2869 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2870 return getConstantFP(V1, VT); 2871 break; 2872 case ISD::FCOPYSIGN: 2873 V1.copySign(V2); 2874 return getConstantFP(V1, VT); 2875 default: break; 2876 } 2877 } 2878 } 2879 2880 // Canonicalize an UNDEF to the RHS, even over a constant. 2881 if (N1.getOpcode() == ISD::UNDEF) { 2882 if (isCommutativeBinOp(Opcode)) { 2883 std::swap(N1, N2); 2884 } else { 2885 switch (Opcode) { 2886 case ISD::FP_ROUND_INREG: 2887 case ISD::SIGN_EXTEND_INREG: 2888 case ISD::SUB: 2889 case ISD::FSUB: 2890 case ISD::FDIV: 2891 case ISD::FREM: 2892 case ISD::SRA: 2893 return N1; // fold op(undef, arg2) -> undef 2894 case ISD::UDIV: 2895 case ISD::SDIV: 2896 case ISD::UREM: 2897 case ISD::SREM: 2898 case ISD::SRL: 2899 case ISD::SHL: 2900 if (!VT.isVector()) 2901 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2902 // For vectors, we can't easily build an all zero vector, just return 2903 // the LHS. 2904 return N2; 2905 } 2906 } 2907 } 2908 2909 // Fold a bunch of operators when the RHS is undef. 2910 if (N2.getOpcode() == ISD::UNDEF) { 2911 switch (Opcode) { 2912 case ISD::XOR: 2913 if (N1.getOpcode() == ISD::UNDEF) 2914 // Handle undef ^ undef -> 0 special case. This is a common 2915 // idiom (misuse). 2916 return getConstant(0, VT); 2917 // fallthrough 2918 case ISD::ADD: 2919 case ISD::ADDC: 2920 case ISD::ADDE: 2921 case ISD::SUB: 2922 case ISD::UDIV: 2923 case ISD::SDIV: 2924 case ISD::UREM: 2925 case ISD::SREM: 2926 return N2; // fold op(arg1, undef) -> undef 2927 case ISD::FADD: 2928 case ISD::FSUB: 2929 case ISD::FMUL: 2930 case ISD::FDIV: 2931 case ISD::FREM: 2932 if (UnsafeFPMath) 2933 return N2; 2934 break; 2935 case ISD::MUL: 2936 case ISD::AND: 2937 case ISD::SRL: 2938 case ISD::SHL: 2939 if (!VT.isVector()) 2940 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2941 // For vectors, we can't easily build an all zero vector, just return 2942 // the LHS. 2943 return N1; 2944 case ISD::OR: 2945 if (!VT.isVector()) 2946 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2947 // For vectors, we can't easily build an all one vector, just return 2948 // the LHS. 2949 return N1; 2950 case ISD::SRA: 2951 return N1; 2952 } 2953 } 2954 2955 // Memoize this node if possible. 2956 SDNode *N; 2957 SDVTList VTs = getVTList(VT); 2958 if (VT != MVT::Flag) { 2959 SDValue Ops[] = { N1, N2 }; 2960 FoldingSetNodeID ID; 2961 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2962 void *IP = 0; 2963 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2964 return SDValue(E, 0); 2965 2966 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2967 CSEMap.InsertNode(N, IP); 2968 } else { 2969 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2970 } 2971 2972 AllNodes.push_back(N); 2973#ifndef NDEBUG 2974 VerifyNode(N); 2975#endif 2976 return SDValue(N, 0); 2977} 2978 2979SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2980 SDValue N1, SDValue N2, SDValue N3) { 2981 // Perform various simplifications. 2982 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2983 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2984 switch (Opcode) { 2985 case ISD::CONCAT_VECTORS: 2986 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2987 // one big BUILD_VECTOR. 2988 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2989 N2.getOpcode() == ISD::BUILD_VECTOR && 2990 N3.getOpcode() == ISD::BUILD_VECTOR) { 2991 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2992 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2993 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2994 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2995 } 2996 break; 2997 case ISD::SETCC: { 2998 // Use FoldSetCC to simplify SETCC's. 2999 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3000 if (Simp.getNode()) return Simp; 3001 break; 3002 } 3003 case ISD::SELECT: 3004 if (N1C) { 3005 if (N1C->getZExtValue()) 3006 return N2; // select true, X, Y -> X 3007 else 3008 return N3; // select false, X, Y -> Y 3009 } 3010 3011 if (N2 == N3) return N2; // select C, X, X -> X 3012 break; 3013 case ISD::BRCOND: 3014 if (N2C) { 3015 if (N2C->getZExtValue()) // Unconditional branch 3016 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3017 else 3018 return N1; // Never-taken branch 3019 } 3020 break; 3021 case ISD::VECTOR_SHUFFLE: 3022 llvm_unreachable("should use getVectorShuffle constructor!"); 3023 break; 3024 case ISD::BIT_CONVERT: 3025 // Fold bit_convert nodes from a type to themselves. 3026 if (N1.getValueType() == VT) 3027 return N1; 3028 break; 3029 } 3030 3031 // Memoize node if it doesn't produce a flag. 3032 SDNode *N; 3033 SDVTList VTs = getVTList(VT); 3034 if (VT != MVT::Flag) { 3035 SDValue Ops[] = { N1, N2, N3 }; 3036 FoldingSetNodeID ID; 3037 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3038 void *IP = 0; 3039 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3040 return SDValue(E, 0); 3041 3042 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3043 CSEMap.InsertNode(N, IP); 3044 } else { 3045 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3046 } 3047 3048 AllNodes.push_back(N); 3049#ifndef NDEBUG 3050 VerifyNode(N); 3051#endif 3052 return SDValue(N, 0); 3053} 3054 3055SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3056 SDValue N1, SDValue N2, SDValue N3, 3057 SDValue N4) { 3058 SDValue Ops[] = { N1, N2, N3, N4 }; 3059 return getNode(Opcode, DL, VT, Ops, 4); 3060} 3061 3062SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3063 SDValue N1, SDValue N2, SDValue N3, 3064 SDValue N4, SDValue N5) { 3065 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3066 return getNode(Opcode, DL, VT, Ops, 5); 3067} 3068 3069/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3070/// the incoming stack arguments to be loaded from the stack. 3071SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3072 SmallVector<SDValue, 8> ArgChains; 3073 3074 // Include the original chain at the beginning of the list. When this is 3075 // used by target LowerCall hooks, this helps legalize find the 3076 // CALLSEQ_BEGIN node. 3077 ArgChains.push_back(Chain); 3078 3079 // Add a chain value for each stack argument. 3080 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3081 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3082 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3083 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3084 if (FI->getIndex() < 0) 3085 ArgChains.push_back(SDValue(L, 1)); 3086 3087 // Build a tokenfactor for all the chains. 3088 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3089 &ArgChains[0], ArgChains.size()); 3090} 3091 3092/// getMemsetValue - Vectorized representation of the memset value 3093/// operand. 3094static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3095 DebugLoc dl) { 3096 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3097 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3098 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3099 unsigned Shift = 8; 3100 for (unsigned i = NumBits; i > 8; i >>= 1) { 3101 Val = (Val << Shift) | Val; 3102 Shift <<= 1; 3103 } 3104 if (VT.isInteger()) 3105 return DAG.getConstant(Val, VT); 3106 return DAG.getConstantFP(APFloat(Val), VT); 3107 } 3108 3109 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3110 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3111 unsigned Shift = 8; 3112 for (unsigned i = NumBits; i > 8; i >>= 1) { 3113 Value = DAG.getNode(ISD::OR, dl, VT, 3114 DAG.getNode(ISD::SHL, dl, VT, Value, 3115 DAG.getConstant(Shift, 3116 TLI.getShiftAmountTy())), 3117 Value); 3118 Shift <<= 1; 3119 } 3120 3121 return Value; 3122} 3123 3124/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3125/// used when a memcpy is turned into a memset when the source is a constant 3126/// string ptr. 3127static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3128 const TargetLowering &TLI, 3129 std::string &Str, unsigned Offset) { 3130 // Handle vector with all elements zero. 3131 if (Str.empty()) { 3132 if (VT.isInteger()) 3133 return DAG.getConstant(0, VT); 3134 unsigned NumElts = VT.getVectorNumElements(); 3135 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3136 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3137 DAG.getConstant(0, 3138 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts))); 3139 } 3140 3141 assert(!VT.isVector() && "Can't handle vector type here!"); 3142 unsigned NumBits = VT.getSizeInBits(); 3143 unsigned MSB = NumBits / 8; 3144 uint64_t Val = 0; 3145 if (TLI.isLittleEndian()) 3146 Offset = Offset + MSB - 1; 3147 for (unsigned i = 0; i != MSB; ++i) { 3148 Val = (Val << 8) | (unsigned char)Str[Offset]; 3149 Offset += TLI.isLittleEndian() ? -1 : 1; 3150 } 3151 return DAG.getConstant(Val, VT); 3152} 3153 3154/// getMemBasePlusOffset - Returns base and offset node for the 3155/// 3156static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3157 SelectionDAG &DAG) { 3158 EVT VT = Base.getValueType(); 3159 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3160 VT, Base, DAG.getConstant(Offset, VT)); 3161} 3162 3163/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3164/// 3165static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3166 unsigned SrcDelta = 0; 3167 GlobalAddressSDNode *G = NULL; 3168 if (Src.getOpcode() == ISD::GlobalAddress) 3169 G = cast<GlobalAddressSDNode>(Src); 3170 else if (Src.getOpcode() == ISD::ADD && 3171 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3172 Src.getOperand(1).getOpcode() == ISD::Constant) { 3173 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3174 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3175 } 3176 if (!G) 3177 return false; 3178 3179 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3180 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3181 return true; 3182 3183 return false; 3184} 3185 3186/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3187/// to replace the memset / memcpy is below the threshold. It also returns the 3188/// types of the sequence of memory ops to perform memset / memcpy. 3189static 3190bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps, 3191 SDValue Dst, SDValue Src, 3192 unsigned Limit, uint64_t Size, unsigned &Align, 3193 std::string &Str, bool &isSrcStr, 3194 SelectionDAG &DAG, 3195 const TargetLowering &TLI) { 3196 isSrcStr = isMemSrcFromString(Src, Str); 3197 bool isSrcConst = isa<ConstantSDNode>(Src); 3198 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); 3199 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT); 3200 if (VT != MVT::Other) { 3201 const Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3202 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3203 // If source is a string constant, this will require an unaligned load. 3204 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3205 if (Dst.getOpcode() != ISD::FrameIndex) { 3206 // Can't change destination alignment. It requires a unaligned store. 3207 if (AllowUnalign) 3208 VT = MVT::Other; 3209 } else { 3210 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3211 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3212 if (MFI->isFixedObjectIndex(FI)) { 3213 // Can't change destination alignment. It requires a unaligned store. 3214 if (AllowUnalign) 3215 VT = MVT::Other; 3216 } else { 3217 // Give the stack frame object a larger alignment if needed. 3218 if (MFI->getObjectAlignment(FI) < NewAlign) 3219 MFI->setObjectAlignment(FI, NewAlign); 3220 Align = NewAlign; 3221 } 3222 } 3223 } 3224 } 3225 3226 if (VT == MVT::Other) { 3227 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) { 3228 VT = MVT::i64; 3229 } else { 3230 switch (Align & 7) { 3231 case 0: VT = MVT::i64; break; 3232 case 4: VT = MVT::i32; break; 3233 case 2: VT = MVT::i16; break; 3234 default: VT = MVT::i8; break; 3235 } 3236 } 3237 3238 MVT LVT = MVT::i64; 3239 while (!TLI.isTypeLegal(LVT)) 3240 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3241 assert(LVT.isInteger()); 3242 3243 if (VT.bitsGT(LVT)) 3244 VT = LVT; 3245 } 3246 3247 unsigned NumMemOps = 0; 3248 while (Size != 0) { 3249 unsigned VTSize = VT.getSizeInBits() / 8; 3250 while (VTSize > Size) { 3251 // For now, only use non-vector load / store's for the left-over pieces. 3252 if (VT.isVector()) { 3253 VT = MVT::i64; 3254 while (!TLI.isTypeLegal(VT)) 3255 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3256 VTSize = VT.getSizeInBits() / 8; 3257 } else { 3258 // This can result in a type that is not legal on the target, e.g. 3259 // 1 or 2 bytes on PPC. 3260 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3261 VTSize >>= 1; 3262 } 3263 } 3264 3265 if (++NumMemOps > Limit) 3266 return false; 3267 MemOps.push_back(VT); 3268 Size -= VTSize; 3269 } 3270 3271 return true; 3272} 3273 3274static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3275 SDValue Chain, SDValue Dst, 3276 SDValue Src, uint64_t Size, 3277 unsigned Align, bool AlwaysInline, 3278 const Value *DstSV, uint64_t DstSVOff, 3279 const Value *SrcSV, uint64_t SrcSVOff){ 3280 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3281 3282 // Expand memcpy to a series of load and store ops if the size operand falls 3283 // below a certain threshold. 3284 std::vector<EVT> MemOps; 3285 uint64_t Limit = -1ULL; 3286 if (!AlwaysInline) 3287 Limit = TLI.getMaxStoresPerMemcpy(); 3288 unsigned DstAlign = Align; // Destination alignment can change. 3289 std::string Str; 3290 bool CopyFromStr; 3291 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3292 Str, CopyFromStr, DAG, TLI)) 3293 return SDValue(); 3294 3295 3296 bool isZeroStr = CopyFromStr && Str.empty(); 3297 SmallVector<SDValue, 8> OutChains; 3298 unsigned NumMemOps = MemOps.size(); 3299 uint64_t SrcOff = 0, DstOff = 0; 3300 for (unsigned i = 0; i != NumMemOps; ++i) { 3301 EVT VT = MemOps[i]; 3302 unsigned VTSize = VT.getSizeInBits() / 8; 3303 SDValue Value, Store; 3304 3305 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3306 // It's unlikely a store of a vector immediate can be done in a single 3307 // instruction. It would require a load from a constantpool first. 3308 // We also handle store a vector with all zero's. 3309 // FIXME: Handle other cases where store of vector immediate is done in 3310 // a single instruction. 3311 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3312 Store = DAG.getStore(Chain, dl, Value, 3313 getMemBasePlusOffset(Dst, DstOff, DAG), 3314 DstSV, DstSVOff + DstOff, false, false, DstAlign); 3315 } else { 3316 // The type might not be legal for the target. This should only happen 3317 // if the type is smaller than a legal type, as on PPC, so the right 3318 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3319 // to Load/Store if NVT==VT. 3320 // FIXME does the case above also need this? 3321 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3322 assert(NVT.bitsGE(VT)); 3323 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3324 getMemBasePlusOffset(Src, SrcOff, DAG), 3325 SrcSV, SrcSVOff + SrcOff, VT, false, false, Align); 3326 Store = DAG.getTruncStore(Chain, dl, Value, 3327 getMemBasePlusOffset(Dst, DstOff, DAG), 3328 DstSV, DstSVOff + DstOff, VT, false, false, 3329 DstAlign); 3330 } 3331 OutChains.push_back(Store); 3332 SrcOff += VTSize; 3333 DstOff += VTSize; 3334 } 3335 3336 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3337 &OutChains[0], OutChains.size()); 3338} 3339 3340static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3341 SDValue Chain, SDValue Dst, 3342 SDValue Src, uint64_t Size, 3343 unsigned Align, bool AlwaysInline, 3344 const Value *DstSV, uint64_t DstSVOff, 3345 const Value *SrcSV, uint64_t SrcSVOff){ 3346 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3347 3348 // Expand memmove to a series of load and store ops if the size operand falls 3349 // below a certain threshold. 3350 std::vector<EVT> MemOps; 3351 uint64_t Limit = -1ULL; 3352 if (!AlwaysInline) 3353 Limit = TLI.getMaxStoresPerMemmove(); 3354 unsigned DstAlign = Align; // Destination alignment can change. 3355 std::string Str; 3356 bool CopyFromStr; 3357 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3358 Str, CopyFromStr, DAG, TLI)) 3359 return SDValue(); 3360 3361 uint64_t SrcOff = 0, DstOff = 0; 3362 3363 SmallVector<SDValue, 8> LoadValues; 3364 SmallVector<SDValue, 8> LoadChains; 3365 SmallVector<SDValue, 8> OutChains; 3366 unsigned NumMemOps = MemOps.size(); 3367 for (unsigned i = 0; i < NumMemOps; i++) { 3368 EVT VT = MemOps[i]; 3369 unsigned VTSize = VT.getSizeInBits() / 8; 3370 SDValue Value, Store; 3371 3372 Value = DAG.getLoad(VT, dl, Chain, 3373 getMemBasePlusOffset(Src, SrcOff, DAG), 3374 SrcSV, SrcSVOff + SrcOff, false, false, Align); 3375 LoadValues.push_back(Value); 3376 LoadChains.push_back(Value.getValue(1)); 3377 SrcOff += VTSize; 3378 } 3379 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3380 &LoadChains[0], LoadChains.size()); 3381 OutChains.clear(); 3382 for (unsigned i = 0; i < NumMemOps; i++) { 3383 EVT VT = MemOps[i]; 3384 unsigned VTSize = VT.getSizeInBits() / 8; 3385 SDValue Value, Store; 3386 3387 Store = DAG.getStore(Chain, dl, LoadValues[i], 3388 getMemBasePlusOffset(Dst, DstOff, DAG), 3389 DstSV, DstSVOff + DstOff, false, false, DstAlign); 3390 OutChains.push_back(Store); 3391 DstOff += VTSize; 3392 } 3393 3394 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3395 &OutChains[0], OutChains.size()); 3396} 3397 3398static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3399 SDValue Chain, SDValue Dst, 3400 SDValue Src, uint64_t Size, 3401 unsigned Align, 3402 const Value *DstSV, uint64_t DstSVOff) { 3403 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3404 3405 // Expand memset to a series of load/store ops if the size operand 3406 // falls below a certain threshold. 3407 std::vector<EVT> MemOps; 3408 std::string Str; 3409 bool CopyFromStr; 3410 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3411 Size, Align, Str, CopyFromStr, DAG, TLI)) 3412 return SDValue(); 3413 3414 SmallVector<SDValue, 8> OutChains; 3415 uint64_t DstOff = 0; 3416 3417 unsigned NumMemOps = MemOps.size(); 3418 for (unsigned i = 0; i < NumMemOps; i++) { 3419 EVT VT = MemOps[i]; 3420 unsigned VTSize = VT.getSizeInBits() / 8; 3421 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3422 SDValue Store = DAG.getStore(Chain, dl, Value, 3423 getMemBasePlusOffset(Dst, DstOff, DAG), 3424 DstSV, DstSVOff + DstOff, false, false, 0); 3425 OutChains.push_back(Store); 3426 DstOff += VTSize; 3427 } 3428 3429 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3430 &OutChains[0], OutChains.size()); 3431} 3432 3433SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3434 SDValue Src, SDValue Size, 3435 unsigned Align, bool AlwaysInline, 3436 const Value *DstSV, uint64_t DstSVOff, 3437 const Value *SrcSV, uint64_t SrcSVOff) { 3438 3439 // Check to see if we should lower the memcpy to loads and stores first. 3440 // For cases within the target-specified limits, this is the best choice. 3441 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3442 if (ConstantSize) { 3443 // Memcpy with size zero? Just return the original chain. 3444 if (ConstantSize->isNullValue()) 3445 return Chain; 3446 3447 SDValue Result = 3448 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3449 ConstantSize->getZExtValue(), 3450 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3451 if (Result.getNode()) 3452 return Result; 3453 } 3454 3455 // Then check to see if we should lower the memcpy with target-specific 3456 // code. If the target chooses to do this, this is the next best. 3457 SDValue Result = 3458 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3459 AlwaysInline, 3460 DstSV, DstSVOff, SrcSV, SrcSVOff); 3461 if (Result.getNode()) 3462 return Result; 3463 3464 // If we really need inline code and the target declined to provide it, 3465 // use a (potentially long) sequence of loads and stores. 3466 if (AlwaysInline) { 3467 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3468 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3469 ConstantSize->getZExtValue(), Align, true, 3470 DstSV, DstSVOff, SrcSV, SrcSVOff); 3471 } 3472 3473 // Emit a library call. 3474 TargetLowering::ArgListTy Args; 3475 TargetLowering::ArgListEntry Entry; 3476 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3477 Entry.Node = Dst; Args.push_back(Entry); 3478 Entry.Node = Src; Args.push_back(Entry); 3479 Entry.Node = Size; Args.push_back(Entry); 3480 // FIXME: pass in DebugLoc 3481 std::pair<SDValue,SDValue> CallResult = 3482 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3483 false, false, false, false, 0, 3484 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3485 /*isReturnValueUsed=*/false, 3486 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3487 TLI.getPointerTy()), 3488 Args, *this, dl); 3489 return CallResult.second; 3490} 3491 3492SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3493 SDValue Src, SDValue Size, 3494 unsigned Align, 3495 const Value *DstSV, uint64_t DstSVOff, 3496 const Value *SrcSV, uint64_t SrcSVOff) { 3497 3498 // Check to see if we should lower the memmove to loads and stores first. 3499 // For cases within the target-specified limits, this is the best choice. 3500 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3501 if (ConstantSize) { 3502 // Memmove with size zero? Just return the original chain. 3503 if (ConstantSize->isNullValue()) 3504 return Chain; 3505 3506 SDValue Result = 3507 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3508 ConstantSize->getZExtValue(), 3509 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3510 if (Result.getNode()) 3511 return Result; 3512 } 3513 3514 // Then check to see if we should lower the memmove with target-specific 3515 // code. If the target chooses to do this, this is the next best. 3516 SDValue Result = 3517 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, 3518 DstSV, DstSVOff, SrcSV, SrcSVOff); 3519 if (Result.getNode()) 3520 return Result; 3521 3522 // Emit a library call. 3523 TargetLowering::ArgListTy Args; 3524 TargetLowering::ArgListEntry Entry; 3525 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3526 Entry.Node = Dst; Args.push_back(Entry); 3527 Entry.Node = Src; Args.push_back(Entry); 3528 Entry.Node = Size; Args.push_back(Entry); 3529 // FIXME: pass in DebugLoc 3530 std::pair<SDValue,SDValue> CallResult = 3531 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3532 false, false, false, false, 0, 3533 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3534 /*isReturnValueUsed=*/false, 3535 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3536 TLI.getPointerTy()), 3537 Args, *this, dl); 3538 return CallResult.second; 3539} 3540 3541SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3542 SDValue Src, SDValue Size, 3543 unsigned Align, 3544 const Value *DstSV, uint64_t DstSVOff) { 3545 3546 // Check to see if we should lower the memset to stores first. 3547 // For cases within the target-specified limits, this is the best choice. 3548 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3549 if (ConstantSize) { 3550 // Memset with size zero? Just return the original chain. 3551 if (ConstantSize->isNullValue()) 3552 return Chain; 3553 3554 SDValue Result = 3555 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3556 Align, DstSV, DstSVOff); 3557 if (Result.getNode()) 3558 return Result; 3559 } 3560 3561 // Then check to see if we should lower the memset with target-specific 3562 // code. If the target chooses to do this, this is the next best. 3563 SDValue Result = 3564 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, 3565 DstSV, DstSVOff); 3566 if (Result.getNode()) 3567 return Result; 3568 3569 // Emit a library call. 3570 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3571 TargetLowering::ArgListTy Args; 3572 TargetLowering::ArgListEntry Entry; 3573 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3574 Args.push_back(Entry); 3575 // Extend or truncate the argument to be an i32 value for the call. 3576 if (Src.getValueType().bitsGT(MVT::i32)) 3577 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3578 else 3579 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3580 Entry.Node = Src; 3581 Entry.Ty = Type::getInt32Ty(*getContext()); 3582 Entry.isSExt = true; 3583 Args.push_back(Entry); 3584 Entry.Node = Size; 3585 Entry.Ty = IntPtrTy; 3586 Entry.isSExt = false; 3587 Args.push_back(Entry); 3588 // FIXME: pass in DebugLoc 3589 std::pair<SDValue,SDValue> CallResult = 3590 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3591 false, false, false, false, 0, 3592 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3593 /*isReturnValueUsed=*/false, 3594 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3595 TLI.getPointerTy()), 3596 Args, *this, dl); 3597 return CallResult.second; 3598} 3599 3600SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3601 SDValue Chain, 3602 SDValue Ptr, SDValue Cmp, 3603 SDValue Swp, const Value* PtrVal, 3604 unsigned Alignment) { 3605 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3606 Alignment = getEVTAlignment(MemVT); 3607 3608 // Check if the memory reference references a frame index 3609 if (!PtrVal) 3610 if (const FrameIndexSDNode *FI = 3611 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3612 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3613 3614 MachineFunction &MF = getMachineFunction(); 3615 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3616 3617 // For now, atomics are considered to be volatile always. 3618 Flags |= MachineMemOperand::MOVolatile; 3619 3620 MachineMemOperand *MMO = 3621 MF.getMachineMemOperand(PtrVal, Flags, 0, 3622 MemVT.getStoreSize(), Alignment); 3623 3624 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3625} 3626 3627SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3628 SDValue Chain, 3629 SDValue Ptr, SDValue Cmp, 3630 SDValue Swp, MachineMemOperand *MMO) { 3631 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3632 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3633 3634 EVT VT = Cmp.getValueType(); 3635 3636 SDVTList VTs = getVTList(VT, MVT::Other); 3637 FoldingSetNodeID ID; 3638 ID.AddInteger(MemVT.getRawBits()); 3639 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3640 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3641 void* IP = 0; 3642 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3643 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3644 return SDValue(E, 0); 3645 } 3646 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3647 Ptr, Cmp, Swp, MMO); 3648 CSEMap.InsertNode(N, IP); 3649 AllNodes.push_back(N); 3650 return SDValue(N, 0); 3651} 3652 3653SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3654 SDValue Chain, 3655 SDValue Ptr, SDValue Val, 3656 const Value* PtrVal, 3657 unsigned Alignment) { 3658 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3659 Alignment = getEVTAlignment(MemVT); 3660 3661 // Check if the memory reference references a frame index 3662 if (!PtrVal) 3663 if (const FrameIndexSDNode *FI = 3664 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3665 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3666 3667 MachineFunction &MF = getMachineFunction(); 3668 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3669 3670 // For now, atomics are considered to be volatile always. 3671 Flags |= MachineMemOperand::MOVolatile; 3672 3673 MachineMemOperand *MMO = 3674 MF.getMachineMemOperand(PtrVal, Flags, 0, 3675 MemVT.getStoreSize(), Alignment); 3676 3677 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3678} 3679 3680SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3681 SDValue Chain, 3682 SDValue Ptr, SDValue Val, 3683 MachineMemOperand *MMO) { 3684 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3685 Opcode == ISD::ATOMIC_LOAD_SUB || 3686 Opcode == ISD::ATOMIC_LOAD_AND || 3687 Opcode == ISD::ATOMIC_LOAD_OR || 3688 Opcode == ISD::ATOMIC_LOAD_XOR || 3689 Opcode == ISD::ATOMIC_LOAD_NAND || 3690 Opcode == ISD::ATOMIC_LOAD_MIN || 3691 Opcode == ISD::ATOMIC_LOAD_MAX || 3692 Opcode == ISD::ATOMIC_LOAD_UMIN || 3693 Opcode == ISD::ATOMIC_LOAD_UMAX || 3694 Opcode == ISD::ATOMIC_SWAP) && 3695 "Invalid Atomic Op"); 3696 3697 EVT VT = Val.getValueType(); 3698 3699 SDVTList VTs = getVTList(VT, MVT::Other); 3700 FoldingSetNodeID ID; 3701 ID.AddInteger(MemVT.getRawBits()); 3702 SDValue Ops[] = {Chain, Ptr, Val}; 3703 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3704 void* IP = 0; 3705 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3706 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3707 return SDValue(E, 0); 3708 } 3709 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3710 Ptr, Val, MMO); 3711 CSEMap.InsertNode(N, IP); 3712 AllNodes.push_back(N); 3713 return SDValue(N, 0); 3714} 3715 3716/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3717/// Allowed to return something different (and simpler) if Simplify is true. 3718SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3719 DebugLoc dl) { 3720 if (NumOps == 1) 3721 return Ops[0]; 3722 3723 SmallVector<EVT, 4> VTs; 3724 VTs.reserve(NumOps); 3725 for (unsigned i = 0; i < NumOps; ++i) 3726 VTs.push_back(Ops[i].getValueType()); 3727 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3728 Ops, NumOps); 3729} 3730 3731SDValue 3732SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3733 const EVT *VTs, unsigned NumVTs, 3734 const SDValue *Ops, unsigned NumOps, 3735 EVT MemVT, const Value *srcValue, int SVOff, 3736 unsigned Align, bool Vol, 3737 bool ReadMem, bool WriteMem) { 3738 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3739 MemVT, srcValue, SVOff, Align, Vol, 3740 ReadMem, WriteMem); 3741} 3742 3743SDValue 3744SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3745 const SDValue *Ops, unsigned NumOps, 3746 EVT MemVT, const Value *srcValue, int SVOff, 3747 unsigned Align, bool Vol, 3748 bool ReadMem, bool WriteMem) { 3749 if (Align == 0) // Ensure that codegen never sees alignment 0 3750 Align = getEVTAlignment(MemVT); 3751 3752 MachineFunction &MF = getMachineFunction(); 3753 unsigned Flags = 0; 3754 if (WriteMem) 3755 Flags |= MachineMemOperand::MOStore; 3756 if (ReadMem) 3757 Flags |= MachineMemOperand::MOLoad; 3758 if (Vol) 3759 Flags |= MachineMemOperand::MOVolatile; 3760 MachineMemOperand *MMO = 3761 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3762 MemVT.getStoreSize(), Align); 3763 3764 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3765} 3766 3767SDValue 3768SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3769 const SDValue *Ops, unsigned NumOps, 3770 EVT MemVT, MachineMemOperand *MMO) { 3771 assert((Opcode == ISD::INTRINSIC_VOID || 3772 Opcode == ISD::INTRINSIC_W_CHAIN || 3773 (Opcode <= INT_MAX && 3774 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3775 "Opcode is not a memory-accessing opcode!"); 3776 3777 // Memoize the node unless it returns a flag. 3778 MemIntrinsicSDNode *N; 3779 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3780 FoldingSetNodeID ID; 3781 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3782 void *IP = 0; 3783 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3784 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3785 return SDValue(E, 0); 3786 } 3787 3788 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3789 MemVT, MMO); 3790 CSEMap.InsertNode(N, IP); 3791 } else { 3792 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3793 MemVT, MMO); 3794 } 3795 AllNodes.push_back(N); 3796 return SDValue(N, 0); 3797} 3798 3799SDValue 3800SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3801 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3802 SDValue Ptr, SDValue Offset, 3803 const Value *SV, int SVOffset, EVT MemVT, 3804 bool isVolatile, bool isNonTemporal, 3805 unsigned Alignment) { 3806 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3807 Alignment = getEVTAlignment(VT); 3808 3809 // Check if the memory reference references a frame index 3810 if (!SV) 3811 if (const FrameIndexSDNode *FI = 3812 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3813 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3814 3815 MachineFunction &MF = getMachineFunction(); 3816 unsigned Flags = MachineMemOperand::MOLoad; 3817 if (isVolatile) 3818 Flags |= MachineMemOperand::MOVolatile; 3819 if (isNonTemporal) 3820 Flags |= MachineMemOperand::MONonTemporal; 3821 MachineMemOperand *MMO = 3822 MF.getMachineMemOperand(SV, Flags, SVOffset, 3823 MemVT.getStoreSize(), Alignment); 3824 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3825} 3826 3827SDValue 3828SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3829 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3830 SDValue Ptr, SDValue Offset, EVT MemVT, 3831 MachineMemOperand *MMO) { 3832 if (VT == MemVT) { 3833 ExtType = ISD::NON_EXTLOAD; 3834 } else if (ExtType == ISD::NON_EXTLOAD) { 3835 assert(VT == MemVT && "Non-extending load from different memory type!"); 3836 } else { 3837 // Extending load. 3838 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3839 "Should only be an extending load, not truncating!"); 3840 assert(VT.isInteger() == MemVT.isInteger() && 3841 "Cannot convert from FP to Int or Int -> FP!"); 3842 assert(VT.isVector() == MemVT.isVector() && 3843 "Cannot use trunc store to convert to or from a vector!"); 3844 assert((!VT.isVector() || 3845 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3846 "Cannot use trunc store to change the number of vector elements!"); 3847 } 3848 3849 bool Indexed = AM != ISD::UNINDEXED; 3850 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3851 "Unindexed load with an offset!"); 3852 3853 SDVTList VTs = Indexed ? 3854 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3855 SDValue Ops[] = { Chain, Ptr, Offset }; 3856 FoldingSetNodeID ID; 3857 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3858 ID.AddInteger(MemVT.getRawBits()); 3859 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3860 MMO->isNonTemporal())); 3861 void *IP = 0; 3862 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3863 cast<LoadSDNode>(E)->refineAlignment(MMO); 3864 return SDValue(E, 0); 3865 } 3866 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3867 MemVT, MMO); 3868 CSEMap.InsertNode(N, IP); 3869 AllNodes.push_back(N); 3870 return SDValue(N, 0); 3871} 3872 3873SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3874 SDValue Chain, SDValue Ptr, 3875 const Value *SV, int SVOffset, 3876 bool isVolatile, bool isNonTemporal, 3877 unsigned Alignment) { 3878 SDValue Undef = getUNDEF(Ptr.getValueType()); 3879 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3880 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3881} 3882 3883SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3884 SDValue Chain, SDValue Ptr, 3885 const Value *SV, 3886 int SVOffset, EVT MemVT, 3887 bool isVolatile, bool isNonTemporal, 3888 unsigned Alignment) { 3889 SDValue Undef = getUNDEF(Ptr.getValueType()); 3890 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3891 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3892} 3893 3894SDValue 3895SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3896 SDValue Offset, ISD::MemIndexedMode AM) { 3897 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3898 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3899 "Load is already a indexed load!"); 3900 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3901 LD->getChain(), Base, Offset, LD->getSrcValue(), 3902 LD->getSrcValueOffset(), LD->getMemoryVT(), 3903 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3904} 3905 3906SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3907 SDValue Ptr, const Value *SV, int SVOffset, 3908 bool isVolatile, bool isNonTemporal, 3909 unsigned Alignment) { 3910 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3911 Alignment = getEVTAlignment(Val.getValueType()); 3912 3913 // Check if the memory reference references a frame index 3914 if (!SV) 3915 if (const FrameIndexSDNode *FI = 3916 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3917 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3918 3919 MachineFunction &MF = getMachineFunction(); 3920 unsigned Flags = MachineMemOperand::MOStore; 3921 if (isVolatile) 3922 Flags |= MachineMemOperand::MOVolatile; 3923 if (isNonTemporal) 3924 Flags |= MachineMemOperand::MONonTemporal; 3925 MachineMemOperand *MMO = 3926 MF.getMachineMemOperand(SV, Flags, SVOffset, 3927 Val.getValueType().getStoreSize(), Alignment); 3928 3929 return getStore(Chain, dl, Val, Ptr, MMO); 3930} 3931 3932SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3933 SDValue Ptr, MachineMemOperand *MMO) { 3934 EVT VT = Val.getValueType(); 3935 SDVTList VTs = getVTList(MVT::Other); 3936 SDValue Undef = getUNDEF(Ptr.getValueType()); 3937 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3938 FoldingSetNodeID ID; 3939 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3940 ID.AddInteger(VT.getRawBits()); 3941 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 3942 MMO->isNonTemporal())); 3943 void *IP = 0; 3944 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3945 cast<StoreSDNode>(E)->refineAlignment(MMO); 3946 return SDValue(E, 0); 3947 } 3948 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 3949 false, VT, MMO); 3950 CSEMap.InsertNode(N, IP); 3951 AllNodes.push_back(N); 3952 return SDValue(N, 0); 3953} 3954 3955SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3956 SDValue Ptr, const Value *SV, 3957 int SVOffset, EVT SVT, 3958 bool isVolatile, bool isNonTemporal, 3959 unsigned Alignment) { 3960 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3961 Alignment = getEVTAlignment(SVT); 3962 3963 // Check if the memory reference references a frame index 3964 if (!SV) 3965 if (const FrameIndexSDNode *FI = 3966 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3967 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3968 3969 MachineFunction &MF = getMachineFunction(); 3970 unsigned Flags = MachineMemOperand::MOStore; 3971 if (isVolatile) 3972 Flags |= MachineMemOperand::MOVolatile; 3973 if (isNonTemporal) 3974 Flags |= MachineMemOperand::MONonTemporal; 3975 MachineMemOperand *MMO = 3976 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 3977 3978 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 3979} 3980 3981SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3982 SDValue Ptr, EVT SVT, 3983 MachineMemOperand *MMO) { 3984 EVT VT = Val.getValueType(); 3985 3986 if (VT == SVT) 3987 return getStore(Chain, dl, Val, Ptr, MMO); 3988 3989 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 3990 "Should only be a truncating store, not extending!"); 3991 assert(VT.isInteger() == SVT.isInteger() && 3992 "Can't do FP-INT conversion!"); 3993 assert(VT.isVector() == SVT.isVector() && 3994 "Cannot use trunc store to convert to or from a vector!"); 3995 assert((!VT.isVector() || 3996 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 3997 "Cannot use trunc store to change the number of vector elements!"); 3998 3999 SDVTList VTs = getVTList(MVT::Other); 4000 SDValue Undef = getUNDEF(Ptr.getValueType()); 4001 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4002 FoldingSetNodeID ID; 4003 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4004 ID.AddInteger(SVT.getRawBits()); 4005 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4006 MMO->isNonTemporal())); 4007 void *IP = 0; 4008 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4009 cast<StoreSDNode>(E)->refineAlignment(MMO); 4010 return SDValue(E, 0); 4011 } 4012 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4013 true, SVT, MMO); 4014 CSEMap.InsertNode(N, IP); 4015 AllNodes.push_back(N); 4016 return SDValue(N, 0); 4017} 4018 4019SDValue 4020SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4021 SDValue Offset, ISD::MemIndexedMode AM) { 4022 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4023 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4024 "Store is already a indexed store!"); 4025 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4026 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4027 FoldingSetNodeID ID; 4028 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4029 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4030 ID.AddInteger(ST->getRawSubclassData()); 4031 void *IP = 0; 4032 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4033 return SDValue(E, 0); 4034 4035 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4036 ST->isTruncatingStore(), 4037 ST->getMemoryVT(), 4038 ST->getMemOperand()); 4039 CSEMap.InsertNode(N, IP); 4040 AllNodes.push_back(N); 4041 return SDValue(N, 0); 4042} 4043 4044SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4045 SDValue Chain, SDValue Ptr, 4046 SDValue SV) { 4047 SDValue Ops[] = { Chain, Ptr, SV }; 4048 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4049} 4050 4051SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4052 const SDUse *Ops, unsigned NumOps) { 4053 switch (NumOps) { 4054 case 0: return getNode(Opcode, DL, VT); 4055 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4056 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4057 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4058 default: break; 4059 } 4060 4061 // Copy from an SDUse array into an SDValue array for use with 4062 // the regular getNode logic. 4063 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4064 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4065} 4066 4067SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4068 const SDValue *Ops, unsigned NumOps) { 4069 switch (NumOps) { 4070 case 0: return getNode(Opcode, DL, VT); 4071 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4072 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4073 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4074 default: break; 4075 } 4076 4077 switch (Opcode) { 4078 default: break; 4079 case ISD::SELECT_CC: { 4080 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4081 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4082 "LHS and RHS of condition must have same type!"); 4083 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4084 "True and False arms of SelectCC must have same type!"); 4085 assert(Ops[2].getValueType() == VT && 4086 "select_cc node must be of same type as true and false value!"); 4087 break; 4088 } 4089 case ISD::BR_CC: { 4090 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4091 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4092 "LHS/RHS of comparison should match types!"); 4093 break; 4094 } 4095 } 4096 4097 // Memoize nodes. 4098 SDNode *N; 4099 SDVTList VTs = getVTList(VT); 4100 4101 if (VT != MVT::Flag) { 4102 FoldingSetNodeID ID; 4103 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4104 void *IP = 0; 4105 4106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4107 return SDValue(E, 0); 4108 4109 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4110 CSEMap.InsertNode(N, IP); 4111 } else { 4112 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4113 } 4114 4115 AllNodes.push_back(N); 4116#ifndef NDEBUG 4117 VerifyNode(N); 4118#endif 4119 return SDValue(N, 0); 4120} 4121 4122SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4123 const std::vector<EVT> &ResultTys, 4124 const SDValue *Ops, unsigned NumOps) { 4125 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4126 Ops, NumOps); 4127} 4128 4129SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4130 const EVT *VTs, unsigned NumVTs, 4131 const SDValue *Ops, unsigned NumOps) { 4132 if (NumVTs == 1) 4133 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4134 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4135} 4136 4137SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4138 const SDValue *Ops, unsigned NumOps) { 4139 if (VTList.NumVTs == 1) 4140 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4141 4142#if 0 4143 switch (Opcode) { 4144 // FIXME: figure out how to safely handle things like 4145 // int foo(int x) { return 1 << (x & 255); } 4146 // int bar() { return foo(256); } 4147 case ISD::SRA_PARTS: 4148 case ISD::SRL_PARTS: 4149 case ISD::SHL_PARTS: 4150 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4151 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4152 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4153 else if (N3.getOpcode() == ISD::AND) 4154 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4155 // If the and is only masking out bits that cannot effect the shift, 4156 // eliminate the and. 4157 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4158 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4159 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4160 } 4161 break; 4162 } 4163#endif 4164 4165 // Memoize the node unless it returns a flag. 4166 SDNode *N; 4167 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4168 FoldingSetNodeID ID; 4169 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4170 void *IP = 0; 4171 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4172 return SDValue(E, 0); 4173 4174 if (NumOps == 1) { 4175 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4176 } else if (NumOps == 2) { 4177 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4178 } else if (NumOps == 3) { 4179 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4180 Ops[2]); 4181 } else { 4182 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4183 } 4184 CSEMap.InsertNode(N, IP); 4185 } else { 4186 if (NumOps == 1) { 4187 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4188 } else if (NumOps == 2) { 4189 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4190 } else if (NumOps == 3) { 4191 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4192 Ops[2]); 4193 } else { 4194 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4195 } 4196 } 4197 AllNodes.push_back(N); 4198#ifndef NDEBUG 4199 VerifyNode(N); 4200#endif 4201 return SDValue(N, 0); 4202} 4203 4204SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4205 return getNode(Opcode, DL, VTList, 0, 0); 4206} 4207 4208SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4209 SDValue N1) { 4210 SDValue Ops[] = { N1 }; 4211 return getNode(Opcode, DL, VTList, Ops, 1); 4212} 4213 4214SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4215 SDValue N1, SDValue N2) { 4216 SDValue Ops[] = { N1, N2 }; 4217 return getNode(Opcode, DL, VTList, Ops, 2); 4218} 4219 4220SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4221 SDValue N1, SDValue N2, SDValue N3) { 4222 SDValue Ops[] = { N1, N2, N3 }; 4223 return getNode(Opcode, DL, VTList, Ops, 3); 4224} 4225 4226SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4227 SDValue N1, SDValue N2, SDValue N3, 4228 SDValue N4) { 4229 SDValue Ops[] = { N1, N2, N3, N4 }; 4230 return getNode(Opcode, DL, VTList, Ops, 4); 4231} 4232 4233SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4234 SDValue N1, SDValue N2, SDValue N3, 4235 SDValue N4, SDValue N5) { 4236 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4237 return getNode(Opcode, DL, VTList, Ops, 5); 4238} 4239 4240SDVTList SelectionDAG::getVTList(EVT VT) { 4241 return makeVTList(SDNode::getValueTypeList(VT), 1); 4242} 4243 4244SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4245 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4246 E = VTList.rend(); I != E; ++I) 4247 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4248 return *I; 4249 4250 EVT *Array = Allocator.Allocate<EVT>(2); 4251 Array[0] = VT1; 4252 Array[1] = VT2; 4253 SDVTList Result = makeVTList(Array, 2); 4254 VTList.push_back(Result); 4255 return Result; 4256} 4257 4258SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4259 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4260 E = VTList.rend(); I != E; ++I) 4261 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4262 I->VTs[2] == VT3) 4263 return *I; 4264 4265 EVT *Array = Allocator.Allocate<EVT>(3); 4266 Array[0] = VT1; 4267 Array[1] = VT2; 4268 Array[2] = VT3; 4269 SDVTList Result = makeVTList(Array, 3); 4270 VTList.push_back(Result); 4271 return Result; 4272} 4273 4274SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4275 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4276 E = VTList.rend(); I != E; ++I) 4277 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4278 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4279 return *I; 4280 4281 EVT *Array = Allocator.Allocate<EVT>(4); 4282 Array[0] = VT1; 4283 Array[1] = VT2; 4284 Array[2] = VT3; 4285 Array[3] = VT4; 4286 SDVTList Result = makeVTList(Array, 4); 4287 VTList.push_back(Result); 4288 return Result; 4289} 4290 4291SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4292 switch (NumVTs) { 4293 case 0: llvm_unreachable("Cannot have nodes without results!"); 4294 case 1: return getVTList(VTs[0]); 4295 case 2: return getVTList(VTs[0], VTs[1]); 4296 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4297 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4298 default: break; 4299 } 4300 4301 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4302 E = VTList.rend(); I != E; ++I) { 4303 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4304 continue; 4305 4306 bool NoMatch = false; 4307 for (unsigned i = 2; i != NumVTs; ++i) 4308 if (VTs[i] != I->VTs[i]) { 4309 NoMatch = true; 4310 break; 4311 } 4312 if (!NoMatch) 4313 return *I; 4314 } 4315 4316 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4317 std::copy(VTs, VTs+NumVTs, Array); 4318 SDVTList Result = makeVTList(Array, NumVTs); 4319 VTList.push_back(Result); 4320 return Result; 4321} 4322 4323 4324/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4325/// specified operands. If the resultant node already exists in the DAG, 4326/// this does not modify the specified node, instead it returns the node that 4327/// already exists. If the resultant node does not exist in the DAG, the 4328/// input node is returned. As a degenerate case, if you specify the same 4329/// input operands as the node already has, the input node is returned. 4330SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4331 SDNode *N = InN.getNode(); 4332 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4333 4334 // Check to see if there is no change. 4335 if (Op == N->getOperand(0)) return InN; 4336 4337 // See if the modified node already exists. 4338 void *InsertPos = 0; 4339 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4340 return SDValue(Existing, InN.getResNo()); 4341 4342 // Nope it doesn't. Remove the node from its current place in the maps. 4343 if (InsertPos) 4344 if (!RemoveNodeFromCSEMaps(N)) 4345 InsertPos = 0; 4346 4347 // Now we update the operands. 4348 N->OperandList[0].set(Op); 4349 4350 // If this gets put into a CSE map, add it. 4351 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4352 return InN; 4353} 4354 4355SDValue SelectionDAG:: 4356UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4357 SDNode *N = InN.getNode(); 4358 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4359 4360 // Check to see if there is no change. 4361 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4362 return InN; // No operands changed, just return the input node. 4363 4364 // See if the modified node already exists. 4365 void *InsertPos = 0; 4366 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4367 return SDValue(Existing, InN.getResNo()); 4368 4369 // Nope it doesn't. Remove the node from its current place in the maps. 4370 if (InsertPos) 4371 if (!RemoveNodeFromCSEMaps(N)) 4372 InsertPos = 0; 4373 4374 // Now we update the operands. 4375 if (N->OperandList[0] != Op1) 4376 N->OperandList[0].set(Op1); 4377 if (N->OperandList[1] != Op2) 4378 N->OperandList[1].set(Op2); 4379 4380 // If this gets put into a CSE map, add it. 4381 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4382 return InN; 4383} 4384 4385SDValue SelectionDAG:: 4386UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4387 SDValue Ops[] = { Op1, Op2, Op3 }; 4388 return UpdateNodeOperands(N, Ops, 3); 4389} 4390 4391SDValue SelectionDAG:: 4392UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4393 SDValue Op3, SDValue Op4) { 4394 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4395 return UpdateNodeOperands(N, Ops, 4); 4396} 4397 4398SDValue SelectionDAG:: 4399UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4400 SDValue Op3, SDValue Op4, SDValue Op5) { 4401 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4402 return UpdateNodeOperands(N, Ops, 5); 4403} 4404 4405SDValue SelectionDAG:: 4406UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4407 SDNode *N = InN.getNode(); 4408 assert(N->getNumOperands() == NumOps && 4409 "Update with wrong number of operands"); 4410 4411 // Check to see if there is no change. 4412 bool AnyChange = false; 4413 for (unsigned i = 0; i != NumOps; ++i) { 4414 if (Ops[i] != N->getOperand(i)) { 4415 AnyChange = true; 4416 break; 4417 } 4418 } 4419 4420 // No operands changed, just return the input node. 4421 if (!AnyChange) return InN; 4422 4423 // See if the modified node already exists. 4424 void *InsertPos = 0; 4425 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4426 return SDValue(Existing, InN.getResNo()); 4427 4428 // Nope it doesn't. Remove the node from its current place in the maps. 4429 if (InsertPos) 4430 if (!RemoveNodeFromCSEMaps(N)) 4431 InsertPos = 0; 4432 4433 // Now we update the operands. 4434 for (unsigned i = 0; i != NumOps; ++i) 4435 if (N->OperandList[i] != Ops[i]) 4436 N->OperandList[i].set(Ops[i]); 4437 4438 // If this gets put into a CSE map, add it. 4439 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4440 return InN; 4441} 4442 4443/// DropOperands - Release the operands and set this node to have 4444/// zero operands. 4445void SDNode::DropOperands() { 4446 // Unlike the code in MorphNodeTo that does this, we don't need to 4447 // watch for dead nodes here. 4448 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4449 SDUse &Use = *I++; 4450 Use.set(SDValue()); 4451 } 4452} 4453 4454/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4455/// machine opcode. 4456/// 4457SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4458 EVT VT) { 4459 SDVTList VTs = getVTList(VT); 4460 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4461} 4462 4463SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4464 EVT VT, SDValue Op1) { 4465 SDVTList VTs = getVTList(VT); 4466 SDValue Ops[] = { Op1 }; 4467 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4468} 4469 4470SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4471 EVT VT, SDValue Op1, 4472 SDValue Op2) { 4473 SDVTList VTs = getVTList(VT); 4474 SDValue Ops[] = { Op1, Op2 }; 4475 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4476} 4477 4478SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4479 EVT VT, SDValue Op1, 4480 SDValue Op2, SDValue Op3) { 4481 SDVTList VTs = getVTList(VT); 4482 SDValue Ops[] = { Op1, Op2, Op3 }; 4483 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4484} 4485 4486SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4487 EVT VT, const SDValue *Ops, 4488 unsigned NumOps) { 4489 SDVTList VTs = getVTList(VT); 4490 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4491} 4492 4493SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4494 EVT VT1, EVT VT2, const SDValue *Ops, 4495 unsigned NumOps) { 4496 SDVTList VTs = getVTList(VT1, VT2); 4497 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4498} 4499 4500SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4501 EVT VT1, EVT VT2) { 4502 SDVTList VTs = getVTList(VT1, VT2); 4503 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4504} 4505 4506SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4507 EVT VT1, EVT VT2, EVT VT3, 4508 const SDValue *Ops, unsigned NumOps) { 4509 SDVTList VTs = getVTList(VT1, VT2, VT3); 4510 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4511} 4512 4513SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4514 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4515 const SDValue *Ops, unsigned NumOps) { 4516 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4517 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4518} 4519 4520SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4521 EVT VT1, EVT VT2, 4522 SDValue Op1) { 4523 SDVTList VTs = getVTList(VT1, VT2); 4524 SDValue Ops[] = { Op1 }; 4525 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4526} 4527 4528SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4529 EVT VT1, EVT VT2, 4530 SDValue Op1, SDValue Op2) { 4531 SDVTList VTs = getVTList(VT1, VT2); 4532 SDValue Ops[] = { Op1, Op2 }; 4533 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4534} 4535 4536SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4537 EVT VT1, EVT VT2, 4538 SDValue Op1, SDValue Op2, 4539 SDValue Op3) { 4540 SDVTList VTs = getVTList(VT1, VT2); 4541 SDValue Ops[] = { Op1, Op2, Op3 }; 4542 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4543} 4544 4545SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4546 EVT VT1, EVT VT2, EVT VT3, 4547 SDValue Op1, SDValue Op2, 4548 SDValue Op3) { 4549 SDVTList VTs = getVTList(VT1, VT2, VT3); 4550 SDValue Ops[] = { Op1, Op2, Op3 }; 4551 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4552} 4553 4554SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4555 SDVTList VTs, const SDValue *Ops, 4556 unsigned NumOps) { 4557 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4558 // Reset the NodeID to -1. 4559 N->setNodeId(-1); 4560 return N; 4561} 4562 4563/// MorphNodeTo - This *mutates* the specified node to have the specified 4564/// return type, opcode, and operands. 4565/// 4566/// Note that MorphNodeTo returns the resultant node. If there is already a 4567/// node of the specified opcode and operands, it returns that node instead of 4568/// the current one. Note that the DebugLoc need not be the same. 4569/// 4570/// Using MorphNodeTo is faster than creating a new node and swapping it in 4571/// with ReplaceAllUsesWith both because it often avoids allocating a new 4572/// node, and because it doesn't require CSE recalculation for any of 4573/// the node's users. 4574/// 4575SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4576 SDVTList VTs, const SDValue *Ops, 4577 unsigned NumOps) { 4578 // If an identical node already exists, use it. 4579 void *IP = 0; 4580 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4581 FoldingSetNodeID ID; 4582 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4583 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4584 return ON; 4585 } 4586 4587 if (!RemoveNodeFromCSEMaps(N)) 4588 IP = 0; 4589 4590 // Start the morphing. 4591 N->NodeType = Opc; 4592 N->ValueList = VTs.VTs; 4593 N->NumValues = VTs.NumVTs; 4594 4595 // Clear the operands list, updating used nodes to remove this from their 4596 // use list. Keep track of any operands that become dead as a result. 4597 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4598 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4599 SDUse &Use = *I++; 4600 SDNode *Used = Use.getNode(); 4601 Use.set(SDValue()); 4602 if (Used->use_empty()) 4603 DeadNodeSet.insert(Used); 4604 } 4605 4606 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4607 // Initialize the memory references information. 4608 MN->setMemRefs(0, 0); 4609 // If NumOps is larger than the # of operands we can have in a 4610 // MachineSDNode, reallocate the operand list. 4611 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4612 if (MN->OperandsNeedDelete) 4613 delete[] MN->OperandList; 4614 if (NumOps > array_lengthof(MN->LocalOperands)) 4615 // We're creating a final node that will live unmorphed for the 4616 // remainder of the current SelectionDAG iteration, so we can allocate 4617 // the operands directly out of a pool with no recycling metadata. 4618 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4619 Ops, NumOps); 4620 else 4621 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4622 MN->OperandsNeedDelete = false; 4623 } else 4624 MN->InitOperands(MN->OperandList, Ops, NumOps); 4625 } else { 4626 // If NumOps is larger than the # of operands we currently have, reallocate 4627 // the operand list. 4628 if (NumOps > N->NumOperands) { 4629 if (N->OperandsNeedDelete) 4630 delete[] N->OperandList; 4631 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4632 N->OperandsNeedDelete = true; 4633 } else 4634 N->InitOperands(N->OperandList, Ops, NumOps); 4635 } 4636 4637 // Delete any nodes that are still dead after adding the uses for the 4638 // new operands. 4639 if (!DeadNodeSet.empty()) { 4640 SmallVector<SDNode *, 16> DeadNodes; 4641 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4642 E = DeadNodeSet.end(); I != E; ++I) 4643 if ((*I)->use_empty()) 4644 DeadNodes.push_back(*I); 4645 RemoveDeadNodes(DeadNodes); 4646 } 4647 4648 if (IP) 4649 CSEMap.InsertNode(N, IP); // Memoize the new node. 4650 return N; 4651} 4652 4653 4654/// getMachineNode - These are used for target selectors to create a new node 4655/// with specified return type(s), MachineInstr opcode, and operands. 4656/// 4657/// Note that getMachineNode returns the resultant node. If there is already a 4658/// node of the specified opcode and operands, it returns that node instead of 4659/// the current one. 4660MachineSDNode * 4661SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4662 SDVTList VTs = getVTList(VT); 4663 return getMachineNode(Opcode, dl, VTs, 0, 0); 4664} 4665 4666MachineSDNode * 4667SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4668 SDVTList VTs = getVTList(VT); 4669 SDValue Ops[] = { Op1 }; 4670 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4671} 4672 4673MachineSDNode * 4674SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4675 SDValue Op1, SDValue Op2) { 4676 SDVTList VTs = getVTList(VT); 4677 SDValue Ops[] = { Op1, Op2 }; 4678 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4679} 4680 4681MachineSDNode * 4682SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4683 SDValue Op1, SDValue Op2, SDValue Op3) { 4684 SDVTList VTs = getVTList(VT); 4685 SDValue Ops[] = { Op1, Op2, Op3 }; 4686 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4687} 4688 4689MachineSDNode * 4690SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4691 const SDValue *Ops, unsigned NumOps) { 4692 SDVTList VTs = getVTList(VT); 4693 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4694} 4695 4696MachineSDNode * 4697SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4698 SDVTList VTs = getVTList(VT1, VT2); 4699 return getMachineNode(Opcode, dl, VTs, 0, 0); 4700} 4701 4702MachineSDNode * 4703SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4704 EVT VT1, EVT VT2, SDValue Op1) { 4705 SDVTList VTs = getVTList(VT1, VT2); 4706 SDValue Ops[] = { Op1 }; 4707 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4708} 4709 4710MachineSDNode * 4711SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4712 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4713 SDVTList VTs = getVTList(VT1, VT2); 4714 SDValue Ops[] = { Op1, Op2 }; 4715 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4716} 4717 4718MachineSDNode * 4719SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4720 EVT VT1, EVT VT2, SDValue Op1, 4721 SDValue Op2, SDValue Op3) { 4722 SDVTList VTs = getVTList(VT1, VT2); 4723 SDValue Ops[] = { Op1, Op2, Op3 }; 4724 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4725} 4726 4727MachineSDNode * 4728SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4729 EVT VT1, EVT VT2, 4730 const SDValue *Ops, unsigned NumOps) { 4731 SDVTList VTs = getVTList(VT1, VT2); 4732 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4733} 4734 4735MachineSDNode * 4736SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4737 EVT VT1, EVT VT2, EVT VT3, 4738 SDValue Op1, SDValue Op2) { 4739 SDVTList VTs = getVTList(VT1, VT2, VT3); 4740 SDValue Ops[] = { Op1, Op2 }; 4741 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4742} 4743 4744MachineSDNode * 4745SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4746 EVT VT1, EVT VT2, EVT VT3, 4747 SDValue Op1, SDValue Op2, SDValue Op3) { 4748 SDVTList VTs = getVTList(VT1, VT2, VT3); 4749 SDValue Ops[] = { Op1, Op2, Op3 }; 4750 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4751} 4752 4753MachineSDNode * 4754SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4755 EVT VT1, EVT VT2, EVT VT3, 4756 const SDValue *Ops, unsigned NumOps) { 4757 SDVTList VTs = getVTList(VT1, VT2, VT3); 4758 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4759} 4760 4761MachineSDNode * 4762SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4763 EVT VT2, EVT VT3, EVT VT4, 4764 const SDValue *Ops, unsigned NumOps) { 4765 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4766 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4767} 4768 4769MachineSDNode * 4770SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4771 const std::vector<EVT> &ResultTys, 4772 const SDValue *Ops, unsigned NumOps) { 4773 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4774 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4775} 4776 4777MachineSDNode * 4778SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4779 const SDValue *Ops, unsigned NumOps) { 4780 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4781 MachineSDNode *N; 4782 void *IP; 4783 4784 if (DoCSE) { 4785 FoldingSetNodeID ID; 4786 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4787 IP = 0; 4788 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4789 return cast<MachineSDNode>(E); 4790 } 4791 4792 // Allocate a new MachineSDNode. 4793 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4794 4795 // Initialize the operands list. 4796 if (NumOps > array_lengthof(N->LocalOperands)) 4797 // We're creating a final node that will live unmorphed for the 4798 // remainder of the current SelectionDAG iteration, so we can allocate 4799 // the operands directly out of a pool with no recycling metadata. 4800 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4801 Ops, NumOps); 4802 else 4803 N->InitOperands(N->LocalOperands, Ops, NumOps); 4804 N->OperandsNeedDelete = false; 4805 4806 if (DoCSE) 4807 CSEMap.InsertNode(N, IP); 4808 4809 AllNodes.push_back(N); 4810#ifndef NDEBUG 4811 VerifyNode(N); 4812#endif 4813 return N; 4814} 4815 4816/// getTargetExtractSubreg - A convenience function for creating 4817/// TargetOpcode::EXTRACT_SUBREG nodes. 4818SDValue 4819SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4820 SDValue Operand) { 4821 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4822 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4823 VT, Operand, SRIdxVal); 4824 return SDValue(Subreg, 0); 4825} 4826 4827/// getTargetInsertSubreg - A convenience function for creating 4828/// TargetOpcode::INSERT_SUBREG nodes. 4829SDValue 4830SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4831 SDValue Operand, SDValue Subreg) { 4832 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4833 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4834 VT, Operand, Subreg, SRIdxVal); 4835 return SDValue(Result, 0); 4836} 4837 4838/// getNodeIfExists - Get the specified node if it's already available, or 4839/// else return NULL. 4840SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4841 const SDValue *Ops, unsigned NumOps) { 4842 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4843 FoldingSetNodeID ID; 4844 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4845 void *IP = 0; 4846 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4847 return E; 4848 } 4849 return NULL; 4850} 4851 4852namespace { 4853 4854/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4855/// pointed to by a use iterator is deleted, increment the use iterator 4856/// so that it doesn't dangle. 4857/// 4858/// This class also manages a "downlink" DAGUpdateListener, to forward 4859/// messages to ReplaceAllUsesWith's callers. 4860/// 4861class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4862 SelectionDAG::DAGUpdateListener *DownLink; 4863 SDNode::use_iterator &UI; 4864 SDNode::use_iterator &UE; 4865 4866 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4867 // Increment the iterator as needed. 4868 while (UI != UE && N == *UI) 4869 ++UI; 4870 4871 // Then forward the message. 4872 if (DownLink) DownLink->NodeDeleted(N, E); 4873 } 4874 4875 virtual void NodeUpdated(SDNode *N) { 4876 // Just forward the message. 4877 if (DownLink) DownLink->NodeUpdated(N); 4878 } 4879 4880public: 4881 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4882 SDNode::use_iterator &ui, 4883 SDNode::use_iterator &ue) 4884 : DownLink(dl), UI(ui), UE(ue) {} 4885}; 4886 4887} 4888 4889/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4890/// This can cause recursive merging of nodes in the DAG. 4891/// 4892/// This version assumes From has a single result value. 4893/// 4894void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4895 DAGUpdateListener *UpdateListener) { 4896 SDNode *From = FromN.getNode(); 4897 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4898 "Cannot replace with this method!"); 4899 assert(From != To.getNode() && "Cannot replace uses of with self"); 4900 4901 // Iterate over all the existing uses of From. New uses will be added 4902 // to the beginning of the use list, which we avoid visiting. 4903 // This specifically avoids visiting uses of From that arise while the 4904 // replacement is happening, because any such uses would be the result 4905 // of CSE: If an existing node looks like From after one of its operands 4906 // is replaced by To, we don't want to replace of all its users with To 4907 // too. See PR3018 for more info. 4908 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4909 RAUWUpdateListener Listener(UpdateListener, UI, UE); 4910 while (UI != UE) { 4911 SDNode *User = *UI; 4912 4913 // This node is about to morph, remove its old self from the CSE maps. 4914 RemoveNodeFromCSEMaps(User); 4915 4916 // A user can appear in a use list multiple times, and when this 4917 // happens the uses are usually next to each other in the list. 4918 // To help reduce the number of CSE recomputations, process all 4919 // the uses of this user that we can find this way. 4920 do { 4921 SDUse &Use = UI.getUse(); 4922 ++UI; 4923 Use.set(To); 4924 } while (UI != UE && *UI == User); 4925 4926 // Now that we have modified User, add it back to the CSE maps. If it 4927 // already exists there, recursively merge the results together. 4928 AddModifiedNodeToCSEMaps(User, &Listener); 4929 } 4930} 4931 4932/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4933/// This can cause recursive merging of nodes in the DAG. 4934/// 4935/// This version assumes that for each value of From, there is a 4936/// corresponding value in To in the same position with the same type. 4937/// 4938void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4939 DAGUpdateListener *UpdateListener) { 4940#ifndef NDEBUG 4941 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 4942 assert((!From->hasAnyUseOfValue(i) || 4943 From->getValueType(i) == To->getValueType(i)) && 4944 "Cannot use this version of ReplaceAllUsesWith!"); 4945#endif 4946 4947 // Handle the trivial case. 4948 if (From == To) 4949 return; 4950 4951 // Iterate over just the existing users of From. See the comments in 4952 // the ReplaceAllUsesWith above. 4953 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4954 RAUWUpdateListener Listener(UpdateListener, UI, UE); 4955 while (UI != UE) { 4956 SDNode *User = *UI; 4957 4958 // This node is about to morph, remove its old self from the CSE maps. 4959 RemoveNodeFromCSEMaps(User); 4960 4961 // A user can appear in a use list multiple times, and when this 4962 // happens the uses are usually next to each other in the list. 4963 // To help reduce the number of CSE recomputations, process all 4964 // the uses of this user that we can find this way. 4965 do { 4966 SDUse &Use = UI.getUse(); 4967 ++UI; 4968 Use.setNode(To); 4969 } while (UI != UE && *UI == User); 4970 4971 // Now that we have modified User, add it back to the CSE maps. If it 4972 // already exists there, recursively merge the results together. 4973 AddModifiedNodeToCSEMaps(User, &Listener); 4974 } 4975} 4976 4977/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4978/// This can cause recursive merging of nodes in the DAG. 4979/// 4980/// This version can replace From with any result values. To must match the 4981/// number and types of values returned by From. 4982void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4983 const SDValue *To, 4984 DAGUpdateListener *UpdateListener) { 4985 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4986 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4987 4988 // Iterate over just the existing users of From. See the comments in 4989 // the ReplaceAllUsesWith above. 4990 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4991 RAUWUpdateListener Listener(UpdateListener, UI, UE); 4992 while (UI != UE) { 4993 SDNode *User = *UI; 4994 4995 // This node is about to morph, remove its old self from the CSE maps. 4996 RemoveNodeFromCSEMaps(User); 4997 4998 // A user can appear in a use list multiple times, and when this 4999 // happens the uses are usually next to each other in the list. 5000 // To help reduce the number of CSE recomputations, process all 5001 // the uses of this user that we can find this way. 5002 do { 5003 SDUse &Use = UI.getUse(); 5004 const SDValue &ToOp = To[Use.getResNo()]; 5005 ++UI; 5006 Use.set(ToOp); 5007 } while (UI != UE && *UI == User); 5008 5009 // Now that we have modified User, add it back to the CSE maps. If it 5010 // already exists there, recursively merge the results together. 5011 AddModifiedNodeToCSEMaps(User, &Listener); 5012 } 5013} 5014 5015/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5016/// uses of other values produced by From.getNode() alone. The Deleted 5017/// vector is handled the same way as for ReplaceAllUsesWith. 5018void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5019 DAGUpdateListener *UpdateListener){ 5020 // Handle the really simple, really trivial case efficiently. 5021 if (From == To) return; 5022 5023 // Handle the simple, trivial, case efficiently. 5024 if (From.getNode()->getNumValues() == 1) { 5025 ReplaceAllUsesWith(From, To, UpdateListener); 5026 return; 5027 } 5028 5029 // Iterate over just the existing users of From. See the comments in 5030 // the ReplaceAllUsesWith above. 5031 SDNode::use_iterator UI = From.getNode()->use_begin(), 5032 UE = From.getNode()->use_end(); 5033 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5034 while (UI != UE) { 5035 SDNode *User = *UI; 5036 bool UserRemovedFromCSEMaps = false; 5037 5038 // A user can appear in a use list multiple times, and when this 5039 // happens the uses are usually next to each other in the list. 5040 // To help reduce the number of CSE recomputations, process all 5041 // the uses of this user that we can find this way. 5042 do { 5043 SDUse &Use = UI.getUse(); 5044 5045 // Skip uses of different values from the same node. 5046 if (Use.getResNo() != From.getResNo()) { 5047 ++UI; 5048 continue; 5049 } 5050 5051 // If this node hasn't been modified yet, it's still in the CSE maps, 5052 // so remove its old self from the CSE maps. 5053 if (!UserRemovedFromCSEMaps) { 5054 RemoveNodeFromCSEMaps(User); 5055 UserRemovedFromCSEMaps = true; 5056 } 5057 5058 ++UI; 5059 Use.set(To); 5060 } while (UI != UE && *UI == User); 5061 5062 // We are iterating over all uses of the From node, so if a use 5063 // doesn't use the specific value, no changes are made. 5064 if (!UserRemovedFromCSEMaps) 5065 continue; 5066 5067 // Now that we have modified User, add it back to the CSE maps. If it 5068 // already exists there, recursively merge the results together. 5069 AddModifiedNodeToCSEMaps(User, &Listener); 5070 } 5071} 5072 5073namespace { 5074 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5075 /// to record information about a use. 5076 struct UseMemo { 5077 SDNode *User; 5078 unsigned Index; 5079 SDUse *Use; 5080 }; 5081 5082 /// operator< - Sort Memos by User. 5083 bool operator<(const UseMemo &L, const UseMemo &R) { 5084 return (intptr_t)L.User < (intptr_t)R.User; 5085 } 5086} 5087 5088/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5089/// uses of other values produced by From.getNode() alone. The same value 5090/// may appear in both the From and To list. The Deleted vector is 5091/// handled the same way as for ReplaceAllUsesWith. 5092void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5093 const SDValue *To, 5094 unsigned Num, 5095 DAGUpdateListener *UpdateListener){ 5096 // Handle the simple, trivial case efficiently. 5097 if (Num == 1) 5098 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5099 5100 // Read up all the uses and make records of them. This helps 5101 // processing new uses that are introduced during the 5102 // replacement process. 5103 SmallVector<UseMemo, 4> Uses; 5104 for (unsigned i = 0; i != Num; ++i) { 5105 unsigned FromResNo = From[i].getResNo(); 5106 SDNode *FromNode = From[i].getNode(); 5107 for (SDNode::use_iterator UI = FromNode->use_begin(), 5108 E = FromNode->use_end(); UI != E; ++UI) { 5109 SDUse &Use = UI.getUse(); 5110 if (Use.getResNo() == FromResNo) { 5111 UseMemo Memo = { *UI, i, &Use }; 5112 Uses.push_back(Memo); 5113 } 5114 } 5115 } 5116 5117 // Sort the uses, so that all the uses from a given User are together. 5118 std::sort(Uses.begin(), Uses.end()); 5119 5120 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5121 UseIndex != UseIndexEnd; ) { 5122 // We know that this user uses some value of From. If it is the right 5123 // value, update it. 5124 SDNode *User = Uses[UseIndex].User; 5125 5126 // This node is about to morph, remove its old self from the CSE maps. 5127 RemoveNodeFromCSEMaps(User); 5128 5129 // The Uses array is sorted, so all the uses for a given User 5130 // are next to each other in the list. 5131 // To help reduce the number of CSE recomputations, process all 5132 // the uses of this user that we can find this way. 5133 do { 5134 unsigned i = Uses[UseIndex].Index; 5135 SDUse &Use = *Uses[UseIndex].Use; 5136 ++UseIndex; 5137 5138 Use.set(To[i]); 5139 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5140 5141 // Now that we have modified User, add it back to the CSE maps. If it 5142 // already exists there, recursively merge the results together. 5143 AddModifiedNodeToCSEMaps(User, UpdateListener); 5144 } 5145} 5146 5147/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5148/// based on their topological order. It returns the maximum id and a vector 5149/// of the SDNodes* in assigned order by reference. 5150unsigned SelectionDAG::AssignTopologicalOrder() { 5151 5152 unsigned DAGSize = 0; 5153 5154 // SortedPos tracks the progress of the algorithm. Nodes before it are 5155 // sorted, nodes after it are unsorted. When the algorithm completes 5156 // it is at the end of the list. 5157 allnodes_iterator SortedPos = allnodes_begin(); 5158 5159 // Visit all the nodes. Move nodes with no operands to the front of 5160 // the list immediately. Annotate nodes that do have operands with their 5161 // operand count. Before we do this, the Node Id fields of the nodes 5162 // may contain arbitrary values. After, the Node Id fields for nodes 5163 // before SortedPos will contain the topological sort index, and the 5164 // Node Id fields for nodes At SortedPos and after will contain the 5165 // count of outstanding operands. 5166 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5167 SDNode *N = I++; 5168 checkForCycles(N); 5169 unsigned Degree = N->getNumOperands(); 5170 if (Degree == 0) { 5171 // A node with no uses, add it to the result array immediately. 5172 N->setNodeId(DAGSize++); 5173 allnodes_iterator Q = N; 5174 if (Q != SortedPos) 5175 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5176 assert(SortedPos != AllNodes.end() && "Overran node list"); 5177 ++SortedPos; 5178 } else { 5179 // Temporarily use the Node Id as scratch space for the degree count. 5180 N->setNodeId(Degree); 5181 } 5182 } 5183 5184 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5185 // such that by the time the end is reached all nodes will be sorted. 5186 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5187 SDNode *N = I; 5188 checkForCycles(N); 5189 // N is in sorted position, so all its uses have one less operand 5190 // that needs to be sorted. 5191 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5192 UI != UE; ++UI) { 5193 SDNode *P = *UI; 5194 unsigned Degree = P->getNodeId(); 5195 assert(Degree != 0 && "Invalid node degree"); 5196 --Degree; 5197 if (Degree == 0) { 5198 // All of P's operands are sorted, so P may sorted now. 5199 P->setNodeId(DAGSize++); 5200 if (P != SortedPos) 5201 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5202 assert(SortedPos != AllNodes.end() && "Overran node list"); 5203 ++SortedPos; 5204 } else { 5205 // Update P's outstanding operand count. 5206 P->setNodeId(Degree); 5207 } 5208 } 5209 if (I == SortedPos) { 5210#ifndef NDEBUG 5211 SDNode *S = ++I; 5212 dbgs() << "Overran sorted position:\n"; 5213 S->dumprFull(); 5214#endif 5215 llvm_unreachable(0); 5216 } 5217 } 5218 5219 assert(SortedPos == AllNodes.end() && 5220 "Topological sort incomplete!"); 5221 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5222 "First node in topological sort is not the entry token!"); 5223 assert(AllNodes.front().getNodeId() == 0 && 5224 "First node in topological sort has non-zero id!"); 5225 assert(AllNodes.front().getNumOperands() == 0 && 5226 "First node in topological sort has operands!"); 5227 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5228 "Last node in topologic sort has unexpected id!"); 5229 assert(AllNodes.back().use_empty() && 5230 "Last node in topologic sort has users!"); 5231 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5232 return DAGSize; 5233} 5234 5235/// AssignOrdering - Assign an order to the SDNode. 5236void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5237 assert(SD && "Trying to assign an order to a null node!"); 5238 Ordering->add(SD, Order); 5239} 5240 5241/// GetOrdering - Get the order for the SDNode. 5242unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5243 assert(SD && "Trying to get the order of a null node!"); 5244 return Ordering->getOrder(SD); 5245} 5246 5247/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5248/// value is produced by SD. 5249void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) { 5250 DbgInfo->add(DB, SD); 5251 if (SD) 5252 SD->setHasDebugValue(true); 5253} 5254 5255//===----------------------------------------------------------------------===// 5256// SDNode Class 5257//===----------------------------------------------------------------------===// 5258 5259HandleSDNode::~HandleSDNode() { 5260 DropOperands(); 5261} 5262 5263GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5264 EVT VT, int64_t o, unsigned char TF) 5265 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)), 5266 Offset(o), TargetFlags(TF) { 5267 TheGlobal = const_cast<GlobalValue*>(GA); 5268} 5269 5270MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5271 MachineMemOperand *mmo) 5272 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5273 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5274 MMO->isNonTemporal()); 5275 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5276 assert(isNonTemporal() == MMO->isNonTemporal() && 5277 "Non-temporal encoding error!"); 5278 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5279} 5280 5281MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5282 const SDValue *Ops, unsigned NumOps, EVT memvt, 5283 MachineMemOperand *mmo) 5284 : SDNode(Opc, dl, VTs, Ops, NumOps), 5285 MemoryVT(memvt), MMO(mmo) { 5286 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5287 MMO->isNonTemporal()); 5288 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5289 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5290} 5291 5292/// Profile - Gather unique data for the node. 5293/// 5294void SDNode::Profile(FoldingSetNodeID &ID) const { 5295 AddNodeIDNode(ID, this); 5296} 5297 5298namespace { 5299 struct EVTArray { 5300 std::vector<EVT> VTs; 5301 5302 EVTArray() { 5303 VTs.reserve(MVT::LAST_VALUETYPE); 5304 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5305 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5306 } 5307 }; 5308} 5309 5310static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5311static ManagedStatic<EVTArray> SimpleVTArray; 5312static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5313 5314/// getValueTypeList - Return a pointer to the specified value type. 5315/// 5316const EVT *SDNode::getValueTypeList(EVT VT) { 5317 if (VT.isExtended()) { 5318 sys::SmartScopedLock<true> Lock(*VTMutex); 5319 return &(*EVTs->insert(VT).first); 5320 } else { 5321 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5322 } 5323} 5324 5325/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5326/// indicated value. This method ignores uses of other values defined by this 5327/// operation. 5328bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5329 assert(Value < getNumValues() && "Bad value!"); 5330 5331 // TODO: Only iterate over uses of a given value of the node 5332 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5333 if (UI.getUse().getResNo() == Value) { 5334 if (NUses == 0) 5335 return false; 5336 --NUses; 5337 } 5338 } 5339 5340 // Found exactly the right number of uses? 5341 return NUses == 0; 5342} 5343 5344 5345/// hasAnyUseOfValue - Return true if there are any use of the indicated 5346/// value. This method ignores uses of other values defined by this operation. 5347bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5348 assert(Value < getNumValues() && "Bad value!"); 5349 5350 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5351 if (UI.getUse().getResNo() == Value) 5352 return true; 5353 5354 return false; 5355} 5356 5357 5358/// isOnlyUserOf - Return true if this node is the only use of N. 5359/// 5360bool SDNode::isOnlyUserOf(SDNode *N) const { 5361 bool Seen = false; 5362 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5363 SDNode *User = *I; 5364 if (User == this) 5365 Seen = true; 5366 else 5367 return false; 5368 } 5369 5370 return Seen; 5371} 5372 5373/// isOperand - Return true if this node is an operand of N. 5374/// 5375bool SDValue::isOperandOf(SDNode *N) const { 5376 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5377 if (*this == N->getOperand(i)) 5378 return true; 5379 return false; 5380} 5381 5382bool SDNode::isOperandOf(SDNode *N) const { 5383 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5384 if (this == N->OperandList[i].getNode()) 5385 return true; 5386 return false; 5387} 5388 5389/// reachesChainWithoutSideEffects - Return true if this operand (which must 5390/// be a chain) reaches the specified operand without crossing any 5391/// side-effecting instructions. In practice, this looks through token 5392/// factors and non-volatile loads. In order to remain efficient, this only 5393/// looks a couple of nodes in, it does not do an exhaustive search. 5394bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5395 unsigned Depth) const { 5396 if (*this == Dest) return true; 5397 5398 // Don't search too deeply, we just want to be able to see through 5399 // TokenFactor's etc. 5400 if (Depth == 0) return false; 5401 5402 // If this is a token factor, all inputs to the TF happen in parallel. If any 5403 // of the operands of the TF reach dest, then we can do the xform. 5404 if (getOpcode() == ISD::TokenFactor) { 5405 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5406 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5407 return true; 5408 return false; 5409 } 5410 5411 // Loads don't have side effects, look through them. 5412 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5413 if (!Ld->isVolatile()) 5414 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5415 } 5416 return false; 5417} 5418 5419/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5420/// is either an operand of N or it can be reached by traversing up the operands. 5421/// NOTE: this is an expensive method. Use it carefully. 5422bool SDNode::isPredecessorOf(SDNode *N) const { 5423 SmallPtrSet<SDNode *, 32> Visited; 5424 SmallVector<SDNode *, 16> Worklist; 5425 Worklist.push_back(N); 5426 5427 do { 5428 N = Worklist.pop_back_val(); 5429 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5430 SDNode *Op = N->getOperand(i).getNode(); 5431 if (Op == this) 5432 return true; 5433 if (Visited.insert(Op)) 5434 Worklist.push_back(Op); 5435 } 5436 } while (!Worklist.empty()); 5437 5438 return false; 5439} 5440 5441uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5442 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5443 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5444} 5445 5446std::string SDNode::getOperationName(const SelectionDAG *G) const { 5447 switch (getOpcode()) { 5448 default: 5449 if (getOpcode() < ISD::BUILTIN_OP_END) 5450 return "<<Unknown DAG Node>>"; 5451 if (isMachineOpcode()) { 5452 if (G) 5453 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5454 if (getMachineOpcode() < TII->getNumOpcodes()) 5455 return TII->get(getMachineOpcode()).getName(); 5456 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5457 } 5458 if (G) { 5459 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5460 const char *Name = TLI.getTargetNodeName(getOpcode()); 5461 if (Name) return Name; 5462 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5463 } 5464 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5465 5466#ifndef NDEBUG 5467 case ISD::DELETED_NODE: 5468 return "<<Deleted Node!>>"; 5469#endif 5470 case ISD::PREFETCH: return "Prefetch"; 5471 case ISD::MEMBARRIER: return "MemBarrier"; 5472 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5473 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5474 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5475 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5476 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5477 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5478 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5479 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5480 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5481 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5482 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5483 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5484 case ISD::PCMARKER: return "PCMarker"; 5485 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5486 case ISD::SRCVALUE: return "SrcValue"; 5487 case ISD::EntryToken: return "EntryToken"; 5488 case ISD::TokenFactor: return "TokenFactor"; 5489 case ISD::AssertSext: return "AssertSext"; 5490 case ISD::AssertZext: return "AssertZext"; 5491 5492 case ISD::BasicBlock: return "BasicBlock"; 5493 case ISD::VALUETYPE: return "ValueType"; 5494 case ISD::Register: return "Register"; 5495 5496 case ISD::Constant: return "Constant"; 5497 case ISD::ConstantFP: return "ConstantFP"; 5498 case ISD::GlobalAddress: return "GlobalAddress"; 5499 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5500 case ISD::FrameIndex: return "FrameIndex"; 5501 case ISD::JumpTable: return "JumpTable"; 5502 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5503 case ISD::RETURNADDR: return "RETURNADDR"; 5504 case ISD::FRAMEADDR: return "FRAMEADDR"; 5505 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5506 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5507 case ISD::LSDAADDR: return "LSDAADDR"; 5508 case ISD::EHSELECTION: return "EHSELECTION"; 5509 case ISD::EH_RETURN: return "EH_RETURN"; 5510 case ISD::ConstantPool: return "ConstantPool"; 5511 case ISD::ExternalSymbol: return "ExternalSymbol"; 5512 case ISD::BlockAddress: return "BlockAddress"; 5513 case ISD::INTRINSIC_WO_CHAIN: 5514 case ISD::INTRINSIC_VOID: 5515 case ISD::INTRINSIC_W_CHAIN: { 5516 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5517 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5518 if (IID < Intrinsic::num_intrinsics) 5519 return Intrinsic::getName((Intrinsic::ID)IID); 5520 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5521 return TII->getName(IID); 5522 llvm_unreachable("Invalid intrinsic ID"); 5523 } 5524 5525 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5526 case ISD::TargetConstant: return "TargetConstant"; 5527 case ISD::TargetConstantFP:return "TargetConstantFP"; 5528 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5529 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5530 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5531 case ISD::TargetJumpTable: return "TargetJumpTable"; 5532 case ISD::TargetConstantPool: return "TargetConstantPool"; 5533 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5534 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5535 5536 case ISD::CopyToReg: return "CopyToReg"; 5537 case ISD::CopyFromReg: return "CopyFromReg"; 5538 case ISD::UNDEF: return "undef"; 5539 case ISD::MERGE_VALUES: return "merge_values"; 5540 case ISD::INLINEASM: return "inlineasm"; 5541 case ISD::EH_LABEL: return "eh_label"; 5542 case ISD::HANDLENODE: return "handlenode"; 5543 5544 // Unary operators 5545 case ISD::FABS: return "fabs"; 5546 case ISD::FNEG: return "fneg"; 5547 case ISD::FSQRT: return "fsqrt"; 5548 case ISD::FSIN: return "fsin"; 5549 case ISD::FCOS: return "fcos"; 5550 case ISD::FPOWI: return "fpowi"; 5551 case ISD::FPOW: return "fpow"; 5552 case ISD::FTRUNC: return "ftrunc"; 5553 case ISD::FFLOOR: return "ffloor"; 5554 case ISD::FCEIL: return "fceil"; 5555 case ISD::FRINT: return "frint"; 5556 case ISD::FNEARBYINT: return "fnearbyint"; 5557 5558 // Binary operators 5559 case ISD::ADD: return "add"; 5560 case ISD::SUB: return "sub"; 5561 case ISD::MUL: return "mul"; 5562 case ISD::MULHU: return "mulhu"; 5563 case ISD::MULHS: return "mulhs"; 5564 case ISD::SDIV: return "sdiv"; 5565 case ISD::UDIV: return "udiv"; 5566 case ISD::SREM: return "srem"; 5567 case ISD::UREM: return "urem"; 5568 case ISD::SMUL_LOHI: return "smul_lohi"; 5569 case ISD::UMUL_LOHI: return "umul_lohi"; 5570 case ISD::SDIVREM: return "sdivrem"; 5571 case ISD::UDIVREM: return "udivrem"; 5572 case ISD::AND: return "and"; 5573 case ISD::OR: return "or"; 5574 case ISD::XOR: return "xor"; 5575 case ISD::SHL: return "shl"; 5576 case ISD::SRA: return "sra"; 5577 case ISD::SRL: return "srl"; 5578 case ISD::ROTL: return "rotl"; 5579 case ISD::ROTR: return "rotr"; 5580 case ISD::FADD: return "fadd"; 5581 case ISD::FSUB: return "fsub"; 5582 case ISD::FMUL: return "fmul"; 5583 case ISD::FDIV: return "fdiv"; 5584 case ISD::FREM: return "frem"; 5585 case ISD::FCOPYSIGN: return "fcopysign"; 5586 case ISD::FGETSIGN: return "fgetsign"; 5587 5588 case ISD::SETCC: return "setcc"; 5589 case ISD::VSETCC: return "vsetcc"; 5590 case ISD::SELECT: return "select"; 5591 case ISD::SELECT_CC: return "select_cc"; 5592 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5593 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5594 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5595 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5596 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5597 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5598 case ISD::CARRY_FALSE: return "carry_false"; 5599 case ISD::ADDC: return "addc"; 5600 case ISD::ADDE: return "adde"; 5601 case ISD::SADDO: return "saddo"; 5602 case ISD::UADDO: return "uaddo"; 5603 case ISD::SSUBO: return "ssubo"; 5604 case ISD::USUBO: return "usubo"; 5605 case ISD::SMULO: return "smulo"; 5606 case ISD::UMULO: return "umulo"; 5607 case ISD::SUBC: return "subc"; 5608 case ISD::SUBE: return "sube"; 5609 case ISD::SHL_PARTS: return "shl_parts"; 5610 case ISD::SRA_PARTS: return "sra_parts"; 5611 case ISD::SRL_PARTS: return "srl_parts"; 5612 5613 // Conversion operators. 5614 case ISD::SIGN_EXTEND: return "sign_extend"; 5615 case ISD::ZERO_EXTEND: return "zero_extend"; 5616 case ISD::ANY_EXTEND: return "any_extend"; 5617 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5618 case ISD::TRUNCATE: return "truncate"; 5619 case ISD::FP_ROUND: return "fp_round"; 5620 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5621 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5622 case ISD::FP_EXTEND: return "fp_extend"; 5623 5624 case ISD::SINT_TO_FP: return "sint_to_fp"; 5625 case ISD::UINT_TO_FP: return "uint_to_fp"; 5626 case ISD::FP_TO_SINT: return "fp_to_sint"; 5627 case ISD::FP_TO_UINT: return "fp_to_uint"; 5628 case ISD::BIT_CONVERT: return "bit_convert"; 5629 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5630 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5631 5632 case ISD::CONVERT_RNDSAT: { 5633 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5634 default: llvm_unreachable("Unknown cvt code!"); 5635 case ISD::CVT_FF: return "cvt_ff"; 5636 case ISD::CVT_FS: return "cvt_fs"; 5637 case ISD::CVT_FU: return "cvt_fu"; 5638 case ISD::CVT_SF: return "cvt_sf"; 5639 case ISD::CVT_UF: return "cvt_uf"; 5640 case ISD::CVT_SS: return "cvt_ss"; 5641 case ISD::CVT_SU: return "cvt_su"; 5642 case ISD::CVT_US: return "cvt_us"; 5643 case ISD::CVT_UU: return "cvt_uu"; 5644 } 5645 } 5646 5647 // Control flow instructions 5648 case ISD::BR: return "br"; 5649 case ISD::BRIND: return "brind"; 5650 case ISD::BR_JT: return "br_jt"; 5651 case ISD::BRCOND: return "brcond"; 5652 case ISD::BR_CC: return "br_cc"; 5653 case ISD::CALLSEQ_START: return "callseq_start"; 5654 case ISD::CALLSEQ_END: return "callseq_end"; 5655 5656 // Other operators 5657 case ISD::LOAD: return "load"; 5658 case ISD::STORE: return "store"; 5659 case ISD::VAARG: return "vaarg"; 5660 case ISD::VACOPY: return "vacopy"; 5661 case ISD::VAEND: return "vaend"; 5662 case ISD::VASTART: return "vastart"; 5663 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5664 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5665 case ISD::BUILD_PAIR: return "build_pair"; 5666 case ISD::STACKSAVE: return "stacksave"; 5667 case ISD::STACKRESTORE: return "stackrestore"; 5668 case ISD::TRAP: return "trap"; 5669 5670 // Bit manipulation 5671 case ISD::BSWAP: return "bswap"; 5672 case ISD::CTPOP: return "ctpop"; 5673 case ISD::CTTZ: return "cttz"; 5674 case ISD::CTLZ: return "ctlz"; 5675 5676 // Trampolines 5677 case ISD::TRAMPOLINE: return "trampoline"; 5678 5679 case ISD::CONDCODE: 5680 switch (cast<CondCodeSDNode>(this)->get()) { 5681 default: llvm_unreachable("Unknown setcc condition!"); 5682 case ISD::SETOEQ: return "setoeq"; 5683 case ISD::SETOGT: return "setogt"; 5684 case ISD::SETOGE: return "setoge"; 5685 case ISD::SETOLT: return "setolt"; 5686 case ISD::SETOLE: return "setole"; 5687 case ISD::SETONE: return "setone"; 5688 5689 case ISD::SETO: return "seto"; 5690 case ISD::SETUO: return "setuo"; 5691 case ISD::SETUEQ: return "setue"; 5692 case ISD::SETUGT: return "setugt"; 5693 case ISD::SETUGE: return "setuge"; 5694 case ISD::SETULT: return "setult"; 5695 case ISD::SETULE: return "setule"; 5696 case ISD::SETUNE: return "setune"; 5697 5698 case ISD::SETEQ: return "seteq"; 5699 case ISD::SETGT: return "setgt"; 5700 case ISD::SETGE: return "setge"; 5701 case ISD::SETLT: return "setlt"; 5702 case ISD::SETLE: return "setle"; 5703 case ISD::SETNE: return "setne"; 5704 } 5705 } 5706} 5707 5708const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5709 switch (AM) { 5710 default: 5711 return ""; 5712 case ISD::PRE_INC: 5713 return "<pre-inc>"; 5714 case ISD::PRE_DEC: 5715 return "<pre-dec>"; 5716 case ISD::POST_INC: 5717 return "<post-inc>"; 5718 case ISD::POST_DEC: 5719 return "<post-dec>"; 5720 } 5721} 5722 5723std::string ISD::ArgFlagsTy::getArgFlagsString() { 5724 std::string S = "< "; 5725 5726 if (isZExt()) 5727 S += "zext "; 5728 if (isSExt()) 5729 S += "sext "; 5730 if (isInReg()) 5731 S += "inreg "; 5732 if (isSRet()) 5733 S += "sret "; 5734 if (isByVal()) 5735 S += "byval "; 5736 if (isNest()) 5737 S += "nest "; 5738 if (getByValAlign()) 5739 S += "byval-align:" + utostr(getByValAlign()) + " "; 5740 if (getOrigAlign()) 5741 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5742 if (getByValSize()) 5743 S += "byval-size:" + utostr(getByValSize()) + " "; 5744 return S + ">"; 5745} 5746 5747void SDNode::dump() const { dump(0); } 5748void SDNode::dump(const SelectionDAG *G) const { 5749 print(dbgs(), G); 5750} 5751 5752void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5753 OS << (void*)this << ": "; 5754 5755 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5756 if (i) OS << ","; 5757 if (getValueType(i) == MVT::Other) 5758 OS << "ch"; 5759 else 5760 OS << getValueType(i).getEVTString(); 5761 } 5762 OS << " = " << getOperationName(G); 5763} 5764 5765void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5766 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5767 if (!MN->memoperands_empty()) { 5768 OS << "<"; 5769 OS << "Mem:"; 5770 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5771 e = MN->memoperands_end(); i != e; ++i) { 5772 OS << **i; 5773 if (next(i) != e) 5774 OS << " "; 5775 } 5776 OS << ">"; 5777 } 5778 } else if (const ShuffleVectorSDNode *SVN = 5779 dyn_cast<ShuffleVectorSDNode>(this)) { 5780 OS << "<"; 5781 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5782 int Idx = SVN->getMaskElt(i); 5783 if (i) OS << ","; 5784 if (Idx < 0) 5785 OS << "u"; 5786 else 5787 OS << Idx; 5788 } 5789 OS << ">"; 5790 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5791 OS << '<' << CSDN->getAPIntValue() << '>'; 5792 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5793 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5794 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5795 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5796 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5797 else { 5798 OS << "<APFloat("; 5799 CSDN->getValueAPF().bitcastToAPInt().dump(); 5800 OS << ")>"; 5801 } 5802 } else if (const GlobalAddressSDNode *GADN = 5803 dyn_cast<GlobalAddressSDNode>(this)) { 5804 int64_t offset = GADN->getOffset(); 5805 OS << '<'; 5806 WriteAsOperand(OS, GADN->getGlobal()); 5807 OS << '>'; 5808 if (offset > 0) 5809 OS << " + " << offset; 5810 else 5811 OS << " " << offset; 5812 if (unsigned int TF = GADN->getTargetFlags()) 5813 OS << " [TF=" << TF << ']'; 5814 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5815 OS << "<" << FIDN->getIndex() << ">"; 5816 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5817 OS << "<" << JTDN->getIndex() << ">"; 5818 if (unsigned int TF = JTDN->getTargetFlags()) 5819 OS << " [TF=" << TF << ']'; 5820 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5821 int offset = CP->getOffset(); 5822 if (CP->isMachineConstantPoolEntry()) 5823 OS << "<" << *CP->getMachineCPVal() << ">"; 5824 else 5825 OS << "<" << *CP->getConstVal() << ">"; 5826 if (offset > 0) 5827 OS << " + " << offset; 5828 else 5829 OS << " " << offset; 5830 if (unsigned int TF = CP->getTargetFlags()) 5831 OS << " [TF=" << TF << ']'; 5832 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5833 OS << "<"; 5834 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5835 if (LBB) 5836 OS << LBB->getName() << " "; 5837 OS << (const void*)BBDN->getBasicBlock() << ">"; 5838 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5839 if (G && R->getReg() && 5840 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5841 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5842 } else { 5843 OS << " %reg" << R->getReg(); 5844 } 5845 } else if (const ExternalSymbolSDNode *ES = 5846 dyn_cast<ExternalSymbolSDNode>(this)) { 5847 OS << "'" << ES->getSymbol() << "'"; 5848 if (unsigned int TF = ES->getTargetFlags()) 5849 OS << " [TF=" << TF << ']'; 5850 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5851 if (M->getValue()) 5852 OS << "<" << M->getValue() << ">"; 5853 else 5854 OS << "<null>"; 5855 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5856 OS << ":" << N->getVT().getEVTString(); 5857 } 5858 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5859 OS << "<" << *LD->getMemOperand(); 5860 5861 bool doExt = true; 5862 switch (LD->getExtensionType()) { 5863 default: doExt = false; break; 5864 case ISD::EXTLOAD: OS << ", anyext"; break; 5865 case ISD::SEXTLOAD: OS << ", sext"; break; 5866 case ISD::ZEXTLOAD: OS << ", zext"; break; 5867 } 5868 if (doExt) 5869 OS << " from " << LD->getMemoryVT().getEVTString(); 5870 5871 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5872 if (*AM) 5873 OS << ", " << AM; 5874 5875 OS << ">"; 5876 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5877 OS << "<" << *ST->getMemOperand(); 5878 5879 if (ST->isTruncatingStore()) 5880 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5881 5882 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5883 if (*AM) 5884 OS << ", " << AM; 5885 5886 OS << ">"; 5887 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5888 OS << "<" << *M->getMemOperand() << ">"; 5889 } else if (const BlockAddressSDNode *BA = 5890 dyn_cast<BlockAddressSDNode>(this)) { 5891 OS << "<"; 5892 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5893 OS << ", "; 5894 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 5895 OS << ">"; 5896 if (unsigned int TF = BA->getTargetFlags()) 5897 OS << " [TF=" << TF << ']'; 5898 } 5899 5900 if (G) 5901 if (unsigned Order = G->GetOrdering(this)) 5902 OS << " [ORD=" << Order << ']'; 5903 5904 if (getNodeId() != -1) 5905 OS << " [ID=" << getNodeId() << ']'; 5906} 5907 5908void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5909 print_types(OS, G); 5910 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5911 if (i) OS << ", "; else OS << " "; 5912 OS << (void*)getOperand(i).getNode(); 5913 if (unsigned RN = getOperand(i).getResNo()) 5914 OS << ":" << RN; 5915 } 5916 print_details(OS, G); 5917} 5918 5919static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 5920 const SelectionDAG *G, unsigned depth, 5921 unsigned indent) 5922{ 5923 if (depth == 0) 5924 return; 5925 5926 OS.indent(indent); 5927 5928 N->print(OS, G); 5929 5930 if (depth < 1) 5931 return; 5932 5933 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5934 OS << '\n'; 5935 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 5936 } 5937} 5938 5939void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 5940 unsigned depth) const { 5941 printrWithDepthHelper(OS, this, G, depth, 0); 5942} 5943 5944void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 5945 // Don't print impossibly deep things. 5946 printrWithDepth(OS, G, 100); 5947} 5948 5949void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 5950 printrWithDepth(dbgs(), G, depth); 5951} 5952 5953void SDNode::dumprFull(const SelectionDAG *G) const { 5954 // Don't print impossibly deep things. 5955 dumprWithDepth(G, 100); 5956} 5957 5958static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5959 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5960 if (N->getOperand(i).getNode()->hasOneUse()) 5961 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5962 else 5963 dbgs() << "\n" << std::string(indent+2, ' ') 5964 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5965 5966 5967 dbgs() << "\n"; 5968 dbgs().indent(indent); 5969 N->dump(G); 5970} 5971 5972SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 5973 assert(N->getNumValues() == 1 && 5974 "Can't unroll a vector with multiple results!"); 5975 5976 EVT VT = N->getValueType(0); 5977 unsigned NE = VT.getVectorNumElements(); 5978 EVT EltVT = VT.getVectorElementType(); 5979 DebugLoc dl = N->getDebugLoc(); 5980 5981 SmallVector<SDValue, 8> Scalars; 5982 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 5983 5984 // If ResNE is 0, fully unroll the vector op. 5985 if (ResNE == 0) 5986 ResNE = NE; 5987 else if (NE > ResNE) 5988 NE = ResNE; 5989 5990 unsigned i; 5991 for (i= 0; i != NE; ++i) { 5992 for (unsigned j = 0; j != N->getNumOperands(); ++j) { 5993 SDValue Operand = N->getOperand(j); 5994 EVT OperandVT = Operand.getValueType(); 5995 if (OperandVT.isVector()) { 5996 // A vector operand; extract a single element. 5997 EVT OperandEltVT = OperandVT.getVectorElementType(); 5998 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 5999 OperandEltVT, 6000 Operand, 6001 getConstant(i, MVT::i32)); 6002 } else { 6003 // A scalar operand; just use it as is. 6004 Operands[j] = Operand; 6005 } 6006 } 6007 6008 switch (N->getOpcode()) { 6009 default: 6010 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6011 &Operands[0], Operands.size())); 6012 break; 6013 case ISD::SHL: 6014 case ISD::SRA: 6015 case ISD::SRL: 6016 case ISD::ROTL: 6017 case ISD::ROTR: 6018 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6019 getShiftAmountOperand(Operands[1]))); 6020 break; 6021 case ISD::SIGN_EXTEND_INREG: 6022 case ISD::FP_ROUND_INREG: { 6023 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6024 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6025 Operands[0], 6026 getValueType(ExtVT))); 6027 } 6028 } 6029 } 6030 6031 for (; i < ResNE; ++i) 6032 Scalars.push_back(getUNDEF(EltVT)); 6033 6034 return getNode(ISD::BUILD_VECTOR, dl, 6035 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6036 &Scalars[0], Scalars.size()); 6037} 6038 6039 6040/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6041/// location that is 'Dist' units away from the location that the 'Base' load 6042/// is loading from. 6043bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6044 unsigned Bytes, int Dist) const { 6045 if (LD->getChain() != Base->getChain()) 6046 return false; 6047 EVT VT = LD->getValueType(0); 6048 if (VT.getSizeInBits() / 8 != Bytes) 6049 return false; 6050 6051 SDValue Loc = LD->getOperand(1); 6052 SDValue BaseLoc = Base->getOperand(1); 6053 if (Loc.getOpcode() == ISD::FrameIndex) { 6054 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6055 return false; 6056 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6057 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6058 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6059 int FS = MFI->getObjectSize(FI); 6060 int BFS = MFI->getObjectSize(BFI); 6061 if (FS != BFS || FS != (int)Bytes) return false; 6062 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6063 } 6064 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6065 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6066 if (V && (V->getSExtValue() == Dist*Bytes)) 6067 return true; 6068 } 6069 6070 GlobalValue *GV1 = NULL; 6071 GlobalValue *GV2 = NULL; 6072 int64_t Offset1 = 0; 6073 int64_t Offset2 = 0; 6074 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6075 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6076 if (isGA1 && isGA2 && GV1 == GV2) 6077 return Offset1 == (Offset2 + Dist*Bytes); 6078 return false; 6079} 6080 6081 6082/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6083/// it cannot be inferred. 6084unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6085 // If this is a GlobalAddress + cst, return the alignment. 6086 GlobalValue *GV; 6087 int64_t GVOffset = 0; 6088 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) 6089 return MinAlign(GV->getAlignment(), GVOffset); 6090 6091 // If this is a direct reference to a stack slot, use information about the 6092 // stack slot's alignment. 6093 int FrameIdx = 1 << 31; 6094 int64_t FrameOffset = 0; 6095 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6096 FrameIdx = FI->getIndex(); 6097 } else if (Ptr.getOpcode() == ISD::ADD && 6098 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6099 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6100 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6101 FrameOffset = Ptr.getConstantOperandVal(1); 6102 } 6103 6104 if (FrameIdx != (1 << 31)) { 6105 // FIXME: Handle FI+CST. 6106 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6107 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6108 FrameOffset); 6109 if (MFI.isFixedObjectIndex(FrameIdx)) { 6110 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6111 6112 // The alignment of the frame index can be determined from its offset from 6113 // the incoming frame position. If the frame object is at offset 32 and 6114 // the stack is guaranteed to be 16-byte aligned, then we know that the 6115 // object is 16-byte aligned. 6116 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6117 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6118 6119 // Finally, the frame object itself may have a known alignment. Factor 6120 // the alignment + offset into a new alignment. For example, if we know 6121 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6122 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6123 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6124 return std::max(Align, FIInfoAlign); 6125 } 6126 return FIInfoAlign; 6127 } 6128 6129 return 0; 6130} 6131 6132void SelectionDAG::dump() const { 6133 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6134 6135 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6136 I != E; ++I) { 6137 const SDNode *N = I; 6138 if (!N->hasOneUse() && N != getRoot().getNode()) 6139 DumpNodes(N, 2, this); 6140 } 6141 6142 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6143 6144 dbgs() << "\n\n"; 6145} 6146 6147void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6148 print_types(OS, G); 6149 print_details(OS, G); 6150} 6151 6152typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6153static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6154 const SelectionDAG *G, VisitedSDNodeSet &once) { 6155 if (!once.insert(N)) // If we've been here before, return now. 6156 return; 6157 6158 // Dump the current SDNode, but don't end the line yet. 6159 OS << std::string(indent, ' '); 6160 N->printr(OS, G); 6161 6162 // Having printed this SDNode, walk the children: 6163 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6164 const SDNode *child = N->getOperand(i).getNode(); 6165 6166 if (i) OS << ","; 6167 OS << " "; 6168 6169 if (child->getNumOperands() == 0) { 6170 // This child has no grandchildren; print it inline right here. 6171 child->printr(OS, G); 6172 once.insert(child); 6173 } else { // Just the address. FIXME: also print the child's opcode. 6174 OS << (void*)child; 6175 if (unsigned RN = N->getOperand(i).getResNo()) 6176 OS << ":" << RN; 6177 } 6178 } 6179 6180 OS << "\n"; 6181 6182 // Dump children that have grandchildren on their own line(s). 6183 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6184 const SDNode *child = N->getOperand(i).getNode(); 6185 DumpNodesr(OS, child, indent+2, G, once); 6186 } 6187} 6188 6189void SDNode::dumpr() const { 6190 VisitedSDNodeSet once; 6191 DumpNodesr(dbgs(), this, 0, 0, once); 6192} 6193 6194void SDNode::dumpr(const SelectionDAG *G) const { 6195 VisitedSDNodeSet once; 6196 DumpNodesr(dbgs(), this, 0, G, once); 6197} 6198 6199 6200// getAddressSpace - Return the address space this GlobalAddress belongs to. 6201unsigned GlobalAddressSDNode::getAddressSpace() const { 6202 return getGlobal()->getType()->getAddressSpace(); 6203} 6204 6205 6206const Type *ConstantPoolSDNode::getType() const { 6207 if (isMachineConstantPoolEntry()) 6208 return Val.MachineCPVal->getType(); 6209 return Val.ConstVal->getType(); 6210} 6211 6212bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6213 APInt &SplatUndef, 6214 unsigned &SplatBitSize, 6215 bool &HasAnyUndefs, 6216 unsigned MinSplatBits, 6217 bool isBigEndian) { 6218 EVT VT = getValueType(0); 6219 assert(VT.isVector() && "Expected a vector type"); 6220 unsigned sz = VT.getSizeInBits(); 6221 if (MinSplatBits > sz) 6222 return false; 6223 6224 SplatValue = APInt(sz, 0); 6225 SplatUndef = APInt(sz, 0); 6226 6227 // Get the bits. Bits with undefined values (when the corresponding element 6228 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6229 // in SplatValue. If any of the values are not constant, give up and return 6230 // false. 6231 unsigned int nOps = getNumOperands(); 6232 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6233 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6234 6235 for (unsigned j = 0; j < nOps; ++j) { 6236 unsigned i = isBigEndian ? nOps-1-j : j; 6237 SDValue OpVal = getOperand(i); 6238 unsigned BitPos = j * EltBitSize; 6239 6240 if (OpVal.getOpcode() == ISD::UNDEF) 6241 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6242 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6243 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6244 zextOrTrunc(sz) << BitPos); 6245 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6246 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6247 else 6248 return false; 6249 } 6250 6251 // The build_vector is all constants or undefs. Find the smallest element 6252 // size that splats the vector. 6253 6254 HasAnyUndefs = (SplatUndef != 0); 6255 while (sz > 8) { 6256 6257 unsigned HalfSize = sz / 2; 6258 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6259 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6260 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6261 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6262 6263 // If the two halves do not match (ignoring undef bits), stop here. 6264 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6265 MinSplatBits > HalfSize) 6266 break; 6267 6268 SplatValue = HighValue | LowValue; 6269 SplatUndef = HighUndef & LowUndef; 6270 6271 sz = HalfSize; 6272 } 6273 6274 SplatBitSize = sz; 6275 return true; 6276} 6277 6278bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6279 // Find the first non-undef value in the shuffle mask. 6280 unsigned i, e; 6281 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6282 /* search */; 6283 6284 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6285 6286 // Make sure all remaining elements are either undef or the same as the first 6287 // non-undef value. 6288 for (int Idx = Mask[i]; i != e; ++i) 6289 if (Mask[i] >= 0 && Mask[i] != Idx) 6290 return false; 6291 return true; 6292} 6293 6294#ifdef XDEBUG 6295static void checkForCyclesHelper(const SDNode *N, 6296 SmallPtrSet<const SDNode*, 32> &Visited, 6297 SmallPtrSet<const SDNode*, 32> &Checked) { 6298 // If this node has already been checked, don't check it again. 6299 if (Checked.count(N)) 6300 return; 6301 6302 // If a node has already been visited on this depth-first walk, reject it as 6303 // a cycle. 6304 if (!Visited.insert(N)) { 6305 dbgs() << "Offending node:\n"; 6306 N->dumprFull(); 6307 errs() << "Detected cycle in SelectionDAG\n"; 6308 abort(); 6309 } 6310 6311 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6312 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6313 6314 Checked.insert(N); 6315 Visited.erase(N); 6316} 6317#endif 6318 6319void llvm::checkForCycles(const llvm::SDNode *N) { 6320#ifdef XDEBUG 6321 assert(N && "Checking nonexistant SDNode"); 6322 SmallPtrSet<const SDNode*, 32> visited; 6323 SmallPtrSet<const SDNode*, 32> checked; 6324 checkForCyclesHelper(N, visited, checked); 6325#endif 6326} 6327 6328void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6329 checkForCycles(DAG->getRoot().getNode()); 6330} 6331