SelectionDAG.cpp revision cb26983c363c82f2568f7ee27030429d9b011445
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetFrameInfo.h" 35#include "llvm/Target/TargetLowering.h" 36#include "llvm/Target/TargetSelectionDAGInfo.h" 37#include "llvm/Target/TargetOptions.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetIntrinsicInfo.h" 40#include "llvm/Target/TargetMachine.h" 41#include "llvm/Support/CommandLine.h" 42#include "llvm/Support/Debug.h" 43#include "llvm/Support/ErrorHandling.h" 44#include "llvm/Support/ManagedStatic.h" 45#include "llvm/Support/MathExtras.h" 46#include "llvm/Support/raw_ostream.h" 47#include "llvm/System/Mutex.h" 48#include "llvm/ADT/SetVector.h" 49#include "llvm/ADT/SmallPtrSet.h" 50#include "llvm/ADT/SmallSet.h" 51#include "llvm/ADT/SmallVector.h" 52#include "llvm/ADT/StringExtras.h" 53#include <algorithm> 54#include <cmath> 55using namespace llvm; 56 57/// makeVTList - Return an instance of the SDVTList struct initialized with the 58/// specified members. 59static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 60 SDVTList Res = {VTs, NumVTs}; 61 return Res; 62} 63 64static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 65 switch (VT.getSimpleVT().SimpleTy) { 66 default: llvm_unreachable("Unknown FP format"); 67 case MVT::f32: return &APFloat::IEEEsingle; 68 case MVT::f64: return &APFloat::IEEEdouble; 69 case MVT::f80: return &APFloat::x87DoubleExtended; 70 case MVT::f128: return &APFloat::IEEEquad; 71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 72 } 73} 74 75SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 76 77//===----------------------------------------------------------------------===// 78// ConstantFPSDNode Class 79//===----------------------------------------------------------------------===// 80 81/// isExactlyValue - We don't rely on operator== working on double values, as 82/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 83/// As such, this method can be used to do an exact bit-for-bit comparison of 84/// two floating point values. 85bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 86 return getValueAPF().bitwiseIsEqual(V); 87} 88 89bool ConstantFPSDNode::isValueValidForType(EVT VT, 90 const APFloat& Val) { 91 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 92 93 // PPC long double cannot be converted to any other type. 94 if (VT == MVT::ppcf128 || 95 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 96 return false; 97 98 // convert modifies in place, so make a copy. 99 APFloat Val2 = APFloat(Val); 100 bool losesInfo; 101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 102 &losesInfo); 103 return !losesInfo; 104} 105 106//===----------------------------------------------------------------------===// 107// ISD Namespace 108//===----------------------------------------------------------------------===// 109 110/// isBuildVectorAllOnes - Return true if the specified node is a 111/// BUILD_VECTOR where all of the elements are ~0 or undef. 112bool ISD::isBuildVectorAllOnes(const SDNode *N) { 113 // Look through a bit convert. 114 if (N->getOpcode() == ISD::BIT_CONVERT) 115 N = N->getOperand(0).getNode(); 116 117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 118 119 unsigned i = 0, e = N->getNumOperands(); 120 121 // Skip over all of the undef values. 122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 123 ++i; 124 125 // Do not accept an all-undef vector. 126 if (i == e) return false; 127 128 // Do not accept build_vectors that aren't all constants or which have non-~0 129 // elements. 130 SDValue NotZero = N->getOperand(i); 131 if (isa<ConstantSDNode>(NotZero)) { 132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 133 return false; 134 } else if (isa<ConstantFPSDNode>(NotZero)) { 135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 136 bitcastToAPInt().isAllOnesValue()) 137 return false; 138 } else 139 return false; 140 141 // Okay, we have at least one ~0 value, check to see if the rest match or are 142 // undefs. 143 for (++i; i != e; ++i) 144 if (N->getOperand(i) != NotZero && 145 N->getOperand(i).getOpcode() != ISD::UNDEF) 146 return false; 147 return true; 148} 149 150 151/// isBuildVectorAllZeros - Return true if the specified node is a 152/// BUILD_VECTOR where all of the elements are 0 or undef. 153bool ISD::isBuildVectorAllZeros(const SDNode *N) { 154 // Look through a bit convert. 155 if (N->getOpcode() == ISD::BIT_CONVERT) 156 N = N->getOperand(0).getNode(); 157 158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 159 160 unsigned i = 0, e = N->getNumOperands(); 161 162 // Skip over all of the undef values. 163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 164 ++i; 165 166 // Do not accept an all-undef vector. 167 if (i == e) return false; 168 169 // Do not accept build_vectors that aren't all constants or which have non-0 170 // elements. 171 SDValue Zero = N->getOperand(i); 172 if (isa<ConstantSDNode>(Zero)) { 173 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 174 return false; 175 } else if (isa<ConstantFPSDNode>(Zero)) { 176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 177 return false; 178 } else 179 return false; 180 181 // Okay, we have at least one 0 value, check to see if the rest match or are 182 // undefs. 183 for (++i; i != e; ++i) 184 if (N->getOperand(i) != Zero && 185 N->getOperand(i).getOpcode() != ISD::UNDEF) 186 return false; 187 return true; 188} 189 190/// isScalarToVector - Return true if the specified node is a 191/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 192/// element is not an undef. 193bool ISD::isScalarToVector(const SDNode *N) { 194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 195 return true; 196 197 if (N->getOpcode() != ISD::BUILD_VECTOR) 198 return false; 199 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 200 return false; 201 unsigned NumElems = N->getNumOperands(); 202 for (unsigned i = 1; i < NumElems; ++i) { 203 SDValue V = N->getOperand(i); 204 if (V.getOpcode() != ISD::UNDEF) 205 return false; 206 } 207 return true; 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 231 if (Operation > ISD::SETTRUE2) 232 Operation &= ~8; // Don't let N and U bits get set. 233 234 return ISD::CondCode(Operation); 235} 236 237 238/// isSignedOp - For an integer comparison, return 1 if the comparison is a 239/// signed operation and 2 if the result is an unsigned comparison. Return zero 240/// if the operation does not depend on the sign of the input (setne and seteq). 241static int isSignedOp(ISD::CondCode Opcode) { 242 switch (Opcode) { 243 default: llvm_unreachable("Illegal integer setcc operation!"); 244 case ISD::SETEQ: 245 case ISD::SETNE: return 0; 246 case ISD::SETLT: 247 case ISD::SETLE: 248 case ISD::SETGT: 249 case ISD::SETGE: return 1; 250 case ISD::SETULT: 251 case ISD::SETULE: 252 case ISD::SETUGT: 253 case ISD::SETUGE: return 2; 254 } 255} 256 257/// getSetCCOrOperation - Return the result of a logical OR between different 258/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 259/// returns SETCC_INVALID if it is not possible to represent the resultant 260/// comparison. 261ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 262 bool isInteger) { 263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 264 // Cannot fold a signed integer setcc with an unsigned integer setcc. 265 return ISD::SETCC_INVALID; 266 267 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 268 269 // If the N and U bits get set then the resultant comparison DOES suddenly 270 // care about orderedness, and is true when ordered. 271 if (Op > ISD::SETTRUE2) 272 Op &= ~16; // Clear the U bit if the N bit is set. 273 274 // Canonicalize illegal integer setcc's. 275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 276 Op = ISD::SETNE; 277 278 return ISD::CondCode(Op); 279} 280 281/// getSetCCAndOperation - Return the result of a logical AND between different 282/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 283/// function returns zero if it is not possible to represent the resultant 284/// comparison. 285ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 286 bool isInteger) { 287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 288 // Cannot fold a signed setcc with an unsigned setcc. 289 return ISD::SETCC_INVALID; 290 291 // Combine all of the condition bits. 292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 293 294 // Canonicalize illegal integer setcc's. 295 if (isInteger) { 296 switch (Result) { 297 default: break; 298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 299 case ISD::SETOEQ: // SETEQ & SETU[LG]E 300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 303 } 304 } 305 306 return Result; 307} 308 309//===----------------------------------------------------------------------===// 310// SDNode Profile Support 311//===----------------------------------------------------------------------===// 312 313/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 314/// 315static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 316 ID.AddInteger(OpC); 317} 318 319/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 320/// solely with their pointer. 321static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 322 ID.AddPointer(VTList.VTs); 323} 324 325/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 326/// 327static void AddNodeIDOperands(FoldingSetNodeID &ID, 328 const SDValue *Ops, unsigned NumOps) { 329 for (; NumOps; --NumOps, ++Ops) { 330 ID.AddPointer(Ops->getNode()); 331 ID.AddInteger(Ops->getResNo()); 332 } 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDUse *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345static void AddNodeIDNode(FoldingSetNodeID &ID, 346 unsigned short OpC, SDVTList VTList, 347 const SDValue *OpList, unsigned N) { 348 AddNodeIDOpcode(ID, OpC); 349 AddNodeIDValueTypes(ID, VTList); 350 AddNodeIDOperands(ID, OpList, N); 351} 352 353/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 354/// the NodeID data. 355static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 356 switch (N->getOpcode()) { 357 case ISD::TargetExternalSymbol: 358 case ISD::ExternalSymbol: 359 llvm_unreachable("Should only be used on nodes with operands"); 360 default: break; // Normal nodes don't need extra info. 361 case ISD::TargetConstant: 362 case ISD::Constant: 363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 364 break; 365 case ISD::TargetConstantFP: 366 case ISD::ConstantFP: { 367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 368 break; 369 } 370 case ISD::TargetGlobalAddress: 371 case ISD::GlobalAddress: 372 case ISD::TargetGlobalTLSAddress: 373 case ISD::GlobalTLSAddress: { 374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 375 ID.AddPointer(GA->getGlobal()); 376 ID.AddInteger(GA->getOffset()); 377 ID.AddInteger(GA->getTargetFlags()); 378 break; 379 } 380 case ISD::BasicBlock: 381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 382 break; 383 case ISD::Register: 384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 385 break; 386 387 case ISD::SRCVALUE: 388 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 389 break; 390 case ISD::FrameIndex: 391 case ISD::TargetFrameIndex: 392 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 393 break; 394 case ISD::JumpTable: 395 case ISD::TargetJumpTable: 396 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 398 break; 399 case ISD::ConstantPool: 400 case ISD::TargetConstantPool: { 401 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 402 ID.AddInteger(CP->getAlignment()); 403 ID.AddInteger(CP->getOffset()); 404 if (CP->isMachineConstantPoolEntry()) 405 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 406 else 407 ID.AddPointer(CP->getConstVal()); 408 ID.AddInteger(CP->getTargetFlags()); 409 break; 410 } 411 case ISD::LOAD: { 412 const LoadSDNode *LD = cast<LoadSDNode>(N); 413 ID.AddInteger(LD->getMemoryVT().getRawBits()); 414 ID.AddInteger(LD->getRawSubclassData()); 415 break; 416 } 417 case ISD::STORE: { 418 const StoreSDNode *ST = cast<StoreSDNode>(N); 419 ID.AddInteger(ST->getMemoryVT().getRawBits()); 420 ID.AddInteger(ST->getRawSubclassData()); 421 break; 422 } 423 case ISD::ATOMIC_CMP_SWAP: 424 case ISD::ATOMIC_SWAP: 425 case ISD::ATOMIC_LOAD_ADD: 426 case ISD::ATOMIC_LOAD_SUB: 427 case ISD::ATOMIC_LOAD_AND: 428 case ISD::ATOMIC_LOAD_OR: 429 case ISD::ATOMIC_LOAD_XOR: 430 case ISD::ATOMIC_LOAD_NAND: 431 case ISD::ATOMIC_LOAD_MIN: 432 case ISD::ATOMIC_LOAD_MAX: 433 case ISD::ATOMIC_LOAD_UMIN: 434 case ISD::ATOMIC_LOAD_UMAX: { 435 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 436 ID.AddInteger(AT->getMemoryVT().getRawBits()); 437 ID.AddInteger(AT->getRawSubclassData()); 438 break; 439 } 440 case ISD::VECTOR_SHUFFLE: { 441 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 442 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 443 i != e; ++i) 444 ID.AddInteger(SVN->getMaskElt(i)); 445 break; 446 } 447 case ISD::TargetBlockAddress: 448 case ISD::BlockAddress: { 449 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 450 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 451 break; 452 } 453 } // end switch (N->getOpcode()) 454} 455 456/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 457/// data. 458static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 459 AddNodeIDOpcode(ID, N->getOpcode()); 460 // Add the return value info. 461 AddNodeIDValueTypes(ID, N->getVTList()); 462 // Add the operand info. 463 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 464 465 // Handle SDNode leafs with special info. 466 AddNodeIDCustom(ID, N); 467} 468 469/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 470/// the CSE map that carries volatility, temporalness, indexing mode, and 471/// extension/truncation information. 472/// 473static inline unsigned 474encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 475 bool isNonTemporal) { 476 assert((ConvType & 3) == ConvType && 477 "ConvType may not require more than 2 bits!"); 478 assert((AM & 7) == AM && 479 "AM may not require more than 3 bits!"); 480 return ConvType | 481 (AM << 2) | 482 (isVolatile << 5) | 483 (isNonTemporal << 6); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::EH_LABEL: 499 return true; // Never CSE these nodes. 500 } 501 502 // Check that remaining values produced are not flags. 503 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 504 if (N->getValueType(i) == MVT::Flag) 505 return true; // Never CSE anything that produces a flag. 506 507 return false; 508} 509 510/// RemoveDeadNodes - This method deletes all unreachable nodes in the 511/// SelectionDAG. 512void SelectionDAG::RemoveDeadNodes() { 513 // Create a dummy node (which is not added to allnodes), that adds a reference 514 // to the root node, preventing it from being deleted. 515 HandleSDNode Dummy(getRoot()); 516 517 SmallVector<SDNode*, 128> DeadNodes; 518 519 // Add all obviously-dead nodes to the DeadNodes worklist. 520 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 521 if (I->use_empty()) 522 DeadNodes.push_back(I); 523 524 RemoveDeadNodes(DeadNodes); 525 526 // If the root changed (e.g. it was a dead load, update the root). 527 setRoot(Dummy.getValue()); 528} 529 530/// RemoveDeadNodes - This method deletes the unreachable nodes in the 531/// given list, and any nodes that become unreachable as a result. 532void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 533 DAGUpdateListener *UpdateListener) { 534 535 // Process the worklist, deleting the nodes and adding their uses to the 536 // worklist. 537 while (!DeadNodes.empty()) { 538 SDNode *N = DeadNodes.pop_back_val(); 539 540 if (UpdateListener) 541 UpdateListener->NodeDeleted(N, 0); 542 543 // Take the node out of the appropriate CSE map. 544 RemoveNodeFromCSEMaps(N); 545 546 // Next, brutally remove the operand list. This is safe to do, as there are 547 // no cycles in the graph. 548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 549 SDUse &Use = *I++; 550 SDNode *Operand = Use.getNode(); 551 Use.set(SDValue()); 552 553 // Now that we removed this operand, see if there are no uses of it left. 554 if (Operand->use_empty()) 555 DeadNodes.push_back(Operand); 556 } 557 558 DeallocateNode(N); 559 } 560} 561 562void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 563 SmallVector<SDNode*, 16> DeadNodes(1, N); 564 RemoveDeadNodes(DeadNodes, UpdateListener); 565} 566 567void SelectionDAG::DeleteNode(SDNode *N) { 568 // First take this out of the appropriate CSE map. 569 RemoveNodeFromCSEMaps(N); 570 571 // Finally, remove uses due to operands of this node, remove from the 572 // AllNodes list, and delete the node. 573 DeleteNodeNotInCSEMaps(N); 574} 575 576void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 577 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 578 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 579 580 // Drop all of the operands and decrement used node's use counts. 581 N->DropOperands(); 582 583 DeallocateNode(N); 584} 585 586void SelectionDAG::DeallocateNode(SDNode *N) { 587 if (N->OperandsNeedDelete) 588 delete[] N->OperandList; 589 590 // Set the opcode to DELETED_NODE to help catch bugs when node 591 // memory is reallocated. 592 N->NodeType = ISD::DELETED_NODE; 593 594 NodeAllocator.Deallocate(AllNodes.remove(N)); 595 596 // Remove the ordering of this node. 597 Ordering->remove(N); 598 599 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 600 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 601 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 602 DbgVals[i]->setIsInvalidated(); 603} 604 605/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 606/// correspond to it. This is useful when we're about to delete or repurpose 607/// the node. We don't want future request for structurally identical nodes 608/// to return N anymore. 609bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 610 bool Erased = false; 611 switch (N->getOpcode()) { 612 case ISD::EntryToken: 613 llvm_unreachable("EntryToken should not be in CSEMaps!"); 614 return false; 615 case ISD::HANDLENODE: return false; // noop. 616 case ISD::CONDCODE: 617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 618 "Cond code doesn't exist!"); 619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 621 break; 622 case ISD::ExternalSymbol: 623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 624 break; 625 case ISD::TargetExternalSymbol: { 626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 627 Erased = TargetExternalSymbols.erase( 628 std::pair<std::string,unsigned char>(ESN->getSymbol(), 629 ESN->getTargetFlags())); 630 break; 631 } 632 case ISD::VALUETYPE: { 633 EVT VT = cast<VTSDNode>(N)->getVT(); 634 if (VT.isExtended()) { 635 Erased = ExtendedValueTypeNodes.erase(VT); 636 } else { 637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 639 } 640 break; 641 } 642 default: 643 // Remove it from the CSE Map. 644 Erased = CSEMap.RemoveNode(N); 645 break; 646 } 647#ifndef NDEBUG 648 // Verify that the node was actually in one of the CSE maps, unless it has a 649 // flag result (which cannot be CSE'd) or is one of the special cases that are 650 // not subject to CSE. 651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 652 !N->isMachineOpcode() && !doNotCSE(N)) { 653 N->dump(this); 654 dbgs() << "\n"; 655 llvm_unreachable("Node is not in map!"); 656 } 657#endif 658 return Erased; 659} 660 661/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 662/// maps and modified in place. Add it back to the CSE maps, unless an identical 663/// node already exists, in which case transfer all its users to the existing 664/// node. This transfer can potentially trigger recursive merging. 665/// 666void 667SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 668 DAGUpdateListener *UpdateListener) { 669 // For node types that aren't CSE'd, just act as if no identical node 670 // already exists. 671 if (!doNotCSE(N)) { 672 SDNode *Existing = CSEMap.GetOrInsertNode(N); 673 if (Existing != N) { 674 // If there was already an existing matching node, use ReplaceAllUsesWith 675 // to replace the dead one with the existing one. This can cause 676 // recursive merging of other unrelated nodes down the line. 677 ReplaceAllUsesWith(N, Existing, UpdateListener); 678 679 // N is now dead. Inform the listener if it exists and delete it. 680 if (UpdateListener) 681 UpdateListener->NodeDeleted(N, Existing); 682 DeleteNodeNotInCSEMaps(N); 683 return; 684 } 685 } 686 687 // If the node doesn't already exist, we updated it. Inform a listener if 688 // it exists. 689 if (UpdateListener) 690 UpdateListener->NodeUpdated(N); 691} 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 698 void *&InsertPos) { 699 if (doNotCSE(N)) 700 return 0; 701 702 SDValue Ops[] = { Op }; 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 705 AddNodeIDCustom(ID, N); 706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 707 return Node; 708} 709 710/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 711/// were replaced with those specified. If this node is never memoized, 712/// return null, otherwise return a pointer to the slot it would take. If a 713/// node already exists with these operands, the slot will be non-null. 714SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 715 SDValue Op1, SDValue Op2, 716 void *&InsertPos) { 717 if (doNotCSE(N)) 718 return 0; 719 720 SDValue Ops[] = { Op1, Op2 }; 721 FoldingSetNodeID ID; 722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 723 AddNodeIDCustom(ID, N); 724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 725 return Node; 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 747void SelectionDAG::VerifyNode(SDNode *N) { 748 switch (N->getOpcode()) { 749 default: 750 break; 751 case ISD::BUILD_PAIR: { 752 EVT VT = N->getValueType(0); 753 assert(N->getNumValues() == 1 && "Too many results!"); 754 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 755 "Wrong return type!"); 756 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 757 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 758 "Mismatched operand types!"); 759 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 760 "Wrong operand type!"); 761 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 762 "Wrong return type size"); 763 break; 764 } 765 case ISD::BUILD_VECTOR: { 766 assert(N->getNumValues() == 1 && "Too many results!"); 767 assert(N->getValueType(0).isVector() && "Wrong return type!"); 768 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 769 "Wrong number of operands!"); 770 EVT EltVT = N->getValueType(0).getVectorElementType(); 771 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 772 assert((I->getValueType() == EltVT || 773 (EltVT.isInteger() && I->getValueType().isInteger() && 774 EltVT.bitsLE(I->getValueType()))) && 775 "Wrong operand type!"); 776 break; 777 } 778 } 779} 780 781/// getEVTAlignment - Compute the default alignment value for the 782/// given type. 783/// 784unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 785 const Type *Ty = VT == MVT::iPTR ? 786 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 787 VT.getTypeForEVT(*getContext()); 788 789 return TLI.getTargetData()->getABITypeAlignment(Ty); 790} 791 792// EntryNode could meaningfully have debug info if we can find it... 793SelectionDAG::SelectionDAG(const TargetMachine &tm) 794 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 795 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 796 Root(getEntryNode()), Ordering(0) { 797 AllNodes.push_back(&EntryNode); 798 Ordering = new SDNodeOrdering(); 799 DbgInfo = new SDDbgInfo(); 800} 801 802void SelectionDAG::init(MachineFunction &mf) { 803 MF = &mf; 804 Context = &mf.getFunction()->getContext(); 805} 806 807SelectionDAG::~SelectionDAG() { 808 allnodes_clear(); 809 delete Ordering; 810 delete DbgInfo; 811} 812 813void SelectionDAG::allnodes_clear() { 814 assert(&*AllNodes.begin() == &EntryNode); 815 AllNodes.remove(AllNodes.begin()); 816 while (!AllNodes.empty()) 817 DeallocateNode(AllNodes.begin()); 818} 819 820void SelectionDAG::clear() { 821 allnodes_clear(); 822 OperandAllocator.Reset(); 823 CSEMap.clear(); 824 825 ExtendedValueTypeNodes.clear(); 826 ExternalSymbols.clear(); 827 TargetExternalSymbols.clear(); 828 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 829 static_cast<CondCodeSDNode*>(0)); 830 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 831 static_cast<SDNode*>(0)); 832 833 EntryNode.UseList = 0; 834 AllNodes.push_back(&EntryNode); 835 Root = getEntryNode(); 836 Ordering->clear(); 837 DbgInfo->clear(); 838} 839 840SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 841 return VT.bitsGT(Op.getValueType()) ? 842 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 843 getNode(ISD::TRUNCATE, DL, VT, Op); 844} 845 846SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 847 return VT.bitsGT(Op.getValueType()) ? 848 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 849 getNode(ISD::TRUNCATE, DL, VT, Op); 850} 851 852SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 853 assert(!VT.isVector() && 854 "getZeroExtendInReg should use the vector element type instead of " 855 "the vector type!"); 856 if (Op.getValueType() == VT) return Op; 857 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 858 APInt Imm = APInt::getLowBitsSet(BitWidth, 859 VT.getSizeInBits()); 860 return getNode(ISD::AND, DL, Op.getValueType(), Op, 861 getConstant(Imm, Op.getValueType())); 862} 863 864/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 865/// 866SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 867 EVT EltVT = VT.getScalarType(); 868 SDValue NegOne = 869 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 870 return getNode(ISD::XOR, DL, VT, Val, NegOne); 871} 872 873SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 874 EVT EltVT = VT.getScalarType(); 875 assert((EltVT.getSizeInBits() >= 64 || 876 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 877 "getConstant with a uint64_t value that doesn't fit in the type!"); 878 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 879} 880 881SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 882 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 883} 884 885SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 886 assert(VT.isInteger() && "Cannot create FP integer constant!"); 887 888 EVT EltVT = VT.getScalarType(); 889 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 890 "APInt size does not match type size!"); 891 892 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 893 FoldingSetNodeID ID; 894 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 895 ID.AddPointer(&Val); 896 void *IP = 0; 897 SDNode *N = NULL; 898 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 899 if (!VT.isVector()) 900 return SDValue(N, 0); 901 902 if (!N) { 903 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 904 CSEMap.InsertNode(N, IP); 905 AllNodes.push_back(N); 906 } 907 908 SDValue Result(N, 0); 909 if (VT.isVector()) { 910 SmallVector<SDValue, 8> Ops; 911 Ops.assign(VT.getVectorNumElements(), Result); 912 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 913 } 914 return Result; 915} 916 917SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 918 return getConstant(Val, TLI.getPointerTy(), isTarget); 919} 920 921 922SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 923 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 924} 925 926SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 927 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 928 929 EVT EltVT = VT.getScalarType(); 930 931 // Do the map lookup using the actual bit pattern for the floating point 932 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 933 // we don't have issues with SNANs. 934 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 935 FoldingSetNodeID ID; 936 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 937 ID.AddPointer(&V); 938 void *IP = 0; 939 SDNode *N = NULL; 940 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 941 if (!VT.isVector()) 942 return SDValue(N, 0); 943 944 if (!N) { 945 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 946 CSEMap.InsertNode(N, IP); 947 AllNodes.push_back(N); 948 } 949 950 SDValue Result(N, 0); 951 if (VT.isVector()) { 952 SmallVector<SDValue, 8> Ops; 953 Ops.assign(VT.getVectorNumElements(), Result); 954 // FIXME DebugLoc info might be appropriate here 955 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 956 } 957 return Result; 958} 959 960SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 961 EVT EltVT = VT.getScalarType(); 962 if (EltVT==MVT::f32) 963 return getConstantFP(APFloat((float)Val), VT, isTarget); 964 else if (EltVT==MVT::f64) 965 return getConstantFP(APFloat(Val), VT, isTarget); 966 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 967 bool ignored; 968 APFloat apf = APFloat(Val); 969 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 970 &ignored); 971 return getConstantFP(apf, VT, isTarget); 972 } else { 973 assert(0 && "Unsupported type in getConstantFP"); 974 return SDValue(); 975 } 976} 977 978SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 979 EVT VT, int64_t Offset, 980 bool isTargetGA, 981 unsigned char TargetFlags) { 982 assert((TargetFlags == 0 || isTargetGA) && 983 "Cannot set target flags on target-independent globals"); 984 985 // Truncate (with sign-extension) the offset value to the pointer size. 986 EVT PTy = TLI.getPointerTy(); 987 unsigned BitWidth = PTy.getSizeInBits(); 988 if (BitWidth < 64) 989 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 990 991 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 992 if (!GVar) { 993 // If GV is an alias then use the aliasee for determining thread-localness. 994 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 995 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 996 } 997 998 unsigned Opc; 999 if (GVar && GVar->isThreadLocal()) 1000 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1001 else 1002 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1003 1004 FoldingSetNodeID ID; 1005 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1006 ID.AddPointer(GV); 1007 ID.AddInteger(Offset); 1008 ID.AddInteger(TargetFlags); 1009 void *IP = 0; 1010 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1011 return SDValue(E, 0); 1012 1013 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1014 Offset, TargetFlags); 1015 CSEMap.InsertNode(N, IP); 1016 AllNodes.push_back(N); 1017 return SDValue(N, 0); 1018} 1019 1020SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1021 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1022 FoldingSetNodeID ID; 1023 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1024 ID.AddInteger(FI); 1025 void *IP = 0; 1026 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1027 return SDValue(E, 0); 1028 1029 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1030 CSEMap.InsertNode(N, IP); 1031 AllNodes.push_back(N); 1032 return SDValue(N, 0); 1033} 1034 1035SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1036 unsigned char TargetFlags) { 1037 assert((TargetFlags == 0 || isTarget) && 1038 "Cannot set target flags on target-independent jump tables"); 1039 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1040 FoldingSetNodeID ID; 1041 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1042 ID.AddInteger(JTI); 1043 ID.AddInteger(TargetFlags); 1044 void *IP = 0; 1045 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1046 return SDValue(E, 0); 1047 1048 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1049 TargetFlags); 1050 CSEMap.InsertNode(N, IP); 1051 AllNodes.push_back(N); 1052 return SDValue(N, 0); 1053} 1054 1055SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1056 unsigned Alignment, int Offset, 1057 bool isTarget, 1058 unsigned char TargetFlags) { 1059 assert((TargetFlags == 0 || isTarget) && 1060 "Cannot set target flags on target-independent globals"); 1061 if (Alignment == 0) 1062 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1063 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1064 FoldingSetNodeID ID; 1065 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1066 ID.AddInteger(Alignment); 1067 ID.AddInteger(Offset); 1068 ID.AddPointer(C); 1069 ID.AddInteger(TargetFlags); 1070 void *IP = 0; 1071 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1072 return SDValue(E, 0); 1073 1074 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1075 Alignment, TargetFlags); 1076 CSEMap.InsertNode(N, IP); 1077 AllNodes.push_back(N); 1078 return SDValue(N, 0); 1079} 1080 1081 1082SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1083 unsigned Alignment, int Offset, 1084 bool isTarget, 1085 unsigned char TargetFlags) { 1086 assert((TargetFlags == 0 || isTarget) && 1087 "Cannot set target flags on target-independent globals"); 1088 if (Alignment == 0) 1089 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1090 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1091 FoldingSetNodeID ID; 1092 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1093 ID.AddInteger(Alignment); 1094 ID.AddInteger(Offset); 1095 C->AddSelectionDAGCSEId(ID); 1096 ID.AddInteger(TargetFlags); 1097 void *IP = 0; 1098 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1099 return SDValue(E, 0); 1100 1101 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1102 Alignment, TargetFlags); 1103 CSEMap.InsertNode(N, IP); 1104 AllNodes.push_back(N); 1105 return SDValue(N, 0); 1106} 1107 1108SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1109 FoldingSetNodeID ID; 1110 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1111 ID.AddPointer(MBB); 1112 void *IP = 0; 1113 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1114 return SDValue(E, 0); 1115 1116 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1117 CSEMap.InsertNode(N, IP); 1118 AllNodes.push_back(N); 1119 return SDValue(N, 0); 1120} 1121 1122SDValue SelectionDAG::getValueType(EVT VT) { 1123 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1124 ValueTypeNodes.size()) 1125 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1126 1127 SDNode *&N = VT.isExtended() ? 1128 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1129 1130 if (N) return SDValue(N, 0); 1131 N = new (NodeAllocator) VTSDNode(VT); 1132 AllNodes.push_back(N); 1133 return SDValue(N, 0); 1134} 1135 1136SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1137 SDNode *&N = ExternalSymbols[Sym]; 1138 if (N) return SDValue(N, 0); 1139 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1140 AllNodes.push_back(N); 1141 return SDValue(N, 0); 1142} 1143 1144SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1145 unsigned char TargetFlags) { 1146 SDNode *&N = 1147 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1148 TargetFlags)]; 1149 if (N) return SDValue(N, 0); 1150 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1151 AllNodes.push_back(N); 1152 return SDValue(N, 0); 1153} 1154 1155SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1156 if ((unsigned)Cond >= CondCodeNodes.size()) 1157 CondCodeNodes.resize(Cond+1); 1158 1159 if (CondCodeNodes[Cond] == 0) { 1160 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1161 CondCodeNodes[Cond] = N; 1162 AllNodes.push_back(N); 1163 } 1164 1165 return SDValue(CondCodeNodes[Cond], 0); 1166} 1167 1168// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1169// the shuffle mask M that point at N1 to point at N2, and indices that point 1170// N2 to point at N1. 1171static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1172 std::swap(N1, N2); 1173 int NElts = M.size(); 1174 for (int i = 0; i != NElts; ++i) { 1175 if (M[i] >= NElts) 1176 M[i] -= NElts; 1177 else if (M[i] >= 0) 1178 M[i] += NElts; 1179 } 1180} 1181 1182SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1183 SDValue N2, const int *Mask) { 1184 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1185 assert(VT.isVector() && N1.getValueType().isVector() && 1186 "Vector Shuffle VTs must be a vectors"); 1187 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1188 && "Vector Shuffle VTs must have same element type"); 1189 1190 // Canonicalize shuffle undef, undef -> undef 1191 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1192 return getUNDEF(VT); 1193 1194 // Validate that all indices in Mask are within the range of the elements 1195 // input to the shuffle. 1196 unsigned NElts = VT.getVectorNumElements(); 1197 SmallVector<int, 8> MaskVec; 1198 for (unsigned i = 0; i != NElts; ++i) { 1199 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1200 MaskVec.push_back(Mask[i]); 1201 } 1202 1203 // Canonicalize shuffle v, v -> v, undef 1204 if (N1 == N2) { 1205 N2 = getUNDEF(VT); 1206 for (unsigned i = 0; i != NElts; ++i) 1207 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1208 } 1209 1210 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1211 if (N1.getOpcode() == ISD::UNDEF) 1212 commuteShuffle(N1, N2, MaskVec); 1213 1214 // Canonicalize all index into lhs, -> shuffle lhs, undef 1215 // Canonicalize all index into rhs, -> shuffle rhs, undef 1216 bool AllLHS = true, AllRHS = true; 1217 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1218 for (unsigned i = 0; i != NElts; ++i) { 1219 if (MaskVec[i] >= (int)NElts) { 1220 if (N2Undef) 1221 MaskVec[i] = -1; 1222 else 1223 AllLHS = false; 1224 } else if (MaskVec[i] >= 0) { 1225 AllRHS = false; 1226 } 1227 } 1228 if (AllLHS && AllRHS) 1229 return getUNDEF(VT); 1230 if (AllLHS && !N2Undef) 1231 N2 = getUNDEF(VT); 1232 if (AllRHS) { 1233 N1 = getUNDEF(VT); 1234 commuteShuffle(N1, N2, MaskVec); 1235 } 1236 1237 // If Identity shuffle, or all shuffle in to undef, return that node. 1238 bool AllUndef = true; 1239 bool Identity = true; 1240 for (unsigned i = 0; i != NElts; ++i) { 1241 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1242 if (MaskVec[i] >= 0) AllUndef = false; 1243 } 1244 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1245 return N1; 1246 if (AllUndef) 1247 return getUNDEF(VT); 1248 1249 FoldingSetNodeID ID; 1250 SDValue Ops[2] = { N1, N2 }; 1251 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1252 for (unsigned i = 0; i != NElts; ++i) 1253 ID.AddInteger(MaskVec[i]); 1254 1255 void* IP = 0; 1256 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1257 return SDValue(E, 0); 1258 1259 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1260 // SDNode doesn't have access to it. This memory will be "leaked" when 1261 // the node is deallocated, but recovered when the NodeAllocator is released. 1262 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1263 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1264 1265 ShuffleVectorSDNode *N = 1266 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1267 CSEMap.InsertNode(N, IP); 1268 AllNodes.push_back(N); 1269 return SDValue(N, 0); 1270} 1271 1272SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1273 SDValue Val, SDValue DTy, 1274 SDValue STy, SDValue Rnd, SDValue Sat, 1275 ISD::CvtCode Code) { 1276 // If the src and dest types are the same and the conversion is between 1277 // integer types of the same sign or two floats, no conversion is necessary. 1278 if (DTy == STy && 1279 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1280 return Val; 1281 1282 FoldingSetNodeID ID; 1283 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1284 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1285 void* IP = 0; 1286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1287 return SDValue(E, 0); 1288 1289 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1290 Code); 1291 CSEMap.InsertNode(N, IP); 1292 AllNodes.push_back(N); 1293 return SDValue(N, 0); 1294} 1295 1296SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1297 FoldingSetNodeID ID; 1298 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1299 ID.AddInteger(RegNo); 1300 void *IP = 0; 1301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1302 return SDValue(E, 0); 1303 1304 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1305 CSEMap.InsertNode(N, IP); 1306 AllNodes.push_back(N); 1307 return SDValue(N, 0); 1308} 1309 1310SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1311 FoldingSetNodeID ID; 1312 SDValue Ops[] = { Root }; 1313 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1314 ID.AddPointer(Label); 1315 void *IP = 0; 1316 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1317 return SDValue(E, 0); 1318 1319 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1320 CSEMap.InsertNode(N, IP); 1321 AllNodes.push_back(N); 1322 return SDValue(N, 0); 1323} 1324 1325 1326SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1327 bool isTarget, 1328 unsigned char TargetFlags) { 1329 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1330 1331 FoldingSetNodeID ID; 1332 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1333 ID.AddPointer(BA); 1334 ID.AddInteger(TargetFlags); 1335 void *IP = 0; 1336 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1337 return SDValue(E, 0); 1338 1339 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1340 CSEMap.InsertNode(N, IP); 1341 AllNodes.push_back(N); 1342 return SDValue(N, 0); 1343} 1344 1345SDValue SelectionDAG::getSrcValue(const Value *V) { 1346 assert((!V || V->getType()->isPointerTy()) && 1347 "SrcValue is not a pointer?"); 1348 1349 FoldingSetNodeID ID; 1350 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1351 ID.AddPointer(V); 1352 1353 void *IP = 0; 1354 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1355 return SDValue(E, 0); 1356 1357 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1358 CSEMap.InsertNode(N, IP); 1359 AllNodes.push_back(N); 1360 return SDValue(N, 0); 1361} 1362 1363/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1364SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1365 FoldingSetNodeID ID; 1366 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1367 ID.AddPointer(MD); 1368 1369 void *IP = 0; 1370 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1371 return SDValue(E, 0); 1372 1373 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1374 CSEMap.InsertNode(N, IP); 1375 AllNodes.push_back(N); 1376 return SDValue(N, 0); 1377} 1378 1379 1380/// getShiftAmountOperand - Return the specified value casted to 1381/// the target's desired shift amount type. 1382SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1383 EVT OpTy = Op.getValueType(); 1384 MVT ShTy = TLI.getShiftAmountTy(); 1385 if (OpTy == ShTy || OpTy.isVector()) return Op; 1386 1387 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1388 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1389} 1390 1391/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1392/// specified value type. 1393SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1394 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1395 unsigned ByteSize = VT.getStoreSize(); 1396 const Type *Ty = VT.getTypeForEVT(*getContext()); 1397 unsigned StackAlign = 1398 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1399 1400 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1401 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1402} 1403 1404/// CreateStackTemporary - Create a stack temporary suitable for holding 1405/// either of the specified value types. 1406SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1407 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1408 VT2.getStoreSizeInBits())/8; 1409 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1410 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1411 const TargetData *TD = TLI.getTargetData(); 1412 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1413 TD->getPrefTypeAlignment(Ty2)); 1414 1415 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1416 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1417 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1418} 1419 1420SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1421 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1422 // These setcc operations always fold. 1423 switch (Cond) { 1424 default: break; 1425 case ISD::SETFALSE: 1426 case ISD::SETFALSE2: return getConstant(0, VT); 1427 case ISD::SETTRUE: 1428 case ISD::SETTRUE2: return getConstant(1, VT); 1429 1430 case ISD::SETOEQ: 1431 case ISD::SETOGT: 1432 case ISD::SETOGE: 1433 case ISD::SETOLT: 1434 case ISD::SETOLE: 1435 case ISD::SETONE: 1436 case ISD::SETO: 1437 case ISD::SETUO: 1438 case ISD::SETUEQ: 1439 case ISD::SETUNE: 1440 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1441 break; 1442 } 1443 1444 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1445 const APInt &C2 = N2C->getAPIntValue(); 1446 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1447 const APInt &C1 = N1C->getAPIntValue(); 1448 1449 switch (Cond) { 1450 default: llvm_unreachable("Unknown integer setcc!"); 1451 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1452 case ISD::SETNE: return getConstant(C1 != C2, VT); 1453 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1454 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1455 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1456 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1457 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1458 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1459 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1460 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1461 } 1462 } 1463 } 1464 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1465 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1466 // No compile time operations on this type yet. 1467 if (N1C->getValueType(0) == MVT::ppcf128) 1468 return SDValue(); 1469 1470 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1471 switch (Cond) { 1472 default: break; 1473 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1474 return getUNDEF(VT); 1475 // fall through 1476 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1477 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1478 return getUNDEF(VT); 1479 // fall through 1480 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1481 R==APFloat::cmpLessThan, VT); 1482 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1483 return getUNDEF(VT); 1484 // fall through 1485 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1486 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1487 return getUNDEF(VT); 1488 // fall through 1489 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1490 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1491 return getUNDEF(VT); 1492 // fall through 1493 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1494 R==APFloat::cmpEqual, VT); 1495 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1496 return getUNDEF(VT); 1497 // fall through 1498 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1499 R==APFloat::cmpEqual, VT); 1500 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1501 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1502 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1503 R==APFloat::cmpEqual, VT); 1504 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1505 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1506 R==APFloat::cmpLessThan, VT); 1507 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1508 R==APFloat::cmpUnordered, VT); 1509 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1510 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1511 } 1512 } else { 1513 // Ensure that the constant occurs on the RHS. 1514 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1515 } 1516 } 1517 1518 // Could not fold it. 1519 return SDValue(); 1520} 1521 1522/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1523/// use this predicate to simplify operations downstream. 1524bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1525 // This predicate is not safe for vector operations. 1526 if (Op.getValueType().isVector()) 1527 return false; 1528 1529 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1530 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1531} 1532 1533/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1534/// this predicate to simplify operations downstream. Mask is known to be zero 1535/// for bits that V cannot have. 1536bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1537 unsigned Depth) const { 1538 APInt KnownZero, KnownOne; 1539 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1540 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1541 return (KnownZero & Mask) == Mask; 1542} 1543 1544/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1545/// known to be either zero or one and return them in the KnownZero/KnownOne 1546/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1547/// processing. 1548void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1549 APInt &KnownZero, APInt &KnownOne, 1550 unsigned Depth) const { 1551 unsigned BitWidth = Mask.getBitWidth(); 1552 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1553 "Mask size mismatches value type size!"); 1554 1555 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1556 if (Depth == 6 || Mask == 0) 1557 return; // Limit search depth. 1558 1559 APInt KnownZero2, KnownOne2; 1560 1561 switch (Op.getOpcode()) { 1562 case ISD::Constant: 1563 // We know all of the bits for a constant! 1564 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1565 KnownZero = ~KnownOne & Mask; 1566 return; 1567 case ISD::AND: 1568 // If either the LHS or the RHS are Zero, the result is zero. 1569 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1570 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1571 KnownZero2, KnownOne2, Depth+1); 1572 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1573 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1574 1575 // Output known-1 bits are only known if set in both the LHS & RHS. 1576 KnownOne &= KnownOne2; 1577 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1578 KnownZero |= KnownZero2; 1579 return; 1580 case ISD::OR: 1581 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1582 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1583 KnownZero2, KnownOne2, Depth+1); 1584 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1585 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1586 1587 // Output known-0 bits are only known if clear in both the LHS & RHS. 1588 KnownZero &= KnownZero2; 1589 // Output known-1 are known to be set if set in either the LHS | RHS. 1590 KnownOne |= KnownOne2; 1591 return; 1592 case ISD::XOR: { 1593 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1594 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1595 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1596 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1597 1598 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1599 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1600 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1601 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1602 KnownZero = KnownZeroOut; 1603 return; 1604 } 1605 case ISD::MUL: { 1606 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1607 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1608 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1609 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1610 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1611 1612 // If low bits are zero in either operand, output low known-0 bits. 1613 // Also compute a conserative estimate for high known-0 bits. 1614 // More trickiness is possible, but this is sufficient for the 1615 // interesting case of alignment computation. 1616 KnownOne.clear(); 1617 unsigned TrailZ = KnownZero.countTrailingOnes() + 1618 KnownZero2.countTrailingOnes(); 1619 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1620 KnownZero2.countLeadingOnes(), 1621 BitWidth) - BitWidth; 1622 1623 TrailZ = std::min(TrailZ, BitWidth); 1624 LeadZ = std::min(LeadZ, BitWidth); 1625 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1626 APInt::getHighBitsSet(BitWidth, LeadZ); 1627 KnownZero &= Mask; 1628 return; 1629 } 1630 case ISD::UDIV: { 1631 // For the purposes of computing leading zeros we can conservatively 1632 // treat a udiv as a logical right shift by the power of 2 known to 1633 // be less than the denominator. 1634 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1635 ComputeMaskedBits(Op.getOperand(0), 1636 AllOnes, KnownZero2, KnownOne2, Depth+1); 1637 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1638 1639 KnownOne2.clear(); 1640 KnownZero2.clear(); 1641 ComputeMaskedBits(Op.getOperand(1), 1642 AllOnes, KnownZero2, KnownOne2, Depth+1); 1643 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1644 if (RHSUnknownLeadingOnes != BitWidth) 1645 LeadZ = std::min(BitWidth, 1646 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1647 1648 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1649 return; 1650 } 1651 case ISD::SELECT: 1652 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1653 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1654 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1655 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1656 1657 // Only known if known in both the LHS and RHS. 1658 KnownOne &= KnownOne2; 1659 KnownZero &= KnownZero2; 1660 return; 1661 case ISD::SELECT_CC: 1662 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1663 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1664 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1665 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1666 1667 // Only known if known in both the LHS and RHS. 1668 KnownOne &= KnownOne2; 1669 KnownZero &= KnownZero2; 1670 return; 1671 case ISD::SADDO: 1672 case ISD::UADDO: 1673 case ISD::SSUBO: 1674 case ISD::USUBO: 1675 case ISD::SMULO: 1676 case ISD::UMULO: 1677 if (Op.getResNo() != 1) 1678 return; 1679 // The boolean result conforms to getBooleanContents. Fall through. 1680 case ISD::SETCC: 1681 // If we know the result of a setcc has the top bits zero, use this info. 1682 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1683 BitWidth > 1) 1684 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1685 return; 1686 case ISD::SHL: 1687 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1688 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1689 unsigned ShAmt = SA->getZExtValue(); 1690 1691 // If the shift count is an invalid immediate, don't do anything. 1692 if (ShAmt >= BitWidth) 1693 return; 1694 1695 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1696 KnownZero, KnownOne, Depth+1); 1697 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1698 KnownZero <<= ShAmt; 1699 KnownOne <<= ShAmt; 1700 // low bits known zero. 1701 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1702 } 1703 return; 1704 case ISD::SRL: 1705 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1706 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1707 unsigned ShAmt = SA->getZExtValue(); 1708 1709 // If the shift count is an invalid immediate, don't do anything. 1710 if (ShAmt >= BitWidth) 1711 return; 1712 1713 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1714 KnownZero, KnownOne, Depth+1); 1715 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1716 KnownZero = KnownZero.lshr(ShAmt); 1717 KnownOne = KnownOne.lshr(ShAmt); 1718 1719 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1720 KnownZero |= HighBits; // High bits known zero. 1721 } 1722 return; 1723 case ISD::SRA: 1724 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1725 unsigned ShAmt = SA->getZExtValue(); 1726 1727 // If the shift count is an invalid immediate, don't do anything. 1728 if (ShAmt >= BitWidth) 1729 return; 1730 1731 APInt InDemandedMask = (Mask << ShAmt); 1732 // If any of the demanded bits are produced by the sign extension, we also 1733 // demand the input sign bit. 1734 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1735 if (HighBits.getBoolValue()) 1736 InDemandedMask |= APInt::getSignBit(BitWidth); 1737 1738 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1739 Depth+1); 1740 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1741 KnownZero = KnownZero.lshr(ShAmt); 1742 KnownOne = KnownOne.lshr(ShAmt); 1743 1744 // Handle the sign bits. 1745 APInt SignBit = APInt::getSignBit(BitWidth); 1746 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1747 1748 if (KnownZero.intersects(SignBit)) { 1749 KnownZero |= HighBits; // New bits are known zero. 1750 } else if (KnownOne.intersects(SignBit)) { 1751 KnownOne |= HighBits; // New bits are known one. 1752 } 1753 } 1754 return; 1755 case ISD::SIGN_EXTEND_INREG: { 1756 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1757 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1758 1759 // Sign extension. Compute the demanded bits in the result that are not 1760 // present in the input. 1761 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1762 1763 APInt InSignBit = APInt::getSignBit(EBits); 1764 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1765 1766 // If the sign extended bits are demanded, we know that the sign 1767 // bit is demanded. 1768 InSignBit.zext(BitWidth); 1769 if (NewBits.getBoolValue()) 1770 InputDemandedBits |= InSignBit; 1771 1772 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1773 KnownZero, KnownOne, Depth+1); 1774 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1775 1776 // If the sign bit of the input is known set or clear, then we know the 1777 // top bits of the result. 1778 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1779 KnownZero |= NewBits; 1780 KnownOne &= ~NewBits; 1781 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1782 KnownOne |= NewBits; 1783 KnownZero &= ~NewBits; 1784 } else { // Input sign bit unknown 1785 KnownZero &= ~NewBits; 1786 KnownOne &= ~NewBits; 1787 } 1788 return; 1789 } 1790 case ISD::CTTZ: 1791 case ISD::CTLZ: 1792 case ISD::CTPOP: { 1793 unsigned LowBits = Log2_32(BitWidth)+1; 1794 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1795 KnownOne.clear(); 1796 return; 1797 } 1798 case ISD::LOAD: { 1799 if (ISD::isZEXTLoad(Op.getNode())) { 1800 LoadSDNode *LD = cast<LoadSDNode>(Op); 1801 EVT VT = LD->getMemoryVT(); 1802 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1803 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1804 } 1805 return; 1806 } 1807 case ISD::ZERO_EXTEND: { 1808 EVT InVT = Op.getOperand(0).getValueType(); 1809 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1810 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1811 APInt InMask = Mask; 1812 InMask.trunc(InBits); 1813 KnownZero.trunc(InBits); 1814 KnownOne.trunc(InBits); 1815 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1816 KnownZero.zext(BitWidth); 1817 KnownOne.zext(BitWidth); 1818 KnownZero |= NewBits; 1819 return; 1820 } 1821 case ISD::SIGN_EXTEND: { 1822 EVT InVT = Op.getOperand(0).getValueType(); 1823 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1824 APInt InSignBit = APInt::getSignBit(InBits); 1825 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1826 APInt InMask = Mask; 1827 InMask.trunc(InBits); 1828 1829 // If any of the sign extended bits are demanded, we know that the sign 1830 // bit is demanded. Temporarily set this bit in the mask for our callee. 1831 if (NewBits.getBoolValue()) 1832 InMask |= InSignBit; 1833 1834 KnownZero.trunc(InBits); 1835 KnownOne.trunc(InBits); 1836 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1837 1838 // Note if the sign bit is known to be zero or one. 1839 bool SignBitKnownZero = KnownZero.isNegative(); 1840 bool SignBitKnownOne = KnownOne.isNegative(); 1841 assert(!(SignBitKnownZero && SignBitKnownOne) && 1842 "Sign bit can't be known to be both zero and one!"); 1843 1844 // If the sign bit wasn't actually demanded by our caller, we don't 1845 // want it set in the KnownZero and KnownOne result values. Reset the 1846 // mask and reapply it to the result values. 1847 InMask = Mask; 1848 InMask.trunc(InBits); 1849 KnownZero &= InMask; 1850 KnownOne &= InMask; 1851 1852 KnownZero.zext(BitWidth); 1853 KnownOne.zext(BitWidth); 1854 1855 // If the sign bit is known zero or one, the top bits match. 1856 if (SignBitKnownZero) 1857 KnownZero |= NewBits; 1858 else if (SignBitKnownOne) 1859 KnownOne |= NewBits; 1860 return; 1861 } 1862 case ISD::ANY_EXTEND: { 1863 EVT InVT = Op.getOperand(0).getValueType(); 1864 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1865 APInt InMask = Mask; 1866 InMask.trunc(InBits); 1867 KnownZero.trunc(InBits); 1868 KnownOne.trunc(InBits); 1869 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1870 KnownZero.zext(BitWidth); 1871 KnownOne.zext(BitWidth); 1872 return; 1873 } 1874 case ISD::TRUNCATE: { 1875 EVT InVT = Op.getOperand(0).getValueType(); 1876 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1877 APInt InMask = Mask; 1878 InMask.zext(InBits); 1879 KnownZero.zext(InBits); 1880 KnownOne.zext(InBits); 1881 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1882 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1883 KnownZero.trunc(BitWidth); 1884 KnownOne.trunc(BitWidth); 1885 break; 1886 } 1887 case ISD::AssertZext: { 1888 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1889 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1890 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1891 KnownOne, Depth+1); 1892 KnownZero |= (~InMask) & Mask; 1893 return; 1894 } 1895 case ISD::FGETSIGN: 1896 // All bits are zero except the low bit. 1897 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1898 return; 1899 1900 case ISD::SUB: { 1901 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1902 // We know that the top bits of C-X are clear if X contains less bits 1903 // than C (i.e. no wrap-around can happen). For example, 20-X is 1904 // positive if we can prove that X is >= 0 and < 16. 1905 if (CLHS->getAPIntValue().isNonNegative()) { 1906 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1907 // NLZ can't be BitWidth with no sign bit 1908 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1909 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1910 Depth+1); 1911 1912 // If all of the MaskV bits are known to be zero, then we know the 1913 // output top bits are zero, because we now know that the output is 1914 // from [0-C]. 1915 if ((KnownZero2 & MaskV) == MaskV) { 1916 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1917 // Top bits known zero. 1918 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1919 } 1920 } 1921 } 1922 } 1923 // fall through 1924 case ISD::ADD: { 1925 // Output known-0 bits are known if clear or set in both the low clear bits 1926 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1927 // low 3 bits clear. 1928 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1929 BitWidth - Mask.countLeadingZeros()); 1930 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1931 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1932 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1933 1934 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1935 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1936 KnownZeroOut = std::min(KnownZeroOut, 1937 KnownZero2.countTrailingOnes()); 1938 1939 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1940 return; 1941 } 1942 case ISD::SREM: 1943 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1944 const APInt &RA = Rem->getAPIntValue().abs(); 1945 if (RA.isPowerOf2()) { 1946 APInt LowBits = RA - 1; 1947 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1948 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1949 1950 // The low bits of the first operand are unchanged by the srem. 1951 KnownZero = KnownZero2 & LowBits; 1952 KnownOne = KnownOne2 & LowBits; 1953 1954 // If the first operand is non-negative or has all low bits zero, then 1955 // the upper bits are all zero. 1956 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1957 KnownZero |= ~LowBits; 1958 1959 // If the first operand is negative and not all low bits are zero, then 1960 // the upper bits are all one. 1961 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1962 KnownOne |= ~LowBits; 1963 1964 KnownZero &= Mask; 1965 KnownOne &= Mask; 1966 1967 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1968 } 1969 } 1970 return; 1971 case ISD::UREM: { 1972 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1973 const APInt &RA = Rem->getAPIntValue(); 1974 if (RA.isPowerOf2()) { 1975 APInt LowBits = (RA - 1); 1976 APInt Mask2 = LowBits & Mask; 1977 KnownZero |= ~LowBits & Mask; 1978 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1979 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1980 break; 1981 } 1982 } 1983 1984 // Since the result is less than or equal to either operand, any leading 1985 // zero bits in either operand must also exist in the result. 1986 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1987 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1988 Depth+1); 1989 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1990 Depth+1); 1991 1992 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1993 KnownZero2.countLeadingOnes()); 1994 KnownOne.clear(); 1995 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1996 return; 1997 } 1998 default: 1999 // Allow the target to implement this method for its nodes. 2000 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2001 case ISD::INTRINSIC_WO_CHAIN: 2002 case ISD::INTRINSIC_W_CHAIN: 2003 case ISD::INTRINSIC_VOID: 2004 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2005 Depth); 2006 } 2007 return; 2008 } 2009} 2010 2011/// ComputeNumSignBits - Return the number of times the sign bit of the 2012/// register is replicated into the other bits. We know that at least 1 bit 2013/// is always equal to the sign bit (itself), but other cases can give us 2014/// information. For example, immediately after an "SRA X, 2", we know that 2015/// the top 3 bits are all equal to each other, so we return 3. 2016unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2017 EVT VT = Op.getValueType(); 2018 assert(VT.isInteger() && "Invalid VT!"); 2019 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2020 unsigned Tmp, Tmp2; 2021 unsigned FirstAnswer = 1; 2022 2023 if (Depth == 6) 2024 return 1; // Limit search depth. 2025 2026 switch (Op.getOpcode()) { 2027 default: break; 2028 case ISD::AssertSext: 2029 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2030 return VTBits-Tmp+1; 2031 case ISD::AssertZext: 2032 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2033 return VTBits-Tmp; 2034 2035 case ISD::Constant: { 2036 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2037 // If negative, return # leading ones. 2038 if (Val.isNegative()) 2039 return Val.countLeadingOnes(); 2040 2041 // Return # leading zeros. 2042 return Val.countLeadingZeros(); 2043 } 2044 2045 case ISD::SIGN_EXTEND: 2046 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2047 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2048 2049 case ISD::SIGN_EXTEND_INREG: 2050 // Max of the input and what this extends. 2051 Tmp = 2052 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2053 Tmp = VTBits-Tmp+1; 2054 2055 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2056 return std::max(Tmp, Tmp2); 2057 2058 case ISD::SRA: 2059 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2060 // SRA X, C -> adds C sign bits. 2061 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2062 Tmp += C->getZExtValue(); 2063 if (Tmp > VTBits) Tmp = VTBits; 2064 } 2065 return Tmp; 2066 case ISD::SHL: 2067 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2068 // shl destroys sign bits. 2069 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2070 if (C->getZExtValue() >= VTBits || // Bad shift. 2071 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2072 return Tmp - C->getZExtValue(); 2073 } 2074 break; 2075 case ISD::AND: 2076 case ISD::OR: 2077 case ISD::XOR: // NOT is handled here. 2078 // Logical binary ops preserve the number of sign bits at the worst. 2079 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2080 if (Tmp != 1) { 2081 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2082 FirstAnswer = std::min(Tmp, Tmp2); 2083 // We computed what we know about the sign bits as our first 2084 // answer. Now proceed to the generic code that uses 2085 // ComputeMaskedBits, and pick whichever answer is better. 2086 } 2087 break; 2088 2089 case ISD::SELECT: 2090 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2091 if (Tmp == 1) return 1; // Early out. 2092 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2093 return std::min(Tmp, Tmp2); 2094 2095 case ISD::SADDO: 2096 case ISD::UADDO: 2097 case ISD::SSUBO: 2098 case ISD::USUBO: 2099 case ISD::SMULO: 2100 case ISD::UMULO: 2101 if (Op.getResNo() != 1) 2102 break; 2103 // The boolean result conforms to getBooleanContents. Fall through. 2104 case ISD::SETCC: 2105 // If setcc returns 0/-1, all bits are sign bits. 2106 if (TLI.getBooleanContents() == 2107 TargetLowering::ZeroOrNegativeOneBooleanContent) 2108 return VTBits; 2109 break; 2110 case ISD::ROTL: 2111 case ISD::ROTR: 2112 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2113 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2114 2115 // Handle rotate right by N like a rotate left by 32-N. 2116 if (Op.getOpcode() == ISD::ROTR) 2117 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2118 2119 // If we aren't rotating out all of the known-in sign bits, return the 2120 // number that are left. This handles rotl(sext(x), 1) for example. 2121 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2122 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2123 } 2124 break; 2125 case ISD::ADD: 2126 // Add can have at most one carry bit. Thus we know that the output 2127 // is, at worst, one more bit than the inputs. 2128 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2129 if (Tmp == 1) return 1; // Early out. 2130 2131 // Special case decrementing a value (ADD X, -1): 2132 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2133 if (CRHS->isAllOnesValue()) { 2134 APInt KnownZero, KnownOne; 2135 APInt Mask = APInt::getAllOnesValue(VTBits); 2136 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2137 2138 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2139 // sign bits set. 2140 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2141 return VTBits; 2142 2143 // If we are subtracting one from a positive number, there is no carry 2144 // out of the result. 2145 if (KnownZero.isNegative()) 2146 return Tmp; 2147 } 2148 2149 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2150 if (Tmp2 == 1) return 1; 2151 return std::min(Tmp, Tmp2)-1; 2152 break; 2153 2154 case ISD::SUB: 2155 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2156 if (Tmp2 == 1) return 1; 2157 2158 // Handle NEG. 2159 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2160 if (CLHS->isNullValue()) { 2161 APInt KnownZero, KnownOne; 2162 APInt Mask = APInt::getAllOnesValue(VTBits); 2163 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2164 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2165 // sign bits set. 2166 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2167 return VTBits; 2168 2169 // If the input is known to be positive (the sign bit is known clear), 2170 // the output of the NEG has the same number of sign bits as the input. 2171 if (KnownZero.isNegative()) 2172 return Tmp2; 2173 2174 // Otherwise, we treat this like a SUB. 2175 } 2176 2177 // Sub can have at most one carry bit. Thus we know that the output 2178 // is, at worst, one more bit than the inputs. 2179 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2180 if (Tmp == 1) return 1; // Early out. 2181 return std::min(Tmp, Tmp2)-1; 2182 break; 2183 case ISD::TRUNCATE: 2184 // FIXME: it's tricky to do anything useful for this, but it is an important 2185 // case for targets like X86. 2186 break; 2187 } 2188 2189 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2190 if (Op.getOpcode() == ISD::LOAD) { 2191 LoadSDNode *LD = cast<LoadSDNode>(Op); 2192 unsigned ExtType = LD->getExtensionType(); 2193 switch (ExtType) { 2194 default: break; 2195 case ISD::SEXTLOAD: // '17' bits known 2196 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2197 return VTBits-Tmp+1; 2198 case ISD::ZEXTLOAD: // '16' bits known 2199 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2200 return VTBits-Tmp; 2201 } 2202 } 2203 2204 // Allow the target to implement this method for its nodes. 2205 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2206 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2207 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2208 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2209 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2210 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2211 } 2212 2213 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2214 // use this information. 2215 APInt KnownZero, KnownOne; 2216 APInt Mask = APInt::getAllOnesValue(VTBits); 2217 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2218 2219 if (KnownZero.isNegative()) { // sign bit is 0 2220 Mask = KnownZero; 2221 } else if (KnownOne.isNegative()) { // sign bit is 1; 2222 Mask = KnownOne; 2223 } else { 2224 // Nothing known. 2225 return FirstAnswer; 2226 } 2227 2228 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2229 // the number of identical bits in the top of the input value. 2230 Mask = ~Mask; 2231 Mask <<= Mask.getBitWidth()-VTBits; 2232 // Return # leading zeros. We use 'min' here in case Val was zero before 2233 // shifting. We don't want to return '64' as for an i32 "0". 2234 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2235} 2236 2237bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2238 // If we're told that NaNs won't happen, assume they won't. 2239 if (FiniteOnlyFPMath()) 2240 return true; 2241 2242 // If the value is a constant, we can obviously see if it is a NaN or not. 2243 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2244 return !C->getValueAPF().isNaN(); 2245 2246 // TODO: Recognize more cases here. 2247 2248 return false; 2249} 2250 2251bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2252 // If the value is a constant, we can obviously see if it is a zero or not. 2253 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2254 return !C->isZero(); 2255 2256 // TODO: Recognize more cases here. 2257 2258 return false; 2259} 2260 2261bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2262 // Check the obvious case. 2263 if (A == B) return true; 2264 2265 // For for negative and positive zero. 2266 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2267 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2268 if (CA->isZero() && CB->isZero()) return true; 2269 2270 // Otherwise they may not be equal. 2271 return false; 2272} 2273 2274bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2275 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2276 if (!GA) return false; 2277 if (GA->getOffset() != 0) return false; 2278 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2279 if (!GV) return false; 2280 return MF->getMMI().hasDebugInfo(); 2281} 2282 2283 2284/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2285/// element of the result of the vector shuffle. 2286SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2287 unsigned i) { 2288 EVT VT = N->getValueType(0); 2289 DebugLoc dl = N->getDebugLoc(); 2290 if (N->getMaskElt(i) < 0) 2291 return getUNDEF(VT.getVectorElementType()); 2292 unsigned Index = N->getMaskElt(i); 2293 unsigned NumElems = VT.getVectorNumElements(); 2294 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2295 Index %= NumElems; 2296 2297 if (V.getOpcode() == ISD::BIT_CONVERT) { 2298 V = V.getOperand(0); 2299 EVT VVT = V.getValueType(); 2300 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2301 return SDValue(); 2302 } 2303 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2304 return (Index == 0) ? V.getOperand(0) 2305 : getUNDEF(VT.getVectorElementType()); 2306 if (V.getOpcode() == ISD::BUILD_VECTOR) 2307 return V.getOperand(Index); 2308 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2309 return getShuffleScalarElt(SVN, Index); 2310 return SDValue(); 2311} 2312 2313 2314/// getNode - Gets or creates the specified node. 2315/// 2316SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2317 FoldingSetNodeID ID; 2318 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2319 void *IP = 0; 2320 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2321 return SDValue(E, 0); 2322 2323 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2324 CSEMap.InsertNode(N, IP); 2325 2326 AllNodes.push_back(N); 2327#ifndef NDEBUG 2328 VerifyNode(N); 2329#endif 2330 return SDValue(N, 0); 2331} 2332 2333SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2334 EVT VT, SDValue Operand) { 2335 // Constant fold unary operations with an integer constant operand. 2336 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2337 const APInt &Val = C->getAPIntValue(); 2338 switch (Opcode) { 2339 default: break; 2340 case ISD::SIGN_EXTEND: 2341 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2342 case ISD::ANY_EXTEND: 2343 case ISD::ZERO_EXTEND: 2344 case ISD::TRUNCATE: 2345 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2346 case ISD::UINT_TO_FP: 2347 case ISD::SINT_TO_FP: { 2348 const uint64_t zero[] = {0, 0}; 2349 // No compile time operations on ppcf128. 2350 if (VT == MVT::ppcf128) break; 2351 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2352 (void)apf.convertFromAPInt(Val, 2353 Opcode==ISD::SINT_TO_FP, 2354 APFloat::rmNearestTiesToEven); 2355 return getConstantFP(apf, VT); 2356 } 2357 case ISD::BIT_CONVERT: 2358 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2359 return getConstantFP(Val.bitsToFloat(), VT); 2360 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2361 return getConstantFP(Val.bitsToDouble(), VT); 2362 break; 2363 case ISD::BSWAP: 2364 return getConstant(Val.byteSwap(), VT); 2365 case ISD::CTPOP: 2366 return getConstant(Val.countPopulation(), VT); 2367 case ISD::CTLZ: 2368 return getConstant(Val.countLeadingZeros(), VT); 2369 case ISD::CTTZ: 2370 return getConstant(Val.countTrailingZeros(), VT); 2371 } 2372 } 2373 2374 // Constant fold unary operations with a floating point constant operand. 2375 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2376 APFloat V = C->getValueAPF(); // make copy 2377 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2378 switch (Opcode) { 2379 case ISD::FNEG: 2380 V.changeSign(); 2381 return getConstantFP(V, VT); 2382 case ISD::FABS: 2383 V.clearSign(); 2384 return getConstantFP(V, VT); 2385 case ISD::FP_ROUND: 2386 case ISD::FP_EXTEND: { 2387 bool ignored; 2388 // This can return overflow, underflow, or inexact; we don't care. 2389 // FIXME need to be more flexible about rounding mode. 2390 (void)V.convert(*EVTToAPFloatSemantics(VT), 2391 APFloat::rmNearestTiesToEven, &ignored); 2392 return getConstantFP(V, VT); 2393 } 2394 case ISD::FP_TO_SINT: 2395 case ISD::FP_TO_UINT: { 2396 integerPart x[2]; 2397 bool ignored; 2398 assert(integerPartWidth >= 64); 2399 // FIXME need to be more flexible about rounding mode. 2400 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2401 Opcode==ISD::FP_TO_SINT, 2402 APFloat::rmTowardZero, &ignored); 2403 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2404 break; 2405 APInt api(VT.getSizeInBits(), 2, x); 2406 return getConstant(api, VT); 2407 } 2408 case ISD::BIT_CONVERT: 2409 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2410 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2411 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2412 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2413 break; 2414 } 2415 } 2416 } 2417 2418 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2419 switch (Opcode) { 2420 case ISD::TokenFactor: 2421 case ISD::MERGE_VALUES: 2422 case ISD::CONCAT_VECTORS: 2423 return Operand; // Factor, merge or concat of one node? No need. 2424 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2425 case ISD::FP_EXTEND: 2426 assert(VT.isFloatingPoint() && 2427 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2428 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2429 assert((!VT.isVector() || 2430 VT.getVectorNumElements() == 2431 Operand.getValueType().getVectorNumElements()) && 2432 "Vector element count mismatch!"); 2433 if (Operand.getOpcode() == ISD::UNDEF) 2434 return getUNDEF(VT); 2435 break; 2436 case ISD::SIGN_EXTEND: 2437 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2438 "Invalid SIGN_EXTEND!"); 2439 if (Operand.getValueType() == VT) return Operand; // noop extension 2440 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2441 "Invalid sext node, dst < src!"); 2442 assert((!VT.isVector() || 2443 VT.getVectorNumElements() == 2444 Operand.getValueType().getVectorNumElements()) && 2445 "Vector element count mismatch!"); 2446 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2447 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2448 break; 2449 case ISD::ZERO_EXTEND: 2450 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2451 "Invalid ZERO_EXTEND!"); 2452 if (Operand.getValueType() == VT) return Operand; // noop extension 2453 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2454 "Invalid zext node, dst < src!"); 2455 assert((!VT.isVector() || 2456 VT.getVectorNumElements() == 2457 Operand.getValueType().getVectorNumElements()) && 2458 "Vector element count mismatch!"); 2459 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2460 return getNode(ISD::ZERO_EXTEND, DL, VT, 2461 Operand.getNode()->getOperand(0)); 2462 break; 2463 case ISD::ANY_EXTEND: 2464 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2465 "Invalid ANY_EXTEND!"); 2466 if (Operand.getValueType() == VT) return Operand; // noop extension 2467 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2468 "Invalid anyext node, dst < src!"); 2469 assert((!VT.isVector() || 2470 VT.getVectorNumElements() == 2471 Operand.getValueType().getVectorNumElements()) && 2472 "Vector element count mismatch!"); 2473 2474 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2475 OpOpcode == ISD::ANY_EXTEND) 2476 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2477 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2478 2479 // (ext (trunx x)) -> x 2480 if (OpOpcode == ISD::TRUNCATE) { 2481 SDValue OpOp = Operand.getNode()->getOperand(0); 2482 if (OpOp.getValueType() == VT) 2483 return OpOp; 2484 } 2485 break; 2486 case ISD::TRUNCATE: 2487 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2488 "Invalid TRUNCATE!"); 2489 if (Operand.getValueType() == VT) return Operand; // noop truncate 2490 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2491 "Invalid truncate node, src < dst!"); 2492 assert((!VT.isVector() || 2493 VT.getVectorNumElements() == 2494 Operand.getValueType().getVectorNumElements()) && 2495 "Vector element count mismatch!"); 2496 if (OpOpcode == ISD::TRUNCATE) 2497 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2498 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2499 OpOpcode == ISD::ANY_EXTEND) { 2500 // If the source is smaller than the dest, we still need an extend. 2501 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2502 .bitsLT(VT.getScalarType())) 2503 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2504 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2505 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2506 else 2507 return Operand.getNode()->getOperand(0); 2508 } 2509 break; 2510 case ISD::BIT_CONVERT: 2511 // Basic sanity checking. 2512 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2513 && "Cannot BIT_CONVERT between types of different sizes!"); 2514 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2515 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2516 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2517 if (OpOpcode == ISD::UNDEF) 2518 return getUNDEF(VT); 2519 break; 2520 case ISD::SCALAR_TO_VECTOR: 2521 assert(VT.isVector() && !Operand.getValueType().isVector() && 2522 (VT.getVectorElementType() == Operand.getValueType() || 2523 (VT.getVectorElementType().isInteger() && 2524 Operand.getValueType().isInteger() && 2525 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2526 "Illegal SCALAR_TO_VECTOR node!"); 2527 if (OpOpcode == ISD::UNDEF) 2528 return getUNDEF(VT); 2529 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2530 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2531 isa<ConstantSDNode>(Operand.getOperand(1)) && 2532 Operand.getConstantOperandVal(1) == 0 && 2533 Operand.getOperand(0).getValueType() == VT) 2534 return Operand.getOperand(0); 2535 break; 2536 case ISD::FNEG: 2537 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2538 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2539 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2540 Operand.getNode()->getOperand(0)); 2541 if (OpOpcode == ISD::FNEG) // --X -> X 2542 return Operand.getNode()->getOperand(0); 2543 break; 2544 case ISD::FABS: 2545 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2546 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2547 break; 2548 } 2549 2550 SDNode *N; 2551 SDVTList VTs = getVTList(VT); 2552 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2553 FoldingSetNodeID ID; 2554 SDValue Ops[1] = { Operand }; 2555 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2556 void *IP = 0; 2557 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2558 return SDValue(E, 0); 2559 2560 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2561 CSEMap.InsertNode(N, IP); 2562 } else { 2563 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2564 } 2565 2566 AllNodes.push_back(N); 2567#ifndef NDEBUG 2568 VerifyNode(N); 2569#endif 2570 return SDValue(N, 0); 2571} 2572 2573SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2574 EVT VT, 2575 ConstantSDNode *Cst1, 2576 ConstantSDNode *Cst2) { 2577 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2578 2579 switch (Opcode) { 2580 case ISD::ADD: return getConstant(C1 + C2, VT); 2581 case ISD::SUB: return getConstant(C1 - C2, VT); 2582 case ISD::MUL: return getConstant(C1 * C2, VT); 2583 case ISD::UDIV: 2584 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2585 break; 2586 case ISD::UREM: 2587 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2588 break; 2589 case ISD::SDIV: 2590 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2591 break; 2592 case ISD::SREM: 2593 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2594 break; 2595 case ISD::AND: return getConstant(C1 & C2, VT); 2596 case ISD::OR: return getConstant(C1 | C2, VT); 2597 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2598 case ISD::SHL: return getConstant(C1 << C2, VT); 2599 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2600 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2601 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2602 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2603 default: break; 2604 } 2605 2606 return SDValue(); 2607} 2608 2609SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2610 SDValue N1, SDValue N2) { 2611 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2612 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2613 switch (Opcode) { 2614 default: break; 2615 case ISD::TokenFactor: 2616 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2617 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2618 // Fold trivial token factors. 2619 if (N1.getOpcode() == ISD::EntryToken) return N2; 2620 if (N2.getOpcode() == ISD::EntryToken) return N1; 2621 if (N1 == N2) return N1; 2622 break; 2623 case ISD::CONCAT_VECTORS: 2624 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2625 // one big BUILD_VECTOR. 2626 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2627 N2.getOpcode() == ISD::BUILD_VECTOR) { 2628 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2629 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2630 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2631 } 2632 break; 2633 case ISD::AND: 2634 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2635 assert(N1.getValueType() == N2.getValueType() && 2636 N1.getValueType() == VT && "Binary operator types must match!"); 2637 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2638 // worth handling here. 2639 if (N2C && N2C->isNullValue()) 2640 return N2; 2641 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2642 return N1; 2643 break; 2644 case ISD::OR: 2645 case ISD::XOR: 2646 case ISD::ADD: 2647 case ISD::SUB: 2648 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2649 assert(N1.getValueType() == N2.getValueType() && 2650 N1.getValueType() == VT && "Binary operator types must match!"); 2651 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2652 // it's worth handling here. 2653 if (N2C && N2C->isNullValue()) 2654 return N1; 2655 break; 2656 case ISD::UDIV: 2657 case ISD::UREM: 2658 case ISD::MULHU: 2659 case ISD::MULHS: 2660 case ISD::MUL: 2661 case ISD::SDIV: 2662 case ISD::SREM: 2663 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2664 assert(N1.getValueType() == N2.getValueType() && 2665 N1.getValueType() == VT && "Binary operator types must match!"); 2666 break; 2667 case ISD::FADD: 2668 case ISD::FSUB: 2669 case ISD::FMUL: 2670 case ISD::FDIV: 2671 case ISD::FREM: 2672 if (UnsafeFPMath) { 2673 if (Opcode == ISD::FADD) { 2674 // 0+x --> x 2675 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2676 if (CFP->getValueAPF().isZero()) 2677 return N2; 2678 // x+0 --> x 2679 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2680 if (CFP->getValueAPF().isZero()) 2681 return N1; 2682 } else if (Opcode == ISD::FSUB) { 2683 // x-0 --> x 2684 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2685 if (CFP->getValueAPF().isZero()) 2686 return N1; 2687 } 2688 } 2689 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2690 assert(N1.getValueType() == N2.getValueType() && 2691 N1.getValueType() == VT && "Binary operator types must match!"); 2692 break; 2693 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2694 assert(N1.getValueType() == VT && 2695 N1.getValueType().isFloatingPoint() && 2696 N2.getValueType().isFloatingPoint() && 2697 "Invalid FCOPYSIGN!"); 2698 break; 2699 case ISD::SHL: 2700 case ISD::SRA: 2701 case ISD::SRL: 2702 case ISD::ROTL: 2703 case ISD::ROTR: 2704 assert(VT == N1.getValueType() && 2705 "Shift operators return type must be the same as their first arg"); 2706 assert(VT.isInteger() && N2.getValueType().isInteger() && 2707 "Shifts only work on integers"); 2708 2709 // Always fold shifts of i1 values so the code generator doesn't need to 2710 // handle them. Since we know the size of the shift has to be less than the 2711 // size of the value, the shift/rotate count is guaranteed to be zero. 2712 if (VT == MVT::i1) 2713 return N1; 2714 if (N2C && N2C->isNullValue()) 2715 return N1; 2716 break; 2717 case ISD::FP_ROUND_INREG: { 2718 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2719 assert(VT == N1.getValueType() && "Not an inreg round!"); 2720 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2721 "Cannot FP_ROUND_INREG integer types"); 2722 assert(EVT.isVector() == VT.isVector() && 2723 "FP_ROUND_INREG type should be vector iff the operand " 2724 "type is vector!"); 2725 assert((!EVT.isVector() || 2726 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2727 "Vector element counts must match in FP_ROUND_INREG"); 2728 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2729 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2730 break; 2731 } 2732 case ISD::FP_ROUND: 2733 assert(VT.isFloatingPoint() && 2734 N1.getValueType().isFloatingPoint() && 2735 VT.bitsLE(N1.getValueType()) && 2736 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2737 if (N1.getValueType() == VT) return N1; // noop conversion. 2738 break; 2739 case ISD::AssertSext: 2740 case ISD::AssertZext: { 2741 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2742 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2743 assert(VT.isInteger() && EVT.isInteger() && 2744 "Cannot *_EXTEND_INREG FP types"); 2745 assert(!EVT.isVector() && 2746 "AssertSExt/AssertZExt type should be the vector element type " 2747 "rather than the vector type!"); 2748 assert(EVT.bitsLE(VT) && "Not extending!"); 2749 if (VT == EVT) return N1; // noop assertion. 2750 break; 2751 } 2752 case ISD::SIGN_EXTEND_INREG: { 2753 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2754 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2755 assert(VT.isInteger() && EVT.isInteger() && 2756 "Cannot *_EXTEND_INREG FP types"); 2757 assert(EVT.isVector() == VT.isVector() && 2758 "SIGN_EXTEND_INREG type should be vector iff the operand " 2759 "type is vector!"); 2760 assert((!EVT.isVector() || 2761 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2762 "Vector element counts must match in SIGN_EXTEND_INREG"); 2763 assert(EVT.bitsLE(VT) && "Not extending!"); 2764 if (EVT == VT) return N1; // Not actually extending 2765 2766 if (N1C) { 2767 APInt Val = N1C->getAPIntValue(); 2768 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2769 Val <<= Val.getBitWidth()-FromBits; 2770 Val = Val.ashr(Val.getBitWidth()-FromBits); 2771 return getConstant(Val, VT); 2772 } 2773 break; 2774 } 2775 case ISD::EXTRACT_VECTOR_ELT: 2776 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2777 if (N1.getOpcode() == ISD::UNDEF) 2778 return getUNDEF(VT); 2779 2780 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2781 // expanding copies of large vectors from registers. 2782 if (N2C && 2783 N1.getOpcode() == ISD::CONCAT_VECTORS && 2784 N1.getNumOperands() > 0) { 2785 unsigned Factor = 2786 N1.getOperand(0).getValueType().getVectorNumElements(); 2787 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2788 N1.getOperand(N2C->getZExtValue() / Factor), 2789 getConstant(N2C->getZExtValue() % Factor, 2790 N2.getValueType())); 2791 } 2792 2793 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2794 // expanding large vector constants. 2795 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2796 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2797 EVT VEltTy = N1.getValueType().getVectorElementType(); 2798 if (Elt.getValueType() != VEltTy) { 2799 // If the vector element type is not legal, the BUILD_VECTOR operands 2800 // are promoted and implicitly truncated. Make that explicit here. 2801 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2802 } 2803 if (VT != VEltTy) { 2804 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2805 // result is implicitly extended. 2806 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2807 } 2808 return Elt; 2809 } 2810 2811 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2812 // operations are lowered to scalars. 2813 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2814 // If the indices are the same, return the inserted element else 2815 // if the indices are known different, extract the element from 2816 // the original vector. 2817 SDValue N1Op2 = N1.getOperand(2); 2818 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2819 2820 if (N1Op2C && N2C) { 2821 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2822 if (VT == N1.getOperand(1).getValueType()) 2823 return N1.getOperand(1); 2824 else 2825 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2826 } 2827 2828 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2829 } 2830 } 2831 break; 2832 case ISD::EXTRACT_ELEMENT: 2833 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2834 assert(!N1.getValueType().isVector() && !VT.isVector() && 2835 (N1.getValueType().isInteger() == VT.isInteger()) && 2836 "Wrong types for EXTRACT_ELEMENT!"); 2837 2838 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2839 // 64-bit integers into 32-bit parts. Instead of building the extract of 2840 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2841 if (N1.getOpcode() == ISD::BUILD_PAIR) 2842 return N1.getOperand(N2C->getZExtValue()); 2843 2844 // EXTRACT_ELEMENT of a constant int is also very common. 2845 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2846 unsigned ElementSize = VT.getSizeInBits(); 2847 unsigned Shift = ElementSize * N2C->getZExtValue(); 2848 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2849 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2850 } 2851 break; 2852 case ISD::EXTRACT_SUBVECTOR: 2853 if (N1.getValueType() == VT) // Trivial extraction. 2854 return N1; 2855 break; 2856 } 2857 2858 if (N1C) { 2859 if (N2C) { 2860 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2861 if (SV.getNode()) return SV; 2862 } else { // Cannonicalize constant to RHS if commutative 2863 if (isCommutativeBinOp(Opcode)) { 2864 std::swap(N1C, N2C); 2865 std::swap(N1, N2); 2866 } 2867 } 2868 } 2869 2870 // Constant fold FP operations. 2871 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2872 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2873 if (N1CFP) { 2874 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2875 // Cannonicalize constant to RHS if commutative 2876 std::swap(N1CFP, N2CFP); 2877 std::swap(N1, N2); 2878 } else if (N2CFP && VT != MVT::ppcf128) { 2879 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2880 APFloat::opStatus s; 2881 switch (Opcode) { 2882 case ISD::FADD: 2883 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2884 if (s != APFloat::opInvalidOp) 2885 return getConstantFP(V1, VT); 2886 break; 2887 case ISD::FSUB: 2888 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2889 if (s!=APFloat::opInvalidOp) 2890 return getConstantFP(V1, VT); 2891 break; 2892 case ISD::FMUL: 2893 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2894 if (s!=APFloat::opInvalidOp) 2895 return getConstantFP(V1, VT); 2896 break; 2897 case ISD::FDIV: 2898 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2899 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2900 return getConstantFP(V1, VT); 2901 break; 2902 case ISD::FREM : 2903 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2904 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2905 return getConstantFP(V1, VT); 2906 break; 2907 case ISD::FCOPYSIGN: 2908 V1.copySign(V2); 2909 return getConstantFP(V1, VT); 2910 default: break; 2911 } 2912 } 2913 } 2914 2915 // Canonicalize an UNDEF to the RHS, even over a constant. 2916 if (N1.getOpcode() == ISD::UNDEF) { 2917 if (isCommutativeBinOp(Opcode)) { 2918 std::swap(N1, N2); 2919 } else { 2920 switch (Opcode) { 2921 case ISD::FP_ROUND_INREG: 2922 case ISD::SIGN_EXTEND_INREG: 2923 case ISD::SUB: 2924 case ISD::FSUB: 2925 case ISD::FDIV: 2926 case ISD::FREM: 2927 case ISD::SRA: 2928 return N1; // fold op(undef, arg2) -> undef 2929 case ISD::UDIV: 2930 case ISD::SDIV: 2931 case ISD::UREM: 2932 case ISD::SREM: 2933 case ISD::SRL: 2934 case ISD::SHL: 2935 if (!VT.isVector()) 2936 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2937 // For vectors, we can't easily build an all zero vector, just return 2938 // the LHS. 2939 return N2; 2940 } 2941 } 2942 } 2943 2944 // Fold a bunch of operators when the RHS is undef. 2945 if (N2.getOpcode() == ISD::UNDEF) { 2946 switch (Opcode) { 2947 case ISD::XOR: 2948 if (N1.getOpcode() == ISD::UNDEF) 2949 // Handle undef ^ undef -> 0 special case. This is a common 2950 // idiom (misuse). 2951 return getConstant(0, VT); 2952 // fallthrough 2953 case ISD::ADD: 2954 case ISD::ADDC: 2955 case ISD::ADDE: 2956 case ISD::SUB: 2957 case ISD::UDIV: 2958 case ISD::SDIV: 2959 case ISD::UREM: 2960 case ISD::SREM: 2961 return N2; // fold op(arg1, undef) -> undef 2962 case ISD::FADD: 2963 case ISD::FSUB: 2964 case ISD::FMUL: 2965 case ISD::FDIV: 2966 case ISD::FREM: 2967 if (UnsafeFPMath) 2968 return N2; 2969 break; 2970 case ISD::MUL: 2971 case ISD::AND: 2972 case ISD::SRL: 2973 case ISD::SHL: 2974 if (!VT.isVector()) 2975 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2976 // For vectors, we can't easily build an all zero vector, just return 2977 // the LHS. 2978 return N1; 2979 case ISD::OR: 2980 if (!VT.isVector()) 2981 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2982 // For vectors, we can't easily build an all one vector, just return 2983 // the LHS. 2984 return N1; 2985 case ISD::SRA: 2986 return N1; 2987 } 2988 } 2989 2990 // Memoize this node if possible. 2991 SDNode *N; 2992 SDVTList VTs = getVTList(VT); 2993 if (VT != MVT::Flag) { 2994 SDValue Ops[] = { N1, N2 }; 2995 FoldingSetNodeID ID; 2996 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2997 void *IP = 0; 2998 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2999 return SDValue(E, 0); 3000 3001 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3002 CSEMap.InsertNode(N, IP); 3003 } else { 3004 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3005 } 3006 3007 AllNodes.push_back(N); 3008#ifndef NDEBUG 3009 VerifyNode(N); 3010#endif 3011 return SDValue(N, 0); 3012} 3013 3014SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3015 SDValue N1, SDValue N2, SDValue N3) { 3016 // Perform various simplifications. 3017 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3018 switch (Opcode) { 3019 case ISD::CONCAT_VECTORS: 3020 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3021 // one big BUILD_VECTOR. 3022 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3023 N2.getOpcode() == ISD::BUILD_VECTOR && 3024 N3.getOpcode() == ISD::BUILD_VECTOR) { 3025 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 3026 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3027 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3028 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3029 } 3030 break; 3031 case ISD::SETCC: { 3032 // Use FoldSetCC to simplify SETCC's. 3033 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3034 if (Simp.getNode()) return Simp; 3035 break; 3036 } 3037 case ISD::SELECT: 3038 if (N1C) { 3039 if (N1C->getZExtValue()) 3040 return N2; // select true, X, Y -> X 3041 else 3042 return N3; // select false, X, Y -> Y 3043 } 3044 3045 if (N2 == N3) return N2; // select C, X, X -> X 3046 break; 3047 case ISD::VECTOR_SHUFFLE: 3048 llvm_unreachable("should use getVectorShuffle constructor!"); 3049 break; 3050 case ISD::BIT_CONVERT: 3051 // Fold bit_convert nodes from a type to themselves. 3052 if (N1.getValueType() == VT) 3053 return N1; 3054 break; 3055 } 3056 3057 // Memoize node if it doesn't produce a flag. 3058 SDNode *N; 3059 SDVTList VTs = getVTList(VT); 3060 if (VT != MVT::Flag) { 3061 SDValue Ops[] = { N1, N2, N3 }; 3062 FoldingSetNodeID ID; 3063 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3064 void *IP = 0; 3065 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3066 return SDValue(E, 0); 3067 3068 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3069 CSEMap.InsertNode(N, IP); 3070 } else { 3071 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3072 } 3073 3074 AllNodes.push_back(N); 3075#ifndef NDEBUG 3076 VerifyNode(N); 3077#endif 3078 return SDValue(N, 0); 3079} 3080 3081SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3082 SDValue N1, SDValue N2, SDValue N3, 3083 SDValue N4) { 3084 SDValue Ops[] = { N1, N2, N3, N4 }; 3085 return getNode(Opcode, DL, VT, Ops, 4); 3086} 3087 3088SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3089 SDValue N1, SDValue N2, SDValue N3, 3090 SDValue N4, SDValue N5) { 3091 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3092 return getNode(Opcode, DL, VT, Ops, 5); 3093} 3094 3095/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3096/// the incoming stack arguments to be loaded from the stack. 3097SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3098 SmallVector<SDValue, 8> ArgChains; 3099 3100 // Include the original chain at the beginning of the list. When this is 3101 // used by target LowerCall hooks, this helps legalize find the 3102 // CALLSEQ_BEGIN node. 3103 ArgChains.push_back(Chain); 3104 3105 // Add a chain value for each stack argument. 3106 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3107 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3108 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3109 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3110 if (FI->getIndex() < 0) 3111 ArgChains.push_back(SDValue(L, 1)); 3112 3113 // Build a tokenfactor for all the chains. 3114 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3115 &ArgChains[0], ArgChains.size()); 3116} 3117 3118/// getMemsetValue - Vectorized representation of the memset value 3119/// operand. 3120static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3121 DebugLoc dl) { 3122 assert(Value.getOpcode() != ISD::UNDEF); 3123 3124 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3125 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3126 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3127 unsigned Shift = 8; 3128 for (unsigned i = NumBits; i > 8; i >>= 1) { 3129 Val = (Val << Shift) | Val; 3130 Shift <<= 1; 3131 } 3132 if (VT.isInteger()) 3133 return DAG.getConstant(Val, VT); 3134 return DAG.getConstantFP(APFloat(Val), VT); 3135 } 3136 3137 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3138 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3139 unsigned Shift = 8; 3140 for (unsigned i = NumBits; i > 8; i >>= 1) { 3141 Value = DAG.getNode(ISD::OR, dl, VT, 3142 DAG.getNode(ISD::SHL, dl, VT, Value, 3143 DAG.getConstant(Shift, 3144 TLI.getShiftAmountTy())), 3145 Value); 3146 Shift <<= 1; 3147 } 3148 3149 return Value; 3150} 3151 3152/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3153/// used when a memcpy is turned into a memset when the source is a constant 3154/// string ptr. 3155static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3156 const TargetLowering &TLI, 3157 std::string &Str, unsigned Offset) { 3158 // Handle vector with all elements zero. 3159 if (Str.empty()) { 3160 if (VT.isInteger()) 3161 return DAG.getConstant(0, VT); 3162 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3163 VT.getSimpleVT().SimpleTy == MVT::f64) 3164 return DAG.getConstantFP(0.0, VT); 3165 else if (VT.isVector()) { 3166 unsigned NumElts = VT.getVectorNumElements(); 3167 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3168 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3169 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3170 EltVT, NumElts))); 3171 } else 3172 llvm_unreachable("Expected type!"); 3173 } 3174 3175 assert(!VT.isVector() && "Can't handle vector type here!"); 3176 unsigned NumBits = VT.getSizeInBits(); 3177 unsigned MSB = NumBits / 8; 3178 uint64_t Val = 0; 3179 if (TLI.isLittleEndian()) 3180 Offset = Offset + MSB - 1; 3181 for (unsigned i = 0; i != MSB; ++i) { 3182 Val = (Val << 8) | (unsigned char)Str[Offset]; 3183 Offset += TLI.isLittleEndian() ? -1 : 1; 3184 } 3185 return DAG.getConstant(Val, VT); 3186} 3187 3188/// getMemBasePlusOffset - Returns base and offset node for the 3189/// 3190static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3191 SelectionDAG &DAG) { 3192 EVT VT = Base.getValueType(); 3193 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3194 VT, Base, DAG.getConstant(Offset, VT)); 3195} 3196 3197/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3198/// 3199static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3200 unsigned SrcDelta = 0; 3201 GlobalAddressSDNode *G = NULL; 3202 if (Src.getOpcode() == ISD::GlobalAddress) 3203 G = cast<GlobalAddressSDNode>(Src); 3204 else if (Src.getOpcode() == ISD::ADD && 3205 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3206 Src.getOperand(1).getOpcode() == ISD::Constant) { 3207 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3208 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3209 } 3210 if (!G) 3211 return false; 3212 3213 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3214 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3215 return true; 3216 3217 return false; 3218} 3219 3220/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3221/// to replace the memset / memcpy. Return true if the number of memory ops 3222/// is below the threshold. It returns the types of the sequence of 3223/// memory ops to perform memset / memcpy by reference. 3224static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3225 unsigned Limit, uint64_t Size, 3226 unsigned DstAlign, unsigned SrcAlign, 3227 bool NonScalarIntSafe, 3228 bool MemcpyStrSrc, 3229 SelectionDAG &DAG, 3230 const TargetLowering &TLI) { 3231 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3232 "Expecting memcpy / memset source to meet alignment requirement!"); 3233 // If 'SrcAlign' is zero, that means the memory operation does not need load 3234 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3235 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3236 // specified alignment of the memory operation. If it is zero, that means 3237 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3238 // indicates whether the memcpy source is constant so it does not need to be 3239 // loaded. 3240 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3241 NonScalarIntSafe, MemcpyStrSrc, 3242 DAG.getMachineFunction()); 3243 3244 if (VT == MVT::Other) { 3245 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3246 TLI.allowsUnalignedMemoryAccesses(VT)) { 3247 VT = TLI.getPointerTy(); 3248 } else { 3249 switch (DstAlign & 7) { 3250 case 0: VT = MVT::i64; break; 3251 case 4: VT = MVT::i32; break; 3252 case 2: VT = MVT::i16; break; 3253 default: VT = MVT::i8; break; 3254 } 3255 } 3256 3257 MVT LVT = MVT::i64; 3258 while (!TLI.isTypeLegal(LVT)) 3259 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3260 assert(LVT.isInteger()); 3261 3262 if (VT.bitsGT(LVT)) 3263 VT = LVT; 3264 } 3265 3266 // If we're optimizing for size, and there is a limit, bump the maximum number 3267 // of operations inserted down to 4. This is a wild guess that approximates 3268 // the size of a call to memcpy or memset (3 arguments + call). 3269 if (Limit != ~0U) { 3270 const Function *F = DAG.getMachineFunction().getFunction(); 3271 if (F->hasFnAttr(Attribute::OptimizeForSize)) 3272 Limit = 4; 3273 } 3274 3275 unsigned NumMemOps = 0; 3276 while (Size != 0) { 3277 unsigned VTSize = VT.getSizeInBits() / 8; 3278 while (VTSize > Size) { 3279 // For now, only use non-vector load / store's for the left-over pieces. 3280 if (VT.isVector() || VT.isFloatingPoint()) { 3281 VT = MVT::i64; 3282 while (!TLI.isTypeLegal(VT)) 3283 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3284 VTSize = VT.getSizeInBits() / 8; 3285 } else { 3286 // This can result in a type that is not legal on the target, e.g. 3287 // 1 or 2 bytes on PPC. 3288 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3289 VTSize >>= 1; 3290 } 3291 } 3292 3293 if (++NumMemOps > Limit) 3294 return false; 3295 MemOps.push_back(VT); 3296 Size -= VTSize; 3297 } 3298 3299 return true; 3300} 3301 3302static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3303 SDValue Chain, SDValue Dst, 3304 SDValue Src, uint64_t Size, 3305 unsigned Align, bool isVol, 3306 bool AlwaysInline, 3307 const Value *DstSV, uint64_t DstSVOff, 3308 const Value *SrcSV, uint64_t SrcSVOff) { 3309 // Turn a memcpy of undef to nop. 3310 if (Src.getOpcode() == ISD::UNDEF) 3311 return Chain; 3312 3313 // Expand memcpy to a series of load and store ops if the size operand falls 3314 // below a certain threshold. 3315 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3316 std::vector<EVT> MemOps; 3317 bool DstAlignCanChange = false; 3318 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3319 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3320 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3321 DstAlignCanChange = true; 3322 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3323 if (Align > SrcAlign) 3324 SrcAlign = Align; 3325 std::string Str; 3326 bool CopyFromStr = isMemSrcFromString(Src, Str); 3327 bool isZeroStr = CopyFromStr && Str.empty(); 3328 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(); 3329 3330 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3331 (DstAlignCanChange ? 0 : Align), 3332 (isZeroStr ? 0 : SrcAlign), 3333 true, CopyFromStr, DAG, TLI)) 3334 return SDValue(); 3335 3336 if (DstAlignCanChange) { 3337 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3338 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3339 if (NewAlign > Align) { 3340 // Give the stack frame object a larger alignment if needed. 3341 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3342 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3343 Align = NewAlign; 3344 } 3345 } 3346 3347 SmallVector<SDValue, 8> OutChains; 3348 unsigned NumMemOps = MemOps.size(); 3349 uint64_t SrcOff = 0, DstOff = 0; 3350 for (unsigned i = 0; i != NumMemOps; ++i) { 3351 EVT VT = MemOps[i]; 3352 unsigned VTSize = VT.getSizeInBits() / 8; 3353 SDValue Value, Store; 3354 3355 if (CopyFromStr && 3356 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3357 // It's unlikely a store of a vector immediate can be done in a single 3358 // instruction. It would require a load from a constantpool first. 3359 // We only handle zero vectors here. 3360 // FIXME: Handle other cases where store of vector immediate is done in 3361 // a single instruction. 3362 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3363 Store = DAG.getStore(Chain, dl, Value, 3364 getMemBasePlusOffset(Dst, DstOff, DAG), 3365 DstSV, DstSVOff + DstOff, isVol, false, Align); 3366 } else { 3367 // The type might not be legal for the target. This should only happen 3368 // if the type is smaller than a legal type, as on PPC, so the right 3369 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3370 // to Load/Store if NVT==VT. 3371 // FIXME does the case above also need this? 3372 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3373 assert(NVT.bitsGE(VT)); 3374 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3375 getMemBasePlusOffset(Src, SrcOff, DAG), 3376 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3377 MinAlign(SrcAlign, SrcOff)); 3378 Store = DAG.getTruncStore(Chain, dl, Value, 3379 getMemBasePlusOffset(Dst, DstOff, DAG), 3380 DstSV, DstSVOff + DstOff, VT, isVol, false, 3381 Align); 3382 } 3383 OutChains.push_back(Store); 3384 SrcOff += VTSize; 3385 DstOff += VTSize; 3386 } 3387 3388 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3389 &OutChains[0], OutChains.size()); 3390} 3391 3392static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3393 SDValue Chain, SDValue Dst, 3394 SDValue Src, uint64_t Size, 3395 unsigned Align, bool isVol, 3396 bool AlwaysInline, 3397 const Value *DstSV, uint64_t DstSVOff, 3398 const Value *SrcSV, uint64_t SrcSVOff) { 3399 // Turn a memmove of undef to nop. 3400 if (Src.getOpcode() == ISD::UNDEF) 3401 return Chain; 3402 3403 // Expand memmove to a series of load and store ops if the size operand falls 3404 // below a certain threshold. 3405 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3406 std::vector<EVT> MemOps; 3407 bool DstAlignCanChange = false; 3408 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3409 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3410 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3411 DstAlignCanChange = true; 3412 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3413 if (Align > SrcAlign) 3414 SrcAlign = Align; 3415 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(); 3416 3417 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3418 (DstAlignCanChange ? 0 : Align), 3419 SrcAlign, true, false, DAG, TLI)) 3420 return SDValue(); 3421 3422 if (DstAlignCanChange) { 3423 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3424 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3425 if (NewAlign > Align) { 3426 // Give the stack frame object a larger alignment if needed. 3427 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3428 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3429 Align = NewAlign; 3430 } 3431 } 3432 3433 uint64_t SrcOff = 0, DstOff = 0; 3434 SmallVector<SDValue, 8> LoadValues; 3435 SmallVector<SDValue, 8> LoadChains; 3436 SmallVector<SDValue, 8> OutChains; 3437 unsigned NumMemOps = MemOps.size(); 3438 for (unsigned i = 0; i < NumMemOps; i++) { 3439 EVT VT = MemOps[i]; 3440 unsigned VTSize = VT.getSizeInBits() / 8; 3441 SDValue Value, Store; 3442 3443 Value = DAG.getLoad(VT, dl, Chain, 3444 getMemBasePlusOffset(Src, SrcOff, DAG), 3445 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3446 LoadValues.push_back(Value); 3447 LoadChains.push_back(Value.getValue(1)); 3448 SrcOff += VTSize; 3449 } 3450 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3451 &LoadChains[0], LoadChains.size()); 3452 OutChains.clear(); 3453 for (unsigned i = 0; i < NumMemOps; i++) { 3454 EVT VT = MemOps[i]; 3455 unsigned VTSize = VT.getSizeInBits() / 8; 3456 SDValue Value, Store; 3457 3458 Store = DAG.getStore(Chain, dl, LoadValues[i], 3459 getMemBasePlusOffset(Dst, DstOff, DAG), 3460 DstSV, DstSVOff + DstOff, isVol, false, Align); 3461 OutChains.push_back(Store); 3462 DstOff += VTSize; 3463 } 3464 3465 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3466 &OutChains[0], OutChains.size()); 3467} 3468 3469static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3470 SDValue Chain, SDValue Dst, 3471 SDValue Src, uint64_t Size, 3472 unsigned Align, bool isVol, 3473 const Value *DstSV, uint64_t DstSVOff) { 3474 // Turn a memset of undef to nop. 3475 if (Src.getOpcode() == ISD::UNDEF) 3476 return Chain; 3477 3478 // Expand memset to a series of load/store ops if the size operand 3479 // falls below a certain threshold. 3480 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3481 std::vector<EVT> MemOps; 3482 bool DstAlignCanChange = false; 3483 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3484 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3485 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3486 DstAlignCanChange = true; 3487 bool NonScalarIntSafe = 3488 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3489 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3490 Size, (DstAlignCanChange ? 0 : Align), 0, 3491 NonScalarIntSafe, false, DAG, TLI)) 3492 return SDValue(); 3493 3494 if (DstAlignCanChange) { 3495 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3496 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3497 if (NewAlign > Align) { 3498 // Give the stack frame object a larger alignment if needed. 3499 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3500 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3501 Align = NewAlign; 3502 } 3503 } 3504 3505 SmallVector<SDValue, 8> OutChains; 3506 uint64_t DstOff = 0; 3507 unsigned NumMemOps = MemOps.size(); 3508 for (unsigned i = 0; i < NumMemOps; i++) { 3509 EVT VT = MemOps[i]; 3510 unsigned VTSize = VT.getSizeInBits() / 8; 3511 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3512 SDValue Store = DAG.getStore(Chain, dl, Value, 3513 getMemBasePlusOffset(Dst, DstOff, DAG), 3514 DstSV, DstSVOff + DstOff, isVol, false, 0); 3515 OutChains.push_back(Store); 3516 DstOff += VTSize; 3517 } 3518 3519 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3520 &OutChains[0], OutChains.size()); 3521} 3522 3523SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3524 SDValue Src, SDValue Size, 3525 unsigned Align, bool isVol, bool AlwaysInline, 3526 const Value *DstSV, uint64_t DstSVOff, 3527 const Value *SrcSV, uint64_t SrcSVOff) { 3528 3529 // Check to see if we should lower the memcpy to loads and stores first. 3530 // For cases within the target-specified limits, this is the best choice. 3531 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3532 if (ConstantSize) { 3533 // Memcpy with size zero? Just return the original chain. 3534 if (ConstantSize->isNullValue()) 3535 return Chain; 3536 3537 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3538 ConstantSize->getZExtValue(),Align, 3539 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3540 if (Result.getNode()) 3541 return Result; 3542 } 3543 3544 // Then check to see if we should lower the memcpy with target-specific 3545 // code. If the target chooses to do this, this is the next best. 3546 SDValue Result = 3547 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3548 isVol, AlwaysInline, 3549 DstSV, DstSVOff, SrcSV, SrcSVOff); 3550 if (Result.getNode()) 3551 return Result; 3552 3553 // If we really need inline code and the target declined to provide it, 3554 // use a (potentially long) sequence of loads and stores. 3555 if (AlwaysInline) { 3556 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3557 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3558 ConstantSize->getZExtValue(), Align, isVol, 3559 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3560 } 3561 3562 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3563 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3564 // respect volatile, so they may do things like read or write memory 3565 // beyond the given memory regions. But fixing this isn't easy, and most 3566 // people don't care. 3567 3568 // Emit a library call. 3569 TargetLowering::ArgListTy Args; 3570 TargetLowering::ArgListEntry Entry; 3571 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3572 Entry.Node = Dst; Args.push_back(Entry); 3573 Entry.Node = Src; Args.push_back(Entry); 3574 Entry.Node = Size; Args.push_back(Entry); 3575 // FIXME: pass in DebugLoc 3576 std::pair<SDValue,SDValue> CallResult = 3577 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3578 false, false, false, false, 0, 3579 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3580 /*isReturnValueUsed=*/false, 3581 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3582 TLI.getPointerTy()), 3583 Args, *this, dl); 3584 return CallResult.second; 3585} 3586 3587SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3588 SDValue Src, SDValue Size, 3589 unsigned Align, bool isVol, 3590 const Value *DstSV, uint64_t DstSVOff, 3591 const Value *SrcSV, uint64_t SrcSVOff) { 3592 3593 // Check to see if we should lower the memmove to loads and stores first. 3594 // For cases within the target-specified limits, this is the best choice. 3595 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3596 if (ConstantSize) { 3597 // Memmove with size zero? Just return the original chain. 3598 if (ConstantSize->isNullValue()) 3599 return Chain; 3600 3601 SDValue Result = 3602 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3603 ConstantSize->getZExtValue(), Align, isVol, 3604 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3605 if (Result.getNode()) 3606 return Result; 3607 } 3608 3609 // Then check to see if we should lower the memmove with target-specific 3610 // code. If the target chooses to do this, this is the next best. 3611 SDValue Result = 3612 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3613 DstSV, DstSVOff, SrcSV, SrcSVOff); 3614 if (Result.getNode()) 3615 return Result; 3616 3617 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3618 // not be safe. See memcpy above for more details. 3619 3620 // Emit a library call. 3621 TargetLowering::ArgListTy Args; 3622 TargetLowering::ArgListEntry Entry; 3623 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3624 Entry.Node = Dst; Args.push_back(Entry); 3625 Entry.Node = Src; Args.push_back(Entry); 3626 Entry.Node = Size; Args.push_back(Entry); 3627 // FIXME: pass in DebugLoc 3628 std::pair<SDValue,SDValue> CallResult = 3629 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3630 false, false, false, false, 0, 3631 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3632 /*isReturnValueUsed=*/false, 3633 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3634 TLI.getPointerTy()), 3635 Args, *this, dl); 3636 return CallResult.second; 3637} 3638 3639SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3640 SDValue Src, SDValue Size, 3641 unsigned Align, bool isVol, 3642 const Value *DstSV, uint64_t DstSVOff) { 3643 3644 // Check to see if we should lower the memset to stores first. 3645 // For cases within the target-specified limits, this is the best choice. 3646 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3647 if (ConstantSize) { 3648 // Memset with size zero? Just return the original chain. 3649 if (ConstantSize->isNullValue()) 3650 return Chain; 3651 3652 SDValue Result = 3653 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3654 Align, isVol, DstSV, DstSVOff); 3655 3656 if (Result.getNode()) 3657 return Result; 3658 } 3659 3660 // Then check to see if we should lower the memset with target-specific 3661 // code. If the target chooses to do this, this is the next best. 3662 SDValue Result = 3663 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3664 DstSV, DstSVOff); 3665 if (Result.getNode()) 3666 return Result; 3667 3668 // Emit a library call. 3669 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3670 TargetLowering::ArgListTy Args; 3671 TargetLowering::ArgListEntry Entry; 3672 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3673 Args.push_back(Entry); 3674 // Extend or truncate the argument to be an i32 value for the call. 3675 if (Src.getValueType().bitsGT(MVT::i32)) 3676 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3677 else 3678 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3679 Entry.Node = Src; 3680 Entry.Ty = Type::getInt32Ty(*getContext()); 3681 Entry.isSExt = true; 3682 Args.push_back(Entry); 3683 Entry.Node = Size; 3684 Entry.Ty = IntPtrTy; 3685 Entry.isSExt = false; 3686 Args.push_back(Entry); 3687 // FIXME: pass in DebugLoc 3688 std::pair<SDValue,SDValue> CallResult = 3689 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3690 false, false, false, false, 0, 3691 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3692 /*isReturnValueUsed=*/false, 3693 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3694 TLI.getPointerTy()), 3695 Args, *this, dl); 3696 return CallResult.second; 3697} 3698 3699SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3700 SDValue Chain, 3701 SDValue Ptr, SDValue Cmp, 3702 SDValue Swp, const Value* PtrVal, 3703 unsigned Alignment) { 3704 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3705 Alignment = getEVTAlignment(MemVT); 3706 3707 // Check if the memory reference references a frame index 3708 if (!PtrVal) 3709 if (const FrameIndexSDNode *FI = 3710 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3711 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3712 3713 MachineFunction &MF = getMachineFunction(); 3714 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3715 3716 // For now, atomics are considered to be volatile always. 3717 Flags |= MachineMemOperand::MOVolatile; 3718 3719 MachineMemOperand *MMO = 3720 MF.getMachineMemOperand(PtrVal, Flags, 0, 3721 MemVT.getStoreSize(), Alignment); 3722 3723 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3724} 3725 3726SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3727 SDValue Chain, 3728 SDValue Ptr, SDValue Cmp, 3729 SDValue Swp, MachineMemOperand *MMO) { 3730 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3731 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3732 3733 EVT VT = Cmp.getValueType(); 3734 3735 SDVTList VTs = getVTList(VT, MVT::Other); 3736 FoldingSetNodeID ID; 3737 ID.AddInteger(MemVT.getRawBits()); 3738 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3739 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3740 void* IP = 0; 3741 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3742 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3743 return SDValue(E, 0); 3744 } 3745 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3746 Ptr, Cmp, Swp, MMO); 3747 CSEMap.InsertNode(N, IP); 3748 AllNodes.push_back(N); 3749 return SDValue(N, 0); 3750} 3751 3752SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3753 SDValue Chain, 3754 SDValue Ptr, SDValue Val, 3755 const Value* PtrVal, 3756 unsigned Alignment) { 3757 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3758 Alignment = getEVTAlignment(MemVT); 3759 3760 // Check if the memory reference references a frame index 3761 if (!PtrVal) 3762 if (const FrameIndexSDNode *FI = 3763 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3764 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3765 3766 MachineFunction &MF = getMachineFunction(); 3767 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3768 3769 // For now, atomics are considered to be volatile always. 3770 Flags |= MachineMemOperand::MOVolatile; 3771 3772 MachineMemOperand *MMO = 3773 MF.getMachineMemOperand(PtrVal, Flags, 0, 3774 MemVT.getStoreSize(), Alignment); 3775 3776 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3777} 3778 3779SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3780 SDValue Chain, 3781 SDValue Ptr, SDValue Val, 3782 MachineMemOperand *MMO) { 3783 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3784 Opcode == ISD::ATOMIC_LOAD_SUB || 3785 Opcode == ISD::ATOMIC_LOAD_AND || 3786 Opcode == ISD::ATOMIC_LOAD_OR || 3787 Opcode == ISD::ATOMIC_LOAD_XOR || 3788 Opcode == ISD::ATOMIC_LOAD_NAND || 3789 Opcode == ISD::ATOMIC_LOAD_MIN || 3790 Opcode == ISD::ATOMIC_LOAD_MAX || 3791 Opcode == ISD::ATOMIC_LOAD_UMIN || 3792 Opcode == ISD::ATOMIC_LOAD_UMAX || 3793 Opcode == ISD::ATOMIC_SWAP) && 3794 "Invalid Atomic Op"); 3795 3796 EVT VT = Val.getValueType(); 3797 3798 SDVTList VTs = getVTList(VT, MVT::Other); 3799 FoldingSetNodeID ID; 3800 ID.AddInteger(MemVT.getRawBits()); 3801 SDValue Ops[] = {Chain, Ptr, Val}; 3802 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3803 void* IP = 0; 3804 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3805 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3806 return SDValue(E, 0); 3807 } 3808 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3809 Ptr, Val, MMO); 3810 CSEMap.InsertNode(N, IP); 3811 AllNodes.push_back(N); 3812 return SDValue(N, 0); 3813} 3814 3815/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3816/// Allowed to return something different (and simpler) if Simplify is true. 3817SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3818 DebugLoc dl) { 3819 if (NumOps == 1) 3820 return Ops[0]; 3821 3822 SmallVector<EVT, 4> VTs; 3823 VTs.reserve(NumOps); 3824 for (unsigned i = 0; i < NumOps; ++i) 3825 VTs.push_back(Ops[i].getValueType()); 3826 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3827 Ops, NumOps); 3828} 3829 3830SDValue 3831SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3832 const EVT *VTs, unsigned NumVTs, 3833 const SDValue *Ops, unsigned NumOps, 3834 EVT MemVT, const Value *srcValue, int SVOff, 3835 unsigned Align, bool Vol, 3836 bool ReadMem, bool WriteMem) { 3837 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3838 MemVT, srcValue, SVOff, Align, Vol, 3839 ReadMem, WriteMem); 3840} 3841 3842SDValue 3843SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3844 const SDValue *Ops, unsigned NumOps, 3845 EVT MemVT, const Value *srcValue, int SVOff, 3846 unsigned Align, bool Vol, 3847 bool ReadMem, bool WriteMem) { 3848 if (Align == 0) // Ensure that codegen never sees alignment 0 3849 Align = getEVTAlignment(MemVT); 3850 3851 MachineFunction &MF = getMachineFunction(); 3852 unsigned Flags = 0; 3853 if (WriteMem) 3854 Flags |= MachineMemOperand::MOStore; 3855 if (ReadMem) 3856 Flags |= MachineMemOperand::MOLoad; 3857 if (Vol) 3858 Flags |= MachineMemOperand::MOVolatile; 3859 MachineMemOperand *MMO = 3860 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3861 MemVT.getStoreSize(), Align); 3862 3863 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3864} 3865 3866SDValue 3867SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3868 const SDValue *Ops, unsigned NumOps, 3869 EVT MemVT, MachineMemOperand *MMO) { 3870 assert((Opcode == ISD::INTRINSIC_VOID || 3871 Opcode == ISD::INTRINSIC_W_CHAIN || 3872 (Opcode <= INT_MAX && 3873 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3874 "Opcode is not a memory-accessing opcode!"); 3875 3876 // Memoize the node unless it returns a flag. 3877 MemIntrinsicSDNode *N; 3878 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3879 FoldingSetNodeID ID; 3880 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3881 void *IP = 0; 3882 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3883 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3884 return SDValue(E, 0); 3885 } 3886 3887 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3888 MemVT, MMO); 3889 CSEMap.InsertNode(N, IP); 3890 } else { 3891 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3892 MemVT, MMO); 3893 } 3894 AllNodes.push_back(N); 3895 return SDValue(N, 0); 3896} 3897 3898SDValue 3899SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3900 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3901 SDValue Ptr, SDValue Offset, 3902 const Value *SV, int SVOffset, EVT MemVT, 3903 bool isVolatile, bool isNonTemporal, 3904 unsigned Alignment) { 3905 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3906 Alignment = getEVTAlignment(VT); 3907 3908 // Check if the memory reference references a frame index 3909 if (!SV) 3910 if (const FrameIndexSDNode *FI = 3911 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3912 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3913 3914 MachineFunction &MF = getMachineFunction(); 3915 unsigned Flags = MachineMemOperand::MOLoad; 3916 if (isVolatile) 3917 Flags |= MachineMemOperand::MOVolatile; 3918 if (isNonTemporal) 3919 Flags |= MachineMemOperand::MONonTemporal; 3920 MachineMemOperand *MMO = 3921 MF.getMachineMemOperand(SV, Flags, SVOffset, 3922 MemVT.getStoreSize(), Alignment); 3923 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3924} 3925 3926SDValue 3927SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3928 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3929 SDValue Ptr, SDValue Offset, EVT MemVT, 3930 MachineMemOperand *MMO) { 3931 if (VT == MemVT) { 3932 ExtType = ISD::NON_EXTLOAD; 3933 } else if (ExtType == ISD::NON_EXTLOAD) { 3934 assert(VT == MemVT && "Non-extending load from different memory type!"); 3935 } else { 3936 // Extending load. 3937 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3938 "Should only be an extending load, not truncating!"); 3939 assert(VT.isInteger() == MemVT.isInteger() && 3940 "Cannot convert from FP to Int or Int -> FP!"); 3941 assert(VT.isVector() == MemVT.isVector() && 3942 "Cannot use trunc store to convert to or from a vector!"); 3943 assert((!VT.isVector() || 3944 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3945 "Cannot use trunc store to change the number of vector elements!"); 3946 } 3947 3948 bool Indexed = AM != ISD::UNINDEXED; 3949 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3950 "Unindexed load with an offset!"); 3951 3952 SDVTList VTs = Indexed ? 3953 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3954 SDValue Ops[] = { Chain, Ptr, Offset }; 3955 FoldingSetNodeID ID; 3956 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3957 ID.AddInteger(MemVT.getRawBits()); 3958 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3959 MMO->isNonTemporal())); 3960 void *IP = 0; 3961 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3962 cast<LoadSDNode>(E)->refineAlignment(MMO); 3963 return SDValue(E, 0); 3964 } 3965 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3966 MemVT, MMO); 3967 CSEMap.InsertNode(N, IP); 3968 AllNodes.push_back(N); 3969 return SDValue(N, 0); 3970} 3971 3972SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3973 SDValue Chain, SDValue Ptr, 3974 const Value *SV, int SVOffset, 3975 bool isVolatile, bool isNonTemporal, 3976 unsigned Alignment) { 3977 SDValue Undef = getUNDEF(Ptr.getValueType()); 3978 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3979 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3980} 3981 3982SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3983 SDValue Chain, SDValue Ptr, 3984 const Value *SV, 3985 int SVOffset, EVT MemVT, 3986 bool isVolatile, bool isNonTemporal, 3987 unsigned Alignment) { 3988 SDValue Undef = getUNDEF(Ptr.getValueType()); 3989 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3990 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3991} 3992 3993SDValue 3994SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3995 SDValue Offset, ISD::MemIndexedMode AM) { 3996 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3997 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3998 "Load is already a indexed load!"); 3999 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 4000 LD->getChain(), Base, Offset, LD->getSrcValue(), 4001 LD->getSrcValueOffset(), LD->getMemoryVT(), 4002 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4003} 4004 4005SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4006 SDValue Ptr, const Value *SV, int SVOffset, 4007 bool isVolatile, bool isNonTemporal, 4008 unsigned Alignment) { 4009 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4010 Alignment = getEVTAlignment(Val.getValueType()); 4011 4012 // Check if the memory reference references a frame index 4013 if (!SV) 4014 if (const FrameIndexSDNode *FI = 4015 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4016 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4017 4018 MachineFunction &MF = getMachineFunction(); 4019 unsigned Flags = MachineMemOperand::MOStore; 4020 if (isVolatile) 4021 Flags |= MachineMemOperand::MOVolatile; 4022 if (isNonTemporal) 4023 Flags |= MachineMemOperand::MONonTemporal; 4024 MachineMemOperand *MMO = 4025 MF.getMachineMemOperand(SV, Flags, SVOffset, 4026 Val.getValueType().getStoreSize(), Alignment); 4027 4028 return getStore(Chain, dl, Val, Ptr, MMO); 4029} 4030 4031SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4032 SDValue Ptr, MachineMemOperand *MMO) { 4033 EVT VT = Val.getValueType(); 4034 SDVTList VTs = getVTList(MVT::Other); 4035 SDValue Undef = getUNDEF(Ptr.getValueType()); 4036 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4037 FoldingSetNodeID ID; 4038 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4039 ID.AddInteger(VT.getRawBits()); 4040 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4041 MMO->isNonTemporal())); 4042 void *IP = 0; 4043 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4044 cast<StoreSDNode>(E)->refineAlignment(MMO); 4045 return SDValue(E, 0); 4046 } 4047 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4048 false, VT, MMO); 4049 CSEMap.InsertNode(N, IP); 4050 AllNodes.push_back(N); 4051 return SDValue(N, 0); 4052} 4053 4054SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4055 SDValue Ptr, const Value *SV, 4056 int SVOffset, EVT SVT, 4057 bool isVolatile, bool isNonTemporal, 4058 unsigned Alignment) { 4059 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4060 Alignment = getEVTAlignment(SVT); 4061 4062 // Check if the memory reference references a frame index 4063 if (!SV) 4064 if (const FrameIndexSDNode *FI = 4065 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4066 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4067 4068 MachineFunction &MF = getMachineFunction(); 4069 unsigned Flags = MachineMemOperand::MOStore; 4070 if (isVolatile) 4071 Flags |= MachineMemOperand::MOVolatile; 4072 if (isNonTemporal) 4073 Flags |= MachineMemOperand::MONonTemporal; 4074 MachineMemOperand *MMO = 4075 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4076 4077 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4078} 4079 4080SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4081 SDValue Ptr, EVT SVT, 4082 MachineMemOperand *MMO) { 4083 EVT VT = Val.getValueType(); 4084 4085 if (VT == SVT) 4086 return getStore(Chain, dl, Val, Ptr, MMO); 4087 4088 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4089 "Should only be a truncating store, not extending!"); 4090 assert(VT.isInteger() == SVT.isInteger() && 4091 "Can't do FP-INT conversion!"); 4092 assert(VT.isVector() == SVT.isVector() && 4093 "Cannot use trunc store to convert to or from a vector!"); 4094 assert((!VT.isVector() || 4095 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4096 "Cannot use trunc store to change the number of vector elements!"); 4097 4098 SDVTList VTs = getVTList(MVT::Other); 4099 SDValue Undef = getUNDEF(Ptr.getValueType()); 4100 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4101 FoldingSetNodeID ID; 4102 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4103 ID.AddInteger(SVT.getRawBits()); 4104 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4105 MMO->isNonTemporal())); 4106 void *IP = 0; 4107 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4108 cast<StoreSDNode>(E)->refineAlignment(MMO); 4109 return SDValue(E, 0); 4110 } 4111 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4112 true, SVT, MMO); 4113 CSEMap.InsertNode(N, IP); 4114 AllNodes.push_back(N); 4115 return SDValue(N, 0); 4116} 4117 4118SDValue 4119SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4120 SDValue Offset, ISD::MemIndexedMode AM) { 4121 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4122 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4123 "Store is already a indexed store!"); 4124 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4125 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4126 FoldingSetNodeID ID; 4127 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4128 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4129 ID.AddInteger(ST->getRawSubclassData()); 4130 void *IP = 0; 4131 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4132 return SDValue(E, 0); 4133 4134 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4135 ST->isTruncatingStore(), 4136 ST->getMemoryVT(), 4137 ST->getMemOperand()); 4138 CSEMap.InsertNode(N, IP); 4139 AllNodes.push_back(N); 4140 return SDValue(N, 0); 4141} 4142 4143SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4144 SDValue Chain, SDValue Ptr, 4145 SDValue SV) { 4146 SDValue Ops[] = { Chain, Ptr, SV }; 4147 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4148} 4149 4150SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4151 const SDUse *Ops, unsigned NumOps) { 4152 switch (NumOps) { 4153 case 0: return getNode(Opcode, DL, VT); 4154 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4155 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4156 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4157 default: break; 4158 } 4159 4160 // Copy from an SDUse array into an SDValue array for use with 4161 // the regular getNode logic. 4162 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4163 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4164} 4165 4166SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4167 const SDValue *Ops, unsigned NumOps) { 4168 switch (NumOps) { 4169 case 0: return getNode(Opcode, DL, VT); 4170 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4171 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4172 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4173 default: break; 4174 } 4175 4176 switch (Opcode) { 4177 default: break; 4178 case ISD::SELECT_CC: { 4179 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4180 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4181 "LHS and RHS of condition must have same type!"); 4182 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4183 "True and False arms of SelectCC must have same type!"); 4184 assert(Ops[2].getValueType() == VT && 4185 "select_cc node must be of same type as true and false value!"); 4186 break; 4187 } 4188 case ISD::BR_CC: { 4189 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4190 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4191 "LHS/RHS of comparison should match types!"); 4192 break; 4193 } 4194 } 4195 4196 // Memoize nodes. 4197 SDNode *N; 4198 SDVTList VTs = getVTList(VT); 4199 4200 if (VT != MVT::Flag) { 4201 FoldingSetNodeID ID; 4202 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4203 void *IP = 0; 4204 4205 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4206 return SDValue(E, 0); 4207 4208 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4209 CSEMap.InsertNode(N, IP); 4210 } else { 4211 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4212 } 4213 4214 AllNodes.push_back(N); 4215#ifndef NDEBUG 4216 VerifyNode(N); 4217#endif 4218 return SDValue(N, 0); 4219} 4220 4221SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4222 const std::vector<EVT> &ResultTys, 4223 const SDValue *Ops, unsigned NumOps) { 4224 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4225 Ops, NumOps); 4226} 4227 4228SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4229 const EVT *VTs, unsigned NumVTs, 4230 const SDValue *Ops, unsigned NumOps) { 4231 if (NumVTs == 1) 4232 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4233 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4234} 4235 4236SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4237 const SDValue *Ops, unsigned NumOps) { 4238 if (VTList.NumVTs == 1) 4239 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4240 4241#if 0 4242 switch (Opcode) { 4243 // FIXME: figure out how to safely handle things like 4244 // int foo(int x) { return 1 << (x & 255); } 4245 // int bar() { return foo(256); } 4246 case ISD::SRA_PARTS: 4247 case ISD::SRL_PARTS: 4248 case ISD::SHL_PARTS: 4249 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4250 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4251 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4252 else if (N3.getOpcode() == ISD::AND) 4253 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4254 // If the and is only masking out bits that cannot effect the shift, 4255 // eliminate the and. 4256 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4257 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4258 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4259 } 4260 break; 4261 } 4262#endif 4263 4264 // Memoize the node unless it returns a flag. 4265 SDNode *N; 4266 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4267 FoldingSetNodeID ID; 4268 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4269 void *IP = 0; 4270 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4271 return SDValue(E, 0); 4272 4273 if (NumOps == 1) { 4274 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4275 } else if (NumOps == 2) { 4276 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4277 } else if (NumOps == 3) { 4278 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4279 Ops[2]); 4280 } else { 4281 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4282 } 4283 CSEMap.InsertNode(N, IP); 4284 } else { 4285 if (NumOps == 1) { 4286 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4287 } else if (NumOps == 2) { 4288 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4289 } else if (NumOps == 3) { 4290 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4291 Ops[2]); 4292 } else { 4293 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4294 } 4295 } 4296 AllNodes.push_back(N); 4297#ifndef NDEBUG 4298 VerifyNode(N); 4299#endif 4300 return SDValue(N, 0); 4301} 4302 4303SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4304 return getNode(Opcode, DL, VTList, 0, 0); 4305} 4306 4307SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4308 SDValue N1) { 4309 SDValue Ops[] = { N1 }; 4310 return getNode(Opcode, DL, VTList, Ops, 1); 4311} 4312 4313SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4314 SDValue N1, SDValue N2) { 4315 SDValue Ops[] = { N1, N2 }; 4316 return getNode(Opcode, DL, VTList, Ops, 2); 4317} 4318 4319SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4320 SDValue N1, SDValue N2, SDValue N3) { 4321 SDValue Ops[] = { N1, N2, N3 }; 4322 return getNode(Opcode, DL, VTList, Ops, 3); 4323} 4324 4325SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4326 SDValue N1, SDValue N2, SDValue N3, 4327 SDValue N4) { 4328 SDValue Ops[] = { N1, N2, N3, N4 }; 4329 return getNode(Opcode, DL, VTList, Ops, 4); 4330} 4331 4332SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4333 SDValue N1, SDValue N2, SDValue N3, 4334 SDValue N4, SDValue N5) { 4335 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4336 return getNode(Opcode, DL, VTList, Ops, 5); 4337} 4338 4339SDVTList SelectionDAG::getVTList(EVT VT) { 4340 return makeVTList(SDNode::getValueTypeList(VT), 1); 4341} 4342 4343SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4344 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4345 E = VTList.rend(); I != E; ++I) 4346 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4347 return *I; 4348 4349 EVT *Array = Allocator.Allocate<EVT>(2); 4350 Array[0] = VT1; 4351 Array[1] = VT2; 4352 SDVTList Result = makeVTList(Array, 2); 4353 VTList.push_back(Result); 4354 return Result; 4355} 4356 4357SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4358 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4359 E = VTList.rend(); I != E; ++I) 4360 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4361 I->VTs[2] == VT3) 4362 return *I; 4363 4364 EVT *Array = Allocator.Allocate<EVT>(3); 4365 Array[0] = VT1; 4366 Array[1] = VT2; 4367 Array[2] = VT3; 4368 SDVTList Result = makeVTList(Array, 3); 4369 VTList.push_back(Result); 4370 return Result; 4371} 4372 4373SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4374 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4375 E = VTList.rend(); I != E; ++I) 4376 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4377 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4378 return *I; 4379 4380 EVT *Array = Allocator.Allocate<EVT>(4); 4381 Array[0] = VT1; 4382 Array[1] = VT2; 4383 Array[2] = VT3; 4384 Array[3] = VT4; 4385 SDVTList Result = makeVTList(Array, 4); 4386 VTList.push_back(Result); 4387 return Result; 4388} 4389 4390SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4391 switch (NumVTs) { 4392 case 0: llvm_unreachable("Cannot have nodes without results!"); 4393 case 1: return getVTList(VTs[0]); 4394 case 2: return getVTList(VTs[0], VTs[1]); 4395 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4396 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4397 default: break; 4398 } 4399 4400 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4401 E = VTList.rend(); I != E; ++I) { 4402 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4403 continue; 4404 4405 bool NoMatch = false; 4406 for (unsigned i = 2; i != NumVTs; ++i) 4407 if (VTs[i] != I->VTs[i]) { 4408 NoMatch = true; 4409 break; 4410 } 4411 if (!NoMatch) 4412 return *I; 4413 } 4414 4415 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4416 std::copy(VTs, VTs+NumVTs, Array); 4417 SDVTList Result = makeVTList(Array, NumVTs); 4418 VTList.push_back(Result); 4419 return Result; 4420} 4421 4422 4423/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4424/// specified operands. If the resultant node already exists in the DAG, 4425/// this does not modify the specified node, instead it returns the node that 4426/// already exists. If the resultant node does not exist in the DAG, the 4427/// input node is returned. As a degenerate case, if you specify the same 4428/// input operands as the node already has, the input node is returned. 4429SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4430 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4431 4432 // Check to see if there is no change. 4433 if (Op == N->getOperand(0)) return N; 4434 4435 // See if the modified node already exists. 4436 void *InsertPos = 0; 4437 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4438 return Existing; 4439 4440 // Nope it doesn't. Remove the node from its current place in the maps. 4441 if (InsertPos) 4442 if (!RemoveNodeFromCSEMaps(N)) 4443 InsertPos = 0; 4444 4445 // Now we update the operands. 4446 N->OperandList[0].set(Op); 4447 4448 // If this gets put into a CSE map, add it. 4449 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4450 return N; 4451} 4452 4453SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4454 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4455 4456 // Check to see if there is no change. 4457 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4458 return N; // No operands changed, just return the input node. 4459 4460 // See if the modified node already exists. 4461 void *InsertPos = 0; 4462 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4463 return Existing; 4464 4465 // Nope it doesn't. Remove the node from its current place in the maps. 4466 if (InsertPos) 4467 if (!RemoveNodeFromCSEMaps(N)) 4468 InsertPos = 0; 4469 4470 // Now we update the operands. 4471 if (N->OperandList[0] != Op1) 4472 N->OperandList[0].set(Op1); 4473 if (N->OperandList[1] != Op2) 4474 N->OperandList[1].set(Op2); 4475 4476 // If this gets put into a CSE map, add it. 4477 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4478 return N; 4479} 4480 4481SDNode *SelectionDAG:: 4482UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4483 SDValue Ops[] = { Op1, Op2, Op3 }; 4484 return UpdateNodeOperands(N, Ops, 3); 4485} 4486 4487SDNode *SelectionDAG:: 4488UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4489 SDValue Op3, SDValue Op4) { 4490 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4491 return UpdateNodeOperands(N, Ops, 4); 4492} 4493 4494SDNode *SelectionDAG:: 4495UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4496 SDValue Op3, SDValue Op4, SDValue Op5) { 4497 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4498 return UpdateNodeOperands(N, Ops, 5); 4499} 4500 4501SDNode *SelectionDAG:: 4502UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4503 assert(N->getNumOperands() == NumOps && 4504 "Update with wrong number of operands"); 4505 4506 // Check to see if there is no change. 4507 bool AnyChange = false; 4508 for (unsigned i = 0; i != NumOps; ++i) { 4509 if (Ops[i] != N->getOperand(i)) { 4510 AnyChange = true; 4511 break; 4512 } 4513 } 4514 4515 // No operands changed, just return the input node. 4516 if (!AnyChange) return N; 4517 4518 // See if the modified node already exists. 4519 void *InsertPos = 0; 4520 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4521 return Existing; 4522 4523 // Nope it doesn't. Remove the node from its current place in the maps. 4524 if (InsertPos) 4525 if (!RemoveNodeFromCSEMaps(N)) 4526 InsertPos = 0; 4527 4528 // Now we update the operands. 4529 for (unsigned i = 0; i != NumOps; ++i) 4530 if (N->OperandList[i] != Ops[i]) 4531 N->OperandList[i].set(Ops[i]); 4532 4533 // If this gets put into a CSE map, add it. 4534 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4535 return N; 4536} 4537 4538/// DropOperands - Release the operands and set this node to have 4539/// zero operands. 4540void SDNode::DropOperands() { 4541 // Unlike the code in MorphNodeTo that does this, we don't need to 4542 // watch for dead nodes here. 4543 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4544 SDUse &Use = *I++; 4545 Use.set(SDValue()); 4546 } 4547} 4548 4549/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4550/// machine opcode. 4551/// 4552SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4553 EVT VT) { 4554 SDVTList VTs = getVTList(VT); 4555 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4556} 4557 4558SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4559 EVT VT, SDValue Op1) { 4560 SDVTList VTs = getVTList(VT); 4561 SDValue Ops[] = { Op1 }; 4562 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4563} 4564 4565SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4566 EVT VT, SDValue Op1, 4567 SDValue Op2) { 4568 SDVTList VTs = getVTList(VT); 4569 SDValue Ops[] = { Op1, Op2 }; 4570 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4571} 4572 4573SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4574 EVT VT, SDValue Op1, 4575 SDValue Op2, SDValue Op3) { 4576 SDVTList VTs = getVTList(VT); 4577 SDValue Ops[] = { Op1, Op2, Op3 }; 4578 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4579} 4580 4581SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4582 EVT VT, const SDValue *Ops, 4583 unsigned NumOps) { 4584 SDVTList VTs = getVTList(VT); 4585 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4586} 4587 4588SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4589 EVT VT1, EVT VT2, const SDValue *Ops, 4590 unsigned NumOps) { 4591 SDVTList VTs = getVTList(VT1, VT2); 4592 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4593} 4594 4595SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4596 EVT VT1, EVT VT2) { 4597 SDVTList VTs = getVTList(VT1, VT2); 4598 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4599} 4600 4601SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4602 EVT VT1, EVT VT2, EVT VT3, 4603 const SDValue *Ops, unsigned NumOps) { 4604 SDVTList VTs = getVTList(VT1, VT2, VT3); 4605 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4606} 4607 4608SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4609 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4610 const SDValue *Ops, unsigned NumOps) { 4611 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4612 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4613} 4614 4615SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4616 EVT VT1, EVT VT2, 4617 SDValue Op1) { 4618 SDVTList VTs = getVTList(VT1, VT2); 4619 SDValue Ops[] = { Op1 }; 4620 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4621} 4622 4623SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4624 EVT VT1, EVT VT2, 4625 SDValue Op1, SDValue Op2) { 4626 SDVTList VTs = getVTList(VT1, VT2); 4627 SDValue Ops[] = { Op1, Op2 }; 4628 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4629} 4630 4631SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4632 EVT VT1, EVT VT2, 4633 SDValue Op1, SDValue Op2, 4634 SDValue Op3) { 4635 SDVTList VTs = getVTList(VT1, VT2); 4636 SDValue Ops[] = { Op1, Op2, Op3 }; 4637 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4638} 4639 4640SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4641 EVT VT1, EVT VT2, EVT VT3, 4642 SDValue Op1, SDValue Op2, 4643 SDValue Op3) { 4644 SDVTList VTs = getVTList(VT1, VT2, VT3); 4645 SDValue Ops[] = { Op1, Op2, Op3 }; 4646 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4647} 4648 4649SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4650 SDVTList VTs, const SDValue *Ops, 4651 unsigned NumOps) { 4652 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4653 // Reset the NodeID to -1. 4654 N->setNodeId(-1); 4655 return N; 4656} 4657 4658/// MorphNodeTo - This *mutates* the specified node to have the specified 4659/// return type, opcode, and operands. 4660/// 4661/// Note that MorphNodeTo returns the resultant node. If there is already a 4662/// node of the specified opcode and operands, it returns that node instead of 4663/// the current one. Note that the DebugLoc need not be the same. 4664/// 4665/// Using MorphNodeTo is faster than creating a new node and swapping it in 4666/// with ReplaceAllUsesWith both because it often avoids allocating a new 4667/// node, and because it doesn't require CSE recalculation for any of 4668/// the node's users. 4669/// 4670SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4671 SDVTList VTs, const SDValue *Ops, 4672 unsigned NumOps) { 4673 // If an identical node already exists, use it. 4674 void *IP = 0; 4675 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4676 FoldingSetNodeID ID; 4677 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4678 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4679 return ON; 4680 } 4681 4682 if (!RemoveNodeFromCSEMaps(N)) 4683 IP = 0; 4684 4685 // Start the morphing. 4686 N->NodeType = Opc; 4687 N->ValueList = VTs.VTs; 4688 N->NumValues = VTs.NumVTs; 4689 4690 // Clear the operands list, updating used nodes to remove this from their 4691 // use list. Keep track of any operands that become dead as a result. 4692 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4693 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4694 SDUse &Use = *I++; 4695 SDNode *Used = Use.getNode(); 4696 Use.set(SDValue()); 4697 if (Used->use_empty()) 4698 DeadNodeSet.insert(Used); 4699 } 4700 4701 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4702 // Initialize the memory references information. 4703 MN->setMemRefs(0, 0); 4704 // If NumOps is larger than the # of operands we can have in a 4705 // MachineSDNode, reallocate the operand list. 4706 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4707 if (MN->OperandsNeedDelete) 4708 delete[] MN->OperandList; 4709 if (NumOps > array_lengthof(MN->LocalOperands)) 4710 // We're creating a final node that will live unmorphed for the 4711 // remainder of the current SelectionDAG iteration, so we can allocate 4712 // the operands directly out of a pool with no recycling metadata. 4713 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4714 Ops, NumOps); 4715 else 4716 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4717 MN->OperandsNeedDelete = false; 4718 } else 4719 MN->InitOperands(MN->OperandList, Ops, NumOps); 4720 } else { 4721 // If NumOps is larger than the # of operands we currently have, reallocate 4722 // the operand list. 4723 if (NumOps > N->NumOperands) { 4724 if (N->OperandsNeedDelete) 4725 delete[] N->OperandList; 4726 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4727 N->OperandsNeedDelete = true; 4728 } else 4729 N->InitOperands(N->OperandList, Ops, NumOps); 4730 } 4731 4732 // Delete any nodes that are still dead after adding the uses for the 4733 // new operands. 4734 if (!DeadNodeSet.empty()) { 4735 SmallVector<SDNode *, 16> DeadNodes; 4736 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4737 E = DeadNodeSet.end(); I != E; ++I) 4738 if ((*I)->use_empty()) 4739 DeadNodes.push_back(*I); 4740 RemoveDeadNodes(DeadNodes); 4741 } 4742 4743 if (IP) 4744 CSEMap.InsertNode(N, IP); // Memoize the new node. 4745 return N; 4746} 4747 4748 4749/// getMachineNode - These are used for target selectors to create a new node 4750/// with specified return type(s), MachineInstr opcode, and operands. 4751/// 4752/// Note that getMachineNode returns the resultant node. If there is already a 4753/// node of the specified opcode and operands, it returns that node instead of 4754/// the current one. 4755MachineSDNode * 4756SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4757 SDVTList VTs = getVTList(VT); 4758 return getMachineNode(Opcode, dl, VTs, 0, 0); 4759} 4760 4761MachineSDNode * 4762SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4763 SDVTList VTs = getVTList(VT); 4764 SDValue Ops[] = { Op1 }; 4765 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4766} 4767 4768MachineSDNode * 4769SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4770 SDValue Op1, SDValue Op2) { 4771 SDVTList VTs = getVTList(VT); 4772 SDValue Ops[] = { Op1, Op2 }; 4773 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4774} 4775 4776MachineSDNode * 4777SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4778 SDValue Op1, SDValue Op2, SDValue Op3) { 4779 SDVTList VTs = getVTList(VT); 4780 SDValue Ops[] = { Op1, Op2, Op3 }; 4781 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4782} 4783 4784MachineSDNode * 4785SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4786 const SDValue *Ops, unsigned NumOps) { 4787 SDVTList VTs = getVTList(VT); 4788 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4789} 4790 4791MachineSDNode * 4792SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4793 SDVTList VTs = getVTList(VT1, VT2); 4794 return getMachineNode(Opcode, dl, VTs, 0, 0); 4795} 4796 4797MachineSDNode * 4798SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4799 EVT VT1, EVT VT2, SDValue Op1) { 4800 SDVTList VTs = getVTList(VT1, VT2); 4801 SDValue Ops[] = { Op1 }; 4802 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4803} 4804 4805MachineSDNode * 4806SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4807 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4808 SDVTList VTs = getVTList(VT1, VT2); 4809 SDValue Ops[] = { Op1, Op2 }; 4810 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4811} 4812 4813MachineSDNode * 4814SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4815 EVT VT1, EVT VT2, SDValue Op1, 4816 SDValue Op2, SDValue Op3) { 4817 SDVTList VTs = getVTList(VT1, VT2); 4818 SDValue Ops[] = { Op1, Op2, Op3 }; 4819 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4820} 4821 4822MachineSDNode * 4823SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4824 EVT VT1, EVT VT2, 4825 const SDValue *Ops, unsigned NumOps) { 4826 SDVTList VTs = getVTList(VT1, VT2); 4827 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4828} 4829 4830MachineSDNode * 4831SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4832 EVT VT1, EVT VT2, EVT VT3, 4833 SDValue Op1, SDValue Op2) { 4834 SDVTList VTs = getVTList(VT1, VT2, VT3); 4835 SDValue Ops[] = { Op1, Op2 }; 4836 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4837} 4838 4839MachineSDNode * 4840SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4841 EVT VT1, EVT VT2, EVT VT3, 4842 SDValue Op1, SDValue Op2, SDValue Op3) { 4843 SDVTList VTs = getVTList(VT1, VT2, VT3); 4844 SDValue Ops[] = { Op1, Op2, Op3 }; 4845 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4846} 4847 4848MachineSDNode * 4849SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4850 EVT VT1, EVT VT2, EVT VT3, 4851 const SDValue *Ops, unsigned NumOps) { 4852 SDVTList VTs = getVTList(VT1, VT2, VT3); 4853 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4854} 4855 4856MachineSDNode * 4857SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4858 EVT VT2, EVT VT3, EVT VT4, 4859 const SDValue *Ops, unsigned NumOps) { 4860 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4861 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4862} 4863 4864MachineSDNode * 4865SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4866 const std::vector<EVT> &ResultTys, 4867 const SDValue *Ops, unsigned NumOps) { 4868 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4869 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4870} 4871 4872MachineSDNode * 4873SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4874 const SDValue *Ops, unsigned NumOps) { 4875 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4876 MachineSDNode *N; 4877 void *IP; 4878 4879 if (DoCSE) { 4880 FoldingSetNodeID ID; 4881 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4882 IP = 0; 4883 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4884 return cast<MachineSDNode>(E); 4885 } 4886 4887 // Allocate a new MachineSDNode. 4888 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4889 4890 // Initialize the operands list. 4891 if (NumOps > array_lengthof(N->LocalOperands)) 4892 // We're creating a final node that will live unmorphed for the 4893 // remainder of the current SelectionDAG iteration, so we can allocate 4894 // the operands directly out of a pool with no recycling metadata. 4895 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4896 Ops, NumOps); 4897 else 4898 N->InitOperands(N->LocalOperands, Ops, NumOps); 4899 N->OperandsNeedDelete = false; 4900 4901 if (DoCSE) 4902 CSEMap.InsertNode(N, IP); 4903 4904 AllNodes.push_back(N); 4905#ifndef NDEBUG 4906 VerifyNode(N); 4907#endif 4908 return N; 4909} 4910 4911/// getTargetExtractSubreg - A convenience function for creating 4912/// TargetOpcode::EXTRACT_SUBREG nodes. 4913SDValue 4914SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4915 SDValue Operand) { 4916 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4917 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4918 VT, Operand, SRIdxVal); 4919 return SDValue(Subreg, 0); 4920} 4921 4922/// getTargetInsertSubreg - A convenience function for creating 4923/// TargetOpcode::INSERT_SUBREG nodes. 4924SDValue 4925SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4926 SDValue Operand, SDValue Subreg) { 4927 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4928 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4929 VT, Operand, Subreg, SRIdxVal); 4930 return SDValue(Result, 0); 4931} 4932 4933/// getNodeIfExists - Get the specified node if it's already available, or 4934/// else return NULL. 4935SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4936 const SDValue *Ops, unsigned NumOps) { 4937 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4938 FoldingSetNodeID ID; 4939 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4940 void *IP = 0; 4941 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4942 return E; 4943 } 4944 return NULL; 4945} 4946 4947/// getDbgValue - Creates a SDDbgValue node. 4948/// 4949SDDbgValue * 4950SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4951 DebugLoc DL, unsigned O) { 4952 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4953} 4954 4955SDDbgValue * 4956SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4957 DebugLoc DL, unsigned O) { 4958 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4959} 4960 4961SDDbgValue * 4962SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4963 DebugLoc DL, unsigned O) { 4964 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4965} 4966 4967namespace { 4968 4969/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4970/// pointed to by a use iterator is deleted, increment the use iterator 4971/// so that it doesn't dangle. 4972/// 4973/// This class also manages a "downlink" DAGUpdateListener, to forward 4974/// messages to ReplaceAllUsesWith's callers. 4975/// 4976class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4977 SelectionDAG::DAGUpdateListener *DownLink; 4978 SDNode::use_iterator &UI; 4979 SDNode::use_iterator &UE; 4980 4981 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4982 // Increment the iterator as needed. 4983 while (UI != UE && N == *UI) 4984 ++UI; 4985 4986 // Then forward the message. 4987 if (DownLink) DownLink->NodeDeleted(N, E); 4988 } 4989 4990 virtual void NodeUpdated(SDNode *N) { 4991 // Just forward the message. 4992 if (DownLink) DownLink->NodeUpdated(N); 4993 } 4994 4995public: 4996 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4997 SDNode::use_iterator &ui, 4998 SDNode::use_iterator &ue) 4999 : DownLink(dl), UI(ui), UE(ue) {} 5000}; 5001 5002} 5003 5004/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5005/// This can cause recursive merging of nodes in the DAG. 5006/// 5007/// This version assumes From has a single result value. 5008/// 5009void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5010 DAGUpdateListener *UpdateListener) { 5011 SDNode *From = FromN.getNode(); 5012 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5013 "Cannot replace with this method!"); 5014 assert(From != To.getNode() && "Cannot replace uses of with self"); 5015 5016 // Iterate over all the existing uses of From. New uses will be added 5017 // to the beginning of the use list, which we avoid visiting. 5018 // This specifically avoids visiting uses of From that arise while the 5019 // replacement is happening, because any such uses would be the result 5020 // of CSE: If an existing node looks like From after one of its operands 5021 // is replaced by To, we don't want to replace of all its users with To 5022 // too. See PR3018 for more info. 5023 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5024 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5025 while (UI != UE) { 5026 SDNode *User = *UI; 5027 5028 // This node is about to morph, remove its old self from the CSE maps. 5029 RemoveNodeFromCSEMaps(User); 5030 5031 // A user can appear in a use list multiple times, and when this 5032 // happens the uses are usually next to each other in the list. 5033 // To help reduce the number of CSE recomputations, process all 5034 // the uses of this user that we can find this way. 5035 do { 5036 SDUse &Use = UI.getUse(); 5037 ++UI; 5038 Use.set(To); 5039 } while (UI != UE && *UI == User); 5040 5041 // Now that we have modified User, add it back to the CSE maps. If it 5042 // already exists there, recursively merge the results together. 5043 AddModifiedNodeToCSEMaps(User, &Listener); 5044 } 5045} 5046 5047/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5048/// This can cause recursive merging of nodes in the DAG. 5049/// 5050/// This version assumes that for each value of From, there is a 5051/// corresponding value in To in the same position with the same type. 5052/// 5053void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5054 DAGUpdateListener *UpdateListener) { 5055#ifndef NDEBUG 5056 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5057 assert((!From->hasAnyUseOfValue(i) || 5058 From->getValueType(i) == To->getValueType(i)) && 5059 "Cannot use this version of ReplaceAllUsesWith!"); 5060#endif 5061 5062 // Handle the trivial case. 5063 if (From == To) 5064 return; 5065 5066 // Iterate over just the existing users of From. See the comments in 5067 // the ReplaceAllUsesWith above. 5068 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5069 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5070 while (UI != UE) { 5071 SDNode *User = *UI; 5072 5073 // This node is about to morph, remove its old self from the CSE maps. 5074 RemoveNodeFromCSEMaps(User); 5075 5076 // A user can appear in a use list multiple times, and when this 5077 // happens the uses are usually next to each other in the list. 5078 // To help reduce the number of CSE recomputations, process all 5079 // the uses of this user that we can find this way. 5080 do { 5081 SDUse &Use = UI.getUse(); 5082 ++UI; 5083 Use.setNode(To); 5084 } while (UI != UE && *UI == User); 5085 5086 // Now that we have modified User, add it back to the CSE maps. If it 5087 // already exists there, recursively merge the results together. 5088 AddModifiedNodeToCSEMaps(User, &Listener); 5089 } 5090} 5091 5092/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5093/// This can cause recursive merging of nodes in the DAG. 5094/// 5095/// This version can replace From with any result values. To must match the 5096/// number and types of values returned by From. 5097void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5098 const SDValue *To, 5099 DAGUpdateListener *UpdateListener) { 5100 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5101 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5102 5103 // Iterate over just the existing users of From. See the comments in 5104 // the ReplaceAllUsesWith above. 5105 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5106 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5107 while (UI != UE) { 5108 SDNode *User = *UI; 5109 5110 // This node is about to morph, remove its old self from the CSE maps. 5111 RemoveNodeFromCSEMaps(User); 5112 5113 // A user can appear in a use list multiple times, and when this 5114 // happens the uses are usually next to each other in the list. 5115 // To help reduce the number of CSE recomputations, process all 5116 // the uses of this user that we can find this way. 5117 do { 5118 SDUse &Use = UI.getUse(); 5119 const SDValue &ToOp = To[Use.getResNo()]; 5120 ++UI; 5121 Use.set(ToOp); 5122 } while (UI != UE && *UI == User); 5123 5124 // Now that we have modified User, add it back to the CSE maps. If it 5125 // already exists there, recursively merge the results together. 5126 AddModifiedNodeToCSEMaps(User, &Listener); 5127 } 5128} 5129 5130/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5131/// uses of other values produced by From.getNode() alone. The Deleted 5132/// vector is handled the same way as for ReplaceAllUsesWith. 5133void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5134 DAGUpdateListener *UpdateListener){ 5135 // Handle the really simple, really trivial case efficiently. 5136 if (From == To) return; 5137 5138 // Handle the simple, trivial, case efficiently. 5139 if (From.getNode()->getNumValues() == 1) { 5140 ReplaceAllUsesWith(From, To, UpdateListener); 5141 return; 5142 } 5143 5144 // Iterate over just the existing users of From. See the comments in 5145 // the ReplaceAllUsesWith above. 5146 SDNode::use_iterator UI = From.getNode()->use_begin(), 5147 UE = From.getNode()->use_end(); 5148 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5149 while (UI != UE) { 5150 SDNode *User = *UI; 5151 bool UserRemovedFromCSEMaps = false; 5152 5153 // A user can appear in a use list multiple times, and when this 5154 // happens the uses are usually next to each other in the list. 5155 // To help reduce the number of CSE recomputations, process all 5156 // the uses of this user that we can find this way. 5157 do { 5158 SDUse &Use = UI.getUse(); 5159 5160 // Skip uses of different values from the same node. 5161 if (Use.getResNo() != From.getResNo()) { 5162 ++UI; 5163 continue; 5164 } 5165 5166 // If this node hasn't been modified yet, it's still in the CSE maps, 5167 // so remove its old self from the CSE maps. 5168 if (!UserRemovedFromCSEMaps) { 5169 RemoveNodeFromCSEMaps(User); 5170 UserRemovedFromCSEMaps = true; 5171 } 5172 5173 ++UI; 5174 Use.set(To); 5175 } while (UI != UE && *UI == User); 5176 5177 // We are iterating over all uses of the From node, so if a use 5178 // doesn't use the specific value, no changes are made. 5179 if (!UserRemovedFromCSEMaps) 5180 continue; 5181 5182 // Now that we have modified User, add it back to the CSE maps. If it 5183 // already exists there, recursively merge the results together. 5184 AddModifiedNodeToCSEMaps(User, &Listener); 5185 } 5186} 5187 5188namespace { 5189 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5190 /// to record information about a use. 5191 struct UseMemo { 5192 SDNode *User; 5193 unsigned Index; 5194 SDUse *Use; 5195 }; 5196 5197 /// operator< - Sort Memos by User. 5198 bool operator<(const UseMemo &L, const UseMemo &R) { 5199 return (intptr_t)L.User < (intptr_t)R.User; 5200 } 5201} 5202 5203/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5204/// uses of other values produced by From.getNode() alone. The same value 5205/// may appear in both the From and To list. The Deleted vector is 5206/// handled the same way as for ReplaceAllUsesWith. 5207void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5208 const SDValue *To, 5209 unsigned Num, 5210 DAGUpdateListener *UpdateListener){ 5211 // Handle the simple, trivial case efficiently. 5212 if (Num == 1) 5213 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5214 5215 // Read up all the uses and make records of them. This helps 5216 // processing new uses that are introduced during the 5217 // replacement process. 5218 SmallVector<UseMemo, 4> Uses; 5219 for (unsigned i = 0; i != Num; ++i) { 5220 unsigned FromResNo = From[i].getResNo(); 5221 SDNode *FromNode = From[i].getNode(); 5222 for (SDNode::use_iterator UI = FromNode->use_begin(), 5223 E = FromNode->use_end(); UI != E; ++UI) { 5224 SDUse &Use = UI.getUse(); 5225 if (Use.getResNo() == FromResNo) { 5226 UseMemo Memo = { *UI, i, &Use }; 5227 Uses.push_back(Memo); 5228 } 5229 } 5230 } 5231 5232 // Sort the uses, so that all the uses from a given User are together. 5233 std::sort(Uses.begin(), Uses.end()); 5234 5235 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5236 UseIndex != UseIndexEnd; ) { 5237 // We know that this user uses some value of From. If it is the right 5238 // value, update it. 5239 SDNode *User = Uses[UseIndex].User; 5240 5241 // This node is about to morph, remove its old self from the CSE maps. 5242 RemoveNodeFromCSEMaps(User); 5243 5244 // The Uses array is sorted, so all the uses for a given User 5245 // are next to each other in the list. 5246 // To help reduce the number of CSE recomputations, process all 5247 // the uses of this user that we can find this way. 5248 do { 5249 unsigned i = Uses[UseIndex].Index; 5250 SDUse &Use = *Uses[UseIndex].Use; 5251 ++UseIndex; 5252 5253 Use.set(To[i]); 5254 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5255 5256 // Now that we have modified User, add it back to the CSE maps. If it 5257 // already exists there, recursively merge the results together. 5258 AddModifiedNodeToCSEMaps(User, UpdateListener); 5259 } 5260} 5261 5262/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5263/// based on their topological order. It returns the maximum id and a vector 5264/// of the SDNodes* in assigned order by reference. 5265unsigned SelectionDAG::AssignTopologicalOrder() { 5266 5267 unsigned DAGSize = 0; 5268 5269 // SortedPos tracks the progress of the algorithm. Nodes before it are 5270 // sorted, nodes after it are unsorted. When the algorithm completes 5271 // it is at the end of the list. 5272 allnodes_iterator SortedPos = allnodes_begin(); 5273 5274 // Visit all the nodes. Move nodes with no operands to the front of 5275 // the list immediately. Annotate nodes that do have operands with their 5276 // operand count. Before we do this, the Node Id fields of the nodes 5277 // may contain arbitrary values. After, the Node Id fields for nodes 5278 // before SortedPos will contain the topological sort index, and the 5279 // Node Id fields for nodes At SortedPos and after will contain the 5280 // count of outstanding operands. 5281 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5282 SDNode *N = I++; 5283 checkForCycles(N); 5284 unsigned Degree = N->getNumOperands(); 5285 if (Degree == 0) { 5286 // A node with no uses, add it to the result array immediately. 5287 N->setNodeId(DAGSize++); 5288 allnodes_iterator Q = N; 5289 if (Q != SortedPos) 5290 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5291 assert(SortedPos != AllNodes.end() && "Overran node list"); 5292 ++SortedPos; 5293 } else { 5294 // Temporarily use the Node Id as scratch space for the degree count. 5295 N->setNodeId(Degree); 5296 } 5297 } 5298 5299 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5300 // such that by the time the end is reached all nodes will be sorted. 5301 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5302 SDNode *N = I; 5303 checkForCycles(N); 5304 // N is in sorted position, so all its uses have one less operand 5305 // that needs to be sorted. 5306 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5307 UI != UE; ++UI) { 5308 SDNode *P = *UI; 5309 unsigned Degree = P->getNodeId(); 5310 assert(Degree != 0 && "Invalid node degree"); 5311 --Degree; 5312 if (Degree == 0) { 5313 // All of P's operands are sorted, so P may sorted now. 5314 P->setNodeId(DAGSize++); 5315 if (P != SortedPos) 5316 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5317 assert(SortedPos != AllNodes.end() && "Overran node list"); 5318 ++SortedPos; 5319 } else { 5320 // Update P's outstanding operand count. 5321 P->setNodeId(Degree); 5322 } 5323 } 5324 if (I == SortedPos) { 5325#ifndef NDEBUG 5326 SDNode *S = ++I; 5327 dbgs() << "Overran sorted position:\n"; 5328 S->dumprFull(); 5329#endif 5330 llvm_unreachable(0); 5331 } 5332 } 5333 5334 assert(SortedPos == AllNodes.end() && 5335 "Topological sort incomplete!"); 5336 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5337 "First node in topological sort is not the entry token!"); 5338 assert(AllNodes.front().getNodeId() == 0 && 5339 "First node in topological sort has non-zero id!"); 5340 assert(AllNodes.front().getNumOperands() == 0 && 5341 "First node in topological sort has operands!"); 5342 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5343 "Last node in topologic sort has unexpected id!"); 5344 assert(AllNodes.back().use_empty() && 5345 "Last node in topologic sort has users!"); 5346 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5347 return DAGSize; 5348} 5349 5350/// AssignOrdering - Assign an order to the SDNode. 5351void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5352 assert(SD && "Trying to assign an order to a null node!"); 5353 Ordering->add(SD, Order); 5354} 5355 5356/// GetOrdering - Get the order for the SDNode. 5357unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5358 assert(SD && "Trying to get the order of a null node!"); 5359 return Ordering->getOrder(SD); 5360} 5361 5362/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5363/// value is produced by SD. 5364void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5365 DbgInfo->add(DB, SD, isParameter); 5366 if (SD) 5367 SD->setHasDebugValue(true); 5368} 5369 5370//===----------------------------------------------------------------------===// 5371// SDNode Class 5372//===----------------------------------------------------------------------===// 5373 5374HandleSDNode::~HandleSDNode() { 5375 DropOperands(); 5376} 5377 5378GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5379 EVT VT, int64_t o, unsigned char TF) 5380 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5381 TheGlobal = GA; 5382} 5383 5384MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5385 MachineMemOperand *mmo) 5386 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5387 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5388 MMO->isNonTemporal()); 5389 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5390 assert(isNonTemporal() == MMO->isNonTemporal() && 5391 "Non-temporal encoding error!"); 5392 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5393} 5394 5395MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5396 const SDValue *Ops, unsigned NumOps, EVT memvt, 5397 MachineMemOperand *mmo) 5398 : SDNode(Opc, dl, VTs, Ops, NumOps), 5399 MemoryVT(memvt), MMO(mmo) { 5400 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5401 MMO->isNonTemporal()); 5402 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5403 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5404} 5405 5406/// Profile - Gather unique data for the node. 5407/// 5408void SDNode::Profile(FoldingSetNodeID &ID) const { 5409 AddNodeIDNode(ID, this); 5410} 5411 5412namespace { 5413 struct EVTArray { 5414 std::vector<EVT> VTs; 5415 5416 EVTArray() { 5417 VTs.reserve(MVT::LAST_VALUETYPE); 5418 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5419 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5420 } 5421 }; 5422} 5423 5424static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5425static ManagedStatic<EVTArray> SimpleVTArray; 5426static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5427 5428/// getValueTypeList - Return a pointer to the specified value type. 5429/// 5430const EVT *SDNode::getValueTypeList(EVT VT) { 5431 if (VT.isExtended()) { 5432 sys::SmartScopedLock<true> Lock(*VTMutex); 5433 return &(*EVTs->insert(VT).first); 5434 } else { 5435 assert(VT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE && 5436 "Value type out of range!"); 5437 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5438 } 5439} 5440 5441/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5442/// indicated value. This method ignores uses of other values defined by this 5443/// operation. 5444bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5445 assert(Value < getNumValues() && "Bad value!"); 5446 5447 // TODO: Only iterate over uses of a given value of the node 5448 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5449 if (UI.getUse().getResNo() == Value) { 5450 if (NUses == 0) 5451 return false; 5452 --NUses; 5453 } 5454 } 5455 5456 // Found exactly the right number of uses? 5457 return NUses == 0; 5458} 5459 5460 5461/// hasAnyUseOfValue - Return true if there are any use of the indicated 5462/// value. This method ignores uses of other values defined by this operation. 5463bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5464 assert(Value < getNumValues() && "Bad value!"); 5465 5466 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5467 if (UI.getUse().getResNo() == Value) 5468 return true; 5469 5470 return false; 5471} 5472 5473 5474/// isOnlyUserOf - Return true if this node is the only use of N. 5475/// 5476bool SDNode::isOnlyUserOf(SDNode *N) const { 5477 bool Seen = false; 5478 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5479 SDNode *User = *I; 5480 if (User == this) 5481 Seen = true; 5482 else 5483 return false; 5484 } 5485 5486 return Seen; 5487} 5488 5489/// isOperand - Return true if this node is an operand of N. 5490/// 5491bool SDValue::isOperandOf(SDNode *N) const { 5492 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5493 if (*this == N->getOperand(i)) 5494 return true; 5495 return false; 5496} 5497 5498bool SDNode::isOperandOf(SDNode *N) const { 5499 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5500 if (this == N->OperandList[i].getNode()) 5501 return true; 5502 return false; 5503} 5504 5505/// reachesChainWithoutSideEffects - Return true if this operand (which must 5506/// be a chain) reaches the specified operand without crossing any 5507/// side-effecting instructions. In practice, this looks through token 5508/// factors and non-volatile loads. In order to remain efficient, this only 5509/// looks a couple of nodes in, it does not do an exhaustive search. 5510bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5511 unsigned Depth) const { 5512 if (*this == Dest) return true; 5513 5514 // Don't search too deeply, we just want to be able to see through 5515 // TokenFactor's etc. 5516 if (Depth == 0) return false; 5517 5518 // If this is a token factor, all inputs to the TF happen in parallel. If any 5519 // of the operands of the TF reach dest, then we can do the xform. 5520 if (getOpcode() == ISD::TokenFactor) { 5521 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5522 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5523 return true; 5524 return false; 5525 } 5526 5527 // Loads don't have side effects, look through them. 5528 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5529 if (!Ld->isVolatile()) 5530 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5531 } 5532 return false; 5533} 5534 5535/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5536/// is either an operand of N or it can be reached by traversing up the operands. 5537/// NOTE: this is an expensive method. Use it carefully. 5538bool SDNode::isPredecessorOf(SDNode *N) const { 5539 SmallPtrSet<SDNode *, 32> Visited; 5540 SmallVector<SDNode *, 16> Worklist; 5541 Worklist.push_back(N); 5542 5543 do { 5544 N = Worklist.pop_back_val(); 5545 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5546 SDNode *Op = N->getOperand(i).getNode(); 5547 if (Op == this) 5548 return true; 5549 if (Visited.insert(Op)) 5550 Worklist.push_back(Op); 5551 } 5552 } while (!Worklist.empty()); 5553 5554 return false; 5555} 5556 5557uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5558 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5559 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5560} 5561 5562std::string SDNode::getOperationName(const SelectionDAG *G) const { 5563 switch (getOpcode()) { 5564 default: 5565 if (getOpcode() < ISD::BUILTIN_OP_END) 5566 return "<<Unknown DAG Node>>"; 5567 if (isMachineOpcode()) { 5568 if (G) 5569 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5570 if (getMachineOpcode() < TII->getNumOpcodes()) 5571 return TII->get(getMachineOpcode()).getName(); 5572 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5573 } 5574 if (G) { 5575 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5576 const char *Name = TLI.getTargetNodeName(getOpcode()); 5577 if (Name) return Name; 5578 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5579 } 5580 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5581 5582#ifndef NDEBUG 5583 case ISD::DELETED_NODE: 5584 return "<<Deleted Node!>>"; 5585#endif 5586 case ISD::PREFETCH: return "Prefetch"; 5587 case ISD::MEMBARRIER: return "MemBarrier"; 5588 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5589 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5590 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5591 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5592 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5593 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5594 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5595 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5596 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5597 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5598 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5599 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5600 case ISD::PCMARKER: return "PCMarker"; 5601 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5602 case ISD::SRCVALUE: return "SrcValue"; 5603 case ISD::MDNODE_SDNODE: return "MDNode"; 5604 case ISD::EntryToken: return "EntryToken"; 5605 case ISD::TokenFactor: return "TokenFactor"; 5606 case ISD::AssertSext: return "AssertSext"; 5607 case ISD::AssertZext: return "AssertZext"; 5608 5609 case ISD::BasicBlock: return "BasicBlock"; 5610 case ISD::VALUETYPE: return "ValueType"; 5611 case ISD::Register: return "Register"; 5612 5613 case ISD::Constant: return "Constant"; 5614 case ISD::ConstantFP: return "ConstantFP"; 5615 case ISD::GlobalAddress: return "GlobalAddress"; 5616 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5617 case ISD::FrameIndex: return "FrameIndex"; 5618 case ISD::JumpTable: return "JumpTable"; 5619 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5620 case ISD::RETURNADDR: return "RETURNADDR"; 5621 case ISD::FRAMEADDR: return "FRAMEADDR"; 5622 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5623 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5624 case ISD::LSDAADDR: return "LSDAADDR"; 5625 case ISD::EHSELECTION: return "EHSELECTION"; 5626 case ISD::EH_RETURN: return "EH_RETURN"; 5627 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5628 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5629 case ISD::ConstantPool: return "ConstantPool"; 5630 case ISD::ExternalSymbol: return "ExternalSymbol"; 5631 case ISD::BlockAddress: return "BlockAddress"; 5632 case ISD::INTRINSIC_WO_CHAIN: 5633 case ISD::INTRINSIC_VOID: 5634 case ISD::INTRINSIC_W_CHAIN: { 5635 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5636 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5637 if (IID < Intrinsic::num_intrinsics) 5638 return Intrinsic::getName((Intrinsic::ID)IID); 5639 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5640 return TII->getName(IID); 5641 llvm_unreachable("Invalid intrinsic ID"); 5642 } 5643 5644 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5645 case ISD::TargetConstant: return "TargetConstant"; 5646 case ISD::TargetConstantFP:return "TargetConstantFP"; 5647 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5648 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5649 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5650 case ISD::TargetJumpTable: return "TargetJumpTable"; 5651 case ISD::TargetConstantPool: return "TargetConstantPool"; 5652 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5653 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5654 5655 case ISD::CopyToReg: return "CopyToReg"; 5656 case ISD::CopyFromReg: return "CopyFromReg"; 5657 case ISD::UNDEF: return "undef"; 5658 case ISD::MERGE_VALUES: return "merge_values"; 5659 case ISD::INLINEASM: return "inlineasm"; 5660 case ISD::EH_LABEL: return "eh_label"; 5661 case ISD::HANDLENODE: return "handlenode"; 5662 5663 // Unary operators 5664 case ISD::FABS: return "fabs"; 5665 case ISD::FNEG: return "fneg"; 5666 case ISD::FSQRT: return "fsqrt"; 5667 case ISD::FSIN: return "fsin"; 5668 case ISD::FCOS: return "fcos"; 5669 case ISD::FTRUNC: return "ftrunc"; 5670 case ISD::FFLOOR: return "ffloor"; 5671 case ISD::FCEIL: return "fceil"; 5672 case ISD::FRINT: return "frint"; 5673 case ISD::FNEARBYINT: return "fnearbyint"; 5674 case ISD::FEXP: return "fexp"; 5675 case ISD::FEXP2: return "fexp2"; 5676 case ISD::FLOG: return "flog"; 5677 case ISD::FLOG2: return "flog2"; 5678 case ISD::FLOG10: return "flog10"; 5679 5680 // Binary operators 5681 case ISD::ADD: return "add"; 5682 case ISD::SUB: return "sub"; 5683 case ISD::MUL: return "mul"; 5684 case ISD::MULHU: return "mulhu"; 5685 case ISD::MULHS: return "mulhs"; 5686 case ISD::SDIV: return "sdiv"; 5687 case ISD::UDIV: return "udiv"; 5688 case ISD::SREM: return "srem"; 5689 case ISD::UREM: return "urem"; 5690 case ISD::SMUL_LOHI: return "smul_lohi"; 5691 case ISD::UMUL_LOHI: return "umul_lohi"; 5692 case ISD::SDIVREM: return "sdivrem"; 5693 case ISD::UDIVREM: return "udivrem"; 5694 case ISD::AND: return "and"; 5695 case ISD::OR: return "or"; 5696 case ISD::XOR: return "xor"; 5697 case ISD::SHL: return "shl"; 5698 case ISD::SRA: return "sra"; 5699 case ISD::SRL: return "srl"; 5700 case ISD::ROTL: return "rotl"; 5701 case ISD::ROTR: return "rotr"; 5702 case ISD::FADD: return "fadd"; 5703 case ISD::FSUB: return "fsub"; 5704 case ISD::FMUL: return "fmul"; 5705 case ISD::FDIV: return "fdiv"; 5706 case ISD::FREM: return "frem"; 5707 case ISD::FCOPYSIGN: return "fcopysign"; 5708 case ISD::FGETSIGN: return "fgetsign"; 5709 case ISD::FPOW: return "fpow"; 5710 5711 case ISD::FPOWI: return "fpowi"; 5712 case ISD::SETCC: return "setcc"; 5713 case ISD::VSETCC: return "vsetcc"; 5714 case ISD::SELECT: return "select"; 5715 case ISD::SELECT_CC: return "select_cc"; 5716 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5717 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5718 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5719 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5720 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5721 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5722 case ISD::CARRY_FALSE: return "carry_false"; 5723 case ISD::ADDC: return "addc"; 5724 case ISD::ADDE: return "adde"; 5725 case ISD::SADDO: return "saddo"; 5726 case ISD::UADDO: return "uaddo"; 5727 case ISD::SSUBO: return "ssubo"; 5728 case ISD::USUBO: return "usubo"; 5729 case ISD::SMULO: return "smulo"; 5730 case ISD::UMULO: return "umulo"; 5731 case ISD::SUBC: return "subc"; 5732 case ISD::SUBE: return "sube"; 5733 case ISD::SHL_PARTS: return "shl_parts"; 5734 case ISD::SRA_PARTS: return "sra_parts"; 5735 case ISD::SRL_PARTS: return "srl_parts"; 5736 5737 // Conversion operators. 5738 case ISD::SIGN_EXTEND: return "sign_extend"; 5739 case ISD::ZERO_EXTEND: return "zero_extend"; 5740 case ISD::ANY_EXTEND: return "any_extend"; 5741 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5742 case ISD::TRUNCATE: return "truncate"; 5743 case ISD::FP_ROUND: return "fp_round"; 5744 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5745 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5746 case ISD::FP_EXTEND: return "fp_extend"; 5747 5748 case ISD::SINT_TO_FP: return "sint_to_fp"; 5749 case ISD::UINT_TO_FP: return "uint_to_fp"; 5750 case ISD::FP_TO_SINT: return "fp_to_sint"; 5751 case ISD::FP_TO_UINT: return "fp_to_uint"; 5752 case ISD::BIT_CONVERT: return "bit_convert"; 5753 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5754 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5755 5756 case ISD::CONVERT_RNDSAT: { 5757 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5758 default: llvm_unreachable("Unknown cvt code!"); 5759 case ISD::CVT_FF: return "cvt_ff"; 5760 case ISD::CVT_FS: return "cvt_fs"; 5761 case ISD::CVT_FU: return "cvt_fu"; 5762 case ISD::CVT_SF: return "cvt_sf"; 5763 case ISD::CVT_UF: return "cvt_uf"; 5764 case ISD::CVT_SS: return "cvt_ss"; 5765 case ISD::CVT_SU: return "cvt_su"; 5766 case ISD::CVT_US: return "cvt_us"; 5767 case ISD::CVT_UU: return "cvt_uu"; 5768 } 5769 } 5770 5771 // Control flow instructions 5772 case ISD::BR: return "br"; 5773 case ISD::BRIND: return "brind"; 5774 case ISD::BR_JT: return "br_jt"; 5775 case ISD::BRCOND: return "brcond"; 5776 case ISD::BR_CC: return "br_cc"; 5777 case ISD::CALLSEQ_START: return "callseq_start"; 5778 case ISD::CALLSEQ_END: return "callseq_end"; 5779 5780 // Other operators 5781 case ISD::LOAD: return "load"; 5782 case ISD::STORE: return "store"; 5783 case ISD::VAARG: return "vaarg"; 5784 case ISD::VACOPY: return "vacopy"; 5785 case ISD::VAEND: return "vaend"; 5786 case ISD::VASTART: return "vastart"; 5787 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5788 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5789 case ISD::BUILD_PAIR: return "build_pair"; 5790 case ISD::STACKSAVE: return "stacksave"; 5791 case ISD::STACKRESTORE: return "stackrestore"; 5792 case ISD::TRAP: return "trap"; 5793 5794 // Bit manipulation 5795 case ISD::BSWAP: return "bswap"; 5796 case ISD::CTPOP: return "ctpop"; 5797 case ISD::CTTZ: return "cttz"; 5798 case ISD::CTLZ: return "ctlz"; 5799 5800 // Trampolines 5801 case ISD::TRAMPOLINE: return "trampoline"; 5802 5803 case ISD::CONDCODE: 5804 switch (cast<CondCodeSDNode>(this)->get()) { 5805 default: llvm_unreachable("Unknown setcc condition!"); 5806 case ISD::SETOEQ: return "setoeq"; 5807 case ISD::SETOGT: return "setogt"; 5808 case ISD::SETOGE: return "setoge"; 5809 case ISD::SETOLT: return "setolt"; 5810 case ISD::SETOLE: return "setole"; 5811 case ISD::SETONE: return "setone"; 5812 5813 case ISD::SETO: return "seto"; 5814 case ISD::SETUO: return "setuo"; 5815 case ISD::SETUEQ: return "setue"; 5816 case ISD::SETUGT: return "setugt"; 5817 case ISD::SETUGE: return "setuge"; 5818 case ISD::SETULT: return "setult"; 5819 case ISD::SETULE: return "setule"; 5820 case ISD::SETUNE: return "setune"; 5821 5822 case ISD::SETEQ: return "seteq"; 5823 case ISD::SETGT: return "setgt"; 5824 case ISD::SETGE: return "setge"; 5825 case ISD::SETLT: return "setlt"; 5826 case ISD::SETLE: return "setle"; 5827 case ISD::SETNE: return "setne"; 5828 } 5829 } 5830} 5831 5832const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5833 switch (AM) { 5834 default: 5835 return ""; 5836 case ISD::PRE_INC: 5837 return "<pre-inc>"; 5838 case ISD::PRE_DEC: 5839 return "<pre-dec>"; 5840 case ISD::POST_INC: 5841 return "<post-inc>"; 5842 case ISD::POST_DEC: 5843 return "<post-dec>"; 5844 } 5845} 5846 5847std::string ISD::ArgFlagsTy::getArgFlagsString() { 5848 std::string S = "< "; 5849 5850 if (isZExt()) 5851 S += "zext "; 5852 if (isSExt()) 5853 S += "sext "; 5854 if (isInReg()) 5855 S += "inreg "; 5856 if (isSRet()) 5857 S += "sret "; 5858 if (isByVal()) 5859 S += "byval "; 5860 if (isNest()) 5861 S += "nest "; 5862 if (getByValAlign()) 5863 S += "byval-align:" + utostr(getByValAlign()) + " "; 5864 if (getOrigAlign()) 5865 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5866 if (getByValSize()) 5867 S += "byval-size:" + utostr(getByValSize()) + " "; 5868 return S + ">"; 5869} 5870 5871void SDNode::dump() const { dump(0); } 5872void SDNode::dump(const SelectionDAG *G) const { 5873 print(dbgs(), G); 5874} 5875 5876void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5877 OS << (void*)this << ": "; 5878 5879 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5880 if (i) OS << ","; 5881 if (getValueType(i) == MVT::Other) 5882 OS << "ch"; 5883 else 5884 OS << getValueType(i).getEVTString(); 5885 } 5886 OS << " = " << getOperationName(G); 5887} 5888 5889void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5890 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5891 if (!MN->memoperands_empty()) { 5892 OS << "<"; 5893 OS << "Mem:"; 5894 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5895 e = MN->memoperands_end(); i != e; ++i) { 5896 OS << **i; 5897 if (next(i) != e) 5898 OS << " "; 5899 } 5900 OS << ">"; 5901 } 5902 } else if (const ShuffleVectorSDNode *SVN = 5903 dyn_cast<ShuffleVectorSDNode>(this)) { 5904 OS << "<"; 5905 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5906 int Idx = SVN->getMaskElt(i); 5907 if (i) OS << ","; 5908 if (Idx < 0) 5909 OS << "u"; 5910 else 5911 OS << Idx; 5912 } 5913 OS << ">"; 5914 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5915 OS << '<' << CSDN->getAPIntValue() << '>'; 5916 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5917 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5918 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5919 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5920 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5921 else { 5922 OS << "<APFloat("; 5923 CSDN->getValueAPF().bitcastToAPInt().dump(); 5924 OS << ")>"; 5925 } 5926 } else if (const GlobalAddressSDNode *GADN = 5927 dyn_cast<GlobalAddressSDNode>(this)) { 5928 int64_t offset = GADN->getOffset(); 5929 OS << '<'; 5930 WriteAsOperand(OS, GADN->getGlobal()); 5931 OS << '>'; 5932 if (offset > 0) 5933 OS << " + " << offset; 5934 else 5935 OS << " " << offset; 5936 if (unsigned int TF = GADN->getTargetFlags()) 5937 OS << " [TF=" << TF << ']'; 5938 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5939 OS << "<" << FIDN->getIndex() << ">"; 5940 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5941 OS << "<" << JTDN->getIndex() << ">"; 5942 if (unsigned int TF = JTDN->getTargetFlags()) 5943 OS << " [TF=" << TF << ']'; 5944 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5945 int offset = CP->getOffset(); 5946 if (CP->isMachineConstantPoolEntry()) 5947 OS << "<" << *CP->getMachineCPVal() << ">"; 5948 else 5949 OS << "<" << *CP->getConstVal() << ">"; 5950 if (offset > 0) 5951 OS << " + " << offset; 5952 else 5953 OS << " " << offset; 5954 if (unsigned int TF = CP->getTargetFlags()) 5955 OS << " [TF=" << TF << ']'; 5956 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5957 OS << "<"; 5958 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5959 if (LBB) 5960 OS << LBB->getName() << " "; 5961 OS << (const void*)BBDN->getBasicBlock() << ">"; 5962 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5963 if (G && R->getReg() && 5964 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5965 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5966 } else { 5967 OS << " %reg" << R->getReg(); 5968 } 5969 } else if (const ExternalSymbolSDNode *ES = 5970 dyn_cast<ExternalSymbolSDNode>(this)) { 5971 OS << "'" << ES->getSymbol() << "'"; 5972 if (unsigned int TF = ES->getTargetFlags()) 5973 OS << " [TF=" << TF << ']'; 5974 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5975 if (M->getValue()) 5976 OS << "<" << M->getValue() << ">"; 5977 else 5978 OS << "<null>"; 5979 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5980 if (MD->getMD()) 5981 OS << "<" << MD->getMD() << ">"; 5982 else 5983 OS << "<null>"; 5984 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5985 OS << ":" << N->getVT().getEVTString(); 5986 } 5987 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5988 OS << "<" << *LD->getMemOperand(); 5989 5990 bool doExt = true; 5991 switch (LD->getExtensionType()) { 5992 default: doExt = false; break; 5993 case ISD::EXTLOAD: OS << ", anyext"; break; 5994 case ISD::SEXTLOAD: OS << ", sext"; break; 5995 case ISD::ZEXTLOAD: OS << ", zext"; break; 5996 } 5997 if (doExt) 5998 OS << " from " << LD->getMemoryVT().getEVTString(); 5999 6000 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6001 if (*AM) 6002 OS << ", " << AM; 6003 6004 OS << ">"; 6005 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6006 OS << "<" << *ST->getMemOperand(); 6007 6008 if (ST->isTruncatingStore()) 6009 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6010 6011 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6012 if (*AM) 6013 OS << ", " << AM; 6014 6015 OS << ">"; 6016 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6017 OS << "<" << *M->getMemOperand() << ">"; 6018 } else if (const BlockAddressSDNode *BA = 6019 dyn_cast<BlockAddressSDNode>(this)) { 6020 OS << "<"; 6021 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6022 OS << ", "; 6023 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6024 OS << ">"; 6025 if (unsigned int TF = BA->getTargetFlags()) 6026 OS << " [TF=" << TF << ']'; 6027 } 6028 6029 if (G) 6030 if (unsigned Order = G->GetOrdering(this)) 6031 OS << " [ORD=" << Order << ']'; 6032 6033 if (getNodeId() != -1) 6034 OS << " [ID=" << getNodeId() << ']'; 6035 6036 DebugLoc dl = getDebugLoc(); 6037 if (G && !dl.isUnknown()) { 6038 DIScope 6039 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6040 OS << " dbg:"; 6041 // Omit the directory, since it's usually long and uninteresting. 6042 if (Scope.Verify()) 6043 OS << Scope.getFilename(); 6044 else 6045 OS << "<unknown>"; 6046 OS << ':' << dl.getLine(); 6047 if (dl.getCol() != 0) 6048 OS << ':' << dl.getCol(); 6049 } 6050} 6051 6052void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6053 print_types(OS, G); 6054 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6055 if (i) OS << ", "; else OS << " "; 6056 OS << (void*)getOperand(i).getNode(); 6057 if (unsigned RN = getOperand(i).getResNo()) 6058 OS << ":" << RN; 6059 } 6060 print_details(OS, G); 6061} 6062 6063static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6064 const SelectionDAG *G, unsigned depth, 6065 unsigned indent) 6066{ 6067 if (depth == 0) 6068 return; 6069 6070 OS.indent(indent); 6071 6072 N->print(OS, G); 6073 6074 if (depth < 1) 6075 return; 6076 6077 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6078 OS << '\n'; 6079 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6080 } 6081} 6082 6083void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6084 unsigned depth) const { 6085 printrWithDepthHelper(OS, this, G, depth, 0); 6086} 6087 6088void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6089 // Don't print impossibly deep things. 6090 printrWithDepth(OS, G, 100); 6091} 6092 6093void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6094 printrWithDepth(dbgs(), G, depth); 6095} 6096 6097void SDNode::dumprFull(const SelectionDAG *G) const { 6098 // Don't print impossibly deep things. 6099 dumprWithDepth(G, 100); 6100} 6101 6102static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6103 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6104 if (N->getOperand(i).getNode()->hasOneUse()) 6105 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6106 else 6107 dbgs() << "\n" << std::string(indent+2, ' ') 6108 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6109 6110 6111 dbgs() << "\n"; 6112 dbgs().indent(indent); 6113 N->dump(G); 6114} 6115 6116SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6117 assert(N->getNumValues() == 1 && 6118 "Can't unroll a vector with multiple results!"); 6119 6120 EVT VT = N->getValueType(0); 6121 unsigned NE = VT.getVectorNumElements(); 6122 EVT EltVT = VT.getVectorElementType(); 6123 DebugLoc dl = N->getDebugLoc(); 6124 6125 SmallVector<SDValue, 8> Scalars; 6126 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6127 6128 // If ResNE is 0, fully unroll the vector op. 6129 if (ResNE == 0) 6130 ResNE = NE; 6131 else if (NE > ResNE) 6132 NE = ResNE; 6133 6134 unsigned i; 6135 for (i= 0; i != NE; ++i) { 6136 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6137 SDValue Operand = N->getOperand(j); 6138 EVT OperandVT = Operand.getValueType(); 6139 if (OperandVT.isVector()) { 6140 // A vector operand; extract a single element. 6141 EVT OperandEltVT = OperandVT.getVectorElementType(); 6142 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6143 OperandEltVT, 6144 Operand, 6145 getConstant(i, MVT::i32)); 6146 } else { 6147 // A scalar operand; just use it as is. 6148 Operands[j] = Operand; 6149 } 6150 } 6151 6152 switch (N->getOpcode()) { 6153 default: 6154 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6155 &Operands[0], Operands.size())); 6156 break; 6157 case ISD::SHL: 6158 case ISD::SRA: 6159 case ISD::SRL: 6160 case ISD::ROTL: 6161 case ISD::ROTR: 6162 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6163 getShiftAmountOperand(Operands[1]))); 6164 break; 6165 case ISD::SIGN_EXTEND_INREG: 6166 case ISD::FP_ROUND_INREG: { 6167 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6168 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6169 Operands[0], 6170 getValueType(ExtVT))); 6171 } 6172 } 6173 } 6174 6175 for (; i < ResNE; ++i) 6176 Scalars.push_back(getUNDEF(EltVT)); 6177 6178 return getNode(ISD::BUILD_VECTOR, dl, 6179 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6180 &Scalars[0], Scalars.size()); 6181} 6182 6183 6184/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6185/// location that is 'Dist' units away from the location that the 'Base' load 6186/// is loading from. 6187bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6188 unsigned Bytes, int Dist) const { 6189 if (LD->getChain() != Base->getChain()) 6190 return false; 6191 EVT VT = LD->getValueType(0); 6192 if (VT.getSizeInBits() / 8 != Bytes) 6193 return false; 6194 6195 SDValue Loc = LD->getOperand(1); 6196 SDValue BaseLoc = Base->getOperand(1); 6197 if (Loc.getOpcode() == ISD::FrameIndex) { 6198 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6199 return false; 6200 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6201 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6202 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6203 int FS = MFI->getObjectSize(FI); 6204 int BFS = MFI->getObjectSize(BFI); 6205 if (FS != BFS || FS != (int)Bytes) return false; 6206 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6207 } 6208 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6209 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6210 if (V && (V->getSExtValue() == Dist*Bytes)) 6211 return true; 6212 } 6213 6214 const GlobalValue *GV1 = NULL; 6215 const GlobalValue *GV2 = NULL; 6216 int64_t Offset1 = 0; 6217 int64_t Offset2 = 0; 6218 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6219 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6220 if (isGA1 && isGA2 && GV1 == GV2) 6221 return Offset1 == (Offset2 + Dist*Bytes); 6222 return false; 6223} 6224 6225 6226/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6227/// it cannot be inferred. 6228unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6229 // If this is a GlobalAddress + cst, return the alignment. 6230 const GlobalValue *GV; 6231 int64_t GVOffset = 0; 6232 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6233 // If GV has specified alignment, then use it. Otherwise, use the preferred 6234 // alignment. 6235 unsigned Align = GV->getAlignment(); 6236 if (!Align) { 6237 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6238 if (GVar->hasInitializer()) { 6239 const TargetData *TD = TLI.getTargetData(); 6240 Align = TD->getPreferredAlignment(GVar); 6241 } 6242 } 6243 } 6244 return MinAlign(Align, GVOffset); 6245 } 6246 6247 // If this is a direct reference to a stack slot, use information about the 6248 // stack slot's alignment. 6249 int FrameIdx = 1 << 31; 6250 int64_t FrameOffset = 0; 6251 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6252 FrameIdx = FI->getIndex(); 6253 } else if (Ptr.getOpcode() == ISD::ADD && 6254 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6255 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6256 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6257 FrameOffset = Ptr.getConstantOperandVal(1); 6258 } 6259 6260 if (FrameIdx != (1 << 31)) { 6261 // FIXME: Handle FI+CST. 6262 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6263 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6264 FrameOffset); 6265 if (MFI.isFixedObjectIndex(FrameIdx)) { 6266 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6267 6268 // The alignment of the frame index can be determined from its offset from 6269 // the incoming frame position. If the frame object is at offset 32 and 6270 // the stack is guaranteed to be 16-byte aligned, then we know that the 6271 // object is 16-byte aligned. 6272 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6273 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6274 6275 // Finally, the frame object itself may have a known alignment. Factor 6276 // the alignment + offset into a new alignment. For example, if we know 6277 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6278 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6279 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6280 return std::max(Align, FIInfoAlign); 6281 } 6282 return FIInfoAlign; 6283 } 6284 6285 return 0; 6286} 6287 6288void SelectionDAG::dump() const { 6289 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6290 6291 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6292 I != E; ++I) { 6293 const SDNode *N = I; 6294 if (!N->hasOneUse() && N != getRoot().getNode()) 6295 DumpNodes(N, 2, this); 6296 } 6297 6298 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6299 6300 dbgs() << "\n\n"; 6301} 6302 6303void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6304 print_types(OS, G); 6305 print_details(OS, G); 6306} 6307 6308typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6309static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6310 const SelectionDAG *G, VisitedSDNodeSet &once) { 6311 if (!once.insert(N)) // If we've been here before, return now. 6312 return; 6313 6314 // Dump the current SDNode, but don't end the line yet. 6315 OS << std::string(indent, ' '); 6316 N->printr(OS, G); 6317 6318 // Having printed this SDNode, walk the children: 6319 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6320 const SDNode *child = N->getOperand(i).getNode(); 6321 6322 if (i) OS << ","; 6323 OS << " "; 6324 6325 if (child->getNumOperands() == 0) { 6326 // This child has no grandchildren; print it inline right here. 6327 child->printr(OS, G); 6328 once.insert(child); 6329 } else { // Just the address. FIXME: also print the child's opcode. 6330 OS << (void*)child; 6331 if (unsigned RN = N->getOperand(i).getResNo()) 6332 OS << ":" << RN; 6333 } 6334 } 6335 6336 OS << "\n"; 6337 6338 // Dump children that have grandchildren on their own line(s). 6339 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6340 const SDNode *child = N->getOperand(i).getNode(); 6341 DumpNodesr(OS, child, indent+2, G, once); 6342 } 6343} 6344 6345void SDNode::dumpr() const { 6346 VisitedSDNodeSet once; 6347 DumpNodesr(dbgs(), this, 0, 0, once); 6348} 6349 6350void SDNode::dumpr(const SelectionDAG *G) const { 6351 VisitedSDNodeSet once; 6352 DumpNodesr(dbgs(), this, 0, G, once); 6353} 6354 6355 6356// getAddressSpace - Return the address space this GlobalAddress belongs to. 6357unsigned GlobalAddressSDNode::getAddressSpace() const { 6358 return getGlobal()->getType()->getAddressSpace(); 6359} 6360 6361 6362const Type *ConstantPoolSDNode::getType() const { 6363 if (isMachineConstantPoolEntry()) 6364 return Val.MachineCPVal->getType(); 6365 return Val.ConstVal->getType(); 6366} 6367 6368bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6369 APInt &SplatUndef, 6370 unsigned &SplatBitSize, 6371 bool &HasAnyUndefs, 6372 unsigned MinSplatBits, 6373 bool isBigEndian) { 6374 EVT VT = getValueType(0); 6375 assert(VT.isVector() && "Expected a vector type"); 6376 unsigned sz = VT.getSizeInBits(); 6377 if (MinSplatBits > sz) 6378 return false; 6379 6380 SplatValue = APInt(sz, 0); 6381 SplatUndef = APInt(sz, 0); 6382 6383 // Get the bits. Bits with undefined values (when the corresponding element 6384 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6385 // in SplatValue. If any of the values are not constant, give up and return 6386 // false. 6387 unsigned int nOps = getNumOperands(); 6388 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6389 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6390 6391 for (unsigned j = 0; j < nOps; ++j) { 6392 unsigned i = isBigEndian ? nOps-1-j : j; 6393 SDValue OpVal = getOperand(i); 6394 unsigned BitPos = j * EltBitSize; 6395 6396 if (OpVal.getOpcode() == ISD::UNDEF) 6397 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6398 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6399 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6400 zextOrTrunc(sz) << BitPos; 6401 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6402 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6403 else 6404 return false; 6405 } 6406 6407 // The build_vector is all constants or undefs. Find the smallest element 6408 // size that splats the vector. 6409 6410 HasAnyUndefs = (SplatUndef != 0); 6411 while (sz > 8) { 6412 6413 unsigned HalfSize = sz / 2; 6414 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6415 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6416 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6417 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6418 6419 // If the two halves do not match (ignoring undef bits), stop here. 6420 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6421 MinSplatBits > HalfSize) 6422 break; 6423 6424 SplatValue = HighValue | LowValue; 6425 SplatUndef = HighUndef & LowUndef; 6426 6427 sz = HalfSize; 6428 } 6429 6430 SplatBitSize = sz; 6431 return true; 6432} 6433 6434bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6435 // Find the first non-undef value in the shuffle mask. 6436 unsigned i, e; 6437 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6438 /* search */; 6439 6440 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6441 6442 // Make sure all remaining elements are either undef or the same as the first 6443 // non-undef value. 6444 for (int Idx = Mask[i]; i != e; ++i) 6445 if (Mask[i] >= 0 && Mask[i] != Idx) 6446 return false; 6447 return true; 6448} 6449 6450#ifdef XDEBUG 6451static void checkForCyclesHelper(const SDNode *N, 6452 SmallPtrSet<const SDNode*, 32> &Visited, 6453 SmallPtrSet<const SDNode*, 32> &Checked) { 6454 // If this node has already been checked, don't check it again. 6455 if (Checked.count(N)) 6456 return; 6457 6458 // If a node has already been visited on this depth-first walk, reject it as 6459 // a cycle. 6460 if (!Visited.insert(N)) { 6461 dbgs() << "Offending node:\n"; 6462 N->dumprFull(); 6463 errs() << "Detected cycle in SelectionDAG\n"; 6464 abort(); 6465 } 6466 6467 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6468 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6469 6470 Checked.insert(N); 6471 Visited.erase(N); 6472} 6473#endif 6474 6475void llvm::checkForCycles(const llvm::SDNode *N) { 6476#ifdef XDEBUG 6477 assert(N && "Checking nonexistant SDNode"); 6478 SmallPtrSet<const SDNode*, 32> visited; 6479 SmallPtrSet<const SDNode*, 32> checked; 6480 checkForCyclesHelper(N, visited, checked); 6481#endif 6482} 6483 6484void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6485 checkForCycles(DAG->getRoot().getNode()); 6486} 6487