SelectionDAG.cpp revision cc751bb99ca868467bb9676af351bbdc29873fff
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetFrameInfo.h" 35#include "llvm/Target/TargetLowering.h" 36#include "llvm/Target/TargetOptions.h" 37#include "llvm/Target/TargetInstrInfo.h" 38#include "llvm/Target/TargetIntrinsicInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "llvm/Support/CommandLine.h" 41#include "llvm/Support/Debug.h" 42#include "llvm/Support/ErrorHandling.h" 43#include "llvm/Support/ManagedStatic.h" 44#include "llvm/Support/MathExtras.h" 45#include "llvm/Support/raw_ostream.h" 46#include "llvm/System/Mutex.h" 47#include "llvm/ADT/SetVector.h" 48#include "llvm/ADT/SmallPtrSet.h" 49#include "llvm/ADT/SmallSet.h" 50#include "llvm/ADT/SmallVector.h" 51#include "llvm/ADT/StringExtras.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 64 switch (VT.getSimpleVT().SimpleTy) { 65 default: llvm_unreachable("Unknown FP format"); 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 75 76//===----------------------------------------------------------------------===// 77// ConstantFPSDNode Class 78//===----------------------------------------------------------------------===// 79 80/// isExactlyValue - We don't rely on operator== working on double values, as 81/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 82/// As such, this method can be used to do an exact bit-for-bit comparison of 83/// two floating point values. 84bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 85 return getValueAPF().bitwiseIsEqual(V); 86} 87 88bool ConstantFPSDNode::isValueValidForType(EVT VT, 89 const APFloat& Val) { 90 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 91 92 // PPC long double cannot be converted to any other type. 93 if (VT == MVT::ppcf128 || 94 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 95 return false; 96 97 // convert modifies in place, so make a copy. 98 APFloat Val2 = APFloat(Val); 99 bool losesInfo; 100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 101 &losesInfo); 102 return !losesInfo; 103} 104 105//===----------------------------------------------------------------------===// 106// ISD Namespace 107//===----------------------------------------------------------------------===// 108 109/// isBuildVectorAllOnes - Return true if the specified node is a 110/// BUILD_VECTOR where all of the elements are ~0 or undef. 111bool ISD::isBuildVectorAllOnes(const SDNode *N) { 112 // Look through a bit convert. 113 if (N->getOpcode() == ISD::BIT_CONVERT) 114 N = N->getOperand(0).getNode(); 115 116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 117 118 unsigned i = 0, e = N->getNumOperands(); 119 120 // Skip over all of the undef values. 121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 122 ++i; 123 124 // Do not accept an all-undef vector. 125 if (i == e) return false; 126 127 // Do not accept build_vectors that aren't all constants or which have non-~0 128 // elements. 129 SDValue NotZero = N->getOperand(i); 130 if (isa<ConstantSDNode>(NotZero)) { 131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 132 return false; 133 } else if (isa<ConstantFPSDNode>(NotZero)) { 134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 135 bitcastToAPInt().isAllOnesValue()) 136 return false; 137 } else 138 return false; 139 140 // Okay, we have at least one ~0 value, check to see if the rest match or are 141 // undefs. 142 for (++i; i != e; ++i) 143 if (N->getOperand(i) != NotZero && 144 N->getOperand(i).getOpcode() != ISD::UNDEF) 145 return false; 146 return true; 147} 148 149 150/// isBuildVectorAllZeros - Return true if the specified node is a 151/// BUILD_VECTOR where all of the elements are 0 or undef. 152bool ISD::isBuildVectorAllZeros(const SDNode *N) { 153 // Look through a bit convert. 154 if (N->getOpcode() == ISD::BIT_CONVERT) 155 N = N->getOperand(0).getNode(); 156 157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 158 159 unsigned i = 0, e = N->getNumOperands(); 160 161 // Skip over all of the undef values. 162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 163 ++i; 164 165 // Do not accept an all-undef vector. 166 if (i == e) return false; 167 168 // Do not accept build_vectors that aren't all constants or which have non-0 169 // elements. 170 SDValue Zero = N->getOperand(i); 171 if (isa<ConstantSDNode>(Zero)) { 172 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 173 return false; 174 } else if (isa<ConstantFPSDNode>(Zero)) { 175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 176 return false; 177 } else 178 return false; 179 180 // Okay, we have at least one 0 value, check to see if the rest match or are 181 // undefs. 182 for (++i; i != e; ++i) 183 if (N->getOperand(i) != Zero && 184 N->getOperand(i).getOpcode() != ISD::UNDEF) 185 return false; 186 return true; 187} 188 189/// isScalarToVector - Return true if the specified node is a 190/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 191/// element is not an undef. 192bool ISD::isScalarToVector(const SDNode *N) { 193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 194 return true; 195 196 if (N->getOpcode() != ISD::BUILD_VECTOR) 197 return false; 198 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 199 return false; 200 unsigned NumElems = N->getNumOperands(); 201 for (unsigned i = 1; i < NumElems; ++i) { 202 SDValue V = N->getOperand(i); 203 if (V.getOpcode() != ISD::UNDEF) 204 return false; 205 } 206 return true; 207} 208 209/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 210/// when given the operation for (X op Y). 211ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 212 // To perform this operation, we just need to swap the L and G bits of the 213 // operation. 214 unsigned OldL = (Operation >> 2) & 1; 215 unsigned OldG = (Operation >> 1) & 1; 216 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 217 (OldL << 1) | // New G bit 218 (OldG << 2)); // New L bit. 219} 220 221/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 222/// 'op' is a valid SetCC operation. 223ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 224 unsigned Operation = Op; 225 if (isInteger) 226 Operation ^= 7; // Flip L, G, E bits, but not U. 227 else 228 Operation ^= 15; // Flip all of the condition bits. 229 230 if (Operation > ISD::SETTRUE2) 231 Operation &= ~8; // Don't let N and U bits get set. 232 233 return ISD::CondCode(Operation); 234} 235 236 237/// isSignedOp - For an integer comparison, return 1 if the comparison is a 238/// signed operation and 2 if the result is an unsigned comparison. Return zero 239/// if the operation does not depend on the sign of the input (setne and seteq). 240static int isSignedOp(ISD::CondCode Opcode) { 241 switch (Opcode) { 242 default: llvm_unreachable("Illegal integer setcc operation!"); 243 case ISD::SETEQ: 244 case ISD::SETNE: return 0; 245 case ISD::SETLT: 246 case ISD::SETLE: 247 case ISD::SETGT: 248 case ISD::SETGE: return 1; 249 case ISD::SETULT: 250 case ISD::SETULE: 251 case ISD::SETUGT: 252 case ISD::SETUGE: return 2; 253 } 254} 255 256/// getSetCCOrOperation - Return the result of a logical OR between different 257/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 258/// returns SETCC_INVALID if it is not possible to represent the resultant 259/// comparison. 260ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 261 bool isInteger) { 262 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 263 // Cannot fold a signed integer setcc with an unsigned integer setcc. 264 return ISD::SETCC_INVALID; 265 266 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 267 268 // If the N and U bits get set then the resultant comparison DOES suddenly 269 // care about orderedness, and is true when ordered. 270 if (Op > ISD::SETTRUE2) 271 Op &= ~16; // Clear the U bit if the N bit is set. 272 273 // Canonicalize illegal integer setcc's. 274 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 275 Op = ISD::SETNE; 276 277 return ISD::CondCode(Op); 278} 279 280/// getSetCCAndOperation - Return the result of a logical AND between different 281/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 282/// function returns zero if it is not possible to represent the resultant 283/// comparison. 284ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 285 bool isInteger) { 286 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 287 // Cannot fold a signed setcc with an unsigned setcc. 288 return ISD::SETCC_INVALID; 289 290 // Combine all of the condition bits. 291 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 292 293 // Canonicalize illegal integer setcc's. 294 if (isInteger) { 295 switch (Result) { 296 default: break; 297 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 298 case ISD::SETOEQ: // SETEQ & SETU[LG]E 299 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 300 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 301 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 302 } 303 } 304 305 return Result; 306} 307 308//===----------------------------------------------------------------------===// 309// SDNode Profile Support 310//===----------------------------------------------------------------------===// 311 312/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 313/// 314static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 315 ID.AddInteger(OpC); 316} 317 318/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 319/// solely with their pointer. 320static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 321 ID.AddPointer(VTList.VTs); 322} 323 324/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 325/// 326static void AddNodeIDOperands(FoldingSetNodeID &ID, 327 const SDValue *Ops, unsigned NumOps) { 328 for (; NumOps; --NumOps, ++Ops) { 329 ID.AddPointer(Ops->getNode()); 330 ID.AddInteger(Ops->getResNo()); 331 } 332} 333 334/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 335/// 336static void AddNodeIDOperands(FoldingSetNodeID &ID, 337 const SDUse *Ops, unsigned NumOps) { 338 for (; NumOps; --NumOps, ++Ops) { 339 ID.AddPointer(Ops->getNode()); 340 ID.AddInteger(Ops->getResNo()); 341 } 342} 343 344static void AddNodeIDNode(FoldingSetNodeID &ID, 345 unsigned short OpC, SDVTList VTList, 346 const SDValue *OpList, unsigned N) { 347 AddNodeIDOpcode(ID, OpC); 348 AddNodeIDValueTypes(ID, VTList); 349 AddNodeIDOperands(ID, OpList, N); 350} 351 352/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 353/// the NodeID data. 354static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 355 switch (N->getOpcode()) { 356 case ISD::TargetExternalSymbol: 357 case ISD::ExternalSymbol: 358 llvm_unreachable("Should only be used on nodes with operands"); 359 default: break; // Normal nodes don't need extra info. 360 case ISD::TargetConstant: 361 case ISD::Constant: 362 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 363 break; 364 case ISD::TargetConstantFP: 365 case ISD::ConstantFP: { 366 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 367 break; 368 } 369 case ISD::TargetGlobalAddress: 370 case ISD::GlobalAddress: 371 case ISD::TargetGlobalTLSAddress: 372 case ISD::GlobalTLSAddress: { 373 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 374 ID.AddPointer(GA->getGlobal()); 375 ID.AddInteger(GA->getOffset()); 376 ID.AddInteger(GA->getTargetFlags()); 377 break; 378 } 379 case ISD::BasicBlock: 380 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 381 break; 382 case ISD::Register: 383 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 384 break; 385 386 case ISD::SRCVALUE: 387 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 388 break; 389 case ISD::FrameIndex: 390 case ISD::TargetFrameIndex: 391 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 392 break; 393 case ISD::JumpTable: 394 case ISD::TargetJumpTable: 395 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 396 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 397 break; 398 case ISD::ConstantPool: 399 case ISD::TargetConstantPool: { 400 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 401 ID.AddInteger(CP->getAlignment()); 402 ID.AddInteger(CP->getOffset()); 403 if (CP->isMachineConstantPoolEntry()) 404 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 405 else 406 ID.AddPointer(CP->getConstVal()); 407 ID.AddInteger(CP->getTargetFlags()); 408 break; 409 } 410 case ISD::LOAD: { 411 const LoadSDNode *LD = cast<LoadSDNode>(N); 412 ID.AddInteger(LD->getMemoryVT().getRawBits()); 413 ID.AddInteger(LD->getRawSubclassData()); 414 break; 415 } 416 case ISD::STORE: { 417 const StoreSDNode *ST = cast<StoreSDNode>(N); 418 ID.AddInteger(ST->getMemoryVT().getRawBits()); 419 ID.AddInteger(ST->getRawSubclassData()); 420 break; 421 } 422 case ISD::ATOMIC_CMP_SWAP: 423 case ISD::ATOMIC_SWAP: 424 case ISD::ATOMIC_LOAD_ADD: 425 case ISD::ATOMIC_LOAD_SUB: 426 case ISD::ATOMIC_LOAD_AND: 427 case ISD::ATOMIC_LOAD_OR: 428 case ISD::ATOMIC_LOAD_XOR: 429 case ISD::ATOMIC_LOAD_NAND: 430 case ISD::ATOMIC_LOAD_MIN: 431 case ISD::ATOMIC_LOAD_MAX: 432 case ISD::ATOMIC_LOAD_UMIN: 433 case ISD::ATOMIC_LOAD_UMAX: { 434 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 435 ID.AddInteger(AT->getMemoryVT().getRawBits()); 436 ID.AddInteger(AT->getRawSubclassData()); 437 break; 438 } 439 case ISD::VECTOR_SHUFFLE: { 440 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 441 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 442 i != e; ++i) 443 ID.AddInteger(SVN->getMaskElt(i)); 444 break; 445 } 446 case ISD::TargetBlockAddress: 447 case ISD::BlockAddress: { 448 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 449 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 450 break; 451 } 452 } // end switch (N->getOpcode()) 453} 454 455/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 456/// data. 457static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 458 AddNodeIDOpcode(ID, N->getOpcode()); 459 // Add the return value info. 460 AddNodeIDValueTypes(ID, N->getVTList()); 461 // Add the operand info. 462 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 463 464 // Handle SDNode leafs with special info. 465 AddNodeIDCustom(ID, N); 466} 467 468/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 469/// the CSE map that carries volatility, temporalness, indexing mode, and 470/// extension/truncation information. 471/// 472static inline unsigned 473encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 474 bool isNonTemporal) { 475 assert((ConvType & 3) == ConvType && 476 "ConvType may not require more than 2 bits!"); 477 assert((AM & 7) == AM && 478 "AM may not require more than 3 bits!"); 479 return ConvType | 480 (AM << 2) | 481 (isVolatile << 5) | 482 (isNonTemporal << 6); 483} 484 485//===----------------------------------------------------------------------===// 486// SelectionDAG Class 487//===----------------------------------------------------------------------===// 488 489/// doNotCSE - Return true if CSE should not be performed for this node. 490static bool doNotCSE(SDNode *N) { 491 if (N->getValueType(0) == MVT::Flag) 492 return true; // Never CSE anything that produces a flag. 493 494 switch (N->getOpcode()) { 495 default: break; 496 case ISD::HANDLENODE: 497 case ISD::EH_LABEL: 498 return true; // Never CSE these nodes. 499 } 500 501 // Check that remaining values produced are not flags. 502 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 503 if (N->getValueType(i) == MVT::Flag) 504 return true; // Never CSE anything that produces a flag. 505 506 return false; 507} 508 509/// RemoveDeadNodes - This method deletes all unreachable nodes in the 510/// SelectionDAG. 511void SelectionDAG::RemoveDeadNodes() { 512 // Create a dummy node (which is not added to allnodes), that adds a reference 513 // to the root node, preventing it from being deleted. 514 HandleSDNode Dummy(getRoot()); 515 516 SmallVector<SDNode*, 128> DeadNodes; 517 518 // Add all obviously-dead nodes to the DeadNodes worklist. 519 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 520 if (I->use_empty()) 521 DeadNodes.push_back(I); 522 523 RemoveDeadNodes(DeadNodes); 524 525 // If the root changed (e.g. it was a dead load, update the root). 526 setRoot(Dummy.getValue()); 527} 528 529/// RemoveDeadNodes - This method deletes the unreachable nodes in the 530/// given list, and any nodes that become unreachable as a result. 531void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 532 DAGUpdateListener *UpdateListener) { 533 534 // Process the worklist, deleting the nodes and adding their uses to the 535 // worklist. 536 while (!DeadNodes.empty()) { 537 SDNode *N = DeadNodes.pop_back_val(); 538 539 if (UpdateListener) 540 UpdateListener->NodeDeleted(N, 0); 541 542 // Take the node out of the appropriate CSE map. 543 RemoveNodeFromCSEMaps(N); 544 545 // Next, brutally remove the operand list. This is safe to do, as there are 546 // no cycles in the graph. 547 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 548 SDUse &Use = *I++; 549 SDNode *Operand = Use.getNode(); 550 Use.set(SDValue()); 551 552 // Now that we removed this operand, see if there are no uses of it left. 553 if (Operand->use_empty()) 554 DeadNodes.push_back(Operand); 555 } 556 557 DeallocateNode(N); 558 } 559} 560 561void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 562 SmallVector<SDNode*, 16> DeadNodes(1, N); 563 RemoveDeadNodes(DeadNodes, UpdateListener); 564} 565 566void SelectionDAG::DeleteNode(SDNode *N) { 567 // First take this out of the appropriate CSE map. 568 RemoveNodeFromCSEMaps(N); 569 570 // Finally, remove uses due to operands of this node, remove from the 571 // AllNodes list, and delete the node. 572 DeleteNodeNotInCSEMaps(N); 573} 574 575void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 576 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 577 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 578 579 // Drop all of the operands and decrement used node's use counts. 580 N->DropOperands(); 581 582 DeallocateNode(N); 583} 584 585void SelectionDAG::DeallocateNode(SDNode *N) { 586 if (N->OperandsNeedDelete) 587 delete[] N->OperandList; 588 589 // Set the opcode to DELETED_NODE to help catch bugs when node 590 // memory is reallocated. 591 N->NodeType = ISD::DELETED_NODE; 592 593 NodeAllocator.Deallocate(AllNodes.remove(N)); 594 595 // Remove the ordering of this node. 596 Ordering->remove(N); 597 598 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 599 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 600 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 601 DbgVals[i]->setIsInvalidated(); 602} 603 604/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 605/// correspond to it. This is useful when we're about to delete or repurpose 606/// the node. We don't want future request for structurally identical nodes 607/// to return N anymore. 608bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 609 bool Erased = false; 610 switch (N->getOpcode()) { 611 case ISD::EntryToken: 612 llvm_unreachable("EntryToken should not be in CSEMaps!"); 613 return false; 614 case ISD::HANDLENODE: return false; // noop. 615 case ISD::CONDCODE: 616 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 617 "Cond code doesn't exist!"); 618 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 619 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 620 break; 621 case ISD::ExternalSymbol: 622 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 623 break; 624 case ISD::TargetExternalSymbol: { 625 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 626 Erased = TargetExternalSymbols.erase( 627 std::pair<std::string,unsigned char>(ESN->getSymbol(), 628 ESN->getTargetFlags())); 629 break; 630 } 631 case ISD::VALUETYPE: { 632 EVT VT = cast<VTSDNode>(N)->getVT(); 633 if (VT.isExtended()) { 634 Erased = ExtendedValueTypeNodes.erase(VT); 635 } else { 636 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 637 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 638 } 639 break; 640 } 641 default: 642 // Remove it from the CSE Map. 643 Erased = CSEMap.RemoveNode(N); 644 break; 645 } 646#ifndef NDEBUG 647 // Verify that the node was actually in one of the CSE maps, unless it has a 648 // flag result (which cannot be CSE'd) or is one of the special cases that are 649 // not subject to CSE. 650 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 651 !N->isMachineOpcode() && !doNotCSE(N)) { 652 N->dump(this); 653 dbgs() << "\n"; 654 llvm_unreachable("Node is not in map!"); 655 } 656#endif 657 return Erased; 658} 659 660/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 661/// maps and modified in place. Add it back to the CSE maps, unless an identical 662/// node already exists, in which case transfer all its users to the existing 663/// node. This transfer can potentially trigger recursive merging. 664/// 665void 666SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 667 DAGUpdateListener *UpdateListener) { 668 // For node types that aren't CSE'd, just act as if no identical node 669 // already exists. 670 if (!doNotCSE(N)) { 671 SDNode *Existing = CSEMap.GetOrInsertNode(N); 672 if (Existing != N) { 673 // If there was already an existing matching node, use ReplaceAllUsesWith 674 // to replace the dead one with the existing one. This can cause 675 // recursive merging of other unrelated nodes down the line. 676 ReplaceAllUsesWith(N, Existing, UpdateListener); 677 678 // N is now dead. Inform the listener if it exists and delete it. 679 if (UpdateListener) 680 UpdateListener->NodeDeleted(N, Existing); 681 DeleteNodeNotInCSEMaps(N); 682 return; 683 } 684 } 685 686 // If the node doesn't already exist, we updated it. Inform a listener if 687 // it exists. 688 if (UpdateListener) 689 UpdateListener->NodeUpdated(N); 690} 691 692/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 693/// were replaced with those specified. If this node is never memoized, 694/// return null, otherwise return a pointer to the slot it would take. If a 695/// node already exists with these operands, the slot will be non-null. 696SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 697 void *&InsertPos) { 698 if (doNotCSE(N)) 699 return 0; 700 701 SDValue Ops[] = { Op }; 702 FoldingSetNodeID ID; 703 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 704 AddNodeIDCustom(ID, N); 705 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 706 return Node; 707} 708 709/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 710/// were replaced with those specified. If this node is never memoized, 711/// return null, otherwise return a pointer to the slot it would take. If a 712/// node already exists with these operands, the slot will be non-null. 713SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 714 SDValue Op1, SDValue Op2, 715 void *&InsertPos) { 716 if (doNotCSE(N)) 717 return 0; 718 719 SDValue Ops[] = { Op1, Op2 }; 720 FoldingSetNodeID ID; 721 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 722 AddNodeIDCustom(ID, N); 723 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 724 return Node; 725} 726 727 728/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 729/// were replaced with those specified. If this node is never memoized, 730/// return null, otherwise return a pointer to the slot it would take. If a 731/// node already exists with these operands, the slot will be non-null. 732SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 733 const SDValue *Ops,unsigned NumOps, 734 void *&InsertPos) { 735 if (doNotCSE(N)) 736 return 0; 737 738 FoldingSetNodeID ID; 739 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 740 AddNodeIDCustom(ID, N); 741 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 742 return Node; 743} 744 745/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 746void SelectionDAG::VerifyNode(SDNode *N) { 747 switch (N->getOpcode()) { 748 default: 749 break; 750 case ISD::BUILD_PAIR: { 751 EVT VT = N->getValueType(0); 752 assert(N->getNumValues() == 1 && "Too many results!"); 753 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 754 "Wrong return type!"); 755 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 756 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 757 "Mismatched operand types!"); 758 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 759 "Wrong operand type!"); 760 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 761 "Wrong return type size"); 762 break; 763 } 764 case ISD::BUILD_VECTOR: { 765 assert(N->getNumValues() == 1 && "Too many results!"); 766 assert(N->getValueType(0).isVector() && "Wrong return type!"); 767 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 768 "Wrong number of operands!"); 769 EVT EltVT = N->getValueType(0).getVectorElementType(); 770 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 771 assert((I->getValueType() == EltVT || 772 (EltVT.isInteger() && I->getValueType().isInteger() && 773 EltVT.bitsLE(I->getValueType()))) && 774 "Wrong operand type!"); 775 break; 776 } 777 } 778} 779 780/// getEVTAlignment - Compute the default alignment value for the 781/// given type. 782/// 783unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 784 const Type *Ty = VT == MVT::iPTR ? 785 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 786 VT.getTypeForEVT(*getContext()); 787 788 return TLI.getTargetData()->getABITypeAlignment(Ty); 789} 790 791// EntryNode could meaningfully have debug info if we can find it... 792SelectionDAG::SelectionDAG(const TargetMachine &tm, FunctionLoweringInfo &fli) 793 : TM(tm), TLI(*tm.getTargetLowering()), FLI(fli), 794 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 795 Root(getEntryNode()), Ordering(0) { 796 AllNodes.push_back(&EntryNode); 797 Ordering = new SDNodeOrdering(); 798 DbgInfo = new SDDbgInfo(); 799} 800 801void SelectionDAG::init(MachineFunction &mf) { 802 MF = &mf; 803 Context = &mf.getFunction()->getContext(); 804} 805 806SelectionDAG::~SelectionDAG() { 807 allnodes_clear(); 808 delete Ordering; 809 DbgInfo->clear(); 810 delete DbgInfo; 811} 812 813void SelectionDAG::allnodes_clear() { 814 assert(&*AllNodes.begin() == &EntryNode); 815 AllNodes.remove(AllNodes.begin()); 816 while (!AllNodes.empty()) 817 DeallocateNode(AllNodes.begin()); 818} 819 820void SelectionDAG::clear() { 821 allnodes_clear(); 822 OperandAllocator.Reset(); 823 CSEMap.clear(); 824 825 ExtendedValueTypeNodes.clear(); 826 ExternalSymbols.clear(); 827 TargetExternalSymbols.clear(); 828 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 829 static_cast<CondCodeSDNode*>(0)); 830 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 831 static_cast<SDNode*>(0)); 832 833 EntryNode.UseList = 0; 834 AllNodes.push_back(&EntryNode); 835 Root = getEntryNode(); 836 delete Ordering; 837 Ordering = new SDNodeOrdering(); 838 DbgInfo->clear(); 839 delete DbgInfo; 840 DbgInfo = new SDDbgInfo(); 841} 842 843SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 844 return VT.bitsGT(Op.getValueType()) ? 845 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 846 getNode(ISD::TRUNCATE, DL, VT, Op); 847} 848 849SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 850 return VT.bitsGT(Op.getValueType()) ? 851 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 852 getNode(ISD::TRUNCATE, DL, VT, Op); 853} 854 855SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 856 assert(!VT.isVector() && 857 "getZeroExtendInReg should use the vector element type instead of " 858 "the vector type!"); 859 if (Op.getValueType() == VT) return Op; 860 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 861 APInt Imm = APInt::getLowBitsSet(BitWidth, 862 VT.getSizeInBits()); 863 return getNode(ISD::AND, DL, Op.getValueType(), Op, 864 getConstant(Imm, Op.getValueType())); 865} 866 867/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 868/// 869SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 870 EVT EltVT = VT.getScalarType(); 871 SDValue NegOne = 872 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 873 return getNode(ISD::XOR, DL, VT, Val, NegOne); 874} 875 876SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 877 EVT EltVT = VT.getScalarType(); 878 assert((EltVT.getSizeInBits() >= 64 || 879 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 880 "getConstant with a uint64_t value that doesn't fit in the type!"); 881 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 882} 883 884SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 885 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 886} 887 888SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 889 assert(VT.isInteger() && "Cannot create FP integer constant!"); 890 891 EVT EltVT = VT.getScalarType(); 892 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 893 "APInt size does not match type size!"); 894 895 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 896 FoldingSetNodeID ID; 897 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 898 ID.AddPointer(&Val); 899 void *IP = 0; 900 SDNode *N = NULL; 901 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 902 if (!VT.isVector()) 903 return SDValue(N, 0); 904 905 if (!N) { 906 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 907 CSEMap.InsertNode(N, IP); 908 AllNodes.push_back(N); 909 } 910 911 SDValue Result(N, 0); 912 if (VT.isVector()) { 913 SmallVector<SDValue, 8> Ops; 914 Ops.assign(VT.getVectorNumElements(), Result); 915 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 916 } 917 return Result; 918} 919 920SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 921 return getConstant(Val, TLI.getPointerTy(), isTarget); 922} 923 924 925SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 926 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 927} 928 929SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 930 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 931 932 EVT EltVT = VT.getScalarType(); 933 934 // Do the map lookup using the actual bit pattern for the floating point 935 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 936 // we don't have issues with SNANs. 937 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 938 FoldingSetNodeID ID; 939 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 940 ID.AddPointer(&V); 941 void *IP = 0; 942 SDNode *N = NULL; 943 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 944 if (!VT.isVector()) 945 return SDValue(N, 0); 946 947 if (!N) { 948 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 949 CSEMap.InsertNode(N, IP); 950 AllNodes.push_back(N); 951 } 952 953 SDValue Result(N, 0); 954 if (VT.isVector()) { 955 SmallVector<SDValue, 8> Ops; 956 Ops.assign(VT.getVectorNumElements(), Result); 957 // FIXME DebugLoc info might be appropriate here 958 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 959 } 960 return Result; 961} 962 963SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 964 EVT EltVT = VT.getScalarType(); 965 if (EltVT==MVT::f32) 966 return getConstantFP(APFloat((float)Val), VT, isTarget); 967 else 968 return getConstantFP(APFloat(Val), VT, isTarget); 969} 970 971SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 972 EVT VT, int64_t Offset, 973 bool isTargetGA, 974 unsigned char TargetFlags) { 975 assert((TargetFlags == 0 || isTargetGA) && 976 "Cannot set target flags on target-independent globals"); 977 978 // Truncate (with sign-extension) the offset value to the pointer size. 979 EVT PTy = TLI.getPointerTy(); 980 unsigned BitWidth = PTy.getSizeInBits(); 981 if (BitWidth < 64) 982 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 983 984 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 985 if (!GVar) { 986 // If GV is an alias then use the aliasee for determining thread-localness. 987 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 988 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 989 } 990 991 unsigned Opc; 992 if (GVar && GVar->isThreadLocal()) 993 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 994 else 995 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 996 997 FoldingSetNodeID ID; 998 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 999 ID.AddPointer(GV); 1000 ID.AddInteger(Offset); 1001 ID.AddInteger(TargetFlags); 1002 void *IP = 0; 1003 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1004 return SDValue(E, 0); 1005 1006 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1007 Offset, TargetFlags); 1008 CSEMap.InsertNode(N, IP); 1009 AllNodes.push_back(N); 1010 return SDValue(N, 0); 1011} 1012 1013SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1014 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1015 FoldingSetNodeID ID; 1016 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1017 ID.AddInteger(FI); 1018 void *IP = 0; 1019 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1020 return SDValue(E, 0); 1021 1022 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1023 CSEMap.InsertNode(N, IP); 1024 AllNodes.push_back(N); 1025 return SDValue(N, 0); 1026} 1027 1028SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1029 unsigned char TargetFlags) { 1030 assert((TargetFlags == 0 || isTarget) && 1031 "Cannot set target flags on target-independent jump tables"); 1032 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1033 FoldingSetNodeID ID; 1034 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1035 ID.AddInteger(JTI); 1036 ID.AddInteger(TargetFlags); 1037 void *IP = 0; 1038 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1039 return SDValue(E, 0); 1040 1041 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1042 TargetFlags); 1043 CSEMap.InsertNode(N, IP); 1044 AllNodes.push_back(N); 1045 return SDValue(N, 0); 1046} 1047 1048SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1049 unsigned Alignment, int Offset, 1050 bool isTarget, 1051 unsigned char TargetFlags) { 1052 assert((TargetFlags == 0 || isTarget) && 1053 "Cannot set target flags on target-independent globals"); 1054 if (Alignment == 0) 1055 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1056 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1057 FoldingSetNodeID ID; 1058 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1059 ID.AddInteger(Alignment); 1060 ID.AddInteger(Offset); 1061 ID.AddPointer(C); 1062 ID.AddInteger(TargetFlags); 1063 void *IP = 0; 1064 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1065 return SDValue(E, 0); 1066 1067 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1068 Alignment, TargetFlags); 1069 CSEMap.InsertNode(N, IP); 1070 AllNodes.push_back(N); 1071 return SDValue(N, 0); 1072} 1073 1074 1075SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1076 unsigned Alignment, int Offset, 1077 bool isTarget, 1078 unsigned char TargetFlags) { 1079 assert((TargetFlags == 0 || isTarget) && 1080 "Cannot set target flags on target-independent globals"); 1081 if (Alignment == 0) 1082 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1083 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1084 FoldingSetNodeID ID; 1085 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1086 ID.AddInteger(Alignment); 1087 ID.AddInteger(Offset); 1088 C->AddSelectionDAGCSEId(ID); 1089 ID.AddInteger(TargetFlags); 1090 void *IP = 0; 1091 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1092 return SDValue(E, 0); 1093 1094 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1095 Alignment, TargetFlags); 1096 CSEMap.InsertNode(N, IP); 1097 AllNodes.push_back(N); 1098 return SDValue(N, 0); 1099} 1100 1101SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1102 FoldingSetNodeID ID; 1103 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1104 ID.AddPointer(MBB); 1105 void *IP = 0; 1106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1107 return SDValue(E, 0); 1108 1109 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1110 CSEMap.InsertNode(N, IP); 1111 AllNodes.push_back(N); 1112 return SDValue(N, 0); 1113} 1114 1115SDValue SelectionDAG::getValueType(EVT VT) { 1116 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1117 ValueTypeNodes.size()) 1118 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1119 1120 SDNode *&N = VT.isExtended() ? 1121 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1122 1123 if (N) return SDValue(N, 0); 1124 N = new (NodeAllocator) VTSDNode(VT); 1125 AllNodes.push_back(N); 1126 return SDValue(N, 0); 1127} 1128 1129SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1130 SDNode *&N = ExternalSymbols[Sym]; 1131 if (N) return SDValue(N, 0); 1132 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1133 AllNodes.push_back(N); 1134 return SDValue(N, 0); 1135} 1136 1137SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1138 unsigned char TargetFlags) { 1139 SDNode *&N = 1140 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1141 TargetFlags)]; 1142 if (N) return SDValue(N, 0); 1143 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1144 AllNodes.push_back(N); 1145 return SDValue(N, 0); 1146} 1147 1148SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1149 if ((unsigned)Cond >= CondCodeNodes.size()) 1150 CondCodeNodes.resize(Cond+1); 1151 1152 if (CondCodeNodes[Cond] == 0) { 1153 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1154 CondCodeNodes[Cond] = N; 1155 AllNodes.push_back(N); 1156 } 1157 1158 return SDValue(CondCodeNodes[Cond], 0); 1159} 1160 1161// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1162// the shuffle mask M that point at N1 to point at N2, and indices that point 1163// N2 to point at N1. 1164static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1165 std::swap(N1, N2); 1166 int NElts = M.size(); 1167 for (int i = 0; i != NElts; ++i) { 1168 if (M[i] >= NElts) 1169 M[i] -= NElts; 1170 else if (M[i] >= 0) 1171 M[i] += NElts; 1172 } 1173} 1174 1175SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1176 SDValue N2, const int *Mask) { 1177 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1178 assert(VT.isVector() && N1.getValueType().isVector() && 1179 "Vector Shuffle VTs must be a vectors"); 1180 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1181 && "Vector Shuffle VTs must have same element type"); 1182 1183 // Canonicalize shuffle undef, undef -> undef 1184 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1185 return getUNDEF(VT); 1186 1187 // Validate that all indices in Mask are within the range of the elements 1188 // input to the shuffle. 1189 unsigned NElts = VT.getVectorNumElements(); 1190 SmallVector<int, 8> MaskVec; 1191 for (unsigned i = 0; i != NElts; ++i) { 1192 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1193 MaskVec.push_back(Mask[i]); 1194 } 1195 1196 // Canonicalize shuffle v, v -> v, undef 1197 if (N1 == N2) { 1198 N2 = getUNDEF(VT); 1199 for (unsigned i = 0; i != NElts; ++i) 1200 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1201 } 1202 1203 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1204 if (N1.getOpcode() == ISD::UNDEF) 1205 commuteShuffle(N1, N2, MaskVec); 1206 1207 // Canonicalize all index into lhs, -> shuffle lhs, undef 1208 // Canonicalize all index into rhs, -> shuffle rhs, undef 1209 bool AllLHS = true, AllRHS = true; 1210 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1211 for (unsigned i = 0; i != NElts; ++i) { 1212 if (MaskVec[i] >= (int)NElts) { 1213 if (N2Undef) 1214 MaskVec[i] = -1; 1215 else 1216 AllLHS = false; 1217 } else if (MaskVec[i] >= 0) { 1218 AllRHS = false; 1219 } 1220 } 1221 if (AllLHS && AllRHS) 1222 return getUNDEF(VT); 1223 if (AllLHS && !N2Undef) 1224 N2 = getUNDEF(VT); 1225 if (AllRHS) { 1226 N1 = getUNDEF(VT); 1227 commuteShuffle(N1, N2, MaskVec); 1228 } 1229 1230 // If Identity shuffle, or all shuffle in to undef, return that node. 1231 bool AllUndef = true; 1232 bool Identity = true; 1233 for (unsigned i = 0; i != NElts; ++i) { 1234 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1235 if (MaskVec[i] >= 0) AllUndef = false; 1236 } 1237 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1238 return N1; 1239 if (AllUndef) 1240 return getUNDEF(VT); 1241 1242 FoldingSetNodeID ID; 1243 SDValue Ops[2] = { N1, N2 }; 1244 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1245 for (unsigned i = 0; i != NElts; ++i) 1246 ID.AddInteger(MaskVec[i]); 1247 1248 void* IP = 0; 1249 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1250 return SDValue(E, 0); 1251 1252 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1253 // SDNode doesn't have access to it. This memory will be "leaked" when 1254 // the node is deallocated, but recovered when the NodeAllocator is released. 1255 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1256 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1257 1258 ShuffleVectorSDNode *N = 1259 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1260 CSEMap.InsertNode(N, IP); 1261 AllNodes.push_back(N); 1262 return SDValue(N, 0); 1263} 1264 1265SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1266 SDValue Val, SDValue DTy, 1267 SDValue STy, SDValue Rnd, SDValue Sat, 1268 ISD::CvtCode Code) { 1269 // If the src and dest types are the same and the conversion is between 1270 // integer types of the same sign or two floats, no conversion is necessary. 1271 if (DTy == STy && 1272 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1273 return Val; 1274 1275 FoldingSetNodeID ID; 1276 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1277 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1278 void* IP = 0; 1279 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1280 return SDValue(E, 0); 1281 1282 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1283 Code); 1284 CSEMap.InsertNode(N, IP); 1285 AllNodes.push_back(N); 1286 return SDValue(N, 0); 1287} 1288 1289SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1290 FoldingSetNodeID ID; 1291 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1292 ID.AddInteger(RegNo); 1293 void *IP = 0; 1294 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1295 return SDValue(E, 0); 1296 1297 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1298 CSEMap.InsertNode(N, IP); 1299 AllNodes.push_back(N); 1300 return SDValue(N, 0); 1301} 1302 1303SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1304 FoldingSetNodeID ID; 1305 SDValue Ops[] = { Root }; 1306 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1307 ID.AddPointer(Label); 1308 void *IP = 0; 1309 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1310 return SDValue(E, 0); 1311 1312 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1313 CSEMap.InsertNode(N, IP); 1314 AllNodes.push_back(N); 1315 return SDValue(N, 0); 1316} 1317 1318 1319SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1320 bool isTarget, 1321 unsigned char TargetFlags) { 1322 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1323 1324 FoldingSetNodeID ID; 1325 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1326 ID.AddPointer(BA); 1327 ID.AddInteger(TargetFlags); 1328 void *IP = 0; 1329 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1330 return SDValue(E, 0); 1331 1332 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1333 CSEMap.InsertNode(N, IP); 1334 AllNodes.push_back(N); 1335 return SDValue(N, 0); 1336} 1337 1338SDValue SelectionDAG::getSrcValue(const Value *V) { 1339 assert((!V || V->getType()->isPointerTy()) && 1340 "SrcValue is not a pointer?"); 1341 1342 FoldingSetNodeID ID; 1343 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1344 ID.AddPointer(V); 1345 1346 void *IP = 0; 1347 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1348 return SDValue(E, 0); 1349 1350 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1351 CSEMap.InsertNode(N, IP); 1352 AllNodes.push_back(N); 1353 return SDValue(N, 0); 1354} 1355 1356/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1357SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1358 FoldingSetNodeID ID; 1359 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1360 ID.AddPointer(MD); 1361 1362 void *IP = 0; 1363 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1364 return SDValue(E, 0); 1365 1366 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1367 CSEMap.InsertNode(N, IP); 1368 AllNodes.push_back(N); 1369 return SDValue(N, 0); 1370} 1371 1372 1373/// getShiftAmountOperand - Return the specified value casted to 1374/// the target's desired shift amount type. 1375SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1376 EVT OpTy = Op.getValueType(); 1377 MVT ShTy = TLI.getShiftAmountTy(); 1378 if (OpTy == ShTy || OpTy.isVector()) return Op; 1379 1380 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1381 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1382} 1383 1384/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1385/// specified value type. 1386SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1387 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1388 unsigned ByteSize = VT.getStoreSize(); 1389 const Type *Ty = VT.getTypeForEVT(*getContext()); 1390 unsigned StackAlign = 1391 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1392 1393 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1394 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1395} 1396 1397/// CreateStackTemporary - Create a stack temporary suitable for holding 1398/// either of the specified value types. 1399SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1400 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1401 VT2.getStoreSizeInBits())/8; 1402 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1403 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1404 const TargetData *TD = TLI.getTargetData(); 1405 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1406 TD->getPrefTypeAlignment(Ty2)); 1407 1408 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1409 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1410 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1411} 1412 1413SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1414 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1415 // These setcc operations always fold. 1416 switch (Cond) { 1417 default: break; 1418 case ISD::SETFALSE: 1419 case ISD::SETFALSE2: return getConstant(0, VT); 1420 case ISD::SETTRUE: 1421 case ISD::SETTRUE2: return getConstant(1, VT); 1422 1423 case ISD::SETOEQ: 1424 case ISD::SETOGT: 1425 case ISD::SETOGE: 1426 case ISD::SETOLT: 1427 case ISD::SETOLE: 1428 case ISD::SETONE: 1429 case ISD::SETO: 1430 case ISD::SETUO: 1431 case ISD::SETUEQ: 1432 case ISD::SETUNE: 1433 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1434 break; 1435 } 1436 1437 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1438 const APInt &C2 = N2C->getAPIntValue(); 1439 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1440 const APInt &C1 = N1C->getAPIntValue(); 1441 1442 switch (Cond) { 1443 default: llvm_unreachable("Unknown integer setcc!"); 1444 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1445 case ISD::SETNE: return getConstant(C1 != C2, VT); 1446 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1447 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1448 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1449 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1450 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1451 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1452 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1453 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1454 } 1455 } 1456 } 1457 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1458 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1459 // No compile time operations on this type yet. 1460 if (N1C->getValueType(0) == MVT::ppcf128) 1461 return SDValue(); 1462 1463 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1464 switch (Cond) { 1465 default: break; 1466 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1467 return getUNDEF(VT); 1468 // fall through 1469 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1470 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1471 return getUNDEF(VT); 1472 // fall through 1473 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1474 R==APFloat::cmpLessThan, VT); 1475 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1476 return getUNDEF(VT); 1477 // fall through 1478 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1479 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1480 return getUNDEF(VT); 1481 // fall through 1482 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1483 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1484 return getUNDEF(VT); 1485 // fall through 1486 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1487 R==APFloat::cmpEqual, VT); 1488 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1489 return getUNDEF(VT); 1490 // fall through 1491 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1492 R==APFloat::cmpEqual, VT); 1493 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1494 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1495 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1496 R==APFloat::cmpEqual, VT); 1497 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1498 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1499 R==APFloat::cmpLessThan, VT); 1500 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1501 R==APFloat::cmpUnordered, VT); 1502 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1503 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1504 } 1505 } else { 1506 // Ensure that the constant occurs on the RHS. 1507 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1508 } 1509 } 1510 1511 // Could not fold it. 1512 return SDValue(); 1513} 1514 1515/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1516/// use this predicate to simplify operations downstream. 1517bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1518 // This predicate is not safe for vector operations. 1519 if (Op.getValueType().isVector()) 1520 return false; 1521 1522 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1523 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1524} 1525 1526/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1527/// this predicate to simplify operations downstream. Mask is known to be zero 1528/// for bits that V cannot have. 1529bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1530 unsigned Depth) const { 1531 APInt KnownZero, KnownOne; 1532 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1533 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1534 return (KnownZero & Mask) == Mask; 1535} 1536 1537/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1538/// known to be either zero or one and return them in the KnownZero/KnownOne 1539/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1540/// processing. 1541void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1542 APInt &KnownZero, APInt &KnownOne, 1543 unsigned Depth) const { 1544 unsigned BitWidth = Mask.getBitWidth(); 1545 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1546 "Mask size mismatches value type size!"); 1547 1548 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1549 if (Depth == 6 || Mask == 0) 1550 return; // Limit search depth. 1551 1552 APInt KnownZero2, KnownOne2; 1553 1554 switch (Op.getOpcode()) { 1555 case ISD::Constant: 1556 // We know all of the bits for a constant! 1557 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1558 KnownZero = ~KnownOne & Mask; 1559 return; 1560 case ISD::AND: 1561 // If either the LHS or the RHS are Zero, the result is zero. 1562 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1563 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1564 KnownZero2, KnownOne2, Depth+1); 1565 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1566 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1567 1568 // Output known-1 bits are only known if set in both the LHS & RHS. 1569 KnownOne &= KnownOne2; 1570 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1571 KnownZero |= KnownZero2; 1572 return; 1573 case ISD::OR: 1574 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1575 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1576 KnownZero2, KnownOne2, Depth+1); 1577 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1578 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1579 1580 // Output known-0 bits are only known if clear in both the LHS & RHS. 1581 KnownZero &= KnownZero2; 1582 // Output known-1 are known to be set if set in either the LHS | RHS. 1583 KnownOne |= KnownOne2; 1584 return; 1585 case ISD::XOR: { 1586 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1587 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1588 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1589 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1590 1591 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1592 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1593 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1594 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1595 KnownZero = KnownZeroOut; 1596 return; 1597 } 1598 case ISD::MUL: { 1599 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1600 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1601 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1602 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1603 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1604 1605 // If low bits are zero in either operand, output low known-0 bits. 1606 // Also compute a conserative estimate for high known-0 bits. 1607 // More trickiness is possible, but this is sufficient for the 1608 // interesting case of alignment computation. 1609 KnownOne.clear(); 1610 unsigned TrailZ = KnownZero.countTrailingOnes() + 1611 KnownZero2.countTrailingOnes(); 1612 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1613 KnownZero2.countLeadingOnes(), 1614 BitWidth) - BitWidth; 1615 1616 TrailZ = std::min(TrailZ, BitWidth); 1617 LeadZ = std::min(LeadZ, BitWidth); 1618 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1619 APInt::getHighBitsSet(BitWidth, LeadZ); 1620 KnownZero &= Mask; 1621 return; 1622 } 1623 case ISD::UDIV: { 1624 // For the purposes of computing leading zeros we can conservatively 1625 // treat a udiv as a logical right shift by the power of 2 known to 1626 // be less than the denominator. 1627 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1628 ComputeMaskedBits(Op.getOperand(0), 1629 AllOnes, KnownZero2, KnownOne2, Depth+1); 1630 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1631 1632 KnownOne2.clear(); 1633 KnownZero2.clear(); 1634 ComputeMaskedBits(Op.getOperand(1), 1635 AllOnes, KnownZero2, KnownOne2, Depth+1); 1636 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1637 if (RHSUnknownLeadingOnes != BitWidth) 1638 LeadZ = std::min(BitWidth, 1639 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1640 1641 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1642 return; 1643 } 1644 case ISD::SELECT: 1645 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1646 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1647 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1648 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1649 1650 // Only known if known in both the LHS and RHS. 1651 KnownOne &= KnownOne2; 1652 KnownZero &= KnownZero2; 1653 return; 1654 case ISD::SELECT_CC: 1655 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1656 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1657 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1658 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1659 1660 // Only known if known in both the LHS and RHS. 1661 KnownOne &= KnownOne2; 1662 KnownZero &= KnownZero2; 1663 return; 1664 case ISD::SADDO: 1665 case ISD::UADDO: 1666 case ISD::SSUBO: 1667 case ISD::USUBO: 1668 case ISD::SMULO: 1669 case ISD::UMULO: 1670 if (Op.getResNo() != 1) 1671 return; 1672 // The boolean result conforms to getBooleanContents. Fall through. 1673 case ISD::SETCC: 1674 // If we know the result of a setcc has the top bits zero, use this info. 1675 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1676 BitWidth > 1) 1677 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1678 return; 1679 case ISD::SHL: 1680 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1681 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1682 unsigned ShAmt = SA->getZExtValue(); 1683 1684 // If the shift count is an invalid immediate, don't do anything. 1685 if (ShAmt >= BitWidth) 1686 return; 1687 1688 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1689 KnownZero, KnownOne, Depth+1); 1690 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1691 KnownZero <<= ShAmt; 1692 KnownOne <<= ShAmt; 1693 // low bits known zero. 1694 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1695 } 1696 return; 1697 case ISD::SRL: 1698 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1699 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1700 unsigned ShAmt = SA->getZExtValue(); 1701 1702 // If the shift count is an invalid immediate, don't do anything. 1703 if (ShAmt >= BitWidth) 1704 return; 1705 1706 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1707 KnownZero, KnownOne, Depth+1); 1708 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1709 KnownZero = KnownZero.lshr(ShAmt); 1710 KnownOne = KnownOne.lshr(ShAmt); 1711 1712 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1713 KnownZero |= HighBits; // High bits known zero. 1714 } 1715 return; 1716 case ISD::SRA: 1717 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1718 unsigned ShAmt = SA->getZExtValue(); 1719 1720 // If the shift count is an invalid immediate, don't do anything. 1721 if (ShAmt >= BitWidth) 1722 return; 1723 1724 APInt InDemandedMask = (Mask << ShAmt); 1725 // If any of the demanded bits are produced by the sign extension, we also 1726 // demand the input sign bit. 1727 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1728 if (HighBits.getBoolValue()) 1729 InDemandedMask |= APInt::getSignBit(BitWidth); 1730 1731 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1732 Depth+1); 1733 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1734 KnownZero = KnownZero.lshr(ShAmt); 1735 KnownOne = KnownOne.lshr(ShAmt); 1736 1737 // Handle the sign bits. 1738 APInt SignBit = APInt::getSignBit(BitWidth); 1739 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1740 1741 if (KnownZero.intersects(SignBit)) { 1742 KnownZero |= HighBits; // New bits are known zero. 1743 } else if (KnownOne.intersects(SignBit)) { 1744 KnownOne |= HighBits; // New bits are known one. 1745 } 1746 } 1747 return; 1748 case ISD::SIGN_EXTEND_INREG: { 1749 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1750 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1751 1752 // Sign extension. Compute the demanded bits in the result that are not 1753 // present in the input. 1754 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1755 1756 APInt InSignBit = APInt::getSignBit(EBits); 1757 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1758 1759 // If the sign extended bits are demanded, we know that the sign 1760 // bit is demanded. 1761 InSignBit.zext(BitWidth); 1762 if (NewBits.getBoolValue()) 1763 InputDemandedBits |= InSignBit; 1764 1765 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1766 KnownZero, KnownOne, Depth+1); 1767 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1768 1769 // If the sign bit of the input is known set or clear, then we know the 1770 // top bits of the result. 1771 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1772 KnownZero |= NewBits; 1773 KnownOne &= ~NewBits; 1774 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1775 KnownOne |= NewBits; 1776 KnownZero &= ~NewBits; 1777 } else { // Input sign bit unknown 1778 KnownZero &= ~NewBits; 1779 KnownOne &= ~NewBits; 1780 } 1781 return; 1782 } 1783 case ISD::CTTZ: 1784 case ISD::CTLZ: 1785 case ISD::CTPOP: { 1786 unsigned LowBits = Log2_32(BitWidth)+1; 1787 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1788 KnownOne.clear(); 1789 return; 1790 } 1791 case ISD::LOAD: { 1792 if (ISD::isZEXTLoad(Op.getNode())) { 1793 LoadSDNode *LD = cast<LoadSDNode>(Op); 1794 EVT VT = LD->getMemoryVT(); 1795 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1796 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1797 } 1798 return; 1799 } 1800 case ISD::ZERO_EXTEND: { 1801 EVT InVT = Op.getOperand(0).getValueType(); 1802 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1803 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1804 APInt InMask = Mask; 1805 InMask.trunc(InBits); 1806 KnownZero.trunc(InBits); 1807 KnownOne.trunc(InBits); 1808 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1809 KnownZero.zext(BitWidth); 1810 KnownOne.zext(BitWidth); 1811 KnownZero |= NewBits; 1812 return; 1813 } 1814 case ISD::SIGN_EXTEND: { 1815 EVT InVT = Op.getOperand(0).getValueType(); 1816 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1817 APInt InSignBit = APInt::getSignBit(InBits); 1818 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1819 APInt InMask = Mask; 1820 InMask.trunc(InBits); 1821 1822 // If any of the sign extended bits are demanded, we know that the sign 1823 // bit is demanded. Temporarily set this bit in the mask for our callee. 1824 if (NewBits.getBoolValue()) 1825 InMask |= InSignBit; 1826 1827 KnownZero.trunc(InBits); 1828 KnownOne.trunc(InBits); 1829 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1830 1831 // Note if the sign bit is known to be zero or one. 1832 bool SignBitKnownZero = KnownZero.isNegative(); 1833 bool SignBitKnownOne = KnownOne.isNegative(); 1834 assert(!(SignBitKnownZero && SignBitKnownOne) && 1835 "Sign bit can't be known to be both zero and one!"); 1836 1837 // If the sign bit wasn't actually demanded by our caller, we don't 1838 // want it set in the KnownZero and KnownOne result values. Reset the 1839 // mask and reapply it to the result values. 1840 InMask = Mask; 1841 InMask.trunc(InBits); 1842 KnownZero &= InMask; 1843 KnownOne &= InMask; 1844 1845 KnownZero.zext(BitWidth); 1846 KnownOne.zext(BitWidth); 1847 1848 // If the sign bit is known zero or one, the top bits match. 1849 if (SignBitKnownZero) 1850 KnownZero |= NewBits; 1851 else if (SignBitKnownOne) 1852 KnownOne |= NewBits; 1853 return; 1854 } 1855 case ISD::ANY_EXTEND: { 1856 EVT InVT = Op.getOperand(0).getValueType(); 1857 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1858 APInt InMask = Mask; 1859 InMask.trunc(InBits); 1860 KnownZero.trunc(InBits); 1861 KnownOne.trunc(InBits); 1862 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1863 KnownZero.zext(BitWidth); 1864 KnownOne.zext(BitWidth); 1865 return; 1866 } 1867 case ISD::TRUNCATE: { 1868 EVT InVT = Op.getOperand(0).getValueType(); 1869 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1870 APInt InMask = Mask; 1871 InMask.zext(InBits); 1872 KnownZero.zext(InBits); 1873 KnownOne.zext(InBits); 1874 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1875 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1876 KnownZero.trunc(BitWidth); 1877 KnownOne.trunc(BitWidth); 1878 break; 1879 } 1880 case ISD::AssertZext: { 1881 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1882 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1883 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1884 KnownOne, Depth+1); 1885 KnownZero |= (~InMask) & Mask; 1886 return; 1887 } 1888 case ISD::FGETSIGN: 1889 // All bits are zero except the low bit. 1890 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1891 return; 1892 1893 case ISD::SUB: { 1894 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1895 // We know that the top bits of C-X are clear if X contains less bits 1896 // than C (i.e. no wrap-around can happen). For example, 20-X is 1897 // positive if we can prove that X is >= 0 and < 16. 1898 if (CLHS->getAPIntValue().isNonNegative()) { 1899 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1900 // NLZ can't be BitWidth with no sign bit 1901 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1902 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1903 Depth+1); 1904 1905 // If all of the MaskV bits are known to be zero, then we know the 1906 // output top bits are zero, because we now know that the output is 1907 // from [0-C]. 1908 if ((KnownZero2 & MaskV) == MaskV) { 1909 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1910 // Top bits known zero. 1911 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1912 } 1913 } 1914 } 1915 } 1916 // fall through 1917 case ISD::ADD: { 1918 // Output known-0 bits are known if clear or set in both the low clear bits 1919 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1920 // low 3 bits clear. 1921 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1922 BitWidth - Mask.countLeadingZeros()); 1923 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1924 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1925 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1926 1927 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1928 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1929 KnownZeroOut = std::min(KnownZeroOut, 1930 KnownZero2.countTrailingOnes()); 1931 1932 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1933 return; 1934 } 1935 case ISD::SREM: 1936 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1937 const APInt &RA = Rem->getAPIntValue().abs(); 1938 if (RA.isPowerOf2()) { 1939 APInt LowBits = RA - 1; 1940 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1941 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1942 1943 // The low bits of the first operand are unchanged by the srem. 1944 KnownZero = KnownZero2 & LowBits; 1945 KnownOne = KnownOne2 & LowBits; 1946 1947 // If the first operand is non-negative or has all low bits zero, then 1948 // the upper bits are all zero. 1949 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1950 KnownZero |= ~LowBits; 1951 1952 // If the first operand is negative and not all low bits are zero, then 1953 // the upper bits are all one. 1954 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1955 KnownOne |= ~LowBits; 1956 1957 KnownZero &= Mask; 1958 KnownOne &= Mask; 1959 1960 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1961 } 1962 } 1963 return; 1964 case ISD::UREM: { 1965 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1966 const APInt &RA = Rem->getAPIntValue(); 1967 if (RA.isPowerOf2()) { 1968 APInt LowBits = (RA - 1); 1969 APInt Mask2 = LowBits & Mask; 1970 KnownZero |= ~LowBits & Mask; 1971 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1972 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1973 break; 1974 } 1975 } 1976 1977 // Since the result is less than or equal to either operand, any leading 1978 // zero bits in either operand must also exist in the result. 1979 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1980 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1981 Depth+1); 1982 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1983 Depth+1); 1984 1985 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1986 KnownZero2.countLeadingOnes()); 1987 KnownOne.clear(); 1988 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1989 return; 1990 } 1991 default: 1992 // Allow the target to implement this method for its nodes. 1993 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1994 case ISD::INTRINSIC_WO_CHAIN: 1995 case ISD::INTRINSIC_W_CHAIN: 1996 case ISD::INTRINSIC_VOID: 1997 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1998 Depth); 1999 } 2000 return; 2001 } 2002} 2003 2004/// ComputeNumSignBits - Return the number of times the sign bit of the 2005/// register is replicated into the other bits. We know that at least 1 bit 2006/// is always equal to the sign bit (itself), but other cases can give us 2007/// information. For example, immediately after an "SRA X, 2", we know that 2008/// the top 3 bits are all equal to each other, so we return 3. 2009unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2010 EVT VT = Op.getValueType(); 2011 assert(VT.isInteger() && "Invalid VT!"); 2012 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2013 unsigned Tmp, Tmp2; 2014 unsigned FirstAnswer = 1; 2015 2016 if (Depth == 6) 2017 return 1; // Limit search depth. 2018 2019 switch (Op.getOpcode()) { 2020 default: break; 2021 case ISD::AssertSext: 2022 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2023 return VTBits-Tmp+1; 2024 case ISD::AssertZext: 2025 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2026 return VTBits-Tmp; 2027 2028 case ISD::Constant: { 2029 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2030 // If negative, return # leading ones. 2031 if (Val.isNegative()) 2032 return Val.countLeadingOnes(); 2033 2034 // Return # leading zeros. 2035 return Val.countLeadingZeros(); 2036 } 2037 2038 case ISD::SIGN_EXTEND: 2039 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2040 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2041 2042 case ISD::SIGN_EXTEND_INREG: 2043 // Max of the input and what this extends. 2044 Tmp = 2045 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2046 Tmp = VTBits-Tmp+1; 2047 2048 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2049 return std::max(Tmp, Tmp2); 2050 2051 case ISD::SRA: 2052 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2053 // SRA X, C -> adds C sign bits. 2054 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2055 Tmp += C->getZExtValue(); 2056 if (Tmp > VTBits) Tmp = VTBits; 2057 } 2058 return Tmp; 2059 case ISD::SHL: 2060 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2061 // shl destroys sign bits. 2062 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2063 if (C->getZExtValue() >= VTBits || // Bad shift. 2064 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2065 return Tmp - C->getZExtValue(); 2066 } 2067 break; 2068 case ISD::AND: 2069 case ISD::OR: 2070 case ISD::XOR: // NOT is handled here. 2071 // Logical binary ops preserve the number of sign bits at the worst. 2072 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2073 if (Tmp != 1) { 2074 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2075 FirstAnswer = std::min(Tmp, Tmp2); 2076 // We computed what we know about the sign bits as our first 2077 // answer. Now proceed to the generic code that uses 2078 // ComputeMaskedBits, and pick whichever answer is better. 2079 } 2080 break; 2081 2082 case ISD::SELECT: 2083 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2084 if (Tmp == 1) return 1; // Early out. 2085 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2086 return std::min(Tmp, Tmp2); 2087 2088 case ISD::SADDO: 2089 case ISD::UADDO: 2090 case ISD::SSUBO: 2091 case ISD::USUBO: 2092 case ISD::SMULO: 2093 case ISD::UMULO: 2094 if (Op.getResNo() != 1) 2095 break; 2096 // The boolean result conforms to getBooleanContents. Fall through. 2097 case ISD::SETCC: 2098 // If setcc returns 0/-1, all bits are sign bits. 2099 if (TLI.getBooleanContents() == 2100 TargetLowering::ZeroOrNegativeOneBooleanContent) 2101 return VTBits; 2102 break; 2103 case ISD::ROTL: 2104 case ISD::ROTR: 2105 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2106 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2107 2108 // Handle rotate right by N like a rotate left by 32-N. 2109 if (Op.getOpcode() == ISD::ROTR) 2110 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2111 2112 // If we aren't rotating out all of the known-in sign bits, return the 2113 // number that are left. This handles rotl(sext(x), 1) for example. 2114 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2115 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2116 } 2117 break; 2118 case ISD::ADD: 2119 // Add can have at most one carry bit. Thus we know that the output 2120 // is, at worst, one more bit than the inputs. 2121 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2122 if (Tmp == 1) return 1; // Early out. 2123 2124 // Special case decrementing a value (ADD X, -1): 2125 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2126 if (CRHS->isAllOnesValue()) { 2127 APInt KnownZero, KnownOne; 2128 APInt Mask = APInt::getAllOnesValue(VTBits); 2129 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2130 2131 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2132 // sign bits set. 2133 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2134 return VTBits; 2135 2136 // If we are subtracting one from a positive number, there is no carry 2137 // out of the result. 2138 if (KnownZero.isNegative()) 2139 return Tmp; 2140 } 2141 2142 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2143 if (Tmp2 == 1) return 1; 2144 return std::min(Tmp, Tmp2)-1; 2145 break; 2146 2147 case ISD::SUB: 2148 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2149 if (Tmp2 == 1) return 1; 2150 2151 // Handle NEG. 2152 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2153 if (CLHS->isNullValue()) { 2154 APInt KnownZero, KnownOne; 2155 APInt Mask = APInt::getAllOnesValue(VTBits); 2156 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2157 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2158 // sign bits set. 2159 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2160 return VTBits; 2161 2162 // If the input is known to be positive (the sign bit is known clear), 2163 // the output of the NEG has the same number of sign bits as the input. 2164 if (KnownZero.isNegative()) 2165 return Tmp2; 2166 2167 // Otherwise, we treat this like a SUB. 2168 } 2169 2170 // Sub can have at most one carry bit. Thus we know that the output 2171 // is, at worst, one more bit than the inputs. 2172 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2173 if (Tmp == 1) return 1; // Early out. 2174 return std::min(Tmp, Tmp2)-1; 2175 break; 2176 case ISD::TRUNCATE: 2177 // FIXME: it's tricky to do anything useful for this, but it is an important 2178 // case for targets like X86. 2179 break; 2180 } 2181 2182 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2183 if (Op.getOpcode() == ISD::LOAD) { 2184 LoadSDNode *LD = cast<LoadSDNode>(Op); 2185 unsigned ExtType = LD->getExtensionType(); 2186 switch (ExtType) { 2187 default: break; 2188 case ISD::SEXTLOAD: // '17' bits known 2189 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2190 return VTBits-Tmp+1; 2191 case ISD::ZEXTLOAD: // '16' bits known 2192 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2193 return VTBits-Tmp; 2194 } 2195 } 2196 2197 // Allow the target to implement this method for its nodes. 2198 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2199 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2200 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2201 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2202 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2203 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2204 } 2205 2206 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2207 // use this information. 2208 APInt KnownZero, KnownOne; 2209 APInt Mask = APInt::getAllOnesValue(VTBits); 2210 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2211 2212 if (KnownZero.isNegative()) { // sign bit is 0 2213 Mask = KnownZero; 2214 } else if (KnownOne.isNegative()) { // sign bit is 1; 2215 Mask = KnownOne; 2216 } else { 2217 // Nothing known. 2218 return FirstAnswer; 2219 } 2220 2221 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2222 // the number of identical bits in the top of the input value. 2223 Mask = ~Mask; 2224 Mask <<= Mask.getBitWidth()-VTBits; 2225 // Return # leading zeros. We use 'min' here in case Val was zero before 2226 // shifting. We don't want to return '64' as for an i32 "0". 2227 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2228} 2229 2230bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2231 // If we're told that NaNs won't happen, assume they won't. 2232 if (FiniteOnlyFPMath()) 2233 return true; 2234 2235 // If the value is a constant, we can obviously see if it is a NaN or not. 2236 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2237 return !C->getValueAPF().isNaN(); 2238 2239 // TODO: Recognize more cases here. 2240 2241 return false; 2242} 2243 2244bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2245 // If the value is a constant, we can obviously see if it is a zero or not. 2246 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2247 return !C->isZero(); 2248 2249 // TODO: Recognize more cases here. 2250 2251 return false; 2252} 2253 2254bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2255 // Check the obvious case. 2256 if (A == B) return true; 2257 2258 // For for negative and positive zero. 2259 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2260 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2261 if (CA->isZero() && CB->isZero()) return true; 2262 2263 // Otherwise they may not be equal. 2264 return false; 2265} 2266 2267bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2268 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2269 if (!GA) return false; 2270 if (GA->getOffset() != 0) return false; 2271 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2272 if (!GV) return false; 2273 return MF->getMMI().hasDebugInfo(); 2274} 2275 2276 2277/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2278/// element of the result of the vector shuffle. 2279SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2280 unsigned i) { 2281 EVT VT = N->getValueType(0); 2282 DebugLoc dl = N->getDebugLoc(); 2283 if (N->getMaskElt(i) < 0) 2284 return getUNDEF(VT.getVectorElementType()); 2285 unsigned Index = N->getMaskElt(i); 2286 unsigned NumElems = VT.getVectorNumElements(); 2287 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2288 Index %= NumElems; 2289 2290 if (V.getOpcode() == ISD::BIT_CONVERT) { 2291 V = V.getOperand(0); 2292 EVT VVT = V.getValueType(); 2293 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2294 return SDValue(); 2295 } 2296 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2297 return (Index == 0) ? V.getOperand(0) 2298 : getUNDEF(VT.getVectorElementType()); 2299 if (V.getOpcode() == ISD::BUILD_VECTOR) 2300 return V.getOperand(Index); 2301 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2302 return getShuffleScalarElt(SVN, Index); 2303 return SDValue(); 2304} 2305 2306 2307/// getNode - Gets or creates the specified node. 2308/// 2309SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2310 FoldingSetNodeID ID; 2311 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2312 void *IP = 0; 2313 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2314 return SDValue(E, 0); 2315 2316 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2317 CSEMap.InsertNode(N, IP); 2318 2319 AllNodes.push_back(N); 2320#ifndef NDEBUG 2321 VerifyNode(N); 2322#endif 2323 return SDValue(N, 0); 2324} 2325 2326SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2327 EVT VT, SDValue Operand) { 2328 // Constant fold unary operations with an integer constant operand. 2329 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2330 const APInt &Val = C->getAPIntValue(); 2331 switch (Opcode) { 2332 default: break; 2333 case ISD::SIGN_EXTEND: 2334 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2335 case ISD::ANY_EXTEND: 2336 case ISD::ZERO_EXTEND: 2337 case ISD::TRUNCATE: 2338 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2339 case ISD::UINT_TO_FP: 2340 case ISD::SINT_TO_FP: { 2341 const uint64_t zero[] = {0, 0}; 2342 // No compile time operations on ppcf128. 2343 if (VT == MVT::ppcf128) break; 2344 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2345 (void)apf.convertFromAPInt(Val, 2346 Opcode==ISD::SINT_TO_FP, 2347 APFloat::rmNearestTiesToEven); 2348 return getConstantFP(apf, VT); 2349 } 2350 case ISD::BIT_CONVERT: 2351 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2352 return getConstantFP(Val.bitsToFloat(), VT); 2353 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2354 return getConstantFP(Val.bitsToDouble(), VT); 2355 break; 2356 case ISD::BSWAP: 2357 return getConstant(Val.byteSwap(), VT); 2358 case ISD::CTPOP: 2359 return getConstant(Val.countPopulation(), VT); 2360 case ISD::CTLZ: 2361 return getConstant(Val.countLeadingZeros(), VT); 2362 case ISD::CTTZ: 2363 return getConstant(Val.countTrailingZeros(), VT); 2364 } 2365 } 2366 2367 // Constant fold unary operations with a floating point constant operand. 2368 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2369 APFloat V = C->getValueAPF(); // make copy 2370 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2371 switch (Opcode) { 2372 case ISD::FNEG: 2373 V.changeSign(); 2374 return getConstantFP(V, VT); 2375 case ISD::FABS: 2376 V.clearSign(); 2377 return getConstantFP(V, VT); 2378 case ISD::FP_ROUND: 2379 case ISD::FP_EXTEND: { 2380 bool ignored; 2381 // This can return overflow, underflow, or inexact; we don't care. 2382 // FIXME need to be more flexible about rounding mode. 2383 (void)V.convert(*EVTToAPFloatSemantics(VT), 2384 APFloat::rmNearestTiesToEven, &ignored); 2385 return getConstantFP(V, VT); 2386 } 2387 case ISD::FP_TO_SINT: 2388 case ISD::FP_TO_UINT: { 2389 integerPart x[2]; 2390 bool ignored; 2391 assert(integerPartWidth >= 64); 2392 // FIXME need to be more flexible about rounding mode. 2393 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2394 Opcode==ISD::FP_TO_SINT, 2395 APFloat::rmTowardZero, &ignored); 2396 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2397 break; 2398 APInt api(VT.getSizeInBits(), 2, x); 2399 return getConstant(api, VT); 2400 } 2401 case ISD::BIT_CONVERT: 2402 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2403 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2404 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2405 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2406 break; 2407 } 2408 } 2409 } 2410 2411 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2412 switch (Opcode) { 2413 case ISD::TokenFactor: 2414 case ISD::MERGE_VALUES: 2415 case ISD::CONCAT_VECTORS: 2416 return Operand; // Factor, merge or concat of one node? No need. 2417 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2418 case ISD::FP_EXTEND: 2419 assert(VT.isFloatingPoint() && 2420 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2421 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2422 assert((!VT.isVector() || 2423 VT.getVectorNumElements() == 2424 Operand.getValueType().getVectorNumElements()) && 2425 "Vector element count mismatch!"); 2426 if (Operand.getOpcode() == ISD::UNDEF) 2427 return getUNDEF(VT); 2428 break; 2429 case ISD::SIGN_EXTEND: 2430 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2431 "Invalid SIGN_EXTEND!"); 2432 if (Operand.getValueType() == VT) return Operand; // noop extension 2433 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2434 "Invalid sext node, dst < src!"); 2435 assert((!VT.isVector() || 2436 VT.getVectorNumElements() == 2437 Operand.getValueType().getVectorNumElements()) && 2438 "Vector element count mismatch!"); 2439 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2440 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2441 break; 2442 case ISD::ZERO_EXTEND: 2443 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2444 "Invalid ZERO_EXTEND!"); 2445 if (Operand.getValueType() == VT) return Operand; // noop extension 2446 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2447 "Invalid zext node, dst < src!"); 2448 assert((!VT.isVector() || 2449 VT.getVectorNumElements() == 2450 Operand.getValueType().getVectorNumElements()) && 2451 "Vector element count mismatch!"); 2452 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2453 return getNode(ISD::ZERO_EXTEND, DL, VT, 2454 Operand.getNode()->getOperand(0)); 2455 break; 2456 case ISD::ANY_EXTEND: 2457 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2458 "Invalid ANY_EXTEND!"); 2459 if (Operand.getValueType() == VT) return Operand; // noop extension 2460 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2461 "Invalid anyext node, dst < src!"); 2462 assert((!VT.isVector() || 2463 VT.getVectorNumElements() == 2464 Operand.getValueType().getVectorNumElements()) && 2465 "Vector element count mismatch!"); 2466 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2467 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2468 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2469 break; 2470 case ISD::TRUNCATE: 2471 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2472 "Invalid TRUNCATE!"); 2473 if (Operand.getValueType() == VT) return Operand; // noop truncate 2474 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2475 "Invalid truncate node, src < dst!"); 2476 assert((!VT.isVector() || 2477 VT.getVectorNumElements() == 2478 Operand.getValueType().getVectorNumElements()) && 2479 "Vector element count mismatch!"); 2480 if (OpOpcode == ISD::TRUNCATE) 2481 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2482 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2483 OpOpcode == ISD::ANY_EXTEND) { 2484 // If the source is smaller than the dest, we still need an extend. 2485 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2486 .bitsLT(VT.getScalarType())) 2487 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2488 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2489 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2490 else 2491 return Operand.getNode()->getOperand(0); 2492 } 2493 break; 2494 case ISD::BIT_CONVERT: 2495 // Basic sanity checking. 2496 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2497 && "Cannot BIT_CONVERT between types of different sizes!"); 2498 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2499 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2500 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2501 if (OpOpcode == ISD::UNDEF) 2502 return getUNDEF(VT); 2503 break; 2504 case ISD::SCALAR_TO_VECTOR: 2505 assert(VT.isVector() && !Operand.getValueType().isVector() && 2506 (VT.getVectorElementType() == Operand.getValueType() || 2507 (VT.getVectorElementType().isInteger() && 2508 Operand.getValueType().isInteger() && 2509 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2510 "Illegal SCALAR_TO_VECTOR node!"); 2511 if (OpOpcode == ISD::UNDEF) 2512 return getUNDEF(VT); 2513 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2514 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2515 isa<ConstantSDNode>(Operand.getOperand(1)) && 2516 Operand.getConstantOperandVal(1) == 0 && 2517 Operand.getOperand(0).getValueType() == VT) 2518 return Operand.getOperand(0); 2519 break; 2520 case ISD::FNEG: 2521 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2522 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2523 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2524 Operand.getNode()->getOperand(0)); 2525 if (OpOpcode == ISD::FNEG) // --X -> X 2526 return Operand.getNode()->getOperand(0); 2527 break; 2528 case ISD::FABS: 2529 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2530 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2531 break; 2532 } 2533 2534 SDNode *N; 2535 SDVTList VTs = getVTList(VT); 2536 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2537 FoldingSetNodeID ID; 2538 SDValue Ops[1] = { Operand }; 2539 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2540 void *IP = 0; 2541 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2542 return SDValue(E, 0); 2543 2544 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2545 CSEMap.InsertNode(N, IP); 2546 } else { 2547 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2548 } 2549 2550 AllNodes.push_back(N); 2551#ifndef NDEBUG 2552 VerifyNode(N); 2553#endif 2554 return SDValue(N, 0); 2555} 2556 2557SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2558 EVT VT, 2559 ConstantSDNode *Cst1, 2560 ConstantSDNode *Cst2) { 2561 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2562 2563 switch (Opcode) { 2564 case ISD::ADD: return getConstant(C1 + C2, VT); 2565 case ISD::SUB: return getConstant(C1 - C2, VT); 2566 case ISD::MUL: return getConstant(C1 * C2, VT); 2567 case ISD::UDIV: 2568 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2569 break; 2570 case ISD::UREM: 2571 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2572 break; 2573 case ISD::SDIV: 2574 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2575 break; 2576 case ISD::SREM: 2577 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2578 break; 2579 case ISD::AND: return getConstant(C1 & C2, VT); 2580 case ISD::OR: return getConstant(C1 | C2, VT); 2581 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2582 case ISD::SHL: return getConstant(C1 << C2, VT); 2583 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2584 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2585 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2586 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2587 default: break; 2588 } 2589 2590 return SDValue(); 2591} 2592 2593SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2594 SDValue N1, SDValue N2) { 2595 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2596 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2597 switch (Opcode) { 2598 default: break; 2599 case ISD::TokenFactor: 2600 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2601 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2602 // Fold trivial token factors. 2603 if (N1.getOpcode() == ISD::EntryToken) return N2; 2604 if (N2.getOpcode() == ISD::EntryToken) return N1; 2605 if (N1 == N2) return N1; 2606 break; 2607 case ISD::CONCAT_VECTORS: 2608 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2609 // one big BUILD_VECTOR. 2610 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2611 N2.getOpcode() == ISD::BUILD_VECTOR) { 2612 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2613 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2614 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2615 } 2616 break; 2617 case ISD::AND: 2618 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2619 N1.getValueType() == VT && "Binary operator types must match!"); 2620 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2621 // worth handling here. 2622 if (N2C && N2C->isNullValue()) 2623 return N2; 2624 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2625 return N1; 2626 break; 2627 case ISD::OR: 2628 case ISD::XOR: 2629 case ISD::ADD: 2630 case ISD::SUB: 2631 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2632 N1.getValueType() == VT && "Binary operator types must match!"); 2633 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2634 // it's worth handling here. 2635 if (N2C && N2C->isNullValue()) 2636 return N1; 2637 break; 2638 case ISD::UDIV: 2639 case ISD::UREM: 2640 case ISD::MULHU: 2641 case ISD::MULHS: 2642 case ISD::MUL: 2643 case ISD::SDIV: 2644 case ISD::SREM: 2645 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2646 // fall through 2647 case ISD::FADD: 2648 case ISD::FSUB: 2649 case ISD::FMUL: 2650 case ISD::FDIV: 2651 case ISD::FREM: 2652 if (UnsafeFPMath) { 2653 if (Opcode == ISD::FADD) { 2654 // 0+x --> x 2655 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2656 if (CFP->getValueAPF().isZero()) 2657 return N2; 2658 // x+0 --> x 2659 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2660 if (CFP->getValueAPF().isZero()) 2661 return N1; 2662 } else if (Opcode == ISD::FSUB) { 2663 // x-0 --> x 2664 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2665 if (CFP->getValueAPF().isZero()) 2666 return N1; 2667 } 2668 } 2669 assert(N1.getValueType() == N2.getValueType() && 2670 N1.getValueType() == VT && "Binary operator types must match!"); 2671 break; 2672 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2673 assert(N1.getValueType() == VT && 2674 N1.getValueType().isFloatingPoint() && 2675 N2.getValueType().isFloatingPoint() && 2676 "Invalid FCOPYSIGN!"); 2677 break; 2678 case ISD::SHL: 2679 case ISD::SRA: 2680 case ISD::SRL: 2681 case ISD::ROTL: 2682 case ISD::ROTR: 2683 assert(VT == N1.getValueType() && 2684 "Shift operators return type must be the same as their first arg"); 2685 assert(VT.isInteger() && N2.getValueType().isInteger() && 2686 "Shifts only work on integers"); 2687 2688 // Always fold shifts of i1 values so the code generator doesn't need to 2689 // handle them. Since we know the size of the shift has to be less than the 2690 // size of the value, the shift/rotate count is guaranteed to be zero. 2691 if (VT == MVT::i1) 2692 return N1; 2693 if (N2C && N2C->isNullValue()) 2694 return N1; 2695 break; 2696 case ISD::FP_ROUND_INREG: { 2697 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2698 assert(VT == N1.getValueType() && "Not an inreg round!"); 2699 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2700 "Cannot FP_ROUND_INREG integer types"); 2701 assert(EVT.isVector() == VT.isVector() && 2702 "FP_ROUND_INREG type should be vector iff the operand " 2703 "type is vector!"); 2704 assert((!EVT.isVector() || 2705 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2706 "Vector element counts must match in FP_ROUND_INREG"); 2707 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2708 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2709 break; 2710 } 2711 case ISD::FP_ROUND: 2712 assert(VT.isFloatingPoint() && 2713 N1.getValueType().isFloatingPoint() && 2714 VT.bitsLE(N1.getValueType()) && 2715 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2716 if (N1.getValueType() == VT) return N1; // noop conversion. 2717 break; 2718 case ISD::AssertSext: 2719 case ISD::AssertZext: { 2720 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2721 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2722 assert(VT.isInteger() && EVT.isInteger() && 2723 "Cannot *_EXTEND_INREG FP types"); 2724 assert(!EVT.isVector() && 2725 "AssertSExt/AssertZExt type should be the vector element type " 2726 "rather than the vector type!"); 2727 assert(EVT.bitsLE(VT) && "Not extending!"); 2728 if (VT == EVT) return N1; // noop assertion. 2729 break; 2730 } 2731 case ISD::SIGN_EXTEND_INREG: { 2732 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2733 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2734 assert(VT.isInteger() && EVT.isInteger() && 2735 "Cannot *_EXTEND_INREG FP types"); 2736 assert(EVT.isVector() == VT.isVector() && 2737 "SIGN_EXTEND_INREG type should be vector iff the operand " 2738 "type is vector!"); 2739 assert((!EVT.isVector() || 2740 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2741 "Vector element counts must match in SIGN_EXTEND_INREG"); 2742 assert(EVT.bitsLE(VT) && "Not extending!"); 2743 if (EVT == VT) return N1; // Not actually extending 2744 2745 if (N1C) { 2746 APInt Val = N1C->getAPIntValue(); 2747 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2748 Val <<= Val.getBitWidth()-FromBits; 2749 Val = Val.ashr(Val.getBitWidth()-FromBits); 2750 return getConstant(Val, VT); 2751 } 2752 break; 2753 } 2754 case ISD::EXTRACT_VECTOR_ELT: 2755 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2756 if (N1.getOpcode() == ISD::UNDEF) 2757 return getUNDEF(VT); 2758 2759 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2760 // expanding copies of large vectors from registers. 2761 if (N2C && 2762 N1.getOpcode() == ISD::CONCAT_VECTORS && 2763 N1.getNumOperands() > 0) { 2764 unsigned Factor = 2765 N1.getOperand(0).getValueType().getVectorNumElements(); 2766 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2767 N1.getOperand(N2C->getZExtValue() / Factor), 2768 getConstant(N2C->getZExtValue() % Factor, 2769 N2.getValueType())); 2770 } 2771 2772 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2773 // expanding large vector constants. 2774 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2775 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2776 EVT VEltTy = N1.getValueType().getVectorElementType(); 2777 if (Elt.getValueType() != VEltTy) { 2778 // If the vector element type is not legal, the BUILD_VECTOR operands 2779 // are promoted and implicitly truncated. Make that explicit here. 2780 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2781 } 2782 if (VT != VEltTy) { 2783 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2784 // result is implicitly extended. 2785 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2786 } 2787 return Elt; 2788 } 2789 2790 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2791 // operations are lowered to scalars. 2792 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2793 // If the indices are the same, return the inserted element else 2794 // if the indices are known different, extract the element from 2795 // the original vector. 2796 SDValue N1Op2 = N1.getOperand(2); 2797 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2798 2799 if (N1Op2C && N2C) { 2800 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2801 if (VT == N1.getOperand(1).getValueType()) 2802 return N1.getOperand(1); 2803 else 2804 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2805 } 2806 2807 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2808 } 2809 } 2810 break; 2811 case ISD::EXTRACT_ELEMENT: 2812 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2813 assert(!N1.getValueType().isVector() && !VT.isVector() && 2814 (N1.getValueType().isInteger() == VT.isInteger()) && 2815 "Wrong types for EXTRACT_ELEMENT!"); 2816 2817 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2818 // 64-bit integers into 32-bit parts. Instead of building the extract of 2819 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2820 if (N1.getOpcode() == ISD::BUILD_PAIR) 2821 return N1.getOperand(N2C->getZExtValue()); 2822 2823 // EXTRACT_ELEMENT of a constant int is also very common. 2824 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2825 unsigned ElementSize = VT.getSizeInBits(); 2826 unsigned Shift = ElementSize * N2C->getZExtValue(); 2827 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2828 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2829 } 2830 break; 2831 case ISD::EXTRACT_SUBVECTOR: 2832 if (N1.getValueType() == VT) // Trivial extraction. 2833 return N1; 2834 break; 2835 } 2836 2837 if (N1C) { 2838 if (N2C) { 2839 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2840 if (SV.getNode()) return SV; 2841 } else { // Cannonicalize constant to RHS if commutative 2842 if (isCommutativeBinOp(Opcode)) { 2843 std::swap(N1C, N2C); 2844 std::swap(N1, N2); 2845 } 2846 } 2847 } 2848 2849 // Constant fold FP operations. 2850 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2851 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2852 if (N1CFP) { 2853 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2854 // Cannonicalize constant to RHS if commutative 2855 std::swap(N1CFP, N2CFP); 2856 std::swap(N1, N2); 2857 } else if (N2CFP && VT != MVT::ppcf128) { 2858 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2859 APFloat::opStatus s; 2860 switch (Opcode) { 2861 case ISD::FADD: 2862 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2863 if (s != APFloat::opInvalidOp) 2864 return getConstantFP(V1, VT); 2865 break; 2866 case ISD::FSUB: 2867 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2868 if (s!=APFloat::opInvalidOp) 2869 return getConstantFP(V1, VT); 2870 break; 2871 case ISD::FMUL: 2872 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2873 if (s!=APFloat::opInvalidOp) 2874 return getConstantFP(V1, VT); 2875 break; 2876 case ISD::FDIV: 2877 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2878 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2879 return getConstantFP(V1, VT); 2880 break; 2881 case ISD::FREM : 2882 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2883 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2884 return getConstantFP(V1, VT); 2885 break; 2886 case ISD::FCOPYSIGN: 2887 V1.copySign(V2); 2888 return getConstantFP(V1, VT); 2889 default: break; 2890 } 2891 } 2892 } 2893 2894 // Canonicalize an UNDEF to the RHS, even over a constant. 2895 if (N1.getOpcode() == ISD::UNDEF) { 2896 if (isCommutativeBinOp(Opcode)) { 2897 std::swap(N1, N2); 2898 } else { 2899 switch (Opcode) { 2900 case ISD::FP_ROUND_INREG: 2901 case ISD::SIGN_EXTEND_INREG: 2902 case ISD::SUB: 2903 case ISD::FSUB: 2904 case ISD::FDIV: 2905 case ISD::FREM: 2906 case ISD::SRA: 2907 return N1; // fold op(undef, arg2) -> undef 2908 case ISD::UDIV: 2909 case ISD::SDIV: 2910 case ISD::UREM: 2911 case ISD::SREM: 2912 case ISD::SRL: 2913 case ISD::SHL: 2914 if (!VT.isVector()) 2915 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2916 // For vectors, we can't easily build an all zero vector, just return 2917 // the LHS. 2918 return N2; 2919 } 2920 } 2921 } 2922 2923 // Fold a bunch of operators when the RHS is undef. 2924 if (N2.getOpcode() == ISD::UNDEF) { 2925 switch (Opcode) { 2926 case ISD::XOR: 2927 if (N1.getOpcode() == ISD::UNDEF) 2928 // Handle undef ^ undef -> 0 special case. This is a common 2929 // idiom (misuse). 2930 return getConstant(0, VT); 2931 // fallthrough 2932 case ISD::ADD: 2933 case ISD::ADDC: 2934 case ISD::ADDE: 2935 case ISD::SUB: 2936 case ISD::UDIV: 2937 case ISD::SDIV: 2938 case ISD::UREM: 2939 case ISD::SREM: 2940 return N2; // fold op(arg1, undef) -> undef 2941 case ISD::FADD: 2942 case ISD::FSUB: 2943 case ISD::FMUL: 2944 case ISD::FDIV: 2945 case ISD::FREM: 2946 if (UnsafeFPMath) 2947 return N2; 2948 break; 2949 case ISD::MUL: 2950 case ISD::AND: 2951 case ISD::SRL: 2952 case ISD::SHL: 2953 if (!VT.isVector()) 2954 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2955 // For vectors, we can't easily build an all zero vector, just return 2956 // the LHS. 2957 return N1; 2958 case ISD::OR: 2959 if (!VT.isVector()) 2960 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2961 // For vectors, we can't easily build an all one vector, just return 2962 // the LHS. 2963 return N1; 2964 case ISD::SRA: 2965 return N1; 2966 } 2967 } 2968 2969 // Memoize this node if possible. 2970 SDNode *N; 2971 SDVTList VTs = getVTList(VT); 2972 if (VT != MVT::Flag) { 2973 SDValue Ops[] = { N1, N2 }; 2974 FoldingSetNodeID ID; 2975 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2976 void *IP = 0; 2977 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2978 return SDValue(E, 0); 2979 2980 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2981 CSEMap.InsertNode(N, IP); 2982 } else { 2983 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2984 } 2985 2986 AllNodes.push_back(N); 2987#ifndef NDEBUG 2988 VerifyNode(N); 2989#endif 2990 return SDValue(N, 0); 2991} 2992 2993SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2994 SDValue N1, SDValue N2, SDValue N3) { 2995 // Perform various simplifications. 2996 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2997 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2998 switch (Opcode) { 2999 case ISD::CONCAT_VECTORS: 3000 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3001 // one big BUILD_VECTOR. 3002 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3003 N2.getOpcode() == ISD::BUILD_VECTOR && 3004 N3.getOpcode() == ISD::BUILD_VECTOR) { 3005 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 3006 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 3007 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 3008 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3009 } 3010 break; 3011 case ISD::SETCC: { 3012 // Use FoldSetCC to simplify SETCC's. 3013 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3014 if (Simp.getNode()) return Simp; 3015 break; 3016 } 3017 case ISD::SELECT: 3018 if (N1C) { 3019 if (N1C->getZExtValue()) 3020 return N2; // select true, X, Y -> X 3021 else 3022 return N3; // select false, X, Y -> Y 3023 } 3024 3025 if (N2 == N3) return N2; // select C, X, X -> X 3026 break; 3027 case ISD::BRCOND: 3028 if (N2C) { 3029 if (N2C->getZExtValue()) // Unconditional branch 3030 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3031 else 3032 return N1; // Never-taken branch 3033 } 3034 break; 3035 case ISD::VECTOR_SHUFFLE: 3036 llvm_unreachable("should use getVectorShuffle constructor!"); 3037 break; 3038 case ISD::BIT_CONVERT: 3039 // Fold bit_convert nodes from a type to themselves. 3040 if (N1.getValueType() == VT) 3041 return N1; 3042 break; 3043 } 3044 3045 // Memoize node if it doesn't produce a flag. 3046 SDNode *N; 3047 SDVTList VTs = getVTList(VT); 3048 if (VT != MVT::Flag) { 3049 SDValue Ops[] = { N1, N2, N3 }; 3050 FoldingSetNodeID ID; 3051 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3052 void *IP = 0; 3053 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3054 return SDValue(E, 0); 3055 3056 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3057 CSEMap.InsertNode(N, IP); 3058 } else { 3059 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3060 } 3061 3062 AllNodes.push_back(N); 3063#ifndef NDEBUG 3064 VerifyNode(N); 3065#endif 3066 return SDValue(N, 0); 3067} 3068 3069SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3070 SDValue N1, SDValue N2, SDValue N3, 3071 SDValue N4) { 3072 SDValue Ops[] = { N1, N2, N3, N4 }; 3073 return getNode(Opcode, DL, VT, Ops, 4); 3074} 3075 3076SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3077 SDValue N1, SDValue N2, SDValue N3, 3078 SDValue N4, SDValue N5) { 3079 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3080 return getNode(Opcode, DL, VT, Ops, 5); 3081} 3082 3083/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3084/// the incoming stack arguments to be loaded from the stack. 3085SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3086 SmallVector<SDValue, 8> ArgChains; 3087 3088 // Include the original chain at the beginning of the list. When this is 3089 // used by target LowerCall hooks, this helps legalize find the 3090 // CALLSEQ_BEGIN node. 3091 ArgChains.push_back(Chain); 3092 3093 // Add a chain value for each stack argument. 3094 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3095 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3096 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3097 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3098 if (FI->getIndex() < 0) 3099 ArgChains.push_back(SDValue(L, 1)); 3100 3101 // Build a tokenfactor for all the chains. 3102 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3103 &ArgChains[0], ArgChains.size()); 3104} 3105 3106/// getMemsetValue - Vectorized representation of the memset value 3107/// operand. 3108static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3109 DebugLoc dl) { 3110 assert(Value.getOpcode() != ISD::UNDEF); 3111 3112 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3113 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3114 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3115 unsigned Shift = 8; 3116 for (unsigned i = NumBits; i > 8; i >>= 1) { 3117 Val = (Val << Shift) | Val; 3118 Shift <<= 1; 3119 } 3120 if (VT.isInteger()) 3121 return DAG.getConstant(Val, VT); 3122 return DAG.getConstantFP(APFloat(Val), VT); 3123 } 3124 3125 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3126 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3127 unsigned Shift = 8; 3128 for (unsigned i = NumBits; i > 8; i >>= 1) { 3129 Value = DAG.getNode(ISD::OR, dl, VT, 3130 DAG.getNode(ISD::SHL, dl, VT, Value, 3131 DAG.getConstant(Shift, 3132 TLI.getShiftAmountTy())), 3133 Value); 3134 Shift <<= 1; 3135 } 3136 3137 return Value; 3138} 3139 3140/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3141/// used when a memcpy is turned into a memset when the source is a constant 3142/// string ptr. 3143static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3144 const TargetLowering &TLI, 3145 std::string &Str, unsigned Offset) { 3146 // Handle vector with all elements zero. 3147 if (Str.empty()) { 3148 if (VT.isInteger()) 3149 return DAG.getConstant(0, VT); 3150 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3151 VT.getSimpleVT().SimpleTy == MVT::f64) 3152 return DAG.getConstantFP(0.0, VT); 3153 else if (VT.isVector()) { 3154 unsigned NumElts = VT.getVectorNumElements(); 3155 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3156 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3157 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3158 EltVT, NumElts))); 3159 } else 3160 llvm_unreachable("Expected type!"); 3161 } 3162 3163 assert(!VT.isVector() && "Can't handle vector type here!"); 3164 unsigned NumBits = VT.getSizeInBits(); 3165 unsigned MSB = NumBits / 8; 3166 uint64_t Val = 0; 3167 if (TLI.isLittleEndian()) 3168 Offset = Offset + MSB - 1; 3169 for (unsigned i = 0; i != MSB; ++i) { 3170 Val = (Val << 8) | (unsigned char)Str[Offset]; 3171 Offset += TLI.isLittleEndian() ? -1 : 1; 3172 } 3173 return DAG.getConstant(Val, VT); 3174} 3175 3176/// getMemBasePlusOffset - Returns base and offset node for the 3177/// 3178static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3179 SelectionDAG &DAG) { 3180 EVT VT = Base.getValueType(); 3181 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3182 VT, Base, DAG.getConstant(Offset, VT)); 3183} 3184 3185/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3186/// 3187static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3188 unsigned SrcDelta = 0; 3189 GlobalAddressSDNode *G = NULL; 3190 if (Src.getOpcode() == ISD::GlobalAddress) 3191 G = cast<GlobalAddressSDNode>(Src); 3192 else if (Src.getOpcode() == ISD::ADD && 3193 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3194 Src.getOperand(1).getOpcode() == ISD::Constant) { 3195 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3196 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3197 } 3198 if (!G) 3199 return false; 3200 3201 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3202 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3203 return true; 3204 3205 return false; 3206} 3207 3208/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3209/// to replace the memset / memcpy. Return true if the number of memory ops 3210/// is below the threshold. It returns the types of the sequence of 3211/// memory ops to perform memset / memcpy by reference. 3212static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3213 unsigned Limit, uint64_t Size, 3214 unsigned DstAlign, unsigned SrcAlign, 3215 bool NonScalarIntSafe, 3216 bool MemcpyStrSrc, 3217 SelectionDAG &DAG, 3218 const TargetLowering &TLI) { 3219 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3220 "Expecting memcpy / memset source to meet alignment requirement!"); 3221 // If 'SrcAlign' is zero, that means the memory operation does not need load 3222 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3223 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3224 // specified alignment of the memory operation. If it is zero, that means 3225 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3226 // indicates whether the memcpy source is constant so it does not need to be 3227 // loaded. 3228 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3229 NonScalarIntSafe, MemcpyStrSrc, 3230 DAG.getMachineFunction()); 3231 3232 if (VT == MVT::Other) { 3233 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3234 TLI.allowsUnalignedMemoryAccesses(VT)) { 3235 VT = TLI.getPointerTy(); 3236 } else { 3237 switch (DstAlign & 7) { 3238 case 0: VT = MVT::i64; break; 3239 case 4: VT = MVT::i32; break; 3240 case 2: VT = MVT::i16; break; 3241 default: VT = MVT::i8; break; 3242 } 3243 } 3244 3245 MVT LVT = MVT::i64; 3246 while (!TLI.isTypeLegal(LVT)) 3247 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3248 assert(LVT.isInteger()); 3249 3250 if (VT.bitsGT(LVT)) 3251 VT = LVT; 3252 } 3253 3254 unsigned NumMemOps = 0; 3255 while (Size != 0) { 3256 unsigned VTSize = VT.getSizeInBits() / 8; 3257 while (VTSize > Size) { 3258 // For now, only use non-vector load / store's for the left-over pieces. 3259 if (VT.isVector() || VT.isFloatingPoint()) { 3260 VT = MVT::i64; 3261 while (!TLI.isTypeLegal(VT)) 3262 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3263 VTSize = VT.getSizeInBits() / 8; 3264 } else { 3265 // This can result in a type that is not legal on the target, e.g. 3266 // 1 or 2 bytes on PPC. 3267 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3268 VTSize >>= 1; 3269 } 3270 } 3271 3272 if (++NumMemOps > Limit) 3273 return false; 3274 MemOps.push_back(VT); 3275 Size -= VTSize; 3276 } 3277 3278 return true; 3279} 3280 3281static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3282 SDValue Chain, SDValue Dst, 3283 SDValue Src, uint64_t Size, 3284 unsigned Align, bool isVol, 3285 bool AlwaysInline, 3286 const Value *DstSV, uint64_t DstSVOff, 3287 const Value *SrcSV, uint64_t SrcSVOff) { 3288 // Turn a memcpy of undef to nop. 3289 if (Src.getOpcode() == ISD::UNDEF) 3290 return Chain; 3291 3292 // Expand memcpy to a series of load and store ops if the size operand falls 3293 // below a certain threshold. 3294 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3295 std::vector<EVT> MemOps; 3296 bool DstAlignCanChange = false; 3297 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3298 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3299 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3300 DstAlignCanChange = true; 3301 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3302 if (Align > SrcAlign) 3303 SrcAlign = Align; 3304 std::string Str; 3305 bool CopyFromStr = isMemSrcFromString(Src, Str); 3306 bool isZeroStr = CopyFromStr && Str.empty(); 3307 uint64_t Limit = -1ULL; 3308 if (!AlwaysInline) 3309 Limit = TLI.getMaxStoresPerMemcpy(); 3310 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3311 (DstAlignCanChange ? 0 : Align), 3312 (isZeroStr ? 0 : SrcAlign), 3313 true, CopyFromStr, DAG, TLI)) 3314 return SDValue(); 3315 3316 if (DstAlignCanChange) { 3317 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3318 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3319 if (NewAlign > Align) { 3320 // Give the stack frame object a larger alignment if needed. 3321 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3322 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3323 Align = NewAlign; 3324 } 3325 } 3326 3327 SmallVector<SDValue, 8> OutChains; 3328 unsigned NumMemOps = MemOps.size(); 3329 uint64_t SrcOff = 0, DstOff = 0; 3330 for (unsigned i = 0; i != NumMemOps; ++i) { 3331 EVT VT = MemOps[i]; 3332 unsigned VTSize = VT.getSizeInBits() / 8; 3333 SDValue Value, Store; 3334 3335 if (CopyFromStr && 3336 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3337 // It's unlikely a store of a vector immediate can be done in a single 3338 // instruction. It would require a load from a constantpool first. 3339 // We only handle zero vectors here. 3340 // FIXME: Handle other cases where store of vector immediate is done in 3341 // a single instruction. 3342 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3343 Store = DAG.getStore(Chain, dl, Value, 3344 getMemBasePlusOffset(Dst, DstOff, DAG), 3345 DstSV, DstSVOff + DstOff, isVol, false, Align); 3346 } else { 3347 // The type might not be legal for the target. This should only happen 3348 // if the type is smaller than a legal type, as on PPC, so the right 3349 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3350 // to Load/Store if NVT==VT. 3351 // FIXME does the case above also need this? 3352 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3353 assert(NVT.bitsGE(VT)); 3354 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3355 getMemBasePlusOffset(Src, SrcOff, DAG), 3356 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3357 MinAlign(SrcAlign, SrcOff)); 3358 Store = DAG.getTruncStore(Chain, dl, Value, 3359 getMemBasePlusOffset(Dst, DstOff, DAG), 3360 DstSV, DstSVOff + DstOff, VT, isVol, false, 3361 Align); 3362 } 3363 OutChains.push_back(Store); 3364 SrcOff += VTSize; 3365 DstOff += VTSize; 3366 } 3367 3368 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3369 &OutChains[0], OutChains.size()); 3370} 3371 3372static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3373 SDValue Chain, SDValue Dst, 3374 SDValue Src, uint64_t Size, 3375 unsigned Align, bool isVol, 3376 bool AlwaysInline, 3377 const Value *DstSV, uint64_t DstSVOff, 3378 const Value *SrcSV, uint64_t SrcSVOff) { 3379 // Turn a memmove of undef to nop. 3380 if (Src.getOpcode() == ISD::UNDEF) 3381 return Chain; 3382 3383 // Expand memmove to a series of load and store ops if the size operand falls 3384 // below a certain threshold. 3385 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3386 std::vector<EVT> MemOps; 3387 uint64_t Limit = -1ULL; 3388 if (!AlwaysInline) 3389 Limit = TLI.getMaxStoresPerMemmove(); 3390 bool DstAlignCanChange = false; 3391 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3392 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3393 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3394 DstAlignCanChange = true; 3395 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3396 if (Align > SrcAlign) 3397 SrcAlign = Align; 3398 3399 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3400 (DstAlignCanChange ? 0 : Align), 3401 SrcAlign, true, false, DAG, TLI)) 3402 return SDValue(); 3403 3404 if (DstAlignCanChange) { 3405 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3406 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3407 if (NewAlign > Align) { 3408 // Give the stack frame object a larger alignment if needed. 3409 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3410 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3411 Align = NewAlign; 3412 } 3413 } 3414 3415 uint64_t SrcOff = 0, DstOff = 0; 3416 SmallVector<SDValue, 8> LoadValues; 3417 SmallVector<SDValue, 8> LoadChains; 3418 SmallVector<SDValue, 8> OutChains; 3419 unsigned NumMemOps = MemOps.size(); 3420 for (unsigned i = 0; i < NumMemOps; i++) { 3421 EVT VT = MemOps[i]; 3422 unsigned VTSize = VT.getSizeInBits() / 8; 3423 SDValue Value, Store; 3424 3425 Value = DAG.getLoad(VT, dl, Chain, 3426 getMemBasePlusOffset(Src, SrcOff, DAG), 3427 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3428 LoadValues.push_back(Value); 3429 LoadChains.push_back(Value.getValue(1)); 3430 SrcOff += VTSize; 3431 } 3432 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3433 &LoadChains[0], LoadChains.size()); 3434 OutChains.clear(); 3435 for (unsigned i = 0; i < NumMemOps; i++) { 3436 EVT VT = MemOps[i]; 3437 unsigned VTSize = VT.getSizeInBits() / 8; 3438 SDValue Value, Store; 3439 3440 Store = DAG.getStore(Chain, dl, LoadValues[i], 3441 getMemBasePlusOffset(Dst, DstOff, DAG), 3442 DstSV, DstSVOff + DstOff, isVol, false, Align); 3443 OutChains.push_back(Store); 3444 DstOff += VTSize; 3445 } 3446 3447 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3448 &OutChains[0], OutChains.size()); 3449} 3450 3451static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3452 SDValue Chain, SDValue Dst, 3453 SDValue Src, uint64_t Size, 3454 unsigned Align, bool isVol, 3455 const Value *DstSV, uint64_t DstSVOff) { 3456 // Turn a memset of undef to nop. 3457 if (Src.getOpcode() == ISD::UNDEF) 3458 return Chain; 3459 3460 // Expand memset to a series of load/store ops if the size operand 3461 // falls below a certain threshold. 3462 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3463 std::vector<EVT> MemOps; 3464 bool DstAlignCanChange = false; 3465 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3466 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3467 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3468 DstAlignCanChange = true; 3469 bool NonScalarIntSafe = 3470 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3471 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3472 Size, (DstAlignCanChange ? 0 : Align), 0, 3473 NonScalarIntSafe, false, DAG, TLI)) 3474 return SDValue(); 3475 3476 if (DstAlignCanChange) { 3477 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3478 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3479 if (NewAlign > Align) { 3480 // Give the stack frame object a larger alignment if needed. 3481 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3482 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3483 Align = NewAlign; 3484 } 3485 } 3486 3487 SmallVector<SDValue, 8> OutChains; 3488 uint64_t DstOff = 0; 3489 unsigned NumMemOps = MemOps.size(); 3490 for (unsigned i = 0; i < NumMemOps; i++) { 3491 EVT VT = MemOps[i]; 3492 unsigned VTSize = VT.getSizeInBits() / 8; 3493 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3494 SDValue Store = DAG.getStore(Chain, dl, Value, 3495 getMemBasePlusOffset(Dst, DstOff, DAG), 3496 DstSV, DstSVOff + DstOff, isVol, false, 0); 3497 OutChains.push_back(Store); 3498 DstOff += VTSize; 3499 } 3500 3501 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3502 &OutChains[0], OutChains.size()); 3503} 3504 3505SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3506 SDValue Src, SDValue Size, 3507 unsigned Align, bool isVol, bool AlwaysInline, 3508 const Value *DstSV, uint64_t DstSVOff, 3509 const Value *SrcSV, uint64_t SrcSVOff) { 3510 3511 // Check to see if we should lower the memcpy to loads and stores first. 3512 // For cases within the target-specified limits, this is the best choice. 3513 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3514 if (ConstantSize) { 3515 // Memcpy with size zero? Just return the original chain. 3516 if (ConstantSize->isNullValue()) 3517 return Chain; 3518 3519 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3520 ConstantSize->getZExtValue(),Align, 3521 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3522 if (Result.getNode()) 3523 return Result; 3524 } 3525 3526 // Then check to see if we should lower the memcpy with target-specific 3527 // code. If the target chooses to do this, this is the next best. 3528 SDValue Result = 3529 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3530 isVol, AlwaysInline, 3531 DstSV, DstSVOff, SrcSV, SrcSVOff); 3532 if (Result.getNode()) 3533 return Result; 3534 3535 // If we really need inline code and the target declined to provide it, 3536 // use a (potentially long) sequence of loads and stores. 3537 if (AlwaysInline) { 3538 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3539 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3540 ConstantSize->getZExtValue(), Align, isVol, 3541 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3542 } 3543 3544 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3545 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3546 // respect volatile, so they may do things like read or write memory 3547 // beyond the given memory regions. But fixing this isn't easy, and most 3548 // people don't care. 3549 3550 // Emit a library call. 3551 TargetLowering::ArgListTy Args; 3552 TargetLowering::ArgListEntry Entry; 3553 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3554 Entry.Node = Dst; Args.push_back(Entry); 3555 Entry.Node = Src; Args.push_back(Entry); 3556 Entry.Node = Size; Args.push_back(Entry); 3557 // FIXME: pass in DebugLoc 3558 std::pair<SDValue,SDValue> CallResult = 3559 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3560 false, false, false, false, 0, 3561 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3562 /*isReturnValueUsed=*/false, 3563 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3564 TLI.getPointerTy()), 3565 Args, *this, dl); 3566 return CallResult.second; 3567} 3568 3569SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3570 SDValue Src, SDValue Size, 3571 unsigned Align, bool isVol, 3572 const Value *DstSV, uint64_t DstSVOff, 3573 const Value *SrcSV, uint64_t SrcSVOff) { 3574 3575 // Check to see if we should lower the memmove to loads and stores first. 3576 // For cases within the target-specified limits, this is the best choice. 3577 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3578 if (ConstantSize) { 3579 // Memmove with size zero? Just return the original chain. 3580 if (ConstantSize->isNullValue()) 3581 return Chain; 3582 3583 SDValue Result = 3584 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3585 ConstantSize->getZExtValue(), Align, isVol, 3586 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3587 if (Result.getNode()) 3588 return Result; 3589 } 3590 3591 // Then check to see if we should lower the memmove with target-specific 3592 // code. If the target chooses to do this, this is the next best. 3593 SDValue Result = 3594 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3595 DstSV, DstSVOff, SrcSV, SrcSVOff); 3596 if (Result.getNode()) 3597 return Result; 3598 3599 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3600 // not be safe. See memcpy above for more details. 3601 3602 // Emit a library call. 3603 TargetLowering::ArgListTy Args; 3604 TargetLowering::ArgListEntry Entry; 3605 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3606 Entry.Node = Dst; Args.push_back(Entry); 3607 Entry.Node = Src; Args.push_back(Entry); 3608 Entry.Node = Size; Args.push_back(Entry); 3609 // FIXME: pass in DebugLoc 3610 std::pair<SDValue,SDValue> CallResult = 3611 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3612 false, false, false, false, 0, 3613 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3614 /*isReturnValueUsed=*/false, 3615 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3616 TLI.getPointerTy()), 3617 Args, *this, dl); 3618 return CallResult.second; 3619} 3620 3621SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3622 SDValue Src, SDValue Size, 3623 unsigned Align, bool isVol, 3624 const Value *DstSV, uint64_t DstSVOff) { 3625 3626 // Check to see if we should lower the memset to stores first. 3627 // For cases within the target-specified limits, this is the best choice. 3628 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3629 if (ConstantSize) { 3630 // Memset with size zero? Just return the original chain. 3631 if (ConstantSize->isNullValue()) 3632 return Chain; 3633 3634 SDValue Result = 3635 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3636 Align, isVol, DstSV, DstSVOff); 3637 3638 if (Result.getNode()) 3639 return Result; 3640 } 3641 3642 // Then check to see if we should lower the memset with target-specific 3643 // code. If the target chooses to do this, this is the next best. 3644 SDValue Result = 3645 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3646 DstSV, DstSVOff); 3647 if (Result.getNode()) 3648 return Result; 3649 3650 // Emit a library call. 3651 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3652 TargetLowering::ArgListTy Args; 3653 TargetLowering::ArgListEntry Entry; 3654 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3655 Args.push_back(Entry); 3656 // Extend or truncate the argument to be an i32 value for the call. 3657 if (Src.getValueType().bitsGT(MVT::i32)) 3658 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3659 else 3660 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3661 Entry.Node = Src; 3662 Entry.Ty = Type::getInt32Ty(*getContext()); 3663 Entry.isSExt = true; 3664 Args.push_back(Entry); 3665 Entry.Node = Size; 3666 Entry.Ty = IntPtrTy; 3667 Entry.isSExt = false; 3668 Args.push_back(Entry); 3669 // FIXME: pass in DebugLoc 3670 std::pair<SDValue,SDValue> CallResult = 3671 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3672 false, false, false, false, 0, 3673 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3674 /*isReturnValueUsed=*/false, 3675 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3676 TLI.getPointerTy()), 3677 Args, *this, dl); 3678 return CallResult.second; 3679} 3680 3681SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3682 SDValue Chain, 3683 SDValue Ptr, SDValue Cmp, 3684 SDValue Swp, const Value* PtrVal, 3685 unsigned Alignment) { 3686 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3687 Alignment = getEVTAlignment(MemVT); 3688 3689 // Check if the memory reference references a frame index 3690 if (!PtrVal) 3691 if (const FrameIndexSDNode *FI = 3692 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3693 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3694 3695 MachineFunction &MF = getMachineFunction(); 3696 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3697 3698 // For now, atomics are considered to be volatile always. 3699 Flags |= MachineMemOperand::MOVolatile; 3700 3701 MachineMemOperand *MMO = 3702 MF.getMachineMemOperand(PtrVal, Flags, 0, 3703 MemVT.getStoreSize(), Alignment); 3704 3705 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3706} 3707 3708SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3709 SDValue Chain, 3710 SDValue Ptr, SDValue Cmp, 3711 SDValue Swp, MachineMemOperand *MMO) { 3712 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3713 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3714 3715 EVT VT = Cmp.getValueType(); 3716 3717 SDVTList VTs = getVTList(VT, MVT::Other); 3718 FoldingSetNodeID ID; 3719 ID.AddInteger(MemVT.getRawBits()); 3720 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3721 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3722 void* IP = 0; 3723 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3724 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3725 return SDValue(E, 0); 3726 } 3727 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3728 Ptr, Cmp, Swp, MMO); 3729 CSEMap.InsertNode(N, IP); 3730 AllNodes.push_back(N); 3731 return SDValue(N, 0); 3732} 3733 3734SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3735 SDValue Chain, 3736 SDValue Ptr, SDValue Val, 3737 const Value* PtrVal, 3738 unsigned Alignment) { 3739 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3740 Alignment = getEVTAlignment(MemVT); 3741 3742 // Check if the memory reference references a frame index 3743 if (!PtrVal) 3744 if (const FrameIndexSDNode *FI = 3745 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3746 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3747 3748 MachineFunction &MF = getMachineFunction(); 3749 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3750 3751 // For now, atomics are considered to be volatile always. 3752 Flags |= MachineMemOperand::MOVolatile; 3753 3754 MachineMemOperand *MMO = 3755 MF.getMachineMemOperand(PtrVal, Flags, 0, 3756 MemVT.getStoreSize(), Alignment); 3757 3758 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3759} 3760 3761SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3762 SDValue Chain, 3763 SDValue Ptr, SDValue Val, 3764 MachineMemOperand *MMO) { 3765 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3766 Opcode == ISD::ATOMIC_LOAD_SUB || 3767 Opcode == ISD::ATOMIC_LOAD_AND || 3768 Opcode == ISD::ATOMIC_LOAD_OR || 3769 Opcode == ISD::ATOMIC_LOAD_XOR || 3770 Opcode == ISD::ATOMIC_LOAD_NAND || 3771 Opcode == ISD::ATOMIC_LOAD_MIN || 3772 Opcode == ISD::ATOMIC_LOAD_MAX || 3773 Opcode == ISD::ATOMIC_LOAD_UMIN || 3774 Opcode == ISD::ATOMIC_LOAD_UMAX || 3775 Opcode == ISD::ATOMIC_SWAP) && 3776 "Invalid Atomic Op"); 3777 3778 EVT VT = Val.getValueType(); 3779 3780 SDVTList VTs = getVTList(VT, MVT::Other); 3781 FoldingSetNodeID ID; 3782 ID.AddInteger(MemVT.getRawBits()); 3783 SDValue Ops[] = {Chain, Ptr, Val}; 3784 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3785 void* IP = 0; 3786 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3787 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3788 return SDValue(E, 0); 3789 } 3790 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3791 Ptr, Val, MMO); 3792 CSEMap.InsertNode(N, IP); 3793 AllNodes.push_back(N); 3794 return SDValue(N, 0); 3795} 3796 3797/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3798/// Allowed to return something different (and simpler) if Simplify is true. 3799SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3800 DebugLoc dl) { 3801 if (NumOps == 1) 3802 return Ops[0]; 3803 3804 SmallVector<EVT, 4> VTs; 3805 VTs.reserve(NumOps); 3806 for (unsigned i = 0; i < NumOps; ++i) 3807 VTs.push_back(Ops[i].getValueType()); 3808 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3809 Ops, NumOps); 3810} 3811 3812SDValue 3813SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3814 const EVT *VTs, unsigned NumVTs, 3815 const SDValue *Ops, unsigned NumOps, 3816 EVT MemVT, const Value *srcValue, int SVOff, 3817 unsigned Align, bool Vol, 3818 bool ReadMem, bool WriteMem) { 3819 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3820 MemVT, srcValue, SVOff, Align, Vol, 3821 ReadMem, WriteMem); 3822} 3823 3824SDValue 3825SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3826 const SDValue *Ops, unsigned NumOps, 3827 EVT MemVT, const Value *srcValue, int SVOff, 3828 unsigned Align, bool Vol, 3829 bool ReadMem, bool WriteMem) { 3830 if (Align == 0) // Ensure that codegen never sees alignment 0 3831 Align = getEVTAlignment(MemVT); 3832 3833 MachineFunction &MF = getMachineFunction(); 3834 unsigned Flags = 0; 3835 if (WriteMem) 3836 Flags |= MachineMemOperand::MOStore; 3837 if (ReadMem) 3838 Flags |= MachineMemOperand::MOLoad; 3839 if (Vol) 3840 Flags |= MachineMemOperand::MOVolatile; 3841 MachineMemOperand *MMO = 3842 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3843 MemVT.getStoreSize(), Align); 3844 3845 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3846} 3847 3848SDValue 3849SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3850 const SDValue *Ops, unsigned NumOps, 3851 EVT MemVT, MachineMemOperand *MMO) { 3852 assert((Opcode == ISD::INTRINSIC_VOID || 3853 Opcode == ISD::INTRINSIC_W_CHAIN || 3854 (Opcode <= INT_MAX && 3855 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3856 "Opcode is not a memory-accessing opcode!"); 3857 3858 // Memoize the node unless it returns a flag. 3859 MemIntrinsicSDNode *N; 3860 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3861 FoldingSetNodeID ID; 3862 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3863 void *IP = 0; 3864 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3865 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3866 return SDValue(E, 0); 3867 } 3868 3869 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3870 MemVT, MMO); 3871 CSEMap.InsertNode(N, IP); 3872 } else { 3873 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3874 MemVT, MMO); 3875 } 3876 AllNodes.push_back(N); 3877 return SDValue(N, 0); 3878} 3879 3880SDValue 3881SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3882 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3883 SDValue Ptr, SDValue Offset, 3884 const Value *SV, int SVOffset, EVT MemVT, 3885 bool isVolatile, bool isNonTemporal, 3886 unsigned Alignment) { 3887 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3888 Alignment = getEVTAlignment(VT); 3889 3890 // Check if the memory reference references a frame index 3891 if (!SV) 3892 if (const FrameIndexSDNode *FI = 3893 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3894 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3895 3896 MachineFunction &MF = getMachineFunction(); 3897 unsigned Flags = MachineMemOperand::MOLoad; 3898 if (isVolatile) 3899 Flags |= MachineMemOperand::MOVolatile; 3900 if (isNonTemporal) 3901 Flags |= MachineMemOperand::MONonTemporal; 3902 MachineMemOperand *MMO = 3903 MF.getMachineMemOperand(SV, Flags, SVOffset, 3904 MemVT.getStoreSize(), Alignment); 3905 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3906} 3907 3908SDValue 3909SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3910 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3911 SDValue Ptr, SDValue Offset, EVT MemVT, 3912 MachineMemOperand *MMO) { 3913 if (VT == MemVT) { 3914 ExtType = ISD::NON_EXTLOAD; 3915 } else if (ExtType == ISD::NON_EXTLOAD) { 3916 assert(VT == MemVT && "Non-extending load from different memory type!"); 3917 } else { 3918 // Extending load. 3919 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3920 "Should only be an extending load, not truncating!"); 3921 assert(VT.isInteger() == MemVT.isInteger() && 3922 "Cannot convert from FP to Int or Int -> FP!"); 3923 assert(VT.isVector() == MemVT.isVector() && 3924 "Cannot use trunc store to convert to or from a vector!"); 3925 assert((!VT.isVector() || 3926 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3927 "Cannot use trunc store to change the number of vector elements!"); 3928 } 3929 3930 bool Indexed = AM != ISD::UNINDEXED; 3931 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3932 "Unindexed load with an offset!"); 3933 3934 SDVTList VTs = Indexed ? 3935 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3936 SDValue Ops[] = { Chain, Ptr, Offset }; 3937 FoldingSetNodeID ID; 3938 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3939 ID.AddInteger(MemVT.getRawBits()); 3940 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3941 MMO->isNonTemporal())); 3942 void *IP = 0; 3943 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3944 cast<LoadSDNode>(E)->refineAlignment(MMO); 3945 return SDValue(E, 0); 3946 } 3947 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3948 MemVT, MMO); 3949 CSEMap.InsertNode(N, IP); 3950 AllNodes.push_back(N); 3951 return SDValue(N, 0); 3952} 3953 3954SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3955 SDValue Chain, SDValue Ptr, 3956 const Value *SV, int SVOffset, 3957 bool isVolatile, bool isNonTemporal, 3958 unsigned Alignment) { 3959 SDValue Undef = getUNDEF(Ptr.getValueType()); 3960 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3961 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3962} 3963 3964SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3965 SDValue Chain, SDValue Ptr, 3966 const Value *SV, 3967 int SVOffset, EVT MemVT, 3968 bool isVolatile, bool isNonTemporal, 3969 unsigned Alignment) { 3970 SDValue Undef = getUNDEF(Ptr.getValueType()); 3971 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3972 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3973} 3974 3975SDValue 3976SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3977 SDValue Offset, ISD::MemIndexedMode AM) { 3978 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3979 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3980 "Load is already a indexed load!"); 3981 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3982 LD->getChain(), Base, Offset, LD->getSrcValue(), 3983 LD->getSrcValueOffset(), LD->getMemoryVT(), 3984 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3985} 3986 3987SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3988 SDValue Ptr, const Value *SV, int SVOffset, 3989 bool isVolatile, bool isNonTemporal, 3990 unsigned Alignment) { 3991 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3992 Alignment = getEVTAlignment(Val.getValueType()); 3993 3994 // Check if the memory reference references a frame index 3995 if (!SV) 3996 if (const FrameIndexSDNode *FI = 3997 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3998 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3999 4000 MachineFunction &MF = getMachineFunction(); 4001 unsigned Flags = MachineMemOperand::MOStore; 4002 if (isVolatile) 4003 Flags |= MachineMemOperand::MOVolatile; 4004 if (isNonTemporal) 4005 Flags |= MachineMemOperand::MONonTemporal; 4006 MachineMemOperand *MMO = 4007 MF.getMachineMemOperand(SV, Flags, SVOffset, 4008 Val.getValueType().getStoreSize(), Alignment); 4009 4010 return getStore(Chain, dl, Val, Ptr, MMO); 4011} 4012 4013SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4014 SDValue Ptr, MachineMemOperand *MMO) { 4015 EVT VT = Val.getValueType(); 4016 SDVTList VTs = getVTList(MVT::Other); 4017 SDValue Undef = getUNDEF(Ptr.getValueType()); 4018 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4019 FoldingSetNodeID ID; 4020 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4021 ID.AddInteger(VT.getRawBits()); 4022 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4023 MMO->isNonTemporal())); 4024 void *IP = 0; 4025 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4026 cast<StoreSDNode>(E)->refineAlignment(MMO); 4027 return SDValue(E, 0); 4028 } 4029 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4030 false, VT, MMO); 4031 CSEMap.InsertNode(N, IP); 4032 AllNodes.push_back(N); 4033 return SDValue(N, 0); 4034} 4035 4036SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4037 SDValue Ptr, const Value *SV, 4038 int SVOffset, EVT SVT, 4039 bool isVolatile, bool isNonTemporal, 4040 unsigned Alignment) { 4041 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4042 Alignment = getEVTAlignment(SVT); 4043 4044 // Check if the memory reference references a frame index 4045 if (!SV) 4046 if (const FrameIndexSDNode *FI = 4047 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4048 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4049 4050 MachineFunction &MF = getMachineFunction(); 4051 unsigned Flags = MachineMemOperand::MOStore; 4052 if (isVolatile) 4053 Flags |= MachineMemOperand::MOVolatile; 4054 if (isNonTemporal) 4055 Flags |= MachineMemOperand::MONonTemporal; 4056 MachineMemOperand *MMO = 4057 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4058 4059 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4060} 4061 4062SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4063 SDValue Ptr, EVT SVT, 4064 MachineMemOperand *MMO) { 4065 EVT VT = Val.getValueType(); 4066 4067 if (VT == SVT) 4068 return getStore(Chain, dl, Val, Ptr, MMO); 4069 4070 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4071 "Should only be a truncating store, not extending!"); 4072 assert(VT.isInteger() == SVT.isInteger() && 4073 "Can't do FP-INT conversion!"); 4074 assert(VT.isVector() == SVT.isVector() && 4075 "Cannot use trunc store to convert to or from a vector!"); 4076 assert((!VT.isVector() || 4077 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4078 "Cannot use trunc store to change the number of vector elements!"); 4079 4080 SDVTList VTs = getVTList(MVT::Other); 4081 SDValue Undef = getUNDEF(Ptr.getValueType()); 4082 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4083 FoldingSetNodeID ID; 4084 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4085 ID.AddInteger(SVT.getRawBits()); 4086 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4087 MMO->isNonTemporal())); 4088 void *IP = 0; 4089 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4090 cast<StoreSDNode>(E)->refineAlignment(MMO); 4091 return SDValue(E, 0); 4092 } 4093 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4094 true, SVT, MMO); 4095 CSEMap.InsertNode(N, IP); 4096 AllNodes.push_back(N); 4097 return SDValue(N, 0); 4098} 4099 4100SDValue 4101SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4102 SDValue Offset, ISD::MemIndexedMode AM) { 4103 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4104 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4105 "Store is already a indexed store!"); 4106 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4107 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4108 FoldingSetNodeID ID; 4109 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4110 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4111 ID.AddInteger(ST->getRawSubclassData()); 4112 void *IP = 0; 4113 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4114 return SDValue(E, 0); 4115 4116 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4117 ST->isTruncatingStore(), 4118 ST->getMemoryVT(), 4119 ST->getMemOperand()); 4120 CSEMap.InsertNode(N, IP); 4121 AllNodes.push_back(N); 4122 return SDValue(N, 0); 4123} 4124 4125SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4126 SDValue Chain, SDValue Ptr, 4127 SDValue SV) { 4128 SDValue Ops[] = { Chain, Ptr, SV }; 4129 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4130} 4131 4132SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4133 const SDUse *Ops, unsigned NumOps) { 4134 switch (NumOps) { 4135 case 0: return getNode(Opcode, DL, VT); 4136 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4137 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4138 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4139 default: break; 4140 } 4141 4142 // Copy from an SDUse array into an SDValue array for use with 4143 // the regular getNode logic. 4144 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4145 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4146} 4147 4148SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4149 const SDValue *Ops, unsigned NumOps) { 4150 switch (NumOps) { 4151 case 0: return getNode(Opcode, DL, VT); 4152 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4153 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4154 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4155 default: break; 4156 } 4157 4158 switch (Opcode) { 4159 default: break; 4160 case ISD::SELECT_CC: { 4161 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4162 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4163 "LHS and RHS of condition must have same type!"); 4164 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4165 "True and False arms of SelectCC must have same type!"); 4166 assert(Ops[2].getValueType() == VT && 4167 "select_cc node must be of same type as true and false value!"); 4168 break; 4169 } 4170 case ISD::BR_CC: { 4171 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4172 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4173 "LHS/RHS of comparison should match types!"); 4174 break; 4175 } 4176 } 4177 4178 // Memoize nodes. 4179 SDNode *N; 4180 SDVTList VTs = getVTList(VT); 4181 4182 if (VT != MVT::Flag) { 4183 FoldingSetNodeID ID; 4184 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4185 void *IP = 0; 4186 4187 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4188 return SDValue(E, 0); 4189 4190 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4191 CSEMap.InsertNode(N, IP); 4192 } else { 4193 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4194 } 4195 4196 AllNodes.push_back(N); 4197#ifndef NDEBUG 4198 VerifyNode(N); 4199#endif 4200 return SDValue(N, 0); 4201} 4202 4203SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4204 const std::vector<EVT> &ResultTys, 4205 const SDValue *Ops, unsigned NumOps) { 4206 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4207 Ops, NumOps); 4208} 4209 4210SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4211 const EVT *VTs, unsigned NumVTs, 4212 const SDValue *Ops, unsigned NumOps) { 4213 if (NumVTs == 1) 4214 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4215 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4216} 4217 4218SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4219 const SDValue *Ops, unsigned NumOps) { 4220 if (VTList.NumVTs == 1) 4221 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4222 4223#if 0 4224 switch (Opcode) { 4225 // FIXME: figure out how to safely handle things like 4226 // int foo(int x) { return 1 << (x & 255); } 4227 // int bar() { return foo(256); } 4228 case ISD::SRA_PARTS: 4229 case ISD::SRL_PARTS: 4230 case ISD::SHL_PARTS: 4231 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4232 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4233 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4234 else if (N3.getOpcode() == ISD::AND) 4235 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4236 // If the and is only masking out bits that cannot effect the shift, 4237 // eliminate the and. 4238 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4239 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4240 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4241 } 4242 break; 4243 } 4244#endif 4245 4246 // Memoize the node unless it returns a flag. 4247 SDNode *N; 4248 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4249 FoldingSetNodeID ID; 4250 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4251 void *IP = 0; 4252 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4253 return SDValue(E, 0); 4254 4255 if (NumOps == 1) { 4256 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4257 } else if (NumOps == 2) { 4258 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4259 } else if (NumOps == 3) { 4260 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4261 Ops[2]); 4262 } else { 4263 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4264 } 4265 CSEMap.InsertNode(N, IP); 4266 } else { 4267 if (NumOps == 1) { 4268 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4269 } else if (NumOps == 2) { 4270 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4271 } else if (NumOps == 3) { 4272 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4273 Ops[2]); 4274 } else { 4275 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4276 } 4277 } 4278 AllNodes.push_back(N); 4279#ifndef NDEBUG 4280 VerifyNode(N); 4281#endif 4282 return SDValue(N, 0); 4283} 4284 4285SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4286 return getNode(Opcode, DL, VTList, 0, 0); 4287} 4288 4289SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4290 SDValue N1) { 4291 SDValue Ops[] = { N1 }; 4292 return getNode(Opcode, DL, VTList, Ops, 1); 4293} 4294 4295SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4296 SDValue N1, SDValue N2) { 4297 SDValue Ops[] = { N1, N2 }; 4298 return getNode(Opcode, DL, VTList, Ops, 2); 4299} 4300 4301SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4302 SDValue N1, SDValue N2, SDValue N3) { 4303 SDValue Ops[] = { N1, N2, N3 }; 4304 return getNode(Opcode, DL, VTList, Ops, 3); 4305} 4306 4307SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4308 SDValue N1, SDValue N2, SDValue N3, 4309 SDValue N4) { 4310 SDValue Ops[] = { N1, N2, N3, N4 }; 4311 return getNode(Opcode, DL, VTList, Ops, 4); 4312} 4313 4314SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4315 SDValue N1, SDValue N2, SDValue N3, 4316 SDValue N4, SDValue N5) { 4317 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4318 return getNode(Opcode, DL, VTList, Ops, 5); 4319} 4320 4321SDVTList SelectionDAG::getVTList(EVT VT) { 4322 return makeVTList(SDNode::getValueTypeList(VT), 1); 4323} 4324 4325SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4326 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4327 E = VTList.rend(); I != E; ++I) 4328 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4329 return *I; 4330 4331 EVT *Array = Allocator.Allocate<EVT>(2); 4332 Array[0] = VT1; 4333 Array[1] = VT2; 4334 SDVTList Result = makeVTList(Array, 2); 4335 VTList.push_back(Result); 4336 return Result; 4337} 4338 4339SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4340 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4341 E = VTList.rend(); I != E; ++I) 4342 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4343 I->VTs[2] == VT3) 4344 return *I; 4345 4346 EVT *Array = Allocator.Allocate<EVT>(3); 4347 Array[0] = VT1; 4348 Array[1] = VT2; 4349 Array[2] = VT3; 4350 SDVTList Result = makeVTList(Array, 3); 4351 VTList.push_back(Result); 4352 return Result; 4353} 4354 4355SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4356 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4357 E = VTList.rend(); I != E; ++I) 4358 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4359 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4360 return *I; 4361 4362 EVT *Array = Allocator.Allocate<EVT>(4); 4363 Array[0] = VT1; 4364 Array[1] = VT2; 4365 Array[2] = VT3; 4366 Array[3] = VT4; 4367 SDVTList Result = makeVTList(Array, 4); 4368 VTList.push_back(Result); 4369 return Result; 4370} 4371 4372SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4373 switch (NumVTs) { 4374 case 0: llvm_unreachable("Cannot have nodes without results!"); 4375 case 1: return getVTList(VTs[0]); 4376 case 2: return getVTList(VTs[0], VTs[1]); 4377 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4378 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4379 default: break; 4380 } 4381 4382 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4383 E = VTList.rend(); I != E; ++I) { 4384 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4385 continue; 4386 4387 bool NoMatch = false; 4388 for (unsigned i = 2; i != NumVTs; ++i) 4389 if (VTs[i] != I->VTs[i]) { 4390 NoMatch = true; 4391 break; 4392 } 4393 if (!NoMatch) 4394 return *I; 4395 } 4396 4397 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4398 std::copy(VTs, VTs+NumVTs, Array); 4399 SDVTList Result = makeVTList(Array, NumVTs); 4400 VTList.push_back(Result); 4401 return Result; 4402} 4403 4404 4405/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4406/// specified operands. If the resultant node already exists in the DAG, 4407/// this does not modify the specified node, instead it returns the node that 4408/// already exists. If the resultant node does not exist in the DAG, the 4409/// input node is returned. As a degenerate case, if you specify the same 4410/// input operands as the node already has, the input node is returned. 4411SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4412 SDNode *N = InN.getNode(); 4413 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4414 4415 // Check to see if there is no change. 4416 if (Op == N->getOperand(0)) return InN; 4417 4418 // See if the modified node already exists. 4419 void *InsertPos = 0; 4420 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4421 return SDValue(Existing, InN.getResNo()); 4422 4423 // Nope it doesn't. Remove the node from its current place in the maps. 4424 if (InsertPos) 4425 if (!RemoveNodeFromCSEMaps(N)) 4426 InsertPos = 0; 4427 4428 // Now we update the operands. 4429 N->OperandList[0].set(Op); 4430 4431 // If this gets put into a CSE map, add it. 4432 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4433 return InN; 4434} 4435 4436SDValue SelectionDAG:: 4437UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4438 SDNode *N = InN.getNode(); 4439 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4440 4441 // Check to see if there is no change. 4442 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4443 return InN; // No operands changed, just return the input node. 4444 4445 // See if the modified node already exists. 4446 void *InsertPos = 0; 4447 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4448 return SDValue(Existing, InN.getResNo()); 4449 4450 // Nope it doesn't. Remove the node from its current place in the maps. 4451 if (InsertPos) 4452 if (!RemoveNodeFromCSEMaps(N)) 4453 InsertPos = 0; 4454 4455 // Now we update the operands. 4456 if (N->OperandList[0] != Op1) 4457 N->OperandList[0].set(Op1); 4458 if (N->OperandList[1] != Op2) 4459 N->OperandList[1].set(Op2); 4460 4461 // If this gets put into a CSE map, add it. 4462 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4463 return InN; 4464} 4465 4466SDValue SelectionDAG:: 4467UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4468 SDValue Ops[] = { Op1, Op2, Op3 }; 4469 return UpdateNodeOperands(N, Ops, 3); 4470} 4471 4472SDValue SelectionDAG:: 4473UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4474 SDValue Op3, SDValue Op4) { 4475 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4476 return UpdateNodeOperands(N, Ops, 4); 4477} 4478 4479SDValue SelectionDAG:: 4480UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4481 SDValue Op3, SDValue Op4, SDValue Op5) { 4482 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4483 return UpdateNodeOperands(N, Ops, 5); 4484} 4485 4486SDValue SelectionDAG:: 4487UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4488 SDNode *N = InN.getNode(); 4489 assert(N->getNumOperands() == NumOps && 4490 "Update with wrong number of operands"); 4491 4492 // Check to see if there is no change. 4493 bool AnyChange = false; 4494 for (unsigned i = 0; i != NumOps; ++i) { 4495 if (Ops[i] != N->getOperand(i)) { 4496 AnyChange = true; 4497 break; 4498 } 4499 } 4500 4501 // No operands changed, just return the input node. 4502 if (!AnyChange) return InN; 4503 4504 // See if the modified node already exists. 4505 void *InsertPos = 0; 4506 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4507 return SDValue(Existing, InN.getResNo()); 4508 4509 // Nope it doesn't. Remove the node from its current place in the maps. 4510 if (InsertPos) 4511 if (!RemoveNodeFromCSEMaps(N)) 4512 InsertPos = 0; 4513 4514 // Now we update the operands. 4515 for (unsigned i = 0; i != NumOps; ++i) 4516 if (N->OperandList[i] != Ops[i]) 4517 N->OperandList[i].set(Ops[i]); 4518 4519 // If this gets put into a CSE map, add it. 4520 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4521 return InN; 4522} 4523 4524/// DropOperands - Release the operands and set this node to have 4525/// zero operands. 4526void SDNode::DropOperands() { 4527 // Unlike the code in MorphNodeTo that does this, we don't need to 4528 // watch for dead nodes here. 4529 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4530 SDUse &Use = *I++; 4531 Use.set(SDValue()); 4532 } 4533} 4534 4535/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4536/// machine opcode. 4537/// 4538SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4539 EVT VT) { 4540 SDVTList VTs = getVTList(VT); 4541 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4542} 4543 4544SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4545 EVT VT, SDValue Op1) { 4546 SDVTList VTs = getVTList(VT); 4547 SDValue Ops[] = { Op1 }; 4548 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4549} 4550 4551SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4552 EVT VT, SDValue Op1, 4553 SDValue Op2) { 4554 SDVTList VTs = getVTList(VT); 4555 SDValue Ops[] = { Op1, Op2 }; 4556 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4557} 4558 4559SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4560 EVT VT, SDValue Op1, 4561 SDValue Op2, SDValue Op3) { 4562 SDVTList VTs = getVTList(VT); 4563 SDValue Ops[] = { Op1, Op2, Op3 }; 4564 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4565} 4566 4567SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4568 EVT VT, const SDValue *Ops, 4569 unsigned NumOps) { 4570 SDVTList VTs = getVTList(VT); 4571 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4572} 4573 4574SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4575 EVT VT1, EVT VT2, const SDValue *Ops, 4576 unsigned NumOps) { 4577 SDVTList VTs = getVTList(VT1, VT2); 4578 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4579} 4580 4581SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4582 EVT VT1, EVT VT2) { 4583 SDVTList VTs = getVTList(VT1, VT2); 4584 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4585} 4586 4587SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4588 EVT VT1, EVT VT2, EVT VT3, 4589 const SDValue *Ops, unsigned NumOps) { 4590 SDVTList VTs = getVTList(VT1, VT2, VT3); 4591 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4592} 4593 4594SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4595 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4596 const SDValue *Ops, unsigned NumOps) { 4597 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4598 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4599} 4600 4601SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4602 EVT VT1, EVT VT2, 4603 SDValue Op1) { 4604 SDVTList VTs = getVTList(VT1, VT2); 4605 SDValue Ops[] = { Op1 }; 4606 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4607} 4608 4609SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4610 EVT VT1, EVT VT2, 4611 SDValue Op1, SDValue Op2) { 4612 SDVTList VTs = getVTList(VT1, VT2); 4613 SDValue Ops[] = { Op1, Op2 }; 4614 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4615} 4616 4617SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4618 EVT VT1, EVT VT2, 4619 SDValue Op1, SDValue Op2, 4620 SDValue Op3) { 4621 SDVTList VTs = getVTList(VT1, VT2); 4622 SDValue Ops[] = { Op1, Op2, Op3 }; 4623 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4624} 4625 4626SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4627 EVT VT1, EVT VT2, EVT VT3, 4628 SDValue Op1, SDValue Op2, 4629 SDValue Op3) { 4630 SDVTList VTs = getVTList(VT1, VT2, VT3); 4631 SDValue Ops[] = { Op1, Op2, Op3 }; 4632 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4633} 4634 4635SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4636 SDVTList VTs, const SDValue *Ops, 4637 unsigned NumOps) { 4638 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4639 // Reset the NodeID to -1. 4640 N->setNodeId(-1); 4641 return N; 4642} 4643 4644/// MorphNodeTo - This *mutates* the specified node to have the specified 4645/// return type, opcode, and operands. 4646/// 4647/// Note that MorphNodeTo returns the resultant node. If there is already a 4648/// node of the specified opcode and operands, it returns that node instead of 4649/// the current one. Note that the DebugLoc need not be the same. 4650/// 4651/// Using MorphNodeTo is faster than creating a new node and swapping it in 4652/// with ReplaceAllUsesWith both because it often avoids allocating a new 4653/// node, and because it doesn't require CSE recalculation for any of 4654/// the node's users. 4655/// 4656SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4657 SDVTList VTs, const SDValue *Ops, 4658 unsigned NumOps) { 4659 // If an identical node already exists, use it. 4660 void *IP = 0; 4661 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4662 FoldingSetNodeID ID; 4663 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4664 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4665 return ON; 4666 } 4667 4668 if (!RemoveNodeFromCSEMaps(N)) 4669 IP = 0; 4670 4671 // Start the morphing. 4672 N->NodeType = Opc; 4673 N->ValueList = VTs.VTs; 4674 N->NumValues = VTs.NumVTs; 4675 4676 // Clear the operands list, updating used nodes to remove this from their 4677 // use list. Keep track of any operands that become dead as a result. 4678 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4679 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4680 SDUse &Use = *I++; 4681 SDNode *Used = Use.getNode(); 4682 Use.set(SDValue()); 4683 if (Used->use_empty()) 4684 DeadNodeSet.insert(Used); 4685 } 4686 4687 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4688 // Initialize the memory references information. 4689 MN->setMemRefs(0, 0); 4690 // If NumOps is larger than the # of operands we can have in a 4691 // MachineSDNode, reallocate the operand list. 4692 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4693 if (MN->OperandsNeedDelete) 4694 delete[] MN->OperandList; 4695 if (NumOps > array_lengthof(MN->LocalOperands)) 4696 // We're creating a final node that will live unmorphed for the 4697 // remainder of the current SelectionDAG iteration, so we can allocate 4698 // the operands directly out of a pool with no recycling metadata. 4699 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4700 Ops, NumOps); 4701 else 4702 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4703 MN->OperandsNeedDelete = false; 4704 } else 4705 MN->InitOperands(MN->OperandList, Ops, NumOps); 4706 } else { 4707 // If NumOps is larger than the # of operands we currently have, reallocate 4708 // the operand list. 4709 if (NumOps > N->NumOperands) { 4710 if (N->OperandsNeedDelete) 4711 delete[] N->OperandList; 4712 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4713 N->OperandsNeedDelete = true; 4714 } else 4715 N->InitOperands(N->OperandList, Ops, NumOps); 4716 } 4717 4718 // Delete any nodes that are still dead after adding the uses for the 4719 // new operands. 4720 if (!DeadNodeSet.empty()) { 4721 SmallVector<SDNode *, 16> DeadNodes; 4722 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4723 E = DeadNodeSet.end(); I != E; ++I) 4724 if ((*I)->use_empty()) 4725 DeadNodes.push_back(*I); 4726 RemoveDeadNodes(DeadNodes); 4727 } 4728 4729 if (IP) 4730 CSEMap.InsertNode(N, IP); // Memoize the new node. 4731 return N; 4732} 4733 4734 4735/// getMachineNode - These are used for target selectors to create a new node 4736/// with specified return type(s), MachineInstr opcode, and operands. 4737/// 4738/// Note that getMachineNode returns the resultant node. If there is already a 4739/// node of the specified opcode and operands, it returns that node instead of 4740/// the current one. 4741MachineSDNode * 4742SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4743 SDVTList VTs = getVTList(VT); 4744 return getMachineNode(Opcode, dl, VTs, 0, 0); 4745} 4746 4747MachineSDNode * 4748SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4749 SDVTList VTs = getVTList(VT); 4750 SDValue Ops[] = { Op1 }; 4751 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4752} 4753 4754MachineSDNode * 4755SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4756 SDValue Op1, SDValue Op2) { 4757 SDVTList VTs = getVTList(VT); 4758 SDValue Ops[] = { Op1, Op2 }; 4759 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4760} 4761 4762MachineSDNode * 4763SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4764 SDValue Op1, SDValue Op2, SDValue Op3) { 4765 SDVTList VTs = getVTList(VT); 4766 SDValue Ops[] = { Op1, Op2, Op3 }; 4767 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4768} 4769 4770MachineSDNode * 4771SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4772 const SDValue *Ops, unsigned NumOps) { 4773 SDVTList VTs = getVTList(VT); 4774 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4775} 4776 4777MachineSDNode * 4778SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4779 SDVTList VTs = getVTList(VT1, VT2); 4780 return getMachineNode(Opcode, dl, VTs, 0, 0); 4781} 4782 4783MachineSDNode * 4784SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4785 EVT VT1, EVT VT2, SDValue Op1) { 4786 SDVTList VTs = getVTList(VT1, VT2); 4787 SDValue Ops[] = { Op1 }; 4788 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4789} 4790 4791MachineSDNode * 4792SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4793 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4794 SDVTList VTs = getVTList(VT1, VT2); 4795 SDValue Ops[] = { Op1, Op2 }; 4796 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4797} 4798 4799MachineSDNode * 4800SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4801 EVT VT1, EVT VT2, SDValue Op1, 4802 SDValue Op2, SDValue Op3) { 4803 SDVTList VTs = getVTList(VT1, VT2); 4804 SDValue Ops[] = { Op1, Op2, Op3 }; 4805 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4806} 4807 4808MachineSDNode * 4809SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4810 EVT VT1, EVT VT2, 4811 const SDValue *Ops, unsigned NumOps) { 4812 SDVTList VTs = getVTList(VT1, VT2); 4813 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4814} 4815 4816MachineSDNode * 4817SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4818 EVT VT1, EVT VT2, EVT VT3, 4819 SDValue Op1, SDValue Op2) { 4820 SDVTList VTs = getVTList(VT1, VT2, VT3); 4821 SDValue Ops[] = { Op1, Op2 }; 4822 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4823} 4824 4825MachineSDNode * 4826SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4827 EVT VT1, EVT VT2, EVT VT3, 4828 SDValue Op1, SDValue Op2, SDValue Op3) { 4829 SDVTList VTs = getVTList(VT1, VT2, VT3); 4830 SDValue Ops[] = { Op1, Op2, Op3 }; 4831 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4832} 4833 4834MachineSDNode * 4835SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4836 EVT VT1, EVT VT2, EVT VT3, 4837 const SDValue *Ops, unsigned NumOps) { 4838 SDVTList VTs = getVTList(VT1, VT2, VT3); 4839 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4840} 4841 4842MachineSDNode * 4843SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4844 EVT VT2, EVT VT3, EVT VT4, 4845 const SDValue *Ops, unsigned NumOps) { 4846 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4847 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4848} 4849 4850MachineSDNode * 4851SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4852 const std::vector<EVT> &ResultTys, 4853 const SDValue *Ops, unsigned NumOps) { 4854 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4855 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4856} 4857 4858MachineSDNode * 4859SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4860 const SDValue *Ops, unsigned NumOps) { 4861 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4862 MachineSDNode *N; 4863 void *IP; 4864 4865 if (DoCSE) { 4866 FoldingSetNodeID ID; 4867 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4868 IP = 0; 4869 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4870 return cast<MachineSDNode>(E); 4871 } 4872 4873 // Allocate a new MachineSDNode. 4874 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4875 4876 // Initialize the operands list. 4877 if (NumOps > array_lengthof(N->LocalOperands)) 4878 // We're creating a final node that will live unmorphed for the 4879 // remainder of the current SelectionDAG iteration, so we can allocate 4880 // the operands directly out of a pool with no recycling metadata. 4881 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4882 Ops, NumOps); 4883 else 4884 N->InitOperands(N->LocalOperands, Ops, NumOps); 4885 N->OperandsNeedDelete = false; 4886 4887 if (DoCSE) 4888 CSEMap.InsertNode(N, IP); 4889 4890 AllNodes.push_back(N); 4891#ifndef NDEBUG 4892 VerifyNode(N); 4893#endif 4894 return N; 4895} 4896 4897/// getTargetExtractSubreg - A convenience function for creating 4898/// TargetOpcode::EXTRACT_SUBREG nodes. 4899SDValue 4900SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4901 SDValue Operand) { 4902 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4903 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4904 VT, Operand, SRIdxVal); 4905 return SDValue(Subreg, 0); 4906} 4907 4908/// getTargetInsertSubreg - A convenience function for creating 4909/// TargetOpcode::INSERT_SUBREG nodes. 4910SDValue 4911SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4912 SDValue Operand, SDValue Subreg) { 4913 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4914 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4915 VT, Operand, Subreg, SRIdxVal); 4916 return SDValue(Result, 0); 4917} 4918 4919/// getNodeIfExists - Get the specified node if it's already available, or 4920/// else return NULL. 4921SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4922 const SDValue *Ops, unsigned NumOps) { 4923 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4924 FoldingSetNodeID ID; 4925 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4926 void *IP = 0; 4927 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4928 return E; 4929 } 4930 return NULL; 4931} 4932 4933/// getDbgValue - Creates a SDDbgValue node. 4934/// 4935SDDbgValue * 4936SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4937 DebugLoc DL, unsigned O) { 4938 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4939} 4940 4941SDDbgValue * 4942SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4943 DebugLoc DL, unsigned O) { 4944 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4945} 4946 4947SDDbgValue * 4948SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4949 DebugLoc DL, unsigned O) { 4950 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4951} 4952 4953namespace { 4954 4955/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4956/// pointed to by a use iterator is deleted, increment the use iterator 4957/// so that it doesn't dangle. 4958/// 4959/// This class also manages a "downlink" DAGUpdateListener, to forward 4960/// messages to ReplaceAllUsesWith's callers. 4961/// 4962class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4963 SelectionDAG::DAGUpdateListener *DownLink; 4964 SDNode::use_iterator &UI; 4965 SDNode::use_iterator &UE; 4966 4967 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4968 // Increment the iterator as needed. 4969 while (UI != UE && N == *UI) 4970 ++UI; 4971 4972 // Then forward the message. 4973 if (DownLink) DownLink->NodeDeleted(N, E); 4974 } 4975 4976 virtual void NodeUpdated(SDNode *N) { 4977 // Just forward the message. 4978 if (DownLink) DownLink->NodeUpdated(N); 4979 } 4980 4981public: 4982 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4983 SDNode::use_iterator &ui, 4984 SDNode::use_iterator &ue) 4985 : DownLink(dl), UI(ui), UE(ue) {} 4986}; 4987 4988} 4989 4990/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4991/// This can cause recursive merging of nodes in the DAG. 4992/// 4993/// This version assumes From has a single result value. 4994/// 4995void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4996 DAGUpdateListener *UpdateListener) { 4997 SDNode *From = FromN.getNode(); 4998 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4999 "Cannot replace with this method!"); 5000 assert(From != To.getNode() && "Cannot replace uses of with self"); 5001 5002 // Iterate over all the existing uses of From. New uses will be added 5003 // to the beginning of the use list, which we avoid visiting. 5004 // This specifically avoids visiting uses of From that arise while the 5005 // replacement is happening, because any such uses would be the result 5006 // of CSE: If an existing node looks like From after one of its operands 5007 // is replaced by To, we don't want to replace of all its users with To 5008 // too. See PR3018 for more info. 5009 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5010 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5011 while (UI != UE) { 5012 SDNode *User = *UI; 5013 5014 // This node is about to morph, remove its old self from the CSE maps. 5015 RemoveNodeFromCSEMaps(User); 5016 5017 // A user can appear in a use list multiple times, and when this 5018 // happens the uses are usually next to each other in the list. 5019 // To help reduce the number of CSE recomputations, process all 5020 // the uses of this user that we can find this way. 5021 do { 5022 SDUse &Use = UI.getUse(); 5023 ++UI; 5024 Use.set(To); 5025 } while (UI != UE && *UI == User); 5026 5027 // Now that we have modified User, add it back to the CSE maps. If it 5028 // already exists there, recursively merge the results together. 5029 AddModifiedNodeToCSEMaps(User, &Listener); 5030 } 5031} 5032 5033/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5034/// This can cause recursive merging of nodes in the DAG. 5035/// 5036/// This version assumes that for each value of From, there is a 5037/// corresponding value in To in the same position with the same type. 5038/// 5039void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5040 DAGUpdateListener *UpdateListener) { 5041#ifndef NDEBUG 5042 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5043 assert((!From->hasAnyUseOfValue(i) || 5044 From->getValueType(i) == To->getValueType(i)) && 5045 "Cannot use this version of ReplaceAllUsesWith!"); 5046#endif 5047 5048 // Handle the trivial case. 5049 if (From == To) 5050 return; 5051 5052 // Iterate over just the existing users of From. See the comments in 5053 // the ReplaceAllUsesWith above. 5054 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5055 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5056 while (UI != UE) { 5057 SDNode *User = *UI; 5058 5059 // This node is about to morph, remove its old self from the CSE maps. 5060 RemoveNodeFromCSEMaps(User); 5061 5062 // A user can appear in a use list multiple times, and when this 5063 // happens the uses are usually next to each other in the list. 5064 // To help reduce the number of CSE recomputations, process all 5065 // the uses of this user that we can find this way. 5066 do { 5067 SDUse &Use = UI.getUse(); 5068 ++UI; 5069 Use.setNode(To); 5070 } while (UI != UE && *UI == User); 5071 5072 // Now that we have modified User, add it back to the CSE maps. If it 5073 // already exists there, recursively merge the results together. 5074 AddModifiedNodeToCSEMaps(User, &Listener); 5075 } 5076} 5077 5078/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5079/// This can cause recursive merging of nodes in the DAG. 5080/// 5081/// This version can replace From with any result values. To must match the 5082/// number and types of values returned by From. 5083void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5084 const SDValue *To, 5085 DAGUpdateListener *UpdateListener) { 5086 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5087 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5088 5089 // Iterate over just the existing users of From. See the comments in 5090 // the ReplaceAllUsesWith above. 5091 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5092 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5093 while (UI != UE) { 5094 SDNode *User = *UI; 5095 5096 // This node is about to morph, remove its old self from the CSE maps. 5097 RemoveNodeFromCSEMaps(User); 5098 5099 // A user can appear in a use list multiple times, and when this 5100 // happens the uses are usually next to each other in the list. 5101 // To help reduce the number of CSE recomputations, process all 5102 // the uses of this user that we can find this way. 5103 do { 5104 SDUse &Use = UI.getUse(); 5105 const SDValue &ToOp = To[Use.getResNo()]; 5106 ++UI; 5107 Use.set(ToOp); 5108 } while (UI != UE && *UI == User); 5109 5110 // Now that we have modified User, add it back to the CSE maps. If it 5111 // already exists there, recursively merge the results together. 5112 AddModifiedNodeToCSEMaps(User, &Listener); 5113 } 5114} 5115 5116/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5117/// uses of other values produced by From.getNode() alone. The Deleted 5118/// vector is handled the same way as for ReplaceAllUsesWith. 5119void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5120 DAGUpdateListener *UpdateListener){ 5121 // Handle the really simple, really trivial case efficiently. 5122 if (From == To) return; 5123 5124 // Handle the simple, trivial, case efficiently. 5125 if (From.getNode()->getNumValues() == 1) { 5126 ReplaceAllUsesWith(From, To, UpdateListener); 5127 return; 5128 } 5129 5130 // Iterate over just the existing users of From. See the comments in 5131 // the ReplaceAllUsesWith above. 5132 SDNode::use_iterator UI = From.getNode()->use_begin(), 5133 UE = From.getNode()->use_end(); 5134 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5135 while (UI != UE) { 5136 SDNode *User = *UI; 5137 bool UserRemovedFromCSEMaps = false; 5138 5139 // A user can appear in a use list multiple times, and when this 5140 // happens the uses are usually next to each other in the list. 5141 // To help reduce the number of CSE recomputations, process all 5142 // the uses of this user that we can find this way. 5143 do { 5144 SDUse &Use = UI.getUse(); 5145 5146 // Skip uses of different values from the same node. 5147 if (Use.getResNo() != From.getResNo()) { 5148 ++UI; 5149 continue; 5150 } 5151 5152 // If this node hasn't been modified yet, it's still in the CSE maps, 5153 // so remove its old self from the CSE maps. 5154 if (!UserRemovedFromCSEMaps) { 5155 RemoveNodeFromCSEMaps(User); 5156 UserRemovedFromCSEMaps = true; 5157 } 5158 5159 ++UI; 5160 Use.set(To); 5161 } while (UI != UE && *UI == User); 5162 5163 // We are iterating over all uses of the From node, so if a use 5164 // doesn't use the specific value, no changes are made. 5165 if (!UserRemovedFromCSEMaps) 5166 continue; 5167 5168 // Now that we have modified User, add it back to the CSE maps. If it 5169 // already exists there, recursively merge the results together. 5170 AddModifiedNodeToCSEMaps(User, &Listener); 5171 } 5172} 5173 5174namespace { 5175 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5176 /// to record information about a use. 5177 struct UseMemo { 5178 SDNode *User; 5179 unsigned Index; 5180 SDUse *Use; 5181 }; 5182 5183 /// operator< - Sort Memos by User. 5184 bool operator<(const UseMemo &L, const UseMemo &R) { 5185 return (intptr_t)L.User < (intptr_t)R.User; 5186 } 5187} 5188 5189/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5190/// uses of other values produced by From.getNode() alone. The same value 5191/// may appear in both the From and To list. The Deleted vector is 5192/// handled the same way as for ReplaceAllUsesWith. 5193void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5194 const SDValue *To, 5195 unsigned Num, 5196 DAGUpdateListener *UpdateListener){ 5197 // Handle the simple, trivial case efficiently. 5198 if (Num == 1) 5199 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5200 5201 // Read up all the uses and make records of them. This helps 5202 // processing new uses that are introduced during the 5203 // replacement process. 5204 SmallVector<UseMemo, 4> Uses; 5205 for (unsigned i = 0; i != Num; ++i) { 5206 unsigned FromResNo = From[i].getResNo(); 5207 SDNode *FromNode = From[i].getNode(); 5208 for (SDNode::use_iterator UI = FromNode->use_begin(), 5209 E = FromNode->use_end(); UI != E; ++UI) { 5210 SDUse &Use = UI.getUse(); 5211 if (Use.getResNo() == FromResNo) { 5212 UseMemo Memo = { *UI, i, &Use }; 5213 Uses.push_back(Memo); 5214 } 5215 } 5216 } 5217 5218 // Sort the uses, so that all the uses from a given User are together. 5219 std::sort(Uses.begin(), Uses.end()); 5220 5221 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5222 UseIndex != UseIndexEnd; ) { 5223 // We know that this user uses some value of From. If it is the right 5224 // value, update it. 5225 SDNode *User = Uses[UseIndex].User; 5226 5227 // This node is about to morph, remove its old self from the CSE maps. 5228 RemoveNodeFromCSEMaps(User); 5229 5230 // The Uses array is sorted, so all the uses for a given User 5231 // are next to each other in the list. 5232 // To help reduce the number of CSE recomputations, process all 5233 // the uses of this user that we can find this way. 5234 do { 5235 unsigned i = Uses[UseIndex].Index; 5236 SDUse &Use = *Uses[UseIndex].Use; 5237 ++UseIndex; 5238 5239 Use.set(To[i]); 5240 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5241 5242 // Now that we have modified User, add it back to the CSE maps. If it 5243 // already exists there, recursively merge the results together. 5244 AddModifiedNodeToCSEMaps(User, UpdateListener); 5245 } 5246} 5247 5248/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5249/// based on their topological order. It returns the maximum id and a vector 5250/// of the SDNodes* in assigned order by reference. 5251unsigned SelectionDAG::AssignTopologicalOrder() { 5252 5253 unsigned DAGSize = 0; 5254 5255 // SortedPos tracks the progress of the algorithm. Nodes before it are 5256 // sorted, nodes after it are unsorted. When the algorithm completes 5257 // it is at the end of the list. 5258 allnodes_iterator SortedPos = allnodes_begin(); 5259 5260 // Visit all the nodes. Move nodes with no operands to the front of 5261 // the list immediately. Annotate nodes that do have operands with their 5262 // operand count. Before we do this, the Node Id fields of the nodes 5263 // may contain arbitrary values. After, the Node Id fields for nodes 5264 // before SortedPos will contain the topological sort index, and the 5265 // Node Id fields for nodes At SortedPos and after will contain the 5266 // count of outstanding operands. 5267 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5268 SDNode *N = I++; 5269 checkForCycles(N); 5270 unsigned Degree = N->getNumOperands(); 5271 if (Degree == 0) { 5272 // A node with no uses, add it to the result array immediately. 5273 N->setNodeId(DAGSize++); 5274 allnodes_iterator Q = N; 5275 if (Q != SortedPos) 5276 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5277 assert(SortedPos != AllNodes.end() && "Overran node list"); 5278 ++SortedPos; 5279 } else { 5280 // Temporarily use the Node Id as scratch space for the degree count. 5281 N->setNodeId(Degree); 5282 } 5283 } 5284 5285 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5286 // such that by the time the end is reached all nodes will be sorted. 5287 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5288 SDNode *N = I; 5289 checkForCycles(N); 5290 // N is in sorted position, so all its uses have one less operand 5291 // that needs to be sorted. 5292 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5293 UI != UE; ++UI) { 5294 SDNode *P = *UI; 5295 unsigned Degree = P->getNodeId(); 5296 assert(Degree != 0 && "Invalid node degree"); 5297 --Degree; 5298 if (Degree == 0) { 5299 // All of P's operands are sorted, so P may sorted now. 5300 P->setNodeId(DAGSize++); 5301 if (P != SortedPos) 5302 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5303 assert(SortedPos != AllNodes.end() && "Overran node list"); 5304 ++SortedPos; 5305 } else { 5306 // Update P's outstanding operand count. 5307 P->setNodeId(Degree); 5308 } 5309 } 5310 if (I == SortedPos) { 5311#ifndef NDEBUG 5312 SDNode *S = ++I; 5313 dbgs() << "Overran sorted position:\n"; 5314 S->dumprFull(); 5315#endif 5316 llvm_unreachable(0); 5317 } 5318 } 5319 5320 assert(SortedPos == AllNodes.end() && 5321 "Topological sort incomplete!"); 5322 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5323 "First node in topological sort is not the entry token!"); 5324 assert(AllNodes.front().getNodeId() == 0 && 5325 "First node in topological sort has non-zero id!"); 5326 assert(AllNodes.front().getNumOperands() == 0 && 5327 "First node in topological sort has operands!"); 5328 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5329 "Last node in topologic sort has unexpected id!"); 5330 assert(AllNodes.back().use_empty() && 5331 "Last node in topologic sort has users!"); 5332 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5333 return DAGSize; 5334} 5335 5336/// AssignOrdering - Assign an order to the SDNode. 5337void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5338 assert(SD && "Trying to assign an order to a null node!"); 5339 Ordering->add(SD, Order); 5340} 5341 5342/// GetOrdering - Get the order for the SDNode. 5343unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5344 assert(SD && "Trying to get the order of a null node!"); 5345 return Ordering->getOrder(SD); 5346} 5347 5348/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5349/// value is produced by SD. 5350void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5351 DbgInfo->add(DB, SD, isParameter); 5352 if (SD) 5353 SD->setHasDebugValue(true); 5354} 5355 5356//===----------------------------------------------------------------------===// 5357// SDNode Class 5358//===----------------------------------------------------------------------===// 5359 5360HandleSDNode::~HandleSDNode() { 5361 DropOperands(); 5362} 5363 5364GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5365 EVT VT, int64_t o, unsigned char TF) 5366 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5367 TheGlobal = GA; 5368} 5369 5370MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5371 MachineMemOperand *mmo) 5372 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5373 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5374 MMO->isNonTemporal()); 5375 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5376 assert(isNonTemporal() == MMO->isNonTemporal() && 5377 "Non-temporal encoding error!"); 5378 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5379} 5380 5381MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5382 const SDValue *Ops, unsigned NumOps, EVT memvt, 5383 MachineMemOperand *mmo) 5384 : SDNode(Opc, dl, VTs, Ops, NumOps), 5385 MemoryVT(memvt), MMO(mmo) { 5386 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5387 MMO->isNonTemporal()); 5388 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5389 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5390} 5391 5392/// Profile - Gather unique data for the node. 5393/// 5394void SDNode::Profile(FoldingSetNodeID &ID) const { 5395 AddNodeIDNode(ID, this); 5396} 5397 5398namespace { 5399 struct EVTArray { 5400 std::vector<EVT> VTs; 5401 5402 EVTArray() { 5403 VTs.reserve(MVT::LAST_VALUETYPE); 5404 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5405 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5406 } 5407 }; 5408} 5409 5410static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5411static ManagedStatic<EVTArray> SimpleVTArray; 5412static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5413 5414/// getValueTypeList - Return a pointer to the specified value type. 5415/// 5416const EVT *SDNode::getValueTypeList(EVT VT) { 5417 if (VT.isExtended()) { 5418 sys::SmartScopedLock<true> Lock(*VTMutex); 5419 return &(*EVTs->insert(VT).first); 5420 } else { 5421 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5422 } 5423} 5424 5425/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5426/// indicated value. This method ignores uses of other values defined by this 5427/// operation. 5428bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5429 assert(Value < getNumValues() && "Bad value!"); 5430 5431 // TODO: Only iterate over uses of a given value of the node 5432 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5433 if (UI.getUse().getResNo() == Value) { 5434 if (NUses == 0) 5435 return false; 5436 --NUses; 5437 } 5438 } 5439 5440 // Found exactly the right number of uses? 5441 return NUses == 0; 5442} 5443 5444 5445/// hasAnyUseOfValue - Return true if there are any use of the indicated 5446/// value. This method ignores uses of other values defined by this operation. 5447bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5448 assert(Value < getNumValues() && "Bad value!"); 5449 5450 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5451 if (UI.getUse().getResNo() == Value) 5452 return true; 5453 5454 return false; 5455} 5456 5457 5458/// isOnlyUserOf - Return true if this node is the only use of N. 5459/// 5460bool SDNode::isOnlyUserOf(SDNode *N) const { 5461 bool Seen = false; 5462 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5463 SDNode *User = *I; 5464 if (User == this) 5465 Seen = true; 5466 else 5467 return false; 5468 } 5469 5470 return Seen; 5471} 5472 5473/// isOperand - Return true if this node is an operand of N. 5474/// 5475bool SDValue::isOperandOf(SDNode *N) const { 5476 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5477 if (*this == N->getOperand(i)) 5478 return true; 5479 return false; 5480} 5481 5482bool SDNode::isOperandOf(SDNode *N) const { 5483 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5484 if (this == N->OperandList[i].getNode()) 5485 return true; 5486 return false; 5487} 5488 5489/// reachesChainWithoutSideEffects - Return true if this operand (which must 5490/// be a chain) reaches the specified operand without crossing any 5491/// side-effecting instructions. In practice, this looks through token 5492/// factors and non-volatile loads. In order to remain efficient, this only 5493/// looks a couple of nodes in, it does not do an exhaustive search. 5494bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5495 unsigned Depth) const { 5496 if (*this == Dest) return true; 5497 5498 // Don't search too deeply, we just want to be able to see through 5499 // TokenFactor's etc. 5500 if (Depth == 0) return false; 5501 5502 // If this is a token factor, all inputs to the TF happen in parallel. If any 5503 // of the operands of the TF reach dest, then we can do the xform. 5504 if (getOpcode() == ISD::TokenFactor) { 5505 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5506 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5507 return true; 5508 return false; 5509 } 5510 5511 // Loads don't have side effects, look through them. 5512 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5513 if (!Ld->isVolatile()) 5514 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5515 } 5516 return false; 5517} 5518 5519/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5520/// is either an operand of N or it can be reached by traversing up the operands. 5521/// NOTE: this is an expensive method. Use it carefully. 5522bool SDNode::isPredecessorOf(SDNode *N) const { 5523 SmallPtrSet<SDNode *, 32> Visited; 5524 SmallVector<SDNode *, 16> Worklist; 5525 Worklist.push_back(N); 5526 5527 do { 5528 N = Worklist.pop_back_val(); 5529 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5530 SDNode *Op = N->getOperand(i).getNode(); 5531 if (Op == this) 5532 return true; 5533 if (Visited.insert(Op)) 5534 Worklist.push_back(Op); 5535 } 5536 } while (!Worklist.empty()); 5537 5538 return false; 5539} 5540 5541uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5542 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5543 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5544} 5545 5546std::string SDNode::getOperationName(const SelectionDAG *G) const { 5547 switch (getOpcode()) { 5548 default: 5549 if (getOpcode() < ISD::BUILTIN_OP_END) 5550 return "<<Unknown DAG Node>>"; 5551 if (isMachineOpcode()) { 5552 if (G) 5553 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5554 if (getMachineOpcode() < TII->getNumOpcodes()) 5555 return TII->get(getMachineOpcode()).getName(); 5556 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5557 } 5558 if (G) { 5559 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5560 const char *Name = TLI.getTargetNodeName(getOpcode()); 5561 if (Name) return Name; 5562 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5563 } 5564 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5565 5566#ifndef NDEBUG 5567 case ISD::DELETED_NODE: 5568 return "<<Deleted Node!>>"; 5569#endif 5570 case ISD::PREFETCH: return "Prefetch"; 5571 case ISD::MEMBARRIER: return "MemBarrier"; 5572 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5573 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5574 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5575 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5576 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5577 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5578 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5579 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5580 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5581 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5582 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5583 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5584 case ISD::PCMARKER: return "PCMarker"; 5585 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5586 case ISD::SRCVALUE: return "SrcValue"; 5587 case ISD::MDNODE_SDNODE: return "MDNode"; 5588 case ISD::EntryToken: return "EntryToken"; 5589 case ISD::TokenFactor: return "TokenFactor"; 5590 case ISD::AssertSext: return "AssertSext"; 5591 case ISD::AssertZext: return "AssertZext"; 5592 5593 case ISD::BasicBlock: return "BasicBlock"; 5594 case ISD::VALUETYPE: return "ValueType"; 5595 case ISD::Register: return "Register"; 5596 5597 case ISD::Constant: return "Constant"; 5598 case ISD::ConstantFP: return "ConstantFP"; 5599 case ISD::GlobalAddress: return "GlobalAddress"; 5600 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5601 case ISD::FrameIndex: return "FrameIndex"; 5602 case ISD::JumpTable: return "JumpTable"; 5603 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5604 case ISD::RETURNADDR: return "RETURNADDR"; 5605 case ISD::FRAMEADDR: return "FRAMEADDR"; 5606 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5607 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5608 case ISD::LSDAADDR: return "LSDAADDR"; 5609 case ISD::EHSELECTION: return "EHSELECTION"; 5610 case ISD::EH_RETURN: return "EH_RETURN"; 5611 case ISD::ConstantPool: return "ConstantPool"; 5612 case ISD::ExternalSymbol: return "ExternalSymbol"; 5613 case ISD::BlockAddress: return "BlockAddress"; 5614 case ISD::INTRINSIC_WO_CHAIN: 5615 case ISD::INTRINSIC_VOID: 5616 case ISD::INTRINSIC_W_CHAIN: { 5617 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5618 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5619 if (IID < Intrinsic::num_intrinsics) 5620 return Intrinsic::getName((Intrinsic::ID)IID); 5621 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5622 return TII->getName(IID); 5623 llvm_unreachable("Invalid intrinsic ID"); 5624 } 5625 5626 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5627 case ISD::TargetConstant: return "TargetConstant"; 5628 case ISD::TargetConstantFP:return "TargetConstantFP"; 5629 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5630 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5631 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5632 case ISD::TargetJumpTable: return "TargetJumpTable"; 5633 case ISD::TargetConstantPool: return "TargetConstantPool"; 5634 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5635 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5636 5637 case ISD::CopyToReg: return "CopyToReg"; 5638 case ISD::CopyFromReg: return "CopyFromReg"; 5639 case ISD::UNDEF: return "undef"; 5640 case ISD::MERGE_VALUES: return "merge_values"; 5641 case ISD::INLINEASM: return "inlineasm"; 5642 case ISD::EH_LABEL: return "eh_label"; 5643 case ISD::HANDLENODE: return "handlenode"; 5644 5645 // Unary operators 5646 case ISD::FABS: return "fabs"; 5647 case ISD::FNEG: return "fneg"; 5648 case ISD::FSQRT: return "fsqrt"; 5649 case ISD::FSIN: return "fsin"; 5650 case ISD::FCOS: return "fcos"; 5651 case ISD::FPOWI: return "fpowi"; 5652 case ISD::FPOW: return "fpow"; 5653 case ISD::FTRUNC: return "ftrunc"; 5654 case ISD::FFLOOR: return "ffloor"; 5655 case ISD::FCEIL: return "fceil"; 5656 case ISD::FRINT: return "frint"; 5657 case ISD::FNEARBYINT: return "fnearbyint"; 5658 5659 // Binary operators 5660 case ISD::ADD: return "add"; 5661 case ISD::SUB: return "sub"; 5662 case ISD::MUL: return "mul"; 5663 case ISD::MULHU: return "mulhu"; 5664 case ISD::MULHS: return "mulhs"; 5665 case ISD::SDIV: return "sdiv"; 5666 case ISD::UDIV: return "udiv"; 5667 case ISD::SREM: return "srem"; 5668 case ISD::UREM: return "urem"; 5669 case ISD::SMUL_LOHI: return "smul_lohi"; 5670 case ISD::UMUL_LOHI: return "umul_lohi"; 5671 case ISD::SDIVREM: return "sdivrem"; 5672 case ISD::UDIVREM: return "udivrem"; 5673 case ISD::AND: return "and"; 5674 case ISD::OR: return "or"; 5675 case ISD::XOR: return "xor"; 5676 case ISD::SHL: return "shl"; 5677 case ISD::SRA: return "sra"; 5678 case ISD::SRL: return "srl"; 5679 case ISD::ROTL: return "rotl"; 5680 case ISD::ROTR: return "rotr"; 5681 case ISD::FADD: return "fadd"; 5682 case ISD::FSUB: return "fsub"; 5683 case ISD::FMUL: return "fmul"; 5684 case ISD::FDIV: return "fdiv"; 5685 case ISD::FREM: return "frem"; 5686 case ISD::FCOPYSIGN: return "fcopysign"; 5687 case ISD::FGETSIGN: return "fgetsign"; 5688 5689 case ISD::SETCC: return "setcc"; 5690 case ISD::VSETCC: return "vsetcc"; 5691 case ISD::SELECT: return "select"; 5692 case ISD::SELECT_CC: return "select_cc"; 5693 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5694 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5695 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5696 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5697 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5698 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5699 case ISD::CARRY_FALSE: return "carry_false"; 5700 case ISD::ADDC: return "addc"; 5701 case ISD::ADDE: return "adde"; 5702 case ISD::SADDO: return "saddo"; 5703 case ISD::UADDO: return "uaddo"; 5704 case ISD::SSUBO: return "ssubo"; 5705 case ISD::USUBO: return "usubo"; 5706 case ISD::SMULO: return "smulo"; 5707 case ISD::UMULO: return "umulo"; 5708 case ISD::SUBC: return "subc"; 5709 case ISD::SUBE: return "sube"; 5710 case ISD::SHL_PARTS: return "shl_parts"; 5711 case ISD::SRA_PARTS: return "sra_parts"; 5712 case ISD::SRL_PARTS: return "srl_parts"; 5713 5714 // Conversion operators. 5715 case ISD::SIGN_EXTEND: return "sign_extend"; 5716 case ISD::ZERO_EXTEND: return "zero_extend"; 5717 case ISD::ANY_EXTEND: return "any_extend"; 5718 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5719 case ISD::TRUNCATE: return "truncate"; 5720 case ISD::FP_ROUND: return "fp_round"; 5721 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5722 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5723 case ISD::FP_EXTEND: return "fp_extend"; 5724 5725 case ISD::SINT_TO_FP: return "sint_to_fp"; 5726 case ISD::UINT_TO_FP: return "uint_to_fp"; 5727 case ISD::FP_TO_SINT: return "fp_to_sint"; 5728 case ISD::FP_TO_UINT: return "fp_to_uint"; 5729 case ISD::BIT_CONVERT: return "bit_convert"; 5730 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5731 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5732 5733 case ISD::CONVERT_RNDSAT: { 5734 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5735 default: llvm_unreachable("Unknown cvt code!"); 5736 case ISD::CVT_FF: return "cvt_ff"; 5737 case ISD::CVT_FS: return "cvt_fs"; 5738 case ISD::CVT_FU: return "cvt_fu"; 5739 case ISD::CVT_SF: return "cvt_sf"; 5740 case ISD::CVT_UF: return "cvt_uf"; 5741 case ISD::CVT_SS: return "cvt_ss"; 5742 case ISD::CVT_SU: return "cvt_su"; 5743 case ISD::CVT_US: return "cvt_us"; 5744 case ISD::CVT_UU: return "cvt_uu"; 5745 } 5746 } 5747 5748 // Control flow instructions 5749 case ISD::BR: return "br"; 5750 case ISD::BRIND: return "brind"; 5751 case ISD::BR_JT: return "br_jt"; 5752 case ISD::BRCOND: return "brcond"; 5753 case ISD::BR_CC: return "br_cc"; 5754 case ISD::CALLSEQ_START: return "callseq_start"; 5755 case ISD::CALLSEQ_END: return "callseq_end"; 5756 5757 // Other operators 5758 case ISD::LOAD: return "load"; 5759 case ISD::STORE: return "store"; 5760 case ISD::VAARG: return "vaarg"; 5761 case ISD::VACOPY: return "vacopy"; 5762 case ISD::VAEND: return "vaend"; 5763 case ISD::VASTART: return "vastart"; 5764 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5765 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5766 case ISD::BUILD_PAIR: return "build_pair"; 5767 case ISD::STACKSAVE: return "stacksave"; 5768 case ISD::STACKRESTORE: return "stackrestore"; 5769 case ISD::TRAP: return "trap"; 5770 5771 // Bit manipulation 5772 case ISD::BSWAP: return "bswap"; 5773 case ISD::CTPOP: return "ctpop"; 5774 case ISD::CTTZ: return "cttz"; 5775 case ISD::CTLZ: return "ctlz"; 5776 5777 // Trampolines 5778 case ISD::TRAMPOLINE: return "trampoline"; 5779 5780 case ISD::CONDCODE: 5781 switch (cast<CondCodeSDNode>(this)->get()) { 5782 default: llvm_unreachable("Unknown setcc condition!"); 5783 case ISD::SETOEQ: return "setoeq"; 5784 case ISD::SETOGT: return "setogt"; 5785 case ISD::SETOGE: return "setoge"; 5786 case ISD::SETOLT: return "setolt"; 5787 case ISD::SETOLE: return "setole"; 5788 case ISD::SETONE: return "setone"; 5789 5790 case ISD::SETO: return "seto"; 5791 case ISD::SETUO: return "setuo"; 5792 case ISD::SETUEQ: return "setue"; 5793 case ISD::SETUGT: return "setugt"; 5794 case ISD::SETUGE: return "setuge"; 5795 case ISD::SETULT: return "setult"; 5796 case ISD::SETULE: return "setule"; 5797 case ISD::SETUNE: return "setune"; 5798 5799 case ISD::SETEQ: return "seteq"; 5800 case ISD::SETGT: return "setgt"; 5801 case ISD::SETGE: return "setge"; 5802 case ISD::SETLT: return "setlt"; 5803 case ISD::SETLE: return "setle"; 5804 case ISD::SETNE: return "setne"; 5805 } 5806 } 5807} 5808 5809const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5810 switch (AM) { 5811 default: 5812 return ""; 5813 case ISD::PRE_INC: 5814 return "<pre-inc>"; 5815 case ISD::PRE_DEC: 5816 return "<pre-dec>"; 5817 case ISD::POST_INC: 5818 return "<post-inc>"; 5819 case ISD::POST_DEC: 5820 return "<post-dec>"; 5821 } 5822} 5823 5824std::string ISD::ArgFlagsTy::getArgFlagsString() { 5825 std::string S = "< "; 5826 5827 if (isZExt()) 5828 S += "zext "; 5829 if (isSExt()) 5830 S += "sext "; 5831 if (isInReg()) 5832 S += "inreg "; 5833 if (isSRet()) 5834 S += "sret "; 5835 if (isByVal()) 5836 S += "byval "; 5837 if (isNest()) 5838 S += "nest "; 5839 if (getByValAlign()) 5840 S += "byval-align:" + utostr(getByValAlign()) + " "; 5841 if (getOrigAlign()) 5842 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5843 if (getByValSize()) 5844 S += "byval-size:" + utostr(getByValSize()) + " "; 5845 return S + ">"; 5846} 5847 5848void SDNode::dump() const { dump(0); } 5849void SDNode::dump(const SelectionDAG *G) const { 5850 print(dbgs(), G); 5851} 5852 5853void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5854 OS << (void*)this << ": "; 5855 5856 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5857 if (i) OS << ","; 5858 if (getValueType(i) == MVT::Other) 5859 OS << "ch"; 5860 else 5861 OS << getValueType(i).getEVTString(); 5862 } 5863 OS << " = " << getOperationName(G); 5864} 5865 5866void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5867 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5868 if (!MN->memoperands_empty()) { 5869 OS << "<"; 5870 OS << "Mem:"; 5871 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5872 e = MN->memoperands_end(); i != e; ++i) { 5873 OS << **i; 5874 if (next(i) != e) 5875 OS << " "; 5876 } 5877 OS << ">"; 5878 } 5879 } else if (const ShuffleVectorSDNode *SVN = 5880 dyn_cast<ShuffleVectorSDNode>(this)) { 5881 OS << "<"; 5882 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5883 int Idx = SVN->getMaskElt(i); 5884 if (i) OS << ","; 5885 if (Idx < 0) 5886 OS << "u"; 5887 else 5888 OS << Idx; 5889 } 5890 OS << ">"; 5891 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5892 OS << '<' << CSDN->getAPIntValue() << '>'; 5893 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5894 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5895 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5896 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5897 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5898 else { 5899 OS << "<APFloat("; 5900 CSDN->getValueAPF().bitcastToAPInt().dump(); 5901 OS << ")>"; 5902 } 5903 } else if (const GlobalAddressSDNode *GADN = 5904 dyn_cast<GlobalAddressSDNode>(this)) { 5905 int64_t offset = GADN->getOffset(); 5906 OS << '<'; 5907 WriteAsOperand(OS, GADN->getGlobal()); 5908 OS << '>'; 5909 if (offset > 0) 5910 OS << " + " << offset; 5911 else 5912 OS << " " << offset; 5913 if (unsigned int TF = GADN->getTargetFlags()) 5914 OS << " [TF=" << TF << ']'; 5915 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5916 OS << "<" << FIDN->getIndex() << ">"; 5917 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5918 OS << "<" << JTDN->getIndex() << ">"; 5919 if (unsigned int TF = JTDN->getTargetFlags()) 5920 OS << " [TF=" << TF << ']'; 5921 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5922 int offset = CP->getOffset(); 5923 if (CP->isMachineConstantPoolEntry()) 5924 OS << "<" << *CP->getMachineCPVal() << ">"; 5925 else 5926 OS << "<" << *CP->getConstVal() << ">"; 5927 if (offset > 0) 5928 OS << " + " << offset; 5929 else 5930 OS << " " << offset; 5931 if (unsigned int TF = CP->getTargetFlags()) 5932 OS << " [TF=" << TF << ']'; 5933 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5934 OS << "<"; 5935 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5936 if (LBB) 5937 OS << LBB->getName() << " "; 5938 OS << (const void*)BBDN->getBasicBlock() << ">"; 5939 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5940 if (G && R->getReg() && 5941 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5942 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5943 } else { 5944 OS << " %reg" << R->getReg(); 5945 } 5946 } else if (const ExternalSymbolSDNode *ES = 5947 dyn_cast<ExternalSymbolSDNode>(this)) { 5948 OS << "'" << ES->getSymbol() << "'"; 5949 if (unsigned int TF = ES->getTargetFlags()) 5950 OS << " [TF=" << TF << ']'; 5951 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5952 if (M->getValue()) 5953 OS << "<" << M->getValue() << ">"; 5954 else 5955 OS << "<null>"; 5956 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5957 if (MD->getMD()) 5958 OS << "<" << MD->getMD() << ">"; 5959 else 5960 OS << "<null>"; 5961 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5962 OS << ":" << N->getVT().getEVTString(); 5963 } 5964 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5965 OS << "<" << *LD->getMemOperand(); 5966 5967 bool doExt = true; 5968 switch (LD->getExtensionType()) { 5969 default: doExt = false; break; 5970 case ISD::EXTLOAD: OS << ", anyext"; break; 5971 case ISD::SEXTLOAD: OS << ", sext"; break; 5972 case ISD::ZEXTLOAD: OS << ", zext"; break; 5973 } 5974 if (doExt) 5975 OS << " from " << LD->getMemoryVT().getEVTString(); 5976 5977 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5978 if (*AM) 5979 OS << ", " << AM; 5980 5981 OS << ">"; 5982 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5983 OS << "<" << *ST->getMemOperand(); 5984 5985 if (ST->isTruncatingStore()) 5986 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5987 5988 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5989 if (*AM) 5990 OS << ", " << AM; 5991 5992 OS << ">"; 5993 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5994 OS << "<" << *M->getMemOperand() << ">"; 5995 } else if (const BlockAddressSDNode *BA = 5996 dyn_cast<BlockAddressSDNode>(this)) { 5997 OS << "<"; 5998 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5999 OS << ", "; 6000 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6001 OS << ">"; 6002 if (unsigned int TF = BA->getTargetFlags()) 6003 OS << " [TF=" << TF << ']'; 6004 } 6005 6006 if (G) 6007 if (unsigned Order = G->GetOrdering(this)) 6008 OS << " [ORD=" << Order << ']'; 6009 6010 if (getNodeId() != -1) 6011 OS << " [ID=" << getNodeId() << ']'; 6012 6013 DebugLoc dl = getDebugLoc(); 6014 if (G && !dl.isUnknown()) { 6015 DIScope 6016 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6017 OS << " dbg:"; 6018 // Omit the directory, since it's usually long and uninteresting. 6019 if (Scope.Verify()) 6020 OS << Scope.getFilename(); 6021 else 6022 OS << "<unknown>"; 6023 OS << ':' << dl.getLine(); 6024 if (dl.getCol() != 0) 6025 OS << ':' << dl.getCol(); 6026 } 6027} 6028 6029void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6030 print_types(OS, G); 6031 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6032 if (i) OS << ", "; else OS << " "; 6033 OS << (void*)getOperand(i).getNode(); 6034 if (unsigned RN = getOperand(i).getResNo()) 6035 OS << ":" << RN; 6036 } 6037 print_details(OS, G); 6038} 6039 6040static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6041 const SelectionDAG *G, unsigned depth, 6042 unsigned indent) 6043{ 6044 if (depth == 0) 6045 return; 6046 6047 OS.indent(indent); 6048 6049 N->print(OS, G); 6050 6051 if (depth < 1) 6052 return; 6053 6054 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6055 OS << '\n'; 6056 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6057 } 6058} 6059 6060void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6061 unsigned depth) const { 6062 printrWithDepthHelper(OS, this, G, depth, 0); 6063} 6064 6065void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6066 // Don't print impossibly deep things. 6067 printrWithDepth(OS, G, 100); 6068} 6069 6070void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6071 printrWithDepth(dbgs(), G, depth); 6072} 6073 6074void SDNode::dumprFull(const SelectionDAG *G) const { 6075 // Don't print impossibly deep things. 6076 dumprWithDepth(G, 100); 6077} 6078 6079static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6080 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6081 if (N->getOperand(i).getNode()->hasOneUse()) 6082 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6083 else 6084 dbgs() << "\n" << std::string(indent+2, ' ') 6085 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6086 6087 6088 dbgs() << "\n"; 6089 dbgs().indent(indent); 6090 N->dump(G); 6091} 6092 6093SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6094 assert(N->getNumValues() == 1 && 6095 "Can't unroll a vector with multiple results!"); 6096 6097 EVT VT = N->getValueType(0); 6098 unsigned NE = VT.getVectorNumElements(); 6099 EVT EltVT = VT.getVectorElementType(); 6100 DebugLoc dl = N->getDebugLoc(); 6101 6102 SmallVector<SDValue, 8> Scalars; 6103 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6104 6105 // If ResNE is 0, fully unroll the vector op. 6106 if (ResNE == 0) 6107 ResNE = NE; 6108 else if (NE > ResNE) 6109 NE = ResNE; 6110 6111 unsigned i; 6112 for (i= 0; i != NE; ++i) { 6113 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6114 SDValue Operand = N->getOperand(j); 6115 EVT OperandVT = Operand.getValueType(); 6116 if (OperandVT.isVector()) { 6117 // A vector operand; extract a single element. 6118 EVT OperandEltVT = OperandVT.getVectorElementType(); 6119 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6120 OperandEltVT, 6121 Operand, 6122 getConstant(i, MVT::i32)); 6123 } else { 6124 // A scalar operand; just use it as is. 6125 Operands[j] = Operand; 6126 } 6127 } 6128 6129 switch (N->getOpcode()) { 6130 default: 6131 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6132 &Operands[0], Operands.size())); 6133 break; 6134 case ISD::SHL: 6135 case ISD::SRA: 6136 case ISD::SRL: 6137 case ISD::ROTL: 6138 case ISD::ROTR: 6139 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6140 getShiftAmountOperand(Operands[1]))); 6141 break; 6142 case ISD::SIGN_EXTEND_INREG: 6143 case ISD::FP_ROUND_INREG: { 6144 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6145 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6146 Operands[0], 6147 getValueType(ExtVT))); 6148 } 6149 } 6150 } 6151 6152 for (; i < ResNE; ++i) 6153 Scalars.push_back(getUNDEF(EltVT)); 6154 6155 return getNode(ISD::BUILD_VECTOR, dl, 6156 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6157 &Scalars[0], Scalars.size()); 6158} 6159 6160 6161/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6162/// location that is 'Dist' units away from the location that the 'Base' load 6163/// is loading from. 6164bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6165 unsigned Bytes, int Dist) const { 6166 if (LD->getChain() != Base->getChain()) 6167 return false; 6168 EVT VT = LD->getValueType(0); 6169 if (VT.getSizeInBits() / 8 != Bytes) 6170 return false; 6171 6172 SDValue Loc = LD->getOperand(1); 6173 SDValue BaseLoc = Base->getOperand(1); 6174 if (Loc.getOpcode() == ISD::FrameIndex) { 6175 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6176 return false; 6177 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6178 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6179 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6180 int FS = MFI->getObjectSize(FI); 6181 int BFS = MFI->getObjectSize(BFI); 6182 if (FS != BFS || FS != (int)Bytes) return false; 6183 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6184 } 6185 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6186 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6187 if (V && (V->getSExtValue() == Dist*Bytes)) 6188 return true; 6189 } 6190 6191 const GlobalValue *GV1 = NULL; 6192 const GlobalValue *GV2 = NULL; 6193 int64_t Offset1 = 0; 6194 int64_t Offset2 = 0; 6195 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6196 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6197 if (isGA1 && isGA2 && GV1 == GV2) 6198 return Offset1 == (Offset2 + Dist*Bytes); 6199 return false; 6200} 6201 6202 6203/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6204/// it cannot be inferred. 6205unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6206 // If this is a GlobalAddress + cst, return the alignment. 6207 const GlobalValue *GV; 6208 int64_t GVOffset = 0; 6209 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6210 // If GV has specified alignment, then use it. Otherwise, use the preferred 6211 // alignment. 6212 unsigned Align = GV->getAlignment(); 6213 if (!Align) { 6214 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6215 if (GVar->hasInitializer()) { 6216 const TargetData *TD = TLI.getTargetData(); 6217 Align = TD->getPreferredAlignment(GVar); 6218 } 6219 } 6220 } 6221 return MinAlign(Align, GVOffset); 6222 } 6223 6224 // If this is a direct reference to a stack slot, use information about the 6225 // stack slot's alignment. 6226 int FrameIdx = 1 << 31; 6227 int64_t FrameOffset = 0; 6228 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6229 FrameIdx = FI->getIndex(); 6230 } else if (Ptr.getOpcode() == ISD::ADD && 6231 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6232 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6233 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6234 FrameOffset = Ptr.getConstantOperandVal(1); 6235 } 6236 6237 if (FrameIdx != (1 << 31)) { 6238 // FIXME: Handle FI+CST. 6239 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6240 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6241 FrameOffset); 6242 if (MFI.isFixedObjectIndex(FrameIdx)) { 6243 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6244 6245 // The alignment of the frame index can be determined from its offset from 6246 // the incoming frame position. If the frame object is at offset 32 and 6247 // the stack is guaranteed to be 16-byte aligned, then we know that the 6248 // object is 16-byte aligned. 6249 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6250 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6251 6252 // Finally, the frame object itself may have a known alignment. Factor 6253 // the alignment + offset into a new alignment. For example, if we know 6254 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6255 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6256 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6257 return std::max(Align, FIInfoAlign); 6258 } 6259 return FIInfoAlign; 6260 } 6261 6262 return 0; 6263} 6264 6265void SelectionDAG::dump() const { 6266 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6267 6268 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6269 I != E; ++I) { 6270 const SDNode *N = I; 6271 if (!N->hasOneUse() && N != getRoot().getNode()) 6272 DumpNodes(N, 2, this); 6273 } 6274 6275 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6276 6277 dbgs() << "\n\n"; 6278} 6279 6280void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6281 print_types(OS, G); 6282 print_details(OS, G); 6283} 6284 6285typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6286static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6287 const SelectionDAG *G, VisitedSDNodeSet &once) { 6288 if (!once.insert(N)) // If we've been here before, return now. 6289 return; 6290 6291 // Dump the current SDNode, but don't end the line yet. 6292 OS << std::string(indent, ' '); 6293 N->printr(OS, G); 6294 6295 // Having printed this SDNode, walk the children: 6296 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6297 const SDNode *child = N->getOperand(i).getNode(); 6298 6299 if (i) OS << ","; 6300 OS << " "; 6301 6302 if (child->getNumOperands() == 0) { 6303 // This child has no grandchildren; print it inline right here. 6304 child->printr(OS, G); 6305 once.insert(child); 6306 } else { // Just the address. FIXME: also print the child's opcode. 6307 OS << (void*)child; 6308 if (unsigned RN = N->getOperand(i).getResNo()) 6309 OS << ":" << RN; 6310 } 6311 } 6312 6313 OS << "\n"; 6314 6315 // Dump children that have grandchildren on their own line(s). 6316 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6317 const SDNode *child = N->getOperand(i).getNode(); 6318 DumpNodesr(OS, child, indent+2, G, once); 6319 } 6320} 6321 6322void SDNode::dumpr() const { 6323 VisitedSDNodeSet once; 6324 DumpNodesr(dbgs(), this, 0, 0, once); 6325} 6326 6327void SDNode::dumpr(const SelectionDAG *G) const { 6328 VisitedSDNodeSet once; 6329 DumpNodesr(dbgs(), this, 0, G, once); 6330} 6331 6332 6333// getAddressSpace - Return the address space this GlobalAddress belongs to. 6334unsigned GlobalAddressSDNode::getAddressSpace() const { 6335 return getGlobal()->getType()->getAddressSpace(); 6336} 6337 6338 6339const Type *ConstantPoolSDNode::getType() const { 6340 if (isMachineConstantPoolEntry()) 6341 return Val.MachineCPVal->getType(); 6342 return Val.ConstVal->getType(); 6343} 6344 6345bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6346 APInt &SplatUndef, 6347 unsigned &SplatBitSize, 6348 bool &HasAnyUndefs, 6349 unsigned MinSplatBits, 6350 bool isBigEndian) { 6351 EVT VT = getValueType(0); 6352 assert(VT.isVector() && "Expected a vector type"); 6353 unsigned sz = VT.getSizeInBits(); 6354 if (MinSplatBits > sz) 6355 return false; 6356 6357 SplatValue = APInt(sz, 0); 6358 SplatUndef = APInt(sz, 0); 6359 6360 // Get the bits. Bits with undefined values (when the corresponding element 6361 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6362 // in SplatValue. If any of the values are not constant, give up and return 6363 // false. 6364 unsigned int nOps = getNumOperands(); 6365 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6366 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6367 6368 for (unsigned j = 0; j < nOps; ++j) { 6369 unsigned i = isBigEndian ? nOps-1-j : j; 6370 SDValue OpVal = getOperand(i); 6371 unsigned BitPos = j * EltBitSize; 6372 6373 if (OpVal.getOpcode() == ISD::UNDEF) 6374 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6375 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6376 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6377 zextOrTrunc(sz) << BitPos; 6378 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6379 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6380 else 6381 return false; 6382 } 6383 6384 // The build_vector is all constants or undefs. Find the smallest element 6385 // size that splats the vector. 6386 6387 HasAnyUndefs = (SplatUndef != 0); 6388 while (sz > 8) { 6389 6390 unsigned HalfSize = sz / 2; 6391 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6392 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6393 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6394 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6395 6396 // If the two halves do not match (ignoring undef bits), stop here. 6397 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6398 MinSplatBits > HalfSize) 6399 break; 6400 6401 SplatValue = HighValue | LowValue; 6402 SplatUndef = HighUndef & LowUndef; 6403 6404 sz = HalfSize; 6405 } 6406 6407 SplatBitSize = sz; 6408 return true; 6409} 6410 6411bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6412 // Find the first non-undef value in the shuffle mask. 6413 unsigned i, e; 6414 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6415 /* search */; 6416 6417 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6418 6419 // Make sure all remaining elements are either undef or the same as the first 6420 // non-undef value. 6421 for (int Idx = Mask[i]; i != e; ++i) 6422 if (Mask[i] >= 0 && Mask[i] != Idx) 6423 return false; 6424 return true; 6425} 6426 6427#ifdef XDEBUG 6428static void checkForCyclesHelper(const SDNode *N, 6429 SmallPtrSet<const SDNode*, 32> &Visited, 6430 SmallPtrSet<const SDNode*, 32> &Checked) { 6431 // If this node has already been checked, don't check it again. 6432 if (Checked.count(N)) 6433 return; 6434 6435 // If a node has already been visited on this depth-first walk, reject it as 6436 // a cycle. 6437 if (!Visited.insert(N)) { 6438 dbgs() << "Offending node:\n"; 6439 N->dumprFull(); 6440 errs() << "Detected cycle in SelectionDAG\n"; 6441 abort(); 6442 } 6443 6444 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6445 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6446 6447 Checked.insert(N); 6448 Visited.erase(N); 6449} 6450#endif 6451 6452void llvm::checkForCycles(const llvm::SDNode *N) { 6453#ifdef XDEBUG 6454 assert(N && "Checking nonexistant SDNode"); 6455 SmallPtrSet<const SDNode*, 32> visited; 6456 SmallPtrSet<const SDNode*, 32> checked; 6457 checkForCyclesHelper(N, visited, checked); 6458#endif 6459} 6460 6461void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6462 checkForCycles(DAG->getRoot().getNode()); 6463} 6464