SelectionDAG.cpp revision dd0fb018a7cd2214c7bc5c6c767f626f99b47ba9
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeDbgValue.h" 16#include "llvm/ADT/SetVector.h" 17#include "llvm/ADT/SmallPtrSet.h" 18#include "llvm/ADT/SmallSet.h" 19#include "llvm/ADT/SmallVector.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/Analysis/TargetTransformInfo.h" 22#include "llvm/Analysis/ValueTracking.h" 23#include "llvm/Assembly/Writer.h" 24#include "llvm/CodeGen/MachineBasicBlock.h" 25#include "llvm/CodeGen/MachineConstantPool.h" 26#include "llvm/CodeGen/MachineFrameInfo.h" 27#include "llvm/CodeGen/MachineModuleInfo.h" 28#include "llvm/DebugInfo.h" 29#include "llvm/IR/CallingConv.h" 30#include "llvm/IR/Constants.h" 31#include "llvm/IR/DataLayout.h" 32#include "llvm/IR/DerivedTypes.h" 33#include "llvm/IR/Function.h" 34#include "llvm/IR/GlobalAlias.h" 35#include "llvm/IR/GlobalVariable.h" 36#include "llvm/IR/Intrinsics.h" 37#include "llvm/Support/CommandLine.h" 38#include "llvm/Support/Debug.h" 39#include "llvm/Support/ErrorHandling.h" 40#include "llvm/Support/ManagedStatic.h" 41#include "llvm/Support/MathExtras.h" 42#include "llvm/Support/Mutex.h" 43#include "llvm/Support/raw_ostream.h" 44#include "llvm/Target/TargetInstrInfo.h" 45#include "llvm/Target/TargetIntrinsicInfo.h" 46#include "llvm/Target/TargetLowering.h" 47#include "llvm/Target/TargetMachine.h" 48#include "llvm/Target/TargetOptions.h" 49#include "llvm/Target/TargetRegisterInfo.h" 50#include "llvm/Target/TargetSelectionDAGInfo.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62// Default null implementations of the callbacks. 63void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} 64void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} 65 66//===----------------------------------------------------------------------===// 67// ConstantFPSDNode Class 68//===----------------------------------------------------------------------===// 69 70/// isExactlyValue - We don't rely on operator== working on double values, as 71/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 72/// As such, this method can be used to do an exact bit-for-bit comparison of 73/// two floating point values. 74bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 75 return getValueAPF().bitwiseIsEqual(V); 76} 77 78bool ConstantFPSDNode::isValueValidForType(EVT VT, 79 const APFloat& Val) { 80 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 81 82 // convert modifies in place, so make a copy. 83 APFloat Val2 = APFloat(Val); 84 bool losesInfo; 85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT), 86 APFloat::rmNearestTiesToEven, 87 &losesInfo); 88 return !losesInfo; 89} 90 91//===----------------------------------------------------------------------===// 92// ISD Namespace 93//===----------------------------------------------------------------------===// 94 95/// isBuildVectorAllOnes - Return true if the specified node is a 96/// BUILD_VECTOR where all of the elements are ~0 or undef. 97bool ISD::isBuildVectorAllOnes(const SDNode *N) { 98 // Look through a bit convert. 99 if (N->getOpcode() == ISD::BITCAST) 100 N = N->getOperand(0).getNode(); 101 102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 103 104 unsigned i = 0, e = N->getNumOperands(); 105 106 // Skip over all of the undef values. 107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 108 ++i; 109 110 // Do not accept an all-undef vector. 111 if (i == e) return false; 112 113 // Do not accept build_vectors that aren't all constants or which have non-~0 114 // elements. We have to be a bit careful here, as the type of the constant 115 // may not be the same as the type of the vector elements due to type 116 // legalization (the elements are promoted to a legal type for the target and 117 // a vector of a type may be legal when the base element type is not). 118 // We only want to check enough bits to cover the vector elements, because 119 // we care if the resultant vector is all ones, not whether the individual 120 // constants are. 121 SDValue NotZero = N->getOperand(i); 122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) { 124 if (CN->getAPIntValue().countTrailingOnes() < EltSize) 125 return false; 126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) { 127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) 128 return false; 129 } else 130 return false; 131 132 // Okay, we have at least one ~0 value, check to see if the rest match or are 133 // undefs. Even with the above element type twiddling, this should be OK, as 134 // the same type legalization should have applied to all the elements. 135 for (++i; i != e; ++i) 136 if (N->getOperand(i) != NotZero && 137 N->getOperand(i).getOpcode() != ISD::UNDEF) 138 return false; 139 return true; 140} 141 142 143/// isBuildVectorAllZeros - Return true if the specified node is a 144/// BUILD_VECTOR where all of the elements are 0 or undef. 145bool ISD::isBuildVectorAllZeros(const SDNode *N) { 146 // Look through a bit convert. 147 if (N->getOpcode() == ISD::BITCAST) 148 N = N->getOperand(0).getNode(); 149 150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 151 152 unsigned i = 0, e = N->getNumOperands(); 153 154 // Skip over all of the undef values. 155 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 156 ++i; 157 158 // Do not accept an all-undef vector. 159 if (i == e) return false; 160 161 // Do not accept build_vectors that aren't all constants or which have non-0 162 // elements. 163 SDValue Zero = N->getOperand(i); 164 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) { 165 if (!CN->isNullValue()) 166 return false; 167 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) { 168 if (!CFPN->getValueAPF().isPosZero()) 169 return false; 170 } else 171 return false; 172 173 // Okay, we have at least one 0 value, check to see if the rest match or are 174 // undefs. 175 for (++i; i != e; ++i) 176 if (N->getOperand(i) != Zero && 177 N->getOperand(i).getOpcode() != ISD::UNDEF) 178 return false; 179 return true; 180} 181 182/// isScalarToVector - Return true if the specified node is a 183/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 184/// element is not an undef. 185bool ISD::isScalarToVector(const SDNode *N) { 186 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 187 return true; 188 189 if (N->getOpcode() != ISD::BUILD_VECTOR) 190 return false; 191 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 192 return false; 193 unsigned NumElems = N->getNumOperands(); 194 if (NumElems == 1) 195 return false; 196 for (unsigned i = 1; i < NumElems; ++i) { 197 SDValue V = N->getOperand(i); 198 if (V.getOpcode() != ISD::UNDEF) 199 return false; 200 } 201 return true; 202} 203 204/// allOperandsUndef - Return true if the node has at least one operand 205/// and all operands of the specified node are ISD::UNDEF. 206bool ISD::allOperandsUndef(const SDNode *N) { 207 // Return false if the node has no operands. 208 // This is "logically inconsistent" with the definition of "all" but 209 // is probably the desired behavior. 210 if (N->getNumOperands() == 0) 211 return false; 212 213 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i) 214 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 215 return false; 216 217 return true; 218} 219 220/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 221/// when given the operation for (X op Y). 222ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 223 // To perform this operation, we just need to swap the L and G bits of the 224 // operation. 225 unsigned OldL = (Operation >> 2) & 1; 226 unsigned OldG = (Operation >> 1) & 1; 227 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 228 (OldL << 1) | // New G bit 229 (OldG << 2)); // New L bit. 230} 231 232/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 233/// 'op' is a valid SetCC operation. 234ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 235 unsigned Operation = Op; 236 if (isInteger) 237 Operation ^= 7; // Flip L, G, E bits, but not U. 238 else 239 Operation ^= 15; // Flip all of the condition bits. 240 241 if (Operation > ISD::SETTRUE2) 242 Operation &= ~8; // Don't let N and U bits get set. 243 244 return ISD::CondCode(Operation); 245} 246 247 248/// isSignedOp - For an integer comparison, return 1 if the comparison is a 249/// signed operation and 2 if the result is an unsigned comparison. Return zero 250/// if the operation does not depend on the sign of the input (setne and seteq). 251static int isSignedOp(ISD::CondCode Opcode) { 252 switch (Opcode) { 253 default: llvm_unreachable("Illegal integer setcc operation!"); 254 case ISD::SETEQ: 255 case ISD::SETNE: return 0; 256 case ISD::SETLT: 257 case ISD::SETLE: 258 case ISD::SETGT: 259 case ISD::SETGE: return 1; 260 case ISD::SETULT: 261 case ISD::SETULE: 262 case ISD::SETUGT: 263 case ISD::SETUGE: return 2; 264 } 265} 266 267/// getSetCCOrOperation - Return the result of a logical OR between different 268/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 269/// returns SETCC_INVALID if it is not possible to represent the resultant 270/// comparison. 271ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 272 bool isInteger) { 273 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 274 // Cannot fold a signed integer setcc with an unsigned integer setcc. 275 return ISD::SETCC_INVALID; 276 277 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 278 279 // If the N and U bits get set then the resultant comparison DOES suddenly 280 // care about orderedness, and is true when ordered. 281 if (Op > ISD::SETTRUE2) 282 Op &= ~16; // Clear the U bit if the N bit is set. 283 284 // Canonicalize illegal integer setcc's. 285 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 286 Op = ISD::SETNE; 287 288 return ISD::CondCode(Op); 289} 290 291/// getSetCCAndOperation - Return the result of a logical AND between different 292/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 293/// function returns zero if it is not possible to represent the resultant 294/// comparison. 295ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 296 bool isInteger) { 297 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 298 // Cannot fold a signed setcc with an unsigned setcc. 299 return ISD::SETCC_INVALID; 300 301 // Combine all of the condition bits. 302 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 303 304 // Canonicalize illegal integer setcc's. 305 if (isInteger) { 306 switch (Result) { 307 default: break; 308 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 309 case ISD::SETOEQ: // SETEQ & SETU[LG]E 310 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 311 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 312 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 313 } 314 } 315 316 return Result; 317} 318 319//===----------------------------------------------------------------------===// 320// SDNode Profile Support 321//===----------------------------------------------------------------------===// 322 323/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 324/// 325static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 326 ID.AddInteger(OpC); 327} 328 329/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 330/// solely with their pointer. 331static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 332 ID.AddPointer(VTList.VTs); 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDValue *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 346/// 347static void AddNodeIDOperands(FoldingSetNodeID &ID, 348 const SDUse *Ops, unsigned NumOps) { 349 for (; NumOps; --NumOps, ++Ops) { 350 ID.AddPointer(Ops->getNode()); 351 ID.AddInteger(Ops->getResNo()); 352 } 353} 354 355static void AddNodeIDNode(FoldingSetNodeID &ID, 356 unsigned short OpC, SDVTList VTList, 357 const SDValue *OpList, unsigned N) { 358 AddNodeIDOpcode(ID, OpC); 359 AddNodeIDValueTypes(ID, VTList); 360 AddNodeIDOperands(ID, OpList, N); 361} 362 363/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 364/// the NodeID data. 365static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 366 switch (N->getOpcode()) { 367 case ISD::TargetExternalSymbol: 368 case ISD::ExternalSymbol: 369 llvm_unreachable("Should only be used on nodes with operands"); 370 default: break; // Normal nodes don't need extra info. 371 case ISD::TargetConstant: 372 case ISD::Constant: 373 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 374 break; 375 case ISD::TargetConstantFP: 376 case ISD::ConstantFP: { 377 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 378 break; 379 } 380 case ISD::TargetGlobalAddress: 381 case ISD::GlobalAddress: 382 case ISD::TargetGlobalTLSAddress: 383 case ISD::GlobalTLSAddress: { 384 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 385 ID.AddPointer(GA->getGlobal()); 386 ID.AddInteger(GA->getOffset()); 387 ID.AddInteger(GA->getTargetFlags()); 388 ID.AddInteger(GA->getAddressSpace()); 389 break; 390 } 391 case ISD::BasicBlock: 392 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 393 break; 394 case ISD::Register: 395 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 396 break; 397 case ISD::RegisterMask: 398 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 399 break; 400 case ISD::SRCVALUE: 401 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 402 break; 403 case ISD::FrameIndex: 404 case ISD::TargetFrameIndex: 405 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 406 break; 407 case ISD::JumpTable: 408 case ISD::TargetJumpTable: 409 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 410 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 411 break; 412 case ISD::ConstantPool: 413 case ISD::TargetConstantPool: { 414 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 415 ID.AddInteger(CP->getAlignment()); 416 ID.AddInteger(CP->getOffset()); 417 if (CP->isMachineConstantPoolEntry()) 418 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 419 else 420 ID.AddPointer(CP->getConstVal()); 421 ID.AddInteger(CP->getTargetFlags()); 422 break; 423 } 424 case ISD::TargetIndex: { 425 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N); 426 ID.AddInteger(TI->getIndex()); 427 ID.AddInteger(TI->getOffset()); 428 ID.AddInteger(TI->getTargetFlags()); 429 break; 430 } 431 case ISD::LOAD: { 432 const LoadSDNode *LD = cast<LoadSDNode>(N); 433 ID.AddInteger(LD->getMemoryVT().getRawBits()); 434 ID.AddInteger(LD->getRawSubclassData()); 435 ID.AddInteger(LD->getPointerInfo().getAddrSpace()); 436 break; 437 } 438 case ISD::STORE: { 439 const StoreSDNode *ST = cast<StoreSDNode>(N); 440 ID.AddInteger(ST->getMemoryVT().getRawBits()); 441 ID.AddInteger(ST->getRawSubclassData()); 442 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 443 break; 444 } 445 case ISD::ATOMIC_CMP_SWAP: 446 case ISD::ATOMIC_SWAP: 447 case ISD::ATOMIC_LOAD_ADD: 448 case ISD::ATOMIC_LOAD_SUB: 449 case ISD::ATOMIC_LOAD_AND: 450 case ISD::ATOMIC_LOAD_OR: 451 case ISD::ATOMIC_LOAD_XOR: 452 case ISD::ATOMIC_LOAD_NAND: 453 case ISD::ATOMIC_LOAD_MIN: 454 case ISD::ATOMIC_LOAD_MAX: 455 case ISD::ATOMIC_LOAD_UMIN: 456 case ISD::ATOMIC_LOAD_UMAX: 457 case ISD::ATOMIC_LOAD: 458 case ISD::ATOMIC_STORE: { 459 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 460 ID.AddInteger(AT->getMemoryVT().getRawBits()); 461 ID.AddInteger(AT->getRawSubclassData()); 462 ID.AddInteger(AT->getPointerInfo().getAddrSpace()); 463 break; 464 } 465 case ISD::PREFETCH: { 466 const MemSDNode *PF = cast<MemSDNode>(N); 467 ID.AddInteger(PF->getPointerInfo().getAddrSpace()); 468 break; 469 } 470 case ISD::VECTOR_SHUFFLE: { 471 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 472 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 473 i != e; ++i) 474 ID.AddInteger(SVN->getMaskElt(i)); 475 break; 476 } 477 case ISD::TargetBlockAddress: 478 case ISD::BlockAddress: { 479 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N); 480 ID.AddPointer(BA->getBlockAddress()); 481 ID.AddInteger(BA->getOffset()); 482 ID.AddInteger(BA->getTargetFlags()); 483 break; 484 } 485 } // end switch (N->getOpcode()) 486 487 // Target specific memory nodes could also have address spaces to check. 488 if (N->isTargetMemoryOpcode()) 489 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); 490} 491 492/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 493/// data. 494static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 495 AddNodeIDOpcode(ID, N->getOpcode()); 496 // Add the return value info. 497 AddNodeIDValueTypes(ID, N->getVTList()); 498 // Add the operand info. 499 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 500 501 // Handle SDNode leafs with special info. 502 AddNodeIDCustom(ID, N); 503} 504 505/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 506/// the CSE map that carries volatility, temporalness, indexing mode, and 507/// extension/truncation information. 508/// 509static inline unsigned 510encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 511 bool isNonTemporal, bool isInvariant) { 512 assert((ConvType & 3) == ConvType && 513 "ConvType may not require more than 2 bits!"); 514 assert((AM & 7) == AM && 515 "AM may not require more than 3 bits!"); 516 return ConvType | 517 (AM << 2) | 518 (isVolatile << 5) | 519 (isNonTemporal << 6) | 520 (isInvariant << 7); 521} 522 523//===----------------------------------------------------------------------===// 524// SelectionDAG Class 525//===----------------------------------------------------------------------===// 526 527/// doNotCSE - Return true if CSE should not be performed for this node. 528static bool doNotCSE(SDNode *N) { 529 if (N->getValueType(0) == MVT::Glue) 530 return true; // Never CSE anything that produces a flag. 531 532 switch (N->getOpcode()) { 533 default: break; 534 case ISD::HANDLENODE: 535 case ISD::EH_LABEL: 536 return true; // Never CSE these nodes. 537 } 538 539 // Check that remaining values produced are not flags. 540 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 541 if (N->getValueType(i) == MVT::Glue) 542 return true; // Never CSE anything that produces a flag. 543 544 return false; 545} 546 547/// RemoveDeadNodes - This method deletes all unreachable nodes in the 548/// SelectionDAG. 549void SelectionDAG::RemoveDeadNodes() { 550 // Create a dummy node (which is not added to allnodes), that adds a reference 551 // to the root node, preventing it from being deleted. 552 HandleSDNode Dummy(getRoot()); 553 554 SmallVector<SDNode*, 128> DeadNodes; 555 556 // Add all obviously-dead nodes to the DeadNodes worklist. 557 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 558 if (I->use_empty()) 559 DeadNodes.push_back(I); 560 561 RemoveDeadNodes(DeadNodes); 562 563 // If the root changed (e.g. it was a dead load, update the root). 564 setRoot(Dummy.getValue()); 565} 566 567/// RemoveDeadNodes - This method deletes the unreachable nodes in the 568/// given list, and any nodes that become unreachable as a result. 569void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) { 570 571 // Process the worklist, deleting the nodes and adding their uses to the 572 // worklist. 573 while (!DeadNodes.empty()) { 574 SDNode *N = DeadNodes.pop_back_val(); 575 576 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 577 DUL->NodeDeleted(N, 0); 578 579 // Take the node out of the appropriate CSE map. 580 RemoveNodeFromCSEMaps(N); 581 582 // Next, brutally remove the operand list. This is safe to do, as there are 583 // no cycles in the graph. 584 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 585 SDUse &Use = *I++; 586 SDNode *Operand = Use.getNode(); 587 Use.set(SDValue()); 588 589 // Now that we removed this operand, see if there are no uses of it left. 590 if (Operand->use_empty()) 591 DeadNodes.push_back(Operand); 592 } 593 594 DeallocateNode(N); 595 } 596} 597 598void SelectionDAG::RemoveDeadNode(SDNode *N){ 599 SmallVector<SDNode*, 16> DeadNodes(1, N); 600 601 // Create a dummy node that adds a reference to the root node, preventing 602 // it from being deleted. (This matters if the root is an operand of the 603 // dead node.) 604 HandleSDNode Dummy(getRoot()); 605 606 RemoveDeadNodes(DeadNodes); 607} 608 609void SelectionDAG::DeleteNode(SDNode *N) { 610 // First take this out of the appropriate CSE map. 611 RemoveNodeFromCSEMaps(N); 612 613 // Finally, remove uses due to operands of this node, remove from the 614 // AllNodes list, and delete the node. 615 DeleteNodeNotInCSEMaps(N); 616} 617 618void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 619 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 620 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 621 622 // Drop all of the operands and decrement used node's use counts. 623 N->DropOperands(); 624 625 DeallocateNode(N); 626} 627 628void SelectionDAG::DeallocateNode(SDNode *N) { 629 if (N->OperandsNeedDelete) 630 delete[] N->OperandList; 631 632 // Set the opcode to DELETED_NODE to help catch bugs when node 633 // memory is reallocated. 634 N->NodeType = ISD::DELETED_NODE; 635 636 NodeAllocator.Deallocate(AllNodes.remove(N)); 637 638 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 639 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 640 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 641 DbgVals[i]->setIsInvalidated(); 642} 643 644/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 645/// correspond to it. This is useful when we're about to delete or repurpose 646/// the node. We don't want future request for structurally identical nodes 647/// to return N anymore. 648bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 649 bool Erased = false; 650 switch (N->getOpcode()) { 651 case ISD::HANDLENODE: return false; // noop. 652 case ISD::CONDCODE: 653 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 654 "Cond code doesn't exist!"); 655 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 656 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 657 break; 658 case ISD::ExternalSymbol: 659 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 660 break; 661 case ISD::TargetExternalSymbol: { 662 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 663 Erased = TargetExternalSymbols.erase( 664 std::pair<std::string,unsigned char>(ESN->getSymbol(), 665 ESN->getTargetFlags())); 666 break; 667 } 668 case ISD::VALUETYPE: { 669 EVT VT = cast<VTSDNode>(N)->getVT(); 670 if (VT.isExtended()) { 671 Erased = ExtendedValueTypeNodes.erase(VT); 672 } else { 673 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 674 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 675 } 676 break; 677 } 678 default: 679 // Remove it from the CSE Map. 680 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 681 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 682 Erased = CSEMap.RemoveNode(N); 683 break; 684 } 685#ifndef NDEBUG 686 // Verify that the node was actually in one of the CSE maps, unless it has a 687 // flag result (which cannot be CSE'd) or is one of the special cases that are 688 // not subject to CSE. 689 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 690 !N->isMachineOpcode() && !doNotCSE(N)) { 691 N->dump(this); 692 dbgs() << "\n"; 693 llvm_unreachable("Node is not in map!"); 694 } 695#endif 696 return Erased; 697} 698 699/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 700/// maps and modified in place. Add it back to the CSE maps, unless an identical 701/// node already exists, in which case transfer all its users to the existing 702/// node. This transfer can potentially trigger recursive merging. 703/// 704void 705SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) { 706 // For node types that aren't CSE'd, just act as if no identical node 707 // already exists. 708 if (!doNotCSE(N)) { 709 SDNode *Existing = CSEMap.GetOrInsertNode(N); 710 if (Existing != N) { 711 // If there was already an existing matching node, use ReplaceAllUsesWith 712 // to replace the dead one with the existing one. This can cause 713 // recursive merging of other unrelated nodes down the line. 714 ReplaceAllUsesWith(N, Existing); 715 716 // N is now dead. Inform the listeners and delete it. 717 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 718 DUL->NodeDeleted(N, Existing); 719 DeleteNodeNotInCSEMaps(N); 720 return; 721 } 722 } 723 724 // If the node doesn't already exist, we updated it. Inform listeners. 725 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 726 DUL->NodeUpdated(N); 727} 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 734 void *&InsertPos) { 735 if (doNotCSE(N)) 736 return 0; 737 738 SDValue Ops[] = { Op }; 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 747/// were replaced with those specified. If this node is never memoized, 748/// return null, otherwise return a pointer to the slot it would take. If a 749/// node already exists with these operands, the slot will be non-null. 750SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 751 SDValue Op1, SDValue Op2, 752 void *&InsertPos) { 753 if (doNotCSE(N)) 754 return 0; 755 756 SDValue Ops[] = { Op1, Op2 }; 757 FoldingSetNodeID ID; 758 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 759 AddNodeIDCustom(ID, N); 760 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 761 return Node; 762} 763 764 765/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 766/// were replaced with those specified. If this node is never memoized, 767/// return null, otherwise return a pointer to the slot it would take. If a 768/// node already exists with these operands, the slot will be non-null. 769SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 770 const SDValue *Ops,unsigned NumOps, 771 void *&InsertPos) { 772 if (doNotCSE(N)) 773 return 0; 774 775 FoldingSetNodeID ID; 776 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 777 AddNodeIDCustom(ID, N); 778 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 779 return Node; 780} 781 782#ifndef NDEBUG 783/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 784static void VerifyNodeCommon(SDNode *N) { 785 switch (N->getOpcode()) { 786 default: 787 break; 788 case ISD::BUILD_PAIR: { 789 EVT VT = N->getValueType(0); 790 assert(N->getNumValues() == 1 && "Too many results!"); 791 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 792 "Wrong return type!"); 793 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 794 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 795 "Mismatched operand types!"); 796 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 797 "Wrong operand type!"); 798 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 799 "Wrong return type size"); 800 break; 801 } 802 case ISD::BUILD_VECTOR: { 803 assert(N->getNumValues() == 1 && "Too many results!"); 804 assert(N->getValueType(0).isVector() && "Wrong return type!"); 805 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 806 "Wrong number of operands!"); 807 EVT EltVT = N->getValueType(0).getVectorElementType(); 808 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 809 assert((I->getValueType() == EltVT || 810 (EltVT.isInteger() && I->getValueType().isInteger() && 811 EltVT.bitsLE(I->getValueType()))) && 812 "Wrong operand type!"); 813 assert(I->getValueType() == N->getOperand(0).getValueType() && 814 "Operands must all have the same type"); 815 } 816 break; 817 } 818 } 819} 820 821/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 822static void VerifySDNode(SDNode *N) { 823 // The SDNode allocators cannot be used to allocate nodes with fields that are 824 // not present in an SDNode! 825 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 826 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 827 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 828 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 829 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 830 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 831 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 832 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 833 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 834 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 835 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 836 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 837 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 838 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 839 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 840 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 841 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 842 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 843 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 844 845 VerifyNodeCommon(N); 846} 847 848/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 849/// invalid. 850static void VerifyMachineNode(SDNode *N) { 851 // The MachineNode allocators cannot be used to allocate nodes with fields 852 // that are not present in a MachineNode! 853 // Currently there are no such nodes. 854 855 VerifyNodeCommon(N); 856} 857#endif // NDEBUG 858 859/// getEVTAlignment - Compute the default alignment value for the 860/// given type. 861/// 862unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 863 Type *Ty = VT == MVT::iPTR ? 864 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 865 VT.getTypeForEVT(*getContext()); 866 867 return TLI.getDataLayout()->getABITypeAlignment(Ty); 868} 869 870// EntryNode could meaningfully have debug info if we can find it... 871SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 872 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 873 TTI(0), OptLevel(OL), EntryNode(ISD::EntryToken, 0, DebugLoc(), 874 getVTList(MVT::Other)), 875 Root(getEntryNode()), UpdateListeners(0) { 876 AllNodes.push_back(&EntryNode); 877 DbgInfo = new SDDbgInfo(); 878} 879 880void SelectionDAG::init(MachineFunction &mf, const TargetTransformInfo *tti) { 881 MF = &mf; 882 TTI = tti; 883 Context = &mf.getFunction()->getContext(); 884} 885 886SelectionDAG::~SelectionDAG() { 887 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners"); 888 allnodes_clear(); 889 delete DbgInfo; 890} 891 892void SelectionDAG::allnodes_clear() { 893 assert(&*AllNodes.begin() == &EntryNode); 894 AllNodes.remove(AllNodes.begin()); 895 while (!AllNodes.empty()) 896 DeallocateNode(AllNodes.begin()); 897} 898 899void SelectionDAG::clear() { 900 allnodes_clear(); 901 OperandAllocator.Reset(); 902 CSEMap.clear(); 903 904 ExtendedValueTypeNodes.clear(); 905 ExternalSymbols.clear(); 906 TargetExternalSymbols.clear(); 907 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 908 static_cast<CondCodeSDNode*>(0)); 909 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 910 static_cast<SDNode*>(0)); 911 912 EntryNode.UseList = 0; 913 AllNodes.push_back(&EntryNode); 914 Root = getEntryNode(); 915 DbgInfo->clear(); 916} 917 918SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 919 return VT.bitsGT(Op.getValueType()) ? 920 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 921 getNode(ISD::TRUNCATE, DL, VT, Op); 922} 923 924SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 925 return VT.bitsGT(Op.getValueType()) ? 926 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 927 getNode(ISD::TRUNCATE, DL, VT, Op); 928} 929 930SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 931 return VT.bitsGT(Op.getValueType()) ? 932 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 933 getNode(ISD::TRUNCATE, DL, VT, Op); 934} 935 936SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) { 937 assert(!VT.isVector() && 938 "getZeroExtendInReg should use the vector element type instead of " 939 "the vector type!"); 940 if (Op.getValueType() == VT) return Op; 941 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 942 APInt Imm = APInt::getLowBitsSet(BitWidth, 943 VT.getSizeInBits()); 944 return getNode(ISD::AND, DL, Op.getValueType(), Op, 945 getConstant(Imm, Op.getValueType())); 946} 947 948/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 949/// 950SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) { 951 EVT EltVT = VT.getScalarType(); 952 SDValue NegOne = 953 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 954 return getNode(ISD::XOR, DL, VT, Val, NegOne); 955} 956 957SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 958 EVT EltVT = VT.getScalarType(); 959 assert((EltVT.getSizeInBits() >= 64 || 960 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 961 "getConstant with a uint64_t value that doesn't fit in the type!"); 962 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 963} 964 965SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 966 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 967} 968 969SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 970 assert(VT.isInteger() && "Cannot create FP integer constant!"); 971 972 EVT EltVT = VT.getScalarType(); 973 const ConstantInt *Elt = &Val; 974 975 // In some cases the vector type is legal but the element type is illegal and 976 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 977 // inserted value (the type does not need to match the vector element type). 978 // Any extra bits introduced will be truncated away. 979 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 980 TargetLowering::TypePromoteInteger) { 981 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 982 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 983 Elt = ConstantInt::get(*getContext(), NewVal); 984 } 985 986 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 987 "APInt size does not match type size!"); 988 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 989 FoldingSetNodeID ID; 990 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 991 ID.AddPointer(Elt); 992 void *IP = 0; 993 SDNode *N = NULL; 994 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 995 if (!VT.isVector()) 996 return SDValue(N, 0); 997 998 if (!N) { 999 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 1000 CSEMap.InsertNode(N, IP); 1001 AllNodes.push_back(N); 1002 } 1003 1004 SDValue Result(N, 0); 1005 if (VT.isVector()) { 1006 SmallVector<SDValue, 8> Ops; 1007 Ops.assign(VT.getVectorNumElements(), Result); 1008 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size()); 1009 } 1010 return Result; 1011} 1012 1013SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 1014 return getConstant(Val, TLI.getPointerTy(), isTarget); 1015} 1016 1017 1018SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1019 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1020} 1021 1022SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1023 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1024 1025 EVT EltVT = VT.getScalarType(); 1026 1027 // Do the map lookup using the actual bit pattern for the floating point 1028 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1029 // we don't have issues with SNANs. 1030 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1031 FoldingSetNodeID ID; 1032 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1033 ID.AddPointer(&V); 1034 void *IP = 0; 1035 SDNode *N = NULL; 1036 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1037 if (!VT.isVector()) 1038 return SDValue(N, 0); 1039 1040 if (!N) { 1041 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1042 CSEMap.InsertNode(N, IP); 1043 AllNodes.push_back(N); 1044 } 1045 1046 SDValue Result(N, 0); 1047 if (VT.isVector()) { 1048 SmallVector<SDValue, 8> Ops; 1049 Ops.assign(VT.getVectorNumElements(), Result); 1050 // FIXME SDLoc info might be appropriate here 1051 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size()); 1052 } 1053 return Result; 1054} 1055 1056SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1057 EVT EltVT = VT.getScalarType(); 1058 if (EltVT==MVT::f32) 1059 return getConstantFP(APFloat((float)Val), VT, isTarget); 1060 else if (EltVT==MVT::f64) 1061 return getConstantFP(APFloat(Val), VT, isTarget); 1062 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 || 1063 EltVT==MVT::f16) { 1064 bool ignored; 1065 APFloat apf = APFloat(Val); 1066 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1067 &ignored); 1068 return getConstantFP(apf, VT, isTarget); 1069 } else 1070 llvm_unreachable("Unsupported type in getConstantFP"); 1071} 1072 1073SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL, 1074 EVT VT, int64_t Offset, 1075 bool isTargetGA, 1076 unsigned char TargetFlags) { 1077 assert((TargetFlags == 0 || isTargetGA) && 1078 "Cannot set target flags on target-independent globals"); 1079 1080 // Truncate (with sign-extension) the offset value to the pointer size. 1081 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 1082 if (BitWidth < 64) 1083 Offset = SignExtend64(Offset, BitWidth); 1084 1085 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1086 if (!GVar) { 1087 // If GV is an alias then use the aliasee for determining thread-localness. 1088 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1089 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1090 } 1091 1092 unsigned Opc; 1093 if (GVar && GVar->isThreadLocal()) 1094 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1095 else 1096 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1097 1098 FoldingSetNodeID ID; 1099 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1100 ID.AddPointer(GV); 1101 ID.AddInteger(Offset); 1102 ID.AddInteger(TargetFlags); 1103 ID.AddInteger(GV->getType()->getAddressSpace()); 1104 void *IP = 0; 1105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1106 return SDValue(E, 0); 1107 1108 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(), 1109 DL.getDebugLoc(), GV, VT, 1110 Offset, TargetFlags); 1111 CSEMap.InsertNode(N, IP); 1112 AllNodes.push_back(N); 1113 return SDValue(N, 0); 1114} 1115 1116SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1117 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1118 FoldingSetNodeID ID; 1119 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1120 ID.AddInteger(FI); 1121 void *IP = 0; 1122 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1123 return SDValue(E, 0); 1124 1125 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1126 CSEMap.InsertNode(N, IP); 1127 AllNodes.push_back(N); 1128 return SDValue(N, 0); 1129} 1130 1131SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1132 unsigned char TargetFlags) { 1133 assert((TargetFlags == 0 || isTarget) && 1134 "Cannot set target flags on target-independent jump tables"); 1135 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1136 FoldingSetNodeID ID; 1137 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1138 ID.AddInteger(JTI); 1139 ID.AddInteger(TargetFlags); 1140 void *IP = 0; 1141 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1142 return SDValue(E, 0); 1143 1144 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1145 TargetFlags); 1146 CSEMap.InsertNode(N, IP); 1147 AllNodes.push_back(N); 1148 return SDValue(N, 0); 1149} 1150 1151SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1152 unsigned Alignment, int Offset, 1153 bool isTarget, 1154 unsigned char TargetFlags) { 1155 assert((TargetFlags == 0 || isTarget) && 1156 "Cannot set target flags on target-independent globals"); 1157 if (Alignment == 0) 1158 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType()); 1159 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1160 FoldingSetNodeID ID; 1161 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1162 ID.AddInteger(Alignment); 1163 ID.AddInteger(Offset); 1164 ID.AddPointer(C); 1165 ID.AddInteger(TargetFlags); 1166 void *IP = 0; 1167 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1168 return SDValue(E, 0); 1169 1170 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1171 Alignment, TargetFlags); 1172 CSEMap.InsertNode(N, IP); 1173 AllNodes.push_back(N); 1174 return SDValue(N, 0); 1175} 1176 1177 1178SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1179 unsigned Alignment, int Offset, 1180 bool isTarget, 1181 unsigned char TargetFlags) { 1182 assert((TargetFlags == 0 || isTarget) && 1183 "Cannot set target flags on target-independent globals"); 1184 if (Alignment == 0) 1185 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType()); 1186 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1187 FoldingSetNodeID ID; 1188 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1189 ID.AddInteger(Alignment); 1190 ID.AddInteger(Offset); 1191 C->addSelectionDAGCSEId(ID); 1192 ID.AddInteger(TargetFlags); 1193 void *IP = 0; 1194 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1195 return SDValue(E, 0); 1196 1197 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1198 Alignment, TargetFlags); 1199 CSEMap.InsertNode(N, IP); 1200 AllNodes.push_back(N); 1201 return SDValue(N, 0); 1202} 1203 1204SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset, 1205 unsigned char TargetFlags) { 1206 FoldingSetNodeID ID; 1207 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0); 1208 ID.AddInteger(Index); 1209 ID.AddInteger(Offset); 1210 ID.AddInteger(TargetFlags); 1211 void *IP = 0; 1212 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1213 return SDValue(E, 0); 1214 1215 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, 1216 TargetFlags); 1217 CSEMap.InsertNode(N, IP); 1218 AllNodes.push_back(N); 1219 return SDValue(N, 0); 1220} 1221 1222SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1223 FoldingSetNodeID ID; 1224 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1225 ID.AddPointer(MBB); 1226 void *IP = 0; 1227 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1228 return SDValue(E, 0); 1229 1230 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1231 CSEMap.InsertNode(N, IP); 1232 AllNodes.push_back(N); 1233 return SDValue(N, 0); 1234} 1235 1236SDValue SelectionDAG::getValueType(EVT VT) { 1237 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1238 ValueTypeNodes.size()) 1239 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1240 1241 SDNode *&N = VT.isExtended() ? 1242 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1243 1244 if (N) return SDValue(N, 0); 1245 N = new (NodeAllocator) VTSDNode(VT); 1246 AllNodes.push_back(N); 1247 return SDValue(N, 0); 1248} 1249 1250SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1251 SDNode *&N = ExternalSymbols[Sym]; 1252 if (N) return SDValue(N, 0); 1253 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1254 AllNodes.push_back(N); 1255 return SDValue(N, 0); 1256} 1257 1258SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1259 unsigned char TargetFlags) { 1260 SDNode *&N = 1261 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1262 TargetFlags)]; 1263 if (N) return SDValue(N, 0); 1264 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1265 AllNodes.push_back(N); 1266 return SDValue(N, 0); 1267} 1268 1269SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1270 if ((unsigned)Cond >= CondCodeNodes.size()) 1271 CondCodeNodes.resize(Cond+1); 1272 1273 if (CondCodeNodes[Cond] == 0) { 1274 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1275 CondCodeNodes[Cond] = N; 1276 AllNodes.push_back(N); 1277 } 1278 1279 return SDValue(CondCodeNodes[Cond], 0); 1280} 1281 1282// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1283// the shuffle mask M that point at N1 to point at N2, and indices that point 1284// N2 to point at N1. 1285static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1286 std::swap(N1, N2); 1287 int NElts = M.size(); 1288 for (int i = 0; i != NElts; ++i) { 1289 if (M[i] >= NElts) 1290 M[i] -= NElts; 1291 else if (M[i] >= 0) 1292 M[i] += NElts; 1293 } 1294} 1295 1296SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, 1297 SDValue N2, const int *Mask) { 1298 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1299 assert(VT.isVector() && N1.getValueType().isVector() && 1300 "Vector Shuffle VTs must be a vectors"); 1301 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1302 && "Vector Shuffle VTs must have same element type"); 1303 1304 // Canonicalize shuffle undef, undef -> undef 1305 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1306 return getUNDEF(VT); 1307 1308 // Validate that all indices in Mask are within the range of the elements 1309 // input to the shuffle. 1310 unsigned NElts = VT.getVectorNumElements(); 1311 SmallVector<int, 8> MaskVec; 1312 for (unsigned i = 0; i != NElts; ++i) { 1313 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1314 MaskVec.push_back(Mask[i]); 1315 } 1316 1317 // Canonicalize shuffle v, v -> v, undef 1318 if (N1 == N2) { 1319 N2 = getUNDEF(VT); 1320 for (unsigned i = 0; i != NElts; ++i) 1321 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1322 } 1323 1324 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1325 if (N1.getOpcode() == ISD::UNDEF) 1326 commuteShuffle(N1, N2, MaskVec); 1327 1328 // Canonicalize all index into lhs, -> shuffle lhs, undef 1329 // Canonicalize all index into rhs, -> shuffle rhs, undef 1330 bool AllLHS = true, AllRHS = true; 1331 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1332 for (unsigned i = 0; i != NElts; ++i) { 1333 if (MaskVec[i] >= (int)NElts) { 1334 if (N2Undef) 1335 MaskVec[i] = -1; 1336 else 1337 AllLHS = false; 1338 } else if (MaskVec[i] >= 0) { 1339 AllRHS = false; 1340 } 1341 } 1342 if (AllLHS && AllRHS) 1343 return getUNDEF(VT); 1344 if (AllLHS && !N2Undef) 1345 N2 = getUNDEF(VT); 1346 if (AllRHS) { 1347 N1 = getUNDEF(VT); 1348 commuteShuffle(N1, N2, MaskVec); 1349 } 1350 1351 // If Identity shuffle, or all shuffle in to undef, return that node. 1352 bool AllUndef = true; 1353 bool Identity = true; 1354 for (unsigned i = 0; i != NElts; ++i) { 1355 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1356 if (MaskVec[i] >= 0) AllUndef = false; 1357 } 1358 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1359 return N1; 1360 if (AllUndef) 1361 return getUNDEF(VT); 1362 1363 FoldingSetNodeID ID; 1364 SDValue Ops[2] = { N1, N2 }; 1365 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1366 for (unsigned i = 0; i != NElts; ++i) 1367 ID.AddInteger(MaskVec[i]); 1368 1369 void* IP = 0; 1370 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1371 return SDValue(E, 0); 1372 1373 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1374 // SDNode doesn't have access to it. This memory will be "leaked" when 1375 // the node is deallocated, but recovered when the NodeAllocator is released. 1376 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1377 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1378 1379 ShuffleVectorSDNode *N = 1380 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(), dl.getDebugLoc(), N1, N2, MaskAlloc); 1381 CSEMap.InsertNode(N, IP); 1382 AllNodes.push_back(N); 1383 return SDValue(N, 0); 1384} 1385 1386SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl, 1387 SDValue Val, SDValue DTy, 1388 SDValue STy, SDValue Rnd, SDValue Sat, 1389 ISD::CvtCode Code) { 1390 // If the src and dest types are the same and the conversion is between 1391 // integer types of the same sign or two floats, no conversion is necessary. 1392 if (DTy == STy && 1393 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1394 return Val; 1395 1396 FoldingSetNodeID ID; 1397 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1398 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1399 void* IP = 0; 1400 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1401 return SDValue(E, 0); 1402 1403 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(), dl.getDebugLoc(), Ops, 5, 1404 Code); 1405 CSEMap.InsertNode(N, IP); 1406 AllNodes.push_back(N); 1407 return SDValue(N, 0); 1408} 1409 1410SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1411 FoldingSetNodeID ID; 1412 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1413 ID.AddInteger(RegNo); 1414 void *IP = 0; 1415 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1416 return SDValue(E, 0); 1417 1418 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1419 CSEMap.InsertNode(N, IP); 1420 AllNodes.push_back(N); 1421 return SDValue(N, 0); 1422} 1423 1424SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1425 FoldingSetNodeID ID; 1426 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1427 ID.AddPointer(RegMask); 1428 void *IP = 0; 1429 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1430 return SDValue(E, 0); 1431 1432 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1433 CSEMap.InsertNode(N, IP); 1434 AllNodes.push_back(N); 1435 return SDValue(N, 0); 1436} 1437 1438SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) { 1439 FoldingSetNodeID ID; 1440 SDValue Ops[] = { Root }; 1441 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1442 ID.AddPointer(Label); 1443 void *IP = 0; 1444 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1445 return SDValue(E, 0); 1446 1447 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(), dl.getDebugLoc(), Root, Label); 1448 CSEMap.InsertNode(N, IP); 1449 AllNodes.push_back(N); 1450 return SDValue(N, 0); 1451} 1452 1453 1454SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1455 int64_t Offset, 1456 bool isTarget, 1457 unsigned char TargetFlags) { 1458 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1459 1460 FoldingSetNodeID ID; 1461 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1462 ID.AddPointer(BA); 1463 ID.AddInteger(Offset); 1464 ID.AddInteger(TargetFlags); 1465 void *IP = 0; 1466 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1467 return SDValue(E, 0); 1468 1469 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset, 1470 TargetFlags); 1471 CSEMap.InsertNode(N, IP); 1472 AllNodes.push_back(N); 1473 return SDValue(N, 0); 1474} 1475 1476SDValue SelectionDAG::getSrcValue(const Value *V) { 1477 assert((!V || V->getType()->isPointerTy()) && 1478 "SrcValue is not a pointer?"); 1479 1480 FoldingSetNodeID ID; 1481 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1482 ID.AddPointer(V); 1483 1484 void *IP = 0; 1485 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1486 return SDValue(E, 0); 1487 1488 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1489 CSEMap.InsertNode(N, IP); 1490 AllNodes.push_back(N); 1491 return SDValue(N, 0); 1492} 1493 1494/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1495SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1496 FoldingSetNodeID ID; 1497 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1498 ID.AddPointer(MD); 1499 1500 void *IP = 0; 1501 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1502 return SDValue(E, 0); 1503 1504 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1505 CSEMap.InsertNode(N, IP); 1506 AllNodes.push_back(N); 1507 return SDValue(N, 0); 1508} 1509 1510 1511/// getShiftAmountOperand - Return the specified value casted to 1512/// the target's desired shift amount type. 1513SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1514 EVT OpTy = Op.getValueType(); 1515 EVT ShTy = TLI.getShiftAmountTy(LHSTy); 1516 if (OpTy == ShTy || OpTy.isVector()) return Op; 1517 1518 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1519 return getNode(Opcode, SDLoc(Op), ShTy, Op); 1520} 1521 1522/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1523/// specified value type. 1524SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1525 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1526 unsigned ByteSize = VT.getStoreSize(); 1527 Type *Ty = VT.getTypeForEVT(*getContext()); 1528 unsigned StackAlign = 1529 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign); 1530 1531 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1532 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1533} 1534 1535/// CreateStackTemporary - Create a stack temporary suitable for holding 1536/// either of the specified value types. 1537SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1538 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1539 VT2.getStoreSizeInBits())/8; 1540 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1541 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1542 const DataLayout *TD = TLI.getDataLayout(); 1543 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1544 TD->getPrefTypeAlignment(Ty2)); 1545 1546 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1547 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1548 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1549} 1550 1551SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1552 SDValue N2, ISD::CondCode Cond, SDLoc dl) { 1553 // These setcc operations always fold. 1554 switch (Cond) { 1555 default: break; 1556 case ISD::SETFALSE: 1557 case ISD::SETFALSE2: return getConstant(0, VT); 1558 case ISD::SETTRUE: 1559 case ISD::SETTRUE2: return getConstant(1, VT); 1560 1561 case ISD::SETOEQ: 1562 case ISD::SETOGT: 1563 case ISD::SETOGE: 1564 case ISD::SETOLT: 1565 case ISD::SETOLE: 1566 case ISD::SETONE: 1567 case ISD::SETO: 1568 case ISD::SETUO: 1569 case ISD::SETUEQ: 1570 case ISD::SETUNE: 1571 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1572 break; 1573 } 1574 1575 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1576 const APInt &C2 = N2C->getAPIntValue(); 1577 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1578 const APInt &C1 = N1C->getAPIntValue(); 1579 1580 switch (Cond) { 1581 default: llvm_unreachable("Unknown integer setcc!"); 1582 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1583 case ISD::SETNE: return getConstant(C1 != C2, VT); 1584 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1585 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1586 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1587 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1588 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1589 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1590 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1591 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1592 } 1593 } 1594 } 1595 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1596 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1597 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1598 switch (Cond) { 1599 default: break; 1600 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1601 return getUNDEF(VT); 1602 // fall through 1603 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1604 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1605 return getUNDEF(VT); 1606 // fall through 1607 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1608 R==APFloat::cmpLessThan, VT); 1609 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1610 return getUNDEF(VT); 1611 // fall through 1612 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1613 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1614 return getUNDEF(VT); 1615 // fall through 1616 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1617 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1618 return getUNDEF(VT); 1619 // fall through 1620 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1621 R==APFloat::cmpEqual, VT); 1622 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1623 return getUNDEF(VT); 1624 // fall through 1625 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1626 R==APFloat::cmpEqual, VT); 1627 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1628 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1629 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1630 R==APFloat::cmpEqual, VT); 1631 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1632 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1633 R==APFloat::cmpLessThan, VT); 1634 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1635 R==APFloat::cmpUnordered, VT); 1636 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1637 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1638 } 1639 } else { 1640 // Ensure that the constant occurs on the RHS. 1641 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1642 } 1643 } 1644 1645 // Could not fold it. 1646 return SDValue(); 1647} 1648 1649/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1650/// use this predicate to simplify operations downstream. 1651bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1652 // This predicate is not safe for vector operations. 1653 if (Op.getValueType().isVector()) 1654 return false; 1655 1656 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1657 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1658} 1659 1660/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1661/// this predicate to simplify operations downstream. Mask is known to be zero 1662/// for bits that V cannot have. 1663bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1664 unsigned Depth) const { 1665 APInt KnownZero, KnownOne; 1666 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1667 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1668 return (KnownZero & Mask) == Mask; 1669} 1670 1671/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1672/// known to be either zero or one and return them in the KnownZero/KnownOne 1673/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1674/// processing. 1675void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1676 APInt &KnownOne, unsigned Depth) const { 1677 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1678 1679 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1680 if (Depth == 6) 1681 return; // Limit search depth. 1682 1683 APInt KnownZero2, KnownOne2; 1684 1685 switch (Op.getOpcode()) { 1686 case ISD::Constant: 1687 // We know all of the bits for a constant! 1688 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1689 KnownZero = ~KnownOne; 1690 return; 1691 case ISD::AND: 1692 // If either the LHS or the RHS are Zero, the result is zero. 1693 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1694 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1695 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1696 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1697 1698 // Output known-1 bits are only known if set in both the LHS & RHS. 1699 KnownOne &= KnownOne2; 1700 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1701 KnownZero |= KnownZero2; 1702 return; 1703 case ISD::OR: 1704 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1705 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1706 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1707 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1708 1709 // Output known-0 bits are only known if clear in both the LHS & RHS. 1710 KnownZero &= KnownZero2; 1711 // Output known-1 are known to be set if set in either the LHS | RHS. 1712 KnownOne |= KnownOne2; 1713 return; 1714 case ISD::XOR: { 1715 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1716 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1717 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1718 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1719 1720 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1721 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1722 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1723 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1724 KnownZero = KnownZeroOut; 1725 return; 1726 } 1727 case ISD::MUL: { 1728 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1729 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1730 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1731 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1732 1733 // If low bits are zero in either operand, output low known-0 bits. 1734 // Also compute a conserative estimate for high known-0 bits. 1735 // More trickiness is possible, but this is sufficient for the 1736 // interesting case of alignment computation. 1737 KnownOne.clearAllBits(); 1738 unsigned TrailZ = KnownZero.countTrailingOnes() + 1739 KnownZero2.countTrailingOnes(); 1740 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1741 KnownZero2.countLeadingOnes(), 1742 BitWidth) - BitWidth; 1743 1744 TrailZ = std::min(TrailZ, BitWidth); 1745 LeadZ = std::min(LeadZ, BitWidth); 1746 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1747 APInt::getHighBitsSet(BitWidth, LeadZ); 1748 return; 1749 } 1750 case ISD::UDIV: { 1751 // For the purposes of computing leading zeros we can conservatively 1752 // treat a udiv as a logical right shift by the power of 2 known to 1753 // be less than the denominator. 1754 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1755 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1756 1757 KnownOne2.clearAllBits(); 1758 KnownZero2.clearAllBits(); 1759 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1760 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1761 if (RHSUnknownLeadingOnes != BitWidth) 1762 LeadZ = std::min(BitWidth, 1763 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1764 1765 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1766 return; 1767 } 1768 case ISD::SELECT: 1769 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1770 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1771 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1772 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1773 1774 // Only known if known in both the LHS and RHS. 1775 KnownOne &= KnownOne2; 1776 KnownZero &= KnownZero2; 1777 return; 1778 case ISD::SELECT_CC: 1779 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1780 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1781 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1782 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1783 1784 // Only known if known in both the LHS and RHS. 1785 KnownOne &= KnownOne2; 1786 KnownZero &= KnownZero2; 1787 return; 1788 case ISD::SADDO: 1789 case ISD::UADDO: 1790 case ISD::SSUBO: 1791 case ISD::USUBO: 1792 case ISD::SMULO: 1793 case ISD::UMULO: 1794 if (Op.getResNo() != 1) 1795 return; 1796 // The boolean result conforms to getBooleanContents. Fall through. 1797 case ISD::SETCC: 1798 // If we know the result of a setcc has the top bits zero, use this info. 1799 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1800 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1801 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1802 return; 1803 case ISD::SHL: 1804 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1805 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1806 unsigned ShAmt = SA->getZExtValue(); 1807 1808 // If the shift count is an invalid immediate, don't do anything. 1809 if (ShAmt >= BitWidth) 1810 return; 1811 1812 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1813 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1814 KnownZero <<= ShAmt; 1815 KnownOne <<= ShAmt; 1816 // low bits known zero. 1817 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1818 } 1819 return; 1820 case ISD::SRL: 1821 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1822 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1823 unsigned ShAmt = SA->getZExtValue(); 1824 1825 // If the shift count is an invalid immediate, don't do anything. 1826 if (ShAmt >= BitWidth) 1827 return; 1828 1829 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1830 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1831 KnownZero = KnownZero.lshr(ShAmt); 1832 KnownOne = KnownOne.lshr(ShAmt); 1833 1834 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1835 KnownZero |= HighBits; // High bits known zero. 1836 } 1837 return; 1838 case ISD::SRA: 1839 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1840 unsigned ShAmt = SA->getZExtValue(); 1841 1842 // If the shift count is an invalid immediate, don't do anything. 1843 if (ShAmt >= BitWidth) 1844 return; 1845 1846 // If any of the demanded bits are produced by the sign extension, we also 1847 // demand the input sign bit. 1848 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1849 1850 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1851 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1852 KnownZero = KnownZero.lshr(ShAmt); 1853 KnownOne = KnownOne.lshr(ShAmt); 1854 1855 // Handle the sign bits. 1856 APInt SignBit = APInt::getSignBit(BitWidth); 1857 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1858 1859 if (KnownZero.intersects(SignBit)) { 1860 KnownZero |= HighBits; // New bits are known zero. 1861 } else if (KnownOne.intersects(SignBit)) { 1862 KnownOne |= HighBits; // New bits are known one. 1863 } 1864 } 1865 return; 1866 case ISD::SIGN_EXTEND_INREG: { 1867 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1868 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1869 1870 // Sign extension. Compute the demanded bits in the result that are not 1871 // present in the input. 1872 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1873 1874 APInt InSignBit = APInt::getSignBit(EBits); 1875 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1876 1877 // If the sign extended bits are demanded, we know that the sign 1878 // bit is demanded. 1879 InSignBit = InSignBit.zext(BitWidth); 1880 if (NewBits.getBoolValue()) 1881 InputDemandedBits |= InSignBit; 1882 1883 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1884 KnownOne &= InputDemandedBits; 1885 KnownZero &= InputDemandedBits; 1886 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1887 1888 // If the sign bit of the input is known set or clear, then we know the 1889 // top bits of the result. 1890 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1891 KnownZero |= NewBits; 1892 KnownOne &= ~NewBits; 1893 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1894 KnownOne |= NewBits; 1895 KnownZero &= ~NewBits; 1896 } else { // Input sign bit unknown 1897 KnownZero &= ~NewBits; 1898 KnownOne &= ~NewBits; 1899 } 1900 return; 1901 } 1902 case ISD::CTTZ: 1903 case ISD::CTTZ_ZERO_UNDEF: 1904 case ISD::CTLZ: 1905 case ISD::CTLZ_ZERO_UNDEF: 1906 case ISD::CTPOP: { 1907 unsigned LowBits = Log2_32(BitWidth)+1; 1908 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1909 KnownOne.clearAllBits(); 1910 return; 1911 } 1912 case ISD::LOAD: { 1913 LoadSDNode *LD = cast<LoadSDNode>(Op); 1914 // If this is a ZEXTLoad and we are looking at the loaded value. 1915 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) { 1916 EVT VT = LD->getMemoryVT(); 1917 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1918 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1919 } else if (const MDNode *Ranges = LD->getRanges()) { 1920 computeMaskedBitsLoad(*Ranges, KnownZero); 1921 } 1922 return; 1923 } 1924 case ISD::ZERO_EXTEND: { 1925 EVT InVT = Op.getOperand(0).getValueType(); 1926 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1927 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1928 KnownZero = KnownZero.trunc(InBits); 1929 KnownOne = KnownOne.trunc(InBits); 1930 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1931 KnownZero = KnownZero.zext(BitWidth); 1932 KnownOne = KnownOne.zext(BitWidth); 1933 KnownZero |= NewBits; 1934 return; 1935 } 1936 case ISD::SIGN_EXTEND: { 1937 EVT InVT = Op.getOperand(0).getValueType(); 1938 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1939 APInt InSignBit = APInt::getSignBit(InBits); 1940 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1941 1942 KnownZero = KnownZero.trunc(InBits); 1943 KnownOne = KnownOne.trunc(InBits); 1944 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1945 1946 // Note if the sign bit is known to be zero or one. 1947 bool SignBitKnownZero = KnownZero.isNegative(); 1948 bool SignBitKnownOne = KnownOne.isNegative(); 1949 assert(!(SignBitKnownZero && SignBitKnownOne) && 1950 "Sign bit can't be known to be both zero and one!"); 1951 1952 KnownZero = KnownZero.zext(BitWidth); 1953 KnownOne = KnownOne.zext(BitWidth); 1954 1955 // If the sign bit is known zero or one, the top bits match. 1956 if (SignBitKnownZero) 1957 KnownZero |= NewBits; 1958 else if (SignBitKnownOne) 1959 KnownOne |= NewBits; 1960 return; 1961 } 1962 case ISD::ANY_EXTEND: { 1963 EVT InVT = Op.getOperand(0).getValueType(); 1964 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1965 KnownZero = KnownZero.trunc(InBits); 1966 KnownOne = KnownOne.trunc(InBits); 1967 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1968 KnownZero = KnownZero.zext(BitWidth); 1969 KnownOne = KnownOne.zext(BitWidth); 1970 return; 1971 } 1972 case ISD::TRUNCATE: { 1973 EVT InVT = Op.getOperand(0).getValueType(); 1974 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1975 KnownZero = KnownZero.zext(InBits); 1976 KnownOne = KnownOne.zext(InBits); 1977 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1978 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1979 KnownZero = KnownZero.trunc(BitWidth); 1980 KnownOne = KnownOne.trunc(BitWidth); 1981 break; 1982 } 1983 case ISD::AssertZext: { 1984 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1985 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1986 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1987 KnownZero |= (~InMask); 1988 KnownOne &= (~KnownZero); 1989 return; 1990 } 1991 case ISD::FGETSIGN: 1992 // All bits are zero except the low bit. 1993 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1994 return; 1995 1996 case ISD::SUB: { 1997 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1998 // We know that the top bits of C-X are clear if X contains less bits 1999 // than C (i.e. no wrap-around can happen). For example, 20-X is 2000 // positive if we can prove that X is >= 0 and < 16. 2001 if (CLHS->getAPIntValue().isNonNegative()) { 2002 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 2003 // NLZ can't be BitWidth with no sign bit 2004 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 2005 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2006 2007 // If all of the MaskV bits are known to be zero, then we know the 2008 // output top bits are zero, because we now know that the output is 2009 // from [0-C]. 2010 if ((KnownZero2 & MaskV) == MaskV) { 2011 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 2012 // Top bits known zero. 2013 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 2014 } 2015 } 2016 } 2017 } 2018 // fall through 2019 case ISD::ADD: 2020 case ISD::ADDE: { 2021 // Output known-0 bits are known if clear or set in both the low clear bits 2022 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2023 // low 3 bits clear. 2024 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 2025 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2026 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2027 2028 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2029 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2030 KnownZeroOut = std::min(KnownZeroOut, 2031 KnownZero2.countTrailingOnes()); 2032 2033 if (Op.getOpcode() == ISD::ADD) { 2034 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2035 return; 2036 } 2037 2038 // With ADDE, a carry bit may be added in, so we can only use this 2039 // information if we know (at least) that the low two bits are clear. We 2040 // then return to the caller that the low bit is unknown but that other bits 2041 // are known zero. 2042 if (KnownZeroOut >= 2) // ADDE 2043 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2044 return; 2045 } 2046 case ISD::SREM: 2047 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2048 const APInt &RA = Rem->getAPIntValue().abs(); 2049 if (RA.isPowerOf2()) { 2050 APInt LowBits = RA - 1; 2051 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2052 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2053 2054 // The low bits of the first operand are unchanged by the srem. 2055 KnownZero = KnownZero2 & LowBits; 2056 KnownOne = KnownOne2 & LowBits; 2057 2058 // If the first operand is non-negative or has all low bits zero, then 2059 // the upper bits are all zero. 2060 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2061 KnownZero |= ~LowBits; 2062 2063 // If the first operand is negative and not all low bits are zero, then 2064 // the upper bits are all one. 2065 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2066 KnownOne |= ~LowBits; 2067 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2068 } 2069 } 2070 return; 2071 case ISD::UREM: { 2072 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2073 const APInt &RA = Rem->getAPIntValue(); 2074 if (RA.isPowerOf2()) { 2075 APInt LowBits = (RA - 1); 2076 KnownZero |= ~LowBits; 2077 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2078 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2079 break; 2080 } 2081 } 2082 2083 // Since the result is less than or equal to either operand, any leading 2084 // zero bits in either operand must also exist in the result. 2085 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2086 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2087 2088 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2089 KnownZero2.countLeadingOnes()); 2090 KnownOne.clearAllBits(); 2091 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2092 return; 2093 } 2094 case ISD::FrameIndex: 2095 case ISD::TargetFrameIndex: 2096 if (unsigned Align = InferPtrAlignment(Op)) { 2097 // The low bits are known zero if the pointer is aligned. 2098 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2099 return; 2100 } 2101 break; 2102 2103 default: 2104 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2105 break; 2106 // Fallthrough 2107 case ISD::INTRINSIC_WO_CHAIN: 2108 case ISD::INTRINSIC_W_CHAIN: 2109 case ISD::INTRINSIC_VOID: 2110 // Allow the target to implement this method for its nodes. 2111 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2112 return; 2113 } 2114} 2115 2116/// ComputeNumSignBits - Return the number of times the sign bit of the 2117/// register is replicated into the other bits. We know that at least 1 bit 2118/// is always equal to the sign bit (itself), but other cases can give us 2119/// information. For example, immediately after an "SRA X, 2", we know that 2120/// the top 3 bits are all equal to each other, so we return 3. 2121unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2122 EVT VT = Op.getValueType(); 2123 assert(VT.isInteger() && "Invalid VT!"); 2124 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2125 unsigned Tmp, Tmp2; 2126 unsigned FirstAnswer = 1; 2127 2128 if (Depth == 6) 2129 return 1; // Limit search depth. 2130 2131 switch (Op.getOpcode()) { 2132 default: break; 2133 case ISD::AssertSext: 2134 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2135 return VTBits-Tmp+1; 2136 case ISD::AssertZext: 2137 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2138 return VTBits-Tmp; 2139 2140 case ISD::Constant: { 2141 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2142 return Val.getNumSignBits(); 2143 } 2144 2145 case ISD::SIGN_EXTEND: 2146 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2147 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2148 2149 case ISD::SIGN_EXTEND_INREG: 2150 // Max of the input and what this extends. 2151 Tmp = 2152 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2153 Tmp = VTBits-Tmp+1; 2154 2155 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2156 return std::max(Tmp, Tmp2); 2157 2158 case ISD::SRA: 2159 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2160 // SRA X, C -> adds C sign bits. 2161 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2162 Tmp += C->getZExtValue(); 2163 if (Tmp > VTBits) Tmp = VTBits; 2164 } 2165 return Tmp; 2166 case ISD::SHL: 2167 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2168 // shl destroys sign bits. 2169 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2170 if (C->getZExtValue() >= VTBits || // Bad shift. 2171 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2172 return Tmp - C->getZExtValue(); 2173 } 2174 break; 2175 case ISD::AND: 2176 case ISD::OR: 2177 case ISD::XOR: // NOT is handled here. 2178 // Logical binary ops preserve the number of sign bits at the worst. 2179 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2180 if (Tmp != 1) { 2181 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2182 FirstAnswer = std::min(Tmp, Tmp2); 2183 // We computed what we know about the sign bits as our first 2184 // answer. Now proceed to the generic code that uses 2185 // ComputeMaskedBits, and pick whichever answer is better. 2186 } 2187 break; 2188 2189 case ISD::SELECT: 2190 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2191 if (Tmp == 1) return 1; // Early out. 2192 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2193 return std::min(Tmp, Tmp2); 2194 2195 case ISD::SADDO: 2196 case ISD::UADDO: 2197 case ISD::SSUBO: 2198 case ISD::USUBO: 2199 case ISD::SMULO: 2200 case ISD::UMULO: 2201 if (Op.getResNo() != 1) 2202 break; 2203 // The boolean result conforms to getBooleanContents. Fall through. 2204 case ISD::SETCC: 2205 // If setcc returns 0/-1, all bits are sign bits. 2206 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2207 TargetLowering::ZeroOrNegativeOneBooleanContent) 2208 return VTBits; 2209 break; 2210 case ISD::ROTL: 2211 case ISD::ROTR: 2212 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2213 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2214 2215 // Handle rotate right by N like a rotate left by 32-N. 2216 if (Op.getOpcode() == ISD::ROTR) 2217 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2218 2219 // If we aren't rotating out all of the known-in sign bits, return the 2220 // number that are left. This handles rotl(sext(x), 1) for example. 2221 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2222 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2223 } 2224 break; 2225 case ISD::ADD: 2226 // Add can have at most one carry bit. Thus we know that the output 2227 // is, at worst, one more bit than the inputs. 2228 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2229 if (Tmp == 1) return 1; // Early out. 2230 2231 // Special case decrementing a value (ADD X, -1): 2232 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2233 if (CRHS->isAllOnesValue()) { 2234 APInt KnownZero, KnownOne; 2235 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2236 2237 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2238 // sign bits set. 2239 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2240 return VTBits; 2241 2242 // If we are subtracting one from a positive number, there is no carry 2243 // out of the result. 2244 if (KnownZero.isNegative()) 2245 return Tmp; 2246 } 2247 2248 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2249 if (Tmp2 == 1) return 1; 2250 return std::min(Tmp, Tmp2)-1; 2251 2252 case ISD::SUB: 2253 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2254 if (Tmp2 == 1) return 1; 2255 2256 // Handle NEG. 2257 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2258 if (CLHS->isNullValue()) { 2259 APInt KnownZero, KnownOne; 2260 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2261 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2262 // sign bits set. 2263 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2264 return VTBits; 2265 2266 // If the input is known to be positive (the sign bit is known clear), 2267 // the output of the NEG has the same number of sign bits as the input. 2268 if (KnownZero.isNegative()) 2269 return Tmp2; 2270 2271 // Otherwise, we treat this like a SUB. 2272 } 2273 2274 // Sub can have at most one carry bit. Thus we know that the output 2275 // is, at worst, one more bit than the inputs. 2276 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2277 if (Tmp == 1) return 1; // Early out. 2278 return std::min(Tmp, Tmp2)-1; 2279 case ISD::TRUNCATE: 2280 // FIXME: it's tricky to do anything useful for this, but it is an important 2281 // case for targets like X86. 2282 break; 2283 } 2284 2285 // If we are looking at the loaded value of the SDNode. 2286 if (Op.getResNo() == 0) { 2287 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2288 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 2289 unsigned ExtType = LD->getExtensionType(); 2290 switch (ExtType) { 2291 default: break; 2292 case ISD::SEXTLOAD: // '17' bits known 2293 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2294 return VTBits-Tmp+1; 2295 case ISD::ZEXTLOAD: // '16' bits known 2296 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2297 return VTBits-Tmp; 2298 } 2299 } 2300 } 2301 2302 // Allow the target to implement this method for its nodes. 2303 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2304 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2305 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2306 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2307 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2308 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2309 } 2310 2311 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2312 // use this information. 2313 APInt KnownZero, KnownOne; 2314 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2315 2316 APInt Mask; 2317 if (KnownZero.isNegative()) { // sign bit is 0 2318 Mask = KnownZero; 2319 } else if (KnownOne.isNegative()) { // sign bit is 1; 2320 Mask = KnownOne; 2321 } else { 2322 // Nothing known. 2323 return FirstAnswer; 2324 } 2325 2326 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2327 // the number of identical bits in the top of the input value. 2328 Mask = ~Mask; 2329 Mask <<= Mask.getBitWidth()-VTBits; 2330 // Return # leading zeros. We use 'min' here in case Val was zero before 2331 // shifting. We don't want to return '64' as for an i32 "0". 2332 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2333} 2334 2335/// isBaseWithConstantOffset - Return true if the specified operand is an 2336/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2337/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2338/// semantics as an ADD. This handles the equivalence: 2339/// X|Cst == X+Cst iff X&Cst = 0. 2340bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2341 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2342 !isa<ConstantSDNode>(Op.getOperand(1))) 2343 return false; 2344 2345 if (Op.getOpcode() == ISD::OR && 2346 !MaskedValueIsZero(Op.getOperand(0), 2347 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2348 return false; 2349 2350 return true; 2351} 2352 2353 2354bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2355 // If we're told that NaNs won't happen, assume they won't. 2356 if (getTarget().Options.NoNaNsFPMath) 2357 return true; 2358 2359 // If the value is a constant, we can obviously see if it is a NaN or not. 2360 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2361 return !C->getValueAPF().isNaN(); 2362 2363 // TODO: Recognize more cases here. 2364 2365 return false; 2366} 2367 2368bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2369 // If the value is a constant, we can obviously see if it is a zero or not. 2370 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2371 return !C->isZero(); 2372 2373 // TODO: Recognize more cases here. 2374 switch (Op.getOpcode()) { 2375 default: break; 2376 case ISD::OR: 2377 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2378 return !C->isNullValue(); 2379 break; 2380 } 2381 2382 return false; 2383} 2384 2385bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2386 // Check the obvious case. 2387 if (A == B) return true; 2388 2389 // For for negative and positive zero. 2390 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2391 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2392 if (CA->isZero() && CB->isZero()) return true; 2393 2394 // Otherwise they may not be equal. 2395 return false; 2396} 2397 2398/// getNode - Gets or creates the specified node. 2399/// 2400SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) { 2401 FoldingSetNodeID ID; 2402 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2403 void *IP = 0; 2404 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2405 return SDValue(E, 0); 2406 2407 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), getVTList(VT)); 2408 CSEMap.InsertNode(N, IP); 2409 2410 AllNodes.push_back(N); 2411#ifndef NDEBUG 2412 VerifySDNode(N); 2413#endif 2414 return SDValue(N, 0); 2415} 2416 2417SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 2418 EVT VT, SDValue Operand) { 2419 // Constant fold unary operations with an integer constant operand. 2420 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2421 const APInt &Val = C->getAPIntValue(); 2422 switch (Opcode) { 2423 default: break; 2424 case ISD::SIGN_EXTEND: 2425 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2426 case ISD::ANY_EXTEND: 2427 case ISD::ZERO_EXTEND: 2428 case ISD::TRUNCATE: 2429 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2430 case ISD::UINT_TO_FP: 2431 case ISD::SINT_TO_FP: { 2432 APFloat apf(EVTToAPFloatSemantics(VT), 2433 APInt::getNullValue(VT.getSizeInBits())); 2434 (void)apf.convertFromAPInt(Val, 2435 Opcode==ISD::SINT_TO_FP, 2436 APFloat::rmNearestTiesToEven); 2437 return getConstantFP(apf, VT); 2438 } 2439 case ISD::BITCAST: 2440 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2441 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT); 2442 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2443 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT); 2444 break; 2445 case ISD::BSWAP: 2446 return getConstant(Val.byteSwap(), VT); 2447 case ISD::CTPOP: 2448 return getConstant(Val.countPopulation(), VT); 2449 case ISD::CTLZ: 2450 case ISD::CTLZ_ZERO_UNDEF: 2451 return getConstant(Val.countLeadingZeros(), VT); 2452 case ISD::CTTZ: 2453 case ISD::CTTZ_ZERO_UNDEF: 2454 return getConstant(Val.countTrailingZeros(), VT); 2455 } 2456 } 2457 2458 // Constant fold unary operations with a floating point constant operand. 2459 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2460 APFloat V = C->getValueAPF(); // make copy 2461 switch (Opcode) { 2462 case ISD::FNEG: 2463 V.changeSign(); 2464 return getConstantFP(V, VT); 2465 case ISD::FABS: 2466 V.clearSign(); 2467 return getConstantFP(V, VT); 2468 case ISD::FCEIL: { 2469 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive); 2470 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2471 return getConstantFP(V, VT); 2472 break; 2473 } 2474 case ISD::FTRUNC: { 2475 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero); 2476 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2477 return getConstantFP(V, VT); 2478 break; 2479 } 2480 case ISD::FFLOOR: { 2481 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative); 2482 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2483 return getConstantFP(V, VT); 2484 break; 2485 } 2486 case ISD::FP_EXTEND: { 2487 bool ignored; 2488 // This can return overflow, underflow, or inexact; we don't care. 2489 // FIXME need to be more flexible about rounding mode. 2490 (void)V.convert(EVTToAPFloatSemantics(VT), 2491 APFloat::rmNearestTiesToEven, &ignored); 2492 return getConstantFP(V, VT); 2493 } 2494 case ISD::FP_TO_SINT: 2495 case ISD::FP_TO_UINT: { 2496 integerPart x[2]; 2497 bool ignored; 2498 assert(integerPartWidth >= 64); 2499 // FIXME need to be more flexible about rounding mode. 2500 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2501 Opcode==ISD::FP_TO_SINT, 2502 APFloat::rmTowardZero, &ignored); 2503 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2504 break; 2505 APInt api(VT.getSizeInBits(), x); 2506 return getConstant(api, VT); 2507 } 2508 case ISD::BITCAST: 2509 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2510 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2511 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2512 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2513 break; 2514 } 2515 } 2516 2517 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2518 switch (Opcode) { 2519 case ISD::TokenFactor: 2520 case ISD::MERGE_VALUES: 2521 case ISD::CONCAT_VECTORS: 2522 return Operand; // Factor, merge or concat of one node? No need. 2523 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2524 case ISD::FP_EXTEND: 2525 assert(VT.isFloatingPoint() && 2526 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2527 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2528 assert((!VT.isVector() || 2529 VT.getVectorNumElements() == 2530 Operand.getValueType().getVectorNumElements()) && 2531 "Vector element count mismatch!"); 2532 if (Operand.getOpcode() == ISD::UNDEF) 2533 return getUNDEF(VT); 2534 break; 2535 case ISD::SIGN_EXTEND: 2536 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2537 "Invalid SIGN_EXTEND!"); 2538 if (Operand.getValueType() == VT) return Operand; // noop extension 2539 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2540 "Invalid sext node, dst < src!"); 2541 assert((!VT.isVector() || 2542 VT.getVectorNumElements() == 2543 Operand.getValueType().getVectorNumElements()) && 2544 "Vector element count mismatch!"); 2545 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2546 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2547 else if (OpOpcode == ISD::UNDEF) 2548 // sext(undef) = 0, because the top bits will all be the same. 2549 return getConstant(0, VT); 2550 break; 2551 case ISD::ZERO_EXTEND: 2552 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2553 "Invalid ZERO_EXTEND!"); 2554 if (Operand.getValueType() == VT) return Operand; // noop extension 2555 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2556 "Invalid zext node, dst < src!"); 2557 assert((!VT.isVector() || 2558 VT.getVectorNumElements() == 2559 Operand.getValueType().getVectorNumElements()) && 2560 "Vector element count mismatch!"); 2561 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2562 return getNode(ISD::ZERO_EXTEND, DL, VT, 2563 Operand.getNode()->getOperand(0)); 2564 else if (OpOpcode == ISD::UNDEF) 2565 // zext(undef) = 0, because the top bits will be zero. 2566 return getConstant(0, VT); 2567 break; 2568 case ISD::ANY_EXTEND: 2569 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2570 "Invalid ANY_EXTEND!"); 2571 if (Operand.getValueType() == VT) return Operand; // noop extension 2572 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2573 "Invalid anyext node, dst < src!"); 2574 assert((!VT.isVector() || 2575 VT.getVectorNumElements() == 2576 Operand.getValueType().getVectorNumElements()) && 2577 "Vector element count mismatch!"); 2578 2579 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2580 OpOpcode == ISD::ANY_EXTEND) 2581 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2582 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2583 else if (OpOpcode == ISD::UNDEF) 2584 return getUNDEF(VT); 2585 2586 // (ext (trunx x)) -> x 2587 if (OpOpcode == ISD::TRUNCATE) { 2588 SDValue OpOp = Operand.getNode()->getOperand(0); 2589 if (OpOp.getValueType() == VT) 2590 return OpOp; 2591 } 2592 break; 2593 case ISD::TRUNCATE: 2594 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2595 "Invalid TRUNCATE!"); 2596 if (Operand.getValueType() == VT) return Operand; // noop truncate 2597 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2598 "Invalid truncate node, src < dst!"); 2599 assert((!VT.isVector() || 2600 VT.getVectorNumElements() == 2601 Operand.getValueType().getVectorNumElements()) && 2602 "Vector element count mismatch!"); 2603 if (OpOpcode == ISD::TRUNCATE) 2604 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2605 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2606 OpOpcode == ISD::ANY_EXTEND) { 2607 // If the source is smaller than the dest, we still need an extend. 2608 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2609 .bitsLT(VT.getScalarType())) 2610 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2611 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2612 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2613 return Operand.getNode()->getOperand(0); 2614 } 2615 if (OpOpcode == ISD::UNDEF) 2616 return getUNDEF(VT); 2617 break; 2618 case ISD::BITCAST: 2619 // Basic sanity checking. 2620 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2621 && "Cannot BITCAST between types of different sizes!"); 2622 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2623 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2624 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2625 if (OpOpcode == ISD::UNDEF) 2626 return getUNDEF(VT); 2627 break; 2628 case ISD::SCALAR_TO_VECTOR: 2629 assert(VT.isVector() && !Operand.getValueType().isVector() && 2630 (VT.getVectorElementType() == Operand.getValueType() || 2631 (VT.getVectorElementType().isInteger() && 2632 Operand.getValueType().isInteger() && 2633 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2634 "Illegal SCALAR_TO_VECTOR node!"); 2635 if (OpOpcode == ISD::UNDEF) 2636 return getUNDEF(VT); 2637 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2638 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2639 isa<ConstantSDNode>(Operand.getOperand(1)) && 2640 Operand.getConstantOperandVal(1) == 0 && 2641 Operand.getOperand(0).getValueType() == VT) 2642 return Operand.getOperand(0); 2643 break; 2644 case ISD::FNEG: 2645 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2646 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2647 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2648 Operand.getNode()->getOperand(0)); 2649 if (OpOpcode == ISD::FNEG) // --X -> X 2650 return Operand.getNode()->getOperand(0); 2651 break; 2652 case ISD::FABS: 2653 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2654 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2655 break; 2656 } 2657 2658 SDNode *N; 2659 SDVTList VTs = getVTList(VT); 2660 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2661 FoldingSetNodeID ID; 2662 SDValue Ops[1] = { Operand }; 2663 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2664 void *IP = 0; 2665 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2666 return SDValue(E, 0); 2667 2668 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, Operand); 2669 CSEMap.InsertNode(N, IP); 2670 } else { 2671 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, Operand); 2672 } 2673 2674 AllNodes.push_back(N); 2675#ifndef NDEBUG 2676 VerifySDNode(N); 2677#endif 2678 return SDValue(N, 0); 2679} 2680 2681SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT, 2682 SDNode *Cst1, SDNode *Cst2) { 2683 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs; 2684 SmallVector<SDValue, 4> Outputs; 2685 EVT SVT = VT.getScalarType(); 2686 2687 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1); 2688 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2); 2689 if (Scalar1 && Scalar2) { 2690 // Scalar instruction. 2691 Inputs.push_back(std::make_pair(Scalar1, Scalar2)); 2692 } else { 2693 // For vectors extract each constant element into Inputs so we can constant 2694 // fold them individually. 2695 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1); 2696 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2); 2697 if (!BV1 || !BV2) 2698 return SDValue(); 2699 2700 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!"); 2701 2702 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) { 2703 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I)); 2704 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I)); 2705 if (!V1 || !V2) // Not a constant, bail. 2706 return SDValue(); 2707 2708 // Avoid BUILD_VECTOR nodes that perform implicit truncation. 2709 // FIXME: This is valid and could be handled by truncating the APInts. 2710 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT) 2711 return SDValue(); 2712 2713 Inputs.push_back(std::make_pair(V1, V2)); 2714 } 2715 } 2716 2717 // We have a number of constant values, constant fold them element by element. 2718 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) { 2719 const APInt &C1 = Inputs[I].first->getAPIntValue(); 2720 const APInt &C2 = Inputs[I].second->getAPIntValue(); 2721 2722 switch (Opcode) { 2723 case ISD::ADD: 2724 Outputs.push_back(getConstant(C1 + C2, SVT)); 2725 break; 2726 case ISD::SUB: 2727 Outputs.push_back(getConstant(C1 - C2, SVT)); 2728 break; 2729 case ISD::MUL: 2730 Outputs.push_back(getConstant(C1 * C2, SVT)); 2731 break; 2732 case ISD::UDIV: 2733 if (!C2.getBoolValue()) 2734 return SDValue(); 2735 Outputs.push_back(getConstant(C1.udiv(C2), SVT)); 2736 break; 2737 case ISD::UREM: 2738 if (!C2.getBoolValue()) 2739 return SDValue(); 2740 Outputs.push_back(getConstant(C1.urem(C2), SVT)); 2741 break; 2742 case ISD::SDIV: 2743 if (!C2.getBoolValue()) 2744 return SDValue(); 2745 Outputs.push_back(getConstant(C1.sdiv(C2), SVT)); 2746 break; 2747 case ISD::SREM: 2748 if (!C2.getBoolValue()) 2749 return SDValue(); 2750 Outputs.push_back(getConstant(C1.srem(C2), SVT)); 2751 break; 2752 case ISD::AND: 2753 Outputs.push_back(getConstant(C1 & C2, SVT)); 2754 break; 2755 case ISD::OR: 2756 Outputs.push_back(getConstant(C1 | C2, SVT)); 2757 break; 2758 case ISD::XOR: 2759 Outputs.push_back(getConstant(C1 ^ C2, SVT)); 2760 break; 2761 case ISD::SHL: 2762 Outputs.push_back(getConstant(C1 << C2, SVT)); 2763 break; 2764 case ISD::SRL: 2765 Outputs.push_back(getConstant(C1.lshr(C2), SVT)); 2766 break; 2767 case ISD::SRA: 2768 Outputs.push_back(getConstant(C1.ashr(C2), SVT)); 2769 break; 2770 case ISD::ROTL: 2771 Outputs.push_back(getConstant(C1.rotl(C2), SVT)); 2772 break; 2773 case ISD::ROTR: 2774 Outputs.push_back(getConstant(C1.rotr(C2), SVT)); 2775 break; 2776 default: 2777 return SDValue(); 2778 } 2779 } 2780 2781 // Handle the scalar case first. 2782 if (Scalar1 && Scalar2) 2783 return Outputs.back(); 2784 2785 // Otherwise build a big vector out of the scalar elements we generated. 2786 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs.data(), 2787 Outputs.size()); 2788} 2789 2790SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, 2791 SDValue N2) { 2792 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2793 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2794 switch (Opcode) { 2795 default: break; 2796 case ISD::TokenFactor: 2797 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2798 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2799 // Fold trivial token factors. 2800 if (N1.getOpcode() == ISD::EntryToken) return N2; 2801 if (N2.getOpcode() == ISD::EntryToken) return N1; 2802 if (N1 == N2) return N1; 2803 break; 2804 case ISD::CONCAT_VECTORS: 2805 // Concat of UNDEFs is UNDEF. 2806 if (N1.getOpcode() == ISD::UNDEF && 2807 N2.getOpcode() == ISD::UNDEF) 2808 return getUNDEF(VT); 2809 2810 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2811 // one big BUILD_VECTOR. 2812 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2813 N2.getOpcode() == ISD::BUILD_VECTOR) { 2814 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2815 N1.getNode()->op_end()); 2816 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2817 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2818 } 2819 break; 2820 case ISD::AND: 2821 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2822 assert(N1.getValueType() == N2.getValueType() && 2823 N1.getValueType() == VT && "Binary operator types must match!"); 2824 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2825 // worth handling here. 2826 if (N2C && N2C->isNullValue()) 2827 return N2; 2828 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2829 return N1; 2830 break; 2831 case ISD::OR: 2832 case ISD::XOR: 2833 case ISD::ADD: 2834 case ISD::SUB: 2835 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2836 assert(N1.getValueType() == N2.getValueType() && 2837 N1.getValueType() == VT && "Binary operator types must match!"); 2838 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2839 // it's worth handling here. 2840 if (N2C && N2C->isNullValue()) 2841 return N1; 2842 break; 2843 case ISD::UDIV: 2844 case ISD::UREM: 2845 case ISD::MULHU: 2846 case ISD::MULHS: 2847 case ISD::MUL: 2848 case ISD::SDIV: 2849 case ISD::SREM: 2850 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2851 assert(N1.getValueType() == N2.getValueType() && 2852 N1.getValueType() == VT && "Binary operator types must match!"); 2853 break; 2854 case ISD::FADD: 2855 case ISD::FSUB: 2856 case ISD::FMUL: 2857 case ISD::FDIV: 2858 case ISD::FREM: 2859 if (getTarget().Options.UnsafeFPMath) { 2860 if (Opcode == ISD::FADD) { 2861 // 0+x --> x 2862 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2863 if (CFP->getValueAPF().isZero()) 2864 return N2; 2865 // x+0 --> x 2866 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2867 if (CFP->getValueAPF().isZero()) 2868 return N1; 2869 } else if (Opcode == ISD::FSUB) { 2870 // x-0 --> x 2871 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2872 if (CFP->getValueAPF().isZero()) 2873 return N1; 2874 } else if (Opcode == ISD::FMUL) { 2875 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1); 2876 SDValue V = N2; 2877 2878 // If the first operand isn't the constant, try the second 2879 if (!CFP) { 2880 CFP = dyn_cast<ConstantFPSDNode>(N2); 2881 V = N1; 2882 } 2883 2884 if (CFP) { 2885 // 0*x --> 0 2886 if (CFP->isZero()) 2887 return SDValue(CFP,0); 2888 // 1*x --> x 2889 if (CFP->isExactlyValue(1.0)) 2890 return V; 2891 } 2892 } 2893 } 2894 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2895 assert(N1.getValueType() == N2.getValueType() && 2896 N1.getValueType() == VT && "Binary operator types must match!"); 2897 break; 2898 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2899 assert(N1.getValueType() == VT && 2900 N1.getValueType().isFloatingPoint() && 2901 N2.getValueType().isFloatingPoint() && 2902 "Invalid FCOPYSIGN!"); 2903 break; 2904 case ISD::SHL: 2905 case ISD::SRA: 2906 case ISD::SRL: 2907 case ISD::ROTL: 2908 case ISD::ROTR: 2909 assert(VT == N1.getValueType() && 2910 "Shift operators return type must be the same as their first arg"); 2911 assert(VT.isInteger() && N2.getValueType().isInteger() && 2912 "Shifts only work on integers"); 2913 assert((!VT.isVector() || VT == N2.getValueType()) && 2914 "Vector shift amounts must be in the same as their first arg"); 2915 // Verify that the shift amount VT is bit enough to hold valid shift 2916 // amounts. This catches things like trying to shift an i1024 value by an 2917 // i8, which is easy to fall into in generic code that uses 2918 // TLI.getShiftAmount(). 2919 assert(N2.getValueType().getSizeInBits() >= 2920 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2921 "Invalid use of small shift amount with oversized value!"); 2922 2923 // Always fold shifts of i1 values so the code generator doesn't need to 2924 // handle them. Since we know the size of the shift has to be less than the 2925 // size of the value, the shift/rotate count is guaranteed to be zero. 2926 if (VT == MVT::i1) 2927 return N1; 2928 if (N2C && N2C->isNullValue()) 2929 return N1; 2930 break; 2931 case ISD::FP_ROUND_INREG: { 2932 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2933 assert(VT == N1.getValueType() && "Not an inreg round!"); 2934 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2935 "Cannot FP_ROUND_INREG integer types"); 2936 assert(EVT.isVector() == VT.isVector() && 2937 "FP_ROUND_INREG type should be vector iff the operand " 2938 "type is vector!"); 2939 assert((!EVT.isVector() || 2940 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2941 "Vector element counts must match in FP_ROUND_INREG"); 2942 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2943 (void)EVT; 2944 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2945 break; 2946 } 2947 case ISD::FP_ROUND: 2948 assert(VT.isFloatingPoint() && 2949 N1.getValueType().isFloatingPoint() && 2950 VT.bitsLE(N1.getValueType()) && 2951 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2952 if (N1.getValueType() == VT) return N1; // noop conversion. 2953 break; 2954 case ISD::AssertSext: 2955 case ISD::AssertZext: { 2956 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2957 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2958 assert(VT.isInteger() && EVT.isInteger() && 2959 "Cannot *_EXTEND_INREG FP types"); 2960 assert(!EVT.isVector() && 2961 "AssertSExt/AssertZExt type should be the vector element type " 2962 "rather than the vector type!"); 2963 assert(EVT.bitsLE(VT) && "Not extending!"); 2964 if (VT == EVT) return N1; // noop assertion. 2965 break; 2966 } 2967 case ISD::SIGN_EXTEND_INREG: { 2968 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2969 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2970 assert(VT.isInteger() && EVT.isInteger() && 2971 "Cannot *_EXTEND_INREG FP types"); 2972 assert(EVT.isVector() == VT.isVector() && 2973 "SIGN_EXTEND_INREG type should be vector iff the operand " 2974 "type is vector!"); 2975 assert((!EVT.isVector() || 2976 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2977 "Vector element counts must match in SIGN_EXTEND_INREG"); 2978 assert(EVT.bitsLE(VT) && "Not extending!"); 2979 if (EVT == VT) return N1; // Not actually extending 2980 2981 if (N1C) { 2982 APInt Val = N1C->getAPIntValue(); 2983 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2984 Val <<= Val.getBitWidth()-FromBits; 2985 Val = Val.ashr(Val.getBitWidth()-FromBits); 2986 return getConstant(Val, VT); 2987 } 2988 break; 2989 } 2990 case ISD::EXTRACT_VECTOR_ELT: 2991 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2992 if (N1.getOpcode() == ISD::UNDEF) 2993 return getUNDEF(VT); 2994 2995 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2996 // expanding copies of large vectors from registers. 2997 if (N2C && 2998 N1.getOpcode() == ISD::CONCAT_VECTORS && 2999 N1.getNumOperands() > 0) { 3000 unsigned Factor = 3001 N1.getOperand(0).getValueType().getVectorNumElements(); 3002 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 3003 N1.getOperand(N2C->getZExtValue() / Factor), 3004 getConstant(N2C->getZExtValue() % Factor, 3005 N2.getValueType())); 3006 } 3007 3008 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 3009 // expanding large vector constants. 3010 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 3011 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 3012 3013 if (VT != Elt.getValueType()) 3014 // If the vector element type is not legal, the BUILD_VECTOR operands 3015 // are promoted and implicitly truncated, and the result implicitly 3016 // extended. Make that explicit here. 3017 Elt = getAnyExtOrTrunc(Elt, DL, VT); 3018 3019 return Elt; 3020 } 3021 3022 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 3023 // operations are lowered to scalars. 3024 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 3025 // If the indices are the same, return the inserted element else 3026 // if the indices are known different, extract the element from 3027 // the original vector. 3028 SDValue N1Op2 = N1.getOperand(2); 3029 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 3030 3031 if (N1Op2C && N2C) { 3032 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 3033 if (VT == N1.getOperand(1).getValueType()) 3034 return N1.getOperand(1); 3035 else 3036 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 3037 } 3038 3039 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 3040 } 3041 } 3042 break; 3043 case ISD::EXTRACT_ELEMENT: 3044 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 3045 assert(!N1.getValueType().isVector() && !VT.isVector() && 3046 (N1.getValueType().isInteger() == VT.isInteger()) && 3047 N1.getValueType() != VT && 3048 "Wrong types for EXTRACT_ELEMENT!"); 3049 3050 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 3051 // 64-bit integers into 32-bit parts. Instead of building the extract of 3052 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 3053 if (N1.getOpcode() == ISD::BUILD_PAIR) 3054 return N1.getOperand(N2C->getZExtValue()); 3055 3056 // EXTRACT_ELEMENT of a constant int is also very common. 3057 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 3058 unsigned ElementSize = VT.getSizeInBits(); 3059 unsigned Shift = ElementSize * N2C->getZExtValue(); 3060 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 3061 return getConstant(ShiftedVal.trunc(ElementSize), VT); 3062 } 3063 break; 3064 case ISD::EXTRACT_SUBVECTOR: { 3065 SDValue Index = N2; 3066 if (VT.isSimple() && N1.getValueType().isSimple()) { 3067 assert(VT.isVector() && N1.getValueType().isVector() && 3068 "Extract subvector VTs must be a vectors!"); 3069 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 3070 "Extract subvector VTs must have the same element type!"); 3071 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 3072 "Extract subvector must be from larger vector to smaller vector!"); 3073 3074 if (isa<ConstantSDNode>(Index.getNode())) { 3075 assert((VT.getVectorNumElements() + 3076 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3077 <= N1.getValueType().getVectorNumElements()) 3078 && "Extract subvector overflow!"); 3079 } 3080 3081 // Trivial extraction. 3082 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 3083 return N1; 3084 } 3085 break; 3086 } 3087 } 3088 3089 // Perform trivial constant folding. 3090 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()); 3091 if (SV.getNode()) return SV; 3092 3093 // Canonicalize constant to RHS if commutative. 3094 if (N1C && !N2C && isCommutativeBinOp(Opcode)) { 3095 std::swap(N1C, N2C); 3096 std::swap(N1, N2); 3097 } 3098 3099 // Constant fold FP operations. 3100 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 3101 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 3102 if (N1CFP) { 3103 if (!N2CFP && isCommutativeBinOp(Opcode)) { 3104 // Canonicalize constant to RHS if commutative. 3105 std::swap(N1CFP, N2CFP); 3106 std::swap(N1, N2); 3107 } else if (N2CFP) { 3108 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3109 APFloat::opStatus s; 3110 switch (Opcode) { 3111 case ISD::FADD: 3112 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3113 if (s != APFloat::opInvalidOp) 3114 return getConstantFP(V1, VT); 3115 break; 3116 case ISD::FSUB: 3117 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3118 if (s!=APFloat::opInvalidOp) 3119 return getConstantFP(V1, VT); 3120 break; 3121 case ISD::FMUL: 3122 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3123 if (s!=APFloat::opInvalidOp) 3124 return getConstantFP(V1, VT); 3125 break; 3126 case ISD::FDIV: 3127 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3128 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3129 return getConstantFP(V1, VT); 3130 break; 3131 case ISD::FREM : 3132 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3133 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3134 return getConstantFP(V1, VT); 3135 break; 3136 case ISD::FCOPYSIGN: 3137 V1.copySign(V2); 3138 return getConstantFP(V1, VT); 3139 default: break; 3140 } 3141 } 3142 3143 if (Opcode == ISD::FP_ROUND) { 3144 APFloat V = N1CFP->getValueAPF(); // make copy 3145 bool ignored; 3146 // This can return overflow, underflow, or inexact; we don't care. 3147 // FIXME need to be more flexible about rounding mode. 3148 (void)V.convert(EVTToAPFloatSemantics(VT), 3149 APFloat::rmNearestTiesToEven, &ignored); 3150 return getConstantFP(V, VT); 3151 } 3152 } 3153 3154 // Canonicalize an UNDEF to the RHS, even over a constant. 3155 if (N1.getOpcode() == ISD::UNDEF) { 3156 if (isCommutativeBinOp(Opcode)) { 3157 std::swap(N1, N2); 3158 } else { 3159 switch (Opcode) { 3160 case ISD::FP_ROUND_INREG: 3161 case ISD::SIGN_EXTEND_INREG: 3162 case ISD::SUB: 3163 case ISD::FSUB: 3164 case ISD::FDIV: 3165 case ISD::FREM: 3166 case ISD::SRA: 3167 return N1; // fold op(undef, arg2) -> undef 3168 case ISD::UDIV: 3169 case ISD::SDIV: 3170 case ISD::UREM: 3171 case ISD::SREM: 3172 case ISD::SRL: 3173 case ISD::SHL: 3174 if (!VT.isVector()) 3175 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3176 // For vectors, we can't easily build an all zero vector, just return 3177 // the LHS. 3178 return N2; 3179 } 3180 } 3181 } 3182 3183 // Fold a bunch of operators when the RHS is undef. 3184 if (N2.getOpcode() == ISD::UNDEF) { 3185 switch (Opcode) { 3186 case ISD::XOR: 3187 if (N1.getOpcode() == ISD::UNDEF) 3188 // Handle undef ^ undef -> 0 special case. This is a common 3189 // idiom (misuse). 3190 return getConstant(0, VT); 3191 // fallthrough 3192 case ISD::ADD: 3193 case ISD::ADDC: 3194 case ISD::ADDE: 3195 case ISD::SUB: 3196 case ISD::UDIV: 3197 case ISD::SDIV: 3198 case ISD::UREM: 3199 case ISD::SREM: 3200 return N2; // fold op(arg1, undef) -> undef 3201 case ISD::FADD: 3202 case ISD::FSUB: 3203 case ISD::FMUL: 3204 case ISD::FDIV: 3205 case ISD::FREM: 3206 if (getTarget().Options.UnsafeFPMath) 3207 return N2; 3208 break; 3209 case ISD::MUL: 3210 case ISD::AND: 3211 case ISD::SRL: 3212 case ISD::SHL: 3213 if (!VT.isVector()) 3214 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3215 // For vectors, we can't easily build an all zero vector, just return 3216 // the LHS. 3217 return N1; 3218 case ISD::OR: 3219 if (!VT.isVector()) 3220 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3221 // For vectors, we can't easily build an all one vector, just return 3222 // the LHS. 3223 return N1; 3224 case ISD::SRA: 3225 return N1; 3226 } 3227 } 3228 3229 // Memoize this node if possible. 3230 SDNode *N; 3231 SDVTList VTs = getVTList(VT); 3232 if (VT != MVT::Glue) { 3233 SDValue Ops[] = { N1, N2 }; 3234 FoldingSetNodeID ID; 3235 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3236 void *IP = 0; 3237 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3238 return SDValue(E, 0); 3239 3240 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2); 3241 CSEMap.InsertNode(N, IP); 3242 } else { 3243 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2); 3244 } 3245 3246 AllNodes.push_back(N); 3247#ifndef NDEBUG 3248 VerifySDNode(N); 3249#endif 3250 return SDValue(N, 0); 3251} 3252 3253SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3254 SDValue N1, SDValue N2, SDValue N3) { 3255 // Perform various simplifications. 3256 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3257 switch (Opcode) { 3258 case ISD::FMA: { 3259 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1); 3260 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2); 3261 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3); 3262 if (N1CFP && N2CFP && N3CFP) { 3263 APFloat V1 = N1CFP->getValueAPF(); 3264 const APFloat &V2 = N2CFP->getValueAPF(); 3265 const APFloat &V3 = N3CFP->getValueAPF(); 3266 APFloat::opStatus s = 3267 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven); 3268 if (s != APFloat::opInvalidOp) 3269 return getConstantFP(V1, VT); 3270 } 3271 break; 3272 } 3273 case ISD::CONCAT_VECTORS: 3274 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3275 // one big BUILD_VECTOR. 3276 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3277 N2.getOpcode() == ISD::BUILD_VECTOR && 3278 N3.getOpcode() == ISD::BUILD_VECTOR) { 3279 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3280 N1.getNode()->op_end()); 3281 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3282 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3283 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3284 } 3285 break; 3286 case ISD::SETCC: { 3287 // Use FoldSetCC to simplify SETCC's. 3288 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3289 if (Simp.getNode()) return Simp; 3290 break; 3291 } 3292 case ISD::SELECT: 3293 if (N1C) { 3294 if (N1C->getZExtValue()) 3295 return N2; // select true, X, Y -> X 3296 return N3; // select false, X, Y -> Y 3297 } 3298 3299 if (N2 == N3) return N2; // select C, X, X -> X 3300 break; 3301 case ISD::VECTOR_SHUFFLE: 3302 llvm_unreachable("should use getVectorShuffle constructor!"); 3303 case ISD::INSERT_SUBVECTOR: { 3304 SDValue Index = N3; 3305 if (VT.isSimple() && N1.getValueType().isSimple() 3306 && N2.getValueType().isSimple()) { 3307 assert(VT.isVector() && N1.getValueType().isVector() && 3308 N2.getValueType().isVector() && 3309 "Insert subvector VTs must be a vectors"); 3310 assert(VT == N1.getValueType() && 3311 "Dest and insert subvector source types must match!"); 3312 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3313 "Insert subvector must be from smaller vector to larger vector!"); 3314 if (isa<ConstantSDNode>(Index.getNode())) { 3315 assert((N2.getValueType().getVectorNumElements() + 3316 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3317 <= VT.getVectorNumElements()) 3318 && "Insert subvector overflow!"); 3319 } 3320 3321 // Trivial insertion. 3322 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3323 return N2; 3324 } 3325 break; 3326 } 3327 case ISD::BITCAST: 3328 // Fold bit_convert nodes from a type to themselves. 3329 if (N1.getValueType() == VT) 3330 return N1; 3331 break; 3332 } 3333 3334 // Memoize node if it doesn't produce a flag. 3335 SDNode *N; 3336 SDVTList VTs = getVTList(VT); 3337 if (VT != MVT::Glue) { 3338 SDValue Ops[] = { N1, N2, N3 }; 3339 FoldingSetNodeID ID; 3340 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3341 void *IP = 0; 3342 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3343 return SDValue(E, 0); 3344 3345 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2, N3); 3346 CSEMap.InsertNode(N, IP); 3347 } else { 3348 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2, N3); 3349 } 3350 3351 AllNodes.push_back(N); 3352#ifndef NDEBUG 3353 VerifySDNode(N); 3354#endif 3355 return SDValue(N, 0); 3356} 3357 3358SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3359 SDValue N1, SDValue N2, SDValue N3, 3360 SDValue N4) { 3361 SDValue Ops[] = { N1, N2, N3, N4 }; 3362 return getNode(Opcode, DL, VT, Ops, 4); 3363} 3364 3365SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3366 SDValue N1, SDValue N2, SDValue N3, 3367 SDValue N4, SDValue N5) { 3368 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3369 return getNode(Opcode, DL, VT, Ops, 5); 3370} 3371 3372/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3373/// the incoming stack arguments to be loaded from the stack. 3374SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3375 SmallVector<SDValue, 8> ArgChains; 3376 3377 // Include the original chain at the beginning of the list. When this is 3378 // used by target LowerCall hooks, this helps legalize find the 3379 // CALLSEQ_BEGIN node. 3380 ArgChains.push_back(Chain); 3381 3382 // Add a chain value for each stack argument. 3383 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3384 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3385 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3386 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3387 if (FI->getIndex() < 0) 3388 ArgChains.push_back(SDValue(L, 1)); 3389 3390 // Build a tokenfactor for all the chains. 3391 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, 3392 &ArgChains[0], ArgChains.size()); 3393} 3394 3395/// getMemsetValue - Vectorized representation of the memset value 3396/// operand. 3397static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3398 SDLoc dl) { 3399 assert(Value.getOpcode() != ISD::UNDEF); 3400 3401 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3402 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3403 assert(C->getAPIntValue().getBitWidth() == 8); 3404 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue()); 3405 if (VT.isInteger()) 3406 return DAG.getConstant(Val, VT); 3407 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT); 3408 } 3409 3410 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3411 if (NumBits > 8) { 3412 // Use a multiplication with 0x010101... to extend the input to the 3413 // required length. 3414 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01)); 3415 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3416 } 3417 3418 return Value; 3419} 3420 3421/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3422/// used when a memcpy is turned into a memset when the source is a constant 3423/// string ptr. 3424static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG, 3425 const TargetLowering &TLI, StringRef Str) { 3426 // Handle vector with all elements zero. 3427 if (Str.empty()) { 3428 if (VT.isInteger()) 3429 return DAG.getConstant(0, VT); 3430 else if (VT == MVT::f32 || VT == MVT::f64) 3431 return DAG.getConstantFP(0.0, VT); 3432 else if (VT.isVector()) { 3433 unsigned NumElts = VT.getVectorNumElements(); 3434 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3435 return DAG.getNode(ISD::BITCAST, dl, VT, 3436 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3437 EltVT, NumElts))); 3438 } else 3439 llvm_unreachable("Expected type!"); 3440 } 3441 3442 assert(!VT.isVector() && "Can't handle vector type here!"); 3443 unsigned NumVTBits = VT.getSizeInBits(); 3444 unsigned NumVTBytes = NumVTBits / 8; 3445 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3446 3447 APInt Val(NumVTBits, 0); 3448 if (TLI.isLittleEndian()) { 3449 for (unsigned i = 0; i != NumBytes; ++i) 3450 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3451 } else { 3452 for (unsigned i = 0; i != NumBytes; ++i) 3453 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3454 } 3455 3456 // If the "cost" of materializing the integer immediate is 1 or free, then 3457 // it is cost effective to turn the load into the immediate. 3458 const TargetTransformInfo *TTI = DAG.getTargetTransformInfo(); 3459 if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2) 3460 return DAG.getConstant(Val, VT); 3461 return SDValue(0, 0); 3462} 3463 3464/// getMemBasePlusOffset - Returns base and offset node for the 3465/// 3466static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl, 3467 SelectionDAG &DAG) { 3468 EVT VT = Base.getValueType(); 3469 return DAG.getNode(ISD::ADD, dl, 3470 VT, Base, DAG.getConstant(Offset, VT)); 3471} 3472 3473/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3474/// 3475static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3476 unsigned SrcDelta = 0; 3477 GlobalAddressSDNode *G = NULL; 3478 if (Src.getOpcode() == ISD::GlobalAddress) 3479 G = cast<GlobalAddressSDNode>(Src); 3480 else if (Src.getOpcode() == ISD::ADD && 3481 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3482 Src.getOperand(1).getOpcode() == ISD::Constant) { 3483 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3484 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3485 } 3486 if (!G) 3487 return false; 3488 3489 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3490} 3491 3492/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3493/// to replace the memset / memcpy. Return true if the number of memory ops 3494/// is below the threshold. It returns the types of the sequence of 3495/// memory ops to perform memset / memcpy by reference. 3496static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3497 unsigned Limit, uint64_t Size, 3498 unsigned DstAlign, unsigned SrcAlign, 3499 bool IsMemset, 3500 bool ZeroMemset, 3501 bool MemcpyStrSrc, 3502 bool AllowOverlap, 3503 SelectionDAG &DAG, 3504 const TargetLowering &TLI) { 3505 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3506 "Expecting memcpy / memset source to meet alignment requirement!"); 3507 // If 'SrcAlign' is zero, that means the memory operation does not need to 3508 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3509 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3510 // is the specified alignment of the memory operation. If it is zero, that 3511 // means it's possible to change the alignment of the destination. 3512 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3513 // not need to be loaded. 3514 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3515 IsMemset, ZeroMemset, MemcpyStrSrc, 3516 DAG.getMachineFunction()); 3517 3518 if (VT == MVT::Other) { 3519 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() || 3520 TLI.allowsUnalignedMemoryAccesses(VT)) { 3521 VT = TLI.getPointerTy(); 3522 } else { 3523 switch (DstAlign & 7) { 3524 case 0: VT = MVT::i64; break; 3525 case 4: VT = MVT::i32; break; 3526 case 2: VT = MVT::i16; break; 3527 default: VT = MVT::i8; break; 3528 } 3529 } 3530 3531 MVT LVT = MVT::i64; 3532 while (!TLI.isTypeLegal(LVT)) 3533 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3534 assert(LVT.isInteger()); 3535 3536 if (VT.bitsGT(LVT)) 3537 VT = LVT; 3538 } 3539 3540 unsigned NumMemOps = 0; 3541 while (Size != 0) { 3542 unsigned VTSize = VT.getSizeInBits() / 8; 3543 while (VTSize > Size) { 3544 // For now, only use non-vector load / store's for the left-over pieces. 3545 EVT NewVT = VT; 3546 unsigned NewVTSize; 3547 3548 bool Found = false; 3549 if (VT.isVector() || VT.isFloatingPoint()) { 3550 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32; 3551 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) && 3552 TLI.isSafeMemOpType(NewVT.getSimpleVT())) 3553 Found = true; 3554 else if (NewVT == MVT::i64 && 3555 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) && 3556 TLI.isSafeMemOpType(MVT::f64)) { 3557 // i64 is usually not legal on 32-bit targets, but f64 may be. 3558 NewVT = MVT::f64; 3559 Found = true; 3560 } 3561 } 3562 3563 if (!Found) { 3564 do { 3565 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1); 3566 if (NewVT == MVT::i8) 3567 break; 3568 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT())); 3569 } 3570 NewVTSize = NewVT.getSizeInBits() / 8; 3571 3572 // If the new VT cannot cover all of the remaining bits, then consider 3573 // issuing a (or a pair of) unaligned and overlapping load / store. 3574 // FIXME: Only does this for 64-bit or more since we don't have proper 3575 // cost model for unaligned load / store. 3576 bool Fast; 3577 if (NumMemOps && AllowOverlap && 3578 VTSize >= 8 && NewVTSize < Size && 3579 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast) 3580 VTSize = Size; 3581 else { 3582 VT = NewVT; 3583 VTSize = NewVTSize; 3584 } 3585 } 3586 3587 if (++NumMemOps > Limit) 3588 return false; 3589 3590 MemOps.push_back(VT); 3591 Size -= VTSize; 3592 } 3593 3594 return true; 3595} 3596 3597static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl, 3598 SDValue Chain, SDValue Dst, 3599 SDValue Src, uint64_t Size, 3600 unsigned Align, bool isVol, 3601 bool AlwaysInline, 3602 MachinePointerInfo DstPtrInfo, 3603 MachinePointerInfo SrcPtrInfo) { 3604 // Turn a memcpy of undef to nop. 3605 if (Src.getOpcode() == ISD::UNDEF) 3606 return Chain; 3607 3608 // Expand memcpy to a series of load and store ops if the size operand falls 3609 // below a certain threshold. 3610 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3611 // rather than maybe a humongous number of loads and stores. 3612 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3613 std::vector<EVT> MemOps; 3614 bool DstAlignCanChange = false; 3615 MachineFunction &MF = DAG.getMachineFunction(); 3616 MachineFrameInfo *MFI = MF.getFrameInfo(); 3617 bool OptSize = 3618 MF.getFunction()->getAttributes(). 3619 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3620 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3621 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3622 DstAlignCanChange = true; 3623 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3624 if (Align > SrcAlign) 3625 SrcAlign = Align; 3626 StringRef Str; 3627 bool CopyFromStr = isMemSrcFromString(Src, Str); 3628 bool isZeroStr = CopyFromStr && Str.empty(); 3629 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3630 3631 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3632 (DstAlignCanChange ? 0 : Align), 3633 (isZeroStr ? 0 : SrcAlign), 3634 false, false, CopyFromStr, true, DAG, TLI)) 3635 return SDValue(); 3636 3637 if (DstAlignCanChange) { 3638 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3639 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3640 3641 // Don't promote to an alignment that would require dynamic stack 3642 // realignment. 3643 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); 3644 if (!TRI->needsStackRealignment(MF)) 3645 while (NewAlign > Align && 3646 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign)) 3647 NewAlign /= 2; 3648 3649 if (NewAlign > Align) { 3650 // Give the stack frame object a larger alignment if needed. 3651 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3652 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3653 Align = NewAlign; 3654 } 3655 } 3656 3657 SmallVector<SDValue, 8> OutChains; 3658 unsigned NumMemOps = MemOps.size(); 3659 uint64_t SrcOff = 0, DstOff = 0; 3660 for (unsigned i = 0; i != NumMemOps; ++i) { 3661 EVT VT = MemOps[i]; 3662 unsigned VTSize = VT.getSizeInBits() / 8; 3663 SDValue Value, Store; 3664 3665 if (VTSize > Size) { 3666 // Issuing an unaligned load / store pair that overlaps with the previous 3667 // pair. Adjust the offset accordingly. 3668 assert(i == NumMemOps-1 && i != 0); 3669 SrcOff -= VTSize - Size; 3670 DstOff -= VTSize - Size; 3671 } 3672 3673 if (CopyFromStr && 3674 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3675 // It's unlikely a store of a vector immediate can be done in a single 3676 // instruction. It would require a load from a constantpool first. 3677 // We only handle zero vectors here. 3678 // FIXME: Handle other cases where store of vector immediate is done in 3679 // a single instruction. 3680 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3681 if (Value.getNode()) 3682 Store = DAG.getStore(Chain, dl, Value, 3683 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3684 DstPtrInfo.getWithOffset(DstOff), isVol, 3685 false, Align); 3686 } 3687 3688 if (!Store.getNode()) { 3689 // The type might not be legal for the target. This should only happen 3690 // if the type is smaller than a legal type, as on PPC, so the right 3691 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3692 // to Load/Store if NVT==VT. 3693 // FIXME does the case above also need this? 3694 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3695 assert(NVT.bitsGE(VT)); 3696 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3697 getMemBasePlusOffset(Src, SrcOff, dl, DAG), 3698 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3699 MinAlign(SrcAlign, SrcOff)); 3700 Store = DAG.getTruncStore(Chain, dl, Value, 3701 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3702 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3703 false, Align); 3704 } 3705 OutChains.push_back(Store); 3706 SrcOff += VTSize; 3707 DstOff += VTSize; 3708 Size -= VTSize; 3709 } 3710 3711 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3712 &OutChains[0], OutChains.size()); 3713} 3714 3715static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl, 3716 SDValue Chain, SDValue Dst, 3717 SDValue Src, uint64_t Size, 3718 unsigned Align, bool isVol, 3719 bool AlwaysInline, 3720 MachinePointerInfo DstPtrInfo, 3721 MachinePointerInfo SrcPtrInfo) { 3722 // Turn a memmove of undef to nop. 3723 if (Src.getOpcode() == ISD::UNDEF) 3724 return Chain; 3725 3726 // Expand memmove to a series of load and store ops if the size operand falls 3727 // below a certain threshold. 3728 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3729 std::vector<EVT> MemOps; 3730 bool DstAlignCanChange = false; 3731 MachineFunction &MF = DAG.getMachineFunction(); 3732 MachineFrameInfo *MFI = MF.getFrameInfo(); 3733 bool OptSize = MF.getFunction()->getAttributes(). 3734 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3735 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3736 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3737 DstAlignCanChange = true; 3738 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3739 if (Align > SrcAlign) 3740 SrcAlign = Align; 3741 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3742 3743 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3744 (DstAlignCanChange ? 0 : Align), SrcAlign, 3745 false, false, false, false, DAG, TLI)) 3746 return SDValue(); 3747 3748 if (DstAlignCanChange) { 3749 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3750 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3751 if (NewAlign > Align) { 3752 // Give the stack frame object a larger alignment if needed. 3753 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3754 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3755 Align = NewAlign; 3756 } 3757 } 3758 3759 uint64_t SrcOff = 0, DstOff = 0; 3760 SmallVector<SDValue, 8> LoadValues; 3761 SmallVector<SDValue, 8> LoadChains; 3762 SmallVector<SDValue, 8> OutChains; 3763 unsigned NumMemOps = MemOps.size(); 3764 for (unsigned i = 0; i < NumMemOps; i++) { 3765 EVT VT = MemOps[i]; 3766 unsigned VTSize = VT.getSizeInBits() / 8; 3767 SDValue Value, Store; 3768 3769 Value = DAG.getLoad(VT, dl, Chain, 3770 getMemBasePlusOffset(Src, SrcOff, dl, DAG), 3771 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3772 false, false, SrcAlign); 3773 LoadValues.push_back(Value); 3774 LoadChains.push_back(Value.getValue(1)); 3775 SrcOff += VTSize; 3776 } 3777 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3778 &LoadChains[0], LoadChains.size()); 3779 OutChains.clear(); 3780 for (unsigned i = 0; i < NumMemOps; i++) { 3781 EVT VT = MemOps[i]; 3782 unsigned VTSize = VT.getSizeInBits() / 8; 3783 SDValue Value, Store; 3784 3785 Store = DAG.getStore(Chain, dl, LoadValues[i], 3786 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3787 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3788 OutChains.push_back(Store); 3789 DstOff += VTSize; 3790 } 3791 3792 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3793 &OutChains[0], OutChains.size()); 3794} 3795 3796static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl, 3797 SDValue Chain, SDValue Dst, 3798 SDValue Src, uint64_t Size, 3799 unsigned Align, bool isVol, 3800 MachinePointerInfo DstPtrInfo) { 3801 // Turn a memset of undef to nop. 3802 if (Src.getOpcode() == ISD::UNDEF) 3803 return Chain; 3804 3805 // Expand memset to a series of load/store ops if the size operand 3806 // falls below a certain threshold. 3807 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3808 std::vector<EVT> MemOps; 3809 bool DstAlignCanChange = false; 3810 MachineFunction &MF = DAG.getMachineFunction(); 3811 MachineFrameInfo *MFI = MF.getFrameInfo(); 3812 bool OptSize = MF.getFunction()->getAttributes(). 3813 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3814 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3815 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3816 DstAlignCanChange = true; 3817 bool IsZeroVal = 3818 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3819 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3820 Size, (DstAlignCanChange ? 0 : Align), 0, 3821 true, IsZeroVal, false, true, DAG, TLI)) 3822 return SDValue(); 3823 3824 if (DstAlignCanChange) { 3825 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3826 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3827 if (NewAlign > Align) { 3828 // Give the stack frame object a larger alignment if needed. 3829 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3830 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3831 Align = NewAlign; 3832 } 3833 } 3834 3835 SmallVector<SDValue, 8> OutChains; 3836 uint64_t DstOff = 0; 3837 unsigned NumMemOps = MemOps.size(); 3838 3839 // Find the largest store and generate the bit pattern for it. 3840 EVT LargestVT = MemOps[0]; 3841 for (unsigned i = 1; i < NumMemOps; i++) 3842 if (MemOps[i].bitsGT(LargestVT)) 3843 LargestVT = MemOps[i]; 3844 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3845 3846 for (unsigned i = 0; i < NumMemOps; i++) { 3847 EVT VT = MemOps[i]; 3848 unsigned VTSize = VT.getSizeInBits() / 8; 3849 if (VTSize > Size) { 3850 // Issuing an unaligned load / store pair that overlaps with the previous 3851 // pair. Adjust the offset accordingly. 3852 assert(i == NumMemOps-1 && i != 0); 3853 DstOff -= VTSize - Size; 3854 } 3855 3856 // If this store is smaller than the largest store see whether we can get 3857 // the smaller value for free with a truncate. 3858 SDValue Value = MemSetValue; 3859 if (VT.bitsLT(LargestVT)) { 3860 if (!LargestVT.isVector() && !VT.isVector() && 3861 TLI.isTruncateFree(LargestVT, VT)) 3862 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3863 else 3864 Value = getMemsetValue(Src, VT, DAG, dl); 3865 } 3866 assert(Value.getValueType() == VT && "Value with wrong type."); 3867 SDValue Store = DAG.getStore(Chain, dl, Value, 3868 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3869 DstPtrInfo.getWithOffset(DstOff), 3870 isVol, false, Align); 3871 OutChains.push_back(Store); 3872 DstOff += VT.getSizeInBits() / 8; 3873 Size -= VTSize; 3874 } 3875 3876 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3877 &OutChains[0], OutChains.size()); 3878} 3879 3880SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst, 3881 SDValue Src, SDValue Size, 3882 unsigned Align, bool isVol, bool AlwaysInline, 3883 MachinePointerInfo DstPtrInfo, 3884 MachinePointerInfo SrcPtrInfo) { 3885 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 3886 3887 // Check to see if we should lower the memcpy to loads and stores first. 3888 // For cases within the target-specified limits, this is the best choice. 3889 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3890 if (ConstantSize) { 3891 // Memcpy with size zero? Just return the original chain. 3892 if (ConstantSize->isNullValue()) 3893 return Chain; 3894 3895 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3896 ConstantSize->getZExtValue(),Align, 3897 isVol, false, DstPtrInfo, SrcPtrInfo); 3898 if (Result.getNode()) 3899 return Result; 3900 } 3901 3902 // Then check to see if we should lower the memcpy with target-specific 3903 // code. If the target chooses to do this, this is the next best. 3904 SDValue Result = 3905 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3906 isVol, AlwaysInline, 3907 DstPtrInfo, SrcPtrInfo); 3908 if (Result.getNode()) 3909 return Result; 3910 3911 // If we really need inline code and the target declined to provide it, 3912 // use a (potentially long) sequence of loads and stores. 3913 if (AlwaysInline) { 3914 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3915 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3916 ConstantSize->getZExtValue(), Align, isVol, 3917 true, DstPtrInfo, SrcPtrInfo); 3918 } 3919 3920 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3921 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3922 // respect volatile, so they may do things like read or write memory 3923 // beyond the given memory regions. But fixing this isn't easy, and most 3924 // people don't care. 3925 3926 // Emit a library call. 3927 TargetLowering::ArgListTy Args; 3928 TargetLowering::ArgListEntry Entry; 3929 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext()); 3930 Entry.Node = Dst; Args.push_back(Entry); 3931 Entry.Node = Src; Args.push_back(Entry); 3932 Entry.Node = Size; Args.push_back(Entry); 3933 // FIXME: pass in SDLoc 3934 TargetLowering:: 3935 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3936 false, false, false, false, 0, 3937 TLI.getLibcallCallingConv(RTLIB::MEMCPY), 3938 /*isTailCall=*/false, 3939 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3940 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3941 TLI.getPointerTy()), 3942 Args, *this, dl); 3943 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3944 3945 return CallResult.second; 3946} 3947 3948SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst, 3949 SDValue Src, SDValue Size, 3950 unsigned Align, bool isVol, 3951 MachinePointerInfo DstPtrInfo, 3952 MachinePointerInfo SrcPtrInfo) { 3953 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 3954 3955 // Check to see if we should lower the memmove to loads and stores first. 3956 // For cases within the target-specified limits, this is the best choice. 3957 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3958 if (ConstantSize) { 3959 // Memmove with size zero? Just return the original chain. 3960 if (ConstantSize->isNullValue()) 3961 return Chain; 3962 3963 SDValue Result = 3964 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3965 ConstantSize->getZExtValue(), Align, isVol, 3966 false, DstPtrInfo, SrcPtrInfo); 3967 if (Result.getNode()) 3968 return Result; 3969 } 3970 3971 // Then check to see if we should lower the memmove with target-specific 3972 // code. If the target chooses to do this, this is the next best. 3973 SDValue Result = 3974 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3975 DstPtrInfo, SrcPtrInfo); 3976 if (Result.getNode()) 3977 return Result; 3978 3979 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3980 // not be safe. See memcpy above for more details. 3981 3982 // Emit a library call. 3983 TargetLowering::ArgListTy Args; 3984 TargetLowering::ArgListEntry Entry; 3985 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext()); 3986 Entry.Node = Dst; Args.push_back(Entry); 3987 Entry.Node = Src; Args.push_back(Entry); 3988 Entry.Node = Size; Args.push_back(Entry); 3989 // FIXME: pass in SDLoc 3990 TargetLowering:: 3991 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3992 false, false, false, false, 0, 3993 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), 3994 /*isTailCall=*/false, 3995 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3996 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3997 TLI.getPointerTy()), 3998 Args, *this, dl); 3999 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 4000 4001 return CallResult.second; 4002} 4003 4004SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst, 4005 SDValue Src, SDValue Size, 4006 unsigned Align, bool isVol, 4007 MachinePointerInfo DstPtrInfo) { 4008 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 4009 4010 // Check to see if we should lower the memset to stores first. 4011 // For cases within the target-specified limits, this is the best choice. 4012 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 4013 if (ConstantSize) { 4014 // Memset with size zero? Just return the original chain. 4015 if (ConstantSize->isNullValue()) 4016 return Chain; 4017 4018 SDValue Result = 4019 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 4020 Align, isVol, DstPtrInfo); 4021 4022 if (Result.getNode()) 4023 return Result; 4024 } 4025 4026 // Then check to see if we should lower the memset with target-specific 4027 // code. If the target chooses to do this, this is the next best. 4028 SDValue Result = 4029 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 4030 DstPtrInfo); 4031 if (Result.getNode()) 4032 return Result; 4033 4034 // Emit a library call. 4035 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext()); 4036 TargetLowering::ArgListTy Args; 4037 TargetLowering::ArgListEntry Entry; 4038 Entry.Node = Dst; Entry.Ty = IntPtrTy; 4039 Args.push_back(Entry); 4040 // Extend or truncate the argument to be an i32 value for the call. 4041 if (Src.getValueType().bitsGT(MVT::i32)) 4042 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 4043 else 4044 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 4045 Entry.Node = Src; 4046 Entry.Ty = Type::getInt32Ty(*getContext()); 4047 Entry.isSExt = true; 4048 Args.push_back(Entry); 4049 Entry.Node = Size; 4050 Entry.Ty = IntPtrTy; 4051 Entry.isSExt = false; 4052 Args.push_back(Entry); 4053 // FIXME: pass in SDLoc 4054 TargetLowering:: 4055 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 4056 false, false, false, false, 0, 4057 TLI.getLibcallCallingConv(RTLIB::MEMSET), 4058 /*isTailCall=*/false, 4059 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 4060 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 4061 TLI.getPointerTy()), 4062 Args, *this, dl); 4063 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 4064 4065 return CallResult.second; 4066} 4067 4068SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4069 SDValue Chain, SDValue Ptr, SDValue Cmp, 4070 SDValue Swp, MachinePointerInfo PtrInfo, 4071 unsigned Alignment, 4072 AtomicOrdering Ordering, 4073 SynchronizationScope SynchScope) { 4074 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4075 Alignment = getEVTAlignment(MemVT); 4076 4077 MachineFunction &MF = getMachineFunction(); 4078 4079 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE. 4080 // For now, atomics are considered to be volatile always. 4081 // FIXME: Volatile isn't really correct; we should keep track of atomic 4082 // orderings in the memoperand. 4083 unsigned Flags = MachineMemOperand::MOVolatile; 4084 if (Opcode != ISD::ATOMIC_STORE) 4085 Flags |= MachineMemOperand::MOLoad; 4086 if (Opcode != ISD::ATOMIC_LOAD) 4087 Flags |= MachineMemOperand::MOStore; 4088 4089 MachineMemOperand *MMO = 4090 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 4091 4092 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 4093 Ordering, SynchScope); 4094} 4095 4096SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4097 SDValue Chain, 4098 SDValue Ptr, SDValue Cmp, 4099 SDValue Swp, MachineMemOperand *MMO, 4100 AtomicOrdering Ordering, 4101 SynchronizationScope SynchScope) { 4102 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 4103 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 4104 4105 EVT VT = Cmp.getValueType(); 4106 4107 SDVTList VTs = getVTList(VT, MVT::Other); 4108 FoldingSetNodeID ID; 4109 ID.AddInteger(MemVT.getRawBits()); 4110 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 4111 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 4112 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4113 void* IP = 0; 4114 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4115 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4116 return SDValue(E, 0); 4117 } 4118 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(), dl.getDebugLoc(), VTs, MemVT, Chain, 4119 Ptr, Cmp, Swp, MMO, Ordering, 4120 SynchScope); 4121 CSEMap.InsertNode(N, IP); 4122 AllNodes.push_back(N); 4123 return SDValue(N, 0); 4124} 4125 4126SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4127 SDValue Chain, 4128 SDValue Ptr, SDValue Val, 4129 const Value* PtrVal, 4130 unsigned Alignment, 4131 AtomicOrdering Ordering, 4132 SynchronizationScope SynchScope) { 4133 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4134 Alignment = getEVTAlignment(MemVT); 4135 4136 MachineFunction &MF = getMachineFunction(); 4137 // An atomic store does not load. An atomic load does not store. 4138 // (An atomicrmw obviously both loads and stores.) 4139 // For now, atomics are considered to be volatile always, and they are 4140 // chained as such. 4141 // FIXME: Volatile isn't really correct; we should keep track of atomic 4142 // orderings in the memoperand. 4143 unsigned Flags = MachineMemOperand::MOVolatile; 4144 if (Opcode != ISD::ATOMIC_STORE) 4145 Flags |= MachineMemOperand::MOLoad; 4146 if (Opcode != ISD::ATOMIC_LOAD) 4147 Flags |= MachineMemOperand::MOStore; 4148 4149 MachineMemOperand *MMO = 4150 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4151 MemVT.getStoreSize(), Alignment); 4152 4153 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 4154 Ordering, SynchScope); 4155} 4156 4157SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4158 SDValue Chain, 4159 SDValue Ptr, SDValue Val, 4160 MachineMemOperand *MMO, 4161 AtomicOrdering Ordering, 4162 SynchronizationScope SynchScope) { 4163 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 4164 Opcode == ISD::ATOMIC_LOAD_SUB || 4165 Opcode == ISD::ATOMIC_LOAD_AND || 4166 Opcode == ISD::ATOMIC_LOAD_OR || 4167 Opcode == ISD::ATOMIC_LOAD_XOR || 4168 Opcode == ISD::ATOMIC_LOAD_NAND || 4169 Opcode == ISD::ATOMIC_LOAD_MIN || 4170 Opcode == ISD::ATOMIC_LOAD_MAX || 4171 Opcode == ISD::ATOMIC_LOAD_UMIN || 4172 Opcode == ISD::ATOMIC_LOAD_UMAX || 4173 Opcode == ISD::ATOMIC_SWAP || 4174 Opcode == ISD::ATOMIC_STORE) && 4175 "Invalid Atomic Op"); 4176 4177 EVT VT = Val.getValueType(); 4178 4179 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 4180 getVTList(VT, MVT::Other); 4181 FoldingSetNodeID ID; 4182 ID.AddInteger(MemVT.getRawBits()); 4183 SDValue Ops[] = {Chain, Ptr, Val}; 4184 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 4185 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4186 void* IP = 0; 4187 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4188 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4189 return SDValue(E, 0); 4190 } 4191 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(), dl.getDebugLoc(), VTs, MemVT, Chain, 4192 Ptr, Val, MMO, 4193 Ordering, SynchScope); 4194 CSEMap.InsertNode(N, IP); 4195 AllNodes.push_back(N); 4196 return SDValue(N, 0); 4197} 4198 4199SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4200 EVT VT, SDValue Chain, 4201 SDValue Ptr, 4202 const Value* PtrVal, 4203 unsigned Alignment, 4204 AtomicOrdering Ordering, 4205 SynchronizationScope SynchScope) { 4206 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4207 Alignment = getEVTAlignment(MemVT); 4208 4209 MachineFunction &MF = getMachineFunction(); 4210 // An atomic store does not load. An atomic load does not store. 4211 // (An atomicrmw obviously both loads and stores.) 4212 // For now, atomics are considered to be volatile always, and they are 4213 // chained as such. 4214 // FIXME: Volatile isn't really correct; we should keep track of atomic 4215 // orderings in the memoperand. 4216 unsigned Flags = MachineMemOperand::MOVolatile; 4217 if (Opcode != ISD::ATOMIC_STORE) 4218 Flags |= MachineMemOperand::MOLoad; 4219 if (Opcode != ISD::ATOMIC_LOAD) 4220 Flags |= MachineMemOperand::MOStore; 4221 4222 MachineMemOperand *MMO = 4223 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4224 MemVT.getStoreSize(), Alignment); 4225 4226 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4227 Ordering, SynchScope); 4228} 4229 4230SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4231 EVT VT, SDValue Chain, 4232 SDValue Ptr, 4233 MachineMemOperand *MMO, 4234 AtomicOrdering Ordering, 4235 SynchronizationScope SynchScope) { 4236 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4237 4238 SDVTList VTs = getVTList(VT, MVT::Other); 4239 FoldingSetNodeID ID; 4240 ID.AddInteger(MemVT.getRawBits()); 4241 SDValue Ops[] = {Chain, Ptr}; 4242 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 4243 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4244 void* IP = 0; 4245 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4246 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4247 return SDValue(E, 0); 4248 } 4249 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(), dl.getDebugLoc(), VTs, MemVT, Chain, 4250 Ptr, MMO, Ordering, SynchScope); 4251 CSEMap.InsertNode(N, IP); 4252 AllNodes.push_back(N); 4253 return SDValue(N, 0); 4254} 4255 4256/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4257SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4258 SDLoc dl) { 4259 if (NumOps == 1) 4260 return Ops[0]; 4261 4262 SmallVector<EVT, 4> VTs; 4263 VTs.reserve(NumOps); 4264 for (unsigned i = 0; i < NumOps; ++i) 4265 VTs.push_back(Ops[i].getValueType()); 4266 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4267 Ops, NumOps); 4268} 4269 4270SDValue 4271SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, 4272 const EVT *VTs, unsigned NumVTs, 4273 const SDValue *Ops, unsigned NumOps, 4274 EVT MemVT, MachinePointerInfo PtrInfo, 4275 unsigned Align, bool Vol, 4276 bool ReadMem, bool WriteMem) { 4277 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4278 MemVT, PtrInfo, Align, Vol, 4279 ReadMem, WriteMem); 4280} 4281 4282SDValue 4283SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, 4284 const SDValue *Ops, unsigned NumOps, 4285 EVT MemVT, MachinePointerInfo PtrInfo, 4286 unsigned Align, bool Vol, 4287 bool ReadMem, bool WriteMem) { 4288 if (Align == 0) // Ensure that codegen never sees alignment 0 4289 Align = getEVTAlignment(MemVT); 4290 4291 MachineFunction &MF = getMachineFunction(); 4292 unsigned Flags = 0; 4293 if (WriteMem) 4294 Flags |= MachineMemOperand::MOStore; 4295 if (ReadMem) 4296 Flags |= MachineMemOperand::MOLoad; 4297 if (Vol) 4298 Flags |= MachineMemOperand::MOVolatile; 4299 MachineMemOperand *MMO = 4300 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4301 4302 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4303} 4304 4305SDValue 4306SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, 4307 const SDValue *Ops, unsigned NumOps, 4308 EVT MemVT, MachineMemOperand *MMO) { 4309 assert((Opcode == ISD::INTRINSIC_VOID || 4310 Opcode == ISD::INTRINSIC_W_CHAIN || 4311 Opcode == ISD::PREFETCH || 4312 Opcode == ISD::LIFETIME_START || 4313 Opcode == ISD::LIFETIME_END || 4314 (Opcode <= INT_MAX && 4315 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4316 "Opcode is not a memory-accessing opcode!"); 4317 4318 // Memoize the node unless it returns a flag. 4319 MemIntrinsicSDNode *N; 4320 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4321 FoldingSetNodeID ID; 4322 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4323 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4324 void *IP = 0; 4325 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4326 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4327 return SDValue(E, 0); 4328 } 4329 4330 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(), dl.getDebugLoc(), VTList, Ops, NumOps, 4331 MemVT, MMO); 4332 CSEMap.InsertNode(N, IP); 4333 } else { 4334 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(), dl.getDebugLoc(), VTList, Ops, NumOps, 4335 MemVT, MMO); 4336 } 4337 AllNodes.push_back(N); 4338 return SDValue(N, 0); 4339} 4340 4341/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4342/// MachinePointerInfo record from it. This is particularly useful because the 4343/// code generator has many cases where it doesn't bother passing in a 4344/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4345static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4346 // If this is FI+Offset, we can model it. 4347 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4348 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4349 4350 // If this is (FI+Offset1)+Offset2, we can model it. 4351 if (Ptr.getOpcode() != ISD::ADD || 4352 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4353 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4354 return MachinePointerInfo(); 4355 4356 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4357 return MachinePointerInfo::getFixedStack(FI, Offset+ 4358 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4359} 4360 4361/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4362/// MachinePointerInfo record from it. This is particularly useful because the 4363/// code generator has many cases where it doesn't bother passing in a 4364/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4365static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4366 // If the 'Offset' value isn't a constant, we can't handle this. 4367 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4368 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4369 if (OffsetOp.getOpcode() == ISD::UNDEF) 4370 return InferPointerInfo(Ptr); 4371 return MachinePointerInfo(); 4372} 4373 4374 4375SDValue 4376SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4377 EVT VT, SDLoc dl, SDValue Chain, 4378 SDValue Ptr, SDValue Offset, 4379 MachinePointerInfo PtrInfo, EVT MemVT, 4380 bool isVolatile, bool isNonTemporal, bool isInvariant, 4381 unsigned Alignment, const MDNode *TBAAInfo, 4382 const MDNode *Ranges) { 4383 assert(Chain.getValueType() == MVT::Other && 4384 "Invalid chain type"); 4385 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4386 Alignment = getEVTAlignment(VT); 4387 4388 unsigned Flags = MachineMemOperand::MOLoad; 4389 if (isVolatile) 4390 Flags |= MachineMemOperand::MOVolatile; 4391 if (isNonTemporal) 4392 Flags |= MachineMemOperand::MONonTemporal; 4393 if (isInvariant) 4394 Flags |= MachineMemOperand::MOInvariant; 4395 4396 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4397 // clients. 4398 if (PtrInfo.V == 0) 4399 PtrInfo = InferPointerInfo(Ptr, Offset); 4400 4401 MachineFunction &MF = getMachineFunction(); 4402 MachineMemOperand *MMO = 4403 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4404 TBAAInfo, Ranges); 4405 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4406} 4407 4408SDValue 4409SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4410 EVT VT, SDLoc dl, SDValue Chain, 4411 SDValue Ptr, SDValue Offset, EVT MemVT, 4412 MachineMemOperand *MMO) { 4413 if (VT == MemVT) { 4414 ExtType = ISD::NON_EXTLOAD; 4415 } else if (ExtType == ISD::NON_EXTLOAD) { 4416 assert(VT == MemVT && "Non-extending load from different memory type!"); 4417 } else { 4418 // Extending load. 4419 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4420 "Should only be an extending load, not truncating!"); 4421 assert(VT.isInteger() == MemVT.isInteger() && 4422 "Cannot convert from FP to Int or Int -> FP!"); 4423 assert(VT.isVector() == MemVT.isVector() && 4424 "Cannot use trunc store to convert to or from a vector!"); 4425 assert((!VT.isVector() || 4426 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4427 "Cannot use trunc store to change the number of vector elements!"); 4428 } 4429 4430 bool Indexed = AM != ISD::UNINDEXED; 4431 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4432 "Unindexed load with an offset!"); 4433 4434 SDVTList VTs = Indexed ? 4435 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4436 SDValue Ops[] = { Chain, Ptr, Offset }; 4437 FoldingSetNodeID ID; 4438 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4439 ID.AddInteger(MemVT.getRawBits()); 4440 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4441 MMO->isNonTemporal(), 4442 MMO->isInvariant())); 4443 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4444 void *IP = 0; 4445 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4446 cast<LoadSDNode>(E)->refineAlignment(MMO); 4447 return SDValue(E, 0); 4448 } 4449 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(), dl.getDebugLoc(), VTs, AM, ExtType, 4450 MemVT, MMO); 4451 CSEMap.InsertNode(N, IP); 4452 AllNodes.push_back(N); 4453 return SDValue(N, 0); 4454} 4455 4456SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl, 4457 SDValue Chain, SDValue Ptr, 4458 MachinePointerInfo PtrInfo, 4459 bool isVolatile, bool isNonTemporal, 4460 bool isInvariant, unsigned Alignment, 4461 const MDNode *TBAAInfo, 4462 const MDNode *Ranges) { 4463 SDValue Undef = getUNDEF(Ptr.getValueType()); 4464 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4465 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4466 TBAAInfo, Ranges); 4467} 4468 4469SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, 4470 SDValue Chain, SDValue Ptr, 4471 MachinePointerInfo PtrInfo, EVT MemVT, 4472 bool isVolatile, bool isNonTemporal, 4473 unsigned Alignment, const MDNode *TBAAInfo) { 4474 SDValue Undef = getUNDEF(Ptr.getValueType()); 4475 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4476 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4477 TBAAInfo); 4478} 4479 4480 4481SDValue 4482SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base, 4483 SDValue Offset, ISD::MemIndexedMode AM) { 4484 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4485 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4486 "Load is already a indexed load!"); 4487 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4488 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4489 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4490 false, LD->getAlignment()); 4491} 4492 4493SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val, 4494 SDValue Ptr, MachinePointerInfo PtrInfo, 4495 bool isVolatile, bool isNonTemporal, 4496 unsigned Alignment, const MDNode *TBAAInfo) { 4497 assert(Chain.getValueType() == MVT::Other && 4498 "Invalid chain type"); 4499 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4500 Alignment = getEVTAlignment(Val.getValueType()); 4501 4502 unsigned Flags = MachineMemOperand::MOStore; 4503 if (isVolatile) 4504 Flags |= MachineMemOperand::MOVolatile; 4505 if (isNonTemporal) 4506 Flags |= MachineMemOperand::MONonTemporal; 4507 4508 if (PtrInfo.V == 0) 4509 PtrInfo = InferPointerInfo(Ptr); 4510 4511 MachineFunction &MF = getMachineFunction(); 4512 MachineMemOperand *MMO = 4513 MF.getMachineMemOperand(PtrInfo, Flags, 4514 Val.getValueType().getStoreSize(), Alignment, 4515 TBAAInfo); 4516 4517 return getStore(Chain, dl, Val, Ptr, MMO); 4518} 4519 4520SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val, 4521 SDValue Ptr, MachineMemOperand *MMO) { 4522 assert(Chain.getValueType() == MVT::Other && 4523 "Invalid chain type"); 4524 EVT VT = Val.getValueType(); 4525 SDVTList VTs = getVTList(MVT::Other); 4526 SDValue Undef = getUNDEF(Ptr.getValueType()); 4527 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4528 FoldingSetNodeID ID; 4529 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4530 ID.AddInteger(VT.getRawBits()); 4531 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4532 MMO->isNonTemporal(), MMO->isInvariant())); 4533 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4534 void *IP = 0; 4535 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4536 cast<StoreSDNode>(E)->refineAlignment(MMO); 4537 return SDValue(E, 0); 4538 } 4539 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), dl.getDebugLoc(), VTs, ISD::UNINDEXED, 4540 false, VT, MMO); 4541 CSEMap.InsertNode(N, IP); 4542 AllNodes.push_back(N); 4543 return SDValue(N, 0); 4544} 4545 4546SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, 4547 SDValue Ptr, MachinePointerInfo PtrInfo, 4548 EVT SVT,bool isVolatile, bool isNonTemporal, 4549 unsigned Alignment, 4550 const MDNode *TBAAInfo) { 4551 assert(Chain.getValueType() == MVT::Other && 4552 "Invalid chain type"); 4553 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4554 Alignment = getEVTAlignment(SVT); 4555 4556 unsigned Flags = MachineMemOperand::MOStore; 4557 if (isVolatile) 4558 Flags |= MachineMemOperand::MOVolatile; 4559 if (isNonTemporal) 4560 Flags |= MachineMemOperand::MONonTemporal; 4561 4562 if (PtrInfo.V == 0) 4563 PtrInfo = InferPointerInfo(Ptr); 4564 4565 MachineFunction &MF = getMachineFunction(); 4566 MachineMemOperand *MMO = 4567 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4568 TBAAInfo); 4569 4570 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4571} 4572 4573SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, 4574 SDValue Ptr, EVT SVT, 4575 MachineMemOperand *MMO) { 4576 EVT VT = Val.getValueType(); 4577 4578 assert(Chain.getValueType() == MVT::Other && 4579 "Invalid chain type"); 4580 if (VT == SVT) 4581 return getStore(Chain, dl, Val, Ptr, MMO); 4582 4583 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4584 "Should only be a truncating store, not extending!"); 4585 assert(VT.isInteger() == SVT.isInteger() && 4586 "Can't do FP-INT conversion!"); 4587 assert(VT.isVector() == SVT.isVector() && 4588 "Cannot use trunc store to convert to or from a vector!"); 4589 assert((!VT.isVector() || 4590 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4591 "Cannot use trunc store to change the number of vector elements!"); 4592 4593 SDVTList VTs = getVTList(MVT::Other); 4594 SDValue Undef = getUNDEF(Ptr.getValueType()); 4595 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4596 FoldingSetNodeID ID; 4597 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4598 ID.AddInteger(SVT.getRawBits()); 4599 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4600 MMO->isNonTemporal(), MMO->isInvariant())); 4601 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4602 void *IP = 0; 4603 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4604 cast<StoreSDNode>(E)->refineAlignment(MMO); 4605 return SDValue(E, 0); 4606 } 4607 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), dl.getDebugLoc(), VTs, ISD::UNINDEXED, 4608 true, SVT, MMO); 4609 CSEMap.InsertNode(N, IP); 4610 AllNodes.push_back(N); 4611 return SDValue(N, 0); 4612} 4613 4614SDValue 4615SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base, 4616 SDValue Offset, ISD::MemIndexedMode AM) { 4617 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4618 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4619 "Store is already a indexed store!"); 4620 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4621 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4622 FoldingSetNodeID ID; 4623 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4624 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4625 ID.AddInteger(ST->getRawSubclassData()); 4626 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 4627 void *IP = 0; 4628 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4629 return SDValue(E, 0); 4630 4631 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), dl.getDebugLoc(), VTs, AM, 4632 ST->isTruncatingStore(), 4633 ST->getMemoryVT(), 4634 ST->getMemOperand()); 4635 CSEMap.InsertNode(N, IP); 4636 AllNodes.push_back(N); 4637 return SDValue(N, 0); 4638} 4639 4640SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl, 4641 SDValue Chain, SDValue Ptr, 4642 SDValue SV, 4643 unsigned Align) { 4644 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4645 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4646} 4647 4648SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 4649 const SDUse *Ops, unsigned NumOps) { 4650 switch (NumOps) { 4651 case 0: return getNode(Opcode, DL, VT); 4652 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4653 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4654 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4655 default: break; 4656 } 4657 4658 // Copy from an SDUse array into an SDValue array for use with 4659 // the regular getNode logic. 4660 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4661 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4662} 4663 4664SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 4665 const SDValue *Ops, unsigned NumOps) { 4666 switch (NumOps) { 4667 case 0: return getNode(Opcode, DL, VT); 4668 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4669 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4670 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4671 default: break; 4672 } 4673 4674 switch (Opcode) { 4675 default: break; 4676 case ISD::SELECT_CC: { 4677 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4678 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4679 "LHS and RHS of condition must have same type!"); 4680 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4681 "True and False arms of SelectCC must have same type!"); 4682 assert(Ops[2].getValueType() == VT && 4683 "select_cc node must be of same type as true and false value!"); 4684 break; 4685 } 4686 case ISD::BR_CC: { 4687 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4688 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4689 "LHS/RHS of comparison should match types!"); 4690 break; 4691 } 4692 } 4693 4694 // Memoize nodes. 4695 SDNode *N; 4696 SDVTList VTs = getVTList(VT); 4697 4698 if (VT != MVT::Glue) { 4699 FoldingSetNodeID ID; 4700 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4701 void *IP = 0; 4702 4703 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4704 return SDValue(E, 0); 4705 4706 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, Ops, NumOps); 4707 CSEMap.InsertNode(N, IP); 4708 } else { 4709 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, Ops, NumOps); 4710 } 4711 4712 AllNodes.push_back(N); 4713#ifndef NDEBUG 4714 VerifySDNode(N); 4715#endif 4716 return SDValue(N, 0); 4717} 4718 4719SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 4720 ArrayRef<EVT> ResultTys, 4721 const SDValue *Ops, unsigned NumOps) { 4722 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4723 Ops, NumOps); 4724} 4725 4726SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 4727 const EVT *VTs, unsigned NumVTs, 4728 const SDValue *Ops, unsigned NumOps) { 4729 if (NumVTs == 1) 4730 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4731 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4732} 4733 4734SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4735 const SDValue *Ops, unsigned NumOps) { 4736 if (VTList.NumVTs == 1) 4737 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4738 4739#if 0 4740 switch (Opcode) { 4741 // FIXME: figure out how to safely handle things like 4742 // int foo(int x) { return 1 << (x & 255); } 4743 // int bar() { return foo(256); } 4744 case ISD::SRA_PARTS: 4745 case ISD::SRL_PARTS: 4746 case ISD::SHL_PARTS: 4747 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4748 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4749 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4750 else if (N3.getOpcode() == ISD::AND) 4751 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4752 // If the and is only masking out bits that cannot effect the shift, 4753 // eliminate the and. 4754 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4755 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4756 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4757 } 4758 break; 4759 } 4760#endif 4761 4762 // Memoize the node unless it returns a flag. 4763 SDNode *N; 4764 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4765 FoldingSetNodeID ID; 4766 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4767 void *IP = 0; 4768 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4769 return SDValue(E, 0); 4770 4771 if (NumOps == 1) { 4772 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList, Ops[0]); 4773 } else if (NumOps == 2) { 4774 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList, Ops[0], Ops[1]); 4775 } else if (NumOps == 3) { 4776 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList, Ops[0], Ops[1], 4777 Ops[2]); 4778 } else { 4779 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList, Ops, NumOps); 4780 } 4781 CSEMap.InsertNode(N, IP); 4782 } else { 4783 if (NumOps == 1) { 4784 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList, Ops[0]); 4785 } else if (NumOps == 2) { 4786 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList, Ops[0], Ops[1]); 4787 } else if (NumOps == 3) { 4788 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList, Ops[0], Ops[1], 4789 Ops[2]); 4790 } else { 4791 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList, Ops, NumOps); 4792 } 4793 } 4794 AllNodes.push_back(N); 4795#ifndef NDEBUG 4796 VerifySDNode(N); 4797#endif 4798 return SDValue(N, 0); 4799} 4800 4801SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) { 4802 return getNode(Opcode, DL, VTList, 0, 0); 4803} 4804 4805SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4806 SDValue N1) { 4807 SDValue Ops[] = { N1 }; 4808 return getNode(Opcode, DL, VTList, Ops, 1); 4809} 4810 4811SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4812 SDValue N1, SDValue N2) { 4813 SDValue Ops[] = { N1, N2 }; 4814 return getNode(Opcode, DL, VTList, Ops, 2); 4815} 4816 4817SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4818 SDValue N1, SDValue N2, SDValue N3) { 4819 SDValue Ops[] = { N1, N2, N3 }; 4820 return getNode(Opcode, DL, VTList, Ops, 3); 4821} 4822 4823SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4824 SDValue N1, SDValue N2, SDValue N3, 4825 SDValue N4) { 4826 SDValue Ops[] = { N1, N2, N3, N4 }; 4827 return getNode(Opcode, DL, VTList, Ops, 4); 4828} 4829 4830SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4831 SDValue N1, SDValue N2, SDValue N3, 4832 SDValue N4, SDValue N5) { 4833 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4834 return getNode(Opcode, DL, VTList, Ops, 5); 4835} 4836 4837SDVTList SelectionDAG::getVTList(EVT VT) { 4838 return makeVTList(SDNode::getValueTypeList(VT), 1); 4839} 4840 4841SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4842 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4843 E = VTList.rend(); I != E; ++I) 4844 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4845 return *I; 4846 4847 EVT *Array = Allocator.Allocate<EVT>(2); 4848 Array[0] = VT1; 4849 Array[1] = VT2; 4850 SDVTList Result = makeVTList(Array, 2); 4851 VTList.push_back(Result); 4852 return Result; 4853} 4854 4855SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4856 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4857 E = VTList.rend(); I != E; ++I) 4858 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4859 I->VTs[2] == VT3) 4860 return *I; 4861 4862 EVT *Array = Allocator.Allocate<EVT>(3); 4863 Array[0] = VT1; 4864 Array[1] = VT2; 4865 Array[2] = VT3; 4866 SDVTList Result = makeVTList(Array, 3); 4867 VTList.push_back(Result); 4868 return Result; 4869} 4870 4871SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4872 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4873 E = VTList.rend(); I != E; ++I) 4874 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4875 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4876 return *I; 4877 4878 EVT *Array = Allocator.Allocate<EVT>(4); 4879 Array[0] = VT1; 4880 Array[1] = VT2; 4881 Array[2] = VT3; 4882 Array[3] = VT4; 4883 SDVTList Result = makeVTList(Array, 4); 4884 VTList.push_back(Result); 4885 return Result; 4886} 4887 4888SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4889 switch (NumVTs) { 4890 case 0: llvm_unreachable("Cannot have nodes without results!"); 4891 case 1: return getVTList(VTs[0]); 4892 case 2: return getVTList(VTs[0], VTs[1]); 4893 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4894 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4895 default: break; 4896 } 4897 4898 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4899 E = VTList.rend(); I != E; ++I) { 4900 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4901 continue; 4902 4903 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2])) 4904 return *I; 4905 } 4906 4907 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4908 std::copy(VTs, VTs+NumVTs, Array); 4909 SDVTList Result = makeVTList(Array, NumVTs); 4910 VTList.push_back(Result); 4911 return Result; 4912} 4913 4914 4915/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4916/// specified operands. If the resultant node already exists in the DAG, 4917/// this does not modify the specified node, instead it returns the node that 4918/// already exists. If the resultant node does not exist in the DAG, the 4919/// input node is returned. As a degenerate case, if you specify the same 4920/// input operands as the node already has, the input node is returned. 4921SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4922 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4923 4924 // Check to see if there is no change. 4925 if (Op == N->getOperand(0)) return N; 4926 4927 // See if the modified node already exists. 4928 void *InsertPos = 0; 4929 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4930 return Existing; 4931 4932 // Nope it doesn't. Remove the node from its current place in the maps. 4933 if (InsertPos) 4934 if (!RemoveNodeFromCSEMaps(N)) 4935 InsertPos = 0; 4936 4937 // Now we update the operands. 4938 N->OperandList[0].set(Op); 4939 4940 // If this gets put into a CSE map, add it. 4941 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4942 return N; 4943} 4944 4945SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4946 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4947 4948 // Check to see if there is no change. 4949 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4950 return N; // No operands changed, just return the input node. 4951 4952 // See if the modified node already exists. 4953 void *InsertPos = 0; 4954 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4955 return Existing; 4956 4957 // Nope it doesn't. Remove the node from its current place in the maps. 4958 if (InsertPos) 4959 if (!RemoveNodeFromCSEMaps(N)) 4960 InsertPos = 0; 4961 4962 // Now we update the operands. 4963 if (N->OperandList[0] != Op1) 4964 N->OperandList[0].set(Op1); 4965 if (N->OperandList[1] != Op2) 4966 N->OperandList[1].set(Op2); 4967 4968 // If this gets put into a CSE map, add it. 4969 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4970 return N; 4971} 4972 4973SDNode *SelectionDAG:: 4974UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4975 SDValue Ops[] = { Op1, Op2, Op3 }; 4976 return UpdateNodeOperands(N, Ops, 3); 4977} 4978 4979SDNode *SelectionDAG:: 4980UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4981 SDValue Op3, SDValue Op4) { 4982 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4983 return UpdateNodeOperands(N, Ops, 4); 4984} 4985 4986SDNode *SelectionDAG:: 4987UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4988 SDValue Op3, SDValue Op4, SDValue Op5) { 4989 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4990 return UpdateNodeOperands(N, Ops, 5); 4991} 4992 4993SDNode *SelectionDAG:: 4994UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4995 assert(N->getNumOperands() == NumOps && 4996 "Update with wrong number of operands"); 4997 4998 // Check to see if there is no change. 4999 bool AnyChange = false; 5000 for (unsigned i = 0; i != NumOps; ++i) { 5001 if (Ops[i] != N->getOperand(i)) { 5002 AnyChange = true; 5003 break; 5004 } 5005 } 5006 5007 // No operands changed, just return the input node. 5008 if (!AnyChange) return N; 5009 5010 // See if the modified node already exists. 5011 void *InsertPos = 0; 5012 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 5013 return Existing; 5014 5015 // Nope it doesn't. Remove the node from its current place in the maps. 5016 if (InsertPos) 5017 if (!RemoveNodeFromCSEMaps(N)) 5018 InsertPos = 0; 5019 5020 // Now we update the operands. 5021 for (unsigned i = 0; i != NumOps; ++i) 5022 if (N->OperandList[i] != Ops[i]) 5023 N->OperandList[i].set(Ops[i]); 5024 5025 // If this gets put into a CSE map, add it. 5026 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 5027 return N; 5028} 5029 5030/// DropOperands - Release the operands and set this node to have 5031/// zero operands. 5032void SDNode::DropOperands() { 5033 // Unlike the code in MorphNodeTo that does this, we don't need to 5034 // watch for dead nodes here. 5035 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 5036 SDUse &Use = *I++; 5037 Use.set(SDValue()); 5038 } 5039} 5040 5041/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 5042/// machine opcode. 5043/// 5044SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5045 EVT VT) { 5046 SDVTList VTs = getVTList(VT); 5047 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 5048} 5049 5050SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5051 EVT VT, SDValue Op1) { 5052 SDVTList VTs = getVTList(VT); 5053 SDValue Ops[] = { Op1 }; 5054 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5055} 5056 5057SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5058 EVT VT, SDValue Op1, 5059 SDValue Op2) { 5060 SDVTList VTs = getVTList(VT); 5061 SDValue Ops[] = { Op1, Op2 }; 5062 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5063} 5064 5065SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5066 EVT VT, SDValue Op1, 5067 SDValue Op2, SDValue Op3) { 5068 SDVTList VTs = getVTList(VT); 5069 SDValue Ops[] = { Op1, Op2, Op3 }; 5070 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5071} 5072 5073SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5074 EVT VT, const SDValue *Ops, 5075 unsigned NumOps) { 5076 SDVTList VTs = getVTList(VT); 5077 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5078} 5079 5080SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5081 EVT VT1, EVT VT2, const SDValue *Ops, 5082 unsigned NumOps) { 5083 SDVTList VTs = getVTList(VT1, VT2); 5084 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5085} 5086 5087SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5088 EVT VT1, EVT VT2) { 5089 SDVTList VTs = getVTList(VT1, VT2); 5090 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 5091} 5092 5093SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5094 EVT VT1, EVT VT2, EVT VT3, 5095 const SDValue *Ops, unsigned NumOps) { 5096 SDVTList VTs = getVTList(VT1, VT2, VT3); 5097 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5098} 5099 5100SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5101 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 5102 const SDValue *Ops, unsigned NumOps) { 5103 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5104 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5105} 5106 5107SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5108 EVT VT1, EVT VT2, 5109 SDValue Op1) { 5110 SDVTList VTs = getVTList(VT1, VT2); 5111 SDValue Ops[] = { Op1 }; 5112 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5113} 5114 5115SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5116 EVT VT1, EVT VT2, 5117 SDValue Op1, SDValue Op2) { 5118 SDVTList VTs = getVTList(VT1, VT2); 5119 SDValue Ops[] = { Op1, Op2 }; 5120 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5121} 5122 5123SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5124 EVT VT1, EVT VT2, 5125 SDValue Op1, SDValue Op2, 5126 SDValue Op3) { 5127 SDVTList VTs = getVTList(VT1, VT2); 5128 SDValue Ops[] = { Op1, Op2, Op3 }; 5129 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5130} 5131 5132SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5133 EVT VT1, EVT VT2, EVT VT3, 5134 SDValue Op1, SDValue Op2, 5135 SDValue Op3) { 5136 SDVTList VTs = getVTList(VT1, VT2, VT3); 5137 SDValue Ops[] = { Op1, Op2, Op3 }; 5138 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5139} 5140 5141SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5142 SDVTList VTs, const SDValue *Ops, 5143 unsigned NumOps) { 5144 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 5145 // Reset the NodeID to -1. 5146 N->setNodeId(-1); 5147 return N; 5148} 5149 5150/// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away 5151/// the line number information on the merged node since it is not possible to 5152/// preserve the information that operation is associated with multiple lines. 5153/// This will make the debugger working better at -O0, were there is a higher 5154/// probability having other instructions associated with that line. 5155/// 5156/// For IROrder, we keep the smaller of the two 5157SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) { 5158 DebugLoc NLoc = N->getDebugLoc(); 5159 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && 5160 (OLoc.getDebugLoc() != NLoc)) { 5161 N->setDebugLoc(DebugLoc()); 5162 } 5163 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder()); 5164 N->setIROrder(Order); 5165 return N; 5166} 5167 5168/// MorphNodeTo - This *mutates* the specified node to have the specified 5169/// return type, opcode, and operands. 5170/// 5171/// Note that MorphNodeTo returns the resultant node. If there is already a 5172/// node of the specified opcode and operands, it returns that node instead of 5173/// the current one. Note that the SDLoc need not be the same. 5174/// 5175/// Using MorphNodeTo is faster than creating a new node and swapping it in 5176/// with ReplaceAllUsesWith both because it often avoids allocating a new 5177/// node, and because it doesn't require CSE recalculation for any of 5178/// the node's users. 5179/// 5180SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 5181 SDVTList VTs, const SDValue *Ops, 5182 unsigned NumOps) { 5183 // If an identical node already exists, use it. 5184 void *IP = 0; 5185 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 5186 FoldingSetNodeID ID; 5187 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 5188 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 5189 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N)); 5190 } 5191 5192 if (!RemoveNodeFromCSEMaps(N)) 5193 IP = 0; 5194 5195 // Start the morphing. 5196 N->NodeType = Opc; 5197 N->ValueList = VTs.VTs; 5198 N->NumValues = VTs.NumVTs; 5199 5200 // Clear the operands list, updating used nodes to remove this from their 5201 // use list. Keep track of any operands that become dead as a result. 5202 SmallPtrSet<SDNode*, 16> DeadNodeSet; 5203 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 5204 SDUse &Use = *I++; 5205 SDNode *Used = Use.getNode(); 5206 Use.set(SDValue()); 5207 if (Used->use_empty()) 5208 DeadNodeSet.insert(Used); 5209 } 5210 5211 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 5212 // Initialize the memory references information. 5213 MN->setMemRefs(0, 0); 5214 // If NumOps is larger than the # of operands we can have in a 5215 // MachineSDNode, reallocate the operand list. 5216 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 5217 if (MN->OperandsNeedDelete) 5218 delete[] MN->OperandList; 5219 if (NumOps > array_lengthof(MN->LocalOperands)) 5220 // We're creating a final node that will live unmorphed for the 5221 // remainder of the current SelectionDAG iteration, so we can allocate 5222 // the operands directly out of a pool with no recycling metadata. 5223 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5224 Ops, NumOps); 5225 else 5226 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5227 MN->OperandsNeedDelete = false; 5228 } else 5229 MN->InitOperands(MN->OperandList, Ops, NumOps); 5230 } else { 5231 // If NumOps is larger than the # of operands we currently have, reallocate 5232 // the operand list. 5233 if (NumOps > N->NumOperands) { 5234 if (N->OperandsNeedDelete) 5235 delete[] N->OperandList; 5236 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5237 N->OperandsNeedDelete = true; 5238 } else 5239 N->InitOperands(N->OperandList, Ops, NumOps); 5240 } 5241 5242 // Delete any nodes that are still dead after adding the uses for the 5243 // new operands. 5244 if (!DeadNodeSet.empty()) { 5245 SmallVector<SDNode *, 16> DeadNodes; 5246 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5247 E = DeadNodeSet.end(); I != E; ++I) 5248 if ((*I)->use_empty()) 5249 DeadNodes.push_back(*I); 5250 RemoveDeadNodes(DeadNodes); 5251 } 5252 5253 if (IP) 5254 CSEMap.InsertNode(N, IP); // Memoize the new node. 5255 return N; 5256} 5257 5258 5259/// getMachineNode - These are used for target selectors to create a new node 5260/// with specified return type(s), MachineInstr opcode, and operands. 5261/// 5262/// Note that getMachineNode returns the resultant node. If there is already a 5263/// node of the specified opcode and operands, it returns that node instead of 5264/// the current one. 5265MachineSDNode * 5266SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) { 5267 SDVTList VTs = getVTList(VT); 5268 return getMachineNode(Opcode, dl, VTs, None); 5269} 5270 5271MachineSDNode * 5272SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) { 5273 SDVTList VTs = getVTList(VT); 5274 SDValue Ops[] = { Op1 }; 5275 return getMachineNode(Opcode, dl, VTs, Ops); 5276} 5277 5278MachineSDNode * 5279SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5280 SDValue Op1, SDValue Op2) { 5281 SDVTList VTs = getVTList(VT); 5282 SDValue Ops[] = { Op1, Op2 }; 5283 return getMachineNode(Opcode, dl, VTs, Ops); 5284} 5285 5286MachineSDNode * 5287SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5288 SDValue Op1, SDValue Op2, SDValue Op3) { 5289 SDVTList VTs = getVTList(VT); 5290 SDValue Ops[] = { Op1, Op2, Op3 }; 5291 return getMachineNode(Opcode, dl, VTs, Ops); 5292} 5293 5294MachineSDNode * 5295SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5296 ArrayRef<SDValue> Ops) { 5297 SDVTList VTs = getVTList(VT); 5298 return getMachineNode(Opcode, dl, VTs, Ops); 5299} 5300 5301MachineSDNode * 5302SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) { 5303 SDVTList VTs = getVTList(VT1, VT2); 5304 return getMachineNode(Opcode, dl, VTs, None); 5305} 5306 5307MachineSDNode * 5308SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5309 EVT VT1, EVT VT2, SDValue Op1) { 5310 SDVTList VTs = getVTList(VT1, VT2); 5311 SDValue Ops[] = { Op1 }; 5312 return getMachineNode(Opcode, dl, VTs, Ops); 5313} 5314 5315MachineSDNode * 5316SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5317 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5318 SDVTList VTs = getVTList(VT1, VT2); 5319 SDValue Ops[] = { Op1, Op2 }; 5320 return getMachineNode(Opcode, dl, VTs, Ops); 5321} 5322 5323MachineSDNode * 5324SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5325 EVT VT1, EVT VT2, SDValue Op1, 5326 SDValue Op2, SDValue Op3) { 5327 SDVTList VTs = getVTList(VT1, VT2); 5328 SDValue Ops[] = { Op1, Op2, Op3 }; 5329 return getMachineNode(Opcode, dl, VTs, Ops); 5330} 5331 5332MachineSDNode * 5333SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5334 EVT VT1, EVT VT2, 5335 ArrayRef<SDValue> Ops) { 5336 SDVTList VTs = getVTList(VT1, VT2); 5337 return getMachineNode(Opcode, dl, VTs, Ops); 5338} 5339 5340MachineSDNode * 5341SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5342 EVT VT1, EVT VT2, EVT VT3, 5343 SDValue Op1, SDValue Op2) { 5344 SDVTList VTs = getVTList(VT1, VT2, VT3); 5345 SDValue Ops[] = { Op1, Op2 }; 5346 return getMachineNode(Opcode, dl, VTs, Ops); 5347} 5348 5349MachineSDNode * 5350SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5351 EVT VT1, EVT VT2, EVT VT3, 5352 SDValue Op1, SDValue Op2, SDValue Op3) { 5353 SDVTList VTs = getVTList(VT1, VT2, VT3); 5354 SDValue Ops[] = { Op1, Op2, Op3 }; 5355 return getMachineNode(Opcode, dl, VTs, Ops); 5356} 5357 5358MachineSDNode * 5359SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5360 EVT VT1, EVT VT2, EVT VT3, 5361 ArrayRef<SDValue> Ops) { 5362 SDVTList VTs = getVTList(VT1, VT2, VT3); 5363 return getMachineNode(Opcode, dl, VTs, Ops); 5364} 5365 5366MachineSDNode * 5367SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, 5368 EVT VT2, EVT VT3, EVT VT4, 5369 ArrayRef<SDValue> Ops) { 5370 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5371 return getMachineNode(Opcode, dl, VTs, Ops); 5372} 5373 5374MachineSDNode * 5375SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5376 ArrayRef<EVT> ResultTys, 5377 ArrayRef<SDValue> Ops) { 5378 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5379 return getMachineNode(Opcode, dl, VTs, Ops); 5380} 5381 5382MachineSDNode * 5383SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs, 5384 ArrayRef<SDValue> OpsArray) { 5385 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5386 MachineSDNode *N; 5387 void *IP = 0; 5388 const SDValue *Ops = OpsArray.data(); 5389 unsigned NumOps = OpsArray.size(); 5390 5391 if (DoCSE) { 5392 FoldingSetNodeID ID; 5393 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5394 IP = 0; 5395 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5396 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL)); 5397 } 5398 } 5399 5400 // Allocate a new MachineSDNode. 5401 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs); 5402 5403 // Initialize the operands list. 5404 if (NumOps > array_lengthof(N->LocalOperands)) 5405 // We're creating a final node that will live unmorphed for the 5406 // remainder of the current SelectionDAG iteration, so we can allocate 5407 // the operands directly out of a pool with no recycling metadata. 5408 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5409 Ops, NumOps); 5410 else 5411 N->InitOperands(N->LocalOperands, Ops, NumOps); 5412 N->OperandsNeedDelete = false; 5413 5414 if (DoCSE) 5415 CSEMap.InsertNode(N, IP); 5416 5417 AllNodes.push_back(N); 5418#ifndef NDEBUG 5419 VerifyMachineNode(N); 5420#endif 5421 return N; 5422} 5423 5424/// getTargetExtractSubreg - A convenience function for creating 5425/// TargetOpcode::EXTRACT_SUBREG nodes. 5426SDValue 5427SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT, 5428 SDValue Operand) { 5429 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5430 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5431 VT, Operand, SRIdxVal); 5432 return SDValue(Subreg, 0); 5433} 5434 5435/// getTargetInsertSubreg - A convenience function for creating 5436/// TargetOpcode::INSERT_SUBREG nodes. 5437SDValue 5438SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT, 5439 SDValue Operand, SDValue Subreg) { 5440 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5441 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5442 VT, Operand, Subreg, SRIdxVal); 5443 return SDValue(Result, 0); 5444} 5445 5446/// getNodeIfExists - Get the specified node if it's already available, or 5447/// else return NULL. 5448SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5449 const SDValue *Ops, unsigned NumOps) { 5450 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5451 FoldingSetNodeID ID; 5452 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5453 void *IP = 0; 5454 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5455 return E; 5456 } 5457 return NULL; 5458} 5459 5460/// getDbgValue - Creates a SDDbgValue node. 5461/// 5462SDDbgValue * 5463SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5464 DebugLoc DL, unsigned O) { 5465 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5466} 5467 5468SDDbgValue * 5469SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5470 DebugLoc DL, unsigned O) { 5471 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5472} 5473 5474SDDbgValue * 5475SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5476 DebugLoc DL, unsigned O) { 5477 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5478} 5479 5480namespace { 5481 5482/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5483/// pointed to by a use iterator is deleted, increment the use iterator 5484/// so that it doesn't dangle. 5485/// 5486class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5487 SDNode::use_iterator &UI; 5488 SDNode::use_iterator &UE; 5489 5490 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5491 // Increment the iterator as needed. 5492 while (UI != UE && N == *UI) 5493 ++UI; 5494 } 5495 5496public: 5497 RAUWUpdateListener(SelectionDAG &d, 5498 SDNode::use_iterator &ui, 5499 SDNode::use_iterator &ue) 5500 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {} 5501}; 5502 5503} 5504 5505/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5506/// This can cause recursive merging of nodes in the DAG. 5507/// 5508/// This version assumes From has a single result value. 5509/// 5510void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) { 5511 SDNode *From = FromN.getNode(); 5512 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5513 "Cannot replace with this method!"); 5514 assert(From != To.getNode() && "Cannot replace uses of with self"); 5515 5516 // Iterate over all the existing uses of From. New uses will be added 5517 // to the beginning of the use list, which we avoid visiting. 5518 // This specifically avoids visiting uses of From that arise while the 5519 // replacement is happening, because any such uses would be the result 5520 // of CSE: If an existing node looks like From after one of its operands 5521 // is replaced by To, we don't want to replace of all its users with To 5522 // too. See PR3018 for more info. 5523 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5524 RAUWUpdateListener Listener(*this, UI, UE); 5525 while (UI != UE) { 5526 SDNode *User = *UI; 5527 5528 // This node is about to morph, remove its old self from the CSE maps. 5529 RemoveNodeFromCSEMaps(User); 5530 5531 // A user can appear in a use list multiple times, and when this 5532 // happens the uses are usually next to each other in the list. 5533 // To help reduce the number of CSE recomputations, process all 5534 // the uses of this user that we can find this way. 5535 do { 5536 SDUse &Use = UI.getUse(); 5537 ++UI; 5538 Use.set(To); 5539 } while (UI != UE && *UI == User); 5540 5541 // Now that we have modified User, add it back to the CSE maps. If it 5542 // already exists there, recursively merge the results together. 5543 AddModifiedNodeToCSEMaps(User); 5544 } 5545 5546 // If we just RAUW'd the root, take note. 5547 if (FromN == getRoot()) 5548 setRoot(To); 5549} 5550 5551/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5552/// This can cause recursive merging of nodes in the DAG. 5553/// 5554/// This version assumes that for each value of From, there is a 5555/// corresponding value in To in the same position with the same type. 5556/// 5557void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 5558#ifndef NDEBUG 5559 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5560 assert((!From->hasAnyUseOfValue(i) || 5561 From->getValueType(i) == To->getValueType(i)) && 5562 "Cannot use this version of ReplaceAllUsesWith!"); 5563#endif 5564 5565 // Handle the trivial case. 5566 if (From == To) 5567 return; 5568 5569 // Iterate over just the existing users of From. See the comments in 5570 // the ReplaceAllUsesWith above. 5571 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5572 RAUWUpdateListener Listener(*this, UI, UE); 5573 while (UI != UE) { 5574 SDNode *User = *UI; 5575 5576 // This node is about to morph, remove its old self from the CSE maps. 5577 RemoveNodeFromCSEMaps(User); 5578 5579 // A user can appear in a use list multiple times, and when this 5580 // happens the uses are usually next to each other in the list. 5581 // To help reduce the number of CSE recomputations, process all 5582 // the uses of this user that we can find this way. 5583 do { 5584 SDUse &Use = UI.getUse(); 5585 ++UI; 5586 Use.setNode(To); 5587 } while (UI != UE && *UI == User); 5588 5589 // Now that we have modified User, add it back to the CSE maps. If it 5590 // already exists there, recursively merge the results together. 5591 AddModifiedNodeToCSEMaps(User); 5592 } 5593 5594 // If we just RAUW'd the root, take note. 5595 if (From == getRoot().getNode()) 5596 setRoot(SDValue(To, getRoot().getResNo())); 5597} 5598 5599/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5600/// This can cause recursive merging of nodes in the DAG. 5601/// 5602/// This version can replace From with any result values. To must match the 5603/// number and types of values returned by From. 5604void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) { 5605 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5606 return ReplaceAllUsesWith(SDValue(From, 0), To[0]); 5607 5608 // Iterate over just the existing users of From. See the comments in 5609 // the ReplaceAllUsesWith above. 5610 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5611 RAUWUpdateListener Listener(*this, UI, UE); 5612 while (UI != UE) { 5613 SDNode *User = *UI; 5614 5615 // This node is about to morph, remove its old self from the CSE maps. 5616 RemoveNodeFromCSEMaps(User); 5617 5618 // A user can appear in a use list multiple times, and when this 5619 // happens the uses are usually next to each other in the list. 5620 // To help reduce the number of CSE recomputations, process all 5621 // the uses of this user that we can find this way. 5622 do { 5623 SDUse &Use = UI.getUse(); 5624 const SDValue &ToOp = To[Use.getResNo()]; 5625 ++UI; 5626 Use.set(ToOp); 5627 } while (UI != UE && *UI == User); 5628 5629 // Now that we have modified User, add it back to the CSE maps. If it 5630 // already exists there, recursively merge the results together. 5631 AddModifiedNodeToCSEMaps(User); 5632 } 5633 5634 // If we just RAUW'd the root, take note. 5635 if (From == getRoot().getNode()) 5636 setRoot(SDValue(To[getRoot().getResNo()])); 5637} 5638 5639/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5640/// uses of other values produced by From.getNode() alone. The Deleted 5641/// vector is handled the same way as for ReplaceAllUsesWith. 5642void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){ 5643 // Handle the really simple, really trivial case efficiently. 5644 if (From == To) return; 5645 5646 // Handle the simple, trivial, case efficiently. 5647 if (From.getNode()->getNumValues() == 1) { 5648 ReplaceAllUsesWith(From, To); 5649 return; 5650 } 5651 5652 // Iterate over just the existing users of From. See the comments in 5653 // the ReplaceAllUsesWith above. 5654 SDNode::use_iterator UI = From.getNode()->use_begin(), 5655 UE = From.getNode()->use_end(); 5656 RAUWUpdateListener Listener(*this, UI, UE); 5657 while (UI != UE) { 5658 SDNode *User = *UI; 5659 bool UserRemovedFromCSEMaps = false; 5660 5661 // A user can appear in a use list multiple times, and when this 5662 // happens the uses are usually next to each other in the list. 5663 // To help reduce the number of CSE recomputations, process all 5664 // the uses of this user that we can find this way. 5665 do { 5666 SDUse &Use = UI.getUse(); 5667 5668 // Skip uses of different values from the same node. 5669 if (Use.getResNo() != From.getResNo()) { 5670 ++UI; 5671 continue; 5672 } 5673 5674 // If this node hasn't been modified yet, it's still in the CSE maps, 5675 // so remove its old self from the CSE maps. 5676 if (!UserRemovedFromCSEMaps) { 5677 RemoveNodeFromCSEMaps(User); 5678 UserRemovedFromCSEMaps = true; 5679 } 5680 5681 ++UI; 5682 Use.set(To); 5683 } while (UI != UE && *UI == User); 5684 5685 // We are iterating over all uses of the From node, so if a use 5686 // doesn't use the specific value, no changes are made. 5687 if (!UserRemovedFromCSEMaps) 5688 continue; 5689 5690 // Now that we have modified User, add it back to the CSE maps. If it 5691 // already exists there, recursively merge the results together. 5692 AddModifiedNodeToCSEMaps(User); 5693 } 5694 5695 // If we just RAUW'd the root, take note. 5696 if (From == getRoot()) 5697 setRoot(To); 5698} 5699 5700namespace { 5701 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5702 /// to record information about a use. 5703 struct UseMemo { 5704 SDNode *User; 5705 unsigned Index; 5706 SDUse *Use; 5707 }; 5708 5709 /// operator< - Sort Memos by User. 5710 bool operator<(const UseMemo &L, const UseMemo &R) { 5711 return (intptr_t)L.User < (intptr_t)R.User; 5712 } 5713} 5714 5715/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5716/// uses of other values produced by From.getNode() alone. The same value 5717/// may appear in both the From and To list. The Deleted vector is 5718/// handled the same way as for ReplaceAllUsesWith. 5719void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5720 const SDValue *To, 5721 unsigned Num){ 5722 // Handle the simple, trivial case efficiently. 5723 if (Num == 1) 5724 return ReplaceAllUsesOfValueWith(*From, *To); 5725 5726 // Read up all the uses and make records of them. This helps 5727 // processing new uses that are introduced during the 5728 // replacement process. 5729 SmallVector<UseMemo, 4> Uses; 5730 for (unsigned i = 0; i != Num; ++i) { 5731 unsigned FromResNo = From[i].getResNo(); 5732 SDNode *FromNode = From[i].getNode(); 5733 for (SDNode::use_iterator UI = FromNode->use_begin(), 5734 E = FromNode->use_end(); UI != E; ++UI) { 5735 SDUse &Use = UI.getUse(); 5736 if (Use.getResNo() == FromResNo) { 5737 UseMemo Memo = { *UI, i, &Use }; 5738 Uses.push_back(Memo); 5739 } 5740 } 5741 } 5742 5743 // Sort the uses, so that all the uses from a given User are together. 5744 std::sort(Uses.begin(), Uses.end()); 5745 5746 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5747 UseIndex != UseIndexEnd; ) { 5748 // We know that this user uses some value of From. If it is the right 5749 // value, update it. 5750 SDNode *User = Uses[UseIndex].User; 5751 5752 // This node is about to morph, remove its old self from the CSE maps. 5753 RemoveNodeFromCSEMaps(User); 5754 5755 // The Uses array is sorted, so all the uses for a given User 5756 // are next to each other in the list. 5757 // To help reduce the number of CSE recomputations, process all 5758 // the uses of this user that we can find this way. 5759 do { 5760 unsigned i = Uses[UseIndex].Index; 5761 SDUse &Use = *Uses[UseIndex].Use; 5762 ++UseIndex; 5763 5764 Use.set(To[i]); 5765 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5766 5767 // Now that we have modified User, add it back to the CSE maps. If it 5768 // already exists there, recursively merge the results together. 5769 AddModifiedNodeToCSEMaps(User); 5770 } 5771} 5772 5773/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5774/// based on their topological order. It returns the maximum id and a vector 5775/// of the SDNodes* in assigned order by reference. 5776unsigned SelectionDAG::AssignTopologicalOrder() { 5777 5778 unsigned DAGSize = 0; 5779 5780 // SortedPos tracks the progress of the algorithm. Nodes before it are 5781 // sorted, nodes after it are unsorted. When the algorithm completes 5782 // it is at the end of the list. 5783 allnodes_iterator SortedPos = allnodes_begin(); 5784 5785 // Visit all the nodes. Move nodes with no operands to the front of 5786 // the list immediately. Annotate nodes that do have operands with their 5787 // operand count. Before we do this, the Node Id fields of the nodes 5788 // may contain arbitrary values. After, the Node Id fields for nodes 5789 // before SortedPos will contain the topological sort index, and the 5790 // Node Id fields for nodes At SortedPos and after will contain the 5791 // count of outstanding operands. 5792 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5793 SDNode *N = I++; 5794 checkForCycles(N); 5795 unsigned Degree = N->getNumOperands(); 5796 if (Degree == 0) { 5797 // A node with no uses, add it to the result array immediately. 5798 N->setNodeId(DAGSize++); 5799 allnodes_iterator Q = N; 5800 if (Q != SortedPos) 5801 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5802 assert(SortedPos != AllNodes.end() && "Overran node list"); 5803 ++SortedPos; 5804 } else { 5805 // Temporarily use the Node Id as scratch space for the degree count. 5806 N->setNodeId(Degree); 5807 } 5808 } 5809 5810 // Visit all the nodes. As we iterate, move nodes into sorted order, 5811 // such that by the time the end is reached all nodes will be sorted. 5812 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5813 SDNode *N = I; 5814 checkForCycles(N); 5815 // N is in sorted position, so all its uses have one less operand 5816 // that needs to be sorted. 5817 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5818 UI != UE; ++UI) { 5819 SDNode *P = *UI; 5820 unsigned Degree = P->getNodeId(); 5821 assert(Degree != 0 && "Invalid node degree"); 5822 --Degree; 5823 if (Degree == 0) { 5824 // All of P's operands are sorted, so P may sorted now. 5825 P->setNodeId(DAGSize++); 5826 if (P != SortedPos) 5827 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5828 assert(SortedPos != AllNodes.end() && "Overran node list"); 5829 ++SortedPos; 5830 } else { 5831 // Update P's outstanding operand count. 5832 P->setNodeId(Degree); 5833 } 5834 } 5835 if (I == SortedPos) { 5836#ifndef NDEBUG 5837 SDNode *S = ++I; 5838 dbgs() << "Overran sorted position:\n"; 5839 S->dumprFull(); 5840#endif 5841 llvm_unreachable(0); 5842 } 5843 } 5844 5845 assert(SortedPos == AllNodes.end() && 5846 "Topological sort incomplete!"); 5847 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5848 "First node in topological sort is not the entry token!"); 5849 assert(AllNodes.front().getNodeId() == 0 && 5850 "First node in topological sort has non-zero id!"); 5851 assert(AllNodes.front().getNumOperands() == 0 && 5852 "First node in topological sort has operands!"); 5853 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5854 "Last node in topologic sort has unexpected id!"); 5855 assert(AllNodes.back().use_empty() && 5856 "Last node in topologic sort has users!"); 5857 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5858 return DAGSize; 5859} 5860 5861/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5862/// value is produced by SD. 5863void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5864 DbgInfo->add(DB, SD, isParameter); 5865 if (SD) 5866 SD->setHasDebugValue(true); 5867} 5868 5869/// TransferDbgValues - Transfer SDDbgValues. 5870void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5871 if (From == To || !From.getNode()->getHasDebugValue()) 5872 return; 5873 SDNode *FromNode = From.getNode(); 5874 SDNode *ToNode = To.getNode(); 5875 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5876 SmallVector<SDDbgValue *, 2> ClonedDVs; 5877 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5878 I != E; ++I) { 5879 SDDbgValue *Dbg = *I; 5880 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5881 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5882 Dbg->getOffset(), Dbg->getDebugLoc(), 5883 Dbg->getOrder()); 5884 ClonedDVs.push_back(Clone); 5885 } 5886 } 5887 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5888 E = ClonedDVs.end(); I != E; ++I) 5889 AddDbgValue(*I, ToNode, false); 5890} 5891 5892//===----------------------------------------------------------------------===// 5893// SDNode Class 5894//===----------------------------------------------------------------------===// 5895 5896HandleSDNode::~HandleSDNode() { 5897 DropOperands(); 5898} 5899 5900GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order, 5901 DebugLoc DL, const GlobalValue *GA, 5902 EVT VT, int64_t o, unsigned char TF) 5903 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5904 TheGlobal = GA; 5905} 5906 5907MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, 5908 EVT memvt, MachineMemOperand *mmo) 5909 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5910 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5911 MMO->isNonTemporal(), MMO->isInvariant()); 5912 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5913 assert(isNonTemporal() == MMO->isNonTemporal() && 5914 "Non-temporal encoding error!"); 5915 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5916} 5917 5918MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, 5919 const SDValue *Ops, unsigned NumOps, EVT memvt, 5920 MachineMemOperand *mmo) 5921 : SDNode(Opc, Order, dl, VTs, Ops, NumOps), 5922 MemoryVT(memvt), MMO(mmo) { 5923 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5924 MMO->isNonTemporal(), MMO->isInvariant()); 5925 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5926 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5927} 5928 5929/// Profile - Gather unique data for the node. 5930/// 5931void SDNode::Profile(FoldingSetNodeID &ID) const { 5932 AddNodeIDNode(ID, this); 5933} 5934 5935namespace { 5936 struct EVTArray { 5937 std::vector<EVT> VTs; 5938 5939 EVTArray() { 5940 VTs.reserve(MVT::LAST_VALUETYPE); 5941 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5942 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5943 } 5944 }; 5945} 5946 5947static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5948static ManagedStatic<EVTArray> SimpleVTArray; 5949static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5950 5951/// getValueTypeList - Return a pointer to the specified value type. 5952/// 5953const EVT *SDNode::getValueTypeList(EVT VT) { 5954 if (VT.isExtended()) { 5955 sys::SmartScopedLock<true> Lock(*VTMutex); 5956 return &(*EVTs->insert(VT).first); 5957 } else { 5958 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5959 "Value type out of range!"); 5960 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5961 } 5962} 5963 5964/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5965/// indicated value. This method ignores uses of other values defined by this 5966/// operation. 5967bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5968 assert(Value < getNumValues() && "Bad value!"); 5969 5970 // TODO: Only iterate over uses of a given value of the node 5971 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5972 if (UI.getUse().getResNo() == Value) { 5973 if (NUses == 0) 5974 return false; 5975 --NUses; 5976 } 5977 } 5978 5979 // Found exactly the right number of uses? 5980 return NUses == 0; 5981} 5982 5983 5984/// hasAnyUseOfValue - Return true if there are any use of the indicated 5985/// value. This method ignores uses of other values defined by this operation. 5986bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5987 assert(Value < getNumValues() && "Bad value!"); 5988 5989 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5990 if (UI.getUse().getResNo() == Value) 5991 return true; 5992 5993 return false; 5994} 5995 5996 5997/// isOnlyUserOf - Return true if this node is the only use of N. 5998/// 5999bool SDNode::isOnlyUserOf(SDNode *N) const { 6000 bool Seen = false; 6001 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 6002 SDNode *User = *I; 6003 if (User == this) 6004 Seen = true; 6005 else 6006 return false; 6007 } 6008 6009 return Seen; 6010} 6011 6012/// isOperand - Return true if this node is an operand of N. 6013/// 6014bool SDValue::isOperandOf(SDNode *N) const { 6015 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6016 if (*this == N->getOperand(i)) 6017 return true; 6018 return false; 6019} 6020 6021bool SDNode::isOperandOf(SDNode *N) const { 6022 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 6023 if (this == N->OperandList[i].getNode()) 6024 return true; 6025 return false; 6026} 6027 6028/// reachesChainWithoutSideEffects - Return true if this operand (which must 6029/// be a chain) reaches the specified operand without crossing any 6030/// side-effecting instructions on any chain path. In practice, this looks 6031/// through token factors and non-volatile loads. In order to remain efficient, 6032/// this only looks a couple of nodes in, it does not do an exhaustive search. 6033bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 6034 unsigned Depth) const { 6035 if (*this == Dest) return true; 6036 6037 // Don't search too deeply, we just want to be able to see through 6038 // TokenFactor's etc. 6039 if (Depth == 0) return false; 6040 6041 // If this is a token factor, all inputs to the TF happen in parallel. If any 6042 // of the operands of the TF does not reach dest, then we cannot do the xform. 6043 if (getOpcode() == ISD::TokenFactor) { 6044 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 6045 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 6046 return false; 6047 return true; 6048 } 6049 6050 // Loads don't have side effects, look through them. 6051 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 6052 if (!Ld->isVolatile()) 6053 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 6054 } 6055 return false; 6056} 6057 6058/// hasPredecessor - Return true if N is a predecessor of this node. 6059/// N is either an operand of this node, or can be reached by recursively 6060/// traversing up the operands. 6061/// NOTE: This is an expensive method. Use it carefully. 6062bool SDNode::hasPredecessor(const SDNode *N) const { 6063 SmallPtrSet<const SDNode *, 32> Visited; 6064 SmallVector<const SDNode *, 16> Worklist; 6065 return hasPredecessorHelper(N, Visited, Worklist); 6066} 6067 6068bool SDNode::hasPredecessorHelper(const SDNode *N, 6069 SmallPtrSet<const SDNode *, 32> &Visited, 6070 SmallVector<const SDNode *, 16> &Worklist) const { 6071 if (Visited.empty()) { 6072 Worklist.push_back(this); 6073 } else { 6074 // Take a look in the visited set. If we've already encountered this node 6075 // we needn't search further. 6076 if (Visited.count(N)) 6077 return true; 6078 } 6079 6080 // Haven't visited N yet. Continue the search. 6081 while (!Worklist.empty()) { 6082 const SDNode *M = Worklist.pop_back_val(); 6083 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 6084 SDNode *Op = M->getOperand(i).getNode(); 6085 if (Visited.insert(Op)) 6086 Worklist.push_back(Op); 6087 if (Op == N) 6088 return true; 6089 } 6090 } 6091 6092 return false; 6093} 6094 6095uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 6096 assert(Num < NumOperands && "Invalid child # of SDNode!"); 6097 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 6098} 6099 6100SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6101 assert(N->getNumValues() == 1 && 6102 "Can't unroll a vector with multiple results!"); 6103 6104 EVT VT = N->getValueType(0); 6105 unsigned NE = VT.getVectorNumElements(); 6106 EVT EltVT = VT.getVectorElementType(); 6107 SDLoc dl(N); 6108 6109 SmallVector<SDValue, 8> Scalars; 6110 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6111 6112 // If ResNE is 0, fully unroll the vector op. 6113 if (ResNE == 0) 6114 ResNE = NE; 6115 else if (NE > ResNE) 6116 NE = ResNE; 6117 6118 unsigned i; 6119 for (i= 0; i != NE; ++i) { 6120 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6121 SDValue Operand = N->getOperand(j); 6122 EVT OperandVT = Operand.getValueType(); 6123 if (OperandVT.isVector()) { 6124 // A vector operand; extract a single element. 6125 EVT OperandEltVT = OperandVT.getVectorElementType(); 6126 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6127 OperandEltVT, 6128 Operand, 6129 getConstant(i, TLI.getPointerTy())); 6130 } else { 6131 // A scalar operand; just use it as is. 6132 Operands[j] = Operand; 6133 } 6134 } 6135 6136 switch (N->getOpcode()) { 6137 default: 6138 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6139 &Operands[0], Operands.size())); 6140 break; 6141 case ISD::VSELECT: 6142 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6143 &Operands[0], Operands.size())); 6144 break; 6145 case ISD::SHL: 6146 case ISD::SRA: 6147 case ISD::SRL: 6148 case ISD::ROTL: 6149 case ISD::ROTR: 6150 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6151 getShiftAmountOperand(Operands[0].getValueType(), 6152 Operands[1]))); 6153 break; 6154 case ISD::SIGN_EXTEND_INREG: 6155 case ISD::FP_ROUND_INREG: { 6156 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6157 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6158 Operands[0], 6159 getValueType(ExtVT))); 6160 } 6161 } 6162 } 6163 6164 for (; i < ResNE; ++i) 6165 Scalars.push_back(getUNDEF(EltVT)); 6166 6167 return getNode(ISD::BUILD_VECTOR, dl, 6168 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6169 &Scalars[0], Scalars.size()); 6170} 6171 6172 6173/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6174/// location that is 'Dist' units away from the location that the 'Base' load 6175/// is loading from. 6176bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6177 unsigned Bytes, int Dist) const { 6178 if (LD->getChain() != Base->getChain()) 6179 return false; 6180 EVT VT = LD->getValueType(0); 6181 if (VT.getSizeInBits() / 8 != Bytes) 6182 return false; 6183 6184 SDValue Loc = LD->getOperand(1); 6185 SDValue BaseLoc = Base->getOperand(1); 6186 if (Loc.getOpcode() == ISD::FrameIndex) { 6187 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6188 return false; 6189 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6190 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6191 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6192 int FS = MFI->getObjectSize(FI); 6193 int BFS = MFI->getObjectSize(BFI); 6194 if (FS != BFS || FS != (int)Bytes) return false; 6195 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6196 } 6197 6198 // Handle X+C 6199 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6200 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6201 return true; 6202 6203 const GlobalValue *GV1 = NULL; 6204 const GlobalValue *GV2 = NULL; 6205 int64_t Offset1 = 0; 6206 int64_t Offset2 = 0; 6207 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6208 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6209 if (isGA1 && isGA2 && GV1 == GV2) 6210 return Offset1 == (Offset2 + Dist*Bytes); 6211 return false; 6212} 6213 6214 6215/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6216/// it cannot be inferred. 6217unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6218 // If this is a GlobalAddress + cst, return the alignment. 6219 const GlobalValue *GV; 6220 int64_t GVOffset = 0; 6221 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6222 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 6223 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6224 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6225 TLI.getDataLayout()); 6226 unsigned AlignBits = KnownZero.countTrailingOnes(); 6227 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6228 if (Align) 6229 return MinAlign(Align, GVOffset); 6230 } 6231 6232 // If this is a direct reference to a stack slot, use information about the 6233 // stack slot's alignment. 6234 int FrameIdx = 1 << 31; 6235 int64_t FrameOffset = 0; 6236 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6237 FrameIdx = FI->getIndex(); 6238 } else if (isBaseWithConstantOffset(Ptr) && 6239 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6240 // Handle FI+Cst 6241 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6242 FrameOffset = Ptr.getConstantOperandVal(1); 6243 } 6244 6245 if (FrameIdx != (1 << 31)) { 6246 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6247 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6248 FrameOffset); 6249 return FIInfoAlign; 6250 } 6251 6252 return 0; 6253} 6254 6255// getAddressSpace - Return the address space this GlobalAddress belongs to. 6256unsigned GlobalAddressSDNode::getAddressSpace() const { 6257 return getGlobal()->getType()->getAddressSpace(); 6258} 6259 6260 6261Type *ConstantPoolSDNode::getType() const { 6262 if (isMachineConstantPoolEntry()) 6263 return Val.MachineCPVal->getType(); 6264 return Val.ConstVal->getType(); 6265} 6266 6267bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6268 APInt &SplatUndef, 6269 unsigned &SplatBitSize, 6270 bool &HasAnyUndefs, 6271 unsigned MinSplatBits, 6272 bool isBigEndian) { 6273 EVT VT = getValueType(0); 6274 assert(VT.isVector() && "Expected a vector type"); 6275 unsigned sz = VT.getSizeInBits(); 6276 if (MinSplatBits > sz) 6277 return false; 6278 6279 SplatValue = APInt(sz, 0); 6280 SplatUndef = APInt(sz, 0); 6281 6282 // Get the bits. Bits with undefined values (when the corresponding element 6283 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6284 // in SplatValue. If any of the values are not constant, give up and return 6285 // false. 6286 unsigned int nOps = getNumOperands(); 6287 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6288 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6289 6290 for (unsigned j = 0; j < nOps; ++j) { 6291 unsigned i = isBigEndian ? nOps-1-j : j; 6292 SDValue OpVal = getOperand(i); 6293 unsigned BitPos = j * EltBitSize; 6294 6295 if (OpVal.getOpcode() == ISD::UNDEF) 6296 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6297 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6298 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6299 zextOrTrunc(sz) << BitPos; 6300 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6301 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6302 else 6303 return false; 6304 } 6305 6306 // The build_vector is all constants or undefs. Find the smallest element 6307 // size that splats the vector. 6308 6309 HasAnyUndefs = (SplatUndef != 0); 6310 while (sz > 8) { 6311 6312 unsigned HalfSize = sz / 2; 6313 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6314 APInt LowValue = SplatValue.trunc(HalfSize); 6315 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6316 APInt LowUndef = SplatUndef.trunc(HalfSize); 6317 6318 // If the two halves do not match (ignoring undef bits), stop here. 6319 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6320 MinSplatBits > HalfSize) 6321 break; 6322 6323 SplatValue = HighValue | LowValue; 6324 SplatUndef = HighUndef & LowUndef; 6325 6326 sz = HalfSize; 6327 } 6328 6329 SplatBitSize = sz; 6330 return true; 6331} 6332 6333bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6334 // Find the first non-undef value in the shuffle mask. 6335 unsigned i, e; 6336 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6337 /* search */; 6338 6339 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6340 6341 // Make sure all remaining elements are either undef or the same as the first 6342 // non-undef value. 6343 for (int Idx = Mask[i]; i != e; ++i) 6344 if (Mask[i] >= 0 && Mask[i] != Idx) 6345 return false; 6346 return true; 6347} 6348 6349#ifdef XDEBUG 6350static void checkForCyclesHelper(const SDNode *N, 6351 SmallPtrSet<const SDNode*, 32> &Visited, 6352 SmallPtrSet<const SDNode*, 32> &Checked) { 6353 // If this node has already been checked, don't check it again. 6354 if (Checked.count(N)) 6355 return; 6356 6357 // If a node has already been visited on this depth-first walk, reject it as 6358 // a cycle. 6359 if (!Visited.insert(N)) { 6360 dbgs() << "Offending node:\n"; 6361 N->dumprFull(); 6362 errs() << "Detected cycle in SelectionDAG\n"; 6363 abort(); 6364 } 6365 6366 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6367 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6368 6369 Checked.insert(N); 6370 Visited.erase(N); 6371} 6372#endif 6373 6374void llvm::checkForCycles(const llvm::SDNode *N) { 6375#ifdef XDEBUG 6376 assert(N && "Checking nonexistant SDNode"); 6377 SmallPtrSet<const SDNode*, 32> visited; 6378 SmallPtrSet<const SDNode*, 32> checked; 6379 checkForCyclesHelper(N, visited, checked); 6380#endif 6381} 6382 6383void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6384 checkForCycles(DAG->getRoot().getNode()); 6385} 6386