SelectionDAG.cpp revision e8cc39fad0c152a1b03f52b3cc821b3ce418e89c
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "llvm/Constants.h" 17#include "llvm/Analysis/ValueTracking.h" 18#include "llvm/Function.h" 19#include "llvm/GlobalAlias.h" 20#include "llvm/GlobalVariable.h" 21#include "llvm/Intrinsics.h" 22#include "llvm/DerivedTypes.h" 23#include "llvm/Assembly/Writer.h" 24#include "llvm/CallingConv.h" 25#include "llvm/CodeGen/MachineBasicBlock.h" 26#include "llvm/CodeGen/MachineConstantPool.h" 27#include "llvm/CodeGen/MachineFrameInfo.h" 28#include "llvm/CodeGen/MachineModuleInfo.h" 29#include "llvm/CodeGen/PseudoSourceValue.h" 30#include "llvm/Target/TargetRegisterInfo.h" 31#include "llvm/Target/TargetData.h" 32#include "llvm/Target/TargetFrameInfo.h" 33#include "llvm/Target/TargetLowering.h" 34#include "llvm/Target/TargetOptions.h" 35#include "llvm/Target/TargetInstrInfo.h" 36#include "llvm/Target/TargetIntrinsicInfo.h" 37#include "llvm/Target/TargetMachine.h" 38#include "llvm/Support/CommandLine.h" 39#include "llvm/Support/Debug.h" 40#include "llvm/Support/ErrorHandling.h" 41#include "llvm/Support/ManagedStatic.h" 42#include "llvm/Support/MathExtras.h" 43#include "llvm/Support/raw_ostream.h" 44#include "llvm/System/Mutex.h" 45#include "llvm/ADT/SetVector.h" 46#include "llvm/ADT/SmallPtrSet.h" 47#include "llvm/ADT/SmallSet.h" 48#include "llvm/ADT/SmallVector.h" 49#include "llvm/ADT/StringExtras.h" 50#include <algorithm> 51#include <cmath> 52using namespace llvm; 53 54/// makeVTList - Return an instance of the SDVTList struct initialized with the 55/// specified members. 56static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 57 SDVTList Res = {VTs, NumVTs}; 58 return Res; 59} 60 61static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 62 switch (VT.getSimpleVT().SimpleTy) { 63 default: llvm_unreachable("Unknown FP format"); 64 case MVT::f32: return &APFloat::IEEEsingle; 65 case MVT::f64: return &APFloat::IEEEdouble; 66 case MVT::f80: return &APFloat::x87DoubleExtended; 67 case MVT::f128: return &APFloat::IEEEquad; 68 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 69 } 70} 71 72SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 73 74//===----------------------------------------------------------------------===// 75// ConstantFPSDNode Class 76//===----------------------------------------------------------------------===// 77 78/// isExactlyValue - We don't rely on operator== working on double values, as 79/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 80/// As such, this method can be used to do an exact bit-for-bit comparison of 81/// two floating point values. 82bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 83 return getValueAPF().bitwiseIsEqual(V); 84} 85 86bool ConstantFPSDNode::isValueValidForType(EVT VT, 87 const APFloat& Val) { 88 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 89 90 // PPC long double cannot be converted to any other type. 91 if (VT == MVT::ppcf128 || 92 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 93 return false; 94 95 // convert modifies in place, so make a copy. 96 APFloat Val2 = APFloat(Val); 97 bool losesInfo; 98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 99 &losesInfo); 100 return !losesInfo; 101} 102 103//===----------------------------------------------------------------------===// 104// ISD Namespace 105//===----------------------------------------------------------------------===// 106 107/// isBuildVectorAllOnes - Return true if the specified node is a 108/// BUILD_VECTOR where all of the elements are ~0 or undef. 109bool ISD::isBuildVectorAllOnes(const SDNode *N) { 110 // Look through a bit convert. 111 if (N->getOpcode() == ISD::BIT_CONVERT) 112 N = N->getOperand(0).getNode(); 113 114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 115 116 unsigned i = 0, e = N->getNumOperands(); 117 118 // Skip over all of the undef values. 119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 120 ++i; 121 122 // Do not accept an all-undef vector. 123 if (i == e) return false; 124 125 // Do not accept build_vectors that aren't all constants or which have non-~0 126 // elements. 127 SDValue NotZero = N->getOperand(i); 128 if (isa<ConstantSDNode>(NotZero)) { 129 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 130 return false; 131 } else if (isa<ConstantFPSDNode>(NotZero)) { 132 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 133 bitcastToAPInt().isAllOnesValue()) 134 return false; 135 } else 136 return false; 137 138 // Okay, we have at least one ~0 value, check to see if the rest match or are 139 // undefs. 140 for (++i; i != e; ++i) 141 if (N->getOperand(i) != NotZero && 142 N->getOperand(i).getOpcode() != ISD::UNDEF) 143 return false; 144 return true; 145} 146 147 148/// isBuildVectorAllZeros - Return true if the specified node is a 149/// BUILD_VECTOR where all of the elements are 0 or undef. 150bool ISD::isBuildVectorAllZeros(const SDNode *N) { 151 // Look through a bit convert. 152 if (N->getOpcode() == ISD::BIT_CONVERT) 153 N = N->getOperand(0).getNode(); 154 155 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 156 157 unsigned i = 0, e = N->getNumOperands(); 158 159 // Skip over all of the undef values. 160 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 161 ++i; 162 163 // Do not accept an all-undef vector. 164 if (i == e) return false; 165 166 // Do not accept build_vectors that aren't all constants or which have non-0 167 // elements. 168 SDValue Zero = N->getOperand(i); 169 if (isa<ConstantSDNode>(Zero)) { 170 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 171 return false; 172 } else if (isa<ConstantFPSDNode>(Zero)) { 173 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 174 return false; 175 } else 176 return false; 177 178 // Okay, we have at least one 0 value, check to see if the rest match or are 179 // undefs. 180 for (++i; i != e; ++i) 181 if (N->getOperand(i) != Zero && 182 N->getOperand(i).getOpcode() != ISD::UNDEF) 183 return false; 184 return true; 185} 186 187/// isScalarToVector - Return true if the specified node is a 188/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 189/// element is not an undef. 190bool ISD::isScalarToVector(const SDNode *N) { 191 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 192 return true; 193 194 if (N->getOpcode() != ISD::BUILD_VECTOR) 195 return false; 196 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 197 return false; 198 unsigned NumElems = N->getNumOperands(); 199 for (unsigned i = 1; i < NumElems; ++i) { 200 SDValue V = N->getOperand(i); 201 if (V.getOpcode() != ISD::UNDEF) 202 return false; 203 } 204 return true; 205} 206 207/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 208/// when given the operation for (X op Y). 209ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 210 // To perform this operation, we just need to swap the L and G bits of the 211 // operation. 212 unsigned OldL = (Operation >> 2) & 1; 213 unsigned OldG = (Operation >> 1) & 1; 214 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 215 (OldL << 1) | // New G bit 216 (OldG << 2)); // New L bit. 217} 218 219/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 220/// 'op' is a valid SetCC operation. 221ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 222 unsigned Operation = Op; 223 if (isInteger) 224 Operation ^= 7; // Flip L, G, E bits, but not U. 225 else 226 Operation ^= 15; // Flip all of the condition bits. 227 228 if (Operation > ISD::SETTRUE2) 229 Operation &= ~8; // Don't let N and U bits get set. 230 231 return ISD::CondCode(Operation); 232} 233 234 235/// isSignedOp - For an integer comparison, return 1 if the comparison is a 236/// signed operation and 2 if the result is an unsigned comparison. Return zero 237/// if the operation does not depend on the sign of the input (setne and seteq). 238static int isSignedOp(ISD::CondCode Opcode) { 239 switch (Opcode) { 240 default: llvm_unreachable("Illegal integer setcc operation!"); 241 case ISD::SETEQ: 242 case ISD::SETNE: return 0; 243 case ISD::SETLT: 244 case ISD::SETLE: 245 case ISD::SETGT: 246 case ISD::SETGE: return 1; 247 case ISD::SETULT: 248 case ISD::SETULE: 249 case ISD::SETUGT: 250 case ISD::SETUGE: return 2; 251 } 252} 253 254/// getSetCCOrOperation - Return the result of a logical OR between different 255/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 256/// returns SETCC_INVALID if it is not possible to represent the resultant 257/// comparison. 258ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 259 bool isInteger) { 260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 261 // Cannot fold a signed integer setcc with an unsigned integer setcc. 262 return ISD::SETCC_INVALID; 263 264 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 265 266 // If the N and U bits get set then the resultant comparison DOES suddenly 267 // care about orderedness, and is true when ordered. 268 if (Op > ISD::SETTRUE2) 269 Op &= ~16; // Clear the U bit if the N bit is set. 270 271 // Canonicalize illegal integer setcc's. 272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 273 Op = ISD::SETNE; 274 275 return ISD::CondCode(Op); 276} 277 278/// getSetCCAndOperation - Return the result of a logical AND between different 279/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 280/// function returns zero if it is not possible to represent the resultant 281/// comparison. 282ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 283 bool isInteger) { 284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 285 // Cannot fold a signed setcc with an unsigned setcc. 286 return ISD::SETCC_INVALID; 287 288 // Combine all of the condition bits. 289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 290 291 // Canonicalize illegal integer setcc's. 292 if (isInteger) { 293 switch (Result) { 294 default: break; 295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 296 case ISD::SETOEQ: // SETEQ & SETU[LG]E 297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 300 } 301 } 302 303 return Result; 304} 305 306const TargetMachine &SelectionDAG::getTarget() const { 307 return MF->getTarget(); 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 const SDValue *Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->getNode()); 332 ID.AddInteger(Ops->getResNo()); 333 } 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDUse *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346static void AddNodeIDNode(FoldingSetNodeID &ID, 347 unsigned short OpC, SDVTList VTList, 348 const SDValue *OpList, unsigned N) { 349 AddNodeIDOpcode(ID, OpC); 350 AddNodeIDValueTypes(ID, VTList); 351 AddNodeIDOperands(ID, OpList, N); 352} 353 354/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 355/// the NodeID data. 356static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 357 switch (N->getOpcode()) { 358 case ISD::TargetExternalSymbol: 359 case ISD::ExternalSymbol: 360 llvm_unreachable("Should only be used on nodes with operands"); 361 default: break; // Normal nodes don't need extra info. 362 case ISD::TargetConstant: 363 case ISD::Constant: 364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 365 break; 366 case ISD::TargetConstantFP: 367 case ISD::ConstantFP: { 368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 369 break; 370 } 371 case ISD::TargetGlobalAddress: 372 case ISD::GlobalAddress: 373 case ISD::TargetGlobalTLSAddress: 374 case ISD::GlobalTLSAddress: { 375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 376 ID.AddPointer(GA->getGlobal()); 377 ID.AddInteger(GA->getOffset()); 378 ID.AddInteger(GA->getTargetFlags()); 379 break; 380 } 381 case ISD::BasicBlock: 382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 383 break; 384 case ISD::Register: 385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 386 break; 387 388 case ISD::SRCVALUE: 389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 390 break; 391 case ISD::FrameIndex: 392 case ISD::TargetFrameIndex: 393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 394 break; 395 case ISD::JumpTable: 396 case ISD::TargetJumpTable: 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 399 break; 400 case ISD::ConstantPool: 401 case ISD::TargetConstantPool: { 402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 403 ID.AddInteger(CP->getAlignment()); 404 ID.AddInteger(CP->getOffset()); 405 if (CP->isMachineConstantPoolEntry()) 406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 407 else 408 ID.AddPointer(CP->getConstVal()); 409 ID.AddInteger(CP->getTargetFlags()); 410 break; 411 } 412 case ISD::LOAD: { 413 const LoadSDNode *LD = cast<LoadSDNode>(N); 414 ID.AddInteger(LD->getMemoryVT().getRawBits()); 415 ID.AddInteger(LD->getRawSubclassData()); 416 break; 417 } 418 case ISD::STORE: { 419 const StoreSDNode *ST = cast<StoreSDNode>(N); 420 ID.AddInteger(ST->getMemoryVT().getRawBits()); 421 ID.AddInteger(ST->getRawSubclassData()); 422 break; 423 } 424 case ISD::ATOMIC_CMP_SWAP: 425 case ISD::ATOMIC_SWAP: 426 case ISD::ATOMIC_LOAD_ADD: 427 case ISD::ATOMIC_LOAD_SUB: 428 case ISD::ATOMIC_LOAD_AND: 429 case ISD::ATOMIC_LOAD_OR: 430 case ISD::ATOMIC_LOAD_XOR: 431 case ISD::ATOMIC_LOAD_NAND: 432 case ISD::ATOMIC_LOAD_MIN: 433 case ISD::ATOMIC_LOAD_MAX: 434 case ISD::ATOMIC_LOAD_UMIN: 435 case ISD::ATOMIC_LOAD_UMAX: { 436 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 437 ID.AddInteger(AT->getMemoryVT().getRawBits()); 438 ID.AddInteger(AT->getRawSubclassData()); 439 break; 440 } 441 case ISD::VECTOR_SHUFFLE: { 442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 444 i != e; ++i) 445 ID.AddInteger(SVN->getMaskElt(i)); 446 break; 447 } 448 case ISD::TargetBlockAddress: 449 case ISD::BlockAddress: { 450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 452 break; 453 } 454 } // end switch (N->getOpcode()) 455} 456 457/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 458/// data. 459static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 460 AddNodeIDOpcode(ID, N->getOpcode()); 461 // Add the return value info. 462 AddNodeIDValueTypes(ID, N->getVTList()); 463 // Add the operand info. 464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 465 466 // Handle SDNode leafs with special info. 467 AddNodeIDCustom(ID, N); 468} 469 470/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 471/// the CSE map that carries volatility, temporalness, indexing mode, and 472/// extension/truncation information. 473/// 474static inline unsigned 475encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 476 bool isNonTemporal) { 477 assert((ConvType & 3) == ConvType && 478 "ConvType may not require more than 2 bits!"); 479 assert((AM & 7) == AM && 480 "AM may not require more than 3 bits!"); 481 return ConvType | 482 (AM << 2) | 483 (isVolatile << 5) | 484 (isNonTemporal << 6); 485} 486 487//===----------------------------------------------------------------------===// 488// SelectionDAG Class 489//===----------------------------------------------------------------------===// 490 491/// doNotCSE - Return true if CSE should not be performed for this node. 492static bool doNotCSE(SDNode *N) { 493 if (N->getValueType(0) == MVT::Flag) 494 return true; // Never CSE anything that produces a flag. 495 496 switch (N->getOpcode()) { 497 default: break; 498 case ISD::HANDLENODE: 499 case ISD::EH_LABEL: 500 return true; // Never CSE these nodes. 501 } 502 503 // Check that remaining values produced are not flags. 504 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 505 if (N->getValueType(i) == MVT::Flag) 506 return true; // Never CSE anything that produces a flag. 507 508 return false; 509} 510 511/// RemoveDeadNodes - This method deletes all unreachable nodes in the 512/// SelectionDAG. 513void SelectionDAG::RemoveDeadNodes() { 514 // Create a dummy node (which is not added to allnodes), that adds a reference 515 // to the root node, preventing it from being deleted. 516 HandleSDNode Dummy(getRoot()); 517 518 SmallVector<SDNode*, 128> DeadNodes; 519 520 // Add all obviously-dead nodes to the DeadNodes worklist. 521 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 522 if (I->use_empty()) 523 DeadNodes.push_back(I); 524 525 RemoveDeadNodes(DeadNodes); 526 527 // If the root changed (e.g. it was a dead load, update the root). 528 setRoot(Dummy.getValue()); 529} 530 531/// RemoveDeadNodes - This method deletes the unreachable nodes in the 532/// given list, and any nodes that become unreachable as a result. 533void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 534 DAGUpdateListener *UpdateListener) { 535 536 // Process the worklist, deleting the nodes and adding their uses to the 537 // worklist. 538 while (!DeadNodes.empty()) { 539 SDNode *N = DeadNodes.pop_back_val(); 540 541 if (UpdateListener) 542 UpdateListener->NodeDeleted(N, 0); 543 544 // Take the node out of the appropriate CSE map. 545 RemoveNodeFromCSEMaps(N); 546 547 // Next, brutally remove the operand list. This is safe to do, as there are 548 // no cycles in the graph. 549 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 550 SDUse &Use = *I++; 551 SDNode *Operand = Use.getNode(); 552 Use.set(SDValue()); 553 554 // Now that we removed this operand, see if there are no uses of it left. 555 if (Operand->use_empty()) 556 DeadNodes.push_back(Operand); 557 } 558 559 DeallocateNode(N); 560 } 561} 562 563void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 564 SmallVector<SDNode*, 16> DeadNodes(1, N); 565 RemoveDeadNodes(DeadNodes, UpdateListener); 566} 567 568void SelectionDAG::DeleteNode(SDNode *N) { 569 // First take this out of the appropriate CSE map. 570 RemoveNodeFromCSEMaps(N); 571 572 // Finally, remove uses due to operands of this node, remove from the 573 // AllNodes list, and delete the node. 574 DeleteNodeNotInCSEMaps(N); 575} 576 577void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 578 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 579 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 580 581 // Drop all of the operands and decrement used node's use counts. 582 N->DropOperands(); 583 584 DeallocateNode(N); 585} 586 587void SelectionDAG::DeallocateNode(SDNode *N) { 588 if (N->OperandsNeedDelete) 589 delete[] N->OperandList; 590 591 // Set the opcode to DELETED_NODE to help catch bugs when node 592 // memory is reallocated. 593 N->NodeType = ISD::DELETED_NODE; 594 595 NodeAllocator.Deallocate(AllNodes.remove(N)); 596 597 // Remove the ordering of this node. 598 Ordering->remove(N); 599} 600 601/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 602/// correspond to it. This is useful when we're about to delete or repurpose 603/// the node. We don't want future request for structurally identical nodes 604/// to return N anymore. 605bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 606 bool Erased = false; 607 switch (N->getOpcode()) { 608 case ISD::EntryToken: 609 llvm_unreachable("EntryToken should not be in CSEMaps!"); 610 return false; 611 case ISD::HANDLENODE: return false; // noop. 612 case ISD::CONDCODE: 613 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 614 "Cond code doesn't exist!"); 615 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 616 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 617 break; 618 case ISD::ExternalSymbol: 619 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 620 break; 621 case ISD::TargetExternalSymbol: { 622 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 623 Erased = TargetExternalSymbols.erase( 624 std::pair<std::string,unsigned char>(ESN->getSymbol(), 625 ESN->getTargetFlags())); 626 break; 627 } 628 case ISD::VALUETYPE: { 629 EVT VT = cast<VTSDNode>(N)->getVT(); 630 if (VT.isExtended()) { 631 Erased = ExtendedValueTypeNodes.erase(VT); 632 } else { 633 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 634 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 635 } 636 break; 637 } 638 default: 639 // Remove it from the CSE Map. 640 Erased = CSEMap.RemoveNode(N); 641 break; 642 } 643#ifndef NDEBUG 644 // Verify that the node was actually in one of the CSE maps, unless it has a 645 // flag result (which cannot be CSE'd) or is one of the special cases that are 646 // not subject to CSE. 647 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 648 !N->isMachineOpcode() && !doNotCSE(N)) { 649 N->dump(this); 650 dbgs() << "\n"; 651 llvm_unreachable("Node is not in map!"); 652 } 653#endif 654 return Erased; 655} 656 657/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 658/// maps and modified in place. Add it back to the CSE maps, unless an identical 659/// node already exists, in which case transfer all its users to the existing 660/// node. This transfer can potentially trigger recursive merging. 661/// 662void 663SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 664 DAGUpdateListener *UpdateListener) { 665 // For node types that aren't CSE'd, just act as if no identical node 666 // already exists. 667 if (!doNotCSE(N)) { 668 SDNode *Existing = CSEMap.GetOrInsertNode(N); 669 if (Existing != N) { 670 // If there was already an existing matching node, use ReplaceAllUsesWith 671 // to replace the dead one with the existing one. This can cause 672 // recursive merging of other unrelated nodes down the line. 673 ReplaceAllUsesWith(N, Existing, UpdateListener); 674 675 // N is now dead. Inform the listener if it exists and delete it. 676 if (UpdateListener) 677 UpdateListener->NodeDeleted(N, Existing); 678 DeleteNodeNotInCSEMaps(N); 679 return; 680 } 681 } 682 683 // If the node doesn't already exist, we updated it. Inform a listener if 684 // it exists. 685 if (UpdateListener) 686 UpdateListener->NodeUpdated(N); 687} 688 689/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 690/// were replaced with those specified. If this node is never memoized, 691/// return null, otherwise return a pointer to the slot it would take. If a 692/// node already exists with these operands, the slot will be non-null. 693SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 694 void *&InsertPos) { 695 if (doNotCSE(N)) 696 return 0; 697 698 SDValue Ops[] = { Op }; 699 FoldingSetNodeID ID; 700 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 701 AddNodeIDCustom(ID, N); 702 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 703 return Node; 704} 705 706/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 707/// were replaced with those specified. If this node is never memoized, 708/// return null, otherwise return a pointer to the slot it would take. If a 709/// node already exists with these operands, the slot will be non-null. 710SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 711 SDValue Op1, SDValue Op2, 712 void *&InsertPos) { 713 if (doNotCSE(N)) 714 return 0; 715 716 SDValue Ops[] = { Op1, Op2 }; 717 FoldingSetNodeID ID; 718 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 719 AddNodeIDCustom(ID, N); 720 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 721 return Node; 722} 723 724 725/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 726/// were replaced with those specified. If this node is never memoized, 727/// return null, otherwise return a pointer to the slot it would take. If a 728/// node already exists with these operands, the slot will be non-null. 729SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 730 const SDValue *Ops,unsigned NumOps, 731 void *&InsertPos) { 732 if (doNotCSE(N)) 733 return 0; 734 735 FoldingSetNodeID ID; 736 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 737 AddNodeIDCustom(ID, N); 738 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 739 return Node; 740} 741 742/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 743void SelectionDAG::VerifyNode(SDNode *N) { 744 switch (N->getOpcode()) { 745 default: 746 break; 747 case ISD::BUILD_PAIR: { 748 EVT VT = N->getValueType(0); 749 assert(N->getNumValues() == 1 && "Too many results!"); 750 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 751 "Wrong return type!"); 752 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 753 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 754 "Mismatched operand types!"); 755 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 756 "Wrong operand type!"); 757 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 758 "Wrong return type size"); 759 break; 760 } 761 case ISD::BUILD_VECTOR: { 762 assert(N->getNumValues() == 1 && "Too many results!"); 763 assert(N->getValueType(0).isVector() && "Wrong return type!"); 764 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 765 "Wrong number of operands!"); 766 EVT EltVT = N->getValueType(0).getVectorElementType(); 767 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 768 assert((I->getValueType() == EltVT || 769 (EltVT.isInteger() && I->getValueType().isInteger() && 770 EltVT.bitsLE(I->getValueType()))) && 771 "Wrong operand type!"); 772 break; 773 } 774 } 775} 776 777/// getEVTAlignment - Compute the default alignment value for the 778/// given type. 779/// 780unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 781 const Type *Ty = VT == MVT::iPTR ? 782 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 783 VT.getTypeForEVT(*getContext()); 784 785 return TLI.getTargetData()->getABITypeAlignment(Ty); 786} 787 788// EntryNode could meaningfully have debug info if we can find it... 789SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 790 : TLI(tli), FLI(fli), DW(0), 791 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(), 792 getVTList(MVT::Other)), 793 Root(getEntryNode()), Ordering(0) { 794 AllNodes.push_back(&EntryNode); 795 Ordering = new SDNodeOrdering(); 796} 797 798void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 799 DwarfWriter *dw) { 800 MF = &mf; 801 MMI = mmi; 802 DW = dw; 803 Context = &mf.getFunction()->getContext(); 804} 805 806SelectionDAG::~SelectionDAG() { 807 allnodes_clear(); 808 delete Ordering; 809} 810 811void SelectionDAG::allnodes_clear() { 812 assert(&*AllNodes.begin() == &EntryNode); 813 AllNodes.remove(AllNodes.begin()); 814 while (!AllNodes.empty()) 815 DeallocateNode(AllNodes.begin()); 816} 817 818void SelectionDAG::clear() { 819 allnodes_clear(); 820 OperandAllocator.Reset(); 821 CSEMap.clear(); 822 823 ExtendedValueTypeNodes.clear(); 824 ExternalSymbols.clear(); 825 TargetExternalSymbols.clear(); 826 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 827 static_cast<CondCodeSDNode*>(0)); 828 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 829 static_cast<SDNode*>(0)); 830 831 EntryNode.UseList = 0; 832 AllNodes.push_back(&EntryNode); 833 Root = getEntryNode(); 834 delete Ordering; 835 Ordering = new SDNodeOrdering(); 836} 837 838SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 839 return VT.bitsGT(Op.getValueType()) ? 840 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 841 getNode(ISD::TRUNCATE, DL, VT, Op); 842} 843 844SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 845 return VT.bitsGT(Op.getValueType()) ? 846 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 847 getNode(ISD::TRUNCATE, DL, VT, Op); 848} 849 850SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 851 assert(!VT.isVector() && 852 "getZeroExtendInReg should use the vector element type instead of " 853 "the vector type!"); 854 if (Op.getValueType() == VT) return Op; 855 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 856 APInt Imm = APInt::getLowBitsSet(BitWidth, 857 VT.getSizeInBits()); 858 return getNode(ISD::AND, DL, Op.getValueType(), Op, 859 getConstant(Imm, Op.getValueType())); 860} 861 862/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 863/// 864SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 865 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 866 SDValue NegOne = 867 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 868 return getNode(ISD::XOR, DL, VT, Val, NegOne); 869} 870 871SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 872 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 873 assert((EltVT.getSizeInBits() >= 64 || 874 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 875 "getConstant with a uint64_t value that doesn't fit in the type!"); 876 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 877} 878 879SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 880 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 881} 882 883SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 884 assert(VT.isInteger() && "Cannot create FP integer constant!"); 885 886 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 887 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 888 "APInt size does not match type size!"); 889 890 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 891 FoldingSetNodeID ID; 892 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 893 ID.AddPointer(&Val); 894 void *IP = 0; 895 SDNode *N = NULL; 896 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 897 if (!VT.isVector()) 898 return SDValue(N, 0); 899 900 if (!N) { 901 N = NodeAllocator.Allocate<ConstantSDNode>(); 902 new (N) ConstantSDNode(isT, &Val, EltVT); 903 CSEMap.InsertNode(N, IP); 904 AllNodes.push_back(N); 905 } 906 907 SDValue Result(N, 0); 908 if (VT.isVector()) { 909 SmallVector<SDValue, 8> Ops; 910 Ops.assign(VT.getVectorNumElements(), Result); 911 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 912 VT, &Ops[0], Ops.size()); 913 } 914 return Result; 915} 916 917SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 918 return getConstant(Val, TLI.getPointerTy(), isTarget); 919} 920 921 922SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 923 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 924} 925 926SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 927 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 928 929 EVT EltVT = 930 VT.isVector() ? VT.getVectorElementType() : VT; 931 932 // Do the map lookup using the actual bit pattern for the floating point 933 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 934 // we don't have issues with SNANs. 935 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 936 FoldingSetNodeID ID; 937 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 938 ID.AddPointer(&V); 939 void *IP = 0; 940 SDNode *N = NULL; 941 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 942 if (!VT.isVector()) 943 return SDValue(N, 0); 944 945 if (!N) { 946 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 947 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 948 CSEMap.InsertNode(N, IP); 949 AllNodes.push_back(N); 950 } 951 952 SDValue Result(N, 0); 953 if (VT.isVector()) { 954 SmallVector<SDValue, 8> Ops; 955 Ops.assign(VT.getVectorNumElements(), Result); 956 // FIXME DebugLoc info might be appropriate here 957 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 958 VT, &Ops[0], Ops.size()); 959 } 960 return Result; 961} 962 963SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 964 EVT EltVT = 965 VT.isVector() ? VT.getVectorElementType() : VT; 966 if (EltVT==MVT::f32) 967 return getConstantFP(APFloat((float)Val), VT, isTarget); 968 else 969 return getConstantFP(APFloat(Val), VT, isTarget); 970} 971 972SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 973 EVT VT, int64_t Offset, 974 bool isTargetGA, 975 unsigned char TargetFlags) { 976 assert((TargetFlags == 0 || isTargetGA) && 977 "Cannot set target flags on target-independent globals"); 978 979 // Truncate (with sign-extension) the offset value to the pointer size. 980 EVT PTy = TLI.getPointerTy(); 981 unsigned BitWidth = PTy.getSizeInBits(); 982 if (BitWidth < 64) 983 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 984 985 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 986 if (!GVar) { 987 // If GV is an alias then use the aliasee for determining thread-localness. 988 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 989 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 990 } 991 992 unsigned Opc; 993 if (GVar && GVar->isThreadLocal()) 994 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 995 else 996 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 997 998 FoldingSetNodeID ID; 999 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1000 ID.AddPointer(GV); 1001 ID.AddInteger(Offset); 1002 ID.AddInteger(TargetFlags); 1003 void *IP = 0; 1004 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1005 return SDValue(E, 0); 1006 1007 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 1008 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags); 1009 CSEMap.InsertNode(N, IP); 1010 AllNodes.push_back(N); 1011 return SDValue(N, 0); 1012} 1013 1014SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1015 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1016 FoldingSetNodeID ID; 1017 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1018 ID.AddInteger(FI); 1019 void *IP = 0; 1020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1021 return SDValue(E, 0); 1022 1023 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1024 new (N) FrameIndexSDNode(FI, VT, isTarget); 1025 CSEMap.InsertNode(N, IP); 1026 AllNodes.push_back(N); 1027 return SDValue(N, 0); 1028} 1029 1030SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1031 unsigned char TargetFlags) { 1032 assert((TargetFlags == 0 || isTarget) && 1033 "Cannot set target flags on target-independent jump tables"); 1034 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1035 FoldingSetNodeID ID; 1036 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1037 ID.AddInteger(JTI); 1038 ID.AddInteger(TargetFlags); 1039 void *IP = 0; 1040 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1041 return SDValue(E, 0); 1042 1043 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1044 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags); 1045 CSEMap.InsertNode(N, IP); 1046 AllNodes.push_back(N); 1047 return SDValue(N, 0); 1048} 1049 1050SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1051 unsigned Alignment, int Offset, 1052 bool isTarget, 1053 unsigned char TargetFlags) { 1054 assert((TargetFlags == 0 || isTarget) && 1055 "Cannot set target flags on target-independent globals"); 1056 if (Alignment == 0) 1057 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1058 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1059 FoldingSetNodeID ID; 1060 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1061 ID.AddInteger(Alignment); 1062 ID.AddInteger(Offset); 1063 ID.AddPointer(C); 1064 ID.AddInteger(TargetFlags); 1065 void *IP = 0; 1066 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1067 return SDValue(E, 0); 1068 1069 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1070 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1071 CSEMap.InsertNode(N, IP); 1072 AllNodes.push_back(N); 1073 return SDValue(N, 0); 1074} 1075 1076 1077SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1078 unsigned Alignment, int Offset, 1079 bool isTarget, 1080 unsigned char TargetFlags) { 1081 assert((TargetFlags == 0 || isTarget) && 1082 "Cannot set target flags on target-independent globals"); 1083 if (Alignment == 0) 1084 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1085 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1086 FoldingSetNodeID ID; 1087 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1088 ID.AddInteger(Alignment); 1089 ID.AddInteger(Offset); 1090 C->AddSelectionDAGCSEId(ID); 1091 ID.AddInteger(TargetFlags); 1092 void *IP = 0; 1093 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1094 return SDValue(E, 0); 1095 1096 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1097 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1098 CSEMap.InsertNode(N, IP); 1099 AllNodes.push_back(N); 1100 return SDValue(N, 0); 1101} 1102 1103SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1104 FoldingSetNodeID ID; 1105 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1106 ID.AddPointer(MBB); 1107 void *IP = 0; 1108 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1109 return SDValue(E, 0); 1110 1111 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1112 new (N) BasicBlockSDNode(MBB); 1113 CSEMap.InsertNode(N, IP); 1114 AllNodes.push_back(N); 1115 return SDValue(N, 0); 1116} 1117 1118SDValue SelectionDAG::getValueType(EVT VT) { 1119 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1120 ValueTypeNodes.size()) 1121 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1122 1123 SDNode *&N = VT.isExtended() ? 1124 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1125 1126 if (N) return SDValue(N, 0); 1127 N = NodeAllocator.Allocate<VTSDNode>(); 1128 new (N) VTSDNode(VT); 1129 AllNodes.push_back(N); 1130 return SDValue(N, 0); 1131} 1132 1133SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1134 SDNode *&N = ExternalSymbols[Sym]; 1135 if (N) return SDValue(N, 0); 1136 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1137 new (N) ExternalSymbolSDNode(false, Sym, 0, VT); 1138 AllNodes.push_back(N); 1139 return SDValue(N, 0); 1140} 1141 1142SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1143 unsigned char TargetFlags) { 1144 SDNode *&N = 1145 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1146 TargetFlags)]; 1147 if (N) return SDValue(N, 0); 1148 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1149 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1150 AllNodes.push_back(N); 1151 return SDValue(N, 0); 1152} 1153 1154SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1155 if ((unsigned)Cond >= CondCodeNodes.size()) 1156 CondCodeNodes.resize(Cond+1); 1157 1158 if (CondCodeNodes[Cond] == 0) { 1159 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1160 new (N) CondCodeSDNode(Cond); 1161 CondCodeNodes[Cond] = N; 1162 AllNodes.push_back(N); 1163 } 1164 1165 return SDValue(CondCodeNodes[Cond], 0); 1166} 1167 1168// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1169// the shuffle mask M that point at N1 to point at N2, and indices that point 1170// N2 to point at N1. 1171static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1172 std::swap(N1, N2); 1173 int NElts = M.size(); 1174 for (int i = 0; i != NElts; ++i) { 1175 if (M[i] >= NElts) 1176 M[i] -= NElts; 1177 else if (M[i] >= 0) 1178 M[i] += NElts; 1179 } 1180} 1181 1182SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1183 SDValue N2, const int *Mask) { 1184 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1185 assert(VT.isVector() && N1.getValueType().isVector() && 1186 "Vector Shuffle VTs must be a vectors"); 1187 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1188 && "Vector Shuffle VTs must have same element type"); 1189 1190 // Canonicalize shuffle undef, undef -> undef 1191 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1192 return getUNDEF(VT); 1193 1194 // Validate that all indices in Mask are within the range of the elements 1195 // input to the shuffle. 1196 unsigned NElts = VT.getVectorNumElements(); 1197 SmallVector<int, 8> MaskVec; 1198 for (unsigned i = 0; i != NElts; ++i) { 1199 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1200 MaskVec.push_back(Mask[i]); 1201 } 1202 1203 // Canonicalize shuffle v, v -> v, undef 1204 if (N1 == N2) { 1205 N2 = getUNDEF(VT); 1206 for (unsigned i = 0; i != NElts; ++i) 1207 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1208 } 1209 1210 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1211 if (N1.getOpcode() == ISD::UNDEF) 1212 commuteShuffle(N1, N2, MaskVec); 1213 1214 // Canonicalize all index into lhs, -> shuffle lhs, undef 1215 // Canonicalize all index into rhs, -> shuffle rhs, undef 1216 bool AllLHS = true, AllRHS = true; 1217 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1218 for (unsigned i = 0; i != NElts; ++i) { 1219 if (MaskVec[i] >= (int)NElts) { 1220 if (N2Undef) 1221 MaskVec[i] = -1; 1222 else 1223 AllLHS = false; 1224 } else if (MaskVec[i] >= 0) { 1225 AllRHS = false; 1226 } 1227 } 1228 if (AllLHS && AllRHS) 1229 return getUNDEF(VT); 1230 if (AllLHS && !N2Undef) 1231 N2 = getUNDEF(VT); 1232 if (AllRHS) { 1233 N1 = getUNDEF(VT); 1234 commuteShuffle(N1, N2, MaskVec); 1235 } 1236 1237 // If Identity shuffle, or all shuffle in to undef, return that node. 1238 bool AllUndef = true; 1239 bool Identity = true; 1240 for (unsigned i = 0; i != NElts; ++i) { 1241 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1242 if (MaskVec[i] >= 0) AllUndef = false; 1243 } 1244 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1245 return N1; 1246 if (AllUndef) 1247 return getUNDEF(VT); 1248 1249 FoldingSetNodeID ID; 1250 SDValue Ops[2] = { N1, N2 }; 1251 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1252 for (unsigned i = 0; i != NElts; ++i) 1253 ID.AddInteger(MaskVec[i]); 1254 1255 void* IP = 0; 1256 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1257 return SDValue(E, 0); 1258 1259 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1260 // SDNode doesn't have access to it. This memory will be "leaked" when 1261 // the node is deallocated, but recovered when the NodeAllocator is released. 1262 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1263 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1264 1265 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>(); 1266 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1267 CSEMap.InsertNode(N, IP); 1268 AllNodes.push_back(N); 1269 return SDValue(N, 0); 1270} 1271 1272SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1273 SDValue Val, SDValue DTy, 1274 SDValue STy, SDValue Rnd, SDValue Sat, 1275 ISD::CvtCode Code) { 1276 // If the src and dest types are the same and the conversion is between 1277 // integer types of the same sign or two floats, no conversion is necessary. 1278 if (DTy == STy && 1279 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1280 return Val; 1281 1282 FoldingSetNodeID ID; 1283 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1284 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1285 void* IP = 0; 1286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1287 return SDValue(E, 0); 1288 1289 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1290 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code); 1291 CSEMap.InsertNode(N, IP); 1292 AllNodes.push_back(N); 1293 return SDValue(N, 0); 1294} 1295 1296SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1297 FoldingSetNodeID ID; 1298 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1299 ID.AddInteger(RegNo); 1300 void *IP = 0; 1301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1302 return SDValue(E, 0); 1303 1304 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1305 new (N) RegisterSDNode(RegNo, VT); 1306 CSEMap.InsertNode(N, IP); 1307 AllNodes.push_back(N); 1308 return SDValue(N, 0); 1309} 1310 1311SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1312 SDValue Root, 1313 unsigned LabelID) { 1314 FoldingSetNodeID ID; 1315 SDValue Ops[] = { Root }; 1316 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1317 ID.AddInteger(LabelID); 1318 void *IP = 0; 1319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1320 return SDValue(E, 0); 1321 1322 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1323 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1324 CSEMap.InsertNode(N, IP); 1325 AllNodes.push_back(N); 1326 return SDValue(N, 0); 1327} 1328 1329SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT, 1330 bool isTarget, 1331 unsigned char TargetFlags) { 1332 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1333 1334 FoldingSetNodeID ID; 1335 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1336 ID.AddPointer(BA); 1337 ID.AddInteger(TargetFlags); 1338 void *IP = 0; 1339 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1340 return SDValue(E, 0); 1341 1342 SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>(); 1343 new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1344 CSEMap.InsertNode(N, IP); 1345 AllNodes.push_back(N); 1346 return SDValue(N, 0); 1347} 1348 1349SDValue SelectionDAG::getSrcValue(const Value *V) { 1350 assert((!V || V->getType()->isPointerTy()) && 1351 "SrcValue is not a pointer?"); 1352 1353 FoldingSetNodeID ID; 1354 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1355 ID.AddPointer(V); 1356 1357 void *IP = 0; 1358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1359 return SDValue(E, 0); 1360 1361 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1362 new (N) SrcValueSDNode(V); 1363 CSEMap.InsertNode(N, IP); 1364 AllNodes.push_back(N); 1365 return SDValue(N, 0); 1366} 1367 1368/// getShiftAmountOperand - Return the specified value casted to 1369/// the target's desired shift amount type. 1370SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1371 EVT OpTy = Op.getValueType(); 1372 MVT ShTy = TLI.getShiftAmountTy(); 1373 if (OpTy == ShTy || OpTy.isVector()) return Op; 1374 1375 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1376 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1377} 1378 1379/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1380/// specified value type. 1381SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1382 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1383 unsigned ByteSize = VT.getStoreSize(); 1384 const Type *Ty = VT.getTypeForEVT(*getContext()); 1385 unsigned StackAlign = 1386 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1387 1388 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1389 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1390} 1391 1392/// CreateStackTemporary - Create a stack temporary suitable for holding 1393/// either of the specified value types. 1394SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1395 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1396 VT2.getStoreSizeInBits())/8; 1397 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1398 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1399 const TargetData *TD = TLI.getTargetData(); 1400 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1401 TD->getPrefTypeAlignment(Ty2)); 1402 1403 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1404 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1405 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1406} 1407 1408SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1409 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1410 // These setcc operations always fold. 1411 switch (Cond) { 1412 default: break; 1413 case ISD::SETFALSE: 1414 case ISD::SETFALSE2: return getConstant(0, VT); 1415 case ISD::SETTRUE: 1416 case ISD::SETTRUE2: return getConstant(1, VT); 1417 1418 case ISD::SETOEQ: 1419 case ISD::SETOGT: 1420 case ISD::SETOGE: 1421 case ISD::SETOLT: 1422 case ISD::SETOLE: 1423 case ISD::SETONE: 1424 case ISD::SETO: 1425 case ISD::SETUO: 1426 case ISD::SETUEQ: 1427 case ISD::SETUNE: 1428 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1429 break; 1430 } 1431 1432 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1433 const APInt &C2 = N2C->getAPIntValue(); 1434 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1435 const APInt &C1 = N1C->getAPIntValue(); 1436 1437 switch (Cond) { 1438 default: llvm_unreachable("Unknown integer setcc!"); 1439 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1440 case ISD::SETNE: return getConstant(C1 != C2, VT); 1441 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1442 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1443 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1444 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1445 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1446 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1447 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1448 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1449 } 1450 } 1451 } 1452 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1453 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1454 // No compile time operations on this type yet. 1455 if (N1C->getValueType(0) == MVT::ppcf128) 1456 return SDValue(); 1457 1458 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1459 switch (Cond) { 1460 default: break; 1461 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1462 return getUNDEF(VT); 1463 // fall through 1464 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1465 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1466 return getUNDEF(VT); 1467 // fall through 1468 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1469 R==APFloat::cmpLessThan, VT); 1470 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1471 return getUNDEF(VT); 1472 // fall through 1473 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1474 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1475 return getUNDEF(VT); 1476 // fall through 1477 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1478 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1479 return getUNDEF(VT); 1480 // fall through 1481 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1482 R==APFloat::cmpEqual, VT); 1483 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1484 return getUNDEF(VT); 1485 // fall through 1486 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1487 R==APFloat::cmpEqual, VT); 1488 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1489 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1490 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1491 R==APFloat::cmpEqual, VT); 1492 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1493 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1494 R==APFloat::cmpLessThan, VT); 1495 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1496 R==APFloat::cmpUnordered, VT); 1497 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1498 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1499 } 1500 } else { 1501 // Ensure that the constant occurs on the RHS. 1502 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1503 } 1504 } 1505 1506 // Could not fold it. 1507 return SDValue(); 1508} 1509 1510/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1511/// use this predicate to simplify operations downstream. 1512bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1513 // This predicate is not safe for vector operations. 1514 if (Op.getValueType().isVector()) 1515 return false; 1516 1517 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1518 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1519} 1520 1521/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1522/// this predicate to simplify operations downstream. Mask is known to be zero 1523/// for bits that V cannot have. 1524bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1525 unsigned Depth) const { 1526 APInt KnownZero, KnownOne; 1527 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1528 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1529 return (KnownZero & Mask) == Mask; 1530} 1531 1532/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1533/// known to be either zero or one and return them in the KnownZero/KnownOne 1534/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1535/// processing. 1536void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1537 APInt &KnownZero, APInt &KnownOne, 1538 unsigned Depth) const { 1539 unsigned BitWidth = Mask.getBitWidth(); 1540 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1541 "Mask size mismatches value type size!"); 1542 1543 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1544 if (Depth == 6 || Mask == 0) 1545 return; // Limit search depth. 1546 1547 APInt KnownZero2, KnownOne2; 1548 1549 switch (Op.getOpcode()) { 1550 case ISD::Constant: 1551 // We know all of the bits for a constant! 1552 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1553 KnownZero = ~KnownOne & Mask; 1554 return; 1555 case ISD::AND: 1556 // If either the LHS or the RHS are Zero, the result is zero. 1557 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1558 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1559 KnownZero2, KnownOne2, Depth+1); 1560 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1561 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1562 1563 // Output known-1 bits are only known if set in both the LHS & RHS. 1564 KnownOne &= KnownOne2; 1565 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1566 KnownZero |= KnownZero2; 1567 return; 1568 case ISD::OR: 1569 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1570 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1571 KnownZero2, KnownOne2, Depth+1); 1572 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1573 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1574 1575 // Output known-0 bits are only known if clear in both the LHS & RHS. 1576 KnownZero &= KnownZero2; 1577 // Output known-1 are known to be set if set in either the LHS | RHS. 1578 KnownOne |= KnownOne2; 1579 return; 1580 case ISD::XOR: { 1581 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1582 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1583 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1584 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1585 1586 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1587 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1588 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1589 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1590 KnownZero = KnownZeroOut; 1591 return; 1592 } 1593 case ISD::MUL: { 1594 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1595 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1596 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1597 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1598 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1599 1600 // If low bits are zero in either operand, output low known-0 bits. 1601 // Also compute a conserative estimate for high known-0 bits. 1602 // More trickiness is possible, but this is sufficient for the 1603 // interesting case of alignment computation. 1604 KnownOne.clear(); 1605 unsigned TrailZ = KnownZero.countTrailingOnes() + 1606 KnownZero2.countTrailingOnes(); 1607 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1608 KnownZero2.countLeadingOnes(), 1609 BitWidth) - BitWidth; 1610 1611 TrailZ = std::min(TrailZ, BitWidth); 1612 LeadZ = std::min(LeadZ, BitWidth); 1613 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1614 APInt::getHighBitsSet(BitWidth, LeadZ); 1615 KnownZero &= Mask; 1616 return; 1617 } 1618 case ISD::UDIV: { 1619 // For the purposes of computing leading zeros we can conservatively 1620 // treat a udiv as a logical right shift by the power of 2 known to 1621 // be less than the denominator. 1622 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1623 ComputeMaskedBits(Op.getOperand(0), 1624 AllOnes, KnownZero2, KnownOne2, Depth+1); 1625 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1626 1627 KnownOne2.clear(); 1628 KnownZero2.clear(); 1629 ComputeMaskedBits(Op.getOperand(1), 1630 AllOnes, KnownZero2, KnownOne2, Depth+1); 1631 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1632 if (RHSUnknownLeadingOnes != BitWidth) 1633 LeadZ = std::min(BitWidth, 1634 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1635 1636 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1637 return; 1638 } 1639 case ISD::SELECT: 1640 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1641 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1642 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1643 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1644 1645 // Only known if known in both the LHS and RHS. 1646 KnownOne &= KnownOne2; 1647 KnownZero &= KnownZero2; 1648 return; 1649 case ISD::SELECT_CC: 1650 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1651 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1652 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1653 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1654 1655 // Only known if known in both the LHS and RHS. 1656 KnownOne &= KnownOne2; 1657 KnownZero &= KnownZero2; 1658 return; 1659 case ISD::SADDO: 1660 case ISD::UADDO: 1661 case ISD::SSUBO: 1662 case ISD::USUBO: 1663 case ISD::SMULO: 1664 case ISD::UMULO: 1665 if (Op.getResNo() != 1) 1666 return; 1667 // The boolean result conforms to getBooleanContents. Fall through. 1668 case ISD::SETCC: 1669 // If we know the result of a setcc has the top bits zero, use this info. 1670 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1671 BitWidth > 1) 1672 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1673 return; 1674 case ISD::SHL: 1675 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1676 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1677 unsigned ShAmt = SA->getZExtValue(); 1678 1679 // If the shift count is an invalid immediate, don't do anything. 1680 if (ShAmt >= BitWidth) 1681 return; 1682 1683 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1684 KnownZero, KnownOne, Depth+1); 1685 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1686 KnownZero <<= ShAmt; 1687 KnownOne <<= ShAmt; 1688 // low bits known zero. 1689 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1690 } 1691 return; 1692 case ISD::SRL: 1693 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1694 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1695 unsigned ShAmt = SA->getZExtValue(); 1696 1697 // If the shift count is an invalid immediate, don't do anything. 1698 if (ShAmt >= BitWidth) 1699 return; 1700 1701 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1702 KnownZero, KnownOne, Depth+1); 1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1704 KnownZero = KnownZero.lshr(ShAmt); 1705 KnownOne = KnownOne.lshr(ShAmt); 1706 1707 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1708 KnownZero |= HighBits; // High bits known zero. 1709 } 1710 return; 1711 case ISD::SRA: 1712 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1713 unsigned ShAmt = SA->getZExtValue(); 1714 1715 // If the shift count is an invalid immediate, don't do anything. 1716 if (ShAmt >= BitWidth) 1717 return; 1718 1719 APInt InDemandedMask = (Mask << ShAmt); 1720 // If any of the demanded bits are produced by the sign extension, we also 1721 // demand the input sign bit. 1722 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1723 if (HighBits.getBoolValue()) 1724 InDemandedMask |= APInt::getSignBit(BitWidth); 1725 1726 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1727 Depth+1); 1728 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1729 KnownZero = KnownZero.lshr(ShAmt); 1730 KnownOne = KnownOne.lshr(ShAmt); 1731 1732 // Handle the sign bits. 1733 APInt SignBit = APInt::getSignBit(BitWidth); 1734 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1735 1736 if (KnownZero.intersects(SignBit)) { 1737 KnownZero |= HighBits; // New bits are known zero. 1738 } else if (KnownOne.intersects(SignBit)) { 1739 KnownOne |= HighBits; // New bits are known one. 1740 } 1741 } 1742 return; 1743 case ISD::SIGN_EXTEND_INREG: { 1744 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1745 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1746 1747 // Sign extension. Compute the demanded bits in the result that are not 1748 // present in the input. 1749 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1750 1751 APInt InSignBit = APInt::getSignBit(EBits); 1752 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1753 1754 // If the sign extended bits are demanded, we know that the sign 1755 // bit is demanded. 1756 InSignBit.zext(BitWidth); 1757 if (NewBits.getBoolValue()) 1758 InputDemandedBits |= InSignBit; 1759 1760 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1761 KnownZero, KnownOne, Depth+1); 1762 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1763 1764 // If the sign bit of the input is known set or clear, then we know the 1765 // top bits of the result. 1766 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1767 KnownZero |= NewBits; 1768 KnownOne &= ~NewBits; 1769 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1770 KnownOne |= NewBits; 1771 KnownZero &= ~NewBits; 1772 } else { // Input sign bit unknown 1773 KnownZero &= ~NewBits; 1774 KnownOne &= ~NewBits; 1775 } 1776 return; 1777 } 1778 case ISD::CTTZ: 1779 case ISD::CTLZ: 1780 case ISD::CTPOP: { 1781 unsigned LowBits = Log2_32(BitWidth)+1; 1782 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1783 KnownOne.clear(); 1784 return; 1785 } 1786 case ISD::LOAD: { 1787 if (ISD::isZEXTLoad(Op.getNode())) { 1788 LoadSDNode *LD = cast<LoadSDNode>(Op); 1789 EVT VT = LD->getMemoryVT(); 1790 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1791 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1792 } 1793 return; 1794 } 1795 case ISD::ZERO_EXTEND: { 1796 EVT InVT = Op.getOperand(0).getValueType(); 1797 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1798 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1799 APInt InMask = Mask; 1800 InMask.trunc(InBits); 1801 KnownZero.trunc(InBits); 1802 KnownOne.trunc(InBits); 1803 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1804 KnownZero.zext(BitWidth); 1805 KnownOne.zext(BitWidth); 1806 KnownZero |= NewBits; 1807 return; 1808 } 1809 case ISD::SIGN_EXTEND: { 1810 EVT InVT = Op.getOperand(0).getValueType(); 1811 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1812 APInt InSignBit = APInt::getSignBit(InBits); 1813 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1814 APInt InMask = Mask; 1815 InMask.trunc(InBits); 1816 1817 // If any of the sign extended bits are demanded, we know that the sign 1818 // bit is demanded. Temporarily set this bit in the mask for our callee. 1819 if (NewBits.getBoolValue()) 1820 InMask |= InSignBit; 1821 1822 KnownZero.trunc(InBits); 1823 KnownOne.trunc(InBits); 1824 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1825 1826 // Note if the sign bit is known to be zero or one. 1827 bool SignBitKnownZero = KnownZero.isNegative(); 1828 bool SignBitKnownOne = KnownOne.isNegative(); 1829 assert(!(SignBitKnownZero && SignBitKnownOne) && 1830 "Sign bit can't be known to be both zero and one!"); 1831 1832 // If the sign bit wasn't actually demanded by our caller, we don't 1833 // want it set in the KnownZero and KnownOne result values. Reset the 1834 // mask and reapply it to the result values. 1835 InMask = Mask; 1836 InMask.trunc(InBits); 1837 KnownZero &= InMask; 1838 KnownOne &= InMask; 1839 1840 KnownZero.zext(BitWidth); 1841 KnownOne.zext(BitWidth); 1842 1843 // If the sign bit is known zero or one, the top bits match. 1844 if (SignBitKnownZero) 1845 KnownZero |= NewBits; 1846 else if (SignBitKnownOne) 1847 KnownOne |= NewBits; 1848 return; 1849 } 1850 case ISD::ANY_EXTEND: { 1851 EVT InVT = Op.getOperand(0).getValueType(); 1852 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1853 APInt InMask = Mask; 1854 InMask.trunc(InBits); 1855 KnownZero.trunc(InBits); 1856 KnownOne.trunc(InBits); 1857 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1858 KnownZero.zext(BitWidth); 1859 KnownOne.zext(BitWidth); 1860 return; 1861 } 1862 case ISD::TRUNCATE: { 1863 EVT InVT = Op.getOperand(0).getValueType(); 1864 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1865 APInt InMask = Mask; 1866 InMask.zext(InBits); 1867 KnownZero.zext(InBits); 1868 KnownOne.zext(InBits); 1869 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1870 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1871 KnownZero.trunc(BitWidth); 1872 KnownOne.trunc(BitWidth); 1873 break; 1874 } 1875 case ISD::AssertZext: { 1876 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1877 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1878 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1879 KnownOne, Depth+1); 1880 KnownZero |= (~InMask) & Mask; 1881 return; 1882 } 1883 case ISD::FGETSIGN: 1884 // All bits are zero except the low bit. 1885 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1886 return; 1887 1888 case ISD::SUB: { 1889 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1890 // We know that the top bits of C-X are clear if X contains less bits 1891 // than C (i.e. no wrap-around can happen). For example, 20-X is 1892 // positive if we can prove that X is >= 0 and < 16. 1893 if (CLHS->getAPIntValue().isNonNegative()) { 1894 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1895 // NLZ can't be BitWidth with no sign bit 1896 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1897 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1898 Depth+1); 1899 1900 // If all of the MaskV bits are known to be zero, then we know the 1901 // output top bits are zero, because we now know that the output is 1902 // from [0-C]. 1903 if ((KnownZero2 & MaskV) == MaskV) { 1904 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1905 // Top bits known zero. 1906 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1907 } 1908 } 1909 } 1910 } 1911 // fall through 1912 case ISD::ADD: { 1913 // Output known-0 bits are known if clear or set in both the low clear bits 1914 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1915 // low 3 bits clear. 1916 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1917 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1918 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1919 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1920 1921 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1922 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1923 KnownZeroOut = std::min(KnownZeroOut, 1924 KnownZero2.countTrailingOnes()); 1925 1926 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1927 return; 1928 } 1929 case ISD::SREM: 1930 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1931 const APInt &RA = Rem->getAPIntValue().abs(); 1932 if (RA.isPowerOf2()) { 1933 APInt LowBits = RA - 1; 1934 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1935 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1936 1937 // The low bits of the first operand are unchanged by the srem. 1938 KnownZero = KnownZero2 & LowBits; 1939 KnownOne = KnownOne2 & LowBits; 1940 1941 // If the first operand is non-negative or has all low bits zero, then 1942 // the upper bits are all zero. 1943 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1944 KnownZero |= ~LowBits; 1945 1946 // If the first operand is negative and not all low bits are zero, then 1947 // the upper bits are all one. 1948 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1949 KnownOne |= ~LowBits; 1950 1951 KnownZero &= Mask; 1952 KnownOne &= Mask; 1953 1954 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1955 } 1956 } 1957 return; 1958 case ISD::UREM: { 1959 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1960 const APInt &RA = Rem->getAPIntValue(); 1961 if (RA.isPowerOf2()) { 1962 APInt LowBits = (RA - 1); 1963 APInt Mask2 = LowBits & Mask; 1964 KnownZero |= ~LowBits & Mask; 1965 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1966 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1967 break; 1968 } 1969 } 1970 1971 // Since the result is less than or equal to either operand, any leading 1972 // zero bits in either operand must also exist in the result. 1973 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1974 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1975 Depth+1); 1976 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1977 Depth+1); 1978 1979 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1980 KnownZero2.countLeadingOnes()); 1981 KnownOne.clear(); 1982 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1983 return; 1984 } 1985 default: 1986 // Allow the target to implement this method for its nodes. 1987 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1988 case ISD::INTRINSIC_WO_CHAIN: 1989 case ISD::INTRINSIC_W_CHAIN: 1990 case ISD::INTRINSIC_VOID: 1991 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1992 Depth); 1993 } 1994 return; 1995 } 1996} 1997 1998/// ComputeNumSignBits - Return the number of times the sign bit of the 1999/// register is replicated into the other bits. We know that at least 1 bit 2000/// is always equal to the sign bit (itself), but other cases can give us 2001/// information. For example, immediately after an "SRA X, 2", we know that 2002/// the top 3 bits are all equal to each other, so we return 3. 2003unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2004 EVT VT = Op.getValueType(); 2005 assert(VT.isInteger() && "Invalid VT!"); 2006 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2007 unsigned Tmp, Tmp2; 2008 unsigned FirstAnswer = 1; 2009 2010 if (Depth == 6) 2011 return 1; // Limit search depth. 2012 2013 switch (Op.getOpcode()) { 2014 default: break; 2015 case ISD::AssertSext: 2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2017 return VTBits-Tmp+1; 2018 case ISD::AssertZext: 2019 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2020 return VTBits-Tmp; 2021 2022 case ISD::Constant: { 2023 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2024 // If negative, return # leading ones. 2025 if (Val.isNegative()) 2026 return Val.countLeadingOnes(); 2027 2028 // Return # leading zeros. 2029 return Val.countLeadingZeros(); 2030 } 2031 2032 case ISD::SIGN_EXTEND: 2033 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2034 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2035 2036 case ISD::SIGN_EXTEND_INREG: 2037 // Max of the input and what this extends. 2038 Tmp = 2039 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2040 Tmp = VTBits-Tmp+1; 2041 2042 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2043 return std::max(Tmp, Tmp2); 2044 2045 case ISD::SRA: 2046 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2047 // SRA X, C -> adds C sign bits. 2048 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2049 Tmp += C->getZExtValue(); 2050 if (Tmp > VTBits) Tmp = VTBits; 2051 } 2052 return Tmp; 2053 case ISD::SHL: 2054 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2055 // shl destroys sign bits. 2056 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2057 if (C->getZExtValue() >= VTBits || // Bad shift. 2058 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2059 return Tmp - C->getZExtValue(); 2060 } 2061 break; 2062 case ISD::AND: 2063 case ISD::OR: 2064 case ISD::XOR: // NOT is handled here. 2065 // Logical binary ops preserve the number of sign bits at the worst. 2066 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2067 if (Tmp != 1) { 2068 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2069 FirstAnswer = std::min(Tmp, Tmp2); 2070 // We computed what we know about the sign bits as our first 2071 // answer. Now proceed to the generic code that uses 2072 // ComputeMaskedBits, and pick whichever answer is better. 2073 } 2074 break; 2075 2076 case ISD::SELECT: 2077 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2078 if (Tmp == 1) return 1; // Early out. 2079 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2080 return std::min(Tmp, Tmp2); 2081 2082 case ISD::SADDO: 2083 case ISD::UADDO: 2084 case ISD::SSUBO: 2085 case ISD::USUBO: 2086 case ISD::SMULO: 2087 case ISD::UMULO: 2088 if (Op.getResNo() != 1) 2089 break; 2090 // The boolean result conforms to getBooleanContents. Fall through. 2091 case ISD::SETCC: 2092 // If setcc returns 0/-1, all bits are sign bits. 2093 if (TLI.getBooleanContents() == 2094 TargetLowering::ZeroOrNegativeOneBooleanContent) 2095 return VTBits; 2096 break; 2097 case ISD::ROTL: 2098 case ISD::ROTR: 2099 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2100 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2101 2102 // Handle rotate right by N like a rotate left by 32-N. 2103 if (Op.getOpcode() == ISD::ROTR) 2104 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2105 2106 // If we aren't rotating out all of the known-in sign bits, return the 2107 // number that are left. This handles rotl(sext(x), 1) for example. 2108 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2109 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2110 } 2111 break; 2112 case ISD::ADD: 2113 // Add can have at most one carry bit. Thus we know that the output 2114 // is, at worst, one more bit than the inputs. 2115 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2116 if (Tmp == 1) return 1; // Early out. 2117 2118 // Special case decrementing a value (ADD X, -1): 2119 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2120 if (CRHS->isAllOnesValue()) { 2121 APInt KnownZero, KnownOne; 2122 APInt Mask = APInt::getAllOnesValue(VTBits); 2123 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2124 2125 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2126 // sign bits set. 2127 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2128 return VTBits; 2129 2130 // If we are subtracting one from a positive number, there is no carry 2131 // out of the result. 2132 if (KnownZero.isNegative()) 2133 return Tmp; 2134 } 2135 2136 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2137 if (Tmp2 == 1) return 1; 2138 return std::min(Tmp, Tmp2)-1; 2139 break; 2140 2141 case ISD::SUB: 2142 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2143 if (Tmp2 == 1) return 1; 2144 2145 // Handle NEG. 2146 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2147 if (CLHS->isNullValue()) { 2148 APInt KnownZero, KnownOne; 2149 APInt Mask = APInt::getAllOnesValue(VTBits); 2150 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2151 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2152 // sign bits set. 2153 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2154 return VTBits; 2155 2156 // If the input is known to be positive (the sign bit is known clear), 2157 // the output of the NEG has the same number of sign bits as the input. 2158 if (KnownZero.isNegative()) 2159 return Tmp2; 2160 2161 // Otherwise, we treat this like a SUB. 2162 } 2163 2164 // Sub can have at most one carry bit. Thus we know that the output 2165 // is, at worst, one more bit than the inputs. 2166 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2167 if (Tmp == 1) return 1; // Early out. 2168 return std::min(Tmp, Tmp2)-1; 2169 break; 2170 case ISD::TRUNCATE: 2171 // FIXME: it's tricky to do anything useful for this, but it is an important 2172 // case for targets like X86. 2173 break; 2174 } 2175 2176 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2177 if (Op.getOpcode() == ISD::LOAD) { 2178 LoadSDNode *LD = cast<LoadSDNode>(Op); 2179 unsigned ExtType = LD->getExtensionType(); 2180 switch (ExtType) { 2181 default: break; 2182 case ISD::SEXTLOAD: // '17' bits known 2183 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2184 return VTBits-Tmp+1; 2185 case ISD::ZEXTLOAD: // '16' bits known 2186 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2187 return VTBits-Tmp; 2188 } 2189 } 2190 2191 // Allow the target to implement this method for its nodes. 2192 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2193 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2194 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2195 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2196 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2197 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2198 } 2199 2200 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2201 // use this information. 2202 APInt KnownZero, KnownOne; 2203 APInt Mask = APInt::getAllOnesValue(VTBits); 2204 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2205 2206 if (KnownZero.isNegative()) { // sign bit is 0 2207 Mask = KnownZero; 2208 } else if (KnownOne.isNegative()) { // sign bit is 1; 2209 Mask = KnownOne; 2210 } else { 2211 // Nothing known. 2212 return FirstAnswer; 2213 } 2214 2215 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2216 // the number of identical bits in the top of the input value. 2217 Mask = ~Mask; 2218 Mask <<= Mask.getBitWidth()-VTBits; 2219 // Return # leading zeros. We use 'min' here in case Val was zero before 2220 // shifting. We don't want to return '64' as for an i32 "0". 2221 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2222} 2223 2224bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2225 // If we're told that NaNs won't happen, assume they won't. 2226 if (FiniteOnlyFPMath()) 2227 return true; 2228 2229 // If the value is a constant, we can obviously see if it is a NaN or not. 2230 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2231 return !C->getValueAPF().isNaN(); 2232 2233 // TODO: Recognize more cases here. 2234 2235 return false; 2236} 2237 2238bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2239 // If the value is a constant, we can obviously see if it is a zero or not. 2240 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2241 return !C->isZero(); 2242 2243 // TODO: Recognize more cases here. 2244 2245 return false; 2246} 2247 2248bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2249 // Check the obvious case. 2250 if (A == B) return true; 2251 2252 // For for negative and positive zero. 2253 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2254 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2255 if (CA->isZero() && CB->isZero()) return true; 2256 2257 // Otherwise they may not be equal. 2258 return false; 2259} 2260 2261bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2262 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2263 if (!GA) return false; 2264 if (GA->getOffset() != 0) return false; 2265 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2266 if (!GV) return false; 2267 MachineModuleInfo *MMI = getMachineModuleInfo(); 2268 return MMI && MMI->hasDebugInfo(); 2269} 2270 2271 2272/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2273/// element of the result of the vector shuffle. 2274SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2275 unsigned i) { 2276 EVT VT = N->getValueType(0); 2277 DebugLoc dl = N->getDebugLoc(); 2278 if (N->getMaskElt(i) < 0) 2279 return getUNDEF(VT.getVectorElementType()); 2280 unsigned Index = N->getMaskElt(i); 2281 unsigned NumElems = VT.getVectorNumElements(); 2282 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2283 Index %= NumElems; 2284 2285 if (V.getOpcode() == ISD::BIT_CONVERT) { 2286 V = V.getOperand(0); 2287 EVT VVT = V.getValueType(); 2288 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2289 return SDValue(); 2290 } 2291 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2292 return (Index == 0) ? V.getOperand(0) 2293 : getUNDEF(VT.getVectorElementType()); 2294 if (V.getOpcode() == ISD::BUILD_VECTOR) 2295 return V.getOperand(Index); 2296 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2297 return getShuffleScalarElt(SVN, Index); 2298 return SDValue(); 2299} 2300 2301 2302/// getNode - Gets or creates the specified node. 2303/// 2304SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2305 FoldingSetNodeID ID; 2306 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2307 void *IP = 0; 2308 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2309 return SDValue(E, 0); 2310 2311 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2312 new (N) SDNode(Opcode, DL, getVTList(VT)); 2313 CSEMap.InsertNode(N, IP); 2314 2315 AllNodes.push_back(N); 2316#ifndef NDEBUG 2317 VerifyNode(N); 2318#endif 2319 return SDValue(N, 0); 2320} 2321 2322SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2323 EVT VT, SDValue Operand) { 2324 // Constant fold unary operations with an integer constant operand. 2325 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2326 const APInt &Val = C->getAPIntValue(); 2327 unsigned BitWidth = VT.getSizeInBits(); 2328 switch (Opcode) { 2329 default: break; 2330 case ISD::SIGN_EXTEND: 2331 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2332 case ISD::ANY_EXTEND: 2333 case ISD::ZERO_EXTEND: 2334 case ISD::TRUNCATE: 2335 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2336 case ISD::UINT_TO_FP: 2337 case ISD::SINT_TO_FP: { 2338 const uint64_t zero[] = {0, 0}; 2339 // No compile time operations on this type. 2340 if (VT==MVT::ppcf128) 2341 break; 2342 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2343 (void)apf.convertFromAPInt(Val, 2344 Opcode==ISD::SINT_TO_FP, 2345 APFloat::rmNearestTiesToEven); 2346 return getConstantFP(apf, VT); 2347 } 2348 case ISD::BIT_CONVERT: 2349 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2350 return getConstantFP(Val.bitsToFloat(), VT); 2351 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2352 return getConstantFP(Val.bitsToDouble(), VT); 2353 break; 2354 case ISD::BSWAP: 2355 return getConstant(Val.byteSwap(), VT); 2356 case ISD::CTPOP: 2357 return getConstant(Val.countPopulation(), VT); 2358 case ISD::CTLZ: 2359 return getConstant(Val.countLeadingZeros(), VT); 2360 case ISD::CTTZ: 2361 return getConstant(Val.countTrailingZeros(), VT); 2362 } 2363 } 2364 2365 // Constant fold unary operations with a floating point constant operand. 2366 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2367 APFloat V = C->getValueAPF(); // make copy 2368 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2369 switch (Opcode) { 2370 case ISD::FNEG: 2371 V.changeSign(); 2372 return getConstantFP(V, VT); 2373 case ISD::FABS: 2374 V.clearSign(); 2375 return getConstantFP(V, VT); 2376 case ISD::FP_ROUND: 2377 case ISD::FP_EXTEND: { 2378 bool ignored; 2379 // This can return overflow, underflow, or inexact; we don't care. 2380 // FIXME need to be more flexible about rounding mode. 2381 (void)V.convert(*EVTToAPFloatSemantics(VT), 2382 APFloat::rmNearestTiesToEven, &ignored); 2383 return getConstantFP(V, VT); 2384 } 2385 case ISD::FP_TO_SINT: 2386 case ISD::FP_TO_UINT: { 2387 integerPart x[2]; 2388 bool ignored; 2389 assert(integerPartWidth >= 64); 2390 // FIXME need to be more flexible about rounding mode. 2391 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2392 Opcode==ISD::FP_TO_SINT, 2393 APFloat::rmTowardZero, &ignored); 2394 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2395 break; 2396 APInt api(VT.getSizeInBits(), 2, x); 2397 return getConstant(api, VT); 2398 } 2399 case ISD::BIT_CONVERT: 2400 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2401 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2402 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2403 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2404 break; 2405 } 2406 } 2407 } 2408 2409 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2410 switch (Opcode) { 2411 case ISD::TokenFactor: 2412 case ISD::MERGE_VALUES: 2413 case ISD::CONCAT_VECTORS: 2414 return Operand; // Factor, merge or concat of one node? No need. 2415 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2416 case ISD::FP_EXTEND: 2417 assert(VT.isFloatingPoint() && 2418 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2419 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2420 assert((!VT.isVector() || 2421 VT.getVectorNumElements() == 2422 Operand.getValueType().getVectorNumElements()) && 2423 "Vector element count mismatch!"); 2424 if (Operand.getOpcode() == ISD::UNDEF) 2425 return getUNDEF(VT); 2426 break; 2427 case ISD::SIGN_EXTEND: 2428 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2429 "Invalid SIGN_EXTEND!"); 2430 if (Operand.getValueType() == VT) return Operand; // noop extension 2431 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2432 "Invalid sext node, dst < src!"); 2433 assert((!VT.isVector() || 2434 VT.getVectorNumElements() == 2435 Operand.getValueType().getVectorNumElements()) && 2436 "Vector element count mismatch!"); 2437 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2438 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2439 break; 2440 case ISD::ZERO_EXTEND: 2441 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2442 "Invalid ZERO_EXTEND!"); 2443 if (Operand.getValueType() == VT) return Operand; // noop extension 2444 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2445 "Invalid zext node, dst < src!"); 2446 assert((!VT.isVector() || 2447 VT.getVectorNumElements() == 2448 Operand.getValueType().getVectorNumElements()) && 2449 "Vector element count mismatch!"); 2450 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2451 return getNode(ISD::ZERO_EXTEND, DL, VT, 2452 Operand.getNode()->getOperand(0)); 2453 break; 2454 case ISD::ANY_EXTEND: 2455 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2456 "Invalid ANY_EXTEND!"); 2457 if (Operand.getValueType() == VT) return Operand; // noop extension 2458 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2459 "Invalid anyext node, dst < src!"); 2460 assert((!VT.isVector() || 2461 VT.getVectorNumElements() == 2462 Operand.getValueType().getVectorNumElements()) && 2463 "Vector element count mismatch!"); 2464 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2465 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2466 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2467 break; 2468 case ISD::TRUNCATE: 2469 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2470 "Invalid TRUNCATE!"); 2471 if (Operand.getValueType() == VT) return Operand; // noop truncate 2472 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2473 "Invalid truncate node, src < dst!"); 2474 assert((!VT.isVector() || 2475 VT.getVectorNumElements() == 2476 Operand.getValueType().getVectorNumElements()) && 2477 "Vector element count mismatch!"); 2478 if (OpOpcode == ISD::TRUNCATE) 2479 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2480 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2481 OpOpcode == ISD::ANY_EXTEND) { 2482 // If the source is smaller than the dest, we still need an extend. 2483 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2484 .bitsLT(VT.getScalarType())) 2485 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2486 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2487 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2488 else 2489 return Operand.getNode()->getOperand(0); 2490 } 2491 break; 2492 case ISD::BIT_CONVERT: 2493 // Basic sanity checking. 2494 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2495 && "Cannot BIT_CONVERT between types of different sizes!"); 2496 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2497 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2498 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2499 if (OpOpcode == ISD::UNDEF) 2500 return getUNDEF(VT); 2501 break; 2502 case ISD::SCALAR_TO_VECTOR: 2503 assert(VT.isVector() && !Operand.getValueType().isVector() && 2504 (VT.getVectorElementType() == Operand.getValueType() || 2505 (VT.getVectorElementType().isInteger() && 2506 Operand.getValueType().isInteger() && 2507 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2508 "Illegal SCALAR_TO_VECTOR node!"); 2509 if (OpOpcode == ISD::UNDEF) 2510 return getUNDEF(VT); 2511 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2512 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2513 isa<ConstantSDNode>(Operand.getOperand(1)) && 2514 Operand.getConstantOperandVal(1) == 0 && 2515 Operand.getOperand(0).getValueType() == VT) 2516 return Operand.getOperand(0); 2517 break; 2518 case ISD::FNEG: 2519 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2520 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2521 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2522 Operand.getNode()->getOperand(0)); 2523 if (OpOpcode == ISD::FNEG) // --X -> X 2524 return Operand.getNode()->getOperand(0); 2525 break; 2526 case ISD::FABS: 2527 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2528 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2529 break; 2530 } 2531 2532 SDNode *N; 2533 SDVTList VTs = getVTList(VT); 2534 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2535 FoldingSetNodeID ID; 2536 SDValue Ops[1] = { Operand }; 2537 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2538 void *IP = 0; 2539 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2540 return SDValue(E, 0); 2541 2542 N = NodeAllocator.Allocate<UnarySDNode>(); 2543 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2544 CSEMap.InsertNode(N, IP); 2545 } else { 2546 N = NodeAllocator.Allocate<UnarySDNode>(); 2547 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2548 } 2549 2550 AllNodes.push_back(N); 2551#ifndef NDEBUG 2552 VerifyNode(N); 2553#endif 2554 return SDValue(N, 0); 2555} 2556 2557SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2558 EVT VT, 2559 ConstantSDNode *Cst1, 2560 ConstantSDNode *Cst2) { 2561 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2562 2563 switch (Opcode) { 2564 case ISD::ADD: return getConstant(C1 + C2, VT); 2565 case ISD::SUB: return getConstant(C1 - C2, VT); 2566 case ISD::MUL: return getConstant(C1 * C2, VT); 2567 case ISD::UDIV: 2568 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2569 break; 2570 case ISD::UREM: 2571 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2572 break; 2573 case ISD::SDIV: 2574 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2575 break; 2576 case ISD::SREM: 2577 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2578 break; 2579 case ISD::AND: return getConstant(C1 & C2, VT); 2580 case ISD::OR: return getConstant(C1 | C2, VT); 2581 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2582 case ISD::SHL: return getConstant(C1 << C2, VT); 2583 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2584 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2585 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2586 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2587 default: break; 2588 } 2589 2590 return SDValue(); 2591} 2592 2593SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2594 SDValue N1, SDValue N2) { 2595 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2596 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2597 switch (Opcode) { 2598 default: break; 2599 case ISD::TokenFactor: 2600 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2601 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2602 // Fold trivial token factors. 2603 if (N1.getOpcode() == ISD::EntryToken) return N2; 2604 if (N2.getOpcode() == ISD::EntryToken) return N1; 2605 if (N1 == N2) return N1; 2606 break; 2607 case ISD::CONCAT_VECTORS: 2608 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2609 // one big BUILD_VECTOR. 2610 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2611 N2.getOpcode() == ISD::BUILD_VECTOR) { 2612 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2613 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2614 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2615 } 2616 break; 2617 case ISD::AND: 2618 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2619 N1.getValueType() == VT && "Binary operator types must match!"); 2620 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2621 // worth handling here. 2622 if (N2C && N2C->isNullValue()) 2623 return N2; 2624 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2625 return N1; 2626 break; 2627 case ISD::OR: 2628 case ISD::XOR: 2629 case ISD::ADD: 2630 case ISD::SUB: 2631 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2632 N1.getValueType() == VT && "Binary operator types must match!"); 2633 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2634 // it's worth handling here. 2635 if (N2C && N2C->isNullValue()) 2636 return N1; 2637 break; 2638 case ISD::UDIV: 2639 case ISD::UREM: 2640 case ISD::MULHU: 2641 case ISD::MULHS: 2642 case ISD::MUL: 2643 case ISD::SDIV: 2644 case ISD::SREM: 2645 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2646 // fall through 2647 case ISD::FADD: 2648 case ISD::FSUB: 2649 case ISD::FMUL: 2650 case ISD::FDIV: 2651 case ISD::FREM: 2652 if (UnsafeFPMath) { 2653 if (Opcode == ISD::FADD) { 2654 // 0+x --> x 2655 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2656 if (CFP->getValueAPF().isZero()) 2657 return N2; 2658 // x+0 --> x 2659 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2660 if (CFP->getValueAPF().isZero()) 2661 return N1; 2662 } else if (Opcode == ISD::FSUB) { 2663 // x-0 --> x 2664 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2665 if (CFP->getValueAPF().isZero()) 2666 return N1; 2667 } 2668 } 2669 assert(N1.getValueType() == N2.getValueType() && 2670 N1.getValueType() == VT && "Binary operator types must match!"); 2671 break; 2672 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2673 assert(N1.getValueType() == VT && 2674 N1.getValueType().isFloatingPoint() && 2675 N2.getValueType().isFloatingPoint() && 2676 "Invalid FCOPYSIGN!"); 2677 break; 2678 case ISD::SHL: 2679 case ISD::SRA: 2680 case ISD::SRL: 2681 case ISD::ROTL: 2682 case ISD::ROTR: 2683 assert(VT == N1.getValueType() && 2684 "Shift operators return type must be the same as their first arg"); 2685 assert(VT.isInteger() && N2.getValueType().isInteger() && 2686 "Shifts only work on integers"); 2687 2688 // Always fold shifts of i1 values so the code generator doesn't need to 2689 // handle them. Since we know the size of the shift has to be less than the 2690 // size of the value, the shift/rotate count is guaranteed to be zero. 2691 if (VT == MVT::i1) 2692 return N1; 2693 if (N2C && N2C->isNullValue()) 2694 return N1; 2695 break; 2696 case ISD::FP_ROUND_INREG: { 2697 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2698 assert(VT == N1.getValueType() && "Not an inreg round!"); 2699 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2700 "Cannot FP_ROUND_INREG integer types"); 2701 assert(EVT.isVector() == VT.isVector() && 2702 "FP_ROUND_INREG type should be vector iff the operand " 2703 "type is vector!"); 2704 assert((!EVT.isVector() || 2705 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2706 "Vector element counts must match in FP_ROUND_INREG"); 2707 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2708 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2709 break; 2710 } 2711 case ISD::FP_ROUND: 2712 assert(VT.isFloatingPoint() && 2713 N1.getValueType().isFloatingPoint() && 2714 VT.bitsLE(N1.getValueType()) && 2715 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2716 if (N1.getValueType() == VT) return N1; // noop conversion. 2717 break; 2718 case ISD::AssertSext: 2719 case ISD::AssertZext: { 2720 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2721 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2722 assert(VT.isInteger() && EVT.isInteger() && 2723 "Cannot *_EXTEND_INREG FP types"); 2724 assert(!EVT.isVector() && 2725 "AssertSExt/AssertZExt type should be the vector element type " 2726 "rather than the vector type!"); 2727 assert(EVT.bitsLE(VT) && "Not extending!"); 2728 if (VT == EVT) return N1; // noop assertion. 2729 break; 2730 } 2731 case ISD::SIGN_EXTEND_INREG: { 2732 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2733 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2734 assert(VT.isInteger() && EVT.isInteger() && 2735 "Cannot *_EXTEND_INREG FP types"); 2736 assert(EVT.isVector() == VT.isVector() && 2737 "SIGN_EXTEND_INREG type should be vector iff the operand " 2738 "type is vector!"); 2739 assert((!EVT.isVector() || 2740 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2741 "Vector element counts must match in SIGN_EXTEND_INREG"); 2742 assert(EVT.bitsLE(VT) && "Not extending!"); 2743 if (EVT == VT) return N1; // Not actually extending 2744 2745 if (N1C) { 2746 APInt Val = N1C->getAPIntValue(); 2747 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2748 Val <<= Val.getBitWidth()-FromBits; 2749 Val = Val.ashr(Val.getBitWidth()-FromBits); 2750 return getConstant(Val, VT); 2751 } 2752 break; 2753 } 2754 case ISD::EXTRACT_VECTOR_ELT: 2755 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2756 if (N1.getOpcode() == ISD::UNDEF) 2757 return getUNDEF(VT); 2758 2759 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2760 // expanding copies of large vectors from registers. 2761 if (N2C && 2762 N1.getOpcode() == ISD::CONCAT_VECTORS && 2763 N1.getNumOperands() > 0) { 2764 unsigned Factor = 2765 N1.getOperand(0).getValueType().getVectorNumElements(); 2766 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2767 N1.getOperand(N2C->getZExtValue() / Factor), 2768 getConstant(N2C->getZExtValue() % Factor, 2769 N2.getValueType())); 2770 } 2771 2772 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2773 // expanding large vector constants. 2774 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2775 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2776 EVT VEltTy = N1.getValueType().getVectorElementType(); 2777 if (Elt.getValueType() != VEltTy) { 2778 // If the vector element type is not legal, the BUILD_VECTOR operands 2779 // are promoted and implicitly truncated. Make that explicit here. 2780 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2781 } 2782 if (VT != VEltTy) { 2783 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2784 // result is implicitly extended. 2785 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2786 } 2787 return Elt; 2788 } 2789 2790 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2791 // operations are lowered to scalars. 2792 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2793 // If the indices are the same, return the inserted element else 2794 // if the indices are known different, extract the element from 2795 // the original vector. 2796 if (N1.getOperand(2) == N2) { 2797 if (VT == N1.getOperand(1).getValueType()) 2798 return N1.getOperand(1); 2799 else 2800 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2801 } else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2802 isa<ConstantSDNode>(N2)) 2803 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2804 } 2805 break; 2806 case ISD::EXTRACT_ELEMENT: 2807 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2808 assert(!N1.getValueType().isVector() && !VT.isVector() && 2809 (N1.getValueType().isInteger() == VT.isInteger()) && 2810 "Wrong types for EXTRACT_ELEMENT!"); 2811 2812 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2813 // 64-bit integers into 32-bit parts. Instead of building the extract of 2814 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2815 if (N1.getOpcode() == ISD::BUILD_PAIR) 2816 return N1.getOperand(N2C->getZExtValue()); 2817 2818 // EXTRACT_ELEMENT of a constant int is also very common. 2819 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2820 unsigned ElementSize = VT.getSizeInBits(); 2821 unsigned Shift = ElementSize * N2C->getZExtValue(); 2822 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2823 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2824 } 2825 break; 2826 case ISD::EXTRACT_SUBVECTOR: 2827 if (N1.getValueType() == VT) // Trivial extraction. 2828 return N1; 2829 break; 2830 } 2831 2832 if (N1C) { 2833 if (N2C) { 2834 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2835 if (SV.getNode()) return SV; 2836 } else { // Cannonicalize constant to RHS if commutative 2837 if (isCommutativeBinOp(Opcode)) { 2838 std::swap(N1C, N2C); 2839 std::swap(N1, N2); 2840 } 2841 } 2842 } 2843 2844 // Constant fold FP operations. 2845 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2846 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2847 if (N1CFP) { 2848 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2849 // Cannonicalize constant to RHS if commutative 2850 std::swap(N1CFP, N2CFP); 2851 std::swap(N1, N2); 2852 } else if (N2CFP && VT != MVT::ppcf128) { 2853 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2854 APFloat::opStatus s; 2855 switch (Opcode) { 2856 case ISD::FADD: 2857 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2858 if (s != APFloat::opInvalidOp) 2859 return getConstantFP(V1, VT); 2860 break; 2861 case ISD::FSUB: 2862 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2863 if (s!=APFloat::opInvalidOp) 2864 return getConstantFP(V1, VT); 2865 break; 2866 case ISD::FMUL: 2867 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2868 if (s!=APFloat::opInvalidOp) 2869 return getConstantFP(V1, VT); 2870 break; 2871 case ISD::FDIV: 2872 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2873 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2874 return getConstantFP(V1, VT); 2875 break; 2876 case ISD::FREM : 2877 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2878 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2879 return getConstantFP(V1, VT); 2880 break; 2881 case ISD::FCOPYSIGN: 2882 V1.copySign(V2); 2883 return getConstantFP(V1, VT); 2884 default: break; 2885 } 2886 } 2887 } 2888 2889 // Canonicalize an UNDEF to the RHS, even over a constant. 2890 if (N1.getOpcode() == ISD::UNDEF) { 2891 if (isCommutativeBinOp(Opcode)) { 2892 std::swap(N1, N2); 2893 } else { 2894 switch (Opcode) { 2895 case ISD::FP_ROUND_INREG: 2896 case ISD::SIGN_EXTEND_INREG: 2897 case ISD::SUB: 2898 case ISD::FSUB: 2899 case ISD::FDIV: 2900 case ISD::FREM: 2901 case ISD::SRA: 2902 return N1; // fold op(undef, arg2) -> undef 2903 case ISD::UDIV: 2904 case ISD::SDIV: 2905 case ISD::UREM: 2906 case ISD::SREM: 2907 case ISD::SRL: 2908 case ISD::SHL: 2909 if (!VT.isVector()) 2910 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2911 // For vectors, we can't easily build an all zero vector, just return 2912 // the LHS. 2913 return N2; 2914 } 2915 } 2916 } 2917 2918 // Fold a bunch of operators when the RHS is undef. 2919 if (N2.getOpcode() == ISD::UNDEF) { 2920 switch (Opcode) { 2921 case ISD::XOR: 2922 if (N1.getOpcode() == ISD::UNDEF) 2923 // Handle undef ^ undef -> 0 special case. This is a common 2924 // idiom (misuse). 2925 return getConstant(0, VT); 2926 // fallthrough 2927 case ISD::ADD: 2928 case ISD::ADDC: 2929 case ISD::ADDE: 2930 case ISD::SUB: 2931 case ISD::UDIV: 2932 case ISD::SDIV: 2933 case ISD::UREM: 2934 case ISD::SREM: 2935 return N2; // fold op(arg1, undef) -> undef 2936 case ISD::FADD: 2937 case ISD::FSUB: 2938 case ISD::FMUL: 2939 case ISD::FDIV: 2940 case ISD::FREM: 2941 if (UnsafeFPMath) 2942 return N2; 2943 break; 2944 case ISD::MUL: 2945 case ISD::AND: 2946 case ISD::SRL: 2947 case ISD::SHL: 2948 if (!VT.isVector()) 2949 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2950 // For vectors, we can't easily build an all zero vector, just return 2951 // the LHS. 2952 return N1; 2953 case ISD::OR: 2954 if (!VT.isVector()) 2955 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2956 // For vectors, we can't easily build an all one vector, just return 2957 // the LHS. 2958 return N1; 2959 case ISD::SRA: 2960 return N1; 2961 } 2962 } 2963 2964 // Memoize this node if possible. 2965 SDNode *N; 2966 SDVTList VTs = getVTList(VT); 2967 if (VT != MVT::Flag) { 2968 SDValue Ops[] = { N1, N2 }; 2969 FoldingSetNodeID ID; 2970 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2971 void *IP = 0; 2972 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2973 return SDValue(E, 0); 2974 2975 N = NodeAllocator.Allocate<BinarySDNode>(); 2976 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2977 CSEMap.InsertNode(N, IP); 2978 } else { 2979 N = NodeAllocator.Allocate<BinarySDNode>(); 2980 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2981 } 2982 2983 AllNodes.push_back(N); 2984#ifndef NDEBUG 2985 VerifyNode(N); 2986#endif 2987 return SDValue(N, 0); 2988} 2989 2990SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2991 SDValue N1, SDValue N2, SDValue N3) { 2992 // Perform various simplifications. 2993 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2994 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2995 switch (Opcode) { 2996 case ISD::CONCAT_VECTORS: 2997 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2998 // one big BUILD_VECTOR. 2999 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3000 N2.getOpcode() == ISD::BUILD_VECTOR && 3001 N3.getOpcode() == ISD::BUILD_VECTOR) { 3002 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 3003 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 3004 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 3005 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3006 } 3007 break; 3008 case ISD::SETCC: { 3009 // Use FoldSetCC to simplify SETCC's. 3010 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3011 if (Simp.getNode()) return Simp; 3012 break; 3013 } 3014 case ISD::SELECT: 3015 if (N1C) { 3016 if (N1C->getZExtValue()) 3017 return N2; // select true, X, Y -> X 3018 else 3019 return N3; // select false, X, Y -> Y 3020 } 3021 3022 if (N2 == N3) return N2; // select C, X, X -> X 3023 break; 3024 case ISD::BRCOND: 3025 if (N2C) { 3026 if (N2C->getZExtValue()) // Unconditional branch 3027 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3028 else 3029 return N1; // Never-taken branch 3030 } 3031 break; 3032 case ISD::VECTOR_SHUFFLE: 3033 llvm_unreachable("should use getVectorShuffle constructor!"); 3034 break; 3035 case ISD::BIT_CONVERT: 3036 // Fold bit_convert nodes from a type to themselves. 3037 if (N1.getValueType() == VT) 3038 return N1; 3039 break; 3040 } 3041 3042 // Memoize node if it doesn't produce a flag. 3043 SDNode *N; 3044 SDVTList VTs = getVTList(VT); 3045 if (VT != MVT::Flag) { 3046 SDValue Ops[] = { N1, N2, N3 }; 3047 FoldingSetNodeID ID; 3048 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3049 void *IP = 0; 3050 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3051 return SDValue(E, 0); 3052 3053 N = NodeAllocator.Allocate<TernarySDNode>(); 3054 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3055 CSEMap.InsertNode(N, IP); 3056 } else { 3057 N = NodeAllocator.Allocate<TernarySDNode>(); 3058 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3059 } 3060 3061 AllNodes.push_back(N); 3062#ifndef NDEBUG 3063 VerifyNode(N); 3064#endif 3065 return SDValue(N, 0); 3066} 3067 3068SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3069 SDValue N1, SDValue N2, SDValue N3, 3070 SDValue N4) { 3071 SDValue Ops[] = { N1, N2, N3, N4 }; 3072 return getNode(Opcode, DL, VT, Ops, 4); 3073} 3074 3075SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3076 SDValue N1, SDValue N2, SDValue N3, 3077 SDValue N4, SDValue N5) { 3078 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3079 return getNode(Opcode, DL, VT, Ops, 5); 3080} 3081 3082/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3083/// the incoming stack arguments to be loaded from the stack. 3084SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3085 SmallVector<SDValue, 8> ArgChains; 3086 3087 // Include the original chain at the beginning of the list. When this is 3088 // used by target LowerCall hooks, this helps legalize find the 3089 // CALLSEQ_BEGIN node. 3090 ArgChains.push_back(Chain); 3091 3092 // Add a chain value for each stack argument. 3093 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3094 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3095 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3096 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3097 if (FI->getIndex() < 0) 3098 ArgChains.push_back(SDValue(L, 1)); 3099 3100 // Build a tokenfactor for all the chains. 3101 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3102 &ArgChains[0], ArgChains.size()); 3103} 3104 3105/// getMemsetValue - Vectorized representation of the memset value 3106/// operand. 3107static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3108 DebugLoc dl) { 3109 unsigned NumBits = VT.isVector() ? 3110 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 3111 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3112 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3113 unsigned Shift = 8; 3114 for (unsigned i = NumBits; i > 8; i >>= 1) { 3115 Val = (Val << Shift) | Val; 3116 Shift <<= 1; 3117 } 3118 if (VT.isInteger()) 3119 return DAG.getConstant(Val, VT); 3120 return DAG.getConstantFP(APFloat(Val), VT); 3121 } 3122 3123 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3124 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3125 unsigned Shift = 8; 3126 for (unsigned i = NumBits; i > 8; i >>= 1) { 3127 Value = DAG.getNode(ISD::OR, dl, VT, 3128 DAG.getNode(ISD::SHL, dl, VT, Value, 3129 DAG.getConstant(Shift, 3130 TLI.getShiftAmountTy())), 3131 Value); 3132 Shift <<= 1; 3133 } 3134 3135 return Value; 3136} 3137 3138/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3139/// used when a memcpy is turned into a memset when the source is a constant 3140/// string ptr. 3141static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3142 const TargetLowering &TLI, 3143 std::string &Str, unsigned Offset) { 3144 // Handle vector with all elements zero. 3145 if (Str.empty()) { 3146 if (VT.isInteger()) 3147 return DAG.getConstant(0, VT); 3148 unsigned NumElts = VT.getVectorNumElements(); 3149 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3150 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3151 DAG.getConstant(0, 3152 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts))); 3153 } 3154 3155 assert(!VT.isVector() && "Can't handle vector type here!"); 3156 unsigned NumBits = VT.getSizeInBits(); 3157 unsigned MSB = NumBits / 8; 3158 uint64_t Val = 0; 3159 if (TLI.isLittleEndian()) 3160 Offset = Offset + MSB - 1; 3161 for (unsigned i = 0; i != MSB; ++i) { 3162 Val = (Val << 8) | (unsigned char)Str[Offset]; 3163 Offset += TLI.isLittleEndian() ? -1 : 1; 3164 } 3165 return DAG.getConstant(Val, VT); 3166} 3167 3168/// getMemBasePlusOffset - Returns base and offset node for the 3169/// 3170static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3171 SelectionDAG &DAG) { 3172 EVT VT = Base.getValueType(); 3173 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3174 VT, Base, DAG.getConstant(Offset, VT)); 3175} 3176 3177/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3178/// 3179static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3180 unsigned SrcDelta = 0; 3181 GlobalAddressSDNode *G = NULL; 3182 if (Src.getOpcode() == ISD::GlobalAddress) 3183 G = cast<GlobalAddressSDNode>(Src); 3184 else if (Src.getOpcode() == ISD::ADD && 3185 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3186 Src.getOperand(1).getOpcode() == ISD::Constant) { 3187 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3188 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3189 } 3190 if (!G) 3191 return false; 3192 3193 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3194 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3195 return true; 3196 3197 return false; 3198} 3199 3200/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3201/// to replace the memset / memcpy is below the threshold. It also returns the 3202/// types of the sequence of memory ops to perform memset / memcpy. 3203static 3204bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps, 3205 SDValue Dst, SDValue Src, 3206 unsigned Limit, uint64_t Size, unsigned &Align, 3207 std::string &Str, bool &isSrcStr, 3208 SelectionDAG &DAG, 3209 const TargetLowering &TLI) { 3210 isSrcStr = isMemSrcFromString(Src, Str); 3211 bool isSrcConst = isa<ConstantSDNode>(Src); 3212 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); 3213 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT); 3214 if (VT != MVT::iAny) { 3215 const Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3216 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3217 // If source is a string constant, this will require an unaligned load. 3218 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3219 if (Dst.getOpcode() != ISD::FrameIndex) { 3220 // Can't change destination alignment. It requires a unaligned store. 3221 if (AllowUnalign) 3222 VT = MVT::iAny; 3223 } else { 3224 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3225 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3226 if (MFI->isFixedObjectIndex(FI)) { 3227 // Can't change destination alignment. It requires a unaligned store. 3228 if (AllowUnalign) 3229 VT = MVT::iAny; 3230 } else { 3231 // Give the stack frame object a larger alignment if needed. 3232 if (MFI->getObjectAlignment(FI) < NewAlign) 3233 MFI->setObjectAlignment(FI, NewAlign); 3234 Align = NewAlign; 3235 } 3236 } 3237 } 3238 } 3239 3240 if (VT == MVT::iAny) { 3241 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) { 3242 VT = MVT::i64; 3243 } else { 3244 switch (Align & 7) { 3245 case 0: VT = MVT::i64; break; 3246 case 4: VT = MVT::i32; break; 3247 case 2: VT = MVT::i16; break; 3248 default: VT = MVT::i8; break; 3249 } 3250 } 3251 3252 MVT LVT = MVT::i64; 3253 while (!TLI.isTypeLegal(LVT)) 3254 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3255 assert(LVT.isInteger()); 3256 3257 if (VT.bitsGT(LVT)) 3258 VT = LVT; 3259 } 3260 3261 unsigned NumMemOps = 0; 3262 while (Size != 0) { 3263 unsigned VTSize = VT.getSizeInBits() / 8; 3264 while (VTSize > Size) { 3265 // For now, only use non-vector load / store's for the left-over pieces. 3266 if (VT.isVector()) { 3267 VT = MVT::i64; 3268 while (!TLI.isTypeLegal(VT)) 3269 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3270 VTSize = VT.getSizeInBits() / 8; 3271 } else { 3272 // This can result in a type that is not legal on the target, e.g. 3273 // 1 or 2 bytes on PPC. 3274 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3275 VTSize >>= 1; 3276 } 3277 } 3278 3279 if (++NumMemOps > Limit) 3280 return false; 3281 MemOps.push_back(VT); 3282 Size -= VTSize; 3283 } 3284 3285 return true; 3286} 3287 3288static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3289 SDValue Chain, SDValue Dst, 3290 SDValue Src, uint64_t Size, 3291 unsigned Align, bool AlwaysInline, 3292 const Value *DstSV, uint64_t DstSVOff, 3293 const Value *SrcSV, uint64_t SrcSVOff){ 3294 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3295 3296 // Expand memcpy to a series of load and store ops if the size operand falls 3297 // below a certain threshold. 3298 std::vector<EVT> MemOps; 3299 uint64_t Limit = -1ULL; 3300 if (!AlwaysInline) 3301 Limit = TLI.getMaxStoresPerMemcpy(); 3302 unsigned DstAlign = Align; // Destination alignment can change. 3303 std::string Str; 3304 bool CopyFromStr; 3305 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3306 Str, CopyFromStr, DAG, TLI)) 3307 return SDValue(); 3308 3309 3310 bool isZeroStr = CopyFromStr && Str.empty(); 3311 SmallVector<SDValue, 8> OutChains; 3312 unsigned NumMemOps = MemOps.size(); 3313 uint64_t SrcOff = 0, DstOff = 0; 3314 for (unsigned i = 0; i != NumMemOps; ++i) { 3315 EVT VT = MemOps[i]; 3316 unsigned VTSize = VT.getSizeInBits() / 8; 3317 SDValue Value, Store; 3318 3319 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3320 // It's unlikely a store of a vector immediate can be done in a single 3321 // instruction. It would require a load from a constantpool first. 3322 // We also handle store a vector with all zero's. 3323 // FIXME: Handle other cases where store of vector immediate is done in 3324 // a single instruction. 3325 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3326 Store = DAG.getStore(Chain, dl, Value, 3327 getMemBasePlusOffset(Dst, DstOff, DAG), 3328 DstSV, DstSVOff + DstOff, false, false, DstAlign); 3329 } else { 3330 // The type might not be legal for the target. This should only happen 3331 // if the type is smaller than a legal type, as on PPC, so the right 3332 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3333 // to Load/Store if NVT==VT. 3334 // FIXME does the case above also need this? 3335 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3336 assert(NVT.bitsGE(VT)); 3337 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3338 getMemBasePlusOffset(Src, SrcOff, DAG), 3339 SrcSV, SrcSVOff + SrcOff, VT, false, false, Align); 3340 Store = DAG.getTruncStore(Chain, dl, Value, 3341 getMemBasePlusOffset(Dst, DstOff, DAG), 3342 DstSV, DstSVOff + DstOff, VT, false, false, 3343 DstAlign); 3344 } 3345 OutChains.push_back(Store); 3346 SrcOff += VTSize; 3347 DstOff += VTSize; 3348 } 3349 3350 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3351 &OutChains[0], OutChains.size()); 3352} 3353 3354static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3355 SDValue Chain, SDValue Dst, 3356 SDValue Src, uint64_t Size, 3357 unsigned Align, bool AlwaysInline, 3358 const Value *DstSV, uint64_t DstSVOff, 3359 const Value *SrcSV, uint64_t SrcSVOff){ 3360 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3361 3362 // Expand memmove to a series of load and store ops if the size operand falls 3363 // below a certain threshold. 3364 std::vector<EVT> MemOps; 3365 uint64_t Limit = -1ULL; 3366 if (!AlwaysInline) 3367 Limit = TLI.getMaxStoresPerMemmove(); 3368 unsigned DstAlign = Align; // Destination alignment can change. 3369 std::string Str; 3370 bool CopyFromStr; 3371 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3372 Str, CopyFromStr, DAG, TLI)) 3373 return SDValue(); 3374 3375 uint64_t SrcOff = 0, DstOff = 0; 3376 3377 SmallVector<SDValue, 8> LoadValues; 3378 SmallVector<SDValue, 8> LoadChains; 3379 SmallVector<SDValue, 8> OutChains; 3380 unsigned NumMemOps = MemOps.size(); 3381 for (unsigned i = 0; i < NumMemOps; i++) { 3382 EVT VT = MemOps[i]; 3383 unsigned VTSize = VT.getSizeInBits() / 8; 3384 SDValue Value, Store; 3385 3386 Value = DAG.getLoad(VT, dl, Chain, 3387 getMemBasePlusOffset(Src, SrcOff, DAG), 3388 SrcSV, SrcSVOff + SrcOff, false, false, Align); 3389 LoadValues.push_back(Value); 3390 LoadChains.push_back(Value.getValue(1)); 3391 SrcOff += VTSize; 3392 } 3393 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3394 &LoadChains[0], LoadChains.size()); 3395 OutChains.clear(); 3396 for (unsigned i = 0; i < NumMemOps; i++) { 3397 EVT VT = MemOps[i]; 3398 unsigned VTSize = VT.getSizeInBits() / 8; 3399 SDValue Value, Store; 3400 3401 Store = DAG.getStore(Chain, dl, LoadValues[i], 3402 getMemBasePlusOffset(Dst, DstOff, DAG), 3403 DstSV, DstSVOff + DstOff, false, false, DstAlign); 3404 OutChains.push_back(Store); 3405 DstOff += VTSize; 3406 } 3407 3408 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3409 &OutChains[0], OutChains.size()); 3410} 3411 3412static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3413 SDValue Chain, SDValue Dst, 3414 SDValue Src, uint64_t Size, 3415 unsigned Align, 3416 const Value *DstSV, uint64_t DstSVOff) { 3417 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3418 3419 // Expand memset to a series of load/store ops if the size operand 3420 // falls below a certain threshold. 3421 std::vector<EVT> MemOps; 3422 std::string Str; 3423 bool CopyFromStr; 3424 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3425 Size, Align, Str, CopyFromStr, DAG, TLI)) 3426 return SDValue(); 3427 3428 SmallVector<SDValue, 8> OutChains; 3429 uint64_t DstOff = 0; 3430 3431 unsigned NumMemOps = MemOps.size(); 3432 for (unsigned i = 0; i < NumMemOps; i++) { 3433 EVT VT = MemOps[i]; 3434 unsigned VTSize = VT.getSizeInBits() / 8; 3435 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3436 SDValue Store = DAG.getStore(Chain, dl, Value, 3437 getMemBasePlusOffset(Dst, DstOff, DAG), 3438 DstSV, DstSVOff + DstOff, false, false, 0); 3439 OutChains.push_back(Store); 3440 DstOff += VTSize; 3441 } 3442 3443 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3444 &OutChains[0], OutChains.size()); 3445} 3446 3447SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3448 SDValue Src, SDValue Size, 3449 unsigned Align, bool AlwaysInline, 3450 const Value *DstSV, uint64_t DstSVOff, 3451 const Value *SrcSV, uint64_t SrcSVOff) { 3452 3453 // Check to see if we should lower the memcpy to loads and stores first. 3454 // For cases within the target-specified limits, this is the best choice. 3455 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3456 if (ConstantSize) { 3457 // Memcpy with size zero? Just return the original chain. 3458 if (ConstantSize->isNullValue()) 3459 return Chain; 3460 3461 SDValue Result = 3462 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3463 ConstantSize->getZExtValue(), 3464 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3465 if (Result.getNode()) 3466 return Result; 3467 } 3468 3469 // Then check to see if we should lower the memcpy with target-specific 3470 // code. If the target chooses to do this, this is the next best. 3471 SDValue Result = 3472 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3473 AlwaysInline, 3474 DstSV, DstSVOff, SrcSV, SrcSVOff); 3475 if (Result.getNode()) 3476 return Result; 3477 3478 // If we really need inline code and the target declined to provide it, 3479 // use a (potentially long) sequence of loads and stores. 3480 if (AlwaysInline) { 3481 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3482 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3483 ConstantSize->getZExtValue(), Align, true, 3484 DstSV, DstSVOff, SrcSV, SrcSVOff); 3485 } 3486 3487 // Emit a library call. 3488 TargetLowering::ArgListTy Args; 3489 TargetLowering::ArgListEntry Entry; 3490 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3491 Entry.Node = Dst; Args.push_back(Entry); 3492 Entry.Node = Src; Args.push_back(Entry); 3493 Entry.Node = Size; Args.push_back(Entry); 3494 // FIXME: pass in DebugLoc 3495 std::pair<SDValue,SDValue> CallResult = 3496 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3497 false, false, false, false, 0, 3498 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3499 /*isReturnValueUsed=*/false, 3500 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3501 TLI.getPointerTy()), 3502 Args, *this, dl, GetOrdering(Chain.getNode())); 3503 return CallResult.second; 3504} 3505 3506SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3507 SDValue Src, SDValue Size, 3508 unsigned Align, 3509 const Value *DstSV, uint64_t DstSVOff, 3510 const Value *SrcSV, uint64_t SrcSVOff) { 3511 3512 // Check to see if we should lower the memmove to loads and stores first. 3513 // For cases within the target-specified limits, this is the best choice. 3514 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3515 if (ConstantSize) { 3516 // Memmove with size zero? Just return the original chain. 3517 if (ConstantSize->isNullValue()) 3518 return Chain; 3519 3520 SDValue Result = 3521 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3522 ConstantSize->getZExtValue(), 3523 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3524 if (Result.getNode()) 3525 return Result; 3526 } 3527 3528 // Then check to see if we should lower the memmove with target-specific 3529 // code. If the target chooses to do this, this is the next best. 3530 SDValue Result = 3531 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, 3532 DstSV, DstSVOff, SrcSV, SrcSVOff); 3533 if (Result.getNode()) 3534 return Result; 3535 3536 // Emit a library call. 3537 TargetLowering::ArgListTy Args; 3538 TargetLowering::ArgListEntry Entry; 3539 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3540 Entry.Node = Dst; Args.push_back(Entry); 3541 Entry.Node = Src; Args.push_back(Entry); 3542 Entry.Node = Size; Args.push_back(Entry); 3543 // FIXME: pass in DebugLoc 3544 std::pair<SDValue,SDValue> CallResult = 3545 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3546 false, false, false, false, 0, 3547 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3548 /*isReturnValueUsed=*/false, 3549 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3550 TLI.getPointerTy()), 3551 Args, *this, dl, GetOrdering(Chain.getNode())); 3552 return CallResult.second; 3553} 3554 3555SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3556 SDValue Src, SDValue Size, 3557 unsigned Align, 3558 const Value *DstSV, uint64_t DstSVOff) { 3559 3560 // Check to see if we should lower the memset to stores first. 3561 // For cases within the target-specified limits, this is the best choice. 3562 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3563 if (ConstantSize) { 3564 // Memset with size zero? Just return the original chain. 3565 if (ConstantSize->isNullValue()) 3566 return Chain; 3567 3568 SDValue Result = 3569 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3570 Align, DstSV, DstSVOff); 3571 if (Result.getNode()) 3572 return Result; 3573 } 3574 3575 // Then check to see if we should lower the memset with target-specific 3576 // code. If the target chooses to do this, this is the next best. 3577 SDValue Result = 3578 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, 3579 DstSV, DstSVOff); 3580 if (Result.getNode()) 3581 return Result; 3582 3583 // Emit a library call. 3584 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3585 TargetLowering::ArgListTy Args; 3586 TargetLowering::ArgListEntry Entry; 3587 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3588 Args.push_back(Entry); 3589 // Extend or truncate the argument to be an i32 value for the call. 3590 if (Src.getValueType().bitsGT(MVT::i32)) 3591 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3592 else 3593 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3594 Entry.Node = Src; 3595 Entry.Ty = Type::getInt32Ty(*getContext()); 3596 Entry.isSExt = true; 3597 Args.push_back(Entry); 3598 Entry.Node = Size; 3599 Entry.Ty = IntPtrTy; 3600 Entry.isSExt = false; 3601 Args.push_back(Entry); 3602 // FIXME: pass in DebugLoc 3603 std::pair<SDValue,SDValue> CallResult = 3604 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3605 false, false, false, false, 0, 3606 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3607 /*isReturnValueUsed=*/false, 3608 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3609 TLI.getPointerTy()), 3610 Args, *this, dl, GetOrdering(Chain.getNode())); 3611 return CallResult.second; 3612} 3613 3614SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3615 SDValue Chain, 3616 SDValue Ptr, SDValue Cmp, 3617 SDValue Swp, const Value* PtrVal, 3618 unsigned Alignment) { 3619 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3620 Alignment = getEVTAlignment(MemVT); 3621 3622 // Check if the memory reference references a frame index 3623 if (!PtrVal) 3624 if (const FrameIndexSDNode *FI = 3625 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3626 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3627 3628 MachineFunction &MF = getMachineFunction(); 3629 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3630 3631 // For now, atomics are considered to be volatile always. 3632 Flags |= MachineMemOperand::MOVolatile; 3633 3634 MachineMemOperand *MMO = 3635 MF.getMachineMemOperand(PtrVal, Flags, 0, 3636 MemVT.getStoreSize(), Alignment); 3637 3638 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3639} 3640 3641SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3642 SDValue Chain, 3643 SDValue Ptr, SDValue Cmp, 3644 SDValue Swp, MachineMemOperand *MMO) { 3645 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3646 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3647 3648 EVT VT = Cmp.getValueType(); 3649 3650 SDVTList VTs = getVTList(VT, MVT::Other); 3651 FoldingSetNodeID ID; 3652 ID.AddInteger(MemVT.getRawBits()); 3653 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3654 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3655 void* IP = 0; 3656 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3657 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3658 return SDValue(E, 0); 3659 } 3660 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3661 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3662 CSEMap.InsertNode(N, IP); 3663 AllNodes.push_back(N); 3664 return SDValue(N, 0); 3665} 3666 3667SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3668 SDValue Chain, 3669 SDValue Ptr, SDValue Val, 3670 const Value* PtrVal, 3671 unsigned Alignment) { 3672 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3673 Alignment = getEVTAlignment(MemVT); 3674 3675 // Check if the memory reference references a frame index 3676 if (!PtrVal) 3677 if (const FrameIndexSDNode *FI = 3678 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3679 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3680 3681 MachineFunction &MF = getMachineFunction(); 3682 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3683 3684 // For now, atomics are considered to be volatile always. 3685 Flags |= MachineMemOperand::MOVolatile; 3686 3687 MachineMemOperand *MMO = 3688 MF.getMachineMemOperand(PtrVal, Flags, 0, 3689 MemVT.getStoreSize(), Alignment); 3690 3691 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3692} 3693 3694SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3695 SDValue Chain, 3696 SDValue Ptr, SDValue Val, 3697 MachineMemOperand *MMO) { 3698 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3699 Opcode == ISD::ATOMIC_LOAD_SUB || 3700 Opcode == ISD::ATOMIC_LOAD_AND || 3701 Opcode == ISD::ATOMIC_LOAD_OR || 3702 Opcode == ISD::ATOMIC_LOAD_XOR || 3703 Opcode == ISD::ATOMIC_LOAD_NAND || 3704 Opcode == ISD::ATOMIC_LOAD_MIN || 3705 Opcode == ISD::ATOMIC_LOAD_MAX || 3706 Opcode == ISD::ATOMIC_LOAD_UMIN || 3707 Opcode == ISD::ATOMIC_LOAD_UMAX || 3708 Opcode == ISD::ATOMIC_SWAP) && 3709 "Invalid Atomic Op"); 3710 3711 EVT VT = Val.getValueType(); 3712 3713 SDVTList VTs = getVTList(VT, MVT::Other); 3714 FoldingSetNodeID ID; 3715 ID.AddInteger(MemVT.getRawBits()); 3716 SDValue Ops[] = {Chain, Ptr, Val}; 3717 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3718 void* IP = 0; 3719 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3720 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3721 return SDValue(E, 0); 3722 } 3723 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3724 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO); 3725 CSEMap.InsertNode(N, IP); 3726 AllNodes.push_back(N); 3727 return SDValue(N, 0); 3728} 3729 3730/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3731/// Allowed to return something different (and simpler) if Simplify is true. 3732SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3733 DebugLoc dl) { 3734 if (NumOps == 1) 3735 return Ops[0]; 3736 3737 SmallVector<EVT, 4> VTs; 3738 VTs.reserve(NumOps); 3739 for (unsigned i = 0; i < NumOps; ++i) 3740 VTs.push_back(Ops[i].getValueType()); 3741 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3742 Ops, NumOps); 3743} 3744 3745SDValue 3746SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3747 const EVT *VTs, unsigned NumVTs, 3748 const SDValue *Ops, unsigned NumOps, 3749 EVT MemVT, const Value *srcValue, int SVOff, 3750 unsigned Align, bool Vol, 3751 bool ReadMem, bool WriteMem) { 3752 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3753 MemVT, srcValue, SVOff, Align, Vol, 3754 ReadMem, WriteMem); 3755} 3756 3757SDValue 3758SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3759 const SDValue *Ops, unsigned NumOps, 3760 EVT MemVT, const Value *srcValue, int SVOff, 3761 unsigned Align, bool Vol, 3762 bool ReadMem, bool WriteMem) { 3763 if (Align == 0) // Ensure that codegen never sees alignment 0 3764 Align = getEVTAlignment(MemVT); 3765 3766 MachineFunction &MF = getMachineFunction(); 3767 unsigned Flags = 0; 3768 if (WriteMem) 3769 Flags |= MachineMemOperand::MOStore; 3770 if (ReadMem) 3771 Flags |= MachineMemOperand::MOLoad; 3772 if (Vol) 3773 Flags |= MachineMemOperand::MOVolatile; 3774 MachineMemOperand *MMO = 3775 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3776 MemVT.getStoreSize(), Align); 3777 3778 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3779} 3780 3781SDValue 3782SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3783 const SDValue *Ops, unsigned NumOps, 3784 EVT MemVT, MachineMemOperand *MMO) { 3785 assert((Opcode == ISD::INTRINSIC_VOID || 3786 Opcode == ISD::INTRINSIC_W_CHAIN || 3787 (Opcode <= INT_MAX && 3788 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3789 "Opcode is not a memory-accessing opcode!"); 3790 3791 // Memoize the node unless it returns a flag. 3792 MemIntrinsicSDNode *N; 3793 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3794 FoldingSetNodeID ID; 3795 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3796 void *IP = 0; 3797 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3798 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3799 return SDValue(E, 0); 3800 } 3801 3802 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3803 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3804 CSEMap.InsertNode(N, IP); 3805 } else { 3806 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3807 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3808 } 3809 AllNodes.push_back(N); 3810 return SDValue(N, 0); 3811} 3812 3813SDValue 3814SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3815 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3816 SDValue Ptr, SDValue Offset, 3817 const Value *SV, int SVOffset, EVT MemVT, 3818 bool isVolatile, bool isNonTemporal, 3819 unsigned Alignment) { 3820 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3821 Alignment = getEVTAlignment(VT); 3822 3823 // Check if the memory reference references a frame index 3824 if (!SV) 3825 if (const FrameIndexSDNode *FI = 3826 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3827 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3828 3829 MachineFunction &MF = getMachineFunction(); 3830 unsigned Flags = MachineMemOperand::MOLoad; 3831 if (isVolatile) 3832 Flags |= MachineMemOperand::MOVolatile; 3833 if (isNonTemporal) 3834 Flags |= MachineMemOperand::MONonTemporal; 3835 MachineMemOperand *MMO = 3836 MF.getMachineMemOperand(SV, Flags, SVOffset, 3837 MemVT.getStoreSize(), Alignment); 3838 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3839} 3840 3841SDValue 3842SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3843 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3844 SDValue Ptr, SDValue Offset, EVT MemVT, 3845 MachineMemOperand *MMO) { 3846 if (VT == MemVT) { 3847 ExtType = ISD::NON_EXTLOAD; 3848 } else if (ExtType == ISD::NON_EXTLOAD) { 3849 assert(VT == MemVT && "Non-extending load from different memory type!"); 3850 } else { 3851 // Extending load. 3852 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3853 "Should only be an extending load, not truncating!"); 3854 assert(VT.isInteger() == MemVT.isInteger() && 3855 "Cannot convert from FP to Int or Int -> FP!"); 3856 assert(VT.isVector() == MemVT.isVector() && 3857 "Cannot use trunc store to convert to or from a vector!"); 3858 assert((!VT.isVector() || 3859 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3860 "Cannot use trunc store to change the number of vector elements!"); 3861 } 3862 3863 bool Indexed = AM != ISD::UNINDEXED; 3864 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3865 "Unindexed load with an offset!"); 3866 3867 SDVTList VTs = Indexed ? 3868 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3869 SDValue Ops[] = { Chain, Ptr, Offset }; 3870 FoldingSetNodeID ID; 3871 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3872 ID.AddInteger(MemVT.getRawBits()); 3873 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3874 MMO->isNonTemporal())); 3875 void *IP = 0; 3876 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3877 cast<LoadSDNode>(E)->refineAlignment(MMO); 3878 return SDValue(E, 0); 3879 } 3880 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3881 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO); 3882 CSEMap.InsertNode(N, IP); 3883 AllNodes.push_back(N); 3884 return SDValue(N, 0); 3885} 3886 3887SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3888 SDValue Chain, SDValue Ptr, 3889 const Value *SV, int SVOffset, 3890 bool isVolatile, bool isNonTemporal, 3891 unsigned Alignment) { 3892 SDValue Undef = getUNDEF(Ptr.getValueType()); 3893 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3894 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3895} 3896 3897SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3898 SDValue Chain, SDValue Ptr, 3899 const Value *SV, 3900 int SVOffset, EVT MemVT, 3901 bool isVolatile, bool isNonTemporal, 3902 unsigned Alignment) { 3903 SDValue Undef = getUNDEF(Ptr.getValueType()); 3904 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3905 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3906} 3907 3908SDValue 3909SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3910 SDValue Offset, ISD::MemIndexedMode AM) { 3911 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3912 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3913 "Load is already a indexed load!"); 3914 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3915 LD->getChain(), Base, Offset, LD->getSrcValue(), 3916 LD->getSrcValueOffset(), LD->getMemoryVT(), 3917 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3918} 3919 3920SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3921 SDValue Ptr, const Value *SV, int SVOffset, 3922 bool isVolatile, bool isNonTemporal, 3923 unsigned Alignment) { 3924 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3925 Alignment = getEVTAlignment(Val.getValueType()); 3926 3927 // Check if the memory reference references a frame index 3928 if (!SV) 3929 if (const FrameIndexSDNode *FI = 3930 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3931 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3932 3933 MachineFunction &MF = getMachineFunction(); 3934 unsigned Flags = MachineMemOperand::MOStore; 3935 if (isVolatile) 3936 Flags |= MachineMemOperand::MOVolatile; 3937 if (isNonTemporal) 3938 Flags |= MachineMemOperand::MONonTemporal; 3939 MachineMemOperand *MMO = 3940 MF.getMachineMemOperand(SV, Flags, SVOffset, 3941 Val.getValueType().getStoreSize(), Alignment); 3942 3943 return getStore(Chain, dl, Val, Ptr, MMO); 3944} 3945 3946SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3947 SDValue Ptr, MachineMemOperand *MMO) { 3948 EVT VT = Val.getValueType(); 3949 SDVTList VTs = getVTList(MVT::Other); 3950 SDValue Undef = getUNDEF(Ptr.getValueType()); 3951 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3952 FoldingSetNodeID ID; 3953 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3954 ID.AddInteger(VT.getRawBits()); 3955 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 3956 MMO->isNonTemporal())); 3957 void *IP = 0; 3958 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3959 cast<StoreSDNode>(E)->refineAlignment(MMO); 3960 return SDValue(E, 0); 3961 } 3962 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3963 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO); 3964 CSEMap.InsertNode(N, IP); 3965 AllNodes.push_back(N); 3966 return SDValue(N, 0); 3967} 3968 3969SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3970 SDValue Ptr, const Value *SV, 3971 int SVOffset, EVT SVT, 3972 bool isVolatile, bool isNonTemporal, 3973 unsigned Alignment) { 3974 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3975 Alignment = getEVTAlignment(SVT); 3976 3977 // Check if the memory reference references a frame index 3978 if (!SV) 3979 if (const FrameIndexSDNode *FI = 3980 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3981 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3982 3983 MachineFunction &MF = getMachineFunction(); 3984 unsigned Flags = MachineMemOperand::MOStore; 3985 if (isVolatile) 3986 Flags |= MachineMemOperand::MOVolatile; 3987 if (isNonTemporal) 3988 Flags |= MachineMemOperand::MONonTemporal; 3989 MachineMemOperand *MMO = 3990 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 3991 3992 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 3993} 3994 3995SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3996 SDValue Ptr, EVT SVT, 3997 MachineMemOperand *MMO) { 3998 EVT VT = Val.getValueType(); 3999 4000 if (VT == SVT) 4001 return getStore(Chain, dl, Val, Ptr, MMO); 4002 4003 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4004 "Should only be a truncating store, not extending!"); 4005 assert(VT.isInteger() == SVT.isInteger() && 4006 "Can't do FP-INT conversion!"); 4007 assert(VT.isVector() == SVT.isVector() && 4008 "Cannot use trunc store to convert to or from a vector!"); 4009 assert((!VT.isVector() || 4010 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4011 "Cannot use trunc store to change the number of vector elements!"); 4012 4013 SDVTList VTs = getVTList(MVT::Other); 4014 SDValue Undef = getUNDEF(Ptr.getValueType()); 4015 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4016 FoldingSetNodeID ID; 4017 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4018 ID.AddInteger(SVT.getRawBits()); 4019 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4020 MMO->isNonTemporal())); 4021 void *IP = 0; 4022 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4023 cast<StoreSDNode>(E)->refineAlignment(MMO); 4024 return SDValue(E, 0); 4025 } 4026 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 4027 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO); 4028 CSEMap.InsertNode(N, IP); 4029 AllNodes.push_back(N); 4030 return SDValue(N, 0); 4031} 4032 4033SDValue 4034SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4035 SDValue Offset, ISD::MemIndexedMode AM) { 4036 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4037 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4038 "Store is already a indexed store!"); 4039 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4040 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4041 FoldingSetNodeID ID; 4042 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4043 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4044 ID.AddInteger(ST->getRawSubclassData()); 4045 void *IP = 0; 4046 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4047 return SDValue(E, 0); 4048 4049 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 4050 new (N) StoreSDNode(Ops, dl, VTs, AM, 4051 ST->isTruncatingStore(), ST->getMemoryVT(), 4052 ST->getMemOperand()); 4053 CSEMap.InsertNode(N, IP); 4054 AllNodes.push_back(N); 4055 return SDValue(N, 0); 4056} 4057 4058SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4059 SDValue Chain, SDValue Ptr, 4060 SDValue SV) { 4061 SDValue Ops[] = { Chain, Ptr, SV }; 4062 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4063} 4064 4065SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4066 const SDUse *Ops, unsigned NumOps) { 4067 switch (NumOps) { 4068 case 0: return getNode(Opcode, DL, VT); 4069 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4070 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4071 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4072 default: break; 4073 } 4074 4075 // Copy from an SDUse array into an SDValue array for use with 4076 // the regular getNode logic. 4077 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4078 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4079} 4080 4081SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4082 const SDValue *Ops, unsigned NumOps) { 4083 switch (NumOps) { 4084 case 0: return getNode(Opcode, DL, VT); 4085 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4086 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4087 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4088 default: break; 4089 } 4090 4091 switch (Opcode) { 4092 default: break; 4093 case ISD::SELECT_CC: { 4094 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4095 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4096 "LHS and RHS of condition must have same type!"); 4097 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4098 "True and False arms of SelectCC must have same type!"); 4099 assert(Ops[2].getValueType() == VT && 4100 "select_cc node must be of same type as true and false value!"); 4101 break; 4102 } 4103 case ISD::BR_CC: { 4104 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4105 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4106 "LHS/RHS of comparison should match types!"); 4107 break; 4108 } 4109 } 4110 4111 // Memoize nodes. 4112 SDNode *N; 4113 SDVTList VTs = getVTList(VT); 4114 4115 if (VT != MVT::Flag) { 4116 FoldingSetNodeID ID; 4117 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4118 void *IP = 0; 4119 4120 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4121 return SDValue(E, 0); 4122 4123 N = NodeAllocator.Allocate<SDNode>(); 4124 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4125 CSEMap.InsertNode(N, IP); 4126 } else { 4127 N = NodeAllocator.Allocate<SDNode>(); 4128 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4129 } 4130 4131 AllNodes.push_back(N); 4132#ifndef NDEBUG 4133 VerifyNode(N); 4134#endif 4135 return SDValue(N, 0); 4136} 4137 4138SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4139 const std::vector<EVT> &ResultTys, 4140 const SDValue *Ops, unsigned NumOps) { 4141 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4142 Ops, NumOps); 4143} 4144 4145SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4146 const EVT *VTs, unsigned NumVTs, 4147 const SDValue *Ops, unsigned NumOps) { 4148 if (NumVTs == 1) 4149 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4150 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4151} 4152 4153SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4154 const SDValue *Ops, unsigned NumOps) { 4155 if (VTList.NumVTs == 1) 4156 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4157 4158#if 0 4159 switch (Opcode) { 4160 // FIXME: figure out how to safely handle things like 4161 // int foo(int x) { return 1 << (x & 255); } 4162 // int bar() { return foo(256); } 4163 case ISD::SRA_PARTS: 4164 case ISD::SRL_PARTS: 4165 case ISD::SHL_PARTS: 4166 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4167 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4168 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4169 else if (N3.getOpcode() == ISD::AND) 4170 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4171 // If the and is only masking out bits that cannot effect the shift, 4172 // eliminate the and. 4173 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4174 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4175 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4176 } 4177 break; 4178 } 4179#endif 4180 4181 // Memoize the node unless it returns a flag. 4182 SDNode *N; 4183 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4184 FoldingSetNodeID ID; 4185 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4186 void *IP = 0; 4187 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4188 return SDValue(E, 0); 4189 4190 if (NumOps == 1) { 4191 N = NodeAllocator.Allocate<UnarySDNode>(); 4192 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4193 } else if (NumOps == 2) { 4194 N = NodeAllocator.Allocate<BinarySDNode>(); 4195 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4196 } else if (NumOps == 3) { 4197 N = NodeAllocator.Allocate<TernarySDNode>(); 4198 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4199 } else { 4200 N = NodeAllocator.Allocate<SDNode>(); 4201 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4202 } 4203 CSEMap.InsertNode(N, IP); 4204 } else { 4205 if (NumOps == 1) { 4206 N = NodeAllocator.Allocate<UnarySDNode>(); 4207 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4208 } else if (NumOps == 2) { 4209 N = NodeAllocator.Allocate<BinarySDNode>(); 4210 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4211 } else if (NumOps == 3) { 4212 N = NodeAllocator.Allocate<TernarySDNode>(); 4213 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4214 } else { 4215 N = NodeAllocator.Allocate<SDNode>(); 4216 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4217 } 4218 } 4219 AllNodes.push_back(N); 4220#ifndef NDEBUG 4221 VerifyNode(N); 4222#endif 4223 return SDValue(N, 0); 4224} 4225 4226SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4227 return getNode(Opcode, DL, VTList, 0, 0); 4228} 4229 4230SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4231 SDValue N1) { 4232 SDValue Ops[] = { N1 }; 4233 return getNode(Opcode, DL, VTList, Ops, 1); 4234} 4235 4236SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4237 SDValue N1, SDValue N2) { 4238 SDValue Ops[] = { N1, N2 }; 4239 return getNode(Opcode, DL, VTList, Ops, 2); 4240} 4241 4242SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4243 SDValue N1, SDValue N2, SDValue N3) { 4244 SDValue Ops[] = { N1, N2, N3 }; 4245 return getNode(Opcode, DL, VTList, Ops, 3); 4246} 4247 4248SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4249 SDValue N1, SDValue N2, SDValue N3, 4250 SDValue N4) { 4251 SDValue Ops[] = { N1, N2, N3, N4 }; 4252 return getNode(Opcode, DL, VTList, Ops, 4); 4253} 4254 4255SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4256 SDValue N1, SDValue N2, SDValue N3, 4257 SDValue N4, SDValue N5) { 4258 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4259 return getNode(Opcode, DL, VTList, Ops, 5); 4260} 4261 4262SDVTList SelectionDAG::getVTList(EVT VT) { 4263 return makeVTList(SDNode::getValueTypeList(VT), 1); 4264} 4265 4266SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4267 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4268 E = VTList.rend(); I != E; ++I) 4269 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4270 return *I; 4271 4272 EVT *Array = Allocator.Allocate<EVT>(2); 4273 Array[0] = VT1; 4274 Array[1] = VT2; 4275 SDVTList Result = makeVTList(Array, 2); 4276 VTList.push_back(Result); 4277 return Result; 4278} 4279 4280SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4281 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4282 E = VTList.rend(); I != E; ++I) 4283 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4284 I->VTs[2] == VT3) 4285 return *I; 4286 4287 EVT *Array = Allocator.Allocate<EVT>(3); 4288 Array[0] = VT1; 4289 Array[1] = VT2; 4290 Array[2] = VT3; 4291 SDVTList Result = makeVTList(Array, 3); 4292 VTList.push_back(Result); 4293 return Result; 4294} 4295 4296SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4297 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4298 E = VTList.rend(); I != E; ++I) 4299 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4300 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4301 return *I; 4302 4303 EVT *Array = Allocator.Allocate<EVT>(4); 4304 Array[0] = VT1; 4305 Array[1] = VT2; 4306 Array[2] = VT3; 4307 Array[3] = VT4; 4308 SDVTList Result = makeVTList(Array, 4); 4309 VTList.push_back(Result); 4310 return Result; 4311} 4312 4313SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4314 switch (NumVTs) { 4315 case 0: llvm_unreachable("Cannot have nodes without results!"); 4316 case 1: return getVTList(VTs[0]); 4317 case 2: return getVTList(VTs[0], VTs[1]); 4318 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4319 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4320 default: break; 4321 } 4322 4323 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4324 E = VTList.rend(); I != E; ++I) { 4325 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4326 continue; 4327 4328 bool NoMatch = false; 4329 for (unsigned i = 2; i != NumVTs; ++i) 4330 if (VTs[i] != I->VTs[i]) { 4331 NoMatch = true; 4332 break; 4333 } 4334 if (!NoMatch) 4335 return *I; 4336 } 4337 4338 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4339 std::copy(VTs, VTs+NumVTs, Array); 4340 SDVTList Result = makeVTList(Array, NumVTs); 4341 VTList.push_back(Result); 4342 return Result; 4343} 4344 4345 4346/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4347/// specified operands. If the resultant node already exists in the DAG, 4348/// this does not modify the specified node, instead it returns the node that 4349/// already exists. If the resultant node does not exist in the DAG, the 4350/// input node is returned. As a degenerate case, if you specify the same 4351/// input operands as the node already has, the input node is returned. 4352SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4353 SDNode *N = InN.getNode(); 4354 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4355 4356 // Check to see if there is no change. 4357 if (Op == N->getOperand(0)) return InN; 4358 4359 // See if the modified node already exists. 4360 void *InsertPos = 0; 4361 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4362 return SDValue(Existing, InN.getResNo()); 4363 4364 // Nope it doesn't. Remove the node from its current place in the maps. 4365 if (InsertPos) 4366 if (!RemoveNodeFromCSEMaps(N)) 4367 InsertPos = 0; 4368 4369 // Now we update the operands. 4370 N->OperandList[0].set(Op); 4371 4372 // If this gets put into a CSE map, add it. 4373 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4374 return InN; 4375} 4376 4377SDValue SelectionDAG:: 4378UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4379 SDNode *N = InN.getNode(); 4380 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4381 4382 // Check to see if there is no change. 4383 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4384 return InN; // No operands changed, just return the input node. 4385 4386 // See if the modified node already exists. 4387 void *InsertPos = 0; 4388 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4389 return SDValue(Existing, InN.getResNo()); 4390 4391 // Nope it doesn't. Remove the node from its current place in the maps. 4392 if (InsertPos) 4393 if (!RemoveNodeFromCSEMaps(N)) 4394 InsertPos = 0; 4395 4396 // Now we update the operands. 4397 if (N->OperandList[0] != Op1) 4398 N->OperandList[0].set(Op1); 4399 if (N->OperandList[1] != Op2) 4400 N->OperandList[1].set(Op2); 4401 4402 // If this gets put into a CSE map, add it. 4403 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4404 return InN; 4405} 4406 4407SDValue SelectionDAG:: 4408UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4409 SDValue Ops[] = { Op1, Op2, Op3 }; 4410 return UpdateNodeOperands(N, Ops, 3); 4411} 4412 4413SDValue SelectionDAG:: 4414UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4415 SDValue Op3, SDValue Op4) { 4416 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4417 return UpdateNodeOperands(N, Ops, 4); 4418} 4419 4420SDValue SelectionDAG:: 4421UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4422 SDValue Op3, SDValue Op4, SDValue Op5) { 4423 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4424 return UpdateNodeOperands(N, Ops, 5); 4425} 4426 4427SDValue SelectionDAG:: 4428UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4429 SDNode *N = InN.getNode(); 4430 assert(N->getNumOperands() == NumOps && 4431 "Update with wrong number of operands"); 4432 4433 // Check to see if there is no change. 4434 bool AnyChange = false; 4435 for (unsigned i = 0; i != NumOps; ++i) { 4436 if (Ops[i] != N->getOperand(i)) { 4437 AnyChange = true; 4438 break; 4439 } 4440 } 4441 4442 // No operands changed, just return the input node. 4443 if (!AnyChange) return InN; 4444 4445 // See if the modified node already exists. 4446 void *InsertPos = 0; 4447 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4448 return SDValue(Existing, InN.getResNo()); 4449 4450 // Nope it doesn't. Remove the node from its current place in the maps. 4451 if (InsertPos) 4452 if (!RemoveNodeFromCSEMaps(N)) 4453 InsertPos = 0; 4454 4455 // Now we update the operands. 4456 for (unsigned i = 0; i != NumOps; ++i) 4457 if (N->OperandList[i] != Ops[i]) 4458 N->OperandList[i].set(Ops[i]); 4459 4460 // If this gets put into a CSE map, add it. 4461 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4462 return InN; 4463} 4464 4465/// DropOperands - Release the operands and set this node to have 4466/// zero operands. 4467void SDNode::DropOperands() { 4468 // Unlike the code in MorphNodeTo that does this, we don't need to 4469 // watch for dead nodes here. 4470 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4471 SDUse &Use = *I++; 4472 Use.set(SDValue()); 4473 } 4474} 4475 4476/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4477/// machine opcode. 4478/// 4479SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4480 EVT VT) { 4481 SDVTList VTs = getVTList(VT); 4482 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4483} 4484 4485SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4486 EVT VT, SDValue Op1) { 4487 SDVTList VTs = getVTList(VT); 4488 SDValue Ops[] = { Op1 }; 4489 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4490} 4491 4492SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4493 EVT VT, SDValue Op1, 4494 SDValue Op2) { 4495 SDVTList VTs = getVTList(VT); 4496 SDValue Ops[] = { Op1, Op2 }; 4497 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4498} 4499 4500SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4501 EVT VT, SDValue Op1, 4502 SDValue Op2, SDValue Op3) { 4503 SDVTList VTs = getVTList(VT); 4504 SDValue Ops[] = { Op1, Op2, Op3 }; 4505 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4506} 4507 4508SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4509 EVT VT, const SDValue *Ops, 4510 unsigned NumOps) { 4511 SDVTList VTs = getVTList(VT); 4512 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4513} 4514 4515SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4516 EVT VT1, EVT VT2, const SDValue *Ops, 4517 unsigned NumOps) { 4518 SDVTList VTs = getVTList(VT1, VT2); 4519 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4520} 4521 4522SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4523 EVT VT1, EVT VT2) { 4524 SDVTList VTs = getVTList(VT1, VT2); 4525 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4526} 4527 4528SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4529 EVT VT1, EVT VT2, EVT VT3, 4530 const SDValue *Ops, unsigned NumOps) { 4531 SDVTList VTs = getVTList(VT1, VT2, VT3); 4532 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4533} 4534 4535SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4536 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4537 const SDValue *Ops, unsigned NumOps) { 4538 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4539 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4540} 4541 4542SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4543 EVT VT1, EVT VT2, 4544 SDValue Op1) { 4545 SDVTList VTs = getVTList(VT1, VT2); 4546 SDValue Ops[] = { Op1 }; 4547 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4548} 4549 4550SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4551 EVT VT1, EVT VT2, 4552 SDValue Op1, SDValue Op2) { 4553 SDVTList VTs = getVTList(VT1, VT2); 4554 SDValue Ops[] = { Op1, Op2 }; 4555 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4556} 4557 4558SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4559 EVT VT1, EVT VT2, 4560 SDValue Op1, SDValue Op2, 4561 SDValue Op3) { 4562 SDVTList VTs = getVTList(VT1, VT2); 4563 SDValue Ops[] = { Op1, Op2, Op3 }; 4564 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4565} 4566 4567SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4568 EVT VT1, EVT VT2, EVT VT3, 4569 SDValue Op1, SDValue Op2, 4570 SDValue Op3) { 4571 SDVTList VTs = getVTList(VT1, VT2, VT3); 4572 SDValue Ops[] = { Op1, Op2, Op3 }; 4573 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4574} 4575 4576SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4577 SDVTList VTs, const SDValue *Ops, 4578 unsigned NumOps) { 4579 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4580 // Reset the NodeID to -1. 4581 N->setNodeId(-1); 4582 return N; 4583} 4584 4585SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4586 EVT VT) { 4587 SDVTList VTs = getVTList(VT); 4588 return MorphNodeTo(N, Opc, VTs, 0, 0); 4589} 4590 4591SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4592 EVT VT, SDValue Op1) { 4593 SDVTList VTs = getVTList(VT); 4594 SDValue Ops[] = { Op1 }; 4595 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4596} 4597 4598SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4599 EVT VT, SDValue Op1, 4600 SDValue Op2) { 4601 SDVTList VTs = getVTList(VT); 4602 SDValue Ops[] = { Op1, Op2 }; 4603 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4604} 4605 4606SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4607 EVT VT, SDValue Op1, 4608 SDValue Op2, SDValue Op3) { 4609 SDVTList VTs = getVTList(VT); 4610 SDValue Ops[] = { Op1, Op2, Op3 }; 4611 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4612} 4613 4614SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4615 EVT VT, const SDValue *Ops, 4616 unsigned NumOps) { 4617 SDVTList VTs = getVTList(VT); 4618 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4619} 4620 4621SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4622 EVT VT1, EVT VT2, const SDValue *Ops, 4623 unsigned NumOps) { 4624 SDVTList VTs = getVTList(VT1, VT2); 4625 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4626} 4627 4628SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4629 EVT VT1, EVT VT2) { 4630 SDVTList VTs = getVTList(VT1, VT2); 4631 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4632} 4633 4634SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4635 EVT VT1, EVT VT2, EVT VT3, 4636 const SDValue *Ops, unsigned NumOps) { 4637 SDVTList VTs = getVTList(VT1, VT2, VT3); 4638 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4639} 4640 4641SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4642 EVT VT1, EVT VT2, 4643 SDValue Op1) { 4644 SDVTList VTs = getVTList(VT1, VT2); 4645 SDValue Ops[] = { Op1 }; 4646 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4647} 4648 4649SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4650 EVT VT1, EVT VT2, 4651 SDValue Op1, SDValue Op2) { 4652 SDVTList VTs = getVTList(VT1, VT2); 4653 SDValue Ops[] = { Op1, Op2 }; 4654 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4655} 4656 4657SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4658 EVT VT1, EVT VT2, 4659 SDValue Op1, SDValue Op2, 4660 SDValue Op3) { 4661 SDVTList VTs = getVTList(VT1, VT2); 4662 SDValue Ops[] = { Op1, Op2, Op3 }; 4663 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4664} 4665 4666/// MorphNodeTo - These *mutate* the specified node to have the specified 4667/// return type, opcode, and operands. 4668/// 4669/// Note that MorphNodeTo returns the resultant node. If there is already a 4670/// node of the specified opcode and operands, it returns that node instead of 4671/// the current one. Note that the DebugLoc need not be the same. 4672/// 4673/// Using MorphNodeTo is faster than creating a new node and swapping it in 4674/// with ReplaceAllUsesWith both because it often avoids allocating a new 4675/// node, and because it doesn't require CSE recalculation for any of 4676/// the node's users. 4677/// 4678SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4679 SDVTList VTs, const SDValue *Ops, 4680 unsigned NumOps) { 4681 // If an identical node already exists, use it. 4682 void *IP = 0; 4683 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4684 FoldingSetNodeID ID; 4685 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4686 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4687 return ON; 4688 } 4689 4690 if (!RemoveNodeFromCSEMaps(N)) 4691 IP = 0; 4692 4693 // Start the morphing. 4694 N->NodeType = Opc; 4695 N->ValueList = VTs.VTs; 4696 N->NumValues = VTs.NumVTs; 4697 4698 // Clear the operands list, updating used nodes to remove this from their 4699 // use list. Keep track of any operands that become dead as a result. 4700 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4701 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4702 SDUse &Use = *I++; 4703 SDNode *Used = Use.getNode(); 4704 Use.set(SDValue()); 4705 if (Used->use_empty()) 4706 DeadNodeSet.insert(Used); 4707 } 4708 4709 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4710 // Initialize the memory references information. 4711 MN->setMemRefs(0, 0); 4712 // If NumOps is larger than the # of operands we can have in a 4713 // MachineSDNode, reallocate the operand list. 4714 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4715 if (MN->OperandsNeedDelete) 4716 delete[] MN->OperandList; 4717 if (NumOps > array_lengthof(MN->LocalOperands)) 4718 // We're creating a final node that will live unmorphed for the 4719 // remainder of the current SelectionDAG iteration, so we can allocate 4720 // the operands directly out of a pool with no recycling metadata. 4721 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4722 Ops, NumOps); 4723 else 4724 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4725 MN->OperandsNeedDelete = false; 4726 } else 4727 MN->InitOperands(MN->OperandList, Ops, NumOps); 4728 } else { 4729 // If NumOps is larger than the # of operands we currently have, reallocate 4730 // the operand list. 4731 if (NumOps > N->NumOperands) { 4732 if (N->OperandsNeedDelete) 4733 delete[] N->OperandList; 4734 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4735 N->OperandsNeedDelete = true; 4736 } else 4737 N->InitOperands(N->OperandList, Ops, NumOps); 4738 } 4739 4740 // Delete any nodes that are still dead after adding the uses for the 4741 // new operands. 4742 SmallVector<SDNode *, 16> DeadNodes; 4743 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4744 E = DeadNodeSet.end(); I != E; ++I) 4745 if ((*I)->use_empty()) 4746 DeadNodes.push_back(*I); 4747 RemoveDeadNodes(DeadNodes); 4748 4749 if (IP) 4750 CSEMap.InsertNode(N, IP); // Memoize the new node. 4751 return N; 4752} 4753 4754 4755/// getMachineNode - These are used for target selectors to create a new node 4756/// with specified return type(s), MachineInstr opcode, and operands. 4757/// 4758/// Note that getMachineNode returns the resultant node. If there is already a 4759/// node of the specified opcode and operands, it returns that node instead of 4760/// the current one. 4761MachineSDNode * 4762SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4763 SDVTList VTs = getVTList(VT); 4764 return getMachineNode(Opcode, dl, VTs, 0, 0); 4765} 4766 4767MachineSDNode * 4768SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4769 SDVTList VTs = getVTList(VT); 4770 SDValue Ops[] = { Op1 }; 4771 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4772} 4773 4774MachineSDNode * 4775SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4776 SDValue Op1, SDValue Op2) { 4777 SDVTList VTs = getVTList(VT); 4778 SDValue Ops[] = { Op1, Op2 }; 4779 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4780} 4781 4782MachineSDNode * 4783SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4784 SDValue Op1, SDValue Op2, SDValue Op3) { 4785 SDVTList VTs = getVTList(VT); 4786 SDValue Ops[] = { Op1, Op2, Op3 }; 4787 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4788} 4789 4790MachineSDNode * 4791SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4792 const SDValue *Ops, unsigned NumOps) { 4793 SDVTList VTs = getVTList(VT); 4794 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4795} 4796 4797MachineSDNode * 4798SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4799 SDVTList VTs = getVTList(VT1, VT2); 4800 return getMachineNode(Opcode, dl, VTs, 0, 0); 4801} 4802 4803MachineSDNode * 4804SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4805 EVT VT1, EVT VT2, SDValue Op1) { 4806 SDVTList VTs = getVTList(VT1, VT2); 4807 SDValue Ops[] = { Op1 }; 4808 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4809} 4810 4811MachineSDNode * 4812SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4813 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4814 SDVTList VTs = getVTList(VT1, VT2); 4815 SDValue Ops[] = { Op1, Op2 }; 4816 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4817} 4818 4819MachineSDNode * 4820SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4821 EVT VT1, EVT VT2, SDValue Op1, 4822 SDValue Op2, SDValue Op3) { 4823 SDVTList VTs = getVTList(VT1, VT2); 4824 SDValue Ops[] = { Op1, Op2, Op3 }; 4825 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4826} 4827 4828MachineSDNode * 4829SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4830 EVT VT1, EVT VT2, 4831 const SDValue *Ops, unsigned NumOps) { 4832 SDVTList VTs = getVTList(VT1, VT2); 4833 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4834} 4835 4836MachineSDNode * 4837SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4838 EVT VT1, EVT VT2, EVT VT3, 4839 SDValue Op1, SDValue Op2) { 4840 SDVTList VTs = getVTList(VT1, VT2, VT3); 4841 SDValue Ops[] = { Op1, Op2 }; 4842 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4843} 4844 4845MachineSDNode * 4846SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4847 EVT VT1, EVT VT2, EVT VT3, 4848 SDValue Op1, SDValue Op2, SDValue Op3) { 4849 SDVTList VTs = getVTList(VT1, VT2, VT3); 4850 SDValue Ops[] = { Op1, Op2, Op3 }; 4851 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4852} 4853 4854MachineSDNode * 4855SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4856 EVT VT1, EVT VT2, EVT VT3, 4857 const SDValue *Ops, unsigned NumOps) { 4858 SDVTList VTs = getVTList(VT1, VT2, VT3); 4859 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4860} 4861 4862MachineSDNode * 4863SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4864 EVT VT2, EVT VT3, EVT VT4, 4865 const SDValue *Ops, unsigned NumOps) { 4866 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4867 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4868} 4869 4870MachineSDNode * 4871SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4872 const std::vector<EVT> &ResultTys, 4873 const SDValue *Ops, unsigned NumOps) { 4874 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4875 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4876} 4877 4878MachineSDNode * 4879SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4880 const SDValue *Ops, unsigned NumOps) { 4881 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4882 MachineSDNode *N; 4883 void *IP; 4884 4885 if (DoCSE) { 4886 FoldingSetNodeID ID; 4887 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4888 IP = 0; 4889 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4890 return cast<MachineSDNode>(E); 4891 } 4892 4893 // Allocate a new MachineSDNode. 4894 N = NodeAllocator.Allocate<MachineSDNode>(); 4895 new (N) MachineSDNode(~Opcode, DL, VTs); 4896 4897 // Initialize the operands list. 4898 if (NumOps > array_lengthof(N->LocalOperands)) 4899 // We're creating a final node that will live unmorphed for the 4900 // remainder of the current SelectionDAG iteration, so we can allocate 4901 // the operands directly out of a pool with no recycling metadata. 4902 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4903 Ops, NumOps); 4904 else 4905 N->InitOperands(N->LocalOperands, Ops, NumOps); 4906 N->OperandsNeedDelete = false; 4907 4908 if (DoCSE) 4909 CSEMap.InsertNode(N, IP); 4910 4911 AllNodes.push_back(N); 4912#ifndef NDEBUG 4913 VerifyNode(N); 4914#endif 4915 return N; 4916} 4917 4918/// getTargetExtractSubreg - A convenience function for creating 4919/// TargetOpcode::EXTRACT_SUBREG nodes. 4920SDValue 4921SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4922 SDValue Operand) { 4923 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4924 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4925 VT, Operand, SRIdxVal); 4926 return SDValue(Subreg, 0); 4927} 4928 4929/// getTargetInsertSubreg - A convenience function for creating 4930/// TargetOpcode::INSERT_SUBREG nodes. 4931SDValue 4932SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4933 SDValue Operand, SDValue Subreg) { 4934 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4935 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4936 VT, Operand, Subreg, SRIdxVal); 4937 return SDValue(Result, 0); 4938} 4939 4940/// getNodeIfExists - Get the specified node if it's already available, or 4941/// else return NULL. 4942SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4943 const SDValue *Ops, unsigned NumOps) { 4944 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4945 FoldingSetNodeID ID; 4946 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4947 void *IP = 0; 4948 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4949 return E; 4950 } 4951 return NULL; 4952} 4953 4954/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4955/// This can cause recursive merging of nodes in the DAG. 4956/// 4957/// This version assumes From has a single result value. 4958/// 4959void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4960 DAGUpdateListener *UpdateListener) { 4961 SDNode *From = FromN.getNode(); 4962 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4963 "Cannot replace with this method!"); 4964 assert(From != To.getNode() && "Cannot replace uses of with self"); 4965 4966 // Iterate over all the existing uses of From. New uses will be added 4967 // to the beginning of the use list, which we avoid visiting. 4968 // This specifically avoids visiting uses of From that arise while the 4969 // replacement is happening, because any such uses would be the result 4970 // of CSE: If an existing node looks like From after one of its operands 4971 // is replaced by To, we don't want to replace of all its users with To 4972 // too. See PR3018 for more info. 4973 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4974 while (UI != UE) { 4975 SDNode *User = *UI; 4976 4977 // This node is about to morph, remove its old self from the CSE maps. 4978 RemoveNodeFromCSEMaps(User); 4979 4980 // A user can appear in a use list multiple times, and when this 4981 // happens the uses are usually next to each other in the list. 4982 // To help reduce the number of CSE recomputations, process all 4983 // the uses of this user that we can find this way. 4984 do { 4985 SDUse &Use = UI.getUse(); 4986 ++UI; 4987 Use.set(To); 4988 } while (UI != UE && *UI == User); 4989 4990 // Now that we have modified User, add it back to the CSE maps. If it 4991 // already exists there, recursively merge the results together. 4992 AddModifiedNodeToCSEMaps(User, UpdateListener); 4993 } 4994} 4995 4996/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4997/// This can cause recursive merging of nodes in the DAG. 4998/// 4999/// This version assumes that for each value of From, there is a 5000/// corresponding value in To in the same position with the same type. 5001/// 5002void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5003 DAGUpdateListener *UpdateListener) { 5004#ifndef NDEBUG 5005 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5006 assert((!From->hasAnyUseOfValue(i) || 5007 From->getValueType(i) == To->getValueType(i)) && 5008 "Cannot use this version of ReplaceAllUsesWith!"); 5009#endif 5010 5011 // Handle the trivial case. 5012 if (From == To) 5013 return; 5014 5015 // Iterate over just the existing users of From. See the comments in 5016 // the ReplaceAllUsesWith above. 5017 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5018 while (UI != UE) { 5019 SDNode *User = *UI; 5020 5021 // This node is about to morph, remove its old self from the CSE maps. 5022 RemoveNodeFromCSEMaps(User); 5023 5024 // A user can appear in a use list multiple times, and when this 5025 // happens the uses are usually next to each other in the list. 5026 // To help reduce the number of CSE recomputations, process all 5027 // the uses of this user that we can find this way. 5028 do { 5029 SDUse &Use = UI.getUse(); 5030 ++UI; 5031 Use.setNode(To); 5032 } while (UI != UE && *UI == User); 5033 5034 // Now that we have modified User, add it back to the CSE maps. If it 5035 // already exists there, recursively merge the results together. 5036 AddModifiedNodeToCSEMaps(User, UpdateListener); 5037 } 5038} 5039 5040/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5041/// This can cause recursive merging of nodes in the DAG. 5042/// 5043/// This version can replace From with any result values. To must match the 5044/// number and types of values returned by From. 5045void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5046 const SDValue *To, 5047 DAGUpdateListener *UpdateListener) { 5048 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5049 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5050 5051 // Iterate over just the existing users of From. See the comments in 5052 // the ReplaceAllUsesWith above. 5053 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5054 while (UI != UE) { 5055 SDNode *User = *UI; 5056 5057 // This node is about to morph, remove its old self from the CSE maps. 5058 RemoveNodeFromCSEMaps(User); 5059 5060 // A user can appear in a use list multiple times, and when this 5061 // happens the uses are usually next to each other in the list. 5062 // To help reduce the number of CSE recomputations, process all 5063 // the uses of this user that we can find this way. 5064 do { 5065 SDUse &Use = UI.getUse(); 5066 const SDValue &ToOp = To[Use.getResNo()]; 5067 ++UI; 5068 Use.set(ToOp); 5069 } while (UI != UE && *UI == User); 5070 5071 // Now that we have modified User, add it back to the CSE maps. If it 5072 // already exists there, recursively merge the results together. 5073 AddModifiedNodeToCSEMaps(User, UpdateListener); 5074 } 5075} 5076 5077/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5078/// uses of other values produced by From.getNode() alone. The Deleted 5079/// vector is handled the same way as for ReplaceAllUsesWith. 5080void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5081 DAGUpdateListener *UpdateListener){ 5082 // Handle the really simple, really trivial case efficiently. 5083 if (From == To) return; 5084 5085 // Handle the simple, trivial, case efficiently. 5086 if (From.getNode()->getNumValues() == 1) { 5087 ReplaceAllUsesWith(From, To, UpdateListener); 5088 return; 5089 } 5090 5091 // Iterate over just the existing users of From. See the comments in 5092 // the ReplaceAllUsesWith above. 5093 SDNode::use_iterator UI = From.getNode()->use_begin(), 5094 UE = From.getNode()->use_end(); 5095 while (UI != UE) { 5096 SDNode *User = *UI; 5097 bool UserRemovedFromCSEMaps = false; 5098 5099 // A user can appear in a use list multiple times, and when this 5100 // happens the uses are usually next to each other in the list. 5101 // To help reduce the number of CSE recomputations, process all 5102 // the uses of this user that we can find this way. 5103 do { 5104 SDUse &Use = UI.getUse(); 5105 5106 // Skip uses of different values from the same node. 5107 if (Use.getResNo() != From.getResNo()) { 5108 ++UI; 5109 continue; 5110 } 5111 5112 // If this node hasn't been modified yet, it's still in the CSE maps, 5113 // so remove its old self from the CSE maps. 5114 if (!UserRemovedFromCSEMaps) { 5115 RemoveNodeFromCSEMaps(User); 5116 UserRemovedFromCSEMaps = true; 5117 } 5118 5119 ++UI; 5120 Use.set(To); 5121 } while (UI != UE && *UI == User); 5122 5123 // We are iterating over all uses of the From node, so if a use 5124 // doesn't use the specific value, no changes are made. 5125 if (!UserRemovedFromCSEMaps) 5126 continue; 5127 5128 // Now that we have modified User, add it back to the CSE maps. If it 5129 // already exists there, recursively merge the results together. 5130 AddModifiedNodeToCSEMaps(User, UpdateListener); 5131 } 5132} 5133 5134namespace { 5135 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5136 /// to record information about a use. 5137 struct UseMemo { 5138 SDNode *User; 5139 unsigned Index; 5140 SDUse *Use; 5141 }; 5142 5143 /// operator< - Sort Memos by User. 5144 bool operator<(const UseMemo &L, const UseMemo &R) { 5145 return (intptr_t)L.User < (intptr_t)R.User; 5146 } 5147} 5148 5149/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5150/// uses of other values produced by From.getNode() alone. The same value 5151/// may appear in both the From and To list. The Deleted vector is 5152/// handled the same way as for ReplaceAllUsesWith. 5153void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5154 const SDValue *To, 5155 unsigned Num, 5156 DAGUpdateListener *UpdateListener){ 5157 // Handle the simple, trivial case efficiently. 5158 if (Num == 1) 5159 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5160 5161 // Read up all the uses and make records of them. This helps 5162 // processing new uses that are introduced during the 5163 // replacement process. 5164 SmallVector<UseMemo, 4> Uses; 5165 for (unsigned i = 0; i != Num; ++i) { 5166 unsigned FromResNo = From[i].getResNo(); 5167 SDNode *FromNode = From[i].getNode(); 5168 for (SDNode::use_iterator UI = FromNode->use_begin(), 5169 E = FromNode->use_end(); UI != E; ++UI) { 5170 SDUse &Use = UI.getUse(); 5171 if (Use.getResNo() == FromResNo) { 5172 UseMemo Memo = { *UI, i, &Use }; 5173 Uses.push_back(Memo); 5174 } 5175 } 5176 } 5177 5178 // Sort the uses, so that all the uses from a given User are together. 5179 std::sort(Uses.begin(), Uses.end()); 5180 5181 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5182 UseIndex != UseIndexEnd; ) { 5183 // We know that this user uses some value of From. If it is the right 5184 // value, update it. 5185 SDNode *User = Uses[UseIndex].User; 5186 5187 // This node is about to morph, remove its old self from the CSE maps. 5188 RemoveNodeFromCSEMaps(User); 5189 5190 // The Uses array is sorted, so all the uses for a given User 5191 // are next to each other in the list. 5192 // To help reduce the number of CSE recomputations, process all 5193 // the uses of this user that we can find this way. 5194 do { 5195 unsigned i = Uses[UseIndex].Index; 5196 SDUse &Use = *Uses[UseIndex].Use; 5197 ++UseIndex; 5198 5199 Use.set(To[i]); 5200 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5201 5202 // Now that we have modified User, add it back to the CSE maps. If it 5203 // already exists there, recursively merge the results together. 5204 AddModifiedNodeToCSEMaps(User, UpdateListener); 5205 } 5206} 5207 5208/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5209/// based on their topological order. It returns the maximum id and a vector 5210/// of the SDNodes* in assigned order by reference. 5211unsigned SelectionDAG::AssignTopologicalOrder() { 5212 5213 unsigned DAGSize = 0; 5214 5215 // SortedPos tracks the progress of the algorithm. Nodes before it are 5216 // sorted, nodes after it are unsorted. When the algorithm completes 5217 // it is at the end of the list. 5218 allnodes_iterator SortedPos = allnodes_begin(); 5219 5220 // Visit all the nodes. Move nodes with no operands to the front of 5221 // the list immediately. Annotate nodes that do have operands with their 5222 // operand count. Before we do this, the Node Id fields of the nodes 5223 // may contain arbitrary values. After, the Node Id fields for nodes 5224 // before SortedPos will contain the topological sort index, and the 5225 // Node Id fields for nodes At SortedPos and after will contain the 5226 // count of outstanding operands. 5227 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5228 SDNode *N = I++; 5229 checkForCycles(N); 5230 unsigned Degree = N->getNumOperands(); 5231 if (Degree == 0) { 5232 // A node with no uses, add it to the result array immediately. 5233 N->setNodeId(DAGSize++); 5234 allnodes_iterator Q = N; 5235 if (Q != SortedPos) 5236 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5237 assert(SortedPos != AllNodes.end() && "Overran node list"); 5238 ++SortedPos; 5239 } else { 5240 // Temporarily use the Node Id as scratch space for the degree count. 5241 N->setNodeId(Degree); 5242 } 5243 } 5244 5245 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5246 // such that by the time the end is reached all nodes will be sorted. 5247 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5248 SDNode *N = I; 5249 checkForCycles(N); 5250 // N is in sorted position, so all its uses have one less operand 5251 // that needs to be sorted. 5252 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5253 UI != UE; ++UI) { 5254 SDNode *P = *UI; 5255 unsigned Degree = P->getNodeId(); 5256 assert(Degree != 0 && "Invalid node degree"); 5257 --Degree; 5258 if (Degree == 0) { 5259 // All of P's operands are sorted, so P may sorted now. 5260 P->setNodeId(DAGSize++); 5261 if (P != SortedPos) 5262 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5263 assert(SortedPos != AllNodes.end() && "Overran node list"); 5264 ++SortedPos; 5265 } else { 5266 // Update P's outstanding operand count. 5267 P->setNodeId(Degree); 5268 } 5269 } 5270 if (I == SortedPos) { 5271#ifndef NDEBUG 5272 SDNode *S = ++I; 5273 dbgs() << "Overran sorted position:\n"; 5274 S->dumprFull(); 5275#endif 5276 llvm_unreachable(0); 5277 } 5278 } 5279 5280 assert(SortedPos == AllNodes.end() && 5281 "Topological sort incomplete!"); 5282 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5283 "First node in topological sort is not the entry token!"); 5284 assert(AllNodes.front().getNodeId() == 0 && 5285 "First node in topological sort has non-zero id!"); 5286 assert(AllNodes.front().getNumOperands() == 0 && 5287 "First node in topological sort has operands!"); 5288 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5289 "Last node in topologic sort has unexpected id!"); 5290 assert(AllNodes.back().use_empty() && 5291 "Last node in topologic sort has users!"); 5292 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5293 return DAGSize; 5294} 5295 5296/// AssignOrdering - Assign an order to the SDNode. 5297void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5298 assert(SD && "Trying to assign an order to a null node!"); 5299 Ordering->add(SD, Order); 5300} 5301 5302/// GetOrdering - Get the order for the SDNode. 5303unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5304 assert(SD && "Trying to get the order of a null node!"); 5305 return Ordering->getOrder(SD); 5306} 5307 5308 5309//===----------------------------------------------------------------------===// 5310// SDNode Class 5311//===----------------------------------------------------------------------===// 5312 5313HandleSDNode::~HandleSDNode() { 5314 DropOperands(); 5315} 5316 5317GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5318 EVT VT, int64_t o, unsigned char TF) 5319 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)), 5320 Offset(o), TargetFlags(TF) { 5321 TheGlobal = const_cast<GlobalValue*>(GA); 5322} 5323 5324MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5325 MachineMemOperand *mmo) 5326 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5327 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5328 MMO->isNonTemporal()); 5329 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5330 assert(isNonTemporal() == MMO->isNonTemporal() && 5331 "Non-temporal encoding error!"); 5332 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5333} 5334 5335MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5336 const SDValue *Ops, unsigned NumOps, EVT memvt, 5337 MachineMemOperand *mmo) 5338 : SDNode(Opc, dl, VTs, Ops, NumOps), 5339 MemoryVT(memvt), MMO(mmo) { 5340 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5341 MMO->isNonTemporal()); 5342 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5343 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5344} 5345 5346/// Profile - Gather unique data for the node. 5347/// 5348void SDNode::Profile(FoldingSetNodeID &ID) const { 5349 AddNodeIDNode(ID, this); 5350} 5351 5352namespace { 5353 struct EVTArray { 5354 std::vector<EVT> VTs; 5355 5356 EVTArray() { 5357 VTs.reserve(MVT::LAST_VALUETYPE); 5358 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5359 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5360 } 5361 }; 5362} 5363 5364static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5365static ManagedStatic<EVTArray> SimpleVTArray; 5366static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5367 5368/// getValueTypeList - Return a pointer to the specified value type. 5369/// 5370const EVT *SDNode::getValueTypeList(EVT VT) { 5371 if (VT.isExtended()) { 5372 sys::SmartScopedLock<true> Lock(*VTMutex); 5373 return &(*EVTs->insert(VT).first); 5374 } else { 5375 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5376 } 5377} 5378 5379/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5380/// indicated value. This method ignores uses of other values defined by this 5381/// operation. 5382bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5383 assert(Value < getNumValues() && "Bad value!"); 5384 5385 // TODO: Only iterate over uses of a given value of the node 5386 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5387 if (UI.getUse().getResNo() == Value) { 5388 if (NUses == 0) 5389 return false; 5390 --NUses; 5391 } 5392 } 5393 5394 // Found exactly the right number of uses? 5395 return NUses == 0; 5396} 5397 5398 5399/// hasAnyUseOfValue - Return true if there are any use of the indicated 5400/// value. This method ignores uses of other values defined by this operation. 5401bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5402 assert(Value < getNumValues() && "Bad value!"); 5403 5404 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5405 if (UI.getUse().getResNo() == Value) 5406 return true; 5407 5408 return false; 5409} 5410 5411 5412/// isOnlyUserOf - Return true if this node is the only use of N. 5413/// 5414bool SDNode::isOnlyUserOf(SDNode *N) const { 5415 bool Seen = false; 5416 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5417 SDNode *User = *I; 5418 if (User == this) 5419 Seen = true; 5420 else 5421 return false; 5422 } 5423 5424 return Seen; 5425} 5426 5427/// isOperand - Return true if this node is an operand of N. 5428/// 5429bool SDValue::isOperandOf(SDNode *N) const { 5430 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5431 if (*this == N->getOperand(i)) 5432 return true; 5433 return false; 5434} 5435 5436bool SDNode::isOperandOf(SDNode *N) const { 5437 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5438 if (this == N->OperandList[i].getNode()) 5439 return true; 5440 return false; 5441} 5442 5443/// reachesChainWithoutSideEffects - Return true if this operand (which must 5444/// be a chain) reaches the specified operand without crossing any 5445/// side-effecting instructions. In practice, this looks through token 5446/// factors and non-volatile loads. In order to remain efficient, this only 5447/// looks a couple of nodes in, it does not do an exhaustive search. 5448bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5449 unsigned Depth) const { 5450 if (*this == Dest) return true; 5451 5452 // Don't search too deeply, we just want to be able to see through 5453 // TokenFactor's etc. 5454 if (Depth == 0) return false; 5455 5456 // If this is a token factor, all inputs to the TF happen in parallel. If any 5457 // of the operands of the TF reach dest, then we can do the xform. 5458 if (getOpcode() == ISD::TokenFactor) { 5459 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5460 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5461 return true; 5462 return false; 5463 } 5464 5465 // Loads don't have side effects, look through them. 5466 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5467 if (!Ld->isVolatile()) 5468 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5469 } 5470 return false; 5471} 5472 5473/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5474/// is either an operand of N or it can be reached by traversing up the operands. 5475/// NOTE: this is an expensive method. Use it carefully. 5476bool SDNode::isPredecessorOf(SDNode *N) const { 5477 SmallPtrSet<SDNode *, 32> Visited; 5478 SmallVector<SDNode *, 16> Worklist; 5479 Worklist.push_back(N); 5480 5481 do { 5482 N = Worklist.pop_back_val(); 5483 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5484 SDNode *Op = N->getOperand(i).getNode(); 5485 if (Op == this) 5486 return true; 5487 if (Visited.insert(Op)) 5488 Worklist.push_back(Op); 5489 } 5490 } while (!Worklist.empty()); 5491 5492 return false; 5493} 5494 5495uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5496 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5497 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5498} 5499 5500std::string SDNode::getOperationName(const SelectionDAG *G) const { 5501 switch (getOpcode()) { 5502 default: 5503 if (getOpcode() < ISD::BUILTIN_OP_END) 5504 return "<<Unknown DAG Node>>"; 5505 if (isMachineOpcode()) { 5506 if (G) 5507 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5508 if (getMachineOpcode() < TII->getNumOpcodes()) 5509 return TII->get(getMachineOpcode()).getName(); 5510 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5511 } 5512 if (G) { 5513 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5514 const char *Name = TLI.getTargetNodeName(getOpcode()); 5515 if (Name) return Name; 5516 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5517 } 5518 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5519 5520#ifndef NDEBUG 5521 case ISD::DELETED_NODE: 5522 return "<<Deleted Node!>>"; 5523#endif 5524 case ISD::PREFETCH: return "Prefetch"; 5525 case ISD::MEMBARRIER: return "MemBarrier"; 5526 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5527 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5528 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5529 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5530 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5531 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5532 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5533 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5534 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5535 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5536 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5537 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5538 case ISD::PCMARKER: return "PCMarker"; 5539 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5540 case ISD::SRCVALUE: return "SrcValue"; 5541 case ISD::EntryToken: return "EntryToken"; 5542 case ISD::TokenFactor: return "TokenFactor"; 5543 case ISD::AssertSext: return "AssertSext"; 5544 case ISD::AssertZext: return "AssertZext"; 5545 5546 case ISD::BasicBlock: return "BasicBlock"; 5547 case ISD::VALUETYPE: return "ValueType"; 5548 case ISD::Register: return "Register"; 5549 5550 case ISD::Constant: return "Constant"; 5551 case ISD::ConstantFP: return "ConstantFP"; 5552 case ISD::GlobalAddress: return "GlobalAddress"; 5553 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5554 case ISD::FrameIndex: return "FrameIndex"; 5555 case ISD::JumpTable: return "JumpTable"; 5556 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5557 case ISD::RETURNADDR: return "RETURNADDR"; 5558 case ISD::FRAMEADDR: return "FRAMEADDR"; 5559 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5560 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5561 case ISD::LSDAADDR: return "LSDAADDR"; 5562 case ISD::EHSELECTION: return "EHSELECTION"; 5563 case ISD::EH_RETURN: return "EH_RETURN"; 5564 case ISD::ConstantPool: return "ConstantPool"; 5565 case ISD::ExternalSymbol: return "ExternalSymbol"; 5566 case ISD::BlockAddress: return "BlockAddress"; 5567 case ISD::INTRINSIC_WO_CHAIN: 5568 case ISD::INTRINSIC_VOID: 5569 case ISD::INTRINSIC_W_CHAIN: { 5570 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5571 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5572 if (IID < Intrinsic::num_intrinsics) 5573 return Intrinsic::getName((Intrinsic::ID)IID); 5574 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5575 return TII->getName(IID); 5576 llvm_unreachable("Invalid intrinsic ID"); 5577 } 5578 5579 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5580 case ISD::TargetConstant: return "TargetConstant"; 5581 case ISD::TargetConstantFP:return "TargetConstantFP"; 5582 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5583 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5584 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5585 case ISD::TargetJumpTable: return "TargetJumpTable"; 5586 case ISD::TargetConstantPool: return "TargetConstantPool"; 5587 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5588 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5589 5590 case ISD::CopyToReg: return "CopyToReg"; 5591 case ISD::CopyFromReg: return "CopyFromReg"; 5592 case ISD::UNDEF: return "undef"; 5593 case ISD::MERGE_VALUES: return "merge_values"; 5594 case ISD::INLINEASM: return "inlineasm"; 5595 case ISD::EH_LABEL: return "eh_label"; 5596 case ISD::HANDLENODE: return "handlenode"; 5597 5598 // Unary operators 5599 case ISD::FABS: return "fabs"; 5600 case ISD::FNEG: return "fneg"; 5601 case ISD::FSQRT: return "fsqrt"; 5602 case ISD::FSIN: return "fsin"; 5603 case ISD::FCOS: return "fcos"; 5604 case ISD::FPOWI: return "fpowi"; 5605 case ISD::FPOW: return "fpow"; 5606 case ISD::FTRUNC: return "ftrunc"; 5607 case ISD::FFLOOR: return "ffloor"; 5608 case ISD::FCEIL: return "fceil"; 5609 case ISD::FRINT: return "frint"; 5610 case ISD::FNEARBYINT: return "fnearbyint"; 5611 5612 // Binary operators 5613 case ISD::ADD: return "add"; 5614 case ISD::SUB: return "sub"; 5615 case ISD::MUL: return "mul"; 5616 case ISD::MULHU: return "mulhu"; 5617 case ISD::MULHS: return "mulhs"; 5618 case ISD::SDIV: return "sdiv"; 5619 case ISD::UDIV: return "udiv"; 5620 case ISD::SREM: return "srem"; 5621 case ISD::UREM: return "urem"; 5622 case ISD::SMUL_LOHI: return "smul_lohi"; 5623 case ISD::UMUL_LOHI: return "umul_lohi"; 5624 case ISD::SDIVREM: return "sdivrem"; 5625 case ISD::UDIVREM: return "udivrem"; 5626 case ISD::AND: return "and"; 5627 case ISD::OR: return "or"; 5628 case ISD::XOR: return "xor"; 5629 case ISD::SHL: return "shl"; 5630 case ISD::SRA: return "sra"; 5631 case ISD::SRL: return "srl"; 5632 case ISD::ROTL: return "rotl"; 5633 case ISD::ROTR: return "rotr"; 5634 case ISD::FADD: return "fadd"; 5635 case ISD::FSUB: return "fsub"; 5636 case ISD::FMUL: return "fmul"; 5637 case ISD::FDIV: return "fdiv"; 5638 case ISD::FREM: return "frem"; 5639 case ISD::FCOPYSIGN: return "fcopysign"; 5640 case ISD::FGETSIGN: return "fgetsign"; 5641 5642 case ISD::SETCC: return "setcc"; 5643 case ISD::VSETCC: return "vsetcc"; 5644 case ISD::SELECT: return "select"; 5645 case ISD::SELECT_CC: return "select_cc"; 5646 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5647 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5648 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5649 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5650 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5651 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5652 case ISD::CARRY_FALSE: return "carry_false"; 5653 case ISD::ADDC: return "addc"; 5654 case ISD::ADDE: return "adde"; 5655 case ISD::SADDO: return "saddo"; 5656 case ISD::UADDO: return "uaddo"; 5657 case ISD::SSUBO: return "ssubo"; 5658 case ISD::USUBO: return "usubo"; 5659 case ISD::SMULO: return "smulo"; 5660 case ISD::UMULO: return "umulo"; 5661 case ISD::SUBC: return "subc"; 5662 case ISD::SUBE: return "sube"; 5663 case ISD::SHL_PARTS: return "shl_parts"; 5664 case ISD::SRA_PARTS: return "sra_parts"; 5665 case ISD::SRL_PARTS: return "srl_parts"; 5666 5667 // Conversion operators. 5668 case ISD::SIGN_EXTEND: return "sign_extend"; 5669 case ISD::ZERO_EXTEND: return "zero_extend"; 5670 case ISD::ANY_EXTEND: return "any_extend"; 5671 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5672 case ISD::TRUNCATE: return "truncate"; 5673 case ISD::FP_ROUND: return "fp_round"; 5674 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5675 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5676 case ISD::FP_EXTEND: return "fp_extend"; 5677 5678 case ISD::SINT_TO_FP: return "sint_to_fp"; 5679 case ISD::UINT_TO_FP: return "uint_to_fp"; 5680 case ISD::FP_TO_SINT: return "fp_to_sint"; 5681 case ISD::FP_TO_UINT: return "fp_to_uint"; 5682 case ISD::BIT_CONVERT: return "bit_convert"; 5683 5684 case ISD::CONVERT_RNDSAT: { 5685 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5686 default: llvm_unreachable("Unknown cvt code!"); 5687 case ISD::CVT_FF: return "cvt_ff"; 5688 case ISD::CVT_FS: return "cvt_fs"; 5689 case ISD::CVT_FU: return "cvt_fu"; 5690 case ISD::CVT_SF: return "cvt_sf"; 5691 case ISD::CVT_UF: return "cvt_uf"; 5692 case ISD::CVT_SS: return "cvt_ss"; 5693 case ISD::CVT_SU: return "cvt_su"; 5694 case ISD::CVT_US: return "cvt_us"; 5695 case ISD::CVT_UU: return "cvt_uu"; 5696 } 5697 } 5698 5699 // Control flow instructions 5700 case ISD::BR: return "br"; 5701 case ISD::BRIND: return "brind"; 5702 case ISD::BR_JT: return "br_jt"; 5703 case ISD::BRCOND: return "brcond"; 5704 case ISD::BR_CC: return "br_cc"; 5705 case ISD::CALLSEQ_START: return "callseq_start"; 5706 case ISD::CALLSEQ_END: return "callseq_end"; 5707 5708 // Other operators 5709 case ISD::LOAD: return "load"; 5710 case ISD::STORE: return "store"; 5711 case ISD::VAARG: return "vaarg"; 5712 case ISD::VACOPY: return "vacopy"; 5713 case ISD::VAEND: return "vaend"; 5714 case ISD::VASTART: return "vastart"; 5715 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5716 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5717 case ISD::BUILD_PAIR: return "build_pair"; 5718 case ISD::STACKSAVE: return "stacksave"; 5719 case ISD::STACKRESTORE: return "stackrestore"; 5720 case ISD::TRAP: return "trap"; 5721 5722 // Bit manipulation 5723 case ISD::BSWAP: return "bswap"; 5724 case ISD::CTPOP: return "ctpop"; 5725 case ISD::CTTZ: return "cttz"; 5726 case ISD::CTLZ: return "ctlz"; 5727 5728 // Trampolines 5729 case ISD::TRAMPOLINE: return "trampoline"; 5730 5731 case ISD::CONDCODE: 5732 switch (cast<CondCodeSDNode>(this)->get()) { 5733 default: llvm_unreachable("Unknown setcc condition!"); 5734 case ISD::SETOEQ: return "setoeq"; 5735 case ISD::SETOGT: return "setogt"; 5736 case ISD::SETOGE: return "setoge"; 5737 case ISD::SETOLT: return "setolt"; 5738 case ISD::SETOLE: return "setole"; 5739 case ISD::SETONE: return "setone"; 5740 5741 case ISD::SETO: return "seto"; 5742 case ISD::SETUO: return "setuo"; 5743 case ISD::SETUEQ: return "setue"; 5744 case ISD::SETUGT: return "setugt"; 5745 case ISD::SETUGE: return "setuge"; 5746 case ISD::SETULT: return "setult"; 5747 case ISD::SETULE: return "setule"; 5748 case ISD::SETUNE: return "setune"; 5749 5750 case ISD::SETEQ: return "seteq"; 5751 case ISD::SETGT: return "setgt"; 5752 case ISD::SETGE: return "setge"; 5753 case ISD::SETLT: return "setlt"; 5754 case ISD::SETLE: return "setle"; 5755 case ISD::SETNE: return "setne"; 5756 } 5757 } 5758} 5759 5760const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5761 switch (AM) { 5762 default: 5763 return ""; 5764 case ISD::PRE_INC: 5765 return "<pre-inc>"; 5766 case ISD::PRE_DEC: 5767 return "<pre-dec>"; 5768 case ISD::POST_INC: 5769 return "<post-inc>"; 5770 case ISD::POST_DEC: 5771 return "<post-dec>"; 5772 } 5773} 5774 5775std::string ISD::ArgFlagsTy::getArgFlagsString() { 5776 std::string S = "< "; 5777 5778 if (isZExt()) 5779 S += "zext "; 5780 if (isSExt()) 5781 S += "sext "; 5782 if (isInReg()) 5783 S += "inreg "; 5784 if (isSRet()) 5785 S += "sret "; 5786 if (isByVal()) 5787 S += "byval "; 5788 if (isNest()) 5789 S += "nest "; 5790 if (getByValAlign()) 5791 S += "byval-align:" + utostr(getByValAlign()) + " "; 5792 if (getOrigAlign()) 5793 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5794 if (getByValSize()) 5795 S += "byval-size:" + utostr(getByValSize()) + " "; 5796 return S + ">"; 5797} 5798 5799void SDNode::dump() const { dump(0); } 5800void SDNode::dump(const SelectionDAG *G) const { 5801 print(dbgs(), G); 5802} 5803 5804void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5805 OS << (void*)this << ": "; 5806 5807 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5808 if (i) OS << ","; 5809 if (getValueType(i) == MVT::Other) 5810 OS << "ch"; 5811 else 5812 OS << getValueType(i).getEVTString(); 5813 } 5814 OS << " = " << getOperationName(G); 5815} 5816 5817void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5818 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5819 if (!MN->memoperands_empty()) { 5820 OS << "<"; 5821 OS << "Mem:"; 5822 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5823 e = MN->memoperands_end(); i != e; ++i) { 5824 OS << **i; 5825 if (next(i) != e) 5826 OS << " "; 5827 } 5828 OS << ">"; 5829 } 5830 } else if (const ShuffleVectorSDNode *SVN = 5831 dyn_cast<ShuffleVectorSDNode>(this)) { 5832 OS << "<"; 5833 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5834 int Idx = SVN->getMaskElt(i); 5835 if (i) OS << ","; 5836 if (Idx < 0) 5837 OS << "u"; 5838 else 5839 OS << Idx; 5840 } 5841 OS << ">"; 5842 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5843 OS << '<' << CSDN->getAPIntValue() << '>'; 5844 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5845 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5846 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5847 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5848 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5849 else { 5850 OS << "<APFloat("; 5851 CSDN->getValueAPF().bitcastToAPInt().dump(); 5852 OS << ")>"; 5853 } 5854 } else if (const GlobalAddressSDNode *GADN = 5855 dyn_cast<GlobalAddressSDNode>(this)) { 5856 int64_t offset = GADN->getOffset(); 5857 OS << '<'; 5858 WriteAsOperand(OS, GADN->getGlobal()); 5859 OS << '>'; 5860 if (offset > 0) 5861 OS << " + " << offset; 5862 else 5863 OS << " " << offset; 5864 if (unsigned int TF = GADN->getTargetFlags()) 5865 OS << " [TF=" << TF << ']'; 5866 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5867 OS << "<" << FIDN->getIndex() << ">"; 5868 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5869 OS << "<" << JTDN->getIndex() << ">"; 5870 if (unsigned int TF = JTDN->getTargetFlags()) 5871 OS << " [TF=" << TF << ']'; 5872 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5873 int offset = CP->getOffset(); 5874 if (CP->isMachineConstantPoolEntry()) 5875 OS << "<" << *CP->getMachineCPVal() << ">"; 5876 else 5877 OS << "<" << *CP->getConstVal() << ">"; 5878 if (offset > 0) 5879 OS << " + " << offset; 5880 else 5881 OS << " " << offset; 5882 if (unsigned int TF = CP->getTargetFlags()) 5883 OS << " [TF=" << TF << ']'; 5884 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5885 OS << "<"; 5886 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5887 if (LBB) 5888 OS << LBB->getName() << " "; 5889 OS << (const void*)BBDN->getBasicBlock() << ">"; 5890 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5891 if (G && R->getReg() && 5892 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5893 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5894 } else { 5895 OS << " %reg" << R->getReg(); 5896 } 5897 } else if (const ExternalSymbolSDNode *ES = 5898 dyn_cast<ExternalSymbolSDNode>(this)) { 5899 OS << "'" << ES->getSymbol() << "'"; 5900 if (unsigned int TF = ES->getTargetFlags()) 5901 OS << " [TF=" << TF << ']'; 5902 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5903 if (M->getValue()) 5904 OS << "<" << M->getValue() << ">"; 5905 else 5906 OS << "<null>"; 5907 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5908 OS << ":" << N->getVT().getEVTString(); 5909 } 5910 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5911 OS << "<" << *LD->getMemOperand(); 5912 5913 bool doExt = true; 5914 switch (LD->getExtensionType()) { 5915 default: doExt = false; break; 5916 case ISD::EXTLOAD: OS << ", anyext"; break; 5917 case ISD::SEXTLOAD: OS << ", sext"; break; 5918 case ISD::ZEXTLOAD: OS << ", zext"; break; 5919 } 5920 if (doExt) 5921 OS << " from " << LD->getMemoryVT().getEVTString(); 5922 5923 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5924 if (*AM) 5925 OS << ", " << AM; 5926 5927 OS << ">"; 5928 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5929 OS << "<" << *ST->getMemOperand(); 5930 5931 if (ST->isTruncatingStore()) 5932 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5933 5934 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5935 if (*AM) 5936 OS << ", " << AM; 5937 5938 OS << ">"; 5939 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5940 OS << "<" << *M->getMemOperand() << ">"; 5941 } else if (const BlockAddressSDNode *BA = 5942 dyn_cast<BlockAddressSDNode>(this)) { 5943 OS << "<"; 5944 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5945 OS << ", "; 5946 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 5947 OS << ">"; 5948 if (unsigned int TF = BA->getTargetFlags()) 5949 OS << " [TF=" << TF << ']'; 5950 } 5951 5952 if (G) 5953 if (unsigned Order = G->GetOrdering(this)) 5954 OS << " [ORD=" << Order << ']'; 5955 5956 if (getNodeId() != -1) 5957 OS << " [ID=" << getNodeId() << ']'; 5958} 5959 5960void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5961 print_types(OS, G); 5962 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5963 if (i) OS << ", "; else OS << " "; 5964 OS << (void*)getOperand(i).getNode(); 5965 if (unsigned RN = getOperand(i).getResNo()) 5966 OS << ":" << RN; 5967 } 5968 print_details(OS, G); 5969} 5970 5971static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 5972 const SelectionDAG *G, unsigned depth, 5973 unsigned indent) 5974{ 5975 if (depth == 0) 5976 return; 5977 5978 OS.indent(indent); 5979 5980 N->print(OS, G); 5981 5982 if (depth < 1) 5983 return; 5984 5985 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5986 OS << '\n'; 5987 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 5988 } 5989} 5990 5991void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 5992 unsigned depth) const { 5993 printrWithDepthHelper(OS, this, G, depth, 0); 5994} 5995 5996void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 5997 // Don't print impossibly deep things. 5998 printrWithDepth(OS, G, 100); 5999} 6000 6001void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6002 printrWithDepth(dbgs(), G, depth); 6003} 6004 6005void SDNode::dumprFull(const SelectionDAG *G) const { 6006 // Don't print impossibly deep things. 6007 dumprWithDepth(G, 100); 6008} 6009 6010static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6011 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6012 if (N->getOperand(i).getNode()->hasOneUse()) 6013 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6014 else 6015 dbgs() << "\n" << std::string(indent+2, ' ') 6016 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6017 6018 6019 dbgs() << "\n"; 6020 dbgs().indent(indent); 6021 N->dump(G); 6022} 6023 6024SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6025 assert(N->getNumValues() == 1 && 6026 "Can't unroll a vector with multiple results!"); 6027 6028 EVT VT = N->getValueType(0); 6029 unsigned NE = VT.getVectorNumElements(); 6030 EVT EltVT = VT.getVectorElementType(); 6031 DebugLoc dl = N->getDebugLoc(); 6032 6033 SmallVector<SDValue, 8> Scalars; 6034 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6035 6036 // If ResNE is 0, fully unroll the vector op. 6037 if (ResNE == 0) 6038 ResNE = NE; 6039 else if (NE > ResNE) 6040 NE = ResNE; 6041 6042 unsigned i; 6043 for (i= 0; i != NE; ++i) { 6044 for (unsigned j = 0; j != N->getNumOperands(); ++j) { 6045 SDValue Operand = N->getOperand(j); 6046 EVT OperandVT = Operand.getValueType(); 6047 if (OperandVT.isVector()) { 6048 // A vector operand; extract a single element. 6049 EVT OperandEltVT = OperandVT.getVectorElementType(); 6050 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6051 OperandEltVT, 6052 Operand, 6053 getConstant(i, MVT::i32)); 6054 } else { 6055 // A scalar operand; just use it as is. 6056 Operands[j] = Operand; 6057 } 6058 } 6059 6060 switch (N->getOpcode()) { 6061 default: 6062 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6063 &Operands[0], Operands.size())); 6064 break; 6065 case ISD::SHL: 6066 case ISD::SRA: 6067 case ISD::SRL: 6068 case ISD::ROTL: 6069 case ISD::ROTR: 6070 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6071 getShiftAmountOperand(Operands[1]))); 6072 break; 6073 case ISD::SIGN_EXTEND_INREG: 6074 case ISD::FP_ROUND_INREG: { 6075 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6076 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6077 Operands[0], 6078 getValueType(ExtVT))); 6079 } 6080 } 6081 } 6082 6083 for (; i < ResNE; ++i) 6084 Scalars.push_back(getUNDEF(EltVT)); 6085 6086 return getNode(ISD::BUILD_VECTOR, dl, 6087 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6088 &Scalars[0], Scalars.size()); 6089} 6090 6091 6092/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6093/// location that is 'Dist' units away from the location that the 'Base' load 6094/// is loading from. 6095bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6096 unsigned Bytes, int Dist) const { 6097 if (LD->getChain() != Base->getChain()) 6098 return false; 6099 EVT VT = LD->getValueType(0); 6100 if (VT.getSizeInBits() / 8 != Bytes) 6101 return false; 6102 6103 SDValue Loc = LD->getOperand(1); 6104 SDValue BaseLoc = Base->getOperand(1); 6105 if (Loc.getOpcode() == ISD::FrameIndex) { 6106 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6107 return false; 6108 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6109 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6110 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6111 int FS = MFI->getObjectSize(FI); 6112 int BFS = MFI->getObjectSize(BFI); 6113 if (FS != BFS || FS != (int)Bytes) return false; 6114 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6115 } 6116 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6117 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6118 if (V && (V->getSExtValue() == Dist*Bytes)) 6119 return true; 6120 } 6121 6122 GlobalValue *GV1 = NULL; 6123 GlobalValue *GV2 = NULL; 6124 int64_t Offset1 = 0; 6125 int64_t Offset2 = 0; 6126 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6127 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6128 if (isGA1 && isGA2 && GV1 == GV2) 6129 return Offset1 == (Offset2 + Dist*Bytes); 6130 return false; 6131} 6132 6133 6134/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6135/// it cannot be inferred. 6136unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6137 // If this is a GlobalAddress + cst, return the alignment. 6138 GlobalValue *GV; 6139 int64_t GVOffset = 0; 6140 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) 6141 return MinAlign(GV->getAlignment(), GVOffset); 6142 6143 // If this is a direct reference to a stack slot, use information about the 6144 // stack slot's alignment. 6145 int FrameIdx = 1 << 31; 6146 int64_t FrameOffset = 0; 6147 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6148 FrameIdx = FI->getIndex(); 6149 } else if (Ptr.getOpcode() == ISD::ADD && 6150 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6151 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6152 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6153 FrameOffset = Ptr.getConstantOperandVal(1); 6154 } 6155 6156 if (FrameIdx != (1 << 31)) { 6157 // FIXME: Handle FI+CST. 6158 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6159 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6160 FrameOffset); 6161 if (MFI.isFixedObjectIndex(FrameIdx)) { 6162 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6163 6164 // The alignment of the frame index can be determined from its offset from 6165 // the incoming frame position. If the frame object is at offset 32 and 6166 // the stack is guaranteed to be 16-byte aligned, then we know that the 6167 // object is 16-byte aligned. 6168 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6169 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6170 6171 // Finally, the frame object itself may have a known alignment. Factor 6172 // the alignment + offset into a new alignment. For example, if we know 6173 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6174 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6175 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6176 return std::max(Align, FIInfoAlign); 6177 } 6178 return FIInfoAlign; 6179 } 6180 6181 return 0; 6182} 6183 6184void SelectionDAG::dump() const { 6185 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6186 6187 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6188 I != E; ++I) { 6189 const SDNode *N = I; 6190 if (!N->hasOneUse() && N != getRoot().getNode()) 6191 DumpNodes(N, 2, this); 6192 } 6193 6194 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6195 6196 dbgs() << "\n\n"; 6197} 6198 6199void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6200 print_types(OS, G); 6201 print_details(OS, G); 6202} 6203 6204typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6205static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6206 const SelectionDAG *G, VisitedSDNodeSet &once) { 6207 if (!once.insert(N)) // If we've been here before, return now. 6208 return; 6209 6210 // Dump the current SDNode, but don't end the line yet. 6211 OS << std::string(indent, ' '); 6212 N->printr(OS, G); 6213 6214 // Having printed this SDNode, walk the children: 6215 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6216 const SDNode *child = N->getOperand(i).getNode(); 6217 6218 if (i) OS << ","; 6219 OS << " "; 6220 6221 if (child->getNumOperands() == 0) { 6222 // This child has no grandchildren; print it inline right here. 6223 child->printr(OS, G); 6224 once.insert(child); 6225 } else { // Just the address. FIXME: also print the child's opcode. 6226 OS << (void*)child; 6227 if (unsigned RN = N->getOperand(i).getResNo()) 6228 OS << ":" << RN; 6229 } 6230 } 6231 6232 OS << "\n"; 6233 6234 // Dump children that have grandchildren on their own line(s). 6235 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6236 const SDNode *child = N->getOperand(i).getNode(); 6237 DumpNodesr(OS, child, indent+2, G, once); 6238 } 6239} 6240 6241void SDNode::dumpr() const { 6242 VisitedSDNodeSet once; 6243 DumpNodesr(dbgs(), this, 0, 0, once); 6244} 6245 6246void SDNode::dumpr(const SelectionDAG *G) const { 6247 VisitedSDNodeSet once; 6248 DumpNodesr(dbgs(), this, 0, G, once); 6249} 6250 6251 6252// getAddressSpace - Return the address space this GlobalAddress belongs to. 6253unsigned GlobalAddressSDNode::getAddressSpace() const { 6254 return getGlobal()->getType()->getAddressSpace(); 6255} 6256 6257 6258const Type *ConstantPoolSDNode::getType() const { 6259 if (isMachineConstantPoolEntry()) 6260 return Val.MachineCPVal->getType(); 6261 return Val.ConstVal->getType(); 6262} 6263 6264bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6265 APInt &SplatUndef, 6266 unsigned &SplatBitSize, 6267 bool &HasAnyUndefs, 6268 unsigned MinSplatBits, 6269 bool isBigEndian) { 6270 EVT VT = getValueType(0); 6271 assert(VT.isVector() && "Expected a vector type"); 6272 unsigned sz = VT.getSizeInBits(); 6273 if (MinSplatBits > sz) 6274 return false; 6275 6276 SplatValue = APInt(sz, 0); 6277 SplatUndef = APInt(sz, 0); 6278 6279 // Get the bits. Bits with undefined values (when the corresponding element 6280 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6281 // in SplatValue. If any of the values are not constant, give up and return 6282 // false. 6283 unsigned int nOps = getNumOperands(); 6284 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6285 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6286 6287 for (unsigned j = 0; j < nOps; ++j) { 6288 unsigned i = isBigEndian ? nOps-1-j : j; 6289 SDValue OpVal = getOperand(i); 6290 unsigned BitPos = j * EltBitSize; 6291 6292 if (OpVal.getOpcode() == ISD::UNDEF) 6293 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6294 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6295 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6296 zextOrTrunc(sz) << BitPos); 6297 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6298 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6299 else 6300 return false; 6301 } 6302 6303 // The build_vector is all constants or undefs. Find the smallest element 6304 // size that splats the vector. 6305 6306 HasAnyUndefs = (SplatUndef != 0); 6307 while (sz > 8) { 6308 6309 unsigned HalfSize = sz / 2; 6310 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6311 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6312 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6313 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6314 6315 // If the two halves do not match (ignoring undef bits), stop here. 6316 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6317 MinSplatBits > HalfSize) 6318 break; 6319 6320 SplatValue = HighValue | LowValue; 6321 SplatUndef = HighUndef & LowUndef; 6322 6323 sz = HalfSize; 6324 } 6325 6326 SplatBitSize = sz; 6327 return true; 6328} 6329 6330bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6331 // Find the first non-undef value in the shuffle mask. 6332 unsigned i, e; 6333 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6334 /* search */; 6335 6336 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6337 6338 // Make sure all remaining elements are either undef or the same as the first 6339 // non-undef value. 6340 for (int Idx = Mask[i]; i != e; ++i) 6341 if (Mask[i] >= 0 && Mask[i] != Idx) 6342 return false; 6343 return true; 6344} 6345 6346static void checkForCyclesHelper(const SDNode *N, 6347 std::set<const SDNode *> &visited, 6348 std::set<const SDNode *> &checked) { 6349 if (checked.find(N) != checked.end()) 6350 return; 6351 6352 if (visited.find(N) != visited.end()) { 6353 dbgs() << "Offending node:\n"; 6354 N->dumprFull(); 6355 assert(0 && "Detected cycle in SelectionDAG"); 6356 } 6357 6358 std::set<const SDNode*>::iterator i; 6359 bool inserted; 6360 6361 tie(i, inserted) = visited.insert(N); 6362 assert(inserted && "Missed cycle"); 6363 6364 for(unsigned i = 0; i < N->getNumOperands(); ++i) { 6365 checkForCyclesHelper(N->getOperand(i).getNode(), visited, checked); 6366 } 6367 visited.erase(i); 6368 checked.insert(N); 6369} 6370 6371void llvm::checkForCycles(const llvm::SDNode *N) { 6372#ifdef XDEBUG 6373 assert(N && "Checking nonexistant SDNode"); 6374 std::set<const SDNode *> visited; 6375 std::set<const SDNode *> checked; 6376 checkForCyclesHelper(N, visited, checked); 6377#endif 6378} 6379 6380void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6381 checkForCycles(DAG->getRoot().getNode()); 6382} 6383