SplitKit.h revision 06c0f25499fd502668ca720b0fea4a4dfe6eb44a
1//===-------- SplitKit.h - Toolkit for splitting live ranges ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the SplitAnalysis class as well as mutator functions for
11// live range splitting.
12//
13//===----------------------------------------------------------------------===//
14
15#include "llvm/ADT/DenseMap.h"
16#include "llvm/ADT/IntervalMap.h"
17#include "llvm/ADT/SmallPtrSet.h"
18#include "llvm/CodeGen/SlotIndexes.h"
19
20namespace llvm {
21
22class ConnectedVNInfoEqClasses;
23class LiveInterval;
24class LiveIntervals;
25class LiveRangeEdit;
26class MachineInstr;
27class MachineLoopInfo;
28class MachineRegisterInfo;
29class TargetInstrInfo;
30class TargetRegisterInfo;
31class VirtRegMap;
32class VNInfo;
33class raw_ostream;
34
35/// At some point we should just include MachineDominators.h:
36class MachineDominatorTree;
37template <class NodeT> class DomTreeNodeBase;
38typedef DomTreeNodeBase<MachineBasicBlock> MachineDomTreeNode;
39
40
41/// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
42/// opportunities.
43class SplitAnalysis {
44public:
45  const MachineFunction &MF;
46  const VirtRegMap &VRM;
47  const LiveIntervals &LIS;
48  const MachineLoopInfo &Loops;
49  const TargetInstrInfo &TII;
50
51  // Instructions using the the current register.
52  typedef SmallPtrSet<const MachineInstr*, 16> InstrPtrSet;
53  InstrPtrSet UsingInstrs;
54
55  // Sorted slot indexes of using instructions.
56  SmallVector<SlotIndex, 8> UseSlots;
57
58  // The number of instructions using CurLI in each basic block.
59  typedef DenseMap<const MachineBasicBlock*, unsigned> BlockCountMap;
60  BlockCountMap UsingBlocks;
61
62  /// Additional information about basic blocks where the current variable is
63  /// live. Such a block will look like one of these templates:
64  ///
65  ///  1. |   o---x   | Internal to block. Variable is only live in this block.
66  ///  2. |---x       | Live-in, kill.
67  ///  3. |       o---| Def, live-out.
68  ///  4. |---x   o---| Live-in, kill, def, live-out.
69  ///  5. |---o---o---| Live-through with uses or defs.
70  ///  6. |-----------| Live-through without uses. Transparent.
71  ///
72  struct BlockInfo {
73    MachineBasicBlock *MBB;
74    SlotIndex FirstUse;   ///< First instr using current reg.
75    SlotIndex LastUse;    ///< Last instr using current reg.
76    SlotIndex Kill;       ///< Interval end point inside block.
77    SlotIndex Def;        ///< Interval start point inside block.
78    /// Last possible point for splitting live ranges.
79    SlotIndex LastSplitPoint;
80    bool Uses;            ///< Current reg has uses or defs in block.
81    bool LiveThrough;     ///< Live in whole block (Templ 5. or 6. above).
82    bool LiveIn;          ///< Current reg is live in.
83    bool LiveOut;         ///< Current reg is live out.
84
85    // Per-interference pattern scratch data.
86    bool OverlapEntry;    ///< Interference overlaps entering interval.
87    bool OverlapExit;     ///< Interference overlaps exiting interval.
88  };
89
90  /// Basic blocks where var is live. This array is parallel to
91  /// SpillConstraints.
92  SmallVector<BlockInfo, 8> LiveBlocks;
93
94private:
95  // Current live interval.
96  const LiveInterval *CurLI;
97
98  // Sumarize statistics by counting instructions using CurLI.
99  void analyzeUses();
100
101  /// calcLiveBlockInfo - Compute per-block information about CurLI.
102  void calcLiveBlockInfo();
103
104  /// canAnalyzeBranch - Return true if MBB ends in a branch that can be
105  /// analyzed.
106  bool canAnalyzeBranch(const MachineBasicBlock *MBB);
107
108public:
109  SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
110                const MachineLoopInfo &mli);
111
112  /// analyze - set CurLI to the specified interval, and analyze how it may be
113  /// split.
114  void analyze(const LiveInterval *li);
115
116  /// clear - clear all data structures so SplitAnalysis is ready to analyze a
117  /// new interval.
118  void clear();
119
120  /// getParent - Return the last analyzed interval.
121  const LiveInterval &getParent() const { return *CurLI; }
122
123  /// hasUses - Return true if MBB has any uses of CurLI.
124  bool hasUses(const MachineBasicBlock *MBB) const {
125    return UsingBlocks.lookup(MBB);
126  }
127
128  /// isOriginalEndpoint - Return true if the original live range was killed or
129  /// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def,
130  /// and 'use' for an early-clobber def.
131  /// This can be used to recognize code inserted by earlier live range
132  /// splitting.
133  bool isOriginalEndpoint(SlotIndex Idx) const;
134
135  typedef SmallPtrSet<const MachineBasicBlock*, 16> BlockPtrSet;
136
137  // Print a set of blocks with use counts.
138  void print(const BlockPtrSet&, raw_ostream&) const;
139
140  /// getMultiUseBlocks - Add basic blocks to Blocks that may benefit from
141  /// having CurLI split to a new live interval. Return true if Blocks can be
142  /// passed to SplitEditor::splitSingleBlocks.
143  bool getMultiUseBlocks(BlockPtrSet &Blocks);
144
145  /// getBlockForInsideSplit - If CurLI is contained inside a single basic
146  /// block, and it would pay to subdivide the interval inside that block,
147  /// return it. Otherwise return NULL. The returned block can be passed to
148  /// SplitEditor::splitInsideBlock.
149  const MachineBasicBlock *getBlockForInsideSplit();
150};
151
152
153/// LiveIntervalMap - Map values from a large LiveInterval into a small
154/// interval that is a subset. Insert phi-def values as needed. This class is
155/// used by SplitEditor to create new smaller LiveIntervals.
156///
157/// ParentLI is the larger interval, LI is the subset interval. Every value
158/// in LI corresponds to exactly one value in ParentLI, and the live range
159/// of the value is contained within the live range of the ParentLI value.
160/// Values in ParentLI may map to any number of OpenLI values, including 0.
161class LiveIntervalMap {
162  LiveIntervals &LIS;
163  MachineDominatorTree &MDT;
164
165  // The parent interval is never changed.
166  const LiveInterval &ParentLI;
167
168  // The child interval's values are fully contained inside ParentLI values.
169  LiveInterval *LI;
170
171  typedef DenseMap<const VNInfo*, VNInfo*> ValueMap;
172
173  // Map ParentLI values to simple values in LI that are defined at the same
174  // SlotIndex, or NULL for ParentLI values that have complex LI defs.
175  // Note there is a difference between values mapping to NULL (complex), and
176  // values not present (unknown/unmapped).
177  ValueMap Values;
178
179  typedef std::pair<VNInfo*, MachineDomTreeNode*> LiveOutPair;
180  typedef DenseMap<MachineBasicBlock*,LiveOutPair> LiveOutMap;
181
182  // LiveOutCache - Map each basic block where LI is live out to the live-out
183  // value and its defining block. One of these conditions shall be true:
184  //
185  //  1. !LiveOutCache.count(MBB)
186  //  2. LiveOutCache[MBB].second.getNode() == MBB
187  //  3. forall P in preds(MBB): LiveOutCache[P] == LiveOutCache[MBB]
188  //
189  // This is only a cache, the values can be computed as:
190  //
191  //  VNI = LI->getVNInfoAt(LIS.getMBBEndIdx(MBB))
192  //  Node = mbt_[LIS.getMBBFromIndex(VNI->def)]
193  //
194  // The cache is also used as a visiteed set by mapValue().
195  LiveOutMap LiveOutCache;
196
197  // Dump the live-out cache to dbgs().
198  void dumpCache();
199
200public:
201  LiveIntervalMap(LiveIntervals &lis,
202                  MachineDominatorTree &mdt,
203                  const LiveInterval &parentli)
204    : LIS(lis), MDT(mdt), ParentLI(parentli), LI(0) {}
205
206  /// reset - clear all data structures and start a new live interval.
207  void reset(LiveInterval *);
208
209  /// getLI - return the current live interval.
210  LiveInterval *getLI() const { return LI; }
211
212  /// defValue - define a value in LI from the ParentLI value VNI and Idx.
213  /// Idx does not have to be ParentVNI->def, but it must be contained within
214  /// ParentVNI's live range in ParentLI.
215  /// Return the new LI value.
216  VNInfo *defValue(const VNInfo *ParentVNI, SlotIndex Idx);
217
218  /// mapValue - map ParentVNI to the corresponding LI value at Idx. It is
219  /// assumed that ParentVNI is live at Idx.
220  /// If ParentVNI has not been defined by defValue, it is assumed that
221  /// ParentVNI->def dominates Idx.
222  /// If ParentVNI has been defined by defValue one or more times, a value that
223  /// dominates Idx will be returned. This may require creating extra phi-def
224  /// values and adding live ranges to LI.
225  /// If simple is not NULL, *simple will indicate if ParentVNI is a simply
226  /// mapped value.
227  VNInfo *mapValue(const VNInfo *ParentVNI, SlotIndex Idx, bool *simple = 0);
228
229  // extendTo - Find the last LI value defined in MBB at or before Idx. The
230  // parentli is assumed to be live at Idx. Extend the live range to include
231  // Idx. Return the found VNInfo, or NULL.
232  VNInfo *extendTo(const MachineBasicBlock *MBB, SlotIndex Idx);
233
234  /// isMapped - Return true is ParentVNI is a known mapped value. It may be a
235  /// simple 1-1 mapping or a complex mapping to later defs.
236  bool isMapped(const VNInfo *ParentVNI) const {
237    return Values.count(ParentVNI);
238  }
239
240  /// isComplexMapped - Return true if ParentVNI has received new definitions
241  /// with defValue.
242  bool isComplexMapped(const VNInfo *ParentVNI) const;
243
244  /// markComplexMapped - Mark ParentVNI as complex mapped regardless of the
245  /// number of definitions.
246  void markComplexMapped(const VNInfo *ParentVNI) { Values[ParentVNI] = 0; }
247
248  // addSimpleRange - Add a simple range from ParentLI to LI.
249  // ParentVNI must be live in the [Start;End) interval.
250  void addSimpleRange(SlotIndex Start, SlotIndex End, const VNInfo *ParentVNI);
251
252  /// addRange - Add live ranges to LI where [Start;End) intersects ParentLI.
253  /// All needed values whose def is not inside [Start;End) must be defined
254  /// beforehand so mapValue will work.
255  void addRange(SlotIndex Start, SlotIndex End);
256};
257
258
259/// SplitEditor - Edit machine code and LiveIntervals for live range
260/// splitting.
261///
262/// - Create a SplitEditor from a SplitAnalysis.
263/// - Start a new live interval with openIntv.
264/// - Mark the places where the new interval is entered using enterIntv*
265/// - Mark the ranges where the new interval is used with useIntv*
266/// - Mark the places where the interval is exited with exitIntv*.
267/// - Finish the current interval with closeIntv and repeat from 2.
268/// - Rewrite instructions with finish().
269///
270class SplitEditor {
271  SplitAnalysis &SA;
272  LiveIntervals &LIS;
273  VirtRegMap &VRM;
274  MachineRegisterInfo &MRI;
275  MachineDominatorTree &MDT;
276  const TargetInstrInfo &TII;
277  const TargetRegisterInfo &TRI;
278
279  /// Edit - The current parent register and new intervals created.
280  LiveRangeEdit &Edit;
281
282  /// Index into Edit of the currently open interval.
283  /// The index 0 is used for the complement, so the first interval started by
284  /// openIntv will be 1.
285  unsigned OpenIdx;
286
287  typedef IntervalMap<SlotIndex, unsigned> RegAssignMap;
288
289  /// Allocator for the interval map. This will eventually be shared with
290  /// SlotIndexes and LiveIntervals.
291  RegAssignMap::Allocator Allocator;
292
293  /// RegAssign - Map of the assigned register indexes.
294  /// Edit.get(RegAssign.lookup(Idx)) is the register that should be live at
295  /// Idx.
296  RegAssignMap RegAssign;
297
298  /// LIMappers - One LiveIntervalMap or each interval in Edit.
299  SmallVector<LiveIntervalMap, 4> LIMappers;
300
301  /// defFromParent - Define Reg from ParentVNI at UseIdx using either
302  /// rematerialization or a COPY from parent. Return the new value.
303  VNInfo *defFromParent(unsigned RegIdx,
304                        VNInfo *ParentVNI,
305                        SlotIndex UseIdx,
306                        MachineBasicBlock &MBB,
307                        MachineBasicBlock::iterator I);
308
309  /// rewriteAssigned - Rewrite all uses of Edit.getReg() to assigned registers.
310  void rewriteAssigned();
311
312  /// rewriteComponents - Rewrite all uses of Intv[0] according to the eq
313  /// classes in ConEQ.
314  /// This must be done when Intvs[0] is styill live at all uses, before calling
315  /// ConEq.Distribute().
316  void rewriteComponents(const SmallVectorImpl<LiveInterval*> &Intvs,
317                         const ConnectedVNInfoEqClasses &ConEq);
318
319public:
320  /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
321  /// Newly created intervals will be appended to newIntervals.
322  SplitEditor(SplitAnalysis &SA, LiveIntervals&, VirtRegMap&,
323              MachineDominatorTree&, LiveRangeEdit&);
324
325  /// getAnalysis - Get the corresponding analysis.
326  SplitAnalysis &getAnalysis() { return SA; }
327
328  /// Create a new virtual register and live interval.
329  void openIntv();
330
331  /// enterIntvBefore - Enter the open interval before the instruction at Idx.
332  /// If the parent interval is not live before Idx, a COPY is not inserted.
333  /// Return the beginning of the new live range.
334  SlotIndex enterIntvBefore(SlotIndex Idx);
335
336  /// enterIntvAtEnd - Enter the open interval at the end of MBB.
337  /// Use the open interval from he inserted copy to the MBB end.
338  /// Return the beginning of the new live range.
339  SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
340
341  /// useIntv - indicate that all instructions in MBB should use OpenLI.
342  void useIntv(const MachineBasicBlock &MBB);
343
344  /// useIntv - indicate that all instructions in range should use OpenLI.
345  void useIntv(SlotIndex Start, SlotIndex End);
346
347  /// leaveIntvAfter - Leave the open interval after the instruction at Idx.
348  /// Return the end of the live range.
349  SlotIndex leaveIntvAfter(SlotIndex Idx);
350
351  /// leaveIntvBefore - Leave the open interval before the instruction at Idx.
352  /// Return the end of the live range.
353  SlotIndex leaveIntvBefore(SlotIndex Idx);
354
355  /// leaveIntvAtTop - Leave the interval at the top of MBB.
356  /// Add liveness from the MBB top to the copy.
357  /// Return the end of the live range.
358  SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB);
359
360  /// overlapIntv - Indicate that all instructions in range should use the open
361  /// interval, but also let the complement interval be live.
362  ///
363  /// This doubles the register pressure, but is sometimes required to deal with
364  /// register uses after the last valid split point.
365  ///
366  /// The Start index should be a return value from a leaveIntv* call, and End
367  /// should be in the same basic block. The parent interval must have the same
368  /// value across the range.
369  ///
370  void overlapIntv(SlotIndex Start, SlotIndex End);
371
372  /// closeIntv - Indicate that we are done editing the currently open
373  /// LiveInterval, and ranges can be trimmed.
374  void closeIntv();
375
376  /// finish - after all the new live ranges have been created, compute the
377  /// remaining live range, and rewrite instructions to use the new registers.
378  void finish();
379
380  /// dump - print the current interval maping to dbgs().
381  void dump() const;
382
383  // ===--- High level methods ---===
384
385  /// splitSingleBlocks - Split CurLI into a separate live interval inside each
386  /// basic block in Blocks.
387  void splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks);
388
389  /// splitInsideBlock - Split CurLI into multiple intervals inside MBB.
390  void splitInsideBlock(const MachineBasicBlock *);
391};
392
393}
394