TwoAddressInstructionPass.cpp revision 1e31363a9ee6b4e83703da7501fba19ca31395d7 
1//===-- TwoAddressInstructionPass.cpp - Two-Address instruction pass ------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the TwoAddress instruction pass which is used
11// by most register allocators. Two-Address instructions are rewritten
12// from:
13//
14//     A = B op C
15//
16// to:
17//
18//     A = B
19//     A op= C
20//
21// Note that if a register allocator chooses to use this pass, that it
22// has to be capable of handling the non-SSA nature of these rewritten
23// virtual registers.
24//
25// It is also worth noting that the duplicate operand of the two
26// address instruction is removed.
27//
28//===----------------------------------------------------------------------===//
29
30#define DEBUG_TYPE "twoaddrinstr"
31#include "llvm/CodeGen/Passes.h"
32#include "llvm/Function.h"
33#include "llvm/CodeGen/LiveVariables.h"
34#include "llvm/CodeGen/MachineFunctionPass.h"
35#include "llvm/CodeGen/MachineInstr.h"
36#include "llvm/CodeGen/SSARegMap.h"
37#include "llvm/Target/MRegisterInfo.h"
38#include "llvm/Target/TargetInstrInfo.h"
39#include "llvm/Target/TargetMachine.h"
40#include "Support/Debug.h"
41#include "Support/Statistic.h"
42#include "Support/STLExtras.h"
43using namespace llvm;
44
45namespace {
46    Statistic<> numTwoAddressInstrs("twoaddressinstruction",
47                                    "Number of two-address instructions");
48    Statistic<> numInstrsAdded("twoaddressinstruction",
49                               "Number of instructions added");
50
51    struct TwoAddressInstructionPass : public MachineFunctionPass
52    {
53        virtual void getAnalysisUsage(AnalysisUsage &AU) const;
54
55        /// runOnMachineFunction - pass entry point
56        bool runOnMachineFunction(MachineFunction&);
57    };
58
59    RegisterPass<TwoAddressInstructionPass> X(
60        "twoaddressinstruction", "Two-Address instruction pass");
61};
62
63const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo();
64
65void TwoAddressInstructionPass::getAnalysisUsage(AnalysisUsage &AU) const
66{
67    AU.addPreserved<LiveVariables>();
68    AU.addPreservedID(PHIEliminationID);
69    MachineFunctionPass::getAnalysisUsage(AU);
70}
71
72/// runOnMachineFunction - Reduce two-address instructions to two
73/// operands.
74///
75bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
76    DEBUG(std::cerr << "Machine Function\n");
77    const TargetMachine &TM = MF.getTarget();
78    const MRegisterInfo &MRI = *TM.getRegisterInfo();
79    const TargetInstrInfo &TII = *TM.getInstrInfo();
80    LiveVariables* LV = getAnalysisToUpdate<LiveVariables>();
81
82    bool MadeChange = false;
83
84    DEBUG(std::cerr << "********** REWRITING TWO-ADDR INSTRS **********\n");
85    DEBUG(std::cerr << "********** Function: "
86          << MF.getFunction()->getName() << '\n');
87
88    for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
89         mbbi != mbbe; ++mbbi) {
90        for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
91             mi != me; ++mi) {
92            unsigned opcode = mi->getOpcode();
93
94            // ignore if it is not a two-address instruction
95            if (!TII.isTwoAddrInstr(opcode))
96                continue;
97
98            ++numTwoAddressInstrs;
99
100            DEBUG(std::cerr << '\t'; mi->print(std::cerr, &TM));
101
102            assert(mi->getOperand(1).isRegister() &&
103                   mi->getOperand(1).getReg() &&
104                   mi->getOperand(1).isUse() &&
105                   "two address instruction invalid");
106
107            // if the two operands are the same we just remove the use
108            // and mark the def as def&use, otherwise we have to insert a copy.
109            if (mi->getOperand(0).getReg() != mi->getOperand(1).getReg()) {
110                // rewrite:
111                //     a = b op c
112                // to:
113                //     a = b
114                //     a = a op c
115                unsigned regA = mi->getOperand(0).getReg();
116                unsigned regB = mi->getOperand(1).getReg();
117
118                assert(MRegisterInfo::isVirtualRegister(regA) &&
119                       MRegisterInfo::isVirtualRegister(regB) &&
120                       "cannot update physical register live information");
121
122                // first make sure we do not have a use of a in the
123                // instruction (a = b + a for example) because our
124                // transformation will not work. This should never occur
125                // because we are in SSA form.
126#ifndef NDEBUG
127                for (unsigned i = 1; i != mi->getNumOperands(); ++i)
128                    assert(!mi->getOperand(i).isRegister() ||
129                           mi->getOperand(i).getReg() != regA);
130#endif
131
132                const TargetRegisterClass* rc =
133                    MF.getSSARegMap()->getRegClass(regA);
134                unsigned Added = MRI.copyRegToReg(*mbbi, mi, regA, regB, rc);
135                numInstrsAdded += Added;
136
137                MachineBasicBlock::iterator prevMi = prior(mi);
138                DEBUG(std::cerr << "\t\tprepend:\t";
139                      prevMi->print(std::cerr, &TM));
140
141                if (LV) {
142                    // update live variables for regA
143                    assert(Added == 1 &&
144                           "Cannot handle multi-instruction copies yet!");
145                    LiveVariables::VarInfo& varInfo = LV->getVarInfo(regA);
146                    varInfo.DefInst = prevMi;
147
148                    // update live variables for regB
149                    if (LV->removeVirtualRegisterKilled(regB, &*mbbi, mi))
150                        LV->addVirtualRegisterKilled(regB, prevMi);
151
152                    if (LV->removeVirtualRegisterDead(regB, &*mbbi, mi))
153                        LV->addVirtualRegisterDead(regB, prevMi);
154                }
155
156                // replace all occurences of regB with regA
157                for (unsigned i = 1, e = mi->getNumOperands(); i != e; ++i) {
158                    if (mi->getOperand(i).isRegister() &&
159                        mi->getOperand(i).getReg() == regB)
160                        mi->SetMachineOperandReg(i, regA);
161                }
162            }
163
164            assert(mi->getOperand(0).isDef());
165            mi->getOperand(0).setUse();
166            mi->RemoveOperand(1);
167            MadeChange = true;
168
169            DEBUG(std::cerr << "\t\trewrite to:\t";
170                  mi->print(std::cerr, &TM));
171        }
172    }
173
174    return MadeChange;
175}
176