VirtRegMap.cpp revision 50ea01ed5ba23c8988af9fed0b91178e69140a80
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the VirtRegMap class. 11// 12// It also contains implementations of the the Spiller interface, which, given a 13// virtual register map and a machine function, eliminates all virtual 14// references by replacing them with physical register references - adding spill 15// code as necessary. 16// 17//===----------------------------------------------------------------------===// 18 19#define DEBUG_TYPE "spiller" 20#include "VirtRegMap.h" 21#include "llvm/Function.h" 22#include "llvm/CodeGen/MachineFrameInfo.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/SSARegMap.h" 25#include "llvm/Target/TargetMachine.h" 26#include "llvm/Target/TargetInstrInfo.h" 27#include "llvm/Support/CommandLine.h" 28#include "llvm/Support/Debug.h" 29#include "llvm/ADT/Statistic.h" 30#include "llvm/ADT/STLExtras.h" 31#include <algorithm> 32using namespace llvm; 33 34namespace { 35 Statistic<> NumSpills("spiller", "Number of register spills"); 36 Statistic<> NumStores("spiller", "Number of stores added"); 37 Statistic<> NumLoads ("spiller", "Number of loads added"); 38 Statistic<> NumReused("spiller", "Number of values reused"); 39 Statistic<> NumDSE ("spiller", "Number of dead stores elided"); 40 41 enum SpillerName { simple, local }; 42 43 cl::opt<SpillerName> 44 SpillerOpt("spiller", 45 cl::desc("Spiller to use: (default: local)"), 46 cl::Prefix, 47 cl::values(clEnumVal(simple, " simple spiller"), 48 clEnumVal(local, " local spiller"), 49 clEnumValEnd), 50 cl::init(local)); 51} 52 53//===----------------------------------------------------------------------===// 54// VirtRegMap implementation 55//===----------------------------------------------------------------------===// 56 57void VirtRegMap::grow() { 58 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg()); 59 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg()); 60} 61 62int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { 63 assert(MRegisterInfo::isVirtualRegister(virtReg)); 64 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 65 "attempt to assign stack slot to already spilled register"); 66 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg); 67 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(), 68 RC->getAlignment()); 69 Virt2StackSlotMap[virtReg] = frameIndex; 70 ++NumSpills; 71 return frameIndex; 72} 73 74void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) { 75 assert(MRegisterInfo::isVirtualRegister(virtReg)); 76 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 77 "attempt to assign stack slot to already spilled register"); 78 Virt2StackSlotMap[virtReg] = frameIndex; 79} 80 81void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, 82 unsigned OpNo, MachineInstr *NewMI) { 83 // Move previous memory references folded to new instruction. 84 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI); 85 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI), 86 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) { 87 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second)); 88 MI2VirtMap.erase(I++); 89 } 90 91 ModRef MRInfo; 92 if (!OldMI->getOperand(OpNo).isDef()) { 93 assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?"); 94 MRInfo = isRef; 95 } else { 96 MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod; 97 } 98 99 // add new memory reference 100 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo))); 101} 102 103void VirtRegMap::print(std::ostream &OS) const { 104 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo(); 105 106 OS << "********** REGISTER MAP **********\n"; 107 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 108 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) { 109 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) 110 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n"; 111 112 } 113 114 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 115 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) 116 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT) 117 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n"; 118 OS << '\n'; 119} 120 121void VirtRegMap::dump() const { print(std::cerr); } 122 123 124//===----------------------------------------------------------------------===// 125// Simple Spiller Implementation 126//===----------------------------------------------------------------------===// 127 128Spiller::~Spiller() {} 129 130namespace { 131 struct SimpleSpiller : public Spiller { 132 bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap &VRM); 133 }; 134} 135 136bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, 137 const VirtRegMap &VRM) { 138 DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); 139 DEBUG(std::cerr << "********** Function: " 140 << MF.getFunction()->getName() << '\n'); 141 const TargetMachine &TM = MF.getTarget(); 142 const MRegisterInfo &MRI = *TM.getRegisterInfo(); 143 bool *PhysRegsUsed = MF.getUsedPhysregs(); 144 145 // LoadedRegs - Keep track of which vregs are loaded, so that we only load 146 // each vreg once (in the case where a spilled vreg is used by multiple 147 // operands). This is always smaller than the number of operands to the 148 // current machine instr, so it should be small. 149 std::vector<unsigned> LoadedRegs; 150 151 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end(); 152 MBBI != E; ++MBBI) { 153 DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n"); 154 MachineBasicBlock &MBB = *MBBI; 155 for (MachineBasicBlock::iterator MII = MBB.begin(), 156 E = MBB.end(); MII != E; ++MII) { 157 MachineInstr &MI = *MII; 158 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 159 MachineOperand &MO = MI.getOperand(i); 160 if (MO.isRegister() && MO.getReg()) 161 if (MRegisterInfo::isVirtualRegister(MO.getReg())) { 162 unsigned VirtReg = MO.getReg(); 163 unsigned PhysReg = VRM.getPhys(VirtReg); 164 if (VRM.hasStackSlot(VirtReg)) { 165 int StackSlot = VRM.getStackSlot(VirtReg); 166 167 if (MO.isUse() && 168 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) 169 == LoadedRegs.end()) { 170 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot); 171 LoadedRegs.push_back(VirtReg); 172 ++NumLoads; 173 DEBUG(std::cerr << '\t' << *prior(MII)); 174 } 175 176 if (MO.isDef()) { 177 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot); 178 ++NumStores; 179 } 180 } 181 PhysRegsUsed[PhysReg] = true; 182 MI.SetMachineOperandReg(i, PhysReg); 183 } else { 184 PhysRegsUsed[MO.getReg()] = true; 185 } 186 } 187 188 DEBUG(std::cerr << '\t' << MI); 189 LoadedRegs.clear(); 190 } 191 } 192 return true; 193} 194 195//===----------------------------------------------------------------------===// 196// Local Spiller Implementation 197//===----------------------------------------------------------------------===// 198 199namespace { 200 /// LocalSpiller - This spiller does a simple pass over the machine basic 201 /// block to attempt to keep spills in registers as much as possible for 202 /// blocks that have low register pressure (the vreg may be spilled due to 203 /// register pressure in other blocks). 204 class LocalSpiller : public Spiller { 205 const MRegisterInfo *MRI; 206 const TargetInstrInfo *TII; 207 public: 208 bool runOnMachineFunction(MachineFunction &MF, const VirtRegMap &VRM) { 209 MRI = MF.getTarget().getRegisterInfo(); 210 TII = MF.getTarget().getInstrInfo(); 211 DEBUG(std::cerr << "\n**** Local spiller rewriting function '" 212 << MF.getFunction()->getName() << "':\n"); 213 214 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); 215 MBB != E; ++MBB) 216 RewriteMBB(*MBB, VRM); 217 return true; 218 } 219 private: 220 void RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM); 221 void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots, 222 std::map<unsigned, int> &PhysRegs); 223 void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots, 224 std::map<unsigned, int> &PhysRegs); 225 }; 226} 227 228void LocalSpiller::ClobberPhysRegOnly(unsigned PhysReg, 229 std::map<int, unsigned> &SpillSlots, 230 std::map<unsigned, int> &PhysRegs) { 231 std::map<unsigned, int>::iterator I = PhysRegs.find(PhysReg); 232 if (I != PhysRegs.end()) { 233 int Slot = I->second; 234 PhysRegs.erase(I); 235 assert(SpillSlots[Slot] == PhysReg && "Bidirectional map mismatch!"); 236 SpillSlots.erase(Slot); 237 DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg) 238 << " clobbered, invalidating SS#" << Slot << "\n"); 239 240 } 241} 242 243void LocalSpiller::ClobberPhysReg(unsigned PhysReg, 244 std::map<int, unsigned> &SpillSlots, 245 std::map<unsigned, int> &PhysRegs) { 246 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS) 247 ClobberPhysRegOnly(*AS, SpillSlots, PhysRegs); 248 ClobberPhysRegOnly(PhysReg, SpillSlots, PhysRegs); 249} 250 251 252// ReusedOp - For each reused operand, we keep track of a bit of information, in 253// case we need to rollback upon processing a new operand. See comments below. 254namespace { 255 struct ReusedOp { 256 // The MachineInstr operand that reused an available value. 257 unsigned Operand; 258 259 // StackSlot - The spill slot of the value being reused. 260 unsigned StackSlot; 261 262 // PhysRegReused - The physical register the value was available in. 263 unsigned PhysRegReused; 264 265 // AssignedPhysReg - The physreg that was assigned for use by the reload. 266 unsigned AssignedPhysReg; 267 268 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr) 269 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr) {} 270 }; 271} 272 273 274/// rewriteMBB - Keep track of which spills are available even after the 275/// register allocator is done with them. If possible, avoid reloading vregs. 276void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) { 277 278 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual 279 // register values that are still available, due to being loaded to stored to, 280 // but not invalidated yet. 281 std::map<int, unsigned> SpillSlotsAvailable; 282 283 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating 284 // which physregs are in use holding a stack slot value. 285 std::map<unsigned, int> PhysRegsAvailable; 286 287 DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n"); 288 289 std::vector<ReusedOp> ReusedOperands; 290 291 // DefAndUseVReg - When we see a def&use operand that is spilled, keep track 292 // of it. ".first" is the machine operand index (should always be 0 for now), 293 // and ".second" is the virtual register that is spilled. 294 std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg; 295 296 // MaybeDeadStores - When we need to write a value back into a stack slot, 297 // keep track of the inserted store. If the stack slot value is never read 298 // (because the value was used from some available register, for example), and 299 // subsequently stored to, the original store is dead. This map keeps track 300 // of inserted stores that are not used. If we see a subsequent store to the 301 // same stack slot, the original store is deleted. 302 std::map<int, MachineInstr*> MaybeDeadStores; 303 304 bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs(); 305 306 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); 307 MII != E; ) { 308 MachineInstr &MI = *MII; 309 MachineBasicBlock::iterator NextMII = MII; ++NextMII; 310 311 ReusedOperands.clear(); 312 DefAndUseVReg.clear(); 313 314 // Process all of the spilled uses and all non spilled reg references. 315 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 316 MachineOperand &MO = MI.getOperand(i); 317 if (!MO.isRegister() || MO.getReg() == 0) 318 continue; // Ignore non-register operands. 319 320 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) { 321 // Ignore physregs for spilling, but remember that it is used by this 322 // function. 323 PhysRegsUsed[MO.getReg()] = true; 324 continue; 325 } 326 327 assert(MRegisterInfo::isVirtualRegister(MO.getReg()) && 328 "Not a virtual or a physical register?"); 329 330 unsigned VirtReg = MO.getReg(); 331 if (!VRM.hasStackSlot(VirtReg)) { 332 // This virtual register was assigned a physreg! 333 unsigned Phys = VRM.getPhys(VirtReg); 334 PhysRegsUsed[Phys] = true; 335 MI.SetMachineOperandReg(i, Phys); 336 continue; 337 } 338 339 // This virtual register is now known to be a spilled value. 340 if (!MO.isUse()) 341 continue; // Handle defs in the loop below (handle use&def here though) 342 343 // If this is both a def and a use, we need to emit a store to the 344 // stack slot after the instruction. Keep track of D&U operands 345 // because we are about to change it to a physreg here. 346 if (MO.isDef()) { 347 // Remember that this was a def-and-use operand, and that the 348 // stack slot is live after this instruction executes. 349 DefAndUseVReg.push_back(std::make_pair(i, VirtReg)); 350 } 351 352 int StackSlot = VRM.getStackSlot(VirtReg); 353 unsigned PhysReg; 354 355 // Check to see if this stack slot is available. 356 std::map<int, unsigned>::iterator SSI = 357 SpillSlotsAvailable.find(StackSlot); 358 if (SSI != SpillSlotsAvailable.end()) { 359 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg " 360 << MRI->getName(SSI->second) << " for vreg" 361 << VirtReg <<" instead of reloading into physreg " 362 << MRI->getName(VRM.getPhys(VirtReg)) << "\n"); 363 // If this stack slot value is already available, reuse it! 364 PhysReg = SSI->second; 365 MI.SetMachineOperandReg(i, PhysReg); 366 367 // The only technical detail we have is that we don't know that 368 // PhysReg won't be clobbered by a reloaded stack slot that occurs 369 // later in the instruction. In particular, consider 'op V1, V2'. 370 // If V1 is available in physreg R0, we would choose to reuse it 371 // here, instead of reloading it into the register the allocator 372 // indicated (say R1). However, V2 might have to be reloaded 373 // later, and it might indicate that it needs to live in R0. When 374 // this occurs, we need to have information available that 375 // indicates it is safe to use R1 for the reload instead of R0. 376 // 377 // To further complicate matters, we might conflict with an alias, 378 // or R0 and R1 might not be compatible with each other. In this 379 // case, we actually insert a reload for V1 in R1, ensuring that 380 // we can get at R0 or its alias. 381 ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg, 382 VRM.getPhys(VirtReg))); 383 ++NumReused; 384 continue; 385 } 386 387 // Otherwise, reload it and remember that we have it. 388 PhysReg = VRM.getPhys(VirtReg); 389 390 RecheckRegister: 391 // Note that, if we reused a register for a previous operand, the 392 // register we want to reload into might not actually be 393 // available. If this occurs, use the register indicated by the 394 // reuser. 395 if (!ReusedOperands.empty()) // This is most often empty. 396 for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro) 397 if (ReusedOperands[ro].PhysRegReused == PhysReg) { 398 // Yup, use the reload register that we didn't use before. 399 PhysReg = ReusedOperands[ro].AssignedPhysReg; 400 goto RecheckRegister; 401 } else { 402 ReusedOp &Op = ReusedOperands[ro]; 403 unsigned PRRU = Op.PhysRegReused; 404 if (MRI->areAliases(PRRU, PhysReg)) { 405 // Okay, we found out that an alias of a reused register 406 // was used. This isn't good because it means we have 407 // to undo a previous reuse. 408 MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg, 409 Op.StackSlot); 410 ClobberPhysReg(Op.AssignedPhysReg, SpillSlotsAvailable, 411 PhysRegsAvailable); 412 413 // Any stores to this stack slot are not dead anymore. 414 MaybeDeadStores.erase(Op.StackSlot); 415 416 MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg); 417 PhysRegsAvailable[Op.AssignedPhysReg] = Op.StackSlot; 418 SpillSlotsAvailable[Op.StackSlot] = Op.AssignedPhysReg; 419 PhysRegsAvailable.erase(Op.PhysRegReused); 420 DEBUG(std::cerr << "Remembering SS#" << Op.StackSlot 421 << " in physreg " 422 << MRI->getName(Op.AssignedPhysReg) << "\n"); 423 ++NumLoads; 424 DEBUG(std::cerr << '\t' << *prior(MII)); 425 426 DEBUG(std::cerr << "Reuse undone!\n"); 427 ReusedOperands.erase(ReusedOperands.begin()+ro); 428 --NumReused; 429 goto ContinueReload; 430 } 431 } 432 ContinueReload: 433 PhysRegsUsed[PhysReg] = true; 434 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot); 435 // This invalidates PhysReg. 436 ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable); 437 438 // Any stores to this stack slot are not dead anymore. 439 MaybeDeadStores.erase(StackSlot); 440 441 MI.SetMachineOperandReg(i, PhysReg); 442 PhysRegsAvailable[PhysReg] = StackSlot; 443 SpillSlotsAvailable[StackSlot] = PhysReg; 444 DEBUG(std::cerr << "Remembering SS#" << StackSlot <<" in physreg " 445 << MRI->getName(PhysReg) << "\n"); 446 ++NumLoads; 447 DEBUG(std::cerr << '\t' << *prior(MII)); 448 } 449 450 // Loop over all of the implicit defs, clearing them from our available 451 // sets. 452 for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode()); 453 *ImpDef; ++ImpDef) { 454 PhysRegsUsed[*ImpDef] = true; 455 ClobberPhysReg(*ImpDef, SpillSlotsAvailable, PhysRegsAvailable); 456 } 457 458 DEBUG(std::cerr << '\t' << MI); 459 460 // If we have folded references to memory operands, make sure we clear all 461 // physical registers that may contain the value of the spilled virtual 462 // register 463 VirtRegMap::MI2VirtMapTy::const_iterator I, End; 464 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) { 465 DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: " 466 << I->second.second); 467 unsigned VirtReg = I->second.first; 468 VirtRegMap::ModRef MR = I->second.second; 469 if (VRM.hasStackSlot(VirtReg)) { 470 int SS = VRM.getStackSlot(VirtReg); 471 DEBUG(std::cerr << " - StackSlot: " << SS << "\n"); 472 473 // If this reference is not a use, any previous store is now dead. 474 // Otherwise, the store to this stack slot is not dead anymore. 475 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS); 476 if (MDSI != MaybeDeadStores.end()) { 477 if (MR & VirtRegMap::isRef) // Previous store is not dead. 478 MaybeDeadStores.erase(MDSI); 479 else { 480 // If we get here, the store is dead, nuke it now. 481 assert(MR == VirtRegMap::isMod && "Can't be modref!"); 482 MBB.erase(MDSI->second); 483 MaybeDeadStores.erase(MDSI); 484 ++NumDSE; 485 } 486 } 487 488 // If the spill slot value is available, and this is a new definition of 489 // the value, the value is not available anymore. 490 if (MR & VirtRegMap::isMod) { 491 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(SS); 492 if (It != SpillSlotsAvailable.end()) { 493 PhysRegsAvailable.erase(It->second); 494 SpillSlotsAvailable.erase(It); 495 } 496 } 497 } else { 498 DEBUG(std::cerr << ": No stack slot!\n"); 499 } 500 } 501 502 // Process all of the spilled defs. 503 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 504 MachineOperand &MO = MI.getOperand(i); 505 if (MO.isRegister() && MO.getReg() && MO.isDef()) { 506 unsigned VirtReg = MO.getReg(); 507 508 bool TakenCareOf = false; 509 if (!MRegisterInfo::isVirtualRegister(VirtReg)) { 510 // Check to see if this is a def-and-use vreg operand that we do need 511 // to insert a store for. 512 bool OpTakenCareOf = false; 513 if (MO.isUse() && !DefAndUseVReg.empty()) { 514 for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau) 515 if (DefAndUseVReg[dau].first == i) { 516 VirtReg = DefAndUseVReg[dau].second; 517 OpTakenCareOf = true; 518 break; 519 } 520 } 521 522 if (!OpTakenCareOf) { 523 ClobberPhysReg(VirtReg, SpillSlotsAvailable, PhysRegsAvailable); 524 TakenCareOf = true; 525 } 526 } 527 528 if (!TakenCareOf) { 529 // The only vregs left are stack slot definitions. 530 int StackSlot = VRM.getStackSlot(VirtReg); 531 unsigned PhysReg; 532 533 // If this is a def&use operand, and we used a different physreg for 534 // it than the one assigned, make sure to execute the store from the 535 // correct physical register. 536 if (MO.getReg() == VirtReg) 537 PhysReg = VRM.getPhys(VirtReg); 538 else 539 PhysReg = MO.getReg(); 540 541 PhysRegsUsed[PhysReg] = true; 542 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot); 543 DEBUG(std::cerr << "Store:\t" << *next(MII)); 544 MI.SetMachineOperandReg(i, PhysReg); 545 546 // If there is a dead store to this stack slot, nuke it now. 547 MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; 548 if (LastStore) { 549 DEBUG(std::cerr << " Killed store:\t" << *LastStore); 550 ++NumDSE; 551 MBB.erase(LastStore); 552 } 553 LastStore = next(MII); 554 555 // If the stack slot value was previously available in some other 556 // register, change it now. Otherwise, make the register available, 557 // in PhysReg. 558 std::map<int, unsigned>::iterator SSA = 559 SpillSlotsAvailable.find(StackSlot); 560 if (SSA != SpillSlotsAvailable.end()) { 561 // Remove the record for physreg. 562 PhysRegsAvailable.erase(SSA->second); 563 SpillSlotsAvailable.erase(SSA); 564 } 565 ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable); 566 567 PhysRegsAvailable[PhysReg] = StackSlot; 568 SpillSlotsAvailable[StackSlot] = PhysReg; 569 DEBUG(std::cerr << "Updating SS#" << StackSlot <<" in physreg " 570 << MRI->getName(PhysReg) << " for virtreg #" 571 << VirtReg << "\n"); 572 573 ++NumStores; 574 VirtReg = PhysReg; 575 } 576 } 577 } 578 MII = NextMII; 579 } 580} 581 582 583 584llvm::Spiller* llvm::createSpiller() { 585 switch (SpillerOpt) { 586 default: assert(0 && "Unreachable!"); 587 case local: 588 return new LocalSpiller(); 589 case simple: 590 return new SimpleSpiller(); 591 } 592} 593