VirtRegMap.cpp revision 7efc9422a5683d41ae54d937754998501923612d
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the VirtRegMap class.
11//
12// It also contains implementations of the the Spiller interface, which, given a
13// virtual register map and a machine function, eliminates all virtual
14// references by replacing them with physical register references - adding spill
15// code as necessary.
16//
17//===----------------------------------------------------------------------===//
18
19#define DEBUG_TYPE "spiller"
20#include "VirtRegMap.h"
21#include "llvm/Function.h"
22#include "llvm/CodeGen/MachineFrameInfo.h"
23#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/SSARegMap.h"
25#include "llvm/Target/TargetMachine.h"
26#include "llvm/Target/TargetInstrInfo.h"
27#include "llvm/Support/CommandLine.h"
28#include "llvm/Support/Debug.h"
29#include "llvm/Support/Compiler.h"
30#include "llvm/ADT/BitVector.h"
31#include "llvm/ADT/Statistic.h"
32#include "llvm/ADT/STLExtras.h"
33#include "llvm/ADT/SmallSet.h"
34#include <algorithm>
35using namespace llvm;
36
37STATISTIC(NumSpills, "Number of register spills");
38STATISTIC(NumReMats, "Number of re-materialization");
39STATISTIC(NumDRM   , "Number of re-materializable defs elided");
40STATISTIC(NumStores, "Number of stores added");
41STATISTIC(NumLoads , "Number of loads added");
42STATISTIC(NumReused, "Number of values reused");
43STATISTIC(NumDSE   , "Number of dead stores elided");
44STATISTIC(NumDCE   , "Number of copies elided");
45
46namespace {
47  enum SpillerName { simple, local };
48
49  static cl::opt<SpillerName>
50  SpillerOpt("spiller",
51             cl::desc("Spiller to use: (default: local)"),
52             cl::Prefix,
53             cl::values(clEnumVal(simple, "  simple spiller"),
54                        clEnumVal(local,  "  local spiller"),
55                        clEnumValEnd),
56             cl::init(local));
57}
58
59//===----------------------------------------------------------------------===//
60//  VirtRegMap implementation
61//===----------------------------------------------------------------------===//
62
63VirtRegMap::VirtRegMap(MachineFunction &mf)
64  : TII(*mf.getTarget().getInstrInfo()), MF(mf),
65    Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT),
66    Virt2ReMatIdMap(NO_STACK_SLOT), ReMatMap(NULL),
67    ReMatId(MAX_STACK_SLOT+1) {
68  grow();
69}
70
71void VirtRegMap::grow() {
72  unsigned LastVirtReg = MF.getSSARegMap()->getLastVirtReg();
73  Virt2PhysMap.grow(LastVirtReg);
74  Virt2StackSlotMap.grow(LastVirtReg);
75  Virt2ReMatIdMap.grow(LastVirtReg);
76  ReMatMap.grow(LastVirtReg);
77}
78
79int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
80  assert(MRegisterInfo::isVirtualRegister(virtReg));
81  assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
82         "attempt to assign stack slot to already spilled register");
83  const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
84  int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
85                                                        RC->getAlignment());
86  Virt2StackSlotMap[virtReg] = frameIndex;
87  ++NumSpills;
88  return frameIndex;
89}
90
91void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
92  assert(MRegisterInfo::isVirtualRegister(virtReg));
93  assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
94         "attempt to assign stack slot to already spilled register");
95  assert((frameIndex >= 0 ||
96          (frameIndex >= MF.getFrameInfo()->getObjectIndexBegin())) &&
97         "illegal fixed frame index");
98  Virt2StackSlotMap[virtReg] = frameIndex;
99}
100
101int VirtRegMap::assignVirtReMatId(unsigned virtReg) {
102  assert(MRegisterInfo::isVirtualRegister(virtReg));
103  assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
104         "attempt to assign re-mat id to already spilled register");
105  Virt2ReMatIdMap[virtReg] = ReMatId;
106  return ReMatId++;
107}
108
109void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) {
110  assert(MRegisterInfo::isVirtualRegister(virtReg));
111  assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
112         "attempt to assign re-mat id to already spilled register");
113  Virt2ReMatIdMap[virtReg] = id;
114}
115
116void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
117                            unsigned OpNo, MachineInstr *NewMI) {
118  // Move previous memory references folded to new instruction.
119  MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
120  for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
121         E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
122    MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
123    MI2VirtMap.erase(I++);
124  }
125
126  ModRef MRInfo;
127  const TargetInstrDescriptor *TID = OldMI->getInstrDescriptor();
128  if (TID->getOperandConstraint(OpNo, TOI::TIED_TO) != -1 ||
129      TID->findTiedToSrcOperand(OpNo) != -1) {
130    // Folded a two-address operand.
131    MRInfo = isModRef;
132  } else if (OldMI->getOperand(OpNo).isDef()) {
133    MRInfo = isMod;
134  } else {
135    MRInfo = isRef;
136  }
137
138  // add new memory reference
139  MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
140}
141
142void VirtRegMap::print(std::ostream &OS) const {
143  const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
144
145  OS << "********** REGISTER MAP **********\n";
146  for (unsigned i = MRegisterInfo::FirstVirtualRegister,
147         e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
148    if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
149      OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
150
151  }
152
153  for (unsigned i = MRegisterInfo::FirstVirtualRegister,
154         e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
155    if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
156      OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
157  OS << '\n';
158}
159
160void VirtRegMap::dump() const {
161  print(DOUT);
162}
163
164
165//===----------------------------------------------------------------------===//
166// Simple Spiller Implementation
167//===----------------------------------------------------------------------===//
168
169Spiller::~Spiller() {}
170
171namespace {
172  struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
173    bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
174  };
175}
176
177bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
178  DOUT << "********** REWRITE MACHINE CODE **********\n";
179  DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
180  const TargetMachine &TM = MF.getTarget();
181  const MRegisterInfo &MRI = *TM.getRegisterInfo();
182
183  // LoadedRegs - Keep track of which vregs are loaded, so that we only load
184  // each vreg once (in the case where a spilled vreg is used by multiple
185  // operands).  This is always smaller than the number of operands to the
186  // current machine instr, so it should be small.
187  std::vector<unsigned> LoadedRegs;
188
189  for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
190       MBBI != E; ++MBBI) {
191    DOUT << MBBI->getBasicBlock()->getName() << ":\n";
192    MachineBasicBlock &MBB = *MBBI;
193    for (MachineBasicBlock::iterator MII = MBB.begin(),
194           E = MBB.end(); MII != E; ++MII) {
195      MachineInstr &MI = *MII;
196      for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
197        MachineOperand &MO = MI.getOperand(i);
198        if (MO.isRegister() && MO.getReg())
199          if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
200            unsigned VirtReg = MO.getReg();
201            unsigned PhysReg = VRM.getPhys(VirtReg);
202            if (!VRM.isAssignedReg(VirtReg)) {
203              int StackSlot = VRM.getStackSlot(VirtReg);
204              const TargetRegisterClass* RC =
205                MF.getSSARegMap()->getRegClass(VirtReg);
206
207              if (MO.isUse() &&
208                  std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
209                  == LoadedRegs.end()) {
210                MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
211                LoadedRegs.push_back(VirtReg);
212                ++NumLoads;
213                DOUT << '\t' << *prior(MII);
214              }
215
216              if (MO.isDef()) {
217                MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
218                ++NumStores;
219              }
220            }
221            MF.setPhysRegUsed(PhysReg);
222            MI.getOperand(i).setReg(PhysReg);
223          } else {
224            MF.setPhysRegUsed(MO.getReg());
225          }
226      }
227
228      DOUT << '\t' << MI;
229      LoadedRegs.clear();
230    }
231  }
232  return true;
233}
234
235//===----------------------------------------------------------------------===//
236//  Local Spiller Implementation
237//===----------------------------------------------------------------------===//
238
239namespace {
240  /// LocalSpiller - This spiller does a simple pass over the machine basic
241  /// block to attempt to keep spills in registers as much as possible for
242  /// blocks that have low register pressure (the vreg may be spilled due to
243  /// register pressure in other blocks).
244  class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
245    const MRegisterInfo *MRI;
246    const TargetInstrInfo *TII;
247  public:
248    bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
249      MRI = MF.getTarget().getRegisterInfo();
250      TII = MF.getTarget().getInstrInfo();
251      DOUT << "\n**** Local spiller rewriting function '"
252           << MF.getFunction()->getName() << "':\n";
253
254      for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
255           MBB != E; ++MBB)
256        RewriteMBB(*MBB, VRM);
257      return true;
258    }
259  private:
260    void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
261  };
262}
263
264/// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
265/// top down, keep track of which spills slots or remat are available in each
266/// register.
267///
268/// Note that not all physregs are created equal here.  In particular, some
269/// physregs are reloads that we are allowed to clobber or ignore at any time.
270/// Other physregs are values that the register allocated program is using that
271/// we cannot CHANGE, but we can read if we like.  We keep track of this on a
272/// per-stack-slot / remat id basis as the low bit in the value of the
273/// SpillSlotsAvailable entries.  The predicate 'canClobberPhysReg()' checks
274/// this bit and addAvailable sets it if.
275namespace {
276class VISIBILITY_HIDDEN AvailableSpills {
277  const MRegisterInfo *MRI;
278  const TargetInstrInfo *TII;
279
280  // SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled
281  // or remat'ed virtual register values that are still available, due to being
282  // loaded or stored to, but not invalidated yet.
283  std::map<int, unsigned> SpillSlotsOrReMatsAvailable;
284
285  // PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable,
286  // indicating which stack slot values are currently held by a physreg.  This
287  // is used to invalidate entries in SpillSlotsOrReMatsAvailable when a
288  // physreg is modified.
289  std::multimap<unsigned, int> PhysRegsAvailable;
290
291  void disallowClobberPhysRegOnly(unsigned PhysReg);
292
293  void ClobberPhysRegOnly(unsigned PhysReg);
294public:
295  AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
296    : MRI(mri), TII(tii) {
297  }
298
299  const MRegisterInfo *getRegInfo() const { return MRI; }
300
301  /// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is
302  /// available in a  physical register, return that PhysReg, otherwise
303  /// return 0.
304  unsigned getSpillSlotOrReMatPhysReg(int Slot) const {
305    std::map<int, unsigned>::const_iterator I =
306      SpillSlotsOrReMatsAvailable.find(Slot);
307    if (I != SpillSlotsOrReMatsAvailable.end()) {
308      return I->second >> 1;  // Remove the CanClobber bit.
309    }
310    return 0;
311  }
312
313  /// addAvailable - Mark that the specified stack slot / remat is available in
314  /// the specified physreg.  If CanClobber is true, the physreg can be modified
315  /// at any time without changing the semantics of the program.
316  void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg,
317                    bool CanClobber = true) {
318    // If this stack slot is thought to be available in some other physreg,
319    // remove its record.
320    ModifyStackSlotOrReMat(SlotOrReMat);
321
322    PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat));
323    SpillSlotsOrReMatsAvailable[SlotOrReMat]= (Reg << 1) | (unsigned)CanClobber;
324
325    if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
326      DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1;
327    else
328      DOUT << "Remembering SS#" << SlotOrReMat;
329    DOUT << " in physreg " << MRI->getName(Reg) << "\n";
330  }
331
332  /// canClobberPhysReg - Return true if the spiller is allowed to change the
333  /// value of the specified stackslot register if it desires.  The specified
334  /// stack slot must be available in a physreg for this query to make sense.
335  bool canClobberPhysReg(int SlotOrReMat) const {
336    assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) &&
337           "Value not available!");
338    return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1;
339  }
340
341  /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
342  /// stackslot register. The register is still available but is no longer
343  /// allowed to be modifed.
344  void disallowClobberPhysReg(unsigned PhysReg);
345
346  /// ClobberPhysReg - This is called when the specified physreg changes
347  /// value.  We use this to invalidate any info about stuff we thing lives in
348  /// it and any of its aliases.
349  void ClobberPhysReg(unsigned PhysReg);
350
351  /// ModifyStackSlotOrReMat - This method is called when the value in a stack
352  /// slot changes.  This removes information about which register the previous
353  /// value for this slot lives in (as the previous value is dead now).
354  void ModifyStackSlotOrReMat(int SlotOrReMat);
355};
356}
357
358/// disallowClobberPhysRegOnly - Unset the CanClobber bit of the specified
359/// stackslot register. The register is still available but is no longer
360/// allowed to be modifed.
361void AvailableSpills::disallowClobberPhysRegOnly(unsigned PhysReg) {
362  std::multimap<unsigned, int>::iterator I =
363    PhysRegsAvailable.lower_bound(PhysReg);
364  while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
365    int SlotOrReMat = I->second;
366    I++;
367    assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
368           "Bidirectional map mismatch!");
369    SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1;
370    DOUT << "PhysReg " << MRI->getName(PhysReg)
371         << " copied, it is available for use but can no longer be modified\n";
372  }
373}
374
375/// disallowClobberPhysReg - Unset the CanClobber bit of the specified
376/// stackslot register and its aliases. The register and its aliases may
377/// still available but is no longer allowed to be modifed.
378void AvailableSpills::disallowClobberPhysReg(unsigned PhysReg) {
379  for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
380    disallowClobberPhysRegOnly(*AS);
381  disallowClobberPhysRegOnly(PhysReg);
382}
383
384/// ClobberPhysRegOnly - This is called when the specified physreg changes
385/// value.  We use this to invalidate any info about stuff we thing lives in it.
386void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
387  std::multimap<unsigned, int>::iterator I =
388    PhysRegsAvailable.lower_bound(PhysReg);
389  while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
390    int SlotOrReMat = I->second;
391    PhysRegsAvailable.erase(I++);
392    assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
393           "Bidirectional map mismatch!");
394    SpillSlotsOrReMatsAvailable.erase(SlotOrReMat);
395    DOUT << "PhysReg " << MRI->getName(PhysReg)
396         << " clobbered, invalidating ";
397    if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
398      DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n";
399    else
400      DOUT << "SS#" << SlotOrReMat << "\n";
401  }
402}
403
404/// ClobberPhysReg - This is called when the specified physreg changes
405/// value.  We use this to invalidate any info about stuff we thing lives in
406/// it and any of its aliases.
407void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
408  for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
409    ClobberPhysRegOnly(*AS);
410  ClobberPhysRegOnly(PhysReg);
411}
412
413/// ModifyStackSlotOrReMat - This method is called when the value in a stack
414/// slot changes.  This removes information about which register the previous
415/// value for this slot lives in (as the previous value is dead now).
416void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) {
417  std::map<int, unsigned>::iterator It =
418    SpillSlotsOrReMatsAvailable.find(SlotOrReMat);
419  if (It == SpillSlotsOrReMatsAvailable.end()) return;
420  unsigned Reg = It->second >> 1;
421  SpillSlotsOrReMatsAvailable.erase(It);
422
423  // This register may hold the value of multiple stack slots, only remove this
424  // stack slot from the set of values the register contains.
425  std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
426  for (; ; ++I) {
427    assert(I != PhysRegsAvailable.end() && I->first == Reg &&
428           "Map inverse broken!");
429    if (I->second == SlotOrReMat) break;
430  }
431  PhysRegsAvailable.erase(I);
432}
433
434
435
436/// InvalidateKills - MI is going to be deleted. If any of its operands are
437/// marked kill, then invalidate the information.
438static void InvalidateKills(MachineInstr &MI, BitVector &RegKills,
439                            std::vector<MachineOperand*> &KillOps,
440                            SmallVector<unsigned, 1> *KillRegs = NULL) {
441  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
442    MachineOperand &MO = MI.getOperand(i);
443    if (!MO.isReg() || !MO.isUse() || !MO.isKill())
444      continue;
445    unsigned Reg = MO.getReg();
446    if (KillRegs)
447      KillRegs->push_back(Reg);
448    if (KillOps[Reg] == &MO) {
449      RegKills.reset(Reg);
450      KillOps[Reg] = NULL;
451    }
452  }
453}
454
455/// InvalidateRegDef - If the def operand of the specified def MI is now dead
456/// (since it's spill instruction is removed), mark it isDead. Also checks if
457/// the def MI has other definition operands that are not dead. Returns it by
458/// reference.
459static bool InvalidateRegDef(MachineBasicBlock::iterator I,
460                             MachineInstr &NewDef, unsigned Reg,
461                             bool &HasLiveDef) {
462  // Due to remat, it's possible this reg isn't being reused. That is,
463  // the def of this reg (by prev MI) is now dead.
464  MachineInstr *DefMI = I;
465  MachineOperand *DefOp = NULL;
466  for (unsigned i = 0, e = DefMI->getNumOperands(); i != e; ++i) {
467    MachineOperand &MO = DefMI->getOperand(i);
468    if (MO.isReg() && MO.isDef()) {
469      if (MO.getReg() == Reg)
470        DefOp = &MO;
471      else if (!MO.isDead())
472        HasLiveDef = true;
473    }
474  }
475  if (!DefOp)
476    return false;
477
478  bool FoundUse = false, Done = false;
479  MachineBasicBlock::iterator E = NewDef;
480  ++I; ++E;
481  for (; !Done && I != E; ++I) {
482    MachineInstr *NMI = I;
483    for (unsigned j = 0, ee = NMI->getNumOperands(); j != ee; ++j) {
484      MachineOperand &MO = NMI->getOperand(j);
485      if (!MO.isReg() || MO.getReg() != Reg)
486        continue;
487      if (MO.isUse())
488        FoundUse = true;
489      Done = true; // Stop after scanning all the operands of this MI.
490    }
491  }
492  if (!FoundUse) {
493    // Def is dead!
494    DefOp->setIsDead();
495    return true;
496  }
497  return false;
498}
499
500/// UpdateKills - Track and update kill info. If a MI reads a register that is
501/// marked kill, then it must be due to register reuse. Transfer the kill info
502/// over.
503static void UpdateKills(MachineInstr &MI, BitVector &RegKills,
504                        std::vector<MachineOperand*> &KillOps) {
505  const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
506  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
507    MachineOperand &MO = MI.getOperand(i);
508    if (!MO.isReg() || !MO.isUse())
509      continue;
510    unsigned Reg = MO.getReg();
511    if (Reg == 0)
512      continue;
513
514    if (RegKills[Reg]) {
515      // That can't be right. Register is killed but not re-defined and it's
516      // being reused. Let's fix that.
517      KillOps[Reg]->unsetIsKill();
518      if (i < TID->numOperands &&
519          TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
520        // Unless it's a two-address operand, this is the new kill.
521        MO.setIsKill();
522    }
523
524    if (MO.isKill()) {
525      RegKills.set(Reg);
526      KillOps[Reg] = &MO;
527    }
528  }
529
530  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
531    const MachineOperand &MO = MI.getOperand(i);
532    if (!MO.isReg() || !MO.isDef())
533      continue;
534    unsigned Reg = MO.getReg();
535    RegKills.reset(Reg);
536    KillOps[Reg] = NULL;
537  }
538}
539
540
541// ReusedOp - For each reused operand, we keep track of a bit of information, in
542// case we need to rollback upon processing a new operand.  See comments below.
543namespace {
544  struct ReusedOp {
545    // The MachineInstr operand that reused an available value.
546    unsigned Operand;
547
548    // StackSlotOrReMat - The spill slot or remat id of the value being reused.
549    unsigned StackSlotOrReMat;
550
551    // PhysRegReused - The physical register the value was available in.
552    unsigned PhysRegReused;
553
554    // AssignedPhysReg - The physreg that was assigned for use by the reload.
555    unsigned AssignedPhysReg;
556
557    // VirtReg - The virtual register itself.
558    unsigned VirtReg;
559
560    ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
561             unsigned vreg)
562      : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr),
563        AssignedPhysReg(apr), VirtReg(vreg) {}
564  };
565
566  /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
567  /// is reused instead of reloaded.
568  class VISIBILITY_HIDDEN ReuseInfo {
569    MachineInstr &MI;
570    std::vector<ReusedOp> Reuses;
571    BitVector PhysRegsClobbered;
572  public:
573    ReuseInfo(MachineInstr &mi, const MRegisterInfo *mri) : MI(mi) {
574      PhysRegsClobbered.resize(mri->getNumRegs());
575    }
576
577    bool hasReuses() const {
578      return !Reuses.empty();
579    }
580
581    /// addReuse - If we choose to reuse a virtual register that is already
582    /// available instead of reloading it, remember that we did so.
583    void addReuse(unsigned OpNo, unsigned StackSlotOrReMat,
584                  unsigned PhysRegReused, unsigned AssignedPhysReg,
585                  unsigned VirtReg) {
586      // If the reload is to the assigned register anyway, no undo will be
587      // required.
588      if (PhysRegReused == AssignedPhysReg) return;
589
590      // Otherwise, remember this.
591      Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused,
592                                AssignedPhysReg, VirtReg));
593    }
594
595    void markClobbered(unsigned PhysReg) {
596      PhysRegsClobbered.set(PhysReg);
597    }
598
599    bool isClobbered(unsigned PhysReg) const {
600      return PhysRegsClobbered.test(PhysReg);
601    }
602
603    /// GetRegForReload - We are about to emit a reload into PhysReg.  If there
604    /// is some other operand that is using the specified register, either pick
605    /// a new register to use, or evict the previous reload and use this reg.
606    unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
607                             AvailableSpills &Spills,
608                             std::vector<MachineInstr*> &MaybeDeadStores,
609                             SmallSet<unsigned, 8> &Rejected,
610                             BitVector &RegKills,
611                             std::vector<MachineOperand*> &KillOps,
612                             VirtRegMap &VRM) {
613      if (Reuses.empty()) return PhysReg;  // This is most often empty.
614
615      for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
616        ReusedOp &Op = Reuses[ro];
617        // If we find some other reuse that was supposed to use this register
618        // exactly for its reload, we can change this reload to use ITS reload
619        // register. That is, unless its reload register has already been
620        // considered and subsequently rejected because it has also been reused
621        // by another operand.
622        if (Op.PhysRegReused == PhysReg &&
623            Rejected.count(Op.AssignedPhysReg) == 0) {
624          // Yup, use the reload register that we didn't use before.
625          unsigned NewReg = Op.AssignedPhysReg;
626          Rejected.insert(PhysReg);
627          return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected,
628                                 RegKills, KillOps, VRM);
629        } else {
630          // Otherwise, we might also have a problem if a previously reused
631          // value aliases the new register.  If so, codegen the previous reload
632          // and use this one.
633          unsigned PRRU = Op.PhysRegReused;
634          const MRegisterInfo *MRI = Spills.getRegInfo();
635          if (MRI->areAliases(PRRU, PhysReg)) {
636            // Okay, we found out that an alias of a reused register
637            // was used.  This isn't good because it means we have
638            // to undo a previous reuse.
639            MachineBasicBlock *MBB = MI->getParent();
640            const TargetRegisterClass *AliasRC =
641              MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
642
643            // Copy Op out of the vector and remove it, we're going to insert an
644            // explicit load for it.
645            ReusedOp NewOp = Op;
646            Reuses.erase(Reuses.begin()+ro);
647
648            // Ok, we're going to try to reload the assigned physreg into the
649            // slot that we were supposed to in the first place.  However, that
650            // register could hold a reuse.  Check to see if it conflicts or
651            // would prefer us to use a different register.
652            unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
653                                                  MI, Spills, MaybeDeadStores,
654                                              Rejected, RegKills, KillOps, VRM);
655
656            if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) {
657              MRI->reMaterialize(*MBB, MI, NewPhysReg,
658                                 VRM.getReMaterializedMI(NewOp.VirtReg));
659              ++NumReMats;
660            } else {
661              MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
662                                        NewOp.StackSlotOrReMat, AliasRC);
663              // Any stores to this stack slot are not dead anymore.
664              MaybeDeadStores[NewOp.StackSlotOrReMat] = NULL;
665              ++NumLoads;
666            }
667            Spills.ClobberPhysReg(NewPhysReg);
668            Spills.ClobberPhysReg(NewOp.PhysRegReused);
669
670            MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
671
672            Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg);
673            MachineBasicBlock::iterator MII = MI;
674            --MII;
675            UpdateKills(*MII, RegKills, KillOps);
676            DOUT << '\t' << *MII;
677
678            DOUT << "Reuse undone!\n";
679            --NumReused;
680
681            // Finally, PhysReg is now available, go ahead and use it.
682            return PhysReg;
683          }
684        }
685      }
686      return PhysReg;
687    }
688
689    /// GetRegForReload - Helper for the above GetRegForReload(). Add a
690    /// 'Rejected' set to remember which registers have been considered and
691    /// rejected for the reload. This avoids infinite looping in case like
692    /// this:
693    /// t1 := op t2, t3
694    /// t2 <- assigned r0 for use by the reload but ended up reuse r1
695    /// t3 <- assigned r1 for use by the reload but ended up reuse r0
696    /// t1 <- desires r1
697    ///       sees r1 is taken by t2, tries t2's reload register r0
698    ///       sees r0 is taken by t3, tries t3's reload register r1
699    ///       sees r1 is taken by t2, tries t2's reload register r0 ...
700    unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
701                             AvailableSpills &Spills,
702                             std::vector<MachineInstr*> &MaybeDeadStores,
703                             BitVector &RegKills,
704                             std::vector<MachineOperand*> &KillOps,
705                             VirtRegMap &VRM) {
706      SmallSet<unsigned, 8> Rejected;
707      return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected,
708                             RegKills, KillOps, VRM);
709    }
710  };
711}
712
713
714/// rewriteMBB - Keep track of which spills are available even after the
715/// register allocator is done with them.  If possible, avoid reloading vregs.
716void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
717  DOUT << MBB.getBasicBlock()->getName() << ":\n";
718
719  MachineFunction &MF = *MBB.getParent();
720
721  // Spills - Keep track of which spilled values are available in physregs so
722  // that we can choose to reuse the physregs instead of emitting reloads.
723  AvailableSpills Spills(MRI, TII);
724
725  // MaybeDeadStores - When we need to write a value back into a stack slot,
726  // keep track of the inserted store.  If the stack slot value is never read
727  // (because the value was used from some available register, for example), and
728  // subsequently stored to, the original store is dead.  This map keeps track
729  // of inserted stores that are not used.  If we see a subsequent store to the
730  // same stack slot, the original store is deleted.
731  std::vector<MachineInstr*> MaybeDeadStores;
732  MaybeDeadStores.resize(MF.getFrameInfo()->getObjectIndexEnd(), NULL);
733
734  // ReMatDefs - These are rematerializable def MIs which are not deleted.
735  SmallSet<MachineInstr*, 4> ReMatDefs;
736
737  // Keep track of kill information.
738  BitVector RegKills(MRI->getNumRegs());
739  std::vector<MachineOperand*>  KillOps;
740  KillOps.resize(MRI->getNumRegs(), NULL);
741
742  for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
743       MII != E; ) {
744    MachineInstr &MI = *MII;
745    MachineBasicBlock::iterator NextMII = MII; ++NextMII;
746    VirtRegMap::MI2VirtMapTy::const_iterator I, End;
747
748    bool Erased = false;
749    bool BackTracked = false;
750
751    /// ReusedOperands - Keep track of operand reuse in case we need to undo
752    /// reuse.
753    ReuseInfo ReusedOperands(MI, MRI);
754
755    // Loop over all of the implicit defs, clearing them from our available
756    // sets.
757    const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
758    if (TID->ImplicitDefs) {
759      const unsigned *ImpDef = TID->ImplicitDefs;
760      for ( ; *ImpDef; ++ImpDef) {
761        MF.setPhysRegUsed(*ImpDef);
762        ReusedOperands.markClobbered(*ImpDef);
763        Spills.ClobberPhysReg(*ImpDef);
764      }
765    }
766
767    // Process all of the spilled uses and all non spilled reg references.
768    for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
769      MachineOperand &MO = MI.getOperand(i);
770      if (!MO.isRegister() || MO.getReg() == 0)
771        continue;   // Ignore non-register operands.
772
773      if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
774        // Ignore physregs for spilling, but remember that it is used by this
775        // function.
776        MF.setPhysRegUsed(MO.getReg());
777        ReusedOperands.markClobbered(MO.getReg());
778        continue;
779      }
780
781      assert(MRegisterInfo::isVirtualRegister(MO.getReg()) &&
782             "Not a virtual or a physical register?");
783
784      unsigned VirtReg = MO.getReg();
785      if (VRM.isAssignedReg(VirtReg)) {
786        // This virtual register was assigned a physreg!
787        unsigned Phys = VRM.getPhys(VirtReg);
788        MF.setPhysRegUsed(Phys);
789        if (MO.isDef())
790          ReusedOperands.markClobbered(Phys);
791        MI.getOperand(i).setReg(Phys);
792        continue;
793      }
794
795      // This virtual register is now known to be a spilled value.
796      if (!MO.isUse())
797        continue;  // Handle defs in the loop below (handle use&def here though)
798
799      bool DoReMat = VRM.isReMaterialized(VirtReg);
800      int SSorRMId = DoReMat
801        ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg);
802      int ReuseSlot = SSorRMId;
803
804      // Check to see if this stack slot is available.
805      unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId);
806      if (!PhysReg && DoReMat) {
807        // This use is rematerializable. But perhaps the value is available in
808        // stack if the definition is not deleted. If so, check if we can
809        // reuse the value.
810        ReuseSlot = VRM.getStackSlot(VirtReg);
811        if (ReuseSlot != VirtRegMap::NO_STACK_SLOT)
812          PhysReg = Spills.getSpillSlotOrReMatPhysReg(ReuseSlot);
813      }
814      if (PhysReg) {
815        // This spilled operand might be part of a two-address operand.  If this
816        // is the case, then changing it will necessarily require changing the
817        // def part of the instruction as well.  However, in some cases, we
818        // aren't allowed to modify the reused register.  If none of these cases
819        // apply, reuse it.
820        bool CanReuse = true;
821        int ti = TID->getOperandConstraint(i, TOI::TIED_TO);
822        if (ti != -1 &&
823            MI.getOperand(ti).isReg() &&
824            MI.getOperand(ti).getReg() == VirtReg) {
825          // Okay, we have a two address operand.  We can reuse this physreg as
826          // long as we are allowed to clobber the value and there isn't an
827          // earlier def that has already clobbered the physreg.
828          CanReuse = Spills.canClobberPhysReg(ReuseSlot) &&
829            !ReusedOperands.isClobbered(PhysReg);
830        }
831
832        if (CanReuse) {
833          // If this stack slot value is already available, reuse it!
834          if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
835            DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
836          else
837            DOUT << "Reusing SS#" << ReuseSlot;
838          DOUT << " from physreg "
839               << MRI->getName(PhysReg) << " for vreg"
840               << VirtReg <<" instead of reloading into physreg "
841               << MRI->getName(VRM.getPhys(VirtReg)) << "\n";
842          MI.getOperand(i).setReg(PhysReg);
843
844          // The only technical detail we have is that we don't know that
845          // PhysReg won't be clobbered by a reloaded stack slot that occurs
846          // later in the instruction.  In particular, consider 'op V1, V2'.
847          // If V1 is available in physreg R0, we would choose to reuse it
848          // here, instead of reloading it into the register the allocator
849          // indicated (say R1).  However, V2 might have to be reloaded
850          // later, and it might indicate that it needs to live in R0.  When
851          // this occurs, we need to have information available that
852          // indicates it is safe to use R1 for the reload instead of R0.
853          //
854          // To further complicate matters, we might conflict with an alias,
855          // or R0 and R1 might not be compatible with each other.  In this
856          // case, we actually insert a reload for V1 in R1, ensuring that
857          // we can get at R0 or its alias.
858          ReusedOperands.addReuse(i, ReuseSlot, PhysReg,
859                                  VRM.getPhys(VirtReg), VirtReg);
860          if (ti != -1)
861            // Only mark it clobbered if this is a use&def operand.
862            ReusedOperands.markClobbered(PhysReg);
863          ++NumReused;
864
865          if (MI.getOperand(i).isKill() &&
866              ReuseSlot <= VirtRegMap::MAX_STACK_SLOT) {
867            // This was the last use and the spilled value is still available
868            // for reuse. That means the spill was unnecessary!
869            MachineInstr* DeadStore = MaybeDeadStores[ReuseSlot];
870            if (DeadStore) {
871              DOUT << "Removed dead store:\t" << *DeadStore;
872              InvalidateKills(*DeadStore, RegKills, KillOps);
873              MBB.erase(DeadStore);
874              VRM.RemoveFromFoldedVirtMap(DeadStore);
875              MaybeDeadStores[ReuseSlot] = NULL;
876              ++NumDSE;
877            }
878          }
879          continue;
880        }
881
882        // Otherwise we have a situation where we have a two-address instruction
883        // whose mod/ref operand needs to be reloaded.  This reload is already
884        // available in some register "PhysReg", but if we used PhysReg as the
885        // operand to our 2-addr instruction, the instruction would modify
886        // PhysReg.  This isn't cool if something later uses PhysReg and expects
887        // to get its initial value.
888        //
889        // To avoid this problem, and to avoid doing a load right after a store,
890        // we emit a copy from PhysReg into the designated register for this
891        // operand.
892        unsigned DesignatedReg = VRM.getPhys(VirtReg);
893        assert(DesignatedReg && "Must map virtreg to physreg!");
894
895        // Note that, if we reused a register for a previous operand, the
896        // register we want to reload into might not actually be
897        // available.  If this occurs, use the register indicated by the
898        // reuser.
899        if (ReusedOperands.hasReuses())
900          DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
901                               Spills, MaybeDeadStores, RegKills, KillOps, VRM);
902
903        // If the mapped designated register is actually the physreg we have
904        // incoming, we don't need to inserted a dead copy.
905        if (DesignatedReg == PhysReg) {
906          // If this stack slot value is already available, reuse it!
907          if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
908            DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
909          else
910            DOUT << "Reusing SS#" << ReuseSlot;
911          DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg"
912               << VirtReg
913               << " instead of reloading into same physreg.\n";
914          MI.getOperand(i).setReg(PhysReg);
915          ReusedOperands.markClobbered(PhysReg);
916          ++NumReused;
917          continue;
918        }
919
920        const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
921        MF.setPhysRegUsed(DesignatedReg);
922        ReusedOperands.markClobbered(DesignatedReg);
923        MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
924
925        MachineInstr *CopyMI = prior(MII);
926        UpdateKills(*CopyMI, RegKills, KillOps);
927
928        // This invalidates DesignatedReg.
929        Spills.ClobberPhysReg(DesignatedReg);
930
931        Spills.addAvailable(ReuseSlot, &MI, DesignatedReg);
932        MI.getOperand(i).setReg(DesignatedReg);
933        DOUT << '\t' << *prior(MII);
934        ++NumReused;
935        continue;
936      }
937
938      // Otherwise, reload it and remember that we have it.
939      PhysReg = VRM.getPhys(VirtReg);
940      assert(PhysReg && "Must map virtreg to physreg!");
941      const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
942
943      // Note that, if we reused a register for a previous operand, the
944      // register we want to reload into might not actually be
945      // available.  If this occurs, use the register indicated by the
946      // reuser.
947      if (ReusedOperands.hasReuses())
948        PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
949                               Spills, MaybeDeadStores, RegKills, KillOps, VRM);
950
951      MF.setPhysRegUsed(PhysReg);
952      ReusedOperands.markClobbered(PhysReg);
953      if (DoReMat) {
954        MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg));
955        ++NumReMats;
956      } else {
957        MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC);
958        ++NumLoads;
959      }
960      // This invalidates PhysReg.
961      Spills.ClobberPhysReg(PhysReg);
962
963      // Any stores to this stack slot are not dead anymore.
964      if (!DoReMat)
965        MaybeDeadStores[SSorRMId] = NULL;
966      Spills.addAvailable(SSorRMId, &MI, PhysReg);
967      // Assumes this is the last use. IsKill will be unset if reg is reused
968      // unless it's a two-address operand.
969      if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
970        MI.getOperand(i).setIsKill();
971      MI.getOperand(i).setReg(PhysReg);
972      UpdateKills(*prior(MII), RegKills, KillOps);
973      DOUT << '\t' << *prior(MII);
974    }
975
976    DOUT << '\t' << MI;
977
978    // If we have folded references to memory operands, make sure we clear all
979    // physical registers that may contain the value of the spilled virtual
980    // register
981    SmallSet<int, 1> FoldedSS;
982    for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
983      DOUT << "Folded vreg: " << I->second.first << "  MR: "
984           << I->second.second;
985      unsigned VirtReg = I->second.first;
986      VirtRegMap::ModRef MR = I->second.second;
987      if (VRM.isAssignedReg(VirtReg)) {
988        DOUT << ": No stack slot!\n";
989        continue;
990      }
991      int SS = VRM.getStackSlot(VirtReg);
992      FoldedSS.insert(SS);
993      DOUT << " - StackSlot: " << SS << "\n";
994
995      // If this folded instruction is just a use, check to see if it's a
996      // straight load from the virt reg slot.
997      if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
998        int FrameIdx;
999        if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
1000          if (FrameIdx == SS) {
1001            // If this spill slot is available, turn it into a copy (or nothing)
1002            // instead of leaving it as a load!
1003            if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) {
1004              DOUT << "Promoted Load To Copy: " << MI;
1005              if (DestReg != InReg) {
1006                MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
1007                                  MF.getSSARegMap()->getRegClass(VirtReg));
1008                // Revisit the copy so we make sure to notice the effects of the
1009                // operation on the destreg (either needing to RA it if it's
1010                // virtual or needing to clobber any values if it's physical).
1011                NextMII = &MI;
1012                --NextMII;  // backtrack to the copy.
1013                BackTracked = true;
1014              } else
1015                DOUT << "Removing now-noop copy: " << MI;
1016
1017              VRM.RemoveFromFoldedVirtMap(&MI);
1018              MBB.erase(&MI);
1019              Erased = true;
1020              goto ProcessNextInst;
1021            }
1022          }
1023        }
1024      }
1025
1026      // If this reference is not a use, any previous store is now dead.
1027      // Otherwise, the store to this stack slot is not dead anymore.
1028      MachineInstr* DeadStore = MaybeDeadStores[SS];
1029      if (DeadStore) {
1030        if (!(MR & VirtRegMap::isRef)) {  // Previous store is dead.
1031          // If we get here, the store is dead, nuke it now.
1032          assert(VirtRegMap::isMod && "Can't be modref!");
1033          DOUT << "Removed dead store:\t" << *DeadStore;
1034          InvalidateKills(*DeadStore, RegKills, KillOps);
1035          MBB.erase(DeadStore);
1036          VRM.RemoveFromFoldedVirtMap(DeadStore);
1037          ++NumDSE;
1038        }
1039        MaybeDeadStores[SS] = NULL;
1040      }
1041
1042      // If the spill slot value is available, and this is a new definition of
1043      // the value, the value is not available anymore.
1044      if (MR & VirtRegMap::isMod) {
1045        // Notice that the value in this stack slot has been modified.
1046        Spills.ModifyStackSlotOrReMat(SS);
1047
1048        // If this is *just* a mod of the value, check to see if this is just a
1049        // store to the spill slot (i.e. the spill got merged into the copy). If
1050        // so, realize that the vreg is available now, and add the store to the
1051        // MaybeDeadStore info.
1052        int StackSlot;
1053        if (!(MR & VirtRegMap::isRef)) {
1054          if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
1055            assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
1056                   "Src hasn't been allocated yet?");
1057            // Okay, this is certainly a store of SrcReg to [StackSlot].  Mark
1058            // this as a potentially dead store in case there is a subsequent
1059            // store into the stack slot without a read from it.
1060            MaybeDeadStores[StackSlot] = &MI;
1061
1062            // If the stack slot value was previously available in some other
1063            // register, change it now.  Otherwise, make the register available,
1064            // in PhysReg.
1065            Spills.addAvailable(StackSlot, &MI, SrcReg, false/*don't clobber*/);
1066          }
1067        }
1068      }
1069    }
1070
1071    // Process all of the spilled defs.
1072    for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1073      MachineOperand &MO = MI.getOperand(i);
1074      if (MO.isRegister() && MO.getReg() && MO.isDef()) {
1075        unsigned VirtReg = MO.getReg();
1076
1077        if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
1078          // Check to see if this is a noop copy.  If so, eliminate the
1079          // instruction before considering the dest reg to be changed.
1080          unsigned Src, Dst;
1081          if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1082            ++NumDCE;
1083            DOUT << "Removing now-noop copy: " << MI;
1084            MBB.erase(&MI);
1085            Erased = true;
1086            VRM.RemoveFromFoldedVirtMap(&MI);
1087            Spills.disallowClobberPhysReg(VirtReg);
1088            goto ProcessNextInst;
1089          }
1090
1091          // If it's not a no-op copy, it clobbers the value in the destreg.
1092          Spills.ClobberPhysReg(VirtReg);
1093          ReusedOperands.markClobbered(VirtReg);
1094
1095          // Check to see if this instruction is a load from a stack slot into
1096          // a register.  If so, this provides the stack slot value in the reg.
1097          int FrameIdx;
1098          if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
1099            assert(DestReg == VirtReg && "Unknown load situation!");
1100
1101            // If it is a folded reference, then it's not safe to clobber.
1102            bool Folded = FoldedSS.count(FrameIdx);
1103            // Otherwise, if it wasn't available, remember that it is now!
1104            Spills.addAvailable(FrameIdx, &MI, DestReg, !Folded);
1105            goto ProcessNextInst;
1106          }
1107
1108          continue;
1109        }
1110
1111        bool DoReMat = VRM.isReMaterialized(VirtReg);
1112        if (DoReMat)
1113          ReMatDefs.insert(&MI);
1114
1115        // The only vregs left are stack slot definitions.
1116        int StackSlot = VRM.getStackSlot(VirtReg);
1117        const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(VirtReg);
1118
1119        // If this def is part of a two-address operand, make sure to execute
1120        // the store from the correct physical register.
1121        unsigned PhysReg;
1122        int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i);
1123        if (TiedOp != -1)
1124          PhysReg = MI.getOperand(TiedOp).getReg();
1125        else {
1126          PhysReg = VRM.getPhys(VirtReg);
1127          if (ReusedOperands.isClobbered(PhysReg)) {
1128            // Another def has taken the assigned physreg. It must have been a
1129            // use&def which got it due to reuse. Undo the reuse!
1130            PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
1131                               Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1132          }
1133        }
1134
1135        MF.setPhysRegUsed(PhysReg);
1136        ReusedOperands.markClobbered(PhysReg);
1137        MI.getOperand(i).setReg(PhysReg);
1138        if (!MO.isDead()) {
1139          MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
1140          DOUT << "Store:\t" << *next(MII);
1141
1142          // If there is a dead store to this stack slot, nuke it now.
1143          MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
1144          if (LastStore) {
1145            DOUT << "Removed dead store:\t" << *LastStore;
1146            ++NumDSE;
1147            SmallVector<unsigned, 1> KillRegs;
1148            InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs);
1149            MachineBasicBlock::iterator PrevMII = LastStore;
1150            bool CheckDef = PrevMII != MBB.begin();
1151            if (CheckDef)
1152              --PrevMII;
1153            MBB.erase(LastStore);
1154            VRM.RemoveFromFoldedVirtMap(LastStore);
1155            if (CheckDef) {
1156              // Look at defs of killed registers on the store. Mark the defs
1157              // as dead since the store has been deleted and they aren't
1158              // being reused.
1159              for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) {
1160                bool HasOtherDef = false;
1161                if (InvalidateRegDef(PrevMII, MI, KillRegs[j], HasOtherDef)) {
1162                  MachineInstr *DeadDef = PrevMII;
1163                  if (ReMatDefs.count(DeadDef) && !HasOtherDef) {
1164                    // FIXME: This assumes a remat def does not have side
1165                    // effects.
1166                    MBB.erase(DeadDef);
1167                    VRM.RemoveFromFoldedVirtMap(DeadDef);
1168                    ++NumDRM;
1169                  }
1170                }
1171              }
1172            }
1173          }
1174          LastStore = next(MII);
1175
1176          // If the stack slot value was previously available in some other
1177          // register, change it now.  Otherwise, make the register available,
1178          // in PhysReg.
1179          Spills.ModifyStackSlotOrReMat(StackSlot);
1180          Spills.ClobberPhysReg(PhysReg);
1181          Spills.addAvailable(StackSlot, LastStore, PhysReg);
1182          ++NumStores;
1183
1184          // Check to see if this is a noop copy.  If so, eliminate the
1185          // instruction before considering the dest reg to be changed.
1186          {
1187            unsigned Src, Dst;
1188            if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1189              ++NumDCE;
1190              DOUT << "Removing now-noop copy: " << MI;
1191              MBB.erase(&MI);
1192              Erased = true;
1193              VRM.RemoveFromFoldedVirtMap(&MI);
1194              UpdateKills(*LastStore, RegKills, KillOps);
1195              goto ProcessNextInst;
1196            }
1197          }
1198        }
1199      }
1200    }
1201  ProcessNextInst:
1202    if (!Erased && !BackTracked)
1203      for (MachineBasicBlock::iterator II = MI; II != NextMII; ++II)
1204        UpdateKills(*II, RegKills, KillOps);
1205    MII = NextMII;
1206  }
1207}
1208
1209
1210llvm::Spiller* llvm::createSpiller() {
1211  switch (SpillerOpt) {
1212  default: assert(0 && "Unreachable!");
1213  case local:
1214    return new LocalSpiller();
1215  case simple:
1216    return new SimpleSpiller();
1217  }
1218}
1219