VirtRegMap.cpp revision 84e752a8129e7a02ee6e3c6d356a8fd68fbdf698
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the VirtRegMap class. 11// 12// It also contains implementations of the the Spiller interface, which, given a 13// virtual register map and a machine function, eliminates all virtual 14// references by replacing them with physical register references - adding spill 15// code as necessary. 16// 17//===----------------------------------------------------------------------===// 18 19#define DEBUG_TYPE "spiller" 20#include "VirtRegMap.h" 21#include "llvm/Function.h" 22#include "llvm/CodeGen/MachineFrameInfo.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/SSARegMap.h" 25#include "llvm/Target/TargetMachine.h" 26#include "llvm/Target/TargetInstrInfo.h" 27#include "llvm/Support/CommandLine.h" 28#include "llvm/Support/Debug.h" 29#include "llvm/ADT/Statistic.h" 30#include "llvm/ADT/STLExtras.h" 31#include <algorithm> 32#include <iostream> 33using namespace llvm; 34 35namespace { 36 Statistic<> NumSpills("spiller", "Number of register spills"); 37 Statistic<> NumStores("spiller", "Number of stores added"); 38 Statistic<> NumLoads ("spiller", "Number of loads added"); 39 Statistic<> NumReused("spiller", "Number of values reused"); 40 Statistic<> NumDSE ("spiller", "Number of dead stores elided"); 41 Statistic<> NumDCE ("spiller", "Number of copies elided"); 42 43 enum SpillerName { simple, local }; 44 45 cl::opt<SpillerName> 46 SpillerOpt("spiller", 47 cl::desc("Spiller to use: (default: local)"), 48 cl::Prefix, 49 cl::values(clEnumVal(simple, " simple spiller"), 50 clEnumVal(local, " local spiller"), 51 clEnumValEnd), 52 cl::init(local)); 53} 54 55//===----------------------------------------------------------------------===// 56// VirtRegMap implementation 57//===----------------------------------------------------------------------===// 58 59void VirtRegMap::grow() { 60 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg()); 61 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg()); 62} 63 64int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { 65 assert(MRegisterInfo::isVirtualRegister(virtReg)); 66 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 67 "attempt to assign stack slot to already spilled register"); 68 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg); 69 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(), 70 RC->getAlignment()); 71 Virt2StackSlotMap[virtReg] = frameIndex; 72 ++NumSpills; 73 return frameIndex; 74} 75 76void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) { 77 assert(MRegisterInfo::isVirtualRegister(virtReg)); 78 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 79 "attempt to assign stack slot to already spilled register"); 80 Virt2StackSlotMap[virtReg] = frameIndex; 81} 82 83void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, 84 unsigned OpNo, MachineInstr *NewMI) { 85 // Move previous memory references folded to new instruction. 86 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI); 87 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI), 88 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) { 89 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second)); 90 MI2VirtMap.erase(I++); 91 } 92 93 ModRef MRInfo; 94 if (!OldMI->getOperand(OpNo).isDef()) { 95 assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?"); 96 MRInfo = isRef; 97 } else { 98 MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod; 99 } 100 101 // add new memory reference 102 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo))); 103} 104 105void VirtRegMap::print(std::ostream &OS) const { 106 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo(); 107 108 OS << "********** REGISTER MAP **********\n"; 109 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 110 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) { 111 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) 112 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n"; 113 114 } 115 116 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 117 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) 118 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT) 119 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n"; 120 OS << '\n'; 121} 122 123void VirtRegMap::dump() const { print(std::cerr); } 124 125 126//===----------------------------------------------------------------------===// 127// Simple Spiller Implementation 128//===----------------------------------------------------------------------===// 129 130Spiller::~Spiller() {} 131 132namespace { 133 struct SimpleSpiller : public Spiller { 134 bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap &VRM); 135 }; 136} 137 138bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, 139 const VirtRegMap &VRM) { 140 DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); 141 DEBUG(std::cerr << "********** Function: " 142 << MF.getFunction()->getName() << '\n'); 143 const TargetMachine &TM = MF.getTarget(); 144 const MRegisterInfo &MRI = *TM.getRegisterInfo(); 145 bool *PhysRegsUsed = MF.getUsedPhysregs(); 146 147 // LoadedRegs - Keep track of which vregs are loaded, so that we only load 148 // each vreg once (in the case where a spilled vreg is used by multiple 149 // operands). This is always smaller than the number of operands to the 150 // current machine instr, so it should be small. 151 std::vector<unsigned> LoadedRegs; 152 153 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end(); 154 MBBI != E; ++MBBI) { 155 DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n"); 156 MachineBasicBlock &MBB = *MBBI; 157 for (MachineBasicBlock::iterator MII = MBB.begin(), 158 E = MBB.end(); MII != E; ++MII) { 159 MachineInstr &MI = *MII; 160 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 161 MachineOperand &MO = MI.getOperand(i); 162 if (MO.isRegister() && MO.getReg()) 163 if (MRegisterInfo::isVirtualRegister(MO.getReg())) { 164 unsigned VirtReg = MO.getReg(); 165 unsigned PhysReg = VRM.getPhys(VirtReg); 166 if (VRM.hasStackSlot(VirtReg)) { 167 int StackSlot = VRM.getStackSlot(VirtReg); 168 const TargetRegisterClass* RC = 169 MF.getSSARegMap()->getRegClass(VirtReg); 170 171 if (MO.isUse() && 172 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) 173 == LoadedRegs.end()) { 174 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); 175 LoadedRegs.push_back(VirtReg); 176 ++NumLoads; 177 DEBUG(std::cerr << '\t' << *prior(MII)); 178 } 179 180 if (MO.isDef()) { 181 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); 182 ++NumStores; 183 } 184 } 185 PhysRegsUsed[PhysReg] = true; 186 MI.SetMachineOperandReg(i, PhysReg); 187 } else { 188 PhysRegsUsed[MO.getReg()] = true; 189 } 190 } 191 192 DEBUG(std::cerr << '\t' << MI); 193 LoadedRegs.clear(); 194 } 195 } 196 return true; 197} 198 199//===----------------------------------------------------------------------===// 200// Local Spiller Implementation 201//===----------------------------------------------------------------------===// 202 203namespace { 204 /// LocalSpiller - This spiller does a simple pass over the machine basic 205 /// block to attempt to keep spills in registers as much as possible for 206 /// blocks that have low register pressure (the vreg may be spilled due to 207 /// register pressure in other blocks). 208 class LocalSpiller : public Spiller { 209 const MRegisterInfo *MRI; 210 const TargetInstrInfo *TII; 211 public: 212 bool runOnMachineFunction(MachineFunction &MF, const VirtRegMap &VRM) { 213 MRI = MF.getTarget().getRegisterInfo(); 214 TII = MF.getTarget().getInstrInfo(); 215 DEBUG(std::cerr << "\n**** Local spiller rewriting function '" 216 << MF.getFunction()->getName() << "':\n"); 217 218 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); 219 MBB != E; ++MBB) 220 RewriteMBB(*MBB, VRM); 221 return true; 222 } 223 private: 224 void RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM); 225 void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots, 226 std::multimap<unsigned, int> &PhysRegs); 227 void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots, 228 std::multimap<unsigned, int> &PhysRegs); 229 void ModifyStackSlot(int Slot, std::map<int, unsigned> &SpillSlots, 230 std::multimap<unsigned, int> &PhysRegs); 231 }; 232} 233 234void LocalSpiller::ClobberPhysRegOnly(unsigned PhysReg, 235 std::map<int, unsigned> &SpillSlots, 236 std::multimap<unsigned, int> &PhysRegsAvailable) { 237 std::map<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(PhysReg); 238 while (I != PhysRegsAvailable.end() && I->first == PhysReg) { 239 int Slot = I->second; 240 PhysRegsAvailable.erase(I++); 241 assert(SpillSlots[Slot] == PhysReg && "Bidirectional map mismatch!"); 242 SpillSlots.erase(Slot); 243 DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg) 244 << " clobbered, invalidating SS#" << Slot << "\n"); 245 246 } 247} 248 249void LocalSpiller::ClobberPhysReg(unsigned PhysReg, 250 std::map<int, unsigned> &SpillSlots, 251 std::multimap<unsigned, int> &PhysRegsAvailable) { 252 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS) 253 ClobberPhysRegOnly(*AS, SpillSlots, PhysRegsAvailable); 254 ClobberPhysRegOnly(PhysReg, SpillSlots, PhysRegsAvailable); 255} 256 257/// ModifyStackSlot - This method is called when the value in a stack slot 258/// changes. This removes information about which register the previous value 259/// for this slot lives in (as the previous value is dead now). 260void LocalSpiller::ModifyStackSlot(int Slot, std::map<int,unsigned> &SpillSlots, 261 std::multimap<unsigned, int> &PhysRegsAvailable) { 262 std::map<int, unsigned>::iterator It = SpillSlots.find(Slot); 263 if (It == SpillSlots.end()) return; 264 unsigned Reg = It->second; 265 SpillSlots.erase(It); 266 267 // This register may hold the value of multiple stack slots, only remove this 268 // stack slot from the set of values the register contains. 269 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg); 270 for (; ; ++I) { 271 assert(I != PhysRegsAvailable.end() && I->first == Reg && 272 "Map inverse broken!"); 273 if (I->second == Slot) break; 274 } 275 PhysRegsAvailable.erase(I); 276} 277 278 279 280// ReusedOp - For each reused operand, we keep track of a bit of information, in 281// case we need to rollback upon processing a new operand. See comments below. 282namespace { 283 struct ReusedOp { 284 // The MachineInstr operand that reused an available value. 285 unsigned Operand; 286 287 // StackSlot - The spill slot of the value being reused. 288 unsigned StackSlot; 289 290 // PhysRegReused - The physical register the value was available in. 291 unsigned PhysRegReused; 292 293 // AssignedPhysReg - The physreg that was assigned for use by the reload. 294 unsigned AssignedPhysReg; 295 296 // VirtReg - The virtual register itself. 297 unsigned VirtReg; 298 299 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr, 300 unsigned vreg) 301 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr), 302 VirtReg(vreg) {} 303 }; 304} 305 306 307/// rewriteMBB - Keep track of which spills are available even after the 308/// register allocator is done with them. If possible, avoid reloading vregs. 309void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) { 310 311 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual 312 // register values that are still available, due to being loaded or stored to, 313 // but not invalidated yet. 314 std::map<int, unsigned> SpillSlotsAvailable; 315 316 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating 317 // which stack slot values are currently held by a physreg. This is used to 318 // invalidate entries in SpillSlotsAvailable when a physreg is modified. 319 std::multimap<unsigned, int> PhysRegsAvailable; 320 321 DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n"); 322 323 std::vector<ReusedOp> ReusedOperands; 324 325 // DefAndUseVReg - When we see a def&use operand that is spilled, keep track 326 // of it. ".first" is the machine operand index (should always be 0 for now), 327 // and ".second" is the virtual register that is spilled. 328 std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg; 329 330 // MaybeDeadStores - When we need to write a value back into a stack slot, 331 // keep track of the inserted store. If the stack slot value is never read 332 // (because the value was used from some available register, for example), and 333 // subsequently stored to, the original store is dead. This map keeps track 334 // of inserted stores that are not used. If we see a subsequent store to the 335 // same stack slot, the original store is deleted. 336 std::map<int, MachineInstr*> MaybeDeadStores; 337 338 bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs(); 339 340 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); 341 MII != E; ) { 342 MachineInstr &MI = *MII; 343 MachineBasicBlock::iterator NextMII = MII; ++NextMII; 344 345 ReusedOperands.clear(); 346 DefAndUseVReg.clear(); 347 348 // Process all of the spilled uses and all non spilled reg references. 349 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 350 MachineOperand &MO = MI.getOperand(i); 351 if (!MO.isRegister() || MO.getReg() == 0) 352 continue; // Ignore non-register operands. 353 354 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) { 355 // Ignore physregs for spilling, but remember that it is used by this 356 // function. 357 PhysRegsUsed[MO.getReg()] = true; 358 continue; 359 } 360 361 assert(MRegisterInfo::isVirtualRegister(MO.getReg()) && 362 "Not a virtual or a physical register?"); 363 364 unsigned VirtReg = MO.getReg(); 365 if (!VRM.hasStackSlot(VirtReg)) { 366 // This virtual register was assigned a physreg! 367 unsigned Phys = VRM.getPhys(VirtReg); 368 PhysRegsUsed[Phys] = true; 369 MI.SetMachineOperandReg(i, Phys); 370 continue; 371 } 372 373 // This virtual register is now known to be a spilled value. 374 if (!MO.isUse()) 375 continue; // Handle defs in the loop below (handle use&def here though) 376 377 // If this is both a def and a use, we need to emit a store to the 378 // stack slot after the instruction. Keep track of D&U operands 379 // because we are about to change it to a physreg here. 380 if (MO.isDef()) { 381 // Remember that this was a def-and-use operand, and that the 382 // stack slot is live after this instruction executes. 383 DefAndUseVReg.push_back(std::make_pair(i, VirtReg)); 384 } 385 386 int StackSlot = VRM.getStackSlot(VirtReg); 387 unsigned PhysReg; 388 389 // Check to see if this stack slot is available. 390 std::map<int, unsigned>::iterator SSI = 391 SpillSlotsAvailable.find(StackSlot); 392 if (SSI != SpillSlotsAvailable.end()) { 393 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg " 394 << MRI->getName(SSI->second) << " for vreg" 395 << VirtReg <<" instead of reloading into physreg " 396 << MRI->getName(VRM.getPhys(VirtReg)) << "\n"); 397 // If this stack slot value is already available, reuse it! 398 PhysReg = SSI->second; 399 MI.SetMachineOperandReg(i, PhysReg); 400 401 // The only technical detail we have is that we don't know that 402 // PhysReg won't be clobbered by a reloaded stack slot that occurs 403 // later in the instruction. In particular, consider 'op V1, V2'. 404 // If V1 is available in physreg R0, we would choose to reuse it 405 // here, instead of reloading it into the register the allocator 406 // indicated (say R1). However, V2 might have to be reloaded 407 // later, and it might indicate that it needs to live in R0. When 408 // this occurs, we need to have information available that 409 // indicates it is safe to use R1 for the reload instead of R0. 410 // 411 // To further complicate matters, we might conflict with an alias, 412 // or R0 and R1 might not be compatible with each other. In this 413 // case, we actually insert a reload for V1 in R1, ensuring that 414 // we can get at R0 or its alias. 415 ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg, 416 VRM.getPhys(VirtReg), VirtReg)); 417 ++NumReused; 418 continue; 419 } 420 421 // Otherwise, reload it and remember that we have it. 422 PhysReg = VRM.getPhys(VirtReg); 423 assert(PhysReg && "Must map virtreg to physreg!"); 424 const TargetRegisterClass* RC = 425 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); 426 427 RecheckRegister: 428 // Note that, if we reused a register for a previous operand, the 429 // register we want to reload into might not actually be 430 // available. If this occurs, use the register indicated by the 431 // reuser. 432 if (!ReusedOperands.empty()) // This is most often empty. 433 for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro) 434 if (ReusedOperands[ro].PhysRegReused == PhysReg) { 435 // Yup, use the reload register that we didn't use before. 436 PhysReg = ReusedOperands[ro].AssignedPhysReg; 437 goto RecheckRegister; 438 } else { 439 ReusedOp &Op = ReusedOperands[ro]; 440 unsigned PRRU = Op.PhysRegReused; 441 if (MRI->areAliases(PRRU, PhysReg)) { 442 // Okay, we found out that an alias of a reused register 443 // was used. This isn't good because it means we have 444 // to undo a previous reuse. 445 const TargetRegisterClass *AliasRC = 446 MBB.getParent()->getSSARegMap()->getRegClass(Op.VirtReg); 447 MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg, 448 Op.StackSlot, AliasRC); 449 ClobberPhysReg(Op.AssignedPhysReg, SpillSlotsAvailable, 450 PhysRegsAvailable); 451 452 // Any stores to this stack slot are not dead anymore. 453 MaybeDeadStores.erase(Op.StackSlot); 454 455 MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg); 456 PhysRegsAvailable.insert(std::make_pair(Op.AssignedPhysReg, 457 Op.StackSlot)); 458 SpillSlotsAvailable[Op.StackSlot] = Op.AssignedPhysReg; 459 PhysRegsAvailable.erase(Op.PhysRegReused); 460 DEBUG(std::cerr << "Remembering SS#" << Op.StackSlot 461 << " in physreg " 462 << MRI->getName(Op.AssignedPhysReg) << "\n"); 463 ++NumLoads; 464 DEBUG(std::cerr << '\t' << *prior(MII)); 465 466 DEBUG(std::cerr << "Reuse undone!\n"); 467 ReusedOperands.erase(ReusedOperands.begin()+ro); 468 --NumReused; 469 goto ContinueReload; 470 } 471 } 472 ContinueReload: 473 PhysRegsUsed[PhysReg] = true; 474 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); 475 // This invalidates PhysReg. 476 ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable); 477 478 // Any stores to this stack slot are not dead anymore. 479 MaybeDeadStores.erase(StackSlot); 480 481 MI.SetMachineOperandReg(i, PhysReg); 482 PhysRegsAvailable.insert(std::make_pair(PhysReg, StackSlot)); 483 SpillSlotsAvailable[StackSlot] = PhysReg; 484 DEBUG(std::cerr << "Remembering SS#" << StackSlot <<" in physreg " 485 << MRI->getName(PhysReg) << "\n"); 486 ++NumLoads; 487 DEBUG(std::cerr << '\t' << *prior(MII)); 488 } 489 490 // Loop over all of the implicit defs, clearing them from our available 491 // sets. 492 for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode()); 493 *ImpDef; ++ImpDef) { 494 PhysRegsUsed[*ImpDef] = true; 495 ClobberPhysReg(*ImpDef, SpillSlotsAvailable, PhysRegsAvailable); 496 } 497 498 DEBUG(std::cerr << '\t' << MI); 499 500 // If we have folded references to memory operands, make sure we clear all 501 // physical registers that may contain the value of the spilled virtual 502 // register 503 VirtRegMap::MI2VirtMapTy::const_iterator I, End; 504 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) { 505 DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: " 506 << I->second.second); 507 unsigned VirtReg = I->second.first; 508 VirtRegMap::ModRef MR = I->second.second; 509 if (!VRM.hasStackSlot(VirtReg)) { 510 DEBUG(std::cerr << ": No stack slot!\n"); 511 continue; 512 } 513 int SS = VRM.getStackSlot(VirtReg); 514 DEBUG(std::cerr << " - StackSlot: " << SS << "\n"); 515 516 // If this folded instruction is just a use, check to see if it's a 517 // straight load from the virt reg slot. 518 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) { 519 int FrameIdx; 520 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) { 521 // If this spill slot is available, turn it into a copy (or nothing) 522 // instead of leaving it as a load! 523 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(SS); 524 if (FrameIdx == SS && It != SpillSlotsAvailable.end()) { 525 DEBUG(std::cerr << "Promoted Load To Copy: " << MI); 526 MachineFunction &MF = *MBB.getParent(); 527 if (DestReg != It->second) { 528 MRI->copyRegToReg(MBB, &MI, DestReg, It->second, 529 MF.getSSARegMap()->getRegClass(VirtReg)); 530 // Revisit the copy so we make sure to notice the effects of the 531 // operation on the destreg (either needing to RA it if it's 532 // virtual or needing to clobber any values if it's physical). 533 NextMII = &MI; 534 --NextMII; // backtrack to the copy. 535 } 536 MBB.erase(&MI); 537 goto ProcessNextInst; 538 } 539 } 540 } 541 542 // If this reference is not a use, any previous store is now dead. 543 // Otherwise, the store to this stack slot is not dead anymore. 544 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS); 545 if (MDSI != MaybeDeadStores.end()) { 546 if (MR & VirtRegMap::isRef) // Previous store is not dead. 547 MaybeDeadStores.erase(MDSI); 548 else { 549 // If we get here, the store is dead, nuke it now. 550 assert(MR == VirtRegMap::isMod && "Can't be modref!"); 551 MBB.erase(MDSI->second); 552 MaybeDeadStores.erase(MDSI); 553 ++NumDSE; 554 } 555 } 556 557 // If the spill slot value is available, and this is a new definition of 558 // the value, the value is not available anymore. 559 if (MR & VirtRegMap::isMod) { 560 // Notice that the value in this stack slot has been modified. 561 ModifyStackSlot(SS, SpillSlotsAvailable, PhysRegsAvailable); 562 563 // If this is *just* a mod of the value, check to see if this is just a 564 // store to the spill slot (i.e. the spill got merged into the copy). If 565 // so, realize that the vreg is available now, and add the store to the 566 // MaybeDeadStore info. 567 int StackSlot; 568 if (!(MR & VirtRegMap::isRef)) { 569 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) { 570 assert(MRegisterInfo::isPhysicalRegister(SrcReg) && 571 "Src hasn't been allocated yet?"); 572 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark 573 // this as a potentially dead store in case there is a subsequent 574 // store into the stack slot without a read from it. 575 MaybeDeadStores[StackSlot] = &MI; 576 577 // If the stack slot value was previously available in some other 578 // register, change it now. Otherwise, make the register available, 579 // in PhysReg. 580 SpillSlotsAvailable[StackSlot] = SrcReg; 581 PhysRegsAvailable.insert(std::make_pair(SrcReg, StackSlot)); 582 DEBUG(std::cerr << "Updating SS#" << StackSlot << " in physreg " 583 << MRI->getName(SrcReg) << " for virtreg #" 584 << VirtReg << "\n" << MI); 585 } 586 } 587 } 588 } 589 590 // Process all of the spilled defs. 591 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 592 MachineOperand &MO = MI.getOperand(i); 593 if (MO.isRegister() && MO.getReg() && MO.isDef()) { 594 unsigned VirtReg = MO.getReg(); 595 596 if (!MRegisterInfo::isVirtualRegister(VirtReg)) { 597 // Check to see if this is a def-and-use vreg operand that we do need 598 // to insert a store for. 599 bool OpTakenCareOf = false; 600 if (MO.isUse() && !DefAndUseVReg.empty()) { 601 for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau) 602 if (DefAndUseVReg[dau].first == i) { 603 VirtReg = DefAndUseVReg[dau].second; 604 OpTakenCareOf = true; 605 break; 606 } 607 } 608 609 if (!OpTakenCareOf) { 610 ClobberPhysReg(VirtReg, SpillSlotsAvailable, PhysRegsAvailable); 611 continue; 612 } 613 } 614 615 // The only vregs left are stack slot definitions. 616 int StackSlot = VRM.getStackSlot(VirtReg); 617 const TargetRegisterClass *RC = 618 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); 619 unsigned PhysReg; 620 621 // If this is a def&use operand, and we used a different physreg for 622 // it than the one assigned, make sure to execute the store from the 623 // correct physical register. 624 if (MO.getReg() == VirtReg) 625 PhysReg = VRM.getPhys(VirtReg); 626 else 627 PhysReg = MO.getReg(); 628 629 PhysRegsUsed[PhysReg] = true; 630 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); 631 DEBUG(std::cerr << "Store:\t" << *next(MII)); 632 MI.SetMachineOperandReg(i, PhysReg); 633 634 // If there is a dead store to this stack slot, nuke it now. 635 MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; 636 if (LastStore) { 637 DEBUG(std::cerr << " Killed store:\t" << *LastStore); 638 ++NumDSE; 639 MBB.erase(LastStore); 640 } 641 LastStore = next(MII); 642 643 // If the stack slot value was previously available in some other 644 // register, change it now. Otherwise, make the register available, 645 // in PhysReg. 646 ModifyStackSlot(StackSlot, SpillSlotsAvailable, PhysRegsAvailable); 647 ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable); 648 649 PhysRegsAvailable.insert(std::make_pair(PhysReg, StackSlot)); 650 SpillSlotsAvailable[StackSlot] = PhysReg; 651 DEBUG(std::cerr << "Updating SS#" << StackSlot <<" in physreg " 652 << MRI->getName(PhysReg) << " for virtreg #" 653 << VirtReg << "\n"); 654 ++NumStores; 655 } 656 } 657 658 // Okay, the instruction has been completely processed, input and output 659 // registers have been added. As a final sanity check, make sure this is 660 // not a noop-copy. If it is, nuke it. 661 { 662 unsigned Src, Dst; 663 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { 664 ++NumDCE; 665 DEBUG(std::cerr << "Removing now-noop copy: " << MI); 666 MBB.erase(&MI); 667 } 668 } 669 ProcessNextInst: 670 MII = NextMII; 671 } 672} 673 674 675 676llvm::Spiller* llvm::createSpiller() { 677 switch (SpillerOpt) { 678 default: assert(0 && "Unreachable!"); 679 case local: 680 return new LocalSpiller(); 681 case simple: 682 return new SimpleSpiller(); 683 } 684} 685