VirtRegMap.cpp revision 8df6a594d2781777cd25fe2d00818419a8b10e5c
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the VirtRegMap class. 11// 12// It also contains implementations of the the Spiller interface, which, given a 13// virtual register map and a machine function, eliminates all virtual 14// references by replacing them with physical register references - adding spill 15// code as necessary. 16// 17//===----------------------------------------------------------------------===// 18 19#define DEBUG_TYPE "spiller" 20#include "VirtRegMap.h" 21#include "llvm/Function.h" 22#include "llvm/CodeGen/MachineFrameInfo.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/SSARegMap.h" 25#include "llvm/Target/TargetMachine.h" 26#include "llvm/Target/TargetInstrInfo.h" 27#include "llvm/Support/CommandLine.h" 28#include "llvm/Support/Debug.h" 29#include "llvm/ADT/Statistic.h" 30#include "llvm/ADT/STLExtras.h" 31using namespace llvm; 32 33namespace { 34 Statistic<> NumSpills("spiller", "Number of register spills"); 35 Statistic<> NumStores("spiller", "Number of stores added"); 36 Statistic<> NumLoads ("spiller", "Number of loads added"); 37 Statistic<> NumReused("spiller", "Number of values reused"); 38 Statistic<> NumDSE ("spiller", "Number of dead stores elided"); 39 40 enum SpillerName { simple, local }; 41 42 cl::opt<SpillerName> 43 SpillerOpt("spiller", 44 cl::desc("Spiller to use: (default: local)"), 45 cl::Prefix, 46 cl::values(clEnumVal(simple, " simple spiller"), 47 clEnumVal(local, " local spiller"), 48 clEnumValEnd), 49 cl::init(local)); 50} 51 52//===----------------------------------------------------------------------===// 53// VirtRegMap implementation 54//===----------------------------------------------------------------------===// 55 56void VirtRegMap::grow() { 57 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg()); 58 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg()); 59} 60 61int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { 62 assert(MRegisterInfo::isVirtualRegister(virtReg)); 63 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 64 "attempt to assign stack slot to already spilled register"); 65 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg); 66 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(), 67 RC->getAlignment()); 68 Virt2StackSlotMap[virtReg] = frameIndex; 69 ++NumSpills; 70 return frameIndex; 71} 72 73void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) { 74 assert(MRegisterInfo::isVirtualRegister(virtReg)); 75 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 76 "attempt to assign stack slot to already spilled register"); 77 Virt2StackSlotMap[virtReg] = frameIndex; 78} 79 80void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, 81 unsigned OpNo, MachineInstr *NewMI) { 82 // Move previous memory references folded to new instruction. 83 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI); 84 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI), 85 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) { 86 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second)); 87 MI2VirtMap.erase(I++); 88 } 89 90 ModRef MRInfo; 91 if (!OldMI->getOperand(OpNo).isDef()) { 92 assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?"); 93 MRInfo = isRef; 94 } else { 95 MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod; 96 } 97 98 // add new memory reference 99 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo))); 100} 101 102void VirtRegMap::print(std::ostream &OS) const { 103 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo(); 104 105 OS << "********** REGISTER MAP **********\n"; 106 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 107 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) { 108 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) 109 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n"; 110 111 } 112 113 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 114 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) 115 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT) 116 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n"; 117 OS << '\n'; 118} 119 120void VirtRegMap::dump() const { print(std::cerr); } 121 122 123//===----------------------------------------------------------------------===// 124// Simple Spiller Implementation 125//===----------------------------------------------------------------------===// 126 127Spiller::~Spiller() {} 128 129namespace { 130 struct SimpleSpiller : public Spiller { 131 bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap &VRM); 132 }; 133} 134 135bool SimpleSpiller::runOnMachineFunction(MachineFunction& MF, 136 const VirtRegMap& VRM) { 137 DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); 138 DEBUG(std::cerr << "********** Function: " 139 << MF.getFunction()->getName() << '\n'); 140 const TargetMachine& TM = MF.getTarget(); 141 const MRegisterInfo& MRI = *TM.getRegisterInfo(); 142 143 // LoadedRegs - Keep track of which vregs are loaded, so that we only load 144 // each vreg once (in the case where a spilled vreg is used by multiple 145 // operands). This is always smaller than the number of operands to the 146 // current machine instr, so it should be small. 147 std::vector<unsigned> LoadedRegs; 148 149 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end(); 150 MBBI != E; ++MBBI) { 151 DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n"); 152 MachineBasicBlock &MBB = *MBBI; 153 for (MachineBasicBlock::iterator MII = MBB.begin(), 154 E = MBB.end(); MII != E; ++MII) { 155 MachineInstr &MI = *MII; 156 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 157 MachineOperand &MO = MI.getOperand(i); 158 if (MO.isRegister() && MO.getReg() && 159 MRegisterInfo::isVirtualRegister(MO.getReg())) { 160 unsigned VirtReg = MO.getReg(); 161 unsigned PhysReg = VRM.getPhys(VirtReg); 162 if (VRM.hasStackSlot(VirtReg)) { 163 int StackSlot = VRM.getStackSlot(VirtReg); 164 165 if (MO.isUse() && 166 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) 167 == LoadedRegs.end()) { 168 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot); 169 LoadedRegs.push_back(VirtReg); 170 ++NumLoads; 171 DEBUG(std::cerr << '\t' << *prior(MII)); 172 } 173 174 if (MO.isDef()) { 175 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot); 176 ++NumStores; 177 } 178 } 179 MI.SetMachineOperandReg(i, PhysReg); 180 } 181 } 182 DEBUG(std::cerr << '\t' << MI); 183 LoadedRegs.clear(); 184 } 185 } 186 return true; 187} 188 189//===----------------------------------------------------------------------===// 190// Local Spiller Implementation 191//===----------------------------------------------------------------------===// 192 193namespace { 194 /// LocalSpiller - This spiller does a simple pass over the machine basic 195 /// block to attempt to keep spills in registers as much as possible for 196 /// blocks that have low register pressure (the vreg may be spilled due to 197 /// register pressure in other blocks). 198 class LocalSpiller : public Spiller { 199 const MRegisterInfo *MRI; 200 const TargetInstrInfo *TII; 201 public: 202 bool runOnMachineFunction(MachineFunction &MF, const VirtRegMap &VRM) { 203 MRI = MF.getTarget().getRegisterInfo(); 204 TII = MF.getTarget().getInstrInfo(); 205 DEBUG(std::cerr << "\n**** Local spiller rewriting function '" 206 << MF.getFunction()->getName() << "':\n"); 207 208 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); 209 MBB != E; ++MBB) 210 RewriteMBB(*MBB, VRM); 211 return true; 212 } 213 private: 214 void RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM); 215 void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots, 216 std::map<unsigned, int> &PhysRegs); 217 void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots, 218 std::map<unsigned, int> &PhysRegs); 219 }; 220} 221 222void LocalSpiller::ClobberPhysRegOnly(unsigned PhysReg, 223 std::map<int, unsigned> &SpillSlots, 224 std::map<unsigned, int> &PhysRegs) { 225 std::map<unsigned, int>::iterator I = PhysRegs.find(PhysReg); 226 if (I != PhysRegs.end()) { 227 int Slot = I->second; 228 PhysRegs.erase(I); 229 assert(SpillSlots[Slot] == PhysReg && "Bidirectional map mismatch!"); 230 SpillSlots.erase(Slot); 231 DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg) 232 << " clobbered, invalidating SS#" << Slot << "\n"); 233 234 } 235} 236 237void LocalSpiller::ClobberPhysReg(unsigned PhysReg, 238 std::map<int, unsigned> &SpillSlots, 239 std::map<unsigned, int> &PhysRegs) { 240 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS) 241 ClobberPhysRegOnly(*AS, SpillSlots, PhysRegs); 242 ClobberPhysRegOnly(PhysReg, SpillSlots, PhysRegs); 243} 244 245 246// ReusedOp - For each reused operand, we keep track of a bit of information, in 247// case we need to rollback upon processing a new operand. See comments below. 248namespace { 249 struct ReusedOp { 250 // The MachineInstr operand that reused an available value. 251 unsigned Operand; 252 253 // StackSlot - The spill slot of the value being reused. 254 unsigned StackSlot; 255 256 // PhysRegReused - The physical register the value was available in. 257 unsigned PhysRegReused; 258 259 // AssignedPhysReg - The physreg that was assigned for use by the reload. 260 unsigned AssignedPhysReg; 261 262 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr) 263 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr) {} 264 }; 265} 266 267 268/// rewriteMBB - Keep track of which spills are available even after the 269/// register allocator is done with them. If possible, avoid reloading vregs. 270void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) { 271 272 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual 273 // register values that are still available, due to being loaded to stored to, 274 // but not invalidated yet. 275 std::map<int, unsigned> SpillSlotsAvailable; 276 277 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating 278 // which physregs are in use holding a stack slot value. 279 std::map<unsigned, int> PhysRegsAvailable; 280 281 DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n"); 282 283 std::vector<ReusedOp> ReusedOperands; 284 285 // DefAndUseVReg - When we see a def&use operand that is spilled, keep track 286 // of it. ".first" is the machine operand index (should always be 0 for now), 287 // and ".second" is the virtual register that is spilled. 288 std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg; 289 290 // MaybeDeadStores - When we need to write a value back into a stack slot, 291 // keep track of the inserted store. If the stack slot value is never read 292 // (because the value was used from some available register, for example), and 293 // subsequently stored to, the original store is dead. This map keeps track 294 // of inserted stores that are not used. If we see a subsequent store to the 295 // same stack slot, the original store is deleted. 296 std::map<int, MachineInstr*> MaybeDeadStores; 297 298 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); 299 MII != E; ) { 300 MachineInstr &MI = *MII; 301 MachineBasicBlock::iterator NextMII = MII; ++NextMII; 302 303 ReusedOperands.clear(); 304 DefAndUseVReg.clear(); 305 306 // Process all of the spilled uses and all non spilled reg references. 307 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 308 MachineOperand &MO = MI.getOperand(i); 309 if (MO.isRegister() && MO.getReg() && 310 MRegisterInfo::isVirtualRegister(MO.getReg())) { 311 unsigned VirtReg = MO.getReg(); 312 313 if (!VRM.hasStackSlot(VirtReg)) { 314 // This virtual register was assigned a physreg! 315 MI.SetMachineOperandReg(i, VRM.getPhys(VirtReg)); 316 } else { 317 // Is this virtual register a spilled value? 318 if (MO.isUse()) { 319 int StackSlot = VRM.getStackSlot(VirtReg); 320 unsigned PhysReg; 321 322 // Check to see if this stack slot is available. 323 std::map<int, unsigned>::iterator SSI = 324 SpillSlotsAvailable.find(StackSlot); 325 if (SSI != SpillSlotsAvailable.end()) { 326 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg " 327 << MRI->getName(SSI->second) << " for vreg" 328 << VirtReg <<" instead of reloading into physreg " 329 << MRI->getName(VRM.getPhys(VirtReg)) << "\n"); 330 // If this stack slot value is already available, reuse it! 331 PhysReg = SSI->second; 332 MI.SetMachineOperandReg(i, PhysReg); 333 334 // The only technical detail we have is that we don't know that 335 // PhysReg won't be clobbered by a reloaded stack slot that occurs 336 // later in the instruction. In particular, consider 'op V1, V2'. 337 // If V1 is available in physreg R0, we would choose to reuse it 338 // here, instead of reloading it into the register the allocator 339 // indicated (say R1). However, V2 might have to be reloaded 340 // later, and it might indicate that it needs to live in R0. When 341 // this occurs, we need to have information available that 342 // indicates it is safe to use R1 for the reload instead of R0. 343 // 344 // To further complicate matters, we might conflict with an alias, 345 // or R0 and R1 might not be compatible with each other. In this 346 // case, we actually insert a reload for V1 in R1, ensuring that 347 // we can get at R0 or its alias. 348 ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg, 349 VRM.getPhys(VirtReg))); 350 ++NumReused; 351 } else { 352 // Otherwise, reload it and remember that we have it. 353 PhysReg = VRM.getPhys(VirtReg); 354 355 // Note that, if we reused a register for a previous operand, the 356 // register we want to reload into might not actually be 357 // available. If this occurs, use the register indicated by the 358 // reuser. 359 if (!ReusedOperands.empty()) // This is most often empty. 360 for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro) 361 if (ReusedOperands[ro].PhysRegReused == PhysReg) { 362 // Yup, use the reload register that we didn't use before. 363 PhysReg = ReusedOperands[ro].AssignedPhysReg; 364 break; 365 } else { 366 ReusedOp &Op = ReusedOperands[ro]; 367 unsigned PRRU = Op.PhysRegReused; 368 for (const unsigned *AS = MRI->getAliasSet(PRRU); *AS; ++AS) 369 if (*AS == PhysReg) { 370 // Okay, we found out that an alias of a reused register 371 // was used. This isn't good because it means we have 372 // to undo a previous reuse. 373 MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg, 374 Op.StackSlot); 375 ClobberPhysReg(Op.AssignedPhysReg, SpillSlotsAvailable, 376 PhysRegsAvailable); 377 378 // Any stores to this stack slot are not dead anymore. 379 MaybeDeadStores.erase(Op.StackSlot); 380 381 MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg); 382 PhysRegsAvailable[Op.AssignedPhysReg] = Op.StackSlot; 383 SpillSlotsAvailable[Op.StackSlot] = Op.AssignedPhysReg; 384 PhysRegsAvailable.erase(Op.PhysRegReused); 385 DEBUG(std::cerr << "Remembering SS#" << Op.StackSlot 386 << " in physreg " 387 << MRI->getName(Op.AssignedPhysReg) << "\n"); 388 ++NumLoads; 389 DEBUG(std::cerr << '\t' << *prior(MII)); 390 391 DEBUG(std::cerr << "Reuse undone!\n"); 392 ReusedOperands.erase(ReusedOperands.begin()+ro); 393 --NumReused; 394 goto ContinueReload; 395 } 396 } 397 ContinueReload: 398 399 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot); 400 // This invalidates PhysReg. 401 ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable); 402 403 // Any stores to this stack slot are not dead anymore. 404 MaybeDeadStores.erase(StackSlot); 405 406 MI.SetMachineOperandReg(i, PhysReg); 407 PhysRegsAvailable[PhysReg] = StackSlot; 408 SpillSlotsAvailable[StackSlot] = PhysReg; 409 DEBUG(std::cerr << "Remembering SS#" << StackSlot <<" in physreg " 410 << MRI->getName(PhysReg) << "\n"); 411 ++NumLoads; 412 DEBUG(std::cerr << '\t' << *prior(MII)); 413 } 414 415 // If this is both a def and a use, we need to emit a store to the 416 // stack slot after the instruction. Keep track of D&U operands 417 // because we already changed it to a physreg here. 418 if (MO.isDef()) { 419 // Remember that this was a def-and-use operand, and that the 420 // stack slot is live after this instruction executes. 421 DefAndUseVReg.push_back(std::make_pair(i, VirtReg)); 422 } 423 } 424 } 425 } 426 } 427 428 // Loop over all of the implicit defs, clearing them from our available 429 // sets. 430 const TargetInstrDescriptor &InstrDesc = TII->get(MI.getOpcode()); 431 for (const unsigned* ImpDef = InstrDesc.ImplicitDefs; *ImpDef; ++ImpDef) 432 ClobberPhysReg(*ImpDef, SpillSlotsAvailable, PhysRegsAvailable); 433 434 DEBUG(std::cerr << '\t' << MI); 435 436 // If we have folded references to memory operands, make sure we clear all 437 // physical registers that may contain the value of the spilled virtual 438 // register 439 VirtRegMap::MI2VirtMapTy::const_iterator I, E; 440 for (tie(I, E) = VRM.getFoldedVirts(&MI); I != E; ++I) { 441 DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: " 442 << I->second.second); 443 unsigned VirtReg = I->second.first; 444 VirtRegMap::ModRef MR = I->second.second; 445 if (VRM.hasStackSlot(VirtReg)) { 446 int SS = VRM.getStackSlot(VirtReg); 447 DEBUG(std::cerr << " - StackSlot: " << SS << "\n"); 448 449 // If this reference is not a use, any previous store is now dead. 450 // Otherwise, the store to this stack slot is not dead anymore. 451 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS); 452 if (MDSI != MaybeDeadStores.end()) { 453 if (MR & VirtRegMap::isRef) // Previous store is not dead. 454 MaybeDeadStores.erase(MDSI); 455 else { 456 // If we get here, the store is dead, nuke it now. 457 assert(MR == VirtRegMap::isMod && "Can't be modref!"); 458 MBB.erase(MDSI->second); 459 MaybeDeadStores.erase(MDSI); 460 ++NumDSE; 461 } 462 } 463 464 // If the spill slot value is available, and this is a new definition of 465 // the value, the value is not available anymore. 466 if (MR & VirtRegMap::isMod) { 467 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(SS); 468 if (It != SpillSlotsAvailable.end()) { 469 PhysRegsAvailable.erase(It->second); 470 SpillSlotsAvailable.erase(It); 471 } 472 } 473 } else { 474 DEBUG(std::cerr << ": No stack slot!\n"); 475 } 476 } 477 478 // Process all of the spilled defs. 479 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 480 MachineOperand &MO = MI.getOperand(i); 481 if (MO.isRegister() && MO.getReg() && MO.isDef()) { 482 unsigned VirtReg = MO.getReg(); 483 484 bool TakenCareOf = false; 485 if (!MRegisterInfo::isVirtualRegister(VirtReg)) { 486 // Check to see if this is a def-and-use vreg operand that we do need 487 // to insert a store for. 488 bool OpTakenCareOf = false; 489 if (MO.isUse() && !DefAndUseVReg.empty()) { 490 for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau) 491 if (DefAndUseVReg[dau].first == i) { 492 VirtReg = DefAndUseVReg[dau].second; 493 OpTakenCareOf = true; 494 break; 495 } 496 } 497 498 if (!OpTakenCareOf) { 499 ClobberPhysReg(VirtReg, SpillSlotsAvailable, PhysRegsAvailable); 500 TakenCareOf = true; 501 } 502 } 503 504 if (!TakenCareOf) { 505 // The only vregs left are stack slot definitions. 506 int StackSlot = VRM.getStackSlot(VirtReg); 507 unsigned PhysReg; 508 509 // If this is a def&use operand, and we used a different physreg for 510 // it than the one assigned, make sure to execute the store from the 511 // correct physical register. 512 if (MO.getReg() == VirtReg) 513 PhysReg = VRM.getPhys(VirtReg); 514 else 515 PhysReg = MO.getReg(); 516 517 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot); 518 DEBUG(std::cerr << "Store:\t" << *next(MII)); 519 MI.SetMachineOperandReg(i, PhysReg); 520 521 // If there is a dead store to this stack slot, nuke it now. 522 MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; 523 if (LastStore) { 524 DEBUG(std::cerr << " Killed store:\t" << *LastStore); 525 ++NumDSE; 526 MBB.erase(LastStore); 527 } 528 LastStore = next(MII); 529 530 // If the stack slot value was previously available in some other 531 // register, change it now. Otherwise, make the register available, 532 // in PhysReg. 533 std::map<int, unsigned>::iterator SSA = 534 SpillSlotsAvailable.find(StackSlot); 535 if (SSA != SpillSlotsAvailable.end()) { 536 // Remove the record for physreg. 537 PhysRegsAvailable.erase(SSA->second); 538 SpillSlotsAvailable.erase(SSA); 539 } 540 ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable); 541 542 PhysRegsAvailable[PhysReg] = StackSlot; 543 SpillSlotsAvailable[StackSlot] = PhysReg; 544 DEBUG(std::cerr << "Updating SS#" << StackSlot <<" in physreg " 545 << MRI->getName(PhysReg) << " for virtreg #" 546 << VirtReg << "\n"); 547 548 ++NumStores; 549 VirtReg = PhysReg; 550 } 551 } 552 } 553 MII = NextMII; 554 } 555} 556 557 558 559llvm::Spiller* llvm::createSpiller() { 560 switch (SpillerOpt) { 561 default: assert(0 && "Unreachable!"); 562 case local: 563 return new LocalSpiller(); 564 case simple: 565 return new SimpleSpiller(); 566 } 567} 568