VirtRegMap.cpp revision b0f31bf19b9cd0107900728123d4848eae462e6c
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the VirtRegMap class. 11// 12// It also contains implementations of the the Spiller interface, which, given a 13// virtual register map and a machine function, eliminates all virtual 14// references by replacing them with physical register references - adding spill 15// code as necessary. 16// 17//===----------------------------------------------------------------------===// 18 19#define DEBUG_TYPE "spiller" 20#include "VirtRegMap.h" 21#include "llvm/Function.h" 22#include "llvm/CodeGen/MachineFrameInfo.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/SSARegMap.h" 25#include "llvm/Target/TargetMachine.h" 26#include "llvm/Target/TargetInstrInfo.h" 27#include "llvm/Support/CommandLine.h" 28#include "llvm/Support/Debug.h" 29#include "llvm/ADT/Statistic.h" 30#include "llvm/ADT/STLExtras.h" 31#include <algorithm> 32using namespace llvm; 33 34namespace { 35 Statistic<> NumSpills("spiller", "Number of register spills"); 36 Statistic<> NumStores("spiller", "Number of stores added"); 37 Statistic<> NumLoads ("spiller", "Number of loads added"); 38 Statistic<> NumReused("spiller", "Number of values reused"); 39 Statistic<> NumDSE ("spiller", "Number of dead stores elided"); 40 41 enum SpillerName { simple, local }; 42 43 cl::opt<SpillerName> 44 SpillerOpt("spiller", 45 cl::desc("Spiller to use: (default: local)"), 46 cl::Prefix, 47 cl::values(clEnumVal(simple, " simple spiller"), 48 clEnumVal(local, " local spiller"), 49 clEnumValEnd), 50 cl::init(local)); 51} 52 53//===----------------------------------------------------------------------===// 54// VirtRegMap implementation 55//===----------------------------------------------------------------------===// 56 57void VirtRegMap::grow() { 58 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg()); 59 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg()); 60} 61 62int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { 63 assert(MRegisterInfo::isVirtualRegister(virtReg)); 64 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 65 "attempt to assign stack slot to already spilled register"); 66 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg); 67 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(), 68 RC->getAlignment()); 69 Virt2StackSlotMap[virtReg] = frameIndex; 70 ++NumSpills; 71 return frameIndex; 72} 73 74void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) { 75 assert(MRegisterInfo::isVirtualRegister(virtReg)); 76 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 77 "attempt to assign stack slot to already spilled register"); 78 Virt2StackSlotMap[virtReg] = frameIndex; 79} 80 81void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, 82 unsigned OpNo, MachineInstr *NewMI) { 83 // Move previous memory references folded to new instruction. 84 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI); 85 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI), 86 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) { 87 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second)); 88 MI2VirtMap.erase(I++); 89 } 90 91 ModRef MRInfo; 92 if (!OldMI->getOperand(OpNo).isDef()) { 93 assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?"); 94 MRInfo = isRef; 95 } else { 96 MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod; 97 } 98 99 // add new memory reference 100 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo))); 101} 102 103void VirtRegMap::print(std::ostream &OS) const { 104 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo(); 105 106 OS << "********** REGISTER MAP **********\n"; 107 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 108 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) { 109 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) 110 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n"; 111 112 } 113 114 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 115 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) 116 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT) 117 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n"; 118 OS << '\n'; 119} 120 121void VirtRegMap::dump() const { print(std::cerr); } 122 123 124//===----------------------------------------------------------------------===// 125// Simple Spiller Implementation 126//===----------------------------------------------------------------------===// 127 128Spiller::~Spiller() {} 129 130namespace { 131 struct SimpleSpiller : public Spiller { 132 bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap &VRM); 133 }; 134} 135 136bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, 137 const VirtRegMap &VRM) { 138 DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); 139 DEBUG(std::cerr << "********** Function: " 140 << MF.getFunction()->getName() << '\n'); 141 const TargetMachine &TM = MF.getTarget(); 142 const MRegisterInfo &MRI = *TM.getRegisterInfo(); 143 bool *PhysRegsUsed = MF.getUsedPhysregs(); 144 145 // LoadedRegs - Keep track of which vregs are loaded, so that we only load 146 // each vreg once (in the case where a spilled vreg is used by multiple 147 // operands). This is always smaller than the number of operands to the 148 // current machine instr, so it should be small. 149 std::vector<unsigned> LoadedRegs; 150 151 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end(); 152 MBBI != E; ++MBBI) { 153 DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n"); 154 MachineBasicBlock &MBB = *MBBI; 155 for (MachineBasicBlock::iterator MII = MBB.begin(), 156 E = MBB.end(); MII != E; ++MII) { 157 MachineInstr &MI = *MII; 158 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 159 MachineOperand &MO = MI.getOperand(i); 160 if (MO.isRegister() && MO.getReg() && 161 MRegisterInfo::isVirtualRegister(MO.getReg())) { 162 unsigned VirtReg = MO.getReg(); 163 unsigned PhysReg = VRM.getPhys(VirtReg); 164 if (VRM.hasStackSlot(VirtReg)) { 165 int StackSlot = VRM.getStackSlot(VirtReg); 166 167 if (MO.isUse() && 168 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) 169 == LoadedRegs.end()) { 170 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot); 171 LoadedRegs.push_back(VirtReg); 172 ++NumLoads; 173 DEBUG(std::cerr << '\t' << *prior(MII)); 174 } 175 176 if (MO.isDef()) { 177 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot); 178 ++NumStores; 179 } 180 } 181 PhysRegsUsed[PhysReg] = true; 182 MI.SetMachineOperandReg(i, PhysReg); 183 } 184 } 185 DEBUG(std::cerr << '\t' << MI); 186 LoadedRegs.clear(); 187 } 188 } 189 return true; 190} 191 192//===----------------------------------------------------------------------===// 193// Local Spiller Implementation 194//===----------------------------------------------------------------------===// 195 196namespace { 197 /// LocalSpiller - This spiller does a simple pass over the machine basic 198 /// block to attempt to keep spills in registers as much as possible for 199 /// blocks that have low register pressure (the vreg may be spilled due to 200 /// register pressure in other blocks). 201 class LocalSpiller : public Spiller { 202 const MRegisterInfo *MRI; 203 const TargetInstrInfo *TII; 204 public: 205 bool runOnMachineFunction(MachineFunction &MF, const VirtRegMap &VRM) { 206 MRI = MF.getTarget().getRegisterInfo(); 207 TII = MF.getTarget().getInstrInfo(); 208 DEBUG(std::cerr << "\n**** Local spiller rewriting function '" 209 << MF.getFunction()->getName() << "':\n"); 210 211 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); 212 MBB != E; ++MBB) 213 RewriteMBB(*MBB, VRM); 214 return true; 215 } 216 private: 217 void RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM); 218 void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots, 219 std::map<unsigned, int> &PhysRegs); 220 void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots, 221 std::map<unsigned, int> &PhysRegs); 222 }; 223} 224 225void LocalSpiller::ClobberPhysRegOnly(unsigned PhysReg, 226 std::map<int, unsigned> &SpillSlots, 227 std::map<unsigned, int> &PhysRegs) { 228 std::map<unsigned, int>::iterator I = PhysRegs.find(PhysReg); 229 if (I != PhysRegs.end()) { 230 int Slot = I->second; 231 PhysRegs.erase(I); 232 assert(SpillSlots[Slot] == PhysReg && "Bidirectional map mismatch!"); 233 SpillSlots.erase(Slot); 234 DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg) 235 << " clobbered, invalidating SS#" << Slot << "\n"); 236 237 } 238} 239 240void LocalSpiller::ClobberPhysReg(unsigned PhysReg, 241 std::map<int, unsigned> &SpillSlots, 242 std::map<unsigned, int> &PhysRegs) { 243 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS) 244 ClobberPhysRegOnly(*AS, SpillSlots, PhysRegs); 245 ClobberPhysRegOnly(PhysReg, SpillSlots, PhysRegs); 246} 247 248 249// ReusedOp - For each reused operand, we keep track of a bit of information, in 250// case we need to rollback upon processing a new operand. See comments below. 251namespace { 252 struct ReusedOp { 253 // The MachineInstr operand that reused an available value. 254 unsigned Operand; 255 256 // StackSlot - The spill slot of the value being reused. 257 unsigned StackSlot; 258 259 // PhysRegReused - The physical register the value was available in. 260 unsigned PhysRegReused; 261 262 // AssignedPhysReg - The physreg that was assigned for use by the reload. 263 unsigned AssignedPhysReg; 264 265 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr) 266 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr) {} 267 }; 268} 269 270 271/// rewriteMBB - Keep track of which spills are available even after the 272/// register allocator is done with them. If possible, avoid reloading vregs. 273void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) { 274 275 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual 276 // register values that are still available, due to being loaded to stored to, 277 // but not invalidated yet. 278 std::map<int, unsigned> SpillSlotsAvailable; 279 280 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating 281 // which physregs are in use holding a stack slot value. 282 std::map<unsigned, int> PhysRegsAvailable; 283 284 DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n"); 285 286 std::vector<ReusedOp> ReusedOperands; 287 288 // DefAndUseVReg - When we see a def&use operand that is spilled, keep track 289 // of it. ".first" is the machine operand index (should always be 0 for now), 290 // and ".second" is the virtual register that is spilled. 291 std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg; 292 293 // MaybeDeadStores - When we need to write a value back into a stack slot, 294 // keep track of the inserted store. If the stack slot value is never read 295 // (because the value was used from some available register, for example), and 296 // subsequently stored to, the original store is dead. This map keeps track 297 // of inserted stores that are not used. If we see a subsequent store to the 298 // same stack slot, the original store is deleted. 299 std::map<int, MachineInstr*> MaybeDeadStores; 300 301 bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs(); 302 303 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); 304 MII != E; ) { 305 MachineInstr &MI = *MII; 306 MachineBasicBlock::iterator NextMII = MII; ++NextMII; 307 308 ReusedOperands.clear(); 309 DefAndUseVReg.clear(); 310 311 // Process all of the spilled uses and all non spilled reg references. 312 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 313 MachineOperand &MO = MI.getOperand(i); 314 if (MO.isRegister() && MO.getReg() && 315 MRegisterInfo::isVirtualRegister(MO.getReg())) { 316 unsigned VirtReg = MO.getReg(); 317 318 if (!VRM.hasStackSlot(VirtReg)) { 319 // This virtual register was assigned a physreg! 320 unsigned Phys = VRM.getPhys(VirtReg); 321 PhysRegsUsed[Phys] = true; 322 MI.SetMachineOperandReg(i, Phys); 323 } else { 324 // Is this virtual register a spilled value? 325 if (MO.isUse()) { 326 int StackSlot = VRM.getStackSlot(VirtReg); 327 unsigned PhysReg; 328 329 // Check to see if this stack slot is available. 330 std::map<int, unsigned>::iterator SSI = 331 SpillSlotsAvailable.find(StackSlot); 332 if (SSI != SpillSlotsAvailable.end()) { 333 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg " 334 << MRI->getName(SSI->second) << " for vreg" 335 << VirtReg <<" instead of reloading into physreg " 336 << MRI->getName(VRM.getPhys(VirtReg)) << "\n"); 337 // If this stack slot value is already available, reuse it! 338 PhysReg = SSI->second; 339 MI.SetMachineOperandReg(i, PhysReg); 340 341 // The only technical detail we have is that we don't know that 342 // PhysReg won't be clobbered by a reloaded stack slot that occurs 343 // later in the instruction. In particular, consider 'op V1, V2'. 344 // If V1 is available in physreg R0, we would choose to reuse it 345 // here, instead of reloading it into the register the allocator 346 // indicated (say R1). However, V2 might have to be reloaded 347 // later, and it might indicate that it needs to live in R0. When 348 // this occurs, we need to have information available that 349 // indicates it is safe to use R1 for the reload instead of R0. 350 // 351 // To further complicate matters, we might conflict with an alias, 352 // or R0 and R1 might not be compatible with each other. In this 353 // case, we actually insert a reload for V1 in R1, ensuring that 354 // we can get at R0 or its alias. 355 ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg, 356 VRM.getPhys(VirtReg))); 357 ++NumReused; 358 } else { 359 // Otherwise, reload it and remember that we have it. 360 PhysReg = VRM.getPhys(VirtReg); 361 362 RecheckRegister: 363 // Note that, if we reused a register for a previous operand, the 364 // register we want to reload into might not actually be 365 // available. If this occurs, use the register indicated by the 366 // reuser. 367 if (!ReusedOperands.empty()) // This is most often empty. 368 for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro) 369 if (ReusedOperands[ro].PhysRegReused == PhysReg) { 370 // Yup, use the reload register that we didn't use before. 371 PhysReg = ReusedOperands[ro].AssignedPhysReg; 372 goto RecheckRegister; 373 } else { 374 ReusedOp &Op = ReusedOperands[ro]; 375 unsigned PRRU = Op.PhysRegReused; 376 for (const unsigned *AS = MRI->getAliasSet(PRRU); *AS; ++AS) 377 if (*AS == PhysReg) { 378 // Okay, we found out that an alias of a reused register 379 // was used. This isn't good because it means we have 380 // to undo a previous reuse. 381 MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg, 382 Op.StackSlot); 383 ClobberPhysReg(Op.AssignedPhysReg, SpillSlotsAvailable, 384 PhysRegsAvailable); 385 386 // Any stores to this stack slot are not dead anymore. 387 MaybeDeadStores.erase(Op.StackSlot); 388 389 MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg); 390 PhysRegsAvailable[Op.AssignedPhysReg] = Op.StackSlot; 391 SpillSlotsAvailable[Op.StackSlot] = Op.AssignedPhysReg; 392 PhysRegsAvailable.erase(Op.PhysRegReused); 393 DEBUG(std::cerr << "Remembering SS#" << Op.StackSlot 394 << " in physreg " 395 << MRI->getName(Op.AssignedPhysReg) << "\n"); 396 ++NumLoads; 397 DEBUG(std::cerr << '\t' << *prior(MII)); 398 399 DEBUG(std::cerr << "Reuse undone!\n"); 400 ReusedOperands.erase(ReusedOperands.begin()+ro); 401 --NumReused; 402 goto ContinueReload; 403 } 404 } 405 ContinueReload: 406 PhysRegsUsed[PhysReg] = true; 407 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot); 408 // This invalidates PhysReg. 409 ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable); 410 411 // Any stores to this stack slot are not dead anymore. 412 MaybeDeadStores.erase(StackSlot); 413 414 MI.SetMachineOperandReg(i, PhysReg); 415 PhysRegsAvailable[PhysReg] = StackSlot; 416 SpillSlotsAvailable[StackSlot] = PhysReg; 417 DEBUG(std::cerr << "Remembering SS#" << StackSlot <<" in physreg " 418 << MRI->getName(PhysReg) << "\n"); 419 ++NumLoads; 420 DEBUG(std::cerr << '\t' << *prior(MII)); 421 } 422 423 // If this is both a def and a use, we need to emit a store to the 424 // stack slot after the instruction. Keep track of D&U operands 425 // because we already changed it to a physreg here. 426 if (MO.isDef()) { 427 // Remember that this was a def-and-use operand, and that the 428 // stack slot is live after this instruction executes. 429 DefAndUseVReg.push_back(std::make_pair(i, VirtReg)); 430 } 431 } 432 } 433 } 434 } 435 436 // Loop over all of the implicit defs, clearing them from our available 437 // sets. 438 for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode()); 439 *ImpDef; ++ImpDef) { 440 PhysRegsUsed[*ImpDef] = true; 441 ClobberPhysReg(*ImpDef, SpillSlotsAvailable, PhysRegsAvailable); 442 } 443 444 DEBUG(std::cerr << '\t' << MI); 445 446 // If we have folded references to memory operands, make sure we clear all 447 // physical registers that may contain the value of the spilled virtual 448 // register 449 VirtRegMap::MI2VirtMapTy::const_iterator I, End; 450 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) { 451 DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: " 452 << I->second.second); 453 unsigned VirtReg = I->second.first; 454 VirtRegMap::ModRef MR = I->second.second; 455 if (VRM.hasStackSlot(VirtReg)) { 456 int SS = VRM.getStackSlot(VirtReg); 457 DEBUG(std::cerr << " - StackSlot: " << SS << "\n"); 458 459 // If this reference is not a use, any previous store is now dead. 460 // Otherwise, the store to this stack slot is not dead anymore. 461 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS); 462 if (MDSI != MaybeDeadStores.end()) { 463 if (MR & VirtRegMap::isRef) // Previous store is not dead. 464 MaybeDeadStores.erase(MDSI); 465 else { 466 // If we get here, the store is dead, nuke it now. 467 assert(MR == VirtRegMap::isMod && "Can't be modref!"); 468 MBB.erase(MDSI->second); 469 MaybeDeadStores.erase(MDSI); 470 ++NumDSE; 471 } 472 } 473 474 // If the spill slot value is available, and this is a new definition of 475 // the value, the value is not available anymore. 476 if (MR & VirtRegMap::isMod) { 477 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(SS); 478 if (It != SpillSlotsAvailable.end()) { 479 PhysRegsAvailable.erase(It->second); 480 SpillSlotsAvailable.erase(It); 481 } 482 } 483 } else { 484 DEBUG(std::cerr << ": No stack slot!\n"); 485 } 486 } 487 488 // Process all of the spilled defs. 489 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 490 MachineOperand &MO = MI.getOperand(i); 491 if (MO.isRegister() && MO.getReg() && MO.isDef()) { 492 unsigned VirtReg = MO.getReg(); 493 494 bool TakenCareOf = false; 495 if (!MRegisterInfo::isVirtualRegister(VirtReg)) { 496 // Check to see if this is a def-and-use vreg operand that we do need 497 // to insert a store for. 498 bool OpTakenCareOf = false; 499 if (MO.isUse() && !DefAndUseVReg.empty()) { 500 for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau) 501 if (DefAndUseVReg[dau].first == i) { 502 VirtReg = DefAndUseVReg[dau].second; 503 OpTakenCareOf = true; 504 break; 505 } 506 } 507 508 if (!OpTakenCareOf) { 509 ClobberPhysReg(VirtReg, SpillSlotsAvailable, PhysRegsAvailable); 510 TakenCareOf = true; 511 } 512 } 513 514 if (!TakenCareOf) { 515 // The only vregs left are stack slot definitions. 516 int StackSlot = VRM.getStackSlot(VirtReg); 517 unsigned PhysReg; 518 519 // If this is a def&use operand, and we used a different physreg for 520 // it than the one assigned, make sure to execute the store from the 521 // correct physical register. 522 if (MO.getReg() == VirtReg) 523 PhysReg = VRM.getPhys(VirtReg); 524 else 525 PhysReg = MO.getReg(); 526 527 PhysRegsUsed[PhysReg] = true; 528 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot); 529 DEBUG(std::cerr << "Store:\t" << *next(MII)); 530 MI.SetMachineOperandReg(i, PhysReg); 531 532 // If there is a dead store to this stack slot, nuke it now. 533 MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; 534 if (LastStore) { 535 DEBUG(std::cerr << " Killed store:\t" << *LastStore); 536 ++NumDSE; 537 MBB.erase(LastStore); 538 } 539 LastStore = next(MII); 540 541 // If the stack slot value was previously available in some other 542 // register, change it now. Otherwise, make the register available, 543 // in PhysReg. 544 std::map<int, unsigned>::iterator SSA = 545 SpillSlotsAvailable.find(StackSlot); 546 if (SSA != SpillSlotsAvailable.end()) { 547 // Remove the record for physreg. 548 PhysRegsAvailable.erase(SSA->second); 549 SpillSlotsAvailable.erase(SSA); 550 } 551 ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable); 552 553 PhysRegsAvailable[PhysReg] = StackSlot; 554 SpillSlotsAvailable[StackSlot] = PhysReg; 555 DEBUG(std::cerr << "Updating SS#" << StackSlot <<" in physreg " 556 << MRI->getName(PhysReg) << " for virtreg #" 557 << VirtReg << "\n"); 558 559 ++NumStores; 560 VirtReg = PhysReg; 561 } 562 } 563 } 564 MII = NextMII; 565 } 566} 567 568 569 570llvm::Spiller* llvm::createSpiller() { 571 switch (SpillerOpt) { 572 default: assert(0 && "Unreachable!"); 573 case local: 574 return new LocalSpiller(); 575 case simple: 576 return new SimpleSpiller(); 577 } 578} 579