VirtRegMap.cpp revision b6ca4b370e1313b5d6bda19e86be370a3e00a38f
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the VirtRegMap class.
11//
12// It also contains implementations of the the Spiller interface, which, given a
13// virtual register map and a machine function, eliminates all virtual
14// references by replacing them with physical register references - adding spill
15// code as necessary.
16//
17//===----------------------------------------------------------------------===//
18
19#define DEBUG_TYPE "spiller"
20#include "VirtRegMap.h"
21#include "llvm/Function.h"
22#include "llvm/CodeGen/MachineFrameInfo.h"
23#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/SSARegMap.h"
25#include "llvm/Target/TargetMachine.h"
26#include "llvm/Target/TargetInstrInfo.h"
27#include "llvm/Support/CommandLine.h"
28#include "llvm/Support/Debug.h"
29#include "llvm/Support/Compiler.h"
30#include "llvm/ADT/BitVector.h"
31#include "llvm/ADT/Statistic.h"
32#include "llvm/ADT/STLExtras.h"
33#include "llvm/ADT/SmallSet.h"
34#include <algorithm>
35using namespace llvm;
36
37STATISTIC(NumSpills, "Number of register spills");
38STATISTIC(NumReMats, "Number of re-materialization");
39STATISTIC(NumDRM   , "Number of re-materializable defs elided");
40STATISTIC(NumStores, "Number of stores added");
41STATISTIC(NumLoads , "Number of loads added");
42STATISTIC(NumReused, "Number of values reused");
43STATISTIC(NumDSE   , "Number of dead stores elided");
44STATISTIC(NumDCE   , "Number of copies elided");
45
46namespace {
47  enum SpillerName { simple, local };
48
49  static cl::opt<SpillerName>
50  SpillerOpt("spiller",
51             cl::desc("Spiller to use: (default: local)"),
52             cl::Prefix,
53             cl::values(clEnumVal(simple, "  simple spiller"),
54                        clEnumVal(local,  "  local spiller"),
55                        clEnumValEnd),
56             cl::init(local));
57}
58
59//===----------------------------------------------------------------------===//
60//  VirtRegMap implementation
61//===----------------------------------------------------------------------===//
62
63VirtRegMap::VirtRegMap(MachineFunction &mf)
64  : TII(*mf.getTarget().getInstrInfo()), MF(mf),
65    Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT),
66    Virt2ReMatIdMap(NO_STACK_SLOT), ReMatMap(NULL),
67    ReMatId(MAX_STACK_SLOT+1) {
68  grow();
69}
70
71void VirtRegMap::grow() {
72  unsigned LastVirtReg = MF.getSSARegMap()->getLastVirtReg();
73  Virt2PhysMap.grow(LastVirtReg);
74  Virt2StackSlotMap.grow(LastVirtReg);
75  Virt2ReMatIdMap.grow(LastVirtReg);
76  ReMatMap.grow(LastVirtReg);
77}
78
79int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
80  assert(MRegisterInfo::isVirtualRegister(virtReg));
81  assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
82         "attempt to assign stack slot to already spilled register");
83  const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
84  int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
85                                                        RC->getAlignment());
86  Virt2StackSlotMap[virtReg] = frameIndex;
87  ++NumSpills;
88  return frameIndex;
89}
90
91void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
92  assert(MRegisterInfo::isVirtualRegister(virtReg));
93  assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
94         "attempt to assign stack slot to already spilled register");
95  assert((frameIndex >= 0 ||
96          (frameIndex >= MF.getFrameInfo()->getObjectIndexBegin())) &&
97         "illegal fixed frame index");
98  Virt2StackSlotMap[virtReg] = frameIndex;
99}
100
101int VirtRegMap::assignVirtReMatId(unsigned virtReg) {
102  assert(MRegisterInfo::isVirtualRegister(virtReg));
103  assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
104         "attempt to assign re-mat id to already spilled register");
105  Virt2ReMatIdMap[virtReg] = ReMatId;
106  return ReMatId++;
107}
108
109void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) {
110  assert(MRegisterInfo::isVirtualRegister(virtReg));
111  assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
112         "attempt to assign re-mat id to already spilled register");
113  Virt2ReMatIdMap[virtReg] = id;
114}
115
116void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
117                            unsigned OpNo, MachineInstr *NewMI) {
118  // Move previous memory references folded to new instruction.
119  MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
120  for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
121         E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
122    MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
123    MI2VirtMap.erase(I++);
124  }
125
126  ModRef MRInfo;
127  const TargetInstrDescriptor *TID = OldMI->getInstrDescriptor();
128  if (TID->getOperandConstraint(OpNo, TOI::TIED_TO) != -1 ||
129      TID->findTiedToSrcOperand(OpNo) != -1) {
130    // Folded a two-address operand.
131    MRInfo = isModRef;
132  } else if (OldMI->getOperand(OpNo).isDef()) {
133    MRInfo = isMod;
134  } else {
135    MRInfo = isRef;
136  }
137
138  // add new memory reference
139  MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
140}
141
142void VirtRegMap::print(std::ostream &OS) const {
143  const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
144
145  OS << "********** REGISTER MAP **********\n";
146  for (unsigned i = MRegisterInfo::FirstVirtualRegister,
147         e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
148    if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
149      OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
150
151  }
152
153  for (unsigned i = MRegisterInfo::FirstVirtualRegister,
154         e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
155    if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
156      OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
157  OS << '\n';
158}
159
160void VirtRegMap::dump() const {
161  print(DOUT);
162}
163
164
165//===----------------------------------------------------------------------===//
166// Simple Spiller Implementation
167//===----------------------------------------------------------------------===//
168
169Spiller::~Spiller() {}
170
171namespace {
172  struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
173    bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
174  };
175}
176
177bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
178  DOUT << "********** REWRITE MACHINE CODE **********\n";
179  DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
180  const TargetMachine &TM = MF.getTarget();
181  const MRegisterInfo &MRI = *TM.getRegisterInfo();
182
183  // LoadedRegs - Keep track of which vregs are loaded, so that we only load
184  // each vreg once (in the case where a spilled vreg is used by multiple
185  // operands).  This is always smaller than the number of operands to the
186  // current machine instr, so it should be small.
187  std::vector<unsigned> LoadedRegs;
188
189  for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
190       MBBI != E; ++MBBI) {
191    DOUT << MBBI->getBasicBlock()->getName() << ":\n";
192    MachineBasicBlock &MBB = *MBBI;
193    for (MachineBasicBlock::iterator MII = MBB.begin(),
194           E = MBB.end(); MII != E; ++MII) {
195      MachineInstr &MI = *MII;
196      for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
197        MachineOperand &MO = MI.getOperand(i);
198        if (MO.isRegister() && MO.getReg())
199          if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
200            unsigned VirtReg = MO.getReg();
201            unsigned PhysReg = VRM.getPhys(VirtReg);
202            if (!VRM.isAssignedReg(VirtReg)) {
203              int StackSlot = VRM.getStackSlot(VirtReg);
204              const TargetRegisterClass* RC =
205                MF.getSSARegMap()->getRegClass(VirtReg);
206
207              if (MO.isUse() &&
208                  std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
209                  == LoadedRegs.end()) {
210                MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
211                LoadedRegs.push_back(VirtReg);
212                ++NumLoads;
213                DOUT << '\t' << *prior(MII);
214              }
215
216              if (MO.isDef()) {
217                MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
218                ++NumStores;
219              }
220            }
221            MF.setPhysRegUsed(PhysReg);
222            MI.getOperand(i).setReg(PhysReg);
223          } else {
224            MF.setPhysRegUsed(MO.getReg());
225          }
226      }
227
228      DOUT << '\t' << MI;
229      LoadedRegs.clear();
230    }
231  }
232  return true;
233}
234
235//===----------------------------------------------------------------------===//
236//  Local Spiller Implementation
237//===----------------------------------------------------------------------===//
238
239namespace {
240  /// LocalSpiller - This spiller does a simple pass over the machine basic
241  /// block to attempt to keep spills in registers as much as possible for
242  /// blocks that have low register pressure (the vreg may be spilled due to
243  /// register pressure in other blocks).
244  class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
245    const MRegisterInfo *MRI;
246    const TargetInstrInfo *TII;
247  public:
248    bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
249      MRI = MF.getTarget().getRegisterInfo();
250      TII = MF.getTarget().getInstrInfo();
251      DOUT << "\n**** Local spiller rewriting function '"
252           << MF.getFunction()->getName() << "':\n";
253
254      for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
255           MBB != E; ++MBB)
256        RewriteMBB(*MBB, VRM);
257      return true;
258    }
259  private:
260    void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
261  };
262}
263
264/// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
265/// top down, keep track of which spills slots or remat are available in each
266/// register.
267///
268/// Note that not all physregs are created equal here.  In particular, some
269/// physregs are reloads that we are allowed to clobber or ignore at any time.
270/// Other physregs are values that the register allocated program is using that
271/// we cannot CHANGE, but we can read if we like.  We keep track of this on a
272/// per-stack-slot / remat id basis as the low bit in the value of the
273/// SpillSlotsAvailable entries.  The predicate 'canClobberPhysReg()' checks
274/// this bit and addAvailable sets it if.
275namespace {
276class VISIBILITY_HIDDEN AvailableSpills {
277  const MRegisterInfo *MRI;
278  const TargetInstrInfo *TII;
279
280  // SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled
281  // or remat'ed virtual register values that are still available, due to being
282  // loaded or stored to, but not invalidated yet.
283  std::map<int, unsigned> SpillSlotsOrReMatsAvailable;
284
285  // PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable,
286  // indicating which stack slot values are currently held by a physreg.  This
287  // is used to invalidate entries in SpillSlotsOrReMatsAvailable when a
288  // physreg is modified.
289  std::multimap<unsigned, int> PhysRegsAvailable;
290
291  void disallowClobberPhysRegOnly(unsigned PhysReg);
292
293  void ClobberPhysRegOnly(unsigned PhysReg);
294public:
295  AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
296    : MRI(mri), TII(tii) {
297  }
298
299  const MRegisterInfo *getRegInfo() const { return MRI; }
300
301  /// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is
302  /// available in a  physical register, return that PhysReg, otherwise
303  /// return 0.
304  unsigned getSpillSlotOrReMatPhysReg(int Slot) const {
305    std::map<int, unsigned>::const_iterator I =
306      SpillSlotsOrReMatsAvailable.find(Slot);
307    if (I != SpillSlotsOrReMatsAvailable.end()) {
308      return I->second >> 1;  // Remove the CanClobber bit.
309    }
310    return 0;
311  }
312
313  /// addAvailable - Mark that the specified stack slot / remat is available in
314  /// the specified physreg.  If CanClobber is true, the physreg can be modified
315  /// at any time without changing the semantics of the program.
316  void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg,
317                    bool CanClobber = true) {
318    // If this stack slot is thought to be available in some other physreg,
319    // remove its record.
320    ModifyStackSlotOrReMat(SlotOrReMat);
321
322    PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat));
323    SpillSlotsOrReMatsAvailable[SlotOrReMat] = (Reg << 1) | (unsigned)CanClobber;
324
325    if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
326      DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1;
327    else
328      DOUT << "Remembering SS#" << SlotOrReMat;
329    DOUT << " in physreg " << MRI->getName(Reg) << "\n";
330  }
331
332  /// canClobberPhysReg - Return true if the spiller is allowed to change the
333  /// value of the specified stackslot register if it desires.  The specified
334  /// stack slot must be available in a physreg for this query to make sense.
335  bool canClobberPhysReg(int SlotOrReMat) const {
336    assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) && "Value not available!");
337    return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1;
338  }
339
340  /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
341  /// stackslot register. The register is still available but is no longer
342  /// allowed to be modifed.
343  void disallowClobberPhysReg(unsigned PhysReg);
344
345  /// ClobberPhysReg - This is called when the specified physreg changes
346  /// value.  We use this to invalidate any info about stuff we thing lives in
347  /// it and any of its aliases.
348  void ClobberPhysReg(unsigned PhysReg);
349
350  /// ModifyStackSlotOrReMat - This method is called when the value in a stack slot
351  /// changes.  This removes information about which register the previous value
352  /// for this slot lives in (as the previous value is dead now).
353  void ModifyStackSlotOrReMat(int SlotOrReMat);
354};
355}
356
357/// disallowClobberPhysRegOnly - Unset the CanClobber bit of the specified
358/// stackslot register. The register is still available but is no longer
359/// allowed to be modifed.
360void AvailableSpills::disallowClobberPhysRegOnly(unsigned PhysReg) {
361  std::multimap<unsigned, int>::iterator I =
362    PhysRegsAvailable.lower_bound(PhysReg);
363  while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
364    int SlotOrReMat = I->second;
365    I++;
366    assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
367           "Bidirectional map mismatch!");
368    SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1;
369    DOUT << "PhysReg " << MRI->getName(PhysReg)
370         << " copied, it is available for use but can no longer be modified\n";
371  }
372}
373
374/// disallowClobberPhysReg - Unset the CanClobber bit of the specified
375/// stackslot register and its aliases. The register and its aliases may
376/// still available but is no longer allowed to be modifed.
377void AvailableSpills::disallowClobberPhysReg(unsigned PhysReg) {
378  for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
379    disallowClobberPhysRegOnly(*AS);
380  disallowClobberPhysRegOnly(PhysReg);
381}
382
383/// ClobberPhysRegOnly - This is called when the specified physreg changes
384/// value.  We use this to invalidate any info about stuff we thing lives in it.
385void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
386  std::multimap<unsigned, int>::iterator I =
387    PhysRegsAvailable.lower_bound(PhysReg);
388  while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
389    int SlotOrReMat = I->second;
390    PhysRegsAvailable.erase(I++);
391    assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
392           "Bidirectional map mismatch!");
393    SpillSlotsOrReMatsAvailable.erase(SlotOrReMat);
394    DOUT << "PhysReg " << MRI->getName(PhysReg)
395         << " clobbered, invalidating ";
396    if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
397      DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n";
398    else
399      DOUT << "SS#" << SlotOrReMat << "\n";
400  }
401}
402
403/// ClobberPhysReg - This is called when the specified physreg changes
404/// value.  We use this to invalidate any info about stuff we thing lives in
405/// it and any of its aliases.
406void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
407  for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
408    ClobberPhysRegOnly(*AS);
409  ClobberPhysRegOnly(PhysReg);
410}
411
412/// ModifyStackSlotOrReMat - This method is called when the value in a stack slot
413/// changes.  This removes information about which register the previous value
414/// for this slot lives in (as the previous value is dead now).
415void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) {
416  std::map<int, unsigned>::iterator It = SpillSlotsOrReMatsAvailable.find(SlotOrReMat);
417  if (It == SpillSlotsOrReMatsAvailable.end()) return;
418  unsigned Reg = It->second >> 1;
419  SpillSlotsOrReMatsAvailable.erase(It);
420
421  // This register may hold the value of multiple stack slots, only remove this
422  // stack slot from the set of values the register contains.
423  std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
424  for (; ; ++I) {
425    assert(I != PhysRegsAvailable.end() && I->first == Reg &&
426           "Map inverse broken!");
427    if (I->second == SlotOrReMat) break;
428  }
429  PhysRegsAvailable.erase(I);
430}
431
432
433
434/// InvalidateKills - MI is going to be deleted. If any of its operands are
435/// marked kill, then invalidate the information.
436static void InvalidateKills(MachineInstr &MI, BitVector &RegKills,
437                            std::vector<MachineOperand*> &KillOps,
438                            SmallVector<unsigned, 1> *KillRegs = NULL) {
439  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
440    MachineOperand &MO = MI.getOperand(i);
441    if (!MO.isReg() || !MO.isUse() || !MO.isKill())
442      continue;
443    unsigned Reg = MO.getReg();
444    if (KillRegs)
445      KillRegs->push_back(Reg);
446    if (KillOps[Reg] == &MO) {
447      RegKills.reset(Reg);
448      KillOps[Reg] = NULL;
449    }
450  }
451}
452
453/// InvalidateRegDef - If the def operand of the specified def MI is now dead
454/// (since it's spill instruction is removed), mark it isDead. Also checks if
455/// the def MI has other definition operands that are not dead. Returns it by
456/// reference.
457static bool InvalidateRegDef(MachineBasicBlock::iterator I,
458                             MachineInstr &NewDef, unsigned Reg,
459                             bool &HasLiveDef) {
460  // Due to remat, it's possible this reg isn't being reused. That is,
461  // the def of this reg (by prev MI) is now dead.
462  MachineInstr *DefMI = I;
463  MachineOperand *DefOp = NULL;
464  for (unsigned i = 0, e = DefMI->getNumOperands(); i != e; ++i) {
465    MachineOperand &MO = DefMI->getOperand(i);
466    if (MO.isReg() && MO.isDef()) {
467      if (MO.getReg() == Reg)
468        DefOp = &MO;
469      else if (!MO.isDead())
470        HasLiveDef = true;
471    }
472  }
473  if (!DefOp)
474    return false;
475
476  bool FoundUse = false, Done = false;
477  MachineBasicBlock::iterator E = NewDef;
478  ++I; ++E;
479  for (; !Done && I != E; ++I) {
480    MachineInstr *NMI = I;
481    for (unsigned j = 0, ee = NMI->getNumOperands(); j != ee; ++j) {
482      MachineOperand &MO = NMI->getOperand(j);
483      if (!MO.isReg() || MO.getReg() != Reg)
484        continue;
485      if (MO.isUse())
486        FoundUse = true;
487      Done = true; // Stop after scanning all the operands of this MI.
488    }
489  }
490  if (!FoundUse) {
491    // Def is dead!
492    DefOp->setIsDead();
493    return true;
494  }
495  return false;
496}
497
498/// UpdateKills - Track and update kill info. If a MI reads a register that is
499/// marked kill, then it must be due to register reuse. Transfer the kill info
500/// over.
501static void UpdateKills(MachineInstr &MI, BitVector &RegKills,
502                        std::vector<MachineOperand*> &KillOps) {
503  const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
504  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
505    MachineOperand &MO = MI.getOperand(i);
506    if (!MO.isReg() || !MO.isUse())
507      continue;
508    unsigned Reg = MO.getReg();
509    if (Reg == 0)
510      continue;
511
512    if (RegKills[Reg]) {
513      // That can't be right. Register is killed but not re-defined and it's
514      // being reused. Let's fix that.
515      KillOps[Reg]->unsetIsKill();
516      if (i < TID->numOperands &&
517          TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
518        // Unless it's a two-address operand, this is the new kill.
519        MO.setIsKill();
520    }
521
522    if (MO.isKill()) {
523      RegKills.set(Reg);
524      KillOps[Reg] = &MO;
525    }
526  }
527
528  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
529    const MachineOperand &MO = MI.getOperand(i);
530    if (!MO.isReg() || !MO.isDef())
531      continue;
532    unsigned Reg = MO.getReg();
533    RegKills.reset(Reg);
534    KillOps[Reg] = NULL;
535  }
536}
537
538
539// ReusedOp - For each reused operand, we keep track of a bit of information, in
540// case we need to rollback upon processing a new operand.  See comments below.
541namespace {
542  struct ReusedOp {
543    // The MachineInstr operand that reused an available value.
544    unsigned Operand;
545
546    // StackSlotOrReMat - The spill slot or remat id of the value being reused.
547    unsigned StackSlotOrReMat;
548
549    // PhysRegReused - The physical register the value was available in.
550    unsigned PhysRegReused;
551
552    // AssignedPhysReg - The physreg that was assigned for use by the reload.
553    unsigned AssignedPhysReg;
554
555    // VirtReg - The virtual register itself.
556    unsigned VirtReg;
557
558    ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
559             unsigned vreg)
560      : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr), AssignedPhysReg(apr),
561      VirtReg(vreg) {}
562  };
563
564  /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
565  /// is reused instead of reloaded.
566  class VISIBILITY_HIDDEN ReuseInfo {
567    MachineInstr &MI;
568    std::vector<ReusedOp> Reuses;
569    BitVector PhysRegsClobbered;
570  public:
571    ReuseInfo(MachineInstr &mi, const MRegisterInfo *mri) : MI(mi) {
572      PhysRegsClobbered.resize(mri->getNumRegs());
573    }
574
575    bool hasReuses() const {
576      return !Reuses.empty();
577    }
578
579    /// addReuse - If we choose to reuse a virtual register that is already
580    /// available instead of reloading it, remember that we did so.
581    void addReuse(unsigned OpNo, unsigned StackSlotOrReMat,
582                  unsigned PhysRegReused, unsigned AssignedPhysReg,
583                  unsigned VirtReg) {
584      // If the reload is to the assigned register anyway, no undo will be
585      // required.
586      if (PhysRegReused == AssignedPhysReg) return;
587
588      // Otherwise, remember this.
589      Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused,
590                                AssignedPhysReg, VirtReg));
591    }
592
593    void markClobbered(unsigned PhysReg) {
594      PhysRegsClobbered.set(PhysReg);
595    }
596
597    bool isClobbered(unsigned PhysReg) const {
598      return PhysRegsClobbered.test(PhysReg);
599    }
600
601    /// GetRegForReload - We are about to emit a reload into PhysReg.  If there
602    /// is some other operand that is using the specified register, either pick
603    /// a new register to use, or evict the previous reload and use this reg.
604    unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
605                             AvailableSpills &Spills,
606                             std::vector<MachineInstr*> &MaybeDeadStores,
607                             SmallSet<unsigned, 8> &Rejected,
608                             BitVector &RegKills,
609                             std::vector<MachineOperand*> &KillOps,
610                             VirtRegMap &VRM) {
611      if (Reuses.empty()) return PhysReg;  // This is most often empty.
612
613      for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
614        ReusedOp &Op = Reuses[ro];
615        // If we find some other reuse that was supposed to use this register
616        // exactly for its reload, we can change this reload to use ITS reload
617        // register. That is, unless its reload register has already been
618        // considered and subsequently rejected because it has also been reused
619        // by another operand.
620        if (Op.PhysRegReused == PhysReg &&
621            Rejected.count(Op.AssignedPhysReg) == 0) {
622          // Yup, use the reload register that we didn't use before.
623          unsigned NewReg = Op.AssignedPhysReg;
624          Rejected.insert(PhysReg);
625          return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected,
626                                 RegKills, KillOps, VRM);
627        } else {
628          // Otherwise, we might also have a problem if a previously reused
629          // value aliases the new register.  If so, codegen the previous reload
630          // and use this one.
631          unsigned PRRU = Op.PhysRegReused;
632          const MRegisterInfo *MRI = Spills.getRegInfo();
633          if (MRI->areAliases(PRRU, PhysReg)) {
634            // Okay, we found out that an alias of a reused register
635            // was used.  This isn't good because it means we have
636            // to undo a previous reuse.
637            MachineBasicBlock *MBB = MI->getParent();
638            const TargetRegisterClass *AliasRC =
639              MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
640
641            // Copy Op out of the vector and remove it, we're going to insert an
642            // explicit load for it.
643            ReusedOp NewOp = Op;
644            Reuses.erase(Reuses.begin()+ro);
645
646            // Ok, we're going to try to reload the assigned physreg into the
647            // slot that we were supposed to in the first place.  However, that
648            // register could hold a reuse.  Check to see if it conflicts or
649            // would prefer us to use a different register.
650            unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
651                                                  MI, Spills, MaybeDeadStores,
652                                              Rejected, RegKills, KillOps, VRM);
653
654            if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) {
655              MRI->reMaterialize(*MBB, MI, NewPhysReg,
656                                 VRM.getReMaterializedMI(NewOp.VirtReg));
657              ++NumReMats;
658            } else {
659              MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
660                                        NewOp.StackSlotOrReMat, AliasRC);
661              // Any stores to this stack slot are not dead anymore.
662              MaybeDeadStores[NewOp.StackSlotOrReMat] = NULL;
663              ++NumLoads;
664            }
665            Spills.ClobberPhysReg(NewPhysReg);
666            Spills.ClobberPhysReg(NewOp.PhysRegReused);
667
668            MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
669
670            Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg);
671            MachineBasicBlock::iterator MII = MI;
672            --MII;
673            UpdateKills(*MII, RegKills, KillOps);
674            DOUT << '\t' << *MII;
675
676            DOUT << "Reuse undone!\n";
677            --NumReused;
678
679            // Finally, PhysReg is now available, go ahead and use it.
680            return PhysReg;
681          }
682        }
683      }
684      return PhysReg;
685    }
686
687    /// GetRegForReload - Helper for the above GetRegForReload(). Add a
688    /// 'Rejected' set to remember which registers have been considered and
689    /// rejected for the reload. This avoids infinite looping in case like
690    /// this:
691    /// t1 := op t2, t3
692    /// t2 <- assigned r0 for use by the reload but ended up reuse r1
693    /// t3 <- assigned r1 for use by the reload but ended up reuse r0
694    /// t1 <- desires r1
695    ///       sees r1 is taken by t2, tries t2's reload register r0
696    ///       sees r0 is taken by t3, tries t3's reload register r1
697    ///       sees r1 is taken by t2, tries t2's reload register r0 ...
698    unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
699                             AvailableSpills &Spills,
700                             std::vector<MachineInstr*> &MaybeDeadStores,
701                             BitVector &RegKills,
702                             std::vector<MachineOperand*> &KillOps,
703                             VirtRegMap &VRM) {
704      SmallSet<unsigned, 8> Rejected;
705      return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected,
706                             RegKills, KillOps, VRM);
707    }
708  };
709}
710
711
712/// rewriteMBB - Keep track of which spills are available even after the
713/// register allocator is done with them.  If possible, avoid reloading vregs.
714void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
715  DOUT << MBB.getBasicBlock()->getName() << ":\n";
716
717  MachineFunction &MF = *MBB.getParent();
718
719  // Spills - Keep track of which spilled values are available in physregs so
720  // that we can choose to reuse the physregs instead of emitting reloads.
721  AvailableSpills Spills(MRI, TII);
722
723  // MaybeDeadStores - When we need to write a value back into a stack slot,
724  // keep track of the inserted store.  If the stack slot value is never read
725  // (because the value was used from some available register, for example), and
726  // subsequently stored to, the original store is dead.  This map keeps track
727  // of inserted stores that are not used.  If we see a subsequent store to the
728  // same stack slot, the original store is deleted.
729  std::vector<MachineInstr*> MaybeDeadStores;
730  MaybeDeadStores.resize(MF.getFrameInfo()->getObjectIndexEnd(), NULL);
731
732  // ReMatDefs - These are rematerializable def MIs which are not deleted.
733  SmallSet<MachineInstr*, 4> ReMatDefs;
734
735  // Keep track of kill information.
736  BitVector RegKills(MRI->getNumRegs());
737  std::vector<MachineOperand*>  KillOps;
738  KillOps.resize(MRI->getNumRegs(), NULL);
739
740  for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
741       MII != E; ) {
742    MachineInstr &MI = *MII;
743    MachineBasicBlock::iterator NextMII = MII; ++NextMII;
744    VirtRegMap::MI2VirtMapTy::const_iterator I, End;
745
746    bool Erased = false;
747    bool BackTracked = false;
748
749    /// ReusedOperands - Keep track of operand reuse in case we need to undo
750    /// reuse.
751    ReuseInfo ReusedOperands(MI, MRI);
752
753    // Loop over all of the implicit defs, clearing them from our available
754    // sets.
755    const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
756    if (TID->ImplicitDefs) {
757      const unsigned *ImpDef = TID->ImplicitDefs;
758      for ( ; *ImpDef; ++ImpDef) {
759        MF.setPhysRegUsed(*ImpDef);
760        ReusedOperands.markClobbered(*ImpDef);
761        Spills.ClobberPhysReg(*ImpDef);
762      }
763    }
764
765    // Process all of the spilled uses and all non spilled reg references.
766    for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
767      MachineOperand &MO = MI.getOperand(i);
768      if (!MO.isRegister() || MO.getReg() == 0)
769        continue;   // Ignore non-register operands.
770
771      if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
772        // Ignore physregs for spilling, but remember that it is used by this
773        // function.
774        MF.setPhysRegUsed(MO.getReg());
775        ReusedOperands.markClobbered(MO.getReg());
776        continue;
777      }
778
779      assert(MRegisterInfo::isVirtualRegister(MO.getReg()) &&
780             "Not a virtual or a physical register?");
781
782      unsigned VirtReg = MO.getReg();
783      if (VRM.isAssignedReg(VirtReg)) {
784        // This virtual register was assigned a physreg!
785        unsigned Phys = VRM.getPhys(VirtReg);
786        MF.setPhysRegUsed(Phys);
787        if (MO.isDef())
788          ReusedOperands.markClobbered(Phys);
789        MI.getOperand(i).setReg(Phys);
790        continue;
791      }
792
793      // This virtual register is now known to be a spilled value.
794      if (!MO.isUse())
795        continue;  // Handle defs in the loop below (handle use&def here though)
796
797      bool DoReMat = VRM.isReMaterialized(VirtReg);
798      int SSorRMId = DoReMat
799        ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg);
800      int ReuseSlot = SSorRMId;
801
802      // Check to see if this stack slot is available.
803      unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId);
804      if (!PhysReg && DoReMat) {
805        // This use is rematerializable. But perhaps the value is available in
806        // stack if the definition is not deleted. If so, check if we can
807        // reuse the value.
808        ReuseSlot = VRM.getStackSlot(VirtReg);
809        if (ReuseSlot != VirtRegMap::NO_STACK_SLOT)
810          PhysReg = Spills.getSpillSlotOrReMatPhysReg(ReuseSlot);
811      }
812      if (PhysReg) {
813        // This spilled operand might be part of a two-address operand.  If this
814        // is the case, then changing it will necessarily require changing the
815        // def part of the instruction as well.  However, in some cases, we
816        // aren't allowed to modify the reused register.  If none of these cases
817        // apply, reuse it.
818        bool CanReuse = true;
819        int ti = TID->getOperandConstraint(i, TOI::TIED_TO);
820        if (ti != -1 &&
821            MI.getOperand(ti).isReg() &&
822            MI.getOperand(ti).getReg() == VirtReg) {
823          // Okay, we have a two address operand.  We can reuse this physreg as
824          // long as we are allowed to clobber the value and there isn't an
825          // earlier def that has already clobbered the physreg.
826          CanReuse = Spills.canClobberPhysReg(ReuseSlot) &&
827            !ReusedOperands.isClobbered(PhysReg);
828        }
829
830        if (CanReuse) {
831          // If this stack slot value is already available, reuse it!
832          if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
833            DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
834          else
835            DOUT << "Reusing SS#" << ReuseSlot;
836          DOUT << " from physreg "
837               << MRI->getName(PhysReg) << " for vreg"
838               << VirtReg <<" instead of reloading into physreg "
839               << MRI->getName(VRM.getPhys(VirtReg)) << "\n";
840          MI.getOperand(i).setReg(PhysReg);
841
842          // The only technical detail we have is that we don't know that
843          // PhysReg won't be clobbered by a reloaded stack slot that occurs
844          // later in the instruction.  In particular, consider 'op V1, V2'.
845          // If V1 is available in physreg R0, we would choose to reuse it
846          // here, instead of reloading it into the register the allocator
847          // indicated (say R1).  However, V2 might have to be reloaded
848          // later, and it might indicate that it needs to live in R0.  When
849          // this occurs, we need to have information available that
850          // indicates it is safe to use R1 for the reload instead of R0.
851          //
852          // To further complicate matters, we might conflict with an alias,
853          // or R0 and R1 might not be compatible with each other.  In this
854          // case, we actually insert a reload for V1 in R1, ensuring that
855          // we can get at R0 or its alias.
856          ReusedOperands.addReuse(i, ReuseSlot, PhysReg,
857                                  VRM.getPhys(VirtReg), VirtReg);
858          if (ti != -1)
859            // Only mark it clobbered if this is a use&def operand.
860            ReusedOperands.markClobbered(PhysReg);
861          ++NumReused;
862
863          if (MI.getOperand(i).isKill() &&
864              ReuseSlot <= VirtRegMap::MAX_STACK_SLOT) {
865            // This was the last use and the spilled value is still available
866            // for reuse. That means the spill was unnecessary!
867            MachineInstr* DeadStore = MaybeDeadStores[ReuseSlot];
868            if (DeadStore) {
869              DOUT << "Removed dead store:\t" << *DeadStore;
870              InvalidateKills(*DeadStore, RegKills, KillOps);
871              MBB.erase(DeadStore);
872              VRM.RemoveFromFoldedVirtMap(DeadStore);
873              MaybeDeadStores[ReuseSlot] = NULL;
874              ++NumDSE;
875            }
876          }
877          continue;
878        }
879
880        // Otherwise we have a situation where we have a two-address instruction
881        // whose mod/ref operand needs to be reloaded.  This reload is already
882        // available in some register "PhysReg", but if we used PhysReg as the
883        // operand to our 2-addr instruction, the instruction would modify
884        // PhysReg.  This isn't cool if something later uses PhysReg and expects
885        // to get its initial value.
886        //
887        // To avoid this problem, and to avoid doing a load right after a store,
888        // we emit a copy from PhysReg into the designated register for this
889        // operand.
890        unsigned DesignatedReg = VRM.getPhys(VirtReg);
891        assert(DesignatedReg && "Must map virtreg to physreg!");
892
893        // Note that, if we reused a register for a previous operand, the
894        // register we want to reload into might not actually be
895        // available.  If this occurs, use the register indicated by the
896        // reuser.
897        if (ReusedOperands.hasReuses())
898          DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
899                               Spills, MaybeDeadStores, RegKills, KillOps, VRM);
900
901        // If the mapped designated register is actually the physreg we have
902        // incoming, we don't need to inserted a dead copy.
903        if (DesignatedReg == PhysReg) {
904          // If this stack slot value is already available, reuse it!
905          if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
906            DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
907          else
908            DOUT << "Reusing SS#" << ReuseSlot;
909          DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg"
910               << VirtReg
911               << " instead of reloading into same physreg.\n";
912          MI.getOperand(i).setReg(PhysReg);
913          ReusedOperands.markClobbered(PhysReg);
914          ++NumReused;
915          continue;
916        }
917
918        const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
919        MF.setPhysRegUsed(DesignatedReg);
920        ReusedOperands.markClobbered(DesignatedReg);
921        MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
922
923        MachineInstr *CopyMI = prior(MII);
924        UpdateKills(*CopyMI, RegKills, KillOps);
925
926        // This invalidates DesignatedReg.
927        Spills.ClobberPhysReg(DesignatedReg);
928
929        Spills.addAvailable(ReuseSlot, &MI, DesignatedReg);
930        MI.getOperand(i).setReg(DesignatedReg);
931        DOUT << '\t' << *prior(MII);
932        ++NumReused;
933        continue;
934      }
935
936      // Otherwise, reload it and remember that we have it.
937      PhysReg = VRM.getPhys(VirtReg);
938      assert(PhysReg && "Must map virtreg to physreg!");
939      const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
940
941      // Note that, if we reused a register for a previous operand, the
942      // register we want to reload into might not actually be
943      // available.  If this occurs, use the register indicated by the
944      // reuser.
945      if (ReusedOperands.hasReuses())
946        PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
947                               Spills, MaybeDeadStores, RegKills, KillOps, VRM);
948
949      MF.setPhysRegUsed(PhysReg);
950      ReusedOperands.markClobbered(PhysReg);
951      if (DoReMat) {
952        MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg));
953        ++NumReMats;
954      } else {
955        MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC);
956        ++NumLoads;
957      }
958      // This invalidates PhysReg.
959      Spills.ClobberPhysReg(PhysReg);
960
961      // Any stores to this stack slot are not dead anymore.
962      if (!DoReMat)
963        MaybeDeadStores[SSorRMId] = NULL;
964      Spills.addAvailable(SSorRMId, &MI, PhysReg);
965      // Assumes this is the last use. IsKill will be unset if reg is reused
966      // unless it's a two-address operand.
967      if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
968        MI.getOperand(i).setIsKill();
969      MI.getOperand(i).setReg(PhysReg);
970      UpdateKills(*prior(MII), RegKills, KillOps);
971      DOUT << '\t' << *prior(MII);
972    }
973
974    DOUT << '\t' << MI;
975
976    // If we have folded references to memory operands, make sure we clear all
977    // physical registers that may contain the value of the spilled virtual
978    // register
979    for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
980      DOUT << "Folded vreg: " << I->second.first << "  MR: "
981           << I->second.second;
982      unsigned VirtReg = I->second.first;
983      VirtRegMap::ModRef MR = I->second.second;
984      if (VRM.isAssignedReg(VirtReg)) {
985        DOUT << ": No stack slot!\n";
986        continue;
987      }
988      int SS = VRM.getStackSlot(VirtReg);
989      DOUT << " - StackSlot: " << SS << "\n";
990
991      // If this folded instruction is just a use, check to see if it's a
992      // straight load from the virt reg slot.
993      if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
994        int FrameIdx;
995        if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
996          if (FrameIdx == SS) {
997            // If this spill slot is available, turn it into a copy (or nothing)
998            // instead of leaving it as a load!
999            if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) {
1000              DOUT << "Promoted Load To Copy: " << MI;
1001              if (DestReg != InReg) {
1002                MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
1003                                  MF.getSSARegMap()->getRegClass(VirtReg));
1004                // Revisit the copy so we make sure to notice the effects of the
1005                // operation on the destreg (either needing to RA it if it's
1006                // virtual or needing to clobber any values if it's physical).
1007                NextMII = &MI;
1008                --NextMII;  // backtrack to the copy.
1009                BackTracked = true;
1010              } else
1011                DOUT << "Removing now-noop copy: " << MI;
1012
1013              VRM.RemoveFromFoldedVirtMap(&MI);
1014              MBB.erase(&MI);
1015              Erased = true;
1016              goto ProcessNextInst;
1017            }
1018          }
1019        }
1020      }
1021
1022      // If this reference is not a use, any previous store is now dead.
1023      // Otherwise, the store to this stack slot is not dead anymore.
1024      MachineInstr* DeadStore = MaybeDeadStores[SS];
1025      if (DeadStore) {
1026        if (!(MR & VirtRegMap::isRef)) {  // Previous store is dead.
1027          // If we get here, the store is dead, nuke it now.
1028          assert(VirtRegMap::isMod && "Can't be modref!");
1029          DOUT << "Removed dead store:\t" << *DeadStore;
1030          InvalidateKills(*DeadStore, RegKills, KillOps);
1031          MBB.erase(DeadStore);
1032          VRM.RemoveFromFoldedVirtMap(DeadStore);
1033          ++NumDSE;
1034        }
1035        MaybeDeadStores[SS] = NULL;
1036      }
1037
1038      // If the spill slot value is available, and this is a new definition of
1039      // the value, the value is not available anymore.
1040      if (MR & VirtRegMap::isMod) {
1041        // Notice that the value in this stack slot has been modified.
1042        Spills.ModifyStackSlotOrReMat(SS);
1043
1044        // If this is *just* a mod of the value, check to see if this is just a
1045        // store to the spill slot (i.e. the spill got merged into the copy). If
1046        // so, realize that the vreg is available now, and add the store to the
1047        // MaybeDeadStore info.
1048        int StackSlot;
1049        if (!(MR & VirtRegMap::isRef)) {
1050          if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
1051            assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
1052                   "Src hasn't been allocated yet?");
1053            // Okay, this is certainly a store of SrcReg to [StackSlot].  Mark
1054            // this as a potentially dead store in case there is a subsequent
1055            // store into the stack slot without a read from it.
1056            MaybeDeadStores[StackSlot] = &MI;
1057
1058            // If the stack slot value was previously available in some other
1059            // register, change it now.  Otherwise, make the register available,
1060            // in PhysReg.
1061            Spills.addAvailable(StackSlot, &MI, SrcReg, false/*don't clobber*/);
1062          }
1063        }
1064      }
1065    }
1066
1067    // Process all of the spilled defs.
1068    for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1069      MachineOperand &MO = MI.getOperand(i);
1070      if (MO.isRegister() && MO.getReg() && MO.isDef()) {
1071        unsigned VirtReg = MO.getReg();
1072
1073        if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
1074          // Check to see if this is a noop copy.  If so, eliminate the
1075          // instruction before considering the dest reg to be changed.
1076          unsigned Src, Dst;
1077          if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1078            ++NumDCE;
1079            DOUT << "Removing now-noop copy: " << MI;
1080            MBB.erase(&MI);
1081            Erased = true;
1082            VRM.RemoveFromFoldedVirtMap(&MI);
1083            Spills.disallowClobberPhysReg(VirtReg);
1084            goto ProcessNextInst;
1085          }
1086
1087          // If it's not a no-op copy, it clobbers the value in the destreg.
1088          Spills.ClobberPhysReg(VirtReg);
1089          ReusedOperands.markClobbered(VirtReg);
1090
1091          // Check to see if this instruction is a load from a stack slot into
1092          // a register.  If so, this provides the stack slot value in the reg.
1093          int FrameIdx;
1094          if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
1095            assert(DestReg == VirtReg && "Unknown load situation!");
1096
1097            // Otherwise, if it wasn't available, remember that it is now!
1098            Spills.addAvailable(FrameIdx, &MI, DestReg);
1099            goto ProcessNextInst;
1100          }
1101
1102          continue;
1103        }
1104
1105        bool DoReMat = VRM.isReMaterialized(VirtReg);
1106        if (DoReMat)
1107          ReMatDefs.insert(&MI);
1108
1109        // The only vregs left are stack slot definitions.
1110        int StackSlot = VRM.getStackSlot(VirtReg);
1111        const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(VirtReg);
1112
1113        // If this def is part of a two-address operand, make sure to execute
1114        // the store from the correct physical register.
1115        unsigned PhysReg;
1116        int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i);
1117        if (TiedOp != -1)
1118          PhysReg = MI.getOperand(TiedOp).getReg();
1119        else {
1120          PhysReg = VRM.getPhys(VirtReg);
1121          if (ReusedOperands.isClobbered(PhysReg)) {
1122            // Another def has taken the assigned physreg. It must have been a
1123            // use&def which got it due to reuse. Undo the reuse!
1124            PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
1125                               Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1126          }
1127        }
1128
1129        MF.setPhysRegUsed(PhysReg);
1130        ReusedOperands.markClobbered(PhysReg);
1131        MI.getOperand(i).setReg(PhysReg);
1132        if (!MO.isDead()) {
1133          MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
1134          DOUT << "Store:\t" << *next(MII);
1135
1136          // If there is a dead store to this stack slot, nuke it now.
1137          MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
1138          if (LastStore) {
1139            DOUT << "Removed dead store:\t" << *LastStore;
1140            ++NumDSE;
1141            SmallVector<unsigned, 1> KillRegs;
1142            InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs);
1143            MachineBasicBlock::iterator PrevMII = LastStore;
1144            bool CheckDef = PrevMII != MBB.begin();
1145            if (CheckDef)
1146              --PrevMII;
1147            MBB.erase(LastStore);
1148            VRM.RemoveFromFoldedVirtMap(LastStore);
1149            if (CheckDef) {
1150              // Look at defs of killed registers on the store. Mark the defs
1151              // as dead since the store has been deleted and they aren't
1152              // being reused.
1153              for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) {
1154                bool HasOtherDef = false;
1155                if (InvalidateRegDef(PrevMII, MI, KillRegs[j], HasOtherDef)) {
1156                  MachineInstr *DeadDef = PrevMII;
1157                  if (ReMatDefs.count(DeadDef) && !HasOtherDef) {
1158                    // FIXME: This assumes a remat def does not have side
1159                    // effects.
1160                    MBB.erase(DeadDef);
1161                    VRM.RemoveFromFoldedVirtMap(DeadDef);
1162                    ++NumDRM;
1163                  }
1164                }
1165              }
1166            }
1167          }
1168          LastStore = next(MII);
1169
1170          // If the stack slot value was previously available in some other
1171          // register, change it now.  Otherwise, make the register available,
1172          // in PhysReg.
1173          Spills.ModifyStackSlotOrReMat(StackSlot);
1174          Spills.ClobberPhysReg(PhysReg);
1175          Spills.addAvailable(StackSlot, LastStore, PhysReg);
1176          ++NumStores;
1177
1178          // Check to see if this is a noop copy.  If so, eliminate the
1179          // instruction before considering the dest reg to be changed.
1180          {
1181            unsigned Src, Dst;
1182            if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1183              ++NumDCE;
1184              DOUT << "Removing now-noop copy: " << MI;
1185              MBB.erase(&MI);
1186              Erased = true;
1187              VRM.RemoveFromFoldedVirtMap(&MI);
1188              UpdateKills(*LastStore, RegKills, KillOps);
1189              goto ProcessNextInst;
1190            }
1191          }
1192        }
1193      }
1194    }
1195  ProcessNextInst:
1196    if (!Erased && !BackTracked)
1197      for (MachineBasicBlock::iterator II = MI; II != NextMII; ++II)
1198        UpdateKills(*II, RegKills, KillOps);
1199    MII = NextMII;
1200  }
1201}
1202
1203
1204llvm::Spiller* llvm::createSpiller() {
1205  switch (SpillerOpt) {
1206  default: assert(0 && "Unreachable!");
1207  case local:
1208    return new LocalSpiller();
1209  case simple:
1210    return new SimpleSpiller();
1211  }
1212}
1213