VirtRegMap.cpp revision fe095f39e7009c51d1c86769792ccbcad8cdd2ec 
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the VirtRegMap class.
11//
12// It also contains implementations of the the Spiller interface, which, given a
13// virtual register map and a machine function, eliminates all virtual
14// references by replacing them with physical register references - adding spill
15// code as necessary.
16//
17//===----------------------------------------------------------------------===//
18
19#define DEBUG_TYPE "virtregmap"
20#include "VirtRegMap.h"
21#include "llvm/Function.h"
22#include "llvm/CodeGen/LiveIntervalAnalysis.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/CodeGen/MachineFunction.h"
25#include "llvm/CodeGen/MachineInstrBuilder.h"
26#include "llvm/CodeGen/MachineRegisterInfo.h"
27#include "llvm/Target/TargetMachine.h"
28#include "llvm/Target/TargetInstrInfo.h"
29#include "llvm/Target/TargetRegisterInfo.h"
30#include "llvm/Support/CommandLine.h"
31#include "llvm/Support/Compiler.h"
32#include "llvm/Support/Debug.h"
33#include "llvm/ADT/BitVector.h"
34#include "llvm/ADT/DenseMap.h"
35#include "llvm/ADT/DepthFirstIterator.h"
36#include "llvm/ADT/Statistic.h"
37#include "llvm/ADT/STLExtras.h"
38#include "llvm/ADT/SmallSet.h"
39#include <algorithm>
40using namespace llvm;
41
42STATISTIC(NumSpills  , "Number of register spills");
43
44//===----------------------------------------------------------------------===//
45//  VirtRegMap implementation
46//===----------------------------------------------------------------------===//
47
48char VirtRegMap::ID = 0;
49
50static RegisterPass<VirtRegMap>
51X("virtregmap", "Virtual Register Map");
52
53bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) {
54  TII = mf.getTarget().getInstrInfo();
55  TRI = mf.getTarget().getRegisterInfo();
56  MF = &mf;
57
58  ReMatId = MAX_STACK_SLOT+1;
59  LowSpillSlot = HighSpillSlot = NO_STACK_SLOT;
60
61  Virt2PhysMap.clear();
62  Virt2StackSlotMap.clear();
63  Virt2ReMatIdMap.clear();
64  Virt2SplitMap.clear();
65  Virt2SplitKillMap.clear();
66  ReMatMap.clear();
67  ImplicitDefed.clear();
68  SpillSlotToUsesMap.clear();
69  MI2VirtMap.clear();
70  SpillPt2VirtMap.clear();
71  RestorePt2VirtMap.clear();
72  EmergencySpillMap.clear();
73  EmergencySpillSlots.clear();
74
75  SpillSlotToUsesMap.resize(8);
76  ImplicitDefed.resize(MF->getRegInfo().getLastVirtReg()+1-
77                       TargetRegisterInfo::FirstVirtualRegister);
78
79  allocatableRCRegs.clear();
80  for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(),
81         E = TRI->regclass_end(); I != E; ++I)
82    allocatableRCRegs.insert(std::make_pair(*I,
83                                            TRI->getAllocatableSet(mf, *I)));
84
85  grow();
86
87  return false;
88}
89
90void VirtRegMap::grow() {
91  unsigned LastVirtReg = MF->getRegInfo().getLastVirtReg();
92  Virt2PhysMap.grow(LastVirtReg);
93  Virt2StackSlotMap.grow(LastVirtReg);
94  Virt2ReMatIdMap.grow(LastVirtReg);
95  Virt2SplitMap.grow(LastVirtReg);
96  Virt2SplitKillMap.grow(LastVirtReg);
97  ReMatMap.grow(LastVirtReg);
98  ImplicitDefed.resize(LastVirtReg-TargetRegisterInfo::FirstVirtualRegister+1);
99}
100
101int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
102  assert(TargetRegisterInfo::isVirtualRegister(virtReg));
103  assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
104         "attempt to assign stack slot to already spilled register");
105  const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
106  int SS = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
107                                                RC->getAlignment());
108  if (LowSpillSlot == NO_STACK_SLOT)
109    LowSpillSlot = SS;
110  if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot)
111    HighSpillSlot = SS;
112  unsigned Idx = SS-LowSpillSlot;
113  while (Idx >= SpillSlotToUsesMap.size())
114    SpillSlotToUsesMap.resize(SpillSlotToUsesMap.size()*2);
115  Virt2StackSlotMap[virtReg] = SS;
116  ++NumSpills;
117  return SS;
118}
119
120void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) {
121  assert(TargetRegisterInfo::isVirtualRegister(virtReg));
122  assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
123         "attempt to assign stack slot to already spilled register");
124  assert((SS >= 0 ||
125          (SS >= MF->getFrameInfo()->getObjectIndexBegin())) &&
126         "illegal fixed frame index");
127  Virt2StackSlotMap[virtReg] = SS;
128}
129
130int VirtRegMap::assignVirtReMatId(unsigned virtReg) {
131  assert(TargetRegisterInfo::isVirtualRegister(virtReg));
132  assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
133         "attempt to assign re-mat id to already spilled register");
134  Virt2ReMatIdMap[virtReg] = ReMatId;
135  return ReMatId++;
136}
137
138void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) {
139  assert(TargetRegisterInfo::isVirtualRegister(virtReg));
140  assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
141         "attempt to assign re-mat id to already spilled register");
142  Virt2ReMatIdMap[virtReg] = id;
143}
144
145int VirtRegMap::getEmergencySpillSlot(const TargetRegisterClass *RC) {
146  std::map<const TargetRegisterClass*, int>::iterator I =
147    EmergencySpillSlots.find(RC);
148  if (I != EmergencySpillSlots.end())
149    return I->second;
150  int SS = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
151                                                RC->getAlignment());
152  if (LowSpillSlot == NO_STACK_SLOT)
153    LowSpillSlot = SS;
154  if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot)
155    HighSpillSlot = SS;
156  EmergencySpillSlots[RC] = SS;
157  return SS;
158}
159
160void VirtRegMap::addSpillSlotUse(int FI, MachineInstr *MI) {
161  if (!MF->getFrameInfo()->isFixedObjectIndex(FI)) {
162    // If FI < LowSpillSlot, this stack reference was produced by
163    // instruction selection and is not a spill
164    if (FI >= LowSpillSlot) {
165      assert(FI >= 0 && "Spill slot index should not be negative!");
166      assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size()
167             && "Invalid spill slot");
168      SpillSlotToUsesMap[FI-LowSpillSlot].insert(MI);
169    }
170  }
171}
172
173void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
174                            MachineInstr *NewMI, ModRef MRInfo) {
175  // Move previous memory references folded to new instruction.
176  MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
177  for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
178         E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
179    MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
180    MI2VirtMap.erase(I++);
181  }
182
183  // add new memory reference
184  MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
185}
186
187void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo) {
188  MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(MI);
189  MI2VirtMap.insert(IP, std::make_pair(MI, std::make_pair(VirtReg, MRInfo)));
190}
191
192void VirtRegMap::RemoveMachineInstrFromMaps(MachineInstr *MI) {
193  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
194    MachineOperand &MO = MI->getOperand(i);
195    if (!MO.isFI())
196      continue;
197    int FI = MO.getIndex();
198    if (MF->getFrameInfo()->isFixedObjectIndex(FI))
199      continue;
200    // This stack reference was produced by instruction selection and
201    // is not a spill
202    if (FI < LowSpillSlot)
203      continue;
204    assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size()
205           && "Invalid spill slot");
206    SpillSlotToUsesMap[FI-LowSpillSlot].erase(MI);
207  }
208  MI2VirtMap.erase(MI);
209  SpillPt2VirtMap.erase(MI);
210  RestorePt2VirtMap.erase(MI);
211  EmergencySpillMap.erase(MI);
212}
213
214/// FindUnusedRegisters - Gather a list of allocatable registers that
215/// have not been allocated to any virtual register.
216bool VirtRegMap::FindUnusedRegisters(const TargetRegisterInfo *TRI,
217                                     LiveIntervals* LIs) {
218  unsigned NumRegs = TRI->getNumRegs();
219  UnusedRegs.reset();
220  UnusedRegs.resize(NumRegs);
221
222  BitVector Used(NumRegs);
223  for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
224         e = MF->getRegInfo().getLastVirtReg(); i <= e; ++i)
225    if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
226      Used.set(Virt2PhysMap[i]);
227
228  BitVector Allocatable = TRI->getAllocatableSet(*MF);
229  bool AnyUnused = false;
230  for (unsigned Reg = 1; Reg < NumRegs; ++Reg) {
231    if (Allocatable[Reg] && !Used[Reg] && !LIs->hasInterval(Reg)) {
232      bool ReallyUnused = true;
233      for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
234        if (Used[*AS] || LIs->hasInterval(*AS)) {
235          ReallyUnused = false;
236          break;
237        }
238      }
239      if (ReallyUnused) {
240        AnyUnused = true;
241        UnusedRegs.set(Reg);
242      }
243    }
244  }
245
246  return AnyUnused;
247}
248
249void VirtRegMap::print(std::ostream &OS, const Module* M) const {
250  const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo();
251
252  OS << "********** REGISTER MAP **********\n";
253  for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
254         e = MF->getRegInfo().getLastVirtReg(); i <= e; ++i) {
255    if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
256      OS << "[reg" << i << " -> " << TRI->getName(Virt2PhysMap[i])
257         << "]\n";
258  }
259
260  for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
261         e = MF->getRegInfo().getLastVirtReg(); i <= e; ++i)
262    if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
263      OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
264  OS << '\n';
265}
266
267void VirtRegMap::dump() const {
268  print(cerr);
269}
270