VirtRegMap.cpp revision fff3e191b959bfc00e266b47f5c142464bb50ebf
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the VirtRegMap class. 11// 12// It also contains implementations of the the Spiller interface, which, given a 13// virtual register map and a machine function, eliminates all virtual 14// references by replacing them with physical register references - adding spill 15// code as necessary. 16// 17//===----------------------------------------------------------------------===// 18 19#define DEBUG_TYPE "spiller" 20#include "VirtRegMap.h" 21#include "llvm/Function.h" 22#include "llvm/CodeGen/MachineFrameInfo.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/SSARegMap.h" 25#include "llvm/Target/TargetMachine.h" 26#include "llvm/Target/TargetInstrInfo.h" 27#include "llvm/Support/CommandLine.h" 28#include "llvm/Support/Debug.h" 29#include "llvm/Support/Compiler.h" 30#include "llvm/ADT/BitVector.h" 31#include "llvm/ADT/Statistic.h" 32#include "llvm/ADT/STLExtras.h" 33#include "llvm/ADT/SmallSet.h" 34#include <algorithm> 35using namespace llvm; 36 37STATISTIC(NumSpills, "Number of register spills"); 38STATISTIC(NumReMats, "Number of re-materialization"); 39STATISTIC(NumStores, "Number of stores added"); 40STATISTIC(NumLoads , "Number of loads added"); 41STATISTIC(NumReused, "Number of values reused"); 42STATISTIC(NumDSE , "Number of dead stores elided"); 43STATISTIC(NumDCE , "Number of copies elided"); 44 45namespace { 46 enum SpillerName { simple, local }; 47 48 static cl::opt<SpillerName> 49 SpillerOpt("spiller", 50 cl::desc("Spiller to use: (default: local)"), 51 cl::Prefix, 52 cl::values(clEnumVal(simple, " simple spiller"), 53 clEnumVal(local, " local spiller"), 54 clEnumValEnd), 55 cl::init(local)); 56} 57 58//===----------------------------------------------------------------------===// 59// VirtRegMap implementation 60//===----------------------------------------------------------------------===// 61 62VirtRegMap::VirtRegMap(MachineFunction &mf) 63 : TII(*mf.getTarget().getInstrInfo()), MF(mf), 64 Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT), 65 Virt2ReMatIdMap(NO_STACK_SLOT), ReMatMap(NULL), 66 ReMatId(MAX_STACK_SLOT+1) { 67 grow(); 68} 69 70void VirtRegMap::grow() { 71 unsigned LastVirtReg = MF.getSSARegMap()->getLastVirtReg(); 72 Virt2PhysMap.grow(LastVirtReg); 73 Virt2StackSlotMap.grow(LastVirtReg); 74 Virt2ReMatIdMap.grow(LastVirtReg); 75 ReMatMap.grow(LastVirtReg); 76} 77 78int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { 79 assert(MRegisterInfo::isVirtualRegister(virtReg)); 80 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 81 "attempt to assign stack slot to already spilled register"); 82 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg); 83 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(), 84 RC->getAlignment()); 85 Virt2StackSlotMap[virtReg] = frameIndex; 86 ++NumSpills; 87 return frameIndex; 88} 89 90void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) { 91 assert(MRegisterInfo::isVirtualRegister(virtReg)); 92 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 93 "attempt to assign stack slot to already spilled register"); 94 assert((frameIndex >= 0 || 95 (frameIndex >= MF.getFrameInfo()->getObjectIndexBegin())) && 96 "illegal fixed frame index"); 97 Virt2StackSlotMap[virtReg] = frameIndex; 98} 99 100int VirtRegMap::assignVirtReMatId(unsigned virtReg) { 101 assert(MRegisterInfo::isVirtualRegister(virtReg)); 102 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT && 103 "attempt to assign re-mat id to already spilled register"); 104 Virt2ReMatIdMap[virtReg] = ReMatId; 105 return ReMatId++; 106} 107 108void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) { 109 assert(MRegisterInfo::isVirtualRegister(virtReg)); 110 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT && 111 "attempt to assign re-mat id to already spilled register"); 112 Virt2ReMatIdMap[virtReg] = id; 113} 114 115void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, 116 unsigned OpNo, MachineInstr *NewMI) { 117 // Move previous memory references folded to new instruction. 118 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI); 119 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI), 120 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) { 121 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second)); 122 MI2VirtMap.erase(I++); 123 } 124 125 ModRef MRInfo; 126 const TargetInstrDescriptor *TID = OldMI->getInstrDescriptor(); 127 if (TID->getOperandConstraint(OpNo, TOI::TIED_TO) != -1 || 128 TID->findTiedToSrcOperand(OpNo) != -1) { 129 // Folded a two-address operand. 130 MRInfo = isModRef; 131 } else if (OldMI->getOperand(OpNo).isDef()) { 132 MRInfo = isMod; 133 } else { 134 MRInfo = isRef; 135 } 136 137 // add new memory reference 138 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo))); 139} 140 141void VirtRegMap::print(std::ostream &OS) const { 142 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo(); 143 144 OS << "********** REGISTER MAP **********\n"; 145 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 146 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) { 147 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) 148 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n"; 149 150 } 151 152 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 153 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) 154 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT) 155 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n"; 156 OS << '\n'; 157} 158 159void VirtRegMap::dump() const { 160 print(DOUT); 161} 162 163 164//===----------------------------------------------------------------------===// 165// Simple Spiller Implementation 166//===----------------------------------------------------------------------===// 167 168Spiller::~Spiller() {} 169 170namespace { 171 struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller { 172 bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM); 173 }; 174} 175 176bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) { 177 DOUT << "********** REWRITE MACHINE CODE **********\n"; 178 DOUT << "********** Function: " << MF.getFunction()->getName() << '\n'; 179 const TargetMachine &TM = MF.getTarget(); 180 const MRegisterInfo &MRI = *TM.getRegisterInfo(); 181 182 // LoadedRegs - Keep track of which vregs are loaded, so that we only load 183 // each vreg once (in the case where a spilled vreg is used by multiple 184 // operands). This is always smaller than the number of operands to the 185 // current machine instr, so it should be small. 186 std::vector<unsigned> LoadedRegs; 187 188 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end(); 189 MBBI != E; ++MBBI) { 190 DOUT << MBBI->getBasicBlock()->getName() << ":\n"; 191 MachineBasicBlock &MBB = *MBBI; 192 for (MachineBasicBlock::iterator MII = MBB.begin(), 193 E = MBB.end(); MII != E; ++MII) { 194 MachineInstr &MI = *MII; 195 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 196 MachineOperand &MO = MI.getOperand(i); 197 if (MO.isRegister() && MO.getReg()) 198 if (MRegisterInfo::isVirtualRegister(MO.getReg())) { 199 unsigned VirtReg = MO.getReg(); 200 unsigned PhysReg = VRM.getPhys(VirtReg); 201 if (!VRM.isAssignedReg(VirtReg)) { 202 int StackSlot = VRM.getStackSlot(VirtReg); 203 const TargetRegisterClass* RC = 204 MF.getSSARegMap()->getRegClass(VirtReg); 205 206 if (MO.isUse() && 207 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) 208 == LoadedRegs.end()) { 209 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); 210 LoadedRegs.push_back(VirtReg); 211 ++NumLoads; 212 DOUT << '\t' << *prior(MII); 213 } 214 215 if (MO.isDef()) { 216 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); 217 ++NumStores; 218 } 219 } 220 MF.setPhysRegUsed(PhysReg); 221 MI.getOperand(i).setReg(PhysReg); 222 } else { 223 MF.setPhysRegUsed(MO.getReg()); 224 } 225 } 226 227 DOUT << '\t' << MI; 228 LoadedRegs.clear(); 229 } 230 } 231 return true; 232} 233 234//===----------------------------------------------------------------------===// 235// Local Spiller Implementation 236//===----------------------------------------------------------------------===// 237 238namespace { 239 /// LocalSpiller - This spiller does a simple pass over the machine basic 240 /// block to attempt to keep spills in registers as much as possible for 241 /// blocks that have low register pressure (the vreg may be spilled due to 242 /// register pressure in other blocks). 243 class VISIBILITY_HIDDEN LocalSpiller : public Spiller { 244 const MRegisterInfo *MRI; 245 const TargetInstrInfo *TII; 246 public: 247 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) { 248 MRI = MF.getTarget().getRegisterInfo(); 249 TII = MF.getTarget().getInstrInfo(); 250 DOUT << "\n**** Local spiller rewriting function '" 251 << MF.getFunction()->getName() << "':\n"; 252 253 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); 254 MBB != E; ++MBB) 255 RewriteMBB(*MBB, VRM); 256 return true; 257 } 258 private: 259 void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM); 260 }; 261} 262 263/// AvailableSpills - As the local spiller is scanning and rewriting an MBB from 264/// top down, keep track of which spills slots or remat are available in each 265/// register. 266/// 267/// Note that not all physregs are created equal here. In particular, some 268/// physregs are reloads that we are allowed to clobber or ignore at any time. 269/// Other physregs are values that the register allocated program is using that 270/// we cannot CHANGE, but we can read if we like. We keep track of this on a 271/// per-stack-slot / remat id basis as the low bit in the value of the 272/// SpillSlotsAvailable entries. The predicate 'canClobberPhysReg()' checks 273/// this bit and addAvailable sets it if. 274namespace { 275class VISIBILITY_HIDDEN AvailableSpills { 276 const MRegisterInfo *MRI; 277 const TargetInstrInfo *TII; 278 279 // SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled 280 // or remat'ed virtual register values that are still available, due to being 281 // loaded or stored to, but not invalidated yet. 282 std::map<int, unsigned> SpillSlotsOrReMatsAvailable; 283 284 // PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable, 285 // indicating which stack slot values are currently held by a physreg. This 286 // is used to invalidate entries in SpillSlotsOrReMatsAvailable when a 287 // physreg is modified. 288 std::multimap<unsigned, int> PhysRegsAvailable; 289 290 void disallowClobberPhysRegOnly(unsigned PhysReg); 291 292 void ClobberPhysRegOnly(unsigned PhysReg); 293public: 294 AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii) 295 : MRI(mri), TII(tii) { 296 } 297 298 const MRegisterInfo *getRegInfo() const { return MRI; } 299 300 /// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is 301 /// available in a physical register, return that PhysReg, otherwise 302 /// return 0. 303 unsigned getSpillSlotOrReMatPhysReg(int Slot) const { 304 std::map<int, unsigned>::const_iterator I = 305 SpillSlotsOrReMatsAvailable.find(Slot); 306 if (I != SpillSlotsOrReMatsAvailable.end()) { 307 return I->second >> 1; // Remove the CanClobber bit. 308 } 309 return 0; 310 } 311 312 /// addAvailable - Mark that the specified stack slot / remat is available in 313 /// the specified physreg. If CanClobber is true, the physreg can be modified 314 /// at any time without changing the semantics of the program. 315 void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg, 316 bool CanClobber = true) { 317 // If this stack slot is thought to be available in some other physreg, 318 // remove its record. 319 ModifyStackSlotOrReMat(SlotOrReMat); 320 321 PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat)); 322 SpillSlotsOrReMatsAvailable[SlotOrReMat] = (Reg << 1) | (unsigned)CanClobber; 323 324 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) 325 DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1; 326 else 327 DOUT << "Remembering SS#" << SlotOrReMat; 328 DOUT << " in physreg " << MRI->getName(Reg) << "\n"; 329 } 330 331 /// canClobberPhysReg - Return true if the spiller is allowed to change the 332 /// value of the specified stackslot register if it desires. The specified 333 /// stack slot must be available in a physreg for this query to make sense. 334 bool canClobberPhysReg(int SlotOrReMat) const { 335 assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) && "Value not available!"); 336 return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1; 337 } 338 339 /// disallowClobberPhysReg - Unset the CanClobber bit of the specified 340 /// stackslot register. The register is still available but is no longer 341 /// allowed to be modifed. 342 void disallowClobberPhysReg(unsigned PhysReg); 343 344 /// ClobberPhysReg - This is called when the specified physreg changes 345 /// value. We use this to invalidate any info about stuff we thing lives in 346 /// it and any of its aliases. 347 void ClobberPhysReg(unsigned PhysReg); 348 349 /// ModifyStackSlotOrReMat - This method is called when the value in a stack slot 350 /// changes. This removes information about which register the previous value 351 /// for this slot lives in (as the previous value is dead now). 352 void ModifyStackSlotOrReMat(int SlotOrReMat); 353}; 354} 355 356/// disallowClobberPhysRegOnly - Unset the CanClobber bit of the specified 357/// stackslot register. The register is still available but is no longer 358/// allowed to be modifed. 359void AvailableSpills::disallowClobberPhysRegOnly(unsigned PhysReg) { 360 std::multimap<unsigned, int>::iterator I = 361 PhysRegsAvailable.lower_bound(PhysReg); 362 while (I != PhysRegsAvailable.end() && I->first == PhysReg) { 363 int SlotOrReMat = I->second; 364 I++; 365 assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg && 366 "Bidirectional map mismatch!"); 367 SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1; 368 DOUT << "PhysReg " << MRI->getName(PhysReg) 369 << " copied, it is available for use but can no longer be modified\n"; 370 } 371} 372 373/// disallowClobberPhysReg - Unset the CanClobber bit of the specified 374/// stackslot register and its aliases. The register and its aliases may 375/// still available but is no longer allowed to be modifed. 376void AvailableSpills::disallowClobberPhysReg(unsigned PhysReg) { 377 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS) 378 disallowClobberPhysRegOnly(*AS); 379 disallowClobberPhysRegOnly(PhysReg); 380} 381 382/// ClobberPhysRegOnly - This is called when the specified physreg changes 383/// value. We use this to invalidate any info about stuff we thing lives in it. 384void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) { 385 std::multimap<unsigned, int>::iterator I = 386 PhysRegsAvailable.lower_bound(PhysReg); 387 while (I != PhysRegsAvailable.end() && I->first == PhysReg) { 388 int SlotOrReMat = I->second; 389 PhysRegsAvailable.erase(I++); 390 assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg && 391 "Bidirectional map mismatch!"); 392 SpillSlotsOrReMatsAvailable.erase(SlotOrReMat); 393 DOUT << "PhysReg " << MRI->getName(PhysReg) 394 << " clobbered, invalidating "; 395 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) 396 DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n"; 397 else 398 DOUT << "SS#" << SlotOrReMat << "\n"; 399 } 400} 401 402/// ClobberPhysReg - This is called when the specified physreg changes 403/// value. We use this to invalidate any info about stuff we thing lives in 404/// it and any of its aliases. 405void AvailableSpills::ClobberPhysReg(unsigned PhysReg) { 406 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS) 407 ClobberPhysRegOnly(*AS); 408 ClobberPhysRegOnly(PhysReg); 409} 410 411/// ModifyStackSlotOrReMat - This method is called when the value in a stack slot 412/// changes. This removes information about which register the previous value 413/// for this slot lives in (as the previous value is dead now). 414void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) { 415 std::map<int, unsigned>::iterator It = SpillSlotsOrReMatsAvailable.find(SlotOrReMat); 416 if (It == SpillSlotsOrReMatsAvailable.end()) return; 417 unsigned Reg = It->second >> 1; 418 SpillSlotsOrReMatsAvailable.erase(It); 419 420 // This register may hold the value of multiple stack slots, only remove this 421 // stack slot from the set of values the register contains. 422 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg); 423 for (; ; ++I) { 424 assert(I != PhysRegsAvailable.end() && I->first == Reg && 425 "Map inverse broken!"); 426 if (I->second == SlotOrReMat) break; 427 } 428 PhysRegsAvailable.erase(I); 429} 430 431 432 433/// InvalidateKills - MI is going to be deleted. If any of its operands are 434/// marked kill, then invalidate the information. 435static void InvalidateKills(MachineInstr &MI, BitVector &RegKills, 436 std::vector<MachineOperand*> &KillOps) { 437 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 438 MachineOperand &MO = MI.getOperand(i); 439 if (!MO.isReg() || !MO.isUse() || !MO.isKill()) 440 continue; 441 unsigned Reg = MO.getReg(); 442 if (KillOps[Reg] == &MO) { 443 RegKills.reset(Reg); 444 KillOps[Reg] = NULL; 445 } 446 } 447} 448 449/// UpdateKills - Track and update kill info. If a MI reads a register that is 450/// marked kill, then it must be due to register reuse. Transfer the kill info 451/// over. 452static void UpdateKills(MachineInstr &MI, BitVector &RegKills, 453 std::vector<MachineOperand*> &KillOps) { 454 const TargetInstrDescriptor *TID = MI.getInstrDescriptor(); 455 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 456 MachineOperand &MO = MI.getOperand(i); 457 if (!MO.isReg() || !MO.isUse()) 458 continue; 459 unsigned Reg = MO.getReg(); 460 if (Reg == 0) 461 continue; 462 463 if (RegKills[Reg]) { 464 // That can't be right. Register is killed but not re-defined and it's 465 // being reused. Let's fix that. 466 KillOps[Reg]->unsetIsKill(); 467 if (i < TID->numOperands && 468 TID->getOperandConstraint(i, TOI::TIED_TO) == -1) 469 // Unless it's a two-address operand, this is the new kill. 470 MO.setIsKill(); 471 } 472 473 if (MO.isKill()) { 474 RegKills.set(Reg); 475 KillOps[Reg] = &MO; 476 } 477 } 478 479 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 480 const MachineOperand &MO = MI.getOperand(i); 481 if (!MO.isReg() || !MO.isDef()) 482 continue; 483 unsigned Reg = MO.getReg(); 484 RegKills.reset(Reg); 485 KillOps[Reg] = NULL; 486 } 487} 488 489 490// ReusedOp - For each reused operand, we keep track of a bit of information, in 491// case we need to rollback upon processing a new operand. See comments below. 492namespace { 493 struct ReusedOp { 494 // The MachineInstr operand that reused an available value. 495 unsigned Operand; 496 497 // StackSlotOrReMat - The spill slot or remat id of the value being reused. 498 unsigned StackSlotOrReMat; 499 500 // PhysRegReused - The physical register the value was available in. 501 unsigned PhysRegReused; 502 503 // AssignedPhysReg - The physreg that was assigned for use by the reload. 504 unsigned AssignedPhysReg; 505 506 // VirtReg - The virtual register itself. 507 unsigned VirtReg; 508 509 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr, 510 unsigned vreg) 511 : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr), AssignedPhysReg(apr), 512 VirtReg(vreg) {} 513 }; 514 515 /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that 516 /// is reused instead of reloaded. 517 class VISIBILITY_HIDDEN ReuseInfo { 518 MachineInstr &MI; 519 std::vector<ReusedOp> Reuses; 520 BitVector PhysRegsClobbered; 521 public: 522 ReuseInfo(MachineInstr &mi, const MRegisterInfo *mri) : MI(mi) { 523 PhysRegsClobbered.resize(mri->getNumRegs()); 524 } 525 526 bool hasReuses() const { 527 return !Reuses.empty(); 528 } 529 530 /// addReuse - If we choose to reuse a virtual register that is already 531 /// available instead of reloading it, remember that we did so. 532 void addReuse(unsigned OpNo, unsigned StackSlotOrReMat, 533 unsigned PhysRegReused, unsigned AssignedPhysReg, 534 unsigned VirtReg) { 535 // If the reload is to the assigned register anyway, no undo will be 536 // required. 537 if (PhysRegReused == AssignedPhysReg) return; 538 539 // Otherwise, remember this. 540 Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused, 541 AssignedPhysReg, VirtReg)); 542 } 543 544 void markClobbered(unsigned PhysReg) { 545 PhysRegsClobbered.set(PhysReg); 546 } 547 548 bool isClobbered(unsigned PhysReg) const { 549 return PhysRegsClobbered.test(PhysReg); 550 } 551 552 /// GetRegForReload - We are about to emit a reload into PhysReg. If there 553 /// is some other operand that is using the specified register, either pick 554 /// a new register to use, or evict the previous reload and use this reg. 555 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI, 556 AvailableSpills &Spills, 557 std::vector<MachineInstr*> &MaybeDeadStores, 558 SmallSet<unsigned, 8> &Rejected, 559 BitVector &RegKills, 560 std::vector<MachineOperand*> &KillOps, 561 VirtRegMap &VRM) { 562 if (Reuses.empty()) return PhysReg; // This is most often empty. 563 564 for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) { 565 ReusedOp &Op = Reuses[ro]; 566 // If we find some other reuse that was supposed to use this register 567 // exactly for its reload, we can change this reload to use ITS reload 568 // register. That is, unless its reload register has already been 569 // considered and subsequently rejected because it has also been reused 570 // by another operand. 571 if (Op.PhysRegReused == PhysReg && 572 Rejected.count(Op.AssignedPhysReg) == 0) { 573 // Yup, use the reload register that we didn't use before. 574 unsigned NewReg = Op.AssignedPhysReg; 575 Rejected.insert(PhysReg); 576 return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected, 577 RegKills, KillOps, VRM); 578 } else { 579 // Otherwise, we might also have a problem if a previously reused 580 // value aliases the new register. If so, codegen the previous reload 581 // and use this one. 582 unsigned PRRU = Op.PhysRegReused; 583 const MRegisterInfo *MRI = Spills.getRegInfo(); 584 if (MRI->areAliases(PRRU, PhysReg)) { 585 // Okay, we found out that an alias of a reused register 586 // was used. This isn't good because it means we have 587 // to undo a previous reuse. 588 MachineBasicBlock *MBB = MI->getParent(); 589 const TargetRegisterClass *AliasRC = 590 MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg); 591 592 // Copy Op out of the vector and remove it, we're going to insert an 593 // explicit load for it. 594 ReusedOp NewOp = Op; 595 Reuses.erase(Reuses.begin()+ro); 596 597 // Ok, we're going to try to reload the assigned physreg into the 598 // slot that we were supposed to in the first place. However, that 599 // register could hold a reuse. Check to see if it conflicts or 600 // would prefer us to use a different register. 601 unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg, 602 MI, Spills, MaybeDeadStores, 603 Rejected, RegKills, KillOps, VRM); 604 605 if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) { 606 MRI->reMaterialize(*MBB, MI, NewPhysReg, 607 VRM.getReMaterializedMI(NewOp.VirtReg)); 608 ++NumReMats; 609 } else { 610 MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg, 611 NewOp.StackSlotOrReMat, AliasRC); 612 // Any stores to this stack slot are not dead anymore. 613 MaybeDeadStores[NewOp.StackSlotOrReMat] = NULL; 614 ++NumLoads; 615 } 616 Spills.ClobberPhysReg(NewPhysReg); 617 Spills.ClobberPhysReg(NewOp.PhysRegReused); 618 619 MI->getOperand(NewOp.Operand).setReg(NewPhysReg); 620 621 Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg); 622 MachineBasicBlock::iterator MII = MI; 623 --MII; 624 UpdateKills(*MII, RegKills, KillOps); 625 DOUT << '\t' << *MII; 626 627 DOUT << "Reuse undone!\n"; 628 --NumReused; 629 630 // Finally, PhysReg is now available, go ahead and use it. 631 return PhysReg; 632 } 633 } 634 } 635 return PhysReg; 636 } 637 638 /// GetRegForReload - Helper for the above GetRegForReload(). Add a 639 /// 'Rejected' set to remember which registers have been considered and 640 /// rejected for the reload. This avoids infinite looping in case like 641 /// this: 642 /// t1 := op t2, t3 643 /// t2 <- assigned r0 for use by the reload but ended up reuse r1 644 /// t3 <- assigned r1 for use by the reload but ended up reuse r0 645 /// t1 <- desires r1 646 /// sees r1 is taken by t2, tries t2's reload register r0 647 /// sees r0 is taken by t3, tries t3's reload register r1 648 /// sees r1 is taken by t2, tries t2's reload register r0 ... 649 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI, 650 AvailableSpills &Spills, 651 std::vector<MachineInstr*> &MaybeDeadStores, 652 BitVector &RegKills, 653 std::vector<MachineOperand*> &KillOps, 654 VirtRegMap &VRM) { 655 SmallSet<unsigned, 8> Rejected; 656 return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected, 657 RegKills, KillOps, VRM); 658 } 659 }; 660} 661 662 663/// rewriteMBB - Keep track of which spills are available even after the 664/// register allocator is done with them. If possible, avoid reloading vregs. 665void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) { 666 DOUT << MBB.getBasicBlock()->getName() << ":\n"; 667 668 MachineFunction &MF = *MBB.getParent(); 669 670 // Spills - Keep track of which spilled values are available in physregs so 671 // that we can choose to reuse the physregs instead of emitting reloads. 672 AvailableSpills Spills(MRI, TII); 673 674 // MaybeDeadStores - When we need to write a value back into a stack slot, 675 // keep track of the inserted store. If the stack slot value is never read 676 // (because the value was used from some available register, for example), and 677 // subsequently stored to, the original store is dead. This map keeps track 678 // of inserted stores that are not used. If we see a subsequent store to the 679 // same stack slot, the original store is deleted. 680 std::vector<MachineInstr*> MaybeDeadStores; 681 MaybeDeadStores.resize(MF.getFrameInfo()->getObjectIndexEnd(), NULL); 682 683 // Keep track of kill information. 684 BitVector RegKills(MRI->getNumRegs()); 685 std::vector<MachineOperand*> KillOps; 686 KillOps.resize(MRI->getNumRegs(), NULL); 687 688 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); 689 MII != E; ) { 690 MachineInstr &MI = *MII; 691 MachineBasicBlock::iterator NextMII = MII; ++NextMII; 692 VirtRegMap::MI2VirtMapTy::const_iterator I, End; 693 694 bool Erased = false; 695 bool BackTracked = false; 696 697 /// ReusedOperands - Keep track of operand reuse in case we need to undo 698 /// reuse. 699 ReuseInfo ReusedOperands(MI, MRI); 700 701 // Loop over all of the implicit defs, clearing them from our available 702 // sets. 703 const TargetInstrDescriptor *TID = MI.getInstrDescriptor(); 704 if (TID->ImplicitDefs) { 705 const unsigned *ImpDef = TID->ImplicitDefs; 706 for ( ; *ImpDef; ++ImpDef) { 707 MF.setPhysRegUsed(*ImpDef); 708 ReusedOperands.markClobbered(*ImpDef); 709 Spills.ClobberPhysReg(*ImpDef); 710 } 711 } 712 713 // Process all of the spilled uses and all non spilled reg references. 714 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 715 MachineOperand &MO = MI.getOperand(i); 716 if (!MO.isRegister() || MO.getReg() == 0) 717 continue; // Ignore non-register operands. 718 719 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) { 720 // Ignore physregs for spilling, but remember that it is used by this 721 // function. 722 MF.setPhysRegUsed(MO.getReg()); 723 ReusedOperands.markClobbered(MO.getReg()); 724 continue; 725 } 726 727 assert(MRegisterInfo::isVirtualRegister(MO.getReg()) && 728 "Not a virtual or a physical register?"); 729 730 unsigned VirtReg = MO.getReg(); 731 if (VRM.isAssignedReg(VirtReg)) { 732 // This virtual register was assigned a physreg! 733 unsigned Phys = VRM.getPhys(VirtReg); 734 MF.setPhysRegUsed(Phys); 735 if (MO.isDef()) 736 ReusedOperands.markClobbered(Phys); 737 MI.getOperand(i).setReg(Phys); 738 continue; 739 } 740 741 // This virtual register is now known to be a spilled value. 742 if (!MO.isUse()) 743 continue; // Handle defs in the loop below (handle use&def here though) 744 745 bool DoReMat = VRM.isReMaterialized(VirtReg); 746 int SSorRMId = DoReMat 747 ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg); 748 int ReuseSlot = SSorRMId; 749 750 // Check to see if this stack slot is available. 751 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId); 752 if (!PhysReg && DoReMat) { 753 // This use is rematerializable. But perhaps the value is available in 754 // stack if the definition is not deleted. If so, check if we can 755 // reuse the value. 756 ReuseSlot = VRM.getStackSlot(VirtReg); 757 if (ReuseSlot != VirtRegMap::NO_STACK_SLOT) 758 PhysReg = Spills.getSpillSlotOrReMatPhysReg(ReuseSlot); 759 } 760 if (PhysReg) { 761 // This spilled operand might be part of a two-address operand. If this 762 // is the case, then changing it will necessarily require changing the 763 // def part of the instruction as well. However, in some cases, we 764 // aren't allowed to modify the reused register. If none of these cases 765 // apply, reuse it. 766 bool CanReuse = true; 767 int ti = TID->getOperandConstraint(i, TOI::TIED_TO); 768 if (ti != -1 && 769 MI.getOperand(ti).isReg() && 770 MI.getOperand(ti).getReg() == VirtReg) { 771 // Okay, we have a two address operand. We can reuse this physreg as 772 // long as we are allowed to clobber the value and there isn't an 773 // earlier def that has already clobbered the physreg. 774 CanReuse = Spills.canClobberPhysReg(ReuseSlot) && 775 !ReusedOperands.isClobbered(PhysReg); 776 } 777 778 if (CanReuse) { 779 // If this stack slot value is already available, reuse it! 780 if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT) 781 DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1; 782 else 783 DOUT << "Reusing SS#" << ReuseSlot; 784 DOUT << " from physreg " 785 << MRI->getName(PhysReg) << " for vreg" 786 << VirtReg <<" instead of reloading into physreg " 787 << MRI->getName(VRM.getPhys(VirtReg)) << "\n"; 788 MI.getOperand(i).setReg(PhysReg); 789 790 // The only technical detail we have is that we don't know that 791 // PhysReg won't be clobbered by a reloaded stack slot that occurs 792 // later in the instruction. In particular, consider 'op V1, V2'. 793 // If V1 is available in physreg R0, we would choose to reuse it 794 // here, instead of reloading it into the register the allocator 795 // indicated (say R1). However, V2 might have to be reloaded 796 // later, and it might indicate that it needs to live in R0. When 797 // this occurs, we need to have information available that 798 // indicates it is safe to use R1 for the reload instead of R0. 799 // 800 // To further complicate matters, we might conflict with an alias, 801 // or R0 and R1 might not be compatible with each other. In this 802 // case, we actually insert a reload for V1 in R1, ensuring that 803 // we can get at R0 or its alias. 804 ReusedOperands.addReuse(i, ReuseSlot, PhysReg, 805 VRM.getPhys(VirtReg), VirtReg); 806 if (ti != -1) 807 // Only mark it clobbered if this is a use&def operand. 808 ReusedOperands.markClobbered(PhysReg); 809 ++NumReused; 810 811 if (MI.getOperand(i).isKill() && 812 ReuseSlot <= VirtRegMap::MAX_STACK_SLOT) { 813 // This was the last use and the spilled value is still available 814 // for reuse. That means the spill was unnecessary! 815 MachineInstr* DeadStore = MaybeDeadStores[ReuseSlot]; 816 if (DeadStore) { 817 DOUT << "Removed dead store:\t" << *DeadStore; 818 InvalidateKills(*DeadStore, RegKills, KillOps); 819 MBB.erase(DeadStore); 820 VRM.RemoveFromFoldedVirtMap(DeadStore); 821 MaybeDeadStores[ReuseSlot] = NULL; 822 ++NumDSE; 823 } 824 } 825 continue; 826 } 827 828 // Otherwise we have a situation where we have a two-address instruction 829 // whose mod/ref operand needs to be reloaded. This reload is already 830 // available in some register "PhysReg", but if we used PhysReg as the 831 // operand to our 2-addr instruction, the instruction would modify 832 // PhysReg. This isn't cool if something later uses PhysReg and expects 833 // to get its initial value. 834 // 835 // To avoid this problem, and to avoid doing a load right after a store, 836 // we emit a copy from PhysReg into the designated register for this 837 // operand. 838 unsigned DesignatedReg = VRM.getPhys(VirtReg); 839 assert(DesignatedReg && "Must map virtreg to physreg!"); 840 841 // Note that, if we reused a register for a previous operand, the 842 // register we want to reload into might not actually be 843 // available. If this occurs, use the register indicated by the 844 // reuser. 845 if (ReusedOperands.hasReuses()) 846 DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI, 847 Spills, MaybeDeadStores, RegKills, KillOps, VRM); 848 849 // If the mapped designated register is actually the physreg we have 850 // incoming, we don't need to inserted a dead copy. 851 if (DesignatedReg == PhysReg) { 852 // If this stack slot value is already available, reuse it! 853 if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT) 854 DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1; 855 else 856 DOUT << "Reusing SS#" << ReuseSlot; 857 DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg" 858 << VirtReg 859 << " instead of reloading into same physreg.\n"; 860 MI.getOperand(i).setReg(PhysReg); 861 ReusedOperands.markClobbered(PhysReg); 862 ++NumReused; 863 continue; 864 } 865 866 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg); 867 MF.setPhysRegUsed(DesignatedReg); 868 ReusedOperands.markClobbered(DesignatedReg); 869 MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC); 870 871 MachineInstr *CopyMI = prior(MII); 872 UpdateKills(*CopyMI, RegKills, KillOps); 873 874 // This invalidates DesignatedReg. 875 Spills.ClobberPhysReg(DesignatedReg); 876 877 Spills.addAvailable(ReuseSlot, &MI, DesignatedReg); 878 MI.getOperand(i).setReg(DesignatedReg); 879 DOUT << '\t' << *prior(MII); 880 ++NumReused; 881 continue; 882 } 883 884 // Otherwise, reload it and remember that we have it. 885 PhysReg = VRM.getPhys(VirtReg); 886 assert(PhysReg && "Must map virtreg to physreg!"); 887 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg); 888 889 // Note that, if we reused a register for a previous operand, the 890 // register we want to reload into might not actually be 891 // available. If this occurs, use the register indicated by the 892 // reuser. 893 if (ReusedOperands.hasReuses()) 894 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, 895 Spills, MaybeDeadStores, RegKills, KillOps, VRM); 896 897 MF.setPhysRegUsed(PhysReg); 898 ReusedOperands.markClobbered(PhysReg); 899 if (DoReMat) { 900 MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg)); 901 ++NumReMats; 902 } else { 903 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC); 904 ++NumLoads; 905 } 906 // This invalidates PhysReg. 907 Spills.ClobberPhysReg(PhysReg); 908 909 // Any stores to this stack slot are not dead anymore. 910 if (!DoReMat) 911 MaybeDeadStores[SSorRMId] = NULL; 912 Spills.addAvailable(SSorRMId, &MI, PhysReg); 913 // Assumes this is the last use. IsKill will be unset if reg is reused 914 // unless it's a two-address operand. 915 if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1) 916 MI.getOperand(i).setIsKill(); 917 MI.getOperand(i).setReg(PhysReg); 918 UpdateKills(*prior(MII), RegKills, KillOps); 919 DOUT << '\t' << *prior(MII); 920 } 921 922 DOUT << '\t' << MI; 923 924 // If we have folded references to memory operands, make sure we clear all 925 // physical registers that may contain the value of the spilled virtual 926 // register 927 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) { 928 DOUT << "Folded vreg: " << I->second.first << " MR: " 929 << I->second.second; 930 unsigned VirtReg = I->second.first; 931 VirtRegMap::ModRef MR = I->second.second; 932 if (VRM.isAssignedReg(VirtReg)) { 933 DOUT << ": No stack slot!\n"; 934 continue; 935 } 936 int SS = VRM.getStackSlot(VirtReg); 937 DOUT << " - StackSlot: " << SS << "\n"; 938 939 // If this folded instruction is just a use, check to see if it's a 940 // straight load from the virt reg slot. 941 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) { 942 int FrameIdx; 943 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) { 944 if (FrameIdx == SS) { 945 // If this spill slot is available, turn it into a copy (or nothing) 946 // instead of leaving it as a load! 947 if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) { 948 DOUT << "Promoted Load To Copy: " << MI; 949 if (DestReg != InReg) { 950 MRI->copyRegToReg(MBB, &MI, DestReg, InReg, 951 MF.getSSARegMap()->getRegClass(VirtReg)); 952 // Revisit the copy so we make sure to notice the effects of the 953 // operation on the destreg (either needing to RA it if it's 954 // virtual or needing to clobber any values if it's physical). 955 NextMII = &MI; 956 --NextMII; // backtrack to the copy. 957 BackTracked = true; 958 } else 959 DOUT << "Removing now-noop copy: " << MI; 960 961 VRM.RemoveFromFoldedVirtMap(&MI); 962 MBB.erase(&MI); 963 Erased = true; 964 goto ProcessNextInst; 965 } 966 } 967 } 968 } 969 970 // If this reference is not a use, any previous store is now dead. 971 // Otherwise, the store to this stack slot is not dead anymore. 972 MachineInstr* DeadStore = MaybeDeadStores[SS]; 973 if (DeadStore) { 974 if (!(MR & VirtRegMap::isRef)) { // Previous store is dead. 975 // If we get here, the store is dead, nuke it now. 976 assert(VirtRegMap::isMod && "Can't be modref!"); 977 DOUT << "Removed dead store:\t" << *DeadStore; 978 InvalidateKills(*DeadStore, RegKills, KillOps); 979 MBB.erase(DeadStore); 980 VRM.RemoveFromFoldedVirtMap(DeadStore); 981 ++NumDSE; 982 } 983 MaybeDeadStores[SS] = NULL; 984 } 985 986 // If the spill slot value is available, and this is a new definition of 987 // the value, the value is not available anymore. 988 if (MR & VirtRegMap::isMod) { 989 // Notice that the value in this stack slot has been modified. 990 Spills.ModifyStackSlotOrReMat(SS); 991 992 // If this is *just* a mod of the value, check to see if this is just a 993 // store to the spill slot (i.e. the spill got merged into the copy). If 994 // so, realize that the vreg is available now, and add the store to the 995 // MaybeDeadStore info. 996 int StackSlot; 997 if (!(MR & VirtRegMap::isRef)) { 998 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) { 999 assert(MRegisterInfo::isPhysicalRegister(SrcReg) && 1000 "Src hasn't been allocated yet?"); 1001 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark 1002 // this as a potentially dead store in case there is a subsequent 1003 // store into the stack slot without a read from it. 1004 MaybeDeadStores[StackSlot] = &MI; 1005 1006 // If the stack slot value was previously available in some other 1007 // register, change it now. Otherwise, make the register available, 1008 // in PhysReg. 1009 Spills.addAvailable(StackSlot, &MI, SrcReg, false/*don't clobber*/); 1010 } 1011 } 1012 } 1013 } 1014 1015 // Process all of the spilled defs. 1016 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 1017 MachineOperand &MO = MI.getOperand(i); 1018 if (MO.isRegister() && MO.getReg() && MO.isDef()) { 1019 unsigned VirtReg = MO.getReg(); 1020 1021 if (!MRegisterInfo::isVirtualRegister(VirtReg)) { 1022 // Check to see if this is a noop copy. If so, eliminate the 1023 // instruction before considering the dest reg to be changed. 1024 unsigned Src, Dst; 1025 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { 1026 ++NumDCE; 1027 DOUT << "Removing now-noop copy: " << MI; 1028 MBB.erase(&MI); 1029 Erased = true; 1030 VRM.RemoveFromFoldedVirtMap(&MI); 1031 Spills.disallowClobberPhysReg(VirtReg); 1032 goto ProcessNextInst; 1033 } 1034 1035 // If it's not a no-op copy, it clobbers the value in the destreg. 1036 Spills.ClobberPhysReg(VirtReg); 1037 ReusedOperands.markClobbered(VirtReg); 1038 1039 // Check to see if this instruction is a load from a stack slot into 1040 // a register. If so, this provides the stack slot value in the reg. 1041 int FrameIdx; 1042 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) { 1043 assert(DestReg == VirtReg && "Unknown load situation!"); 1044 1045 // Otherwise, if it wasn't available, remember that it is now! 1046 Spills.addAvailable(FrameIdx, &MI, DestReg); 1047 goto ProcessNextInst; 1048 } 1049 1050 continue; 1051 } 1052 1053 // The only vregs left are stack slot definitions. 1054 int StackSlot = VRM.getStackSlot(VirtReg); 1055 const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(VirtReg); 1056 1057 // If this def is part of a two-address operand, make sure to execute 1058 // the store from the correct physical register. 1059 unsigned PhysReg; 1060 int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i); 1061 if (TiedOp != -1) 1062 PhysReg = MI.getOperand(TiedOp).getReg(); 1063 else { 1064 PhysReg = VRM.getPhys(VirtReg); 1065 if (ReusedOperands.isClobbered(PhysReg)) { 1066 // Another def has taken the assigned physreg. It must have been a 1067 // use&def which got it due to reuse. Undo the reuse! 1068 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, 1069 Spills, MaybeDeadStores, RegKills, KillOps, VRM); 1070 } 1071 } 1072 1073 MF.setPhysRegUsed(PhysReg); 1074 ReusedOperands.markClobbered(PhysReg); 1075 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); 1076 DOUT << "Store:\t" << *next(MII); 1077 MI.getOperand(i).setReg(PhysReg); 1078 1079 // If there is a dead store to this stack slot, nuke it now. 1080 MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; 1081 if (LastStore) { 1082 DOUT << "Removed dead store:\t" << *LastStore; 1083 ++NumDSE; 1084 InvalidateKills(*LastStore, RegKills, KillOps); 1085 MBB.erase(LastStore); 1086 VRM.RemoveFromFoldedVirtMap(LastStore); 1087 } 1088 LastStore = next(MII); 1089 1090 // If the stack slot value was previously available in some other 1091 // register, change it now. Otherwise, make the register available, 1092 // in PhysReg. 1093 Spills.ModifyStackSlotOrReMat(StackSlot); 1094 Spills.ClobberPhysReg(PhysReg); 1095 Spills.addAvailable(StackSlot, LastStore, PhysReg); 1096 ++NumStores; 1097 1098 // Check to see if this is a noop copy. If so, eliminate the 1099 // instruction before considering the dest reg to be changed. 1100 { 1101 unsigned Src, Dst; 1102 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { 1103 ++NumDCE; 1104 DOUT << "Removing now-noop copy: " << MI; 1105 MBB.erase(&MI); 1106 Erased = true; 1107 VRM.RemoveFromFoldedVirtMap(&MI); 1108 UpdateKills(*LastStore, RegKills, KillOps); 1109 goto ProcessNextInst; 1110 } 1111 } 1112 } 1113 } 1114 ProcessNextInst: 1115 if (!Erased && !BackTracked) 1116 for (MachineBasicBlock::iterator II = MI; II != NextMII; ++II) 1117 UpdateKills(*II, RegKills, KillOps); 1118 MII = NextMII; 1119 } 1120} 1121 1122 1123llvm::Spiller* llvm::createSpiller() { 1124 switch (SpillerOpt) { 1125 default: assert(0 && "Unreachable!"); 1126 case local: 1127 return new LocalSpiller(); 1128 case simple: 1129 return new SimpleSpiller(); 1130 } 1131} 1132