172062f5744557e270a38192554c3126ea5f97434Tim Northover//==-- AArch64ISelLowering.h - AArch64 DAG Lowering Interface ----*- C++ -*-==// 272062f5744557e270a38192554c3126ea5f97434Tim Northover// 372062f5744557e270a38192554c3126ea5f97434Tim Northover// The LLVM Compiler Infrastructure 472062f5744557e270a38192554c3126ea5f97434Tim Northover// 572062f5744557e270a38192554c3126ea5f97434Tim Northover// This file is distributed under the University of Illinois Open Source 672062f5744557e270a38192554c3126ea5f97434Tim Northover// License. See LICENSE.TXT for details. 772062f5744557e270a38192554c3126ea5f97434Tim Northover// 872062f5744557e270a38192554c3126ea5f97434Tim Northover//===----------------------------------------------------------------------===// 972062f5744557e270a38192554c3126ea5f97434Tim Northover// 1072062f5744557e270a38192554c3126ea5f97434Tim Northover// This file defines the interfaces that AArch64 uses to lower LLVM code into a 1172062f5744557e270a38192554c3126ea5f97434Tim Northover// selection DAG. 1272062f5744557e270a38192554c3126ea5f97434Tim Northover// 1372062f5744557e270a38192554c3126ea5f97434Tim Northover//===----------------------------------------------------------------------===// 1472062f5744557e270a38192554c3126ea5f97434Tim Northover 15dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#ifndef LLVM_TARGET_AArch64_ISELLOWERING_H 16dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#define LLVM_TARGET_AArch64_ISELLOWERING_H 1772062f5744557e270a38192554c3126ea5f97434Tim Northover 1872062f5744557e270a38192554c3126ea5f97434Tim Northover#include "llvm/CodeGen/CallingConvLower.h" 1972062f5744557e270a38192554c3126ea5f97434Tim Northover#include "llvm/CodeGen/SelectionDAG.h" 20dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/IR/CallingConv.h" 2136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "llvm/Target/TargetLowering.h" 2272062f5744557e270a38192554c3126ea5f97434Tim Northover 2372062f5744557e270a38192554c3126ea5f97434Tim Northovernamespace llvm { 24dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2572062f5744557e270a38192554c3126ea5f97434Tim Northovernamespace AArch64ISD { 2672062f5744557e270a38192554c3126ea5f97434Tim Northover 27dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesenum { 28dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FIRST_NUMBER = ISD::BUILTIN_OP_END, 29dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines WrapperLarge, // 4-instruction MOVZ/MOVK sequence for 64-bit addresses. 30dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CALL, // Function call. 31dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 32dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Almost the same as a normal call node, except that a TLSDesc relocation is 33dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // needed so the linker can relax it correctly if possible. 34dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TLSDESC_CALL, 35dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ADRP, // Page address of a TargetGlobalAddress operand. 36dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ADDlow, // Add the low 12 bits of a TargetGlobalAddress operand. 37dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LOADgot, // Load from automatically generated descriptor (e.g. Global 38dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Offset Table, TLS record). 39dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RET_FLAG, // Return with a flag operand. Operand 0 is the chain operand. 40dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BRCOND, // Conditional branch instruction; "b.cond". 41dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CSEL, 42dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FCSEL, // Conditional move instruction. 43dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CSINV, // Conditional select invert. 44dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CSNEG, // Conditional select negate. 45dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CSINC, // Conditional select increment. 46dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 47dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Pointer to the thread's local storage area. Materialised from TPIDR_EL0 on 48dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // ELF. 49dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines THREAD_POINTER, 50dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ADC, 51dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SBC, // adc, sbc instructions 52dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 53dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Arithmetic instructions which write flags. 54dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ADDS, 55dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SUBS, 56dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ADCS, 57dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SBCS, 58dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ANDS, 59dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 60dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Floating point comparison 61dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FCMP, 62dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 63dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Floating point max and min instructions. 64dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FMAX, 65dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FMIN, 66dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 67dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Scalar extract 68dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EXTR, 69dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 70dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Scalar-to-vector duplication 71dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DUP, 72dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DUPLANE8, 73dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DUPLANE16, 74dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DUPLANE32, 75dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DUPLANE64, 76dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 77dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector immedate moves 78dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MOVI, 79dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MOVIshift, 80dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MOVIedit, 81dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MOVImsl, 82dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FMOV, 83dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVNIshift, 84dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVNImsl, 85dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 86dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector immediate ops 87dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BICi, 88dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ORRi, 89dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 90dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector bit select: similar to ISD::VSELECT but not all bits within an 91dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // element must be identical. 92dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BSL, 93dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 94dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector arithmetic negation 95dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NEG, 96dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 97dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector shuffles 98dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ZIP1, 99dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ZIP2, 100dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UZP1, 101dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UZP2, 102dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TRN1, 103dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TRN2, 104dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines REV16, 105dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines REV32, 106dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines REV64, 107dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EXT, 108dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 109dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector shift by scalar 110dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VSHL, 111dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VLSHR, 112dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VASHR, 113dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 114dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector shift by scalar (again) 115dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SQSHL_I, 116dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UQSHL_I, 117dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SQSHLU_I, 118dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SRSHR_I, 119dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines URSHR_I, 120dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 121dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector comparisons 122dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CMEQ, 123dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CMGE, 124dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CMGT, 125dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CMHI, 126dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CMHS, 127dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FCMEQ, 128dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FCMGE, 129dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FCMGT, 130dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 131dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector zero comparisons 132dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CMEQz, 133dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CMGEz, 134dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CMGTz, 135dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CMLEz, 136dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CMLTz, 137dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FCMEQz, 138dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FCMGEz, 139dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FCMGTz, 140dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FCMLEz, 141dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FCMLTz, 142dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 143dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector bitwise negation 144dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NOT, 145dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 146dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector bitwise selection 147dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BIT, 148dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 149dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Compare-and-branch 150dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CBZ, 151dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CBNZ, 152dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TBZ, 153dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TBNZ, 154dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 155dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Tail calls 156dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TC_RETURN, 157dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 158dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Custom prefetch handling 159dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines PREFETCH, 160dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 161dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // {s|u}int to FP within a FP register. 162dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SITOF, 163dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UITOF, 164dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 165dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // NEON Load/Store with post-increment base updates 166dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD2post = ISD::FIRST_TARGET_MEMORY_OPCODE, 167dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD3post, 168dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD4post, 169dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ST2post, 170dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ST3post, 171dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ST4post, 172dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD1x2post, 173dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD1x3post, 174dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD1x4post, 175dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ST1x2post, 176dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ST1x3post, 177dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ST1x4post, 178dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD1DUPpost, 179dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD2DUPpost, 180dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD3DUPpost, 181dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD4DUPpost, 182dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD1LANEpost, 183dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD2LANEpost, 184dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD3LANEpost, 185dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LD4LANEpost, 186dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ST2LANEpost, 187dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ST3LANEpost, 188dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ST4LANEpost 189dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines}; 190dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 191dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} // end namespace AArch64ISD 19272062f5744557e270a38192554c3126ea5f97434Tim Northover 19372062f5744557e270a38192554c3126ea5f97434Tim Northoverclass AArch64Subtarget; 19472062f5744557e270a38192554c3126ea5f97434Tim Northoverclass AArch64TargetMachine; 19572062f5744557e270a38192554c3126ea5f97434Tim Northover 19672062f5744557e270a38192554c3126ea5f97434Tim Northoverclass AArch64TargetLowering : public TargetLowering { 197dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool RequireStrictAlign; 198dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 19972062f5744557e270a38192554c3126ea5f97434Tim Northoverpublic: 200cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines explicit AArch64TargetLowering(TargetMachine &TM); 20172062f5744557e270a38192554c3126ea5f97434Tim Northover 202dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// Selects the correct CCAssignFn for a the given CallingConvention 203dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// value. 204dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg) const; 205dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 206dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// computeKnownBitsForTargetNode - Determine which of the bits specified in 207dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// Mask are known to be either zero or one and return them in the 208dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// KnownZero/KnownOne bitsets. 209dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void computeKnownBitsForTargetNode(const SDValue Op, APInt &KnownZero, 210dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt &KnownOne, const SelectionDAG &DAG, 211dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Depth = 0) const override; 212dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 213dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT getScalarShiftAmountTy(EVT LHSTy) const override; 214dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 215dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// allowsUnalignedMemoryAccesses - Returns true if the target allows 216dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// unaligned memory accesses. of the specified type. 217dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AddrSpace = 0, 218dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool *Fast = nullptr) const override { 219dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (RequireStrictAlign) 220dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 221dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: True for Cyclone, but not necessary others. 222dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Fast) 223dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines *Fast = true; 224dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 225dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 22672062f5744557e270a38192554c3126ea5f97434Tim Northover 227dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// LowerOperation - Provide custom lowering hooks for some operations. 228dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 22972062f5744557e270a38192554c3126ea5f97434Tim Northover 230dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const char *getTargetNodeName(unsigned Opcode) const override; 23172062f5744557e270a38192554c3126ea5f97434Tim Northover 232dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 23372062f5744557e270a38192554c3126ea5f97434Tim Northover 234dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// getFunctionAlignment - Return the Log2 alignment of this function. 235dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned getFunctionAlignment(const Function *F) const; 23636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 237dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// getMaximalGlobalOffset - Returns the maximal possible offset which can 238dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// be used for loads / stores from the global. 239dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned getMaximalGlobalOffset() const override; 24072062f5744557e270a38192554c3126ea5f97434Tim Northover 241dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// Returns true if a cast between SrcAS and DestAS is a noop. 242dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override { 243dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Addrspacecasts are always noops. 244dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 245dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 24672062f5744557e270a38192554c3126ea5f97434Tim Northover 247dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// createFastISel - This method returns a target specific FastISel object, 248dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// or null if the target does not support "fast" ISel. 249dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FastISel *createFastISel(FunctionLoweringInfo &funcInfo, 250dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetLibraryInfo *libInfo) const override; 25136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 252dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override; 25336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 254dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isFPImmLegal(const APFloat &Imm, EVT VT) const override; 2558a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// isShuffleMaskLegal - Return true if the given shuffle mask can be 257dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// codegen'd directly, or if it should be stack expanded. 258dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const override; 25972062f5744557e270a38192554c3126ea5f97434Tim Northover 260dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// getSetCCResultType - Return the ISD::SETCC ValueType 261dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT getSetCCResultType(LLVMContext &Context, EVT VT) const override; 262dd518bcc9dd9e4028b2a979ced09edd5b6becd07Jiangning Liu 263dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ReconstructShuffle(SDValue Op, SelectionDAG &DAG) const; 26472062f5744557e270a38192554c3126ea5f97434Tim Northover 265dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineBasicBlock *EmitF128CSEL(MachineInstr *MI, 266dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineBasicBlock *BB) const; 26772062f5744557e270a38192554c3126ea5f97434Tim Northover 268dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineBasicBlock * 269dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EmitInstrWithCustomInserter(MachineInstr *MI, 270dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineBasicBlock *MBB) const override; 27172062f5744557e270a38192554c3126ea5f97434Tim Northover 272dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, 273dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Intrinsic) const override; 27472062f5744557e270a38192554c3126ea5f97434Tim Northover 275dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isTruncateFree(Type *Ty1, Type *Ty2) const override; 276dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isTruncateFree(EVT VT1, EVT VT2) const override; 27772062f5744557e270a38192554c3126ea5f97434Tim Northover 278dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isZExtFree(Type *Ty1, Type *Ty2) const override; 279dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isZExtFree(EVT VT1, EVT VT2) const override; 280dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isZExtFree(SDValue Val, EVT VT2) const override; 28172062f5744557e270a38192554c3126ea5f97434Tim Northover 282dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool hasPairedLoad(Type *LoadedType, 283dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned &RequiredAligment) const override; 284dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool hasPairedLoad(EVT LoadedType, unsigned &RequiredAligment) const override; 28572062f5744557e270a38192554c3126ea5f97434Tim Northover 286dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isLegalAddImmediate(int64_t) const override; 287dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isLegalICmpImmediate(int64_t) const override; 28872062f5744557e270a38192554c3126ea5f97434Tim Northover 289dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, 290dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, 291dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFunction &MF) const override; 29272062f5744557e270a38192554c3126ea5f97434Tim Northover 293dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// isLegalAddressingMode - Return true if the addressing mode represented 294dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// by AM is legal for this target, for a load/store of the specified type. 295dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override; 29672062f5744557e270a38192554c3126ea5f97434Tim Northover 297dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// \brief Return the cost of the scaling factor used in the addressing 298dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// mode represented by AM for this target, for a load/store 299dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// of the specified type. 300dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// If the AM is supported, the return value must be >= 0. 301dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// If the AM is not supported, it returns a negative value. 302dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int getScalingFactorCost(const AddrMode &AM, Type *Ty) const override; 30372062f5744557e270a38192554c3126ea5f97434Tim Northover 304dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// isFMAFasterThanFMulAndFAdd - Return true if an FMA operation is faster 305dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// than a pair of fmul and fadd instructions. fmuladd intrinsics will be 306dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// expanded to FMAs when this method returns true, otherwise fmuladd is 307dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// expanded to fmul + fadd. 308dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isFMAFasterThanFMulAndFAdd(EVT VT) const override; 30972062f5744557e270a38192554c3126ea5f97434Tim Northover 310dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const MCPhysReg *getScratchRegisters(CallingConv::ID CC) const override; 31145db92038bf540fbbd8dfe5dff520aa8566d7cefTim Northover 312dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// \brief Returns false if N is a bit extraction pattern of (X >> C) & Mask. 313dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isDesirableToCommuteWithShift(const SDNode *N) const override; 31445db92038bf540fbbd8dfe5dff520aa8566d7cefTim Northover 315dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// \brief Returns true if it is beneficial to convert a load of a constant 316dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// to just the constant itself. 317dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool shouldConvertConstantLoadToIntImm(const APInt &Imm, 318dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *Ty) const override; 31936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 320dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *emitLoadLinked(IRBuilder<> &Builder, Value *Addr, 321dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AtomicOrdering Ord) const override; 322dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *emitStoreConditional(IRBuilder<> &Builder, Value *Val, 323dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *Addr, AtomicOrdering Ord) const override; 32472062f5744557e270a38192554c3126ea5f97434Tim Northover 325dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool shouldExpandAtomicInIR(Instruction *Inst) const override; 32672062f5744557e270a38192554c3126ea5f97434Tim Northover 327cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines TargetLoweringBase::LegalizeTypeAction 328cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines getPreferredVectorAction(EVT VT) const override; 329cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 330dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesprivate: 331dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// Subtarget - Keep a pointer to the AArch64Subtarget around so that we can 332dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// make the right decision when generating code for different targets. 333dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const AArch64Subtarget *Subtarget; 33472062f5744557e270a38192554c3126ea5f97434Tim Northover 335dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void addTypeForNEON(EVT VT, EVT PromotedBitwiseVT); 336dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void addDRTypeForNEON(MVT VT); 337dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void addQRTypeForNEON(MVT VT); 33872062f5744557e270a38192554c3126ea5f97434Tim Northover 339dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue 340dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 341dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, 342dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG, 343dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVectorImpl<SDValue> &InVals) const override; 34472062f5744557e270a38192554c3126ea5f97434Tim Northover 345dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerCall(CallLoweringInfo & /*CLI*/, 346dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVectorImpl<SDValue> &InVals) const override; 3476a5a667517160ca1b557002a29d08868ae029451Hao Liu 348dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 349dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CallingConv::ID CallConv, bool isVarArg, 350dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, 351dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, 352dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isThisReturn, SDValue ThisVal) const; 353dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 354dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isEligibleForTailCallOptimization( 355dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, 356dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isCalleeStructRet, bool isCallerStructRet, 357dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::OutputArg> &Outs, 358dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<SDValue> &OutVals, 359dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const; 3606a5a667517160ca1b557002a29d08868ae029451Hao Liu 361dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// Finds the incoming stack arguments which overlap the given fixed stack 362dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// object and incorporates their load into the current chain. This prevents 363dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// an upcoming store from clobbering the stack argument before it's used. 364dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue addTokenForArgument(SDValue Chain, SelectionDAG &DAG, 365dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFrameInfo *MFI, int ClobberedFI) const; 366f04a4d74b86733b853b7445ab6d5a3bde025a30dBill Wendling 367dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool DoesCalleeRestoreStack(CallingConv::ID CallCC, bool TailCallOpt) const; 3684393f48c03300203594e22d248808f20dd59d886Bill Wendling 369dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsTailCallConvention(CallingConv::ID CallCC) const; 370dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 371dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void saveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, SDLoc DL, 372dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue &Chain) const; 373dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 374dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, 375dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isVarArg, 376dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::OutputArg> &Outs, 377dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LLVMContext &Context) const override; 378dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 379dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 380dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::OutputArg> &Outs, 381dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, 382dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const override; 383dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 384dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 385dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; 386dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerDarwinGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; 387dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerELFGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; 388dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerELFTLSDescCall(SDValue SymAddr, SDValue DescAddr, SDLoc DL, 389dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const; 390dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const; 391dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 392dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const; 393dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 394dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; 395dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const; 396dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 397dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerAAPCS_VASTART(SDValue Op, SelectionDAG &DAG) const; 398dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerDarwin_VASTART(SDValue Op, SelectionDAG &DAG) const; 399dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const; 400dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerVACOPY(SDValue Op, SelectionDAG &DAG) const; 401dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const; 402dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; 403dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const; 404dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; 405dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; 406dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const; 407dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const; 408dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const; 409dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const; 410dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerVectorSRA_SRL_SHL(SDValue Op, SelectionDAG &DAG) const; 411dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const; 412dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const; 413dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerVSETCC(SDValue Op, SelectionDAG &DAG) const; 414dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerCTPOP(SDValue Op, SelectionDAG &DAG) const; 415dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerF128Call(SDValue Op, SelectionDAG &DAG, 416dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RTLIB::Libcall Call) const; 417dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const; 418dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const; 419dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const; 420dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const; 421dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG) const; 422dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerVectorAND(SDValue Op, SelectionDAG &DAG) const; 423dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerVectorOR(SDValue Op, SelectionDAG &DAG) const; 424dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const; 425dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerFSINCOS(SDValue Op, SelectionDAG &DAG) const; 426dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 427dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstraintType 428dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines getConstraintType(const std::string &Constraint) const override; 429dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned getRegisterByName(const char* RegName, EVT VT) const override; 430dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 431dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// Examine constraint string and operand type and determine a weight value. 432dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// The operand object must already have been set up with the operand type. 433dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstraintWeight 434dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines getSingleConstraintMatchWeight(AsmOperandInfo &info, 435dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const char *constraint) const override; 436dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 437dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::pair<unsigned, const TargetRegisterClass *> 438dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines getRegForInlineAsmConstraint(const std::string &Constraint, 439dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT VT) const override; 440dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, 441dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::vector<SDValue> &Ops, 442dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const override; 443dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 444dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isUsedByReturnOnly(SDNode *N, SDValue &Chain) const override; 445dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool mayBeEmittedAsTailCall(CallInst *CI) const override; 446dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool getIndexedAddressParts(SDNode *Op, SDValue &Base, SDValue &Offset, 447dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::MemIndexedMode &AM, bool &IsInc, 448dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const; 449dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset, 450dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::MemIndexedMode &AM, 451dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const override; 452dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base, 453dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue &Offset, ISD::MemIndexedMode &AM, 454dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const override; 455dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 456dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, 457dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const override; 45887773c318fcee853fb34a80a10c4347d523bdafbTim Northover}; 459767f816b926376bd850a62a28d35343ad0559c91Kevin Qin 460dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesnamespace AArch64 { 461dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesFastISel *createFastISel(FunctionLoweringInfo &funcInfo, 462dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetLibraryInfo *libInfo); 463dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} // end namespace AArch64 464dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 465dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} // end namespace llvm 46672062f5744557e270a38192554c3126ea5f97434Tim Northover 467dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#endif // LLVM_TARGET_AArch64_ISELLOWERING_H 468