ARMExpandPseudoInsts.cpp revision 4334e032525d6c9038605f3871b945e8cbe6fab7
1b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng//===-- ARMExpandPseudoInsts.cpp - Expand pseudo instructions -----*- C++ -*-=// 2b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 3b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// The LLVM Compiler Infrastructure 4b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 5b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// This file is distributed under the University of Illinois Open Source 6b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// License. See LICENSE.TXT for details. 7b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 8b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng//===----------------------------------------------------------------------===// 9b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 10656edcf138563068a2e7d52fb35f8de1375bad9aBob Wilson// This file contains a pass that expands pseudo instructions into target 11b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// instructions to allow proper scheduling, if-conversion, and other late 12b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// optimizations. This pass should be run after register allocation but before 13656edcf138563068a2e7d52fb35f8de1375bad9aBob Wilson// the post-regalloc scheduling pass. 14b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 15b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng//===----------------------------------------------------------------------===// 16b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 17b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#define DEBUG_TYPE "arm-pseudo" 18b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "ARM.h" 19b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "ARMBaseInstrInfo.h" 20e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "ARMBaseRegisterInfo.h" 21e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "ARMMachineFunctionInfo.h" 2265dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach#include "ARMRegisterInfo.h" 23ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng#include "MCTargetDesc/ARMAddressingModes.h" 24e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "llvm/CodeGen/MachineFrameInfo.h" 25b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "llvm/CodeGen/MachineFunctionPass.h" 26b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "llvm/CodeGen/MachineInstrBuilder.h" 2716c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov#include "llvm/Target/TargetFrameLowering.h" 284dbbe3433f7339ed277af55037ff6847f484e5abChris Lattner#include "llvm/Target/TargetRegisterInfo.h" 29e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen#include "llvm/Support/CommandLine.h" 30e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "llvm/Support/raw_ostream.h" // FIXME: for debug only. remove! 31b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Chengusing namespace llvm; 32b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 33a67f14bf53737f9bb0afefa28e08c4aac6ec4804Benjamin Kramerstatic cl::opt<bool> 34e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund OlesenVerifyARMPseudo("verify-arm-pseudo-expand", cl::Hidden, 35e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen cl::desc("Verify machine code after expanding ARM pseudos")); 36e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen 37b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Chengnamespace { 38b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng class ARMExpandPseudo : public MachineFunctionPass { 39b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng public: 40b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng static char ID; 4190c579de5a383cee278acc3f7e7b9d0a656e6a35Owen Anderson ARMExpandPseudo() : MachineFunctionPass(ID) {} 42b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 43e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach const ARMBaseInstrInfo *TII; 44d929f7773812535271ae6969331f8164c1f7f3b2Evan Cheng const TargetRegisterInfo *TRI; 45893d7fe2098cc81ba1b4ce0ed71f6f614843961fEvan Cheng const ARMSubtarget *STI; 469fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng ARMFunctionInfo *AFI; 47b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 48b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng virtual bool runOnMachineFunction(MachineFunction &Fn); 49b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 50b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng virtual const char *getPassName() const { 51b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return "ARM pseudo instruction expansion pass"; 52b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng } 53b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 54b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng private: 55431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng void TransferImpOps(MachineInstr &OldMI, 56431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI); 579fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool ExpandMI(MachineBasicBlock &MBB, 589fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator MBBI); 59b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng bool ExpandMBB(MachineBasicBlock &MBB); 608466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson void ExpandVLD(MachineBasicBlock::iterator &MBBI); 618466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson void ExpandVST(MachineBasicBlock::iterator &MBBI); 628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson void ExpandLaneOp(MachineBasicBlock::iterator &MBBI); 63bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson void ExpandVTBL(MachineBasicBlock::iterator &MBBI, 64bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned Opc, bool IsExt, unsigned NumRegs); 659fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng void ExpandMOV32BitImm(MachineBasicBlock &MBB, 669fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator &MBBI); 67b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng }; 68b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng char ARMExpandPseudo::ID = 0; 69b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 70b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 71431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng/// TransferImpOps - Transfer implicit operands on the pseudo instruction to 72431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng/// the instructions created from the expansion. 73431300797b84600fc9b4eb8ca283277d3e0674ebEvan Chengvoid ARMExpandPseudo::TransferImpOps(MachineInstr &OldMI, 74431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder &UseMI, 75431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder &DefMI) { 76e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &Desc = OldMI.getDesc(); 77431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng for (unsigned i = Desc.getNumOperands(), e = OldMI.getNumOperands(); 78431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng i != e; ++i) { 79431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng const MachineOperand &MO = OldMI.getOperand(i); 80431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng assert(MO.isReg() && MO.getReg()); 81431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng if (MO.isUse()) 8263569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson UseMI.addOperand(MO); 83431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng else 8463569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson DefMI.addOperand(MO); 85431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng } 86431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng} 87431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng 888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonnamespace { 898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Constants for register spacing in NEON load/store instructions. 908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // For quad-register load-lane and store-lane pseudo instructors, the 918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // spacing is initially assumed to be EvenDblSpc, and that is changed to 928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // OddDblSpc depending on the lane number operand. 938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson enum NEONRegSpacing { 948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson SingleSpc, 958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson EvenDblSpc, 968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson OddDblSpc 978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson }; 988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Entries for NEON load/store information table. The table is sorted by 1008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // PseudoOpc for fast binary-search lookups. 1018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson struct NEONLdStTableEntry { 1028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned PseudoOpc; 1038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned RealOpc; 1048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson bool IsLoad; 105f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach bool isUpdating; 106f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach bool hasWritebackOperand; 1078466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpacing; 1088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned char NumRegs; // D registers loaded or stored 1098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned char RegElts; // elements per D register; used for lane ops 110280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach // FIXME: Temporary flag to denote whether the real instruction takes 111280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach // a single register (like the encoding) or all of the registers in 112280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach // the list (like the asm syntax and the isel DAG). When all definitions 113280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach // are converted to take only the single encoded register, this will 114280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach // go away. 115280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach bool copyAllListRegs; 1168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1178466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Comparison methods for binary search of the table. 1188466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson bool operator<(const NEONLdStTableEntry &TE) const { 1198466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return PseudoOpc < TE.PseudoOpc; 1208466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 1218466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson friend bool operator<(const NEONLdStTableEntry &TE, unsigned PseudoOpc) { 1228466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return TE.PseudoOpc < PseudoOpc; 1238466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 124100c267249d1d03c4f96eede9877a4f9f54f2247Chandler Carruth friend bool LLVM_ATTRIBUTE_UNUSED operator<(unsigned PseudoOpc, 125100c267249d1d03c4f96eede9877a4f9f54f2247Chandler Carruth const NEONLdStTableEntry &TE) { 1268466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return PseudoOpc < TE.PseudoOpc; 1278466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 1288466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson }; 1298466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 1308466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1318466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonstatic const NEONLdStTableEntry NEONLdStTable[] = { 132f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1DUPq16Pseudo, ARM::VLD1DUPq16, true, false, false, SingleSpc, 2, 4,true}, 133f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1DUPq16Pseudo_UPD, ARM::VLD1DUPq16_UPD, true, true, true, SingleSpc, 2, 4,true}, 134f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1DUPq32Pseudo, ARM::VLD1DUPq32, true, false, false, SingleSpc, 2, 2,true}, 135f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1DUPq32Pseudo_UPD, ARM::VLD1DUPq32_UPD, true, true, true, SingleSpc, 2, 2,true}, 136f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1DUPq8Pseudo, ARM::VLD1DUPq8, true, false, false, SingleSpc, 2, 8,true}, 137f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1DUPq8Pseudo_UPD, ARM::VLD1DUPq8_UPD, true, true, true, SingleSpc, 2, 8,true}, 138f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 139f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq16Pseudo, ARM::VLD1LNd16, true, false, false, EvenDblSpc, 1, 4 ,true}, 140f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq16Pseudo_UPD, ARM::VLD1LNd16_UPD, true, true, true, EvenDblSpc, 1, 4 ,true}, 141f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq32Pseudo, ARM::VLD1LNd32, true, false, false, EvenDblSpc, 1, 2 ,true}, 142f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq32Pseudo_UPD, ARM::VLD1LNd32_UPD, true, true, true, EvenDblSpc, 1, 2 ,true}, 143f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq8Pseudo, ARM::VLD1LNd8, true, false, false, EvenDblSpc, 1, 8 ,true}, 144f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq8Pseudo_UPD, ARM::VLD1LNd8_UPD, true, true, true, EvenDblSpc, 1, 8 ,true}, 145f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 146f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1d64QPseudo, ARM::VLD1d64Q, true, false, false, SingleSpc, 4, 1 ,false}, 147f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1d64TPseudo, ARM::VLD1d64T, true, false, false, SingleSpc, 3, 1 ,false}, 148f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q16Pseudo, ARM::VLD1q16, true, false, false, SingleSpc, 2, 4 ,false}, 149f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q16PseudoWB_fixed, ARM::VLD1q16wb_fixed,true,false,false,SingleSpc, 2, 4 ,false}, 150f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q16PseudoWB_register, ARM::VLD1q16wb_register, true, true, true, SingleSpc, 2, 4 ,false}, 151f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q32Pseudo, ARM::VLD1q32, true, false, false, SingleSpc, 2, 2 ,false}, 152f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q32PseudoWB_fixed, ARM::VLD1q32wb_fixed,true,false, false,SingleSpc, 2, 2 ,false}, 153f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q32PseudoWB_register, ARM::VLD1q32wb_register, true, true, true, SingleSpc, 2, 2 ,false}, 154f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q64Pseudo, ARM::VLD1q64, true, false, false, SingleSpc, 2, 1 ,false}, 155f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q64PseudoWB_fixed, ARM::VLD1q64wb_fixed,true,false, false,SingleSpc, 2, 2 ,false}, 156f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q64PseudoWB_register, ARM::VLD1q64wb_register, true, true, true, SingleSpc, 2, 1 ,false}, 157f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q8Pseudo, ARM::VLD1q8, true, false, false, SingleSpc, 2, 8 ,false}, 158f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q8PseudoWB_fixed, ARM::VLD1q8wb_fixed,true,false, false, SingleSpc, 2, 8 ,false}, 159f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q8PseudoWB_register, ARM::VLD1q8wb_register,true,true, true,SingleSpc,2,8,false}, 160f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 161f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd16Pseudo, ARM::VLD2DUPd16, true, false, false, SingleSpc, 2, 4,true}, 162f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd16Pseudo_UPD, ARM::VLD2DUPd16_UPD, true, true, true, SingleSpc, 2, 4,true}, 163f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd32Pseudo, ARM::VLD2DUPd32, true, false, false, SingleSpc, 2, 2,true}, 164f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd32Pseudo_UPD, ARM::VLD2DUPd32_UPD, true, true, true, SingleSpc, 2, 2,true}, 165f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd8Pseudo, ARM::VLD2DUPd8, true, false, false, SingleSpc, 2, 8,true}, 166f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd8Pseudo_UPD, ARM::VLD2DUPd8_UPD, true, true, true, SingleSpc, 2, 8,true}, 167f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 168f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd16Pseudo, ARM::VLD2LNd16, true, false, false, SingleSpc, 2, 4 ,true}, 169f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd16Pseudo_UPD, ARM::VLD2LNd16_UPD, true, true, true, SingleSpc, 2, 4 ,true}, 170f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd32Pseudo, ARM::VLD2LNd32, true, false, false, SingleSpc, 2, 2 ,true}, 171f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd32Pseudo_UPD, ARM::VLD2LNd32_UPD, true, true, true, SingleSpc, 2, 2 ,true}, 172f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd8Pseudo, ARM::VLD2LNd8, true, false, false, SingleSpc, 2, 8 ,true}, 173f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd8Pseudo_UPD, ARM::VLD2LNd8_UPD, true, true, true, SingleSpc, 2, 8 ,true}, 174f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNq16Pseudo, ARM::VLD2LNq16, true, false, false, EvenDblSpc, 2, 4 ,true}, 175f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNq16Pseudo_UPD, ARM::VLD2LNq16_UPD, true, true, true, EvenDblSpc, 2, 4 ,true}, 176f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNq32Pseudo, ARM::VLD2LNq32, true, false, false, EvenDblSpc, 2, 2 ,true}, 177f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNq32Pseudo_UPD, ARM::VLD2LNq32_UPD, true, true, true, EvenDblSpc, 2, 2 ,true}, 178f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 179f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2d16Pseudo, ARM::VLD2d16, true, false, false, SingleSpc, 2, 4 ,false}, 180f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2d16Pseudo_UPD, ARM::VLD2d16_UPD, true, true, true, SingleSpc, 2, 4 ,false}, 181f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2d32Pseudo, ARM::VLD2d32, true, false, false, SingleSpc, 2, 2 ,false}, 182f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2d32Pseudo_UPD, ARM::VLD2d32_UPD, true, true, true, SingleSpc, 2, 2 ,false}, 183f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2d8Pseudo, ARM::VLD2d8, true, false, false, SingleSpc, 2, 8 ,false}, 184f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2d8Pseudo_UPD, ARM::VLD2d8_UPD, true, true, true, SingleSpc, 2, 8 ,false}, 185f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 186f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2q16Pseudo, ARM::VLD2q16, true, false, false, SingleSpc, 4, 4 ,false}, 187f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2q16Pseudo_UPD, ARM::VLD2q16_UPD, true, true, true, SingleSpc, 4, 4 ,false}, 188f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2q32Pseudo, ARM::VLD2q32, true, false, false, SingleSpc, 4, 2 ,false}, 189f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2q32Pseudo_UPD, ARM::VLD2q32_UPD, true, true, true, SingleSpc, 4, 2 ,false}, 190f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2q8Pseudo, ARM::VLD2q8, true, false, false, SingleSpc, 4, 8 ,false}, 191f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2q8Pseudo_UPD, ARM::VLD2q8_UPD, true, true, true, SingleSpc, 4, 8 ,false}, 192f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 193f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd16Pseudo, ARM::VLD3DUPd16, true, false, false, SingleSpc, 3, 4,true}, 194f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd16Pseudo_UPD, ARM::VLD3DUPd16_UPD, true, true, true, SingleSpc, 3, 4,true}, 195f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd32Pseudo, ARM::VLD3DUPd32, true, false, false, SingleSpc, 3, 2,true}, 196f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd32Pseudo_UPD, ARM::VLD3DUPd32_UPD, true, true, true, SingleSpc, 3, 2,true}, 197f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd8Pseudo, ARM::VLD3DUPd8, true, false, false, SingleSpc, 3, 8,true}, 198f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd8Pseudo_UPD, ARM::VLD3DUPd8_UPD, true, true, true, SingleSpc, 3, 8,true}, 199f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 200f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd16Pseudo, ARM::VLD3LNd16, true, false, false, SingleSpc, 3, 4 ,true}, 201f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd16Pseudo_UPD, ARM::VLD3LNd16_UPD, true, true, true, SingleSpc, 3, 4 ,true}, 202f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd32Pseudo, ARM::VLD3LNd32, true, false, false, SingleSpc, 3, 2 ,true}, 203f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd32Pseudo_UPD, ARM::VLD3LNd32_UPD, true, true, true, SingleSpc, 3, 2 ,true}, 204f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd8Pseudo, ARM::VLD3LNd8, true, false, false, SingleSpc, 3, 8 ,true}, 205f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd8Pseudo_UPD, ARM::VLD3LNd8_UPD, true, true, true, SingleSpc, 3, 8 ,true}, 206f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNq16Pseudo, ARM::VLD3LNq16, true, false, false, EvenDblSpc, 3, 4 ,true}, 207f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNq16Pseudo_UPD, ARM::VLD3LNq16_UPD, true, true, true, EvenDblSpc, 3, 4 ,true}, 208f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNq32Pseudo, ARM::VLD3LNq32, true, false, false, EvenDblSpc, 3, 2 ,true}, 209f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNq32Pseudo_UPD, ARM::VLD3LNq32_UPD, true, true, true, EvenDblSpc, 3, 2 ,true}, 210f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 211f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d16Pseudo, ARM::VLD3d16, true, false, false, SingleSpc, 3, 4 ,true}, 212f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d16Pseudo_UPD, ARM::VLD3d16_UPD, true, true, true, SingleSpc, 3, 4 ,true}, 213f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d32Pseudo, ARM::VLD3d32, true, false, false, SingleSpc, 3, 2 ,true}, 214f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d32Pseudo_UPD, ARM::VLD3d32_UPD, true, true, true, SingleSpc, 3, 2 ,true}, 215f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d8Pseudo, ARM::VLD3d8, true, false, false, SingleSpc, 3, 8 ,true}, 216f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d8Pseudo_UPD, ARM::VLD3d8_UPD, true, true, true, SingleSpc, 3, 8 ,true}, 217f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 218f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q16Pseudo_UPD, ARM::VLD3q16_UPD, true, true, true, EvenDblSpc, 3, 4 ,true}, 219f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q16oddPseudo, ARM::VLD3q16, true, false, false, OddDblSpc, 3, 4 ,true}, 220f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q16oddPseudo_UPD, ARM::VLD3q16_UPD, true, true, true, OddDblSpc, 3, 4 ,true}, 221f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q32Pseudo_UPD, ARM::VLD3q32_UPD, true, true, true, EvenDblSpc, 3, 2 ,true}, 222f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q32oddPseudo, ARM::VLD3q32, true, false, false, OddDblSpc, 3, 2 ,true}, 223f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q32oddPseudo_UPD, ARM::VLD3q32_UPD, true, true, true, OddDblSpc, 3, 2 ,true}, 224f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q8Pseudo_UPD, ARM::VLD3q8_UPD, true, true, true, EvenDblSpc, 3, 8 ,true}, 225f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q8oddPseudo, ARM::VLD3q8, true, false, false, OddDblSpc, 3, 8 ,true}, 226f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q8oddPseudo_UPD, ARM::VLD3q8_UPD, true, true, true, OddDblSpc, 3, 8 ,true}, 227f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 228f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd16Pseudo, ARM::VLD4DUPd16, true, false, false, SingleSpc, 4, 4,true}, 229f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd16Pseudo_UPD, ARM::VLD4DUPd16_UPD, true, true, true, SingleSpc, 4, 4,true}, 230f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd32Pseudo, ARM::VLD4DUPd32, true, false, false, SingleSpc, 4, 2,true}, 231f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd32Pseudo_UPD, ARM::VLD4DUPd32_UPD, true, true, true, SingleSpc, 4, 2,true}, 232f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd8Pseudo, ARM::VLD4DUPd8, true, false, false, SingleSpc, 4, 8,true}, 233f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd8Pseudo_UPD, ARM::VLD4DUPd8_UPD, true, true, true, SingleSpc, 4, 8,true}, 234f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 235f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd16Pseudo, ARM::VLD4LNd16, true, false, false, SingleSpc, 4, 4 ,true}, 236f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd16Pseudo_UPD, ARM::VLD4LNd16_UPD, true, true, true, SingleSpc, 4, 4 ,true}, 237f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd32Pseudo, ARM::VLD4LNd32, true, false, false, SingleSpc, 4, 2 ,true}, 238f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd32Pseudo_UPD, ARM::VLD4LNd32_UPD, true, true, true, SingleSpc, 4, 2 ,true}, 239f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd8Pseudo, ARM::VLD4LNd8, true, false, false, SingleSpc, 4, 8 ,true}, 240f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd8Pseudo_UPD, ARM::VLD4LNd8_UPD, true, true, true, SingleSpc, 4, 8 ,true}, 241f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNq16Pseudo, ARM::VLD4LNq16, true, false, false, EvenDblSpc, 4, 4 ,true}, 242f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNq16Pseudo_UPD, ARM::VLD4LNq16_UPD, true, true, true, EvenDblSpc, 4, 4 ,true}, 243f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNq32Pseudo, ARM::VLD4LNq32, true, false, false, EvenDblSpc, 4, 2 ,true}, 244f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNq32Pseudo_UPD, ARM::VLD4LNq32_UPD, true, true, true, EvenDblSpc, 4, 2 ,true}, 245f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 246f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d16Pseudo, ARM::VLD4d16, true, false, false, SingleSpc, 4, 4 ,true}, 247f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d16Pseudo_UPD, ARM::VLD4d16_UPD, true, true, true, SingleSpc, 4, 4 ,true}, 248f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d32Pseudo, ARM::VLD4d32, true, false, false, SingleSpc, 4, 2 ,true}, 249f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d32Pseudo_UPD, ARM::VLD4d32_UPD, true, true, true, SingleSpc, 4, 2 ,true}, 250f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d8Pseudo, ARM::VLD4d8, true, false, false, SingleSpc, 4, 8 ,true}, 251f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d8Pseudo_UPD, ARM::VLD4d8_UPD, true, true, true, SingleSpc, 4, 8 ,true}, 252f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 253f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q16Pseudo_UPD, ARM::VLD4q16_UPD, true, true, true, EvenDblSpc, 4, 4 ,true}, 254f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q16oddPseudo, ARM::VLD4q16, true, false, false, OddDblSpc, 4, 4 ,true}, 255f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q16oddPseudo_UPD, ARM::VLD4q16_UPD, true, true, true, OddDblSpc, 4, 4 ,true}, 256f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q32Pseudo_UPD, ARM::VLD4q32_UPD, true, true, true, EvenDblSpc, 4, 2 ,true}, 257f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q32oddPseudo, ARM::VLD4q32, true, false, false, OddDblSpc, 4, 2 ,true}, 258f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q32oddPseudo_UPD, ARM::VLD4q32_UPD, true, true, true, OddDblSpc, 4, 2 ,true}, 259f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q8Pseudo_UPD, ARM::VLD4q8_UPD, true, true, true, EvenDblSpc, 4, 8 ,true}, 260f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q8oddPseudo, ARM::VLD4q8, true, false, false, OddDblSpc, 4, 8 ,true}, 261f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q8oddPseudo_UPD, ARM::VLD4q8_UPD, true, true, true, OddDblSpc, 4, 8 ,true}, 262f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 263f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq16Pseudo, ARM::VST1LNd16, false, false, false, EvenDblSpc, 1, 4 ,true}, 264f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq16Pseudo_UPD, ARM::VST1LNd16_UPD, false, true, true, EvenDblSpc, 1, 4 ,true}, 265f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq32Pseudo, ARM::VST1LNd32, false, false, false, EvenDblSpc, 1, 2 ,true}, 266f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq32Pseudo_UPD, ARM::VST1LNd32_UPD, false, true, true, EvenDblSpc, 1, 2 ,true}, 267f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq8Pseudo, ARM::VST1LNd8, false, false, false, EvenDblSpc, 1, 8 ,true}, 268f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq8Pseudo_UPD, ARM::VST1LNd8_UPD, false, true, true, EvenDblSpc, 1, 8 ,true}, 269f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 270f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1d64QPseudo, ARM::VST1d64Q, false, false, false, SingleSpc, 4, 1 ,true}, 271f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1d64QPseudo_UPD, ARM::VST1d64Q_UPD, false, true, true, SingleSpc, 4, 1 ,true}, 272f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1d64TPseudo, ARM::VST1d64T, false, false, false, SingleSpc, 3, 1 ,true}, 273f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1d64TPseudo_UPD, ARM::VST1d64T_UPD, false, true, true, SingleSpc, 3, 1 ,true}, 274f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 275f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1q16Pseudo, ARM::VST1q16, false, false, false, SingleSpc, 2, 4 ,true}, 2764334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q16PseudoWB_fixed, ARM::VST1q16wb_fixed, false, true, false, SingleSpc, 2, 4 ,false}, 2774334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q16PseudoWB_register, ARM::VST1q16wb_register, false, true, true, SingleSpc, 2, 4 ,false}, 278f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1q32Pseudo, ARM::VST1q32, false, false, false, SingleSpc, 2, 2 ,true}, 2794334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q32PseudoWB_fixed, ARM::VST1q32wb_fixed, false, true, false, SingleSpc, 2, 2 ,false}, 2804334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q32PseudoWB_register, ARM::VST1q32wb_register, false, true, true, SingleSpc, 2, 2 ,false}, 281f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1q64Pseudo, ARM::VST1q64, false, false, false, SingleSpc, 2, 1 ,true}, 2824334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q64PseudoWB_fixed, ARM::VST1q64wb_fixed, false, true, false, SingleSpc, 2, 1 ,false}, 2834334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q64PseudoWB_register, ARM::VST1q64wb_register, false, true, true, SingleSpc, 2, 1 ,false}, 284f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1q8Pseudo, ARM::VST1q8, false, false, false, SingleSpc, 2, 8 ,true}, 2854334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q8PseudoWB_fixed, ARM::VST1q8wb_fixed, false, true, false, SingleSpc, 2, 8 ,false}, 2864334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q8PseudoWB_register, ARM::VST1q8wb_register, false, true, true, SingleSpc, 2, 8 ,false}, 287f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 288f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd16Pseudo, ARM::VST2LNd16, false, false, false, SingleSpc, 2, 4 ,true}, 289f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd16Pseudo_UPD, ARM::VST2LNd16_UPD, false, true, true, SingleSpc, 2, 4 ,true}, 290f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd32Pseudo, ARM::VST2LNd32, false, false, false, SingleSpc, 2, 2 ,true}, 291f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd32Pseudo_UPD, ARM::VST2LNd32_UPD, false, true, true, SingleSpc, 2, 2 ,true}, 292f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd8Pseudo, ARM::VST2LNd8, false, false, false, SingleSpc, 2, 8 ,true}, 293f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd8Pseudo_UPD, ARM::VST2LNd8_UPD, false, true, true, SingleSpc, 2, 8 ,true}, 294f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNq16Pseudo, ARM::VST2LNq16, false, false, false, EvenDblSpc, 2, 4,true}, 295f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNq16Pseudo_UPD, ARM::VST2LNq16_UPD, false, true, true, EvenDblSpc, 2, 4,true}, 296f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNq32Pseudo, ARM::VST2LNq32, false, false, false, EvenDblSpc, 2, 2,true}, 297f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNq32Pseudo_UPD, ARM::VST2LNq32_UPD, false, true, true, EvenDblSpc, 2, 2,true}, 298f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 299f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d16Pseudo, ARM::VST2d16, false, false, false, SingleSpc, 2, 4 ,true}, 300f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d16Pseudo_UPD, ARM::VST2d16_UPD, false, true, true, SingleSpc, 2, 4 ,true}, 301f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d32Pseudo, ARM::VST2d32, false, false, false, SingleSpc, 2, 2 ,true}, 302f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d32Pseudo_UPD, ARM::VST2d32_UPD, false, true, true, SingleSpc, 2, 2 ,true}, 303f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d8Pseudo, ARM::VST2d8, false, false, false, SingleSpc, 2, 8 ,true}, 304f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d8Pseudo_UPD, ARM::VST2d8_UPD, false, true, true, SingleSpc, 2, 8 ,true}, 305f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 306f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q16Pseudo, ARM::VST2q16, false, false, false, SingleSpc, 4, 4 ,true}, 307f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q16Pseudo_UPD, ARM::VST2q16_UPD, false, true, true, SingleSpc, 4, 4 ,true}, 308f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q32Pseudo, ARM::VST2q32, false, false, false, SingleSpc, 4, 2 ,true}, 309f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q32Pseudo_UPD, ARM::VST2q32_UPD, false, true, true, SingleSpc, 4, 2 ,true}, 310f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q8Pseudo, ARM::VST2q8, false, false, false, SingleSpc, 4, 8 ,true}, 311f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q8Pseudo_UPD, ARM::VST2q8_UPD, false, true, true, SingleSpc, 4, 8 ,true}, 312f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 313f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd16Pseudo, ARM::VST3LNd16, false, false, false, SingleSpc, 3, 4 ,true}, 314f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd16Pseudo_UPD, ARM::VST3LNd16_UPD, false, true, true, SingleSpc, 3, 4 ,true}, 315f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd32Pseudo, ARM::VST3LNd32, false, false, false, SingleSpc, 3, 2 ,true}, 316f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd32Pseudo_UPD, ARM::VST3LNd32_UPD, false, true, true, SingleSpc, 3, 2 ,true}, 317f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd8Pseudo, ARM::VST3LNd8, false, false, false, SingleSpc, 3, 8 ,true}, 318f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd8Pseudo_UPD, ARM::VST3LNd8_UPD, false, true, true, SingleSpc, 3, 8 ,true}, 319f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNq16Pseudo, ARM::VST3LNq16, false, false, false, EvenDblSpc, 3, 4,true}, 320f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNq16Pseudo_UPD, ARM::VST3LNq16_UPD, false, true, true, EvenDblSpc, 3, 4,true}, 321f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNq32Pseudo, ARM::VST3LNq32, false, false, false, EvenDblSpc, 3, 2,true}, 322f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNq32Pseudo_UPD, ARM::VST3LNq32_UPD, false, true, true, EvenDblSpc, 3, 2,true}, 323f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 324f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d16Pseudo, ARM::VST3d16, false, false, false, SingleSpc, 3, 4 ,true}, 325f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d16Pseudo_UPD, ARM::VST3d16_UPD, false, true, true, SingleSpc, 3, 4 ,true}, 326f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d32Pseudo, ARM::VST3d32, false, false, false, SingleSpc, 3, 2 ,true}, 327f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d32Pseudo_UPD, ARM::VST3d32_UPD, false, true, true, SingleSpc, 3, 2 ,true}, 328f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d8Pseudo, ARM::VST3d8, false, false, false, SingleSpc, 3, 8 ,true}, 329f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d8Pseudo_UPD, ARM::VST3d8_UPD, false, true, true, SingleSpc, 3, 8 ,true}, 330f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 331f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q16Pseudo_UPD, ARM::VST3q16_UPD, false, true, true, EvenDblSpc, 3, 4 ,true}, 332f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q16oddPseudo, ARM::VST3q16, false, false, false, OddDblSpc, 3, 4 ,true}, 333f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q16oddPseudo_UPD, ARM::VST3q16_UPD, false, true, true, OddDblSpc, 3, 4 ,true}, 334f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q32Pseudo_UPD, ARM::VST3q32_UPD, false, true, true, EvenDblSpc, 3, 2 ,true}, 335f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q32oddPseudo, ARM::VST3q32, false, false, false, OddDblSpc, 3, 2 ,true}, 336f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q32oddPseudo_UPD, ARM::VST3q32_UPD, false, true, true, OddDblSpc, 3, 2 ,true}, 337f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q8Pseudo_UPD, ARM::VST3q8_UPD, false, true, true, EvenDblSpc, 3, 8 ,true}, 338f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q8oddPseudo, ARM::VST3q8, false, false, false, OddDblSpc, 3, 8 ,true}, 339f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q8oddPseudo_UPD, ARM::VST3q8_UPD, false, true, true, OddDblSpc, 3, 8 ,true}, 340f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 341f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd16Pseudo, ARM::VST4LNd16, false, false, false, SingleSpc, 4, 4 ,true}, 342f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd16Pseudo_UPD, ARM::VST4LNd16_UPD, false, true, true, SingleSpc, 4, 4 ,true}, 343f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd32Pseudo, ARM::VST4LNd32, false, false, false, SingleSpc, 4, 2 ,true}, 344f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd32Pseudo_UPD, ARM::VST4LNd32_UPD, false, true, true, SingleSpc, 4, 2 ,true}, 345f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd8Pseudo, ARM::VST4LNd8, false, false, false, SingleSpc, 4, 8 ,true}, 346f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd8Pseudo_UPD, ARM::VST4LNd8_UPD, false, true, true, SingleSpc, 4, 8 ,true}, 347f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNq16Pseudo, ARM::VST4LNq16, false, false, false, EvenDblSpc, 4, 4,true}, 348f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNq16Pseudo_UPD, ARM::VST4LNq16_UPD, false, true, true, EvenDblSpc, 4, 4,true}, 349f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNq32Pseudo, ARM::VST4LNq32, false, false, false, EvenDblSpc, 4, 2,true}, 350f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNq32Pseudo_UPD, ARM::VST4LNq32_UPD, false, true, true, EvenDblSpc, 4, 2,true}, 351f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 352f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d16Pseudo, ARM::VST4d16, false, false, false, SingleSpc, 4, 4 ,true}, 353f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d16Pseudo_UPD, ARM::VST4d16_UPD, false, true, true, SingleSpc, 4, 4 ,true}, 354f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d32Pseudo, ARM::VST4d32, false, false, false, SingleSpc, 4, 2 ,true}, 355f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d32Pseudo_UPD, ARM::VST4d32_UPD, false, true, true, SingleSpc, 4, 2 ,true}, 356f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d8Pseudo, ARM::VST4d8, false, false, false, SingleSpc, 4, 8 ,true}, 357f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d8Pseudo_UPD, ARM::VST4d8_UPD, false, true, true, SingleSpc, 4, 8 ,true}, 358f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 359f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q16Pseudo_UPD, ARM::VST4q16_UPD, false, true, true, EvenDblSpc, 4, 4 ,true}, 360f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q16oddPseudo, ARM::VST4q16, false, false, false, OddDblSpc, 4, 4 ,true}, 361f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q16oddPseudo_UPD, ARM::VST4q16_UPD, false, true, true, OddDblSpc, 4, 4 ,true}, 362f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q32Pseudo_UPD, ARM::VST4q32_UPD, false, true, true, EvenDblSpc, 4, 2 ,true}, 363f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q32oddPseudo, ARM::VST4q32, false, false, false, OddDblSpc, 4, 2 ,true}, 364f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q32oddPseudo_UPD, ARM::VST4q32_UPD, false, true, true, OddDblSpc, 4, 2 ,true}, 365f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q8Pseudo_UPD, ARM::VST4q8_UPD, false, true, true, EvenDblSpc, 4, 8 ,true}, 366f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q8oddPseudo, ARM::VST4q8, false, false, false, OddDblSpc, 4, 8 ,true}, 367f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q8oddPseudo_UPD, ARM::VST4q8_UPD, false, true, true, OddDblSpc, 4, 8 ,true} 3688466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson}; 3698466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3708466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// LookupNEONLdSt - Search the NEONLdStTable for information about a NEON 3718466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// load or store pseudo instruction. 3728466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonstatic const NEONLdStTableEntry *LookupNEONLdSt(unsigned Opcode) { 3738466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumEntries = array_lengthof(NEONLdStTable); 3748466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3758466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson#ifndef NDEBUG 3768466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Make sure the table is sorted. 3778466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson static bool TableChecked = false; 3788466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (!TableChecked) { 3798466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson for (unsigned i = 0; i != NumEntries-1; ++i) 3808466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(NEONLdStTable[i] < NEONLdStTable[i+1] && 3818466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson "NEONLdStTable is not sorted!"); 3828466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TableChecked = true; 3838466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 3848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson#endif 3858466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3868466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *I = 3878466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson std::lower_bound(NEONLdStTable, NEONLdStTable + NumEntries, Opcode); 3888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (I != NEONLdStTable + NumEntries && I->PseudoOpc == Opcode) 3898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return I; 3908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return NULL; 3918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 3928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// GetDSubRegs - Get 4 D subregisters of a Q, QQ, or QQQQ register, 3948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// corresponding to the specified register spacing. Not all of the results 3958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// are necessarily valid, e.g., a Q register only has 2 D subregisters. 3968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonstatic void GetDSubRegs(unsigned Reg, NEONRegSpacing RegSpc, 3978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const TargetRegisterInfo *TRI, unsigned &D0, 3988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned &D1, unsigned &D2, unsigned &D3) { 3998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (RegSpc == SingleSpc) { 4008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D0 = TRI->getSubReg(Reg, ARM::dsub_0); 4018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D1 = TRI->getSubReg(Reg, ARM::dsub_1); 4028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D2 = TRI->getSubReg(Reg, ARM::dsub_2); 4038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D3 = TRI->getSubReg(Reg, ARM::dsub_3); 4048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } else if (RegSpc == EvenDblSpc) { 4058466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D0 = TRI->getSubReg(Reg, ARM::dsub_0); 4068466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D1 = TRI->getSubReg(Reg, ARM::dsub_2); 4078466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D2 = TRI->getSubReg(Reg, ARM::dsub_4); 4088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D3 = TRI->getSubReg(Reg, ARM::dsub_6); 4098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } else { 4108466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(RegSpc == OddDblSpc && "unknown register spacing"); 4118466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D0 = TRI->getSubReg(Reg, ARM::dsub_1); 4128466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D1 = TRI->getSubReg(Reg, ARM::dsub_3); 4138466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D2 = TRI->getSubReg(Reg, ARM::dsub_5); 4148466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D3 = TRI->getSubReg(Reg, ARM::dsub_7); 415bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson } 4168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 4178466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 41882a9c8480ecd41a1351274569f8d4e4de2723cf6Bob Wilson/// ExpandVLD - Translate VLD pseudo instructions with Q, QQ or QQQQ register 41982a9c8480ecd41a1351274569f8d4e4de2723cf6Bob Wilson/// operands to real VLD instructions with D register operands. 4208466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonvoid ARMExpandPseudo::ExpandVLD(MachineBasicBlock::iterator &MBBI) { 421ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson MachineInstr &MI = *MBBI; 422ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 423ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 4248466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); 4258466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); 4268466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpc = TableEntry->RegSpacing; 4278466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumRegs = TableEntry->NumRegs; 4288466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 4298466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 4308466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TII->get(TableEntry->RealOpc)); 431ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson unsigned OpIdx = 0; 432ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 433ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson bool DstIsDead = MI.getOperand(OpIdx).isDead(); 434ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson unsigned DstReg = MI.getOperand(OpIdx++).getReg(); 435ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson unsigned D0, D1, D2, D3; 4368466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3); 437280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); 438280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach if (NumRegs > 1 && TableEntry->copyAllListRegs) 439280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); 440280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach if (NumRegs > 2 && TableEntry->copyAllListRegs) 441f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); 442280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach if (NumRegs > 3 && TableEntry->copyAllListRegs) 443f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); 444ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 445f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->isUpdating) 44663569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 44763569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson 448ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson // Copy the addrmode6 operands. 44963569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 45063569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 45163569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson // Copy the am6offset operand. 452f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->hasWritebackOperand) 45363569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 454ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 45519d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson // For an instruction writing double-spaced subregs, the pseudo instruction 456823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // has an extra operand that is a use of the super-register. Record the 457823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // operand index and skip over it. 458823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson unsigned SrcOpIdx = 0; 459823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson if (RegSpc == EvenDblSpc || RegSpc == OddDblSpc) 460823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson SrcOpIdx = OpIdx++; 461823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 462823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 463823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 464823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 465823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 466823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the super-register source operand used for double-spaced subregs over 46719d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson // to the new instruction as an implicit operand. 468823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson if (SrcOpIdx != 0) { 469823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MachineOperand MO = MI.getOperand(SrcOpIdx); 47019d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson MO.setImplicit(true); 47119d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson MIB.addOperand(MO); 47219d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson } 473f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson // Add an implicit def for the super-register. 474f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); 47519d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson TransferImpOps(MI, MIB, MIB); 476b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 477b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng // Transfer memoperands. 478d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 479b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 480ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson MI.eraseFromParent(); 481ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson} 482ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 48301ba461af7eafc9d181a5c349487691f2e801438Bob Wilson/// ExpandVST - Translate VST pseudo instructions with Q, QQ or QQQQ register 48401ba461af7eafc9d181a5c349487691f2e801438Bob Wilson/// operands to real VST instructions with D register operands. 4858466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonvoid ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) { 486709d59255a3100c7d440c93069efa1f726677a27Bob Wilson MachineInstr &MI = *MBBI; 487709d59255a3100c7d440c93069efa1f726677a27Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 488709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 4898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); 4908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); 4918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpc = TableEntry->RegSpacing; 4928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumRegs = TableEntry->NumRegs; 4938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 4948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 4958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TII->get(TableEntry->RealOpc)); 496709d59255a3100c7d440c93069efa1f726677a27Bob Wilson unsigned OpIdx = 0; 497f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->isUpdating) 49863569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 49963569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson 500709d59255a3100c7d440c93069efa1f726677a27Bob Wilson // Copy the addrmode6 operands. 50163569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 50263569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 50363569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson // Copy the am6offset operand. 504f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->hasWritebackOperand) 50563569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 506709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 507709d59255a3100c7d440c93069efa1f726677a27Bob Wilson bool SrcIsKill = MI.getOperand(OpIdx).isKill(); 508823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); 509709d59255a3100c7d440c93069efa1f726677a27Bob Wilson unsigned D0, D1, D2, D3; 5108466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3); 5114334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach MIB.addReg(D0); 5124334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach if (NumRegs > 1 && TableEntry->copyAllListRegs) 5134334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach MIB.addReg(D1); 5144334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach if (NumRegs > 2 && TableEntry->copyAllListRegs) 5157e701979ad20796bc930b21de3888ccfa0d8b33dBob Wilson MIB.addReg(D2); 5164334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach if (NumRegs > 3 && TableEntry->copyAllListRegs) 5177e701979ad20796bc930b21de3888ccfa0d8b33dBob Wilson MIB.addReg(D3); 518823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 519823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 520823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 521823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 522823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 523d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner if (SrcIsKill) // Add an implicit kill for the super-reg. 524d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->addRegisterKilled(SrcReg, TRI, true); 525bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson TransferImpOps(MI, MIB, MIB); 526b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 527b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng // Transfer memoperands. 528d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 529b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 530709d59255a3100c7d440c93069efa1f726677a27Bob Wilson MI.eraseFromParent(); 531709d59255a3100c7d440c93069efa1f726677a27Bob Wilson} 532709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 5338466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// ExpandLaneOp - Translate VLD*LN and VST*LN instructions with Q, QQ or QQQQ 5348466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// register operands to real instructions with D register operands. 5358466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonvoid ARMExpandPseudo::ExpandLaneOp(MachineBasicBlock::iterator &MBBI) { 5368466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstr &MI = *MBBI; 5378466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 5388466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5398466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); 5408466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(TableEntry && "NEONLdStTable lookup failed"); 5418466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpc = TableEntry->RegSpacing; 5428466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumRegs = TableEntry->NumRegs; 5438466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned RegElts = TableEntry->RegElts; 5448466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5458466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 5468466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TII->get(TableEntry->RealOpc)); 5478466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned OpIdx = 0; 5488466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // The lane operand is always the 3rd from last operand, before the 2 5498466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // predicate operands. 5508466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned Lane = MI.getOperand(MI.getDesc().getNumOperands() - 3).getImm(); 5518466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5528466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Adjust the lane and spacing as needed for Q registers. 5538466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(RegSpc != OddDblSpc && "unexpected register spacing for VLD/VST-lane"); 5548466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (RegSpc == EvenDblSpc && Lane >= RegElts) { 5558466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson RegSpc = OddDblSpc; 5568466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson Lane -= RegElts; 5578466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 5588466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(Lane < RegElts && "out of range lane for VLD/VST-lane"); 5598466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 560584520e8e2c1f8cc04bc8dd4dc4ea6c390627317Ted Kremenek unsigned D0 = 0, D1 = 0, D2 = 0, D3 = 0; 561fe3ac088ee0a536f60b3c30ad97703d5d6cd2167Bob Wilson unsigned DstReg = 0; 562fe3ac088ee0a536f60b3c30ad97703d5d6cd2167Bob Wilson bool DstIsDead = false; 5638466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->IsLoad) { 5648466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson DstIsDead = MI.getOperand(OpIdx).isDead(); 5658466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson DstReg = MI.getOperand(OpIdx++).getReg(); 5668466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3); 567b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); 568b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson if (NumRegs > 1) 569b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); 5708466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 2) 5718466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); 5728466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 3) 5738466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); 5748466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 5758466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 576f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->isUpdating) 5778466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5788466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5798466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Copy the addrmode6 operands. 5808466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5818466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5828466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Copy the am6offset operand. 583f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->hasWritebackOperand) 5848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5858466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5868466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Grab the super-register source. 5878466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineOperand MO = MI.getOperand(OpIdx++); 5888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (!TableEntry->IsLoad) 5898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(MO.getReg(), RegSpc, TRI, D0, D1, D2, D3); 5908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Add the subregs as sources of the new instruction. 5928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned SrcFlags = (getUndefRegState(MO.isUndef()) | 5938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson getKillRegState(MO.isKill())); 594b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D0, SrcFlags); 595b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson if (NumRegs > 1) 596b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D1, SrcFlags); 5978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 2) 5988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D2, SrcFlags); 5998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 3) 6008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D3, SrcFlags); 6018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 6028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Add the lane number operand. 6038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addImm(Lane); 604823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson OpIdx += 1; 605823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 606823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 607823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 608823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 6098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 6108466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Copy the super-register source to be an implicit source. 6118466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MO.setImplicit(true); 6128466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MO); 6138466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->IsLoad) 6148466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Add an implicit def for the super-register. 6158466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); 6168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TransferImpOps(MI, MIB, MIB); 6178466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MI.eraseFromParent(); 6188466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 6198466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 620bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson/// ExpandVTBL - Translate VTBL and VTBX pseudo instructions with Q or QQ 621bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson/// register operands to real instructions with D register operands. 622bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilsonvoid ARMExpandPseudo::ExpandVTBL(MachineBasicBlock::iterator &MBBI, 623bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned Opc, bool IsExt, unsigned NumRegs) { 624bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MachineInstr &MI = *MBBI; 625bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 626bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 627bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); 628bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned OpIdx = 0; 629bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 630bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson // Transfer the destination register operand. 631bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 632bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson if (IsExt) 633bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 634bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 635bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson bool SrcIsKill = MI.getOperand(OpIdx).isKill(); 636bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); 637bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned D0, D1, D2, D3; 638bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson GetDSubRegs(SrcReg, SingleSpc, TRI, D0, D1, D2, D3); 639bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addReg(D0).addReg(D1); 640bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson if (NumRegs > 2) 641bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addReg(D2); 642bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson if (NumRegs > 3) 643bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addReg(D3); 644bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 645bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson // Copy the other source register operand. 646823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 647823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 648823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 649823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 650823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 651bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 652d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner if (SrcIsKill) // Add an implicit kill for the super-reg. 653d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->addRegisterKilled(SrcReg, TRI, true); 654bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson TransferImpOps(MI, MIB, MIB); 655bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MI.eraseFromParent(); 656bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson} 657bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 6589fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Chengvoid ARMExpandPseudo::ExpandMOV32BitImm(MachineBasicBlock &MBB, 6599fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator &MBBI) { 6609fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstr &MI = *MBBI; 6619fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Opcode = MI.getOpcode(); 6629fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned PredReg = 0; 6639fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng ARMCC::CondCodes Pred = llvm::getInstrPredicate(&MI, PredReg); 6649fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned DstReg = MI.getOperand(0).getReg(); 6659fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool DstIsDead = MI.getOperand(0).isDead(); 6669fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool isCC = Opcode == ARM::MOVCCi32imm || Opcode == ARM::t2MOVCCi32imm; 6679fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const MachineOperand &MO = MI.getOperand(isCC ? 2 : 1); 6689fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstrBuilder LO16, HI16; 6699fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 6709fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (!STI->hasV6T2Ops() && 6719fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng (Opcode == ARM::MOVi32imm || Opcode == ARM::MOVCCi32imm)) { 6729fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng // Expand into a movi + orr. 6739fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg); 6749fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::ORRri)) 6759fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 6769fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg); 6779fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 6789fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng assert (MO.isImm() && "MOVi32imm w/ non-immediate source operand!"); 6799fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned ImmVal = (unsigned)MO.getImm(); 6809fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned SOImmValV1 = ARM_AM::getSOImmTwoPartFirst(ImmVal); 6819fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned SOImmValV2 = ARM_AM::getSOImmTwoPartSecond(ImmVal); 6829fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = LO16.addImm(SOImmValV1); 6839fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = HI16.addImm(SOImmValV2); 684d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 685d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 6869fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16.addImm(Pred).addReg(PredReg).addReg(0); 6879fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16.addImm(Pred).addReg(PredReg).addReg(0); 6889fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TransferImpOps(MI, LO16, HI16); 6899fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MI.eraseFromParent(); 6909fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return; 6919fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 692b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 6939fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned LO16Opc = 0; 6949fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned HI16Opc = 0; 6959fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (Opcode == ARM::t2MOVi32imm || Opcode == ARM::t2MOVCCi32imm) { 6969fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16Opc = ARM::t2MOVi16; 6979fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16Opc = ARM::t2MOVTi16; 6989fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } else { 6999fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16Opc = ARM::MOVi16; 7009fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16Opc = ARM::MOVTi16; 7019fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 702b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 7039fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LO16Opc), DstReg); 7049fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc)) 7059fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 7069fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg); 7079fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 7089fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (MO.isImm()) { 7099fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Imm = MO.getImm(); 7109fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Lo16 = Imm & 0xffff; 7119fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Hi16 = (Imm >> 16) & 0xffff; 7129fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = LO16.addImm(Lo16); 7139fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = HI16.addImm(Hi16); 7149fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } else { 7159fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const GlobalValue *GV = MO.getGlobal(); 7169fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned TF = MO.getTargetFlags(); 7179fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = LO16.addGlobalAddress(GV, MO.getOffset(), TF | ARMII::MO_LO16); 7189fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = HI16.addGlobalAddress(GV, MO.getOffset(), TF | ARMII::MO_HI16); 7199fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 720709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 721d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 722d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 7239fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16.addImm(Pred).addReg(PredReg); 7249fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16.addImm(Pred).addReg(PredReg); 7259fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 7269fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TransferImpOps(MI, LO16, HI16); 7279fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MI.eraseFromParent(); 7289fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng} 7299fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 7309fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Chengbool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB, 7319fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator MBBI) { 7329fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstr &MI = *MBBI; 7339fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Opcode = MI.getOpcode(); 7349fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng switch (Opcode) { 7359fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng default: 7369fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return false; 737f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach case ARM::VMOVScc: 738f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach case ARM::VMOVDcc: { 739f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach unsigned newOpc = Opcode == ARM::VMOVScc ? ARM::VMOVS : ARM::VMOVD; 740f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(newOpc), 741f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach MI.getOperand(1).getReg()) 742f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach .addReg(MI.getOperand(2).getReg(), 743f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach getKillRegState(MI.getOperand(2).isKill())) 744f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 745f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach .addReg(MI.getOperand(4).getReg()); 746f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach 747f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach MI.eraseFromParent(); 748f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach return true; 749f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach } 750efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach case ARM::t2MOVCCr: 751d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach case ARM::MOVCCr: { 752efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach unsigned Opc = AFI->isThumbFunction() ? ARM::t2MOVr : ARM::MOVr; 753efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc), 754d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach MI.getOperand(1).getReg()) 755d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(2).getReg(), 756d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach getKillRegState(MI.getOperand(2).isKill())) 757d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 758d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(4).getReg()) 759d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(0); // 's' bit 760d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach 761d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach MI.eraseFromParent(); 762d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach return true; 763d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach } 764152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson case ARM::MOVCCsi: { 765152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi), 766152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson (MI.getOperand(1).getReg())) 767152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addReg(MI.getOperand(2).getReg(), 768152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson getKillRegState(MI.getOperand(2).isKill())) 769152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addImm(MI.getOperand(3).getImm()) 770152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addImm(MI.getOperand(4).getImm()) // 'pred' 771152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addReg(MI.getOperand(5).getReg()) 772152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addReg(0); // 's' bit 773152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson 774152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson MI.eraseFromParent(); 775152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson return true; 776152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson } 777152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson 77892a202213bb4c20301abf6ab64e46df3695e60bfOwen Anderson case ARM::MOVCCsr: { 779152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsr), 780d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach (MI.getOperand(1).getReg())) 781d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(2).getReg(), 782d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach getKillRegState(MI.getOperand(2).isKill())) 783d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(3).getReg(), 784d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach getKillRegState(MI.getOperand(3).isKill())) 785d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addImm(MI.getOperand(4).getImm()) 786d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addImm(MI.getOperand(5).getImm()) // 'pred' 787d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(6).getReg()) 788d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(0); // 's' bit 7893906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach 7903906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.eraseFromParent(); 7913906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach return true; 7923906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach } 7933906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach case ARM::MOVCCi16: { 7943906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi16), 7953906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.getOperand(1).getReg()) 7963906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(2).getImm()) 7973906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 7983906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addReg(MI.getOperand(4).getReg()); 7993906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach 8003906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.eraseFromParent(); 8013906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach return true; 8023906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach } 803efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach case ARM::t2MOVCCi: 8043906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach case ARM::MOVCCi: { 805efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach unsigned Opc = AFI->isThumbFunction() ? ARM::t2MOVi : ARM::MOVi; 806efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc), 8073906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.getOperand(1).getReg()) 8083906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(2).getImm()) 8093906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 8103906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addReg(MI.getOperand(4).getReg()) 8113906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addReg(0); // 's' bit 812e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach 813e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach MI.eraseFromParent(); 814e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach return true; 815e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach } 816e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach case ARM::MVNCCi: { 817e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MVNi), 818e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach MI.getOperand(1).getReg()) 819e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addImm(MI.getOperand(2).getImm()) 820e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 821e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addReg(MI.getOperand(4).getReg()) 822e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addReg(0); // 's' bit 823d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach 824d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach MI.eraseFromParent(); 825d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach return true; 826d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach } 827e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach case ARM::Int_eh_sjlj_dispatchsetup: { 828e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach MachineFunction &MF = *MI.getParent()->getParent(); 829e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach const ARMBaseInstrInfo *AII = 830e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach static_cast<const ARMBaseInstrInfo*>(TII); 831e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach const ARMBaseRegisterInfo &RI = AII->getRegisterInfo(); 832e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach // For functions using a base pointer, we rematerialize it (via the frame 833e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach // pointer) here since eh.sjlj.setjmp and eh.sjlj.longjmp don't do it 834e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach // for us. Otherwise, expand to nothing. 835e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach if (RI.hasBasePointer(MF)) { 836e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach int32_t NumBytes = AFI->getFramePtrSpillOffset(); 837e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach unsigned FramePtr = RI.getFrameRegister(MF); 83816c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov assert(MF.getTarget().getFrameLowering()->hasFP(MF) && 8397920d96964d707a3af85332c98d95b2fabc3d5c9Benjamin Kramer "base pointer without frame pointer?"); 840e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach 841e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach if (AFI->isThumb2Function()) { 842e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach llvm::emitT2RegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, 843e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach FramePtr, -NumBytes, ARMCC::AL, 0, *TII); 844e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } else if (AFI->isThumbFunction()) { 84557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov llvm::emitThumbRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, 84657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov FramePtr, -NumBytes, *TII, RI); 847e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } else { 848e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach llvm::emitARMRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, 849e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach FramePtr, -NumBytes, ARMCC::AL, 0, 850e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach *TII); 851e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } 8528b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach // If there's dynamic realignment, adjust for it. 853b8e67fc92b0a508e3782b782baa98a6d56d5d7eaJim Grosbach if (RI.needsStackRealignment(MF)) { 8548b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach MachineFrameInfo *MFI = MF.getFrameInfo(); 8558b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach unsigned MaxAlign = MFI->getMaxAlignment(); 8568b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach assert (!AFI->isThumb1OnlyFunction()); 8578b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach // Emit bic r6, r6, MaxAlign 8588b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach unsigned bicOpc = AFI->isThumbFunction() ? 8598b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach ARM::t2BICri : ARM::BICri; 8608b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), 8618b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach TII->get(bicOpc), ARM::R6) 8628b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach .addReg(ARM::R6, RegState::Kill) 8638b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach .addImm(MaxAlign-1))); 8648b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach } 865e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach 866e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } 867e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach MI.eraseFromParent(); 8689fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 869e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } 870e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach 8717032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach case ARM::MOVsrl_flag: 8727032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach case ARM::MOVsra_flag: { 8737032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach // These are just fancy MOVs insructions. 874152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi), 875dbbd99faf1d661f03a9dfc1551d7537c34d64beeDuncan Sands MI.getOperand(0).getReg()) 8769fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addOperand(MI.getOperand(1)) 877aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? 878aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach ARM_AM::lsr : ARM_AM::asr), 879aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach 1))) 8809fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(ARM::CPSR, RegState::Define); 8817032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MI.eraseFromParent(); 8829fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 8837032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach } 8847032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach case ARM::RRX: { 8857032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach // This encodes as "MOVs Rd, Rm, rrx 8867032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MachineInstrBuilder MIB = 8878e0c7697fd9b9354856074efc06eea9f6d80015cJim Grosbach AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),TII->get(ARM::MOVsi), 8887032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MI.getOperand(0).getReg()) 8899fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addOperand(MI.getOperand(1)) 8909fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addImm(ARM_AM::getSORegOpc(ARM_AM::rrx, 0))) 8917032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach .addReg(0); 8927032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach TransferImpOps(MI, MIB, MIB); 8937032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MI.eraseFromParent(); 8949fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 8957032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach } 896ff97eb0cf4394090570feaa327d1237ba4b935e2Jim Grosbach case ARM::tTPsoft: 897a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim case ARM::TPsoft: { 898971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson MachineInstrBuilder MIB = 899a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim BuildMI(MBB, MBBI, MI.getDebugLoc(), 900ff97eb0cf4394090570feaa327d1237ba4b935e2Jim Grosbach TII->get(Opcode == ARM::tTPsoft ? ARM::tBL : ARM::BL)) 901a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim .addExternalSymbol("__aeabi_read_tp", 0); 902a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim 903d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 904a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim TransferImpOps(MI, MIB, MIB); 905a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim MI.eraseFromParent(); 9069fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 9072fe813af23e682b418ecd477144fe070be325419Bill Wendling } 908bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson case ARM::tLDRpci_pic: 909b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng case ARM::t2LDRpci_pic: { 910b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng unsigned NewLdOpc = (Opcode == ARM::tLDRpci_pic) 911971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson ? ARM::tLDRpci : ARM::t2LDRpci; 912b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng unsigned DstReg = MI.getOperand(0).getReg(); 913431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng bool DstIsDead = MI.getOperand(0).isDead(); 914431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder MIB1 = 915971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), 916971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson TII->get(NewLdOpc), DstReg) 917971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson .addOperand(MI.getOperand(1))); 918d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB1->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 919431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 920431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng TII->get(ARM::tPICADD)) 92101b35c25deee3d4cab339e620c12c721e627d609Bob Wilson .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 922431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng .addReg(DstReg) 923431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng .addOperand(MI.getOperand(2)); 924431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng TransferImpOps(MI, MIB1, MIB2); 925b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng MI.eraseFromParent(); 9269fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 927b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng } 928431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng 92953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOV_ga_dyn: 93053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOV_ga_pcrel: 93153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOV_ga_pcrel_ldr: 93253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOV_ga_dyn: 93353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOV_ga_pcrel: { 93453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng // Expand into movw + movw. Also "add pc" / ldr [pc] in PIC mode. 9359fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned LabelId = AFI->createPICLabelUId(); 936b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng unsigned DstReg = MI.getOperand(0).getReg(); 937431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng bool DstIsDead = MI.getOperand(0).isDead(); 9389fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const MachineOperand &MO1 = MI.getOperand(1); 9399fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const GlobalValue *GV = MO1.getGlobal(); 9409fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned TF = MO1.getTargetFlags(); 941aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach bool isARM = (Opcode != ARM::t2MOV_ga_pcrel && Opcode!=ARM::t2MOV_ga_dyn); 94253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng bool isPIC = (Opcode != ARM::MOV_ga_dyn && Opcode != ARM::t2MOV_ga_dyn); 94353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned LO16Opc = isARM ? ARM::MOVi16_ga_pcrel : ARM::t2MOVi16_ga_pcrel; 944aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach unsigned HI16Opc = isARM ? ARM::MOVTi16_ga_pcrel :ARM::t2MOVTi16_ga_pcrel; 94553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned LO16TF = isPIC 94653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? ARMII::MO_LO16_NONLAZY_PIC : ARMII::MO_LO16_NONLAZY; 94753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned HI16TF = isPIC 94853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? ARMII::MO_HI16_NONLAZY_PIC : ARMII::MO_HI16_NONLAZY; 9499fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned PICAddOpc = isARM 95053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? (Opcode == ARM::MOV_ga_pcrel_ldr ? ARM::PICLDR : ARM::PICADD) 9519fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng : ARM::tPICADD; 9529fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstrBuilder MIB1 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 9539fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TII->get(LO16Opc), DstReg) 95453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng .addGlobalAddress(GV, MO1.getOffset(), TF | LO16TF) 9559fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addImm(LabelId); 95653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 95753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TII->get(HI16Opc), DstReg) 9589fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg) 95953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng .addGlobalAddress(GV, MO1.getOffset(), TF | HI16TF) 9609fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addImm(LabelId); 96153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (!isPIC) { 96253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TransferImpOps(MI, MIB1, MIB2); 96353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MI.eraseFromParent(); 96453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng return true; 96553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } 96653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng 96753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MachineInstrBuilder MIB3 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 9689fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TII->get(PICAddOpc)) 96901b35c25deee3d4cab339e620c12c721e627d609Bob Wilson .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 9709fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg).addImm(LabelId); 9719fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (isARM) { 97253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng AddDefaultPred(MIB3); 97353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (Opcode == ARM::MOV_ga_pcrel_ldr) 974d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB2->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 9755de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng } 97653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TransferImpOps(MI, MIB1, MIB3); 977b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng MI.eraseFromParent(); 9789fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 979d929f7773812535271ae6969331f8164c1f7f3b2Evan Cheng } 980d929f7773812535271ae6969331f8164c1f7f3b2Evan Cheng 9819fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::MOVi32imm: 9829fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::MOVCCi32imm: 9839fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::t2MOVi32imm: 9849fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::t2MOVCCi32imm: 9859fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng ExpandMOV32BitImm(MBB, MBBI); 9869fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 9879fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 988848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson case ARM::VLDMQIA: { 989848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson unsigned NewOpc = ARM::VLDMDIA; 9909d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MachineInstrBuilder MIB = 99173fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); 9929d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned OpIdx = 0; 99373fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 9949d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Grab the Q register destination. 9959d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson bool DstIsDead = MI.getOperand(OpIdx).isDead(); 9969d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned DstReg = MI.getOperand(OpIdx++).getReg(); 99773fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 99873fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling // Copy the source register. 9999d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 100073fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10019d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Copy the predicate operands. 10029d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 10039d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 100473fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10059d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Add the destination operands (D subregs). 10069d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D0 = TRI->getSubReg(DstReg, ARM::dsub_0); 10079d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D1 = TRI->getSubReg(DstReg, ARM::dsub_1); 10089d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)) 10099d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson .addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); 101073fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10119d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Add an implicit def for the super-register. 10129d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); 10139d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson TransferImpOps(MI, MIB, MIB); 10149d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MI.eraseFromParent(); 10159fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 10169d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson } 10179d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson 1018848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson case ARM::VSTMQIA: { 1019848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson unsigned NewOpc = ARM::VSTMDIA; 10209d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MachineInstrBuilder MIB = 102173fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); 10229d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned OpIdx = 0; 102373fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10249d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Grab the Q register source. 10259d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson bool SrcIsKill = MI.getOperand(OpIdx).isKill(); 10269d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); 102773fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 102873fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling // Copy the destination register. 10299d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 103073fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10319d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Copy the predicate operands. 10329d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 10339d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 103473fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10359d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Add the source operands (D subregs). 10369d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D0 = TRI->getSubReg(SrcReg, ARM::dsub_0); 10379d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D1 = TRI->getSubReg(SrcReg, ARM::dsub_1); 10389d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addReg(D0).addReg(D1); 103973fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 1040d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner if (SrcIsKill) // Add an implicit kill for the Q register. 1041d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->addRegisterKilled(SrcReg, TRI, true); 104273fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10439d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson TransferImpOps(MI, MIB, MIB); 10449d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MI.eraseFromParent(); 10459fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 10469d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson } 104765dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach case ARM::VDUPfqf: 104865dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach case ARM::VDUPfdf:{ 10498b8515c225c799e9df69bde8ffffa3c72cec9445Jim Grosbach unsigned NewOpc = Opcode == ARM::VDUPfqf ? ARM::VDUPLN32q : 10508b8515c225c799e9df69bde8ffffa3c72cec9445Jim Grosbach ARM::VDUPLN32d; 105165dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MachineInstrBuilder MIB = 105265dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); 105365dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned OpIdx = 0; 105465dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned SrcReg = MI.getOperand(1).getReg(); 105565dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned Lane = getARMRegisterNumbering(SrcReg) & 1; 105665dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned DReg = TRI->getMatchingSuperReg(SrcReg, 1057b181ad34869c4fa19c527ab8dfd5d438ad8b9bb3Jim Grosbach Lane & 1 ? ARM::ssub_1 : ARM::ssub_0, 1058b181ad34869c4fa19c527ab8dfd5d438ad8b9bb3Jim Grosbach &ARM::DPR_VFP2RegClass); 105965dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // The lane is [0,1] for the containing DReg superregister. 106065dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // Copy the dst/src register operands. 106165dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addOperand(MI.getOperand(OpIdx++)); 106265dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addReg(DReg); 106365dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach ++OpIdx; 106465dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // Add the lane select operand. 106565dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addImm(Lane); 106665dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // Add the predicate operands. 106765dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addOperand(MI.getOperand(OpIdx++)); 106865dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addOperand(MI.getOperand(OpIdx++)); 106965dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach 107065dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach TransferImpOps(MI, MIB, MIB); 107165dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MI.eraseFromParent(); 10729fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 107365dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach } 10749d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson 1075ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q8Pseudo: 1076ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q16Pseudo: 1077ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q32Pseudo: 1078ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q64Pseudo: 107910b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q8PseudoWB_register: 108010b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q16PseudoWB_register: 108110b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q32PseudoWB_register: 108210b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q64PseudoWB_register: 108310b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q8PseudoWB_fixed: 108410b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q16PseudoWB_fixed: 108510b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q32PseudoWB_fixed: 108610b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q64PseudoWB_fixed: 1087ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d8Pseudo: 1088ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d16Pseudo: 1089ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d32Pseudo: 1090ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q8Pseudo: 1091ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q16Pseudo: 1092ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q32Pseudo: 1093ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d8Pseudo_UPD: 1094ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d16Pseudo_UPD: 1095ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d32Pseudo_UPD: 1096ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q8Pseudo_UPD: 1097ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q16Pseudo_UPD: 1098ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q32Pseudo_UPD: 1099f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d8Pseudo: 1100f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d16Pseudo: 1101f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d32Pseudo: 1102ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1d64TPseudo: 1103f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d8Pseudo_UPD: 1104f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d16Pseudo_UPD: 1105f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d32Pseudo_UPD: 1106f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q8Pseudo_UPD: 1107f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q16Pseudo_UPD: 1108f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q32Pseudo_UPD: 11097de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD3q8oddPseudo: 11107de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD3q16oddPseudo: 11117de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD3q32oddPseudo: 1112f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q8oddPseudo_UPD: 1113f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q16oddPseudo_UPD: 1114f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q32oddPseudo_UPD: 1115f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d8Pseudo: 1116f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d16Pseudo: 1117f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d32Pseudo: 1118ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1d64QPseudo: 1119f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d8Pseudo_UPD: 1120f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d16Pseudo_UPD: 1121f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d32Pseudo_UPD: 1122f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q8Pseudo_UPD: 1123f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q16Pseudo_UPD: 1124f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q32Pseudo_UPD: 11257de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD4q8oddPseudo: 11267de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD4q16oddPseudo: 11277de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD4q32oddPseudo: 1128f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q8oddPseudo_UPD: 1129f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q16oddPseudo_UPD: 1130f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q32oddPseudo_UPD: 11312a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq8Pseudo: 11322a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq16Pseudo: 11332a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq32Pseudo: 11342a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq8Pseudo_UPD: 11352a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq16Pseudo_UPD: 11362a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq32Pseudo_UPD: 1137b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd8Pseudo: 1138b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd16Pseudo: 1139b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd32Pseudo: 1140b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd8Pseudo_UPD: 1141b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd16Pseudo_UPD: 1142b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd32Pseudo_UPD: 114386c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd8Pseudo: 114486c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd16Pseudo: 114586c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd32Pseudo: 114686c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd8Pseudo_UPD: 114786c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd16Pseudo_UPD: 114886c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd32Pseudo_UPD: 11496c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd8Pseudo: 11506c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd16Pseudo: 11516c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd32Pseudo: 11526c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd8Pseudo_UPD: 11536c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd16Pseudo_UPD: 11546c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd32Pseudo_UPD: 11558466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson ExpandVLD(MBBI); 11569fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 1157ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 1158e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q8Pseudo: 1159e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q16Pseudo: 1160e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q32Pseudo: 1161e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q64Pseudo: 11624334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q8PseudoWB_fixed: 11634334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q16PseudoWB_fixed: 11644334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q32PseudoWB_fixed: 11654334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q64PseudoWB_fixed: 11664334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q8PseudoWB_register: 11674334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q16PseudoWB_register: 11684334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q32PseudoWB_register: 11694334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q64PseudoWB_register: 1170e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d8Pseudo: 1171e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d16Pseudo: 1172e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d32Pseudo: 1173e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q8Pseudo: 1174e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q16Pseudo: 1175e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q32Pseudo: 1176e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d8Pseudo_UPD: 1177e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d16Pseudo_UPD: 1178e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d32Pseudo_UPD: 1179e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q8Pseudo_UPD: 1180e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q16Pseudo_UPD: 1181e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q32Pseudo_UPD: 118201ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d8Pseudo: 118301ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d16Pseudo: 118401ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d32Pseudo: 118501ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST1d64TPseudo: 118601ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d8Pseudo_UPD: 118701ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d16Pseudo_UPD: 118801ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d32Pseudo_UPD: 118901ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST1d64TPseudo_UPD: 119001ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q8Pseudo_UPD: 119101ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q16Pseudo_UPD: 119201ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q32Pseudo_UPD: 11937de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST3q8oddPseudo: 11947de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST3q16oddPseudo: 11957de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST3q32oddPseudo: 119601ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q8oddPseudo_UPD: 119701ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q16oddPseudo_UPD: 119801ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q32oddPseudo_UPD: 1199709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d8Pseudo: 1200709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d16Pseudo: 1201709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d32Pseudo: 120270e48b23a3455e4689ee24cec4eb153d67223e86Bob Wilson case ARM::VST1d64QPseudo: 1203709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d8Pseudo_UPD: 1204709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d16Pseudo_UPD: 1205709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d32Pseudo_UPD: 120670e48b23a3455e4689ee24cec4eb153d67223e86Bob Wilson case ARM::VST1d64QPseudo_UPD: 1207709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q8Pseudo_UPD: 1208709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q16Pseudo_UPD: 1209709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q32Pseudo_UPD: 12107de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST4q8oddPseudo: 12117de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST4q16oddPseudo: 12127de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST4q32oddPseudo: 1213709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q8oddPseudo_UPD: 1214709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q16oddPseudo_UPD: 1215709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q32oddPseudo_UPD: 12168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson ExpandVST(MBBI); 12179fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 12188466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1219b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq8Pseudo: 1220b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq16Pseudo: 1221b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq32Pseudo: 1222b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq8Pseudo_UPD: 1223b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq16Pseudo_UPD: 1224b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq32Pseudo_UPD: 12258466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd8Pseudo: 12268466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd16Pseudo: 12278466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd32Pseudo: 12288466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq16Pseudo: 12298466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq32Pseudo: 12308466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd8Pseudo_UPD: 12318466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd16Pseudo_UPD: 12328466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd32Pseudo_UPD: 12338466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq16Pseudo_UPD: 12348466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq32Pseudo_UPD: 12358466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd8Pseudo: 12368466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd16Pseudo: 12378466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd32Pseudo: 12388466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq16Pseudo: 12398466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq32Pseudo: 12408466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd8Pseudo_UPD: 12418466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd16Pseudo_UPD: 12428466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd32Pseudo_UPD: 12438466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq16Pseudo_UPD: 12448466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq32Pseudo_UPD: 12458466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd8Pseudo: 12468466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd16Pseudo: 12478466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd32Pseudo: 12488466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq16Pseudo: 12498466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq32Pseudo: 12508466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd8Pseudo_UPD: 12518466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd16Pseudo_UPD: 12528466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd32Pseudo_UPD: 12538466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq16Pseudo_UPD: 12548466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq32Pseudo_UPD: 1255d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq8Pseudo: 1256d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq16Pseudo: 1257d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq32Pseudo: 1258d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq8Pseudo_UPD: 1259d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq16Pseudo_UPD: 1260d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq32Pseudo_UPD: 12618466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd8Pseudo: 12628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd16Pseudo: 12638466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd32Pseudo: 12648466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq16Pseudo: 12658466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq32Pseudo: 12668466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd8Pseudo_UPD: 12678466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd16Pseudo_UPD: 12688466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd32Pseudo_UPD: 12698466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq16Pseudo_UPD: 12708466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq32Pseudo_UPD: 12718466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd8Pseudo: 12728466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd16Pseudo: 12738466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd32Pseudo: 12748466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq16Pseudo: 12758466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq32Pseudo: 12768466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd8Pseudo_UPD: 12778466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd16Pseudo_UPD: 12788466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd32Pseudo_UPD: 12798466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq16Pseudo_UPD: 12808466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq32Pseudo_UPD: 12818466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd8Pseudo: 12828466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd16Pseudo: 12838466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd32Pseudo: 12848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq16Pseudo: 12858466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq32Pseudo: 12868466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd8Pseudo_UPD: 12878466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd16Pseudo_UPD: 12888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd32Pseudo_UPD: 12898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq16Pseudo_UPD: 12908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq32Pseudo_UPD: 12918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson ExpandLaneOp(MBBI); 12929fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 12939fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 12949fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBL2Pseudo: ExpandVTBL(MBBI, ARM::VTBL2, false, 2); return true; 12959fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBL3Pseudo: ExpandVTBL(MBBI, ARM::VTBL3, false, 3); return true; 12969fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBL4Pseudo: ExpandVTBL(MBBI, ARM::VTBL4, false, 4); return true; 12979fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBX2Pseudo: ExpandVTBL(MBBI, ARM::VTBX2, true, 2); return true; 12989fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBX3Pseudo: ExpandVTBL(MBBI, ARM::VTBX3, true, 3); return true; 12999fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBX4Pseudo: ExpandVTBL(MBBI, ARM::VTBX4, true, 4); return true; 13009fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 13019fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 13029fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return false; 13039fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng} 1304709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 13059fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Chengbool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) { 13069fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool Modified = false; 13079fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 13089fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); 13099fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng while (MBBI != E) { 13109fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator NMBBI = llvm::next(MBBI); 13119fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng Modified |= ExpandMI(MBB, MBBI); 1312b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng MBBI = NMBBI; 1313b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng } 1314b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1315b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return Modified; 1316b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 1317b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1318b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Chengbool ARMExpandPseudo::runOnMachineFunction(MachineFunction &MF) { 131953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const TargetMachine &TM = MF.getTarget(); 132053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TII = static_cast<const ARMBaseInstrInfo*>(TM.getInstrInfo()); 132153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TRI = TM.getRegisterInfo(); 132253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng STI = &TM.getSubtarget<ARMSubtarget>(); 13239fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng AFI = MF.getInfo<ARMFunctionInfo>(); 1324b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1325b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng bool Modified = false; 1326b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng for (MachineFunction::iterator MFI = MF.begin(), E = MF.end(); MFI != E; 1327b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng ++MFI) 1328b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng Modified |= ExpandMBB(*MFI); 1329e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen if (VerifyARMPseudo) 1330e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen MF.verify(this, "After expanding ARM pseudo instructions."); 1331b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return Modified; 1332b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 1333b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1334b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng/// createARMExpandPseudoPass - returns an instance of the pseudo instruction 1335b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng/// expansion pass. 1336b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan ChengFunctionPass *llvm::createARMExpandPseudoPass() { 1337b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return new ARMExpandPseudo(); 1338b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 1339