ARMExpandPseudoInsts.cpp revision 8e0c7697fd9b9354856074efc06eea9f6d80015c
1b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng//===-- ARMExpandPseudoInsts.cpp - Expand pseudo instructions -----*- C++ -*-=// 2b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 3b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// The LLVM Compiler Infrastructure 4b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 5b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// This file is distributed under the University of Illinois Open Source 6b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// License. See LICENSE.TXT for details. 7b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 8b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng//===----------------------------------------------------------------------===// 9b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 10656edcf138563068a2e7d52fb35f8de1375bad9aBob Wilson// This file contains a pass that expands pseudo instructions into target 11b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// instructions to allow proper scheduling, if-conversion, and other late 12b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// optimizations. This pass should be run after register allocation but before 13656edcf138563068a2e7d52fb35f8de1375bad9aBob Wilson// the post-regalloc scheduling pass. 14b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 15b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng//===----------------------------------------------------------------------===// 16b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 17b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#define DEBUG_TYPE "arm-pseudo" 18b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "ARM.h" 19b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "ARMBaseInstrInfo.h" 20e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "ARMBaseRegisterInfo.h" 21e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "ARMMachineFunctionInfo.h" 2265dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach#include "ARMRegisterInfo.h" 23ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng#include "MCTargetDesc/ARMAddressingModes.h" 24e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "llvm/CodeGen/MachineFrameInfo.h" 25b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "llvm/CodeGen/MachineFunctionPass.h" 26b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "llvm/CodeGen/MachineInstrBuilder.h" 2716c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov#include "llvm/Target/TargetFrameLowering.h" 284dbbe3433f7339ed277af55037ff6847f484e5abChris Lattner#include "llvm/Target/TargetRegisterInfo.h" 29e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen#include "llvm/Support/CommandLine.h" 30e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "llvm/Support/raw_ostream.h" // FIXME: for debug only. remove! 31b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Chengusing namespace llvm; 32b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 33a67f14bf53737f9bb0afefa28e08c4aac6ec4804Benjamin Kramerstatic cl::opt<bool> 34e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund OlesenVerifyARMPseudo("verify-arm-pseudo-expand", cl::Hidden, 35e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen cl::desc("Verify machine code after expanding ARM pseudos")); 36e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen 37b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Chengnamespace { 38b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng class ARMExpandPseudo : public MachineFunctionPass { 39b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng public: 40b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng static char ID; 4190c579de5a383cee278acc3f7e7b9d0a656e6a35Owen Anderson ARMExpandPseudo() : MachineFunctionPass(ID) {} 42b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 43e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach const ARMBaseInstrInfo *TII; 44d929f7773812535271ae6969331f8164c1f7f3b2Evan Cheng const TargetRegisterInfo *TRI; 45893d7fe2098cc81ba1b4ce0ed71f6f614843961fEvan Cheng const ARMSubtarget *STI; 469fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng ARMFunctionInfo *AFI; 47b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 48b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng virtual bool runOnMachineFunction(MachineFunction &Fn); 49b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 50b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng virtual const char *getPassName() const { 51b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return "ARM pseudo instruction expansion pass"; 52b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng } 53b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 54b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng private: 55431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng void TransferImpOps(MachineInstr &OldMI, 56431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI); 579fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool ExpandMI(MachineBasicBlock &MBB, 589fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator MBBI); 59b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng bool ExpandMBB(MachineBasicBlock &MBB); 608466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson void ExpandVLD(MachineBasicBlock::iterator &MBBI); 618466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson void ExpandVST(MachineBasicBlock::iterator &MBBI); 628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson void ExpandLaneOp(MachineBasicBlock::iterator &MBBI); 63bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson void ExpandVTBL(MachineBasicBlock::iterator &MBBI, 64bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned Opc, bool IsExt, unsigned NumRegs); 659fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng void ExpandMOV32BitImm(MachineBasicBlock &MBB, 669fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator &MBBI); 67b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng }; 68b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng char ARMExpandPseudo::ID = 0; 69b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 70b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 71431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng/// TransferImpOps - Transfer implicit operands on the pseudo instruction to 72431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng/// the instructions created from the expansion. 73431300797b84600fc9b4eb8ca283277d3e0674ebEvan Chengvoid ARMExpandPseudo::TransferImpOps(MachineInstr &OldMI, 74431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder &UseMI, 75431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder &DefMI) { 76e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &Desc = OldMI.getDesc(); 77431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng for (unsigned i = Desc.getNumOperands(), e = OldMI.getNumOperands(); 78431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng i != e; ++i) { 79431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng const MachineOperand &MO = OldMI.getOperand(i); 80431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng assert(MO.isReg() && MO.getReg()); 81431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng if (MO.isUse()) 8263569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson UseMI.addOperand(MO); 83431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng else 8463569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson DefMI.addOperand(MO); 85431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng } 86431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng} 87431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng 888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonnamespace { 898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Constants for register spacing in NEON load/store instructions. 908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // For quad-register load-lane and store-lane pseudo instructors, the 918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // spacing is initially assumed to be EvenDblSpc, and that is changed to 928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // OddDblSpc depending on the lane number operand. 938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson enum NEONRegSpacing { 948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson SingleSpc, 958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson EvenDblSpc, 968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson OddDblSpc 978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson }; 988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Entries for NEON load/store information table. The table is sorted by 1008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // PseudoOpc for fast binary-search lookups. 1018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson struct NEONLdStTableEntry { 1028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned PseudoOpc; 1038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned RealOpc; 1048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson bool IsLoad; 1058466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson bool HasWriteBack; 1068466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpacing; 1078466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned char NumRegs; // D registers loaded or stored 1088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned char RegElts; // elements per D register; used for lane ops 1098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1108466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Comparison methods for binary search of the table. 1118466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson bool operator<(const NEONLdStTableEntry &TE) const { 1128466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return PseudoOpc < TE.PseudoOpc; 1138466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 1148466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson friend bool operator<(const NEONLdStTableEntry &TE, unsigned PseudoOpc) { 1158466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return TE.PseudoOpc < PseudoOpc; 1168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 117100c267249d1d03c4f96eede9877a4f9f54f2247Chandler Carruth friend bool LLVM_ATTRIBUTE_UNUSED operator<(unsigned PseudoOpc, 118100c267249d1d03c4f96eede9877a4f9f54f2247Chandler Carruth const NEONLdStTableEntry &TE) { 1198466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return PseudoOpc < TE.PseudoOpc; 1208466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 1218466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson }; 1228466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 1238466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1248466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonstatic const NEONLdStTableEntry NEONLdStTable[] = { 1252a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson{ ARM::VLD1DUPq16Pseudo, ARM::VLD1DUPq16, true, false, SingleSpc, 2, 4}, 1262a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson{ ARM::VLD1DUPq16Pseudo_UPD, ARM::VLD1DUPq16_UPD, true, true, SingleSpc, 2, 4}, 1272a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson{ ARM::VLD1DUPq32Pseudo, ARM::VLD1DUPq32, true, false, SingleSpc, 2, 2}, 1282a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson{ ARM::VLD1DUPq32Pseudo_UPD, ARM::VLD1DUPq32_UPD, true, true, SingleSpc, 2, 2}, 1292a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson{ ARM::VLD1DUPq8Pseudo, ARM::VLD1DUPq8, true, false, SingleSpc, 2, 8}, 1302a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson{ ARM::VLD1DUPq8Pseudo_UPD, ARM::VLD1DUPq8_UPD, true, true, SingleSpc, 2, 8}, 1312a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson 132b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson{ ARM::VLD1LNq16Pseudo, ARM::VLD1LNd16, true, false, EvenDblSpc, 1, 4 }, 133d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson{ ARM::VLD1LNq16Pseudo_UPD, ARM::VLD1LNd16_UPD, true, true, EvenDblSpc, 1, 4 }, 134b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson{ ARM::VLD1LNq32Pseudo, ARM::VLD1LNd32, true, false, EvenDblSpc, 1, 2 }, 135d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson{ ARM::VLD1LNq32Pseudo_UPD, ARM::VLD1LNd32_UPD, true, true, EvenDblSpc, 1, 2 }, 136b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson{ ARM::VLD1LNq8Pseudo, ARM::VLD1LNd8, true, false, EvenDblSpc, 1, 8 }, 137d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson{ ARM::VLD1LNq8Pseudo_UPD, ARM::VLD1LNd8_UPD, true, true, EvenDblSpc, 1, 8 }, 138b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson 1398466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1d64QPseudo, ARM::VLD1d64Q, true, false, SingleSpc, 4, 1 }, 1408466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1d64QPseudo_UPD, ARM::VLD1d64Q_UPD, true, true, SingleSpc, 4, 1 }, 1418466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1d64TPseudo, ARM::VLD1d64T, true, false, SingleSpc, 3, 1 }, 1428466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1d64TPseudo_UPD, ARM::VLD1d64T_UPD, true, true, SingleSpc, 3, 1 }, 1438466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1448466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1q16Pseudo, ARM::VLD1q16, true, false, SingleSpc, 2, 4 }, 1458466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1q16Pseudo_UPD, ARM::VLD1q16_UPD, true, true, SingleSpc, 2, 4 }, 1468466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1q32Pseudo, ARM::VLD1q32, true, false, SingleSpc, 2, 2 }, 1478466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1q32Pseudo_UPD, ARM::VLD1q32_UPD, true, true, SingleSpc, 2, 2 }, 1488466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1q64Pseudo, ARM::VLD1q64, true, false, SingleSpc, 2, 1 }, 1498466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1q64Pseudo_UPD, ARM::VLD1q64_UPD, true, true, SingleSpc, 2, 1 }, 1508466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1q8Pseudo, ARM::VLD1q8, true, false, SingleSpc, 2, 8 }, 1518466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD1q8Pseudo_UPD, ARM::VLD1q8_UPD, true, true, SingleSpc, 2, 8 }, 1528466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 153b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson{ ARM::VLD2DUPd16Pseudo, ARM::VLD2DUPd16, true, false, SingleSpc, 2, 4}, 154b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson{ ARM::VLD2DUPd16Pseudo_UPD, ARM::VLD2DUPd16_UPD, true, true, SingleSpc, 2, 4}, 155b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson{ ARM::VLD2DUPd32Pseudo, ARM::VLD2DUPd32, true, false, SingleSpc, 2, 2}, 156b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson{ ARM::VLD2DUPd32Pseudo_UPD, ARM::VLD2DUPd32_UPD, true, true, SingleSpc, 2, 2}, 157b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson{ ARM::VLD2DUPd8Pseudo, ARM::VLD2DUPd8, true, false, SingleSpc, 2, 8}, 158b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson{ ARM::VLD2DUPd8Pseudo_UPD, ARM::VLD2DUPd8_UPD, true, true, SingleSpc, 2, 8}, 159b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson 1608466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2LNd16Pseudo, ARM::VLD2LNd16, true, false, SingleSpc, 2, 4 }, 1618466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2LNd16Pseudo_UPD, ARM::VLD2LNd16_UPD, true, true, SingleSpc, 2, 4 }, 1628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2LNd32Pseudo, ARM::VLD2LNd32, true, false, SingleSpc, 2, 2 }, 1638466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2LNd32Pseudo_UPD, ARM::VLD2LNd32_UPD, true, true, SingleSpc, 2, 2 }, 1648466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2LNd8Pseudo, ARM::VLD2LNd8, true, false, SingleSpc, 2, 8 }, 1658466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2LNd8Pseudo_UPD, ARM::VLD2LNd8_UPD, true, true, SingleSpc, 2, 8 }, 1668466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2LNq16Pseudo, ARM::VLD2LNq16, true, false, EvenDblSpc, 2, 4 }, 1678466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2LNq16Pseudo_UPD, ARM::VLD2LNq16_UPD, true, true, EvenDblSpc, 2, 4 }, 1688466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2LNq32Pseudo, ARM::VLD2LNq32, true, false, EvenDblSpc, 2, 2 }, 1698466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2LNq32Pseudo_UPD, ARM::VLD2LNq32_UPD, true, true, EvenDblSpc, 2, 2 }, 1708466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1718466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2d16Pseudo, ARM::VLD2d16, true, false, SingleSpc, 2, 4 }, 1728466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2d16Pseudo_UPD, ARM::VLD2d16_UPD, true, true, SingleSpc, 2, 4 }, 1738466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2d32Pseudo, ARM::VLD2d32, true, false, SingleSpc, 2, 2 }, 1748466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2d32Pseudo_UPD, ARM::VLD2d32_UPD, true, true, SingleSpc, 2, 2 }, 1758466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2d8Pseudo, ARM::VLD2d8, true, false, SingleSpc, 2, 8 }, 1768466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2d8Pseudo_UPD, ARM::VLD2d8_UPD, true, true, SingleSpc, 2, 8 }, 1778466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1788466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2q16Pseudo, ARM::VLD2q16, true, false, SingleSpc, 4, 4 }, 1798466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2q16Pseudo_UPD, ARM::VLD2q16_UPD, true, true, SingleSpc, 4, 4 }, 1808466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2q32Pseudo, ARM::VLD2q32, true, false, SingleSpc, 4, 2 }, 1818466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2q32Pseudo_UPD, ARM::VLD2q32_UPD, true, true, SingleSpc, 4, 2 }, 1828466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2q8Pseudo, ARM::VLD2q8, true, false, SingleSpc, 4, 8 }, 1838466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD2q8Pseudo_UPD, ARM::VLD2q8_UPD, true, true, SingleSpc, 4, 8 }, 1848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 18586c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson{ ARM::VLD3DUPd16Pseudo, ARM::VLD3DUPd16, true, false, SingleSpc, 3, 4}, 18686c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson{ ARM::VLD3DUPd16Pseudo_UPD, ARM::VLD3DUPd16_UPD, true, true, SingleSpc, 3, 4}, 18786c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson{ ARM::VLD3DUPd32Pseudo, ARM::VLD3DUPd32, true, false, SingleSpc, 3, 2}, 18886c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson{ ARM::VLD3DUPd32Pseudo_UPD, ARM::VLD3DUPd32_UPD, true, true, SingleSpc, 3, 2}, 18986c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson{ ARM::VLD3DUPd8Pseudo, ARM::VLD3DUPd8, true, false, SingleSpc, 3, 8}, 19086c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson{ ARM::VLD3DUPd8Pseudo_UPD, ARM::VLD3DUPd8_UPD, true, true, SingleSpc, 3, 8}, 19186c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson 1928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3LNd16Pseudo, ARM::VLD3LNd16, true, false, SingleSpc, 3, 4 }, 1938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3LNd16Pseudo_UPD, ARM::VLD3LNd16_UPD, true, true, SingleSpc, 3, 4 }, 1948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3LNd32Pseudo, ARM::VLD3LNd32, true, false, SingleSpc, 3, 2 }, 1958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3LNd32Pseudo_UPD, ARM::VLD3LNd32_UPD, true, true, SingleSpc, 3, 2 }, 1968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3LNd8Pseudo, ARM::VLD3LNd8, true, false, SingleSpc, 3, 8 }, 1978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3LNd8Pseudo_UPD, ARM::VLD3LNd8_UPD, true, true, SingleSpc, 3, 8 }, 1988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3LNq16Pseudo, ARM::VLD3LNq16, true, false, EvenDblSpc, 3, 4 }, 1998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3LNq16Pseudo_UPD, ARM::VLD3LNq16_UPD, true, true, EvenDblSpc, 3, 4 }, 2008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3LNq32Pseudo, ARM::VLD3LNq32, true, false, EvenDblSpc, 3, 2 }, 2018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3LNq32Pseudo_UPD, ARM::VLD3LNq32_UPD, true, true, EvenDblSpc, 3, 2 }, 2028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 2038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3d16Pseudo, ARM::VLD3d16, true, false, SingleSpc, 3, 4 }, 2048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3d16Pseudo_UPD, ARM::VLD3d16_UPD, true, true, SingleSpc, 3, 4 }, 2058466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3d32Pseudo, ARM::VLD3d32, true, false, SingleSpc, 3, 2 }, 2068466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3d32Pseudo_UPD, ARM::VLD3d32_UPD, true, true, SingleSpc, 3, 2 }, 2078466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3d8Pseudo, ARM::VLD3d8, true, false, SingleSpc, 3, 8 }, 2088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3d8Pseudo_UPD, ARM::VLD3d8_UPD, true, true, SingleSpc, 3, 8 }, 2098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 2108466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3q16Pseudo_UPD, ARM::VLD3q16_UPD, true, true, EvenDblSpc, 3, 4 }, 2117de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VLD3q16oddPseudo, ARM::VLD3q16, true, false, OddDblSpc, 3, 4 }, 2128466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3q16oddPseudo_UPD, ARM::VLD3q16_UPD, true, true, OddDblSpc, 3, 4 }, 2138466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3q32Pseudo_UPD, ARM::VLD3q32_UPD, true, true, EvenDblSpc, 3, 2 }, 2147de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VLD3q32oddPseudo, ARM::VLD3q32, true, false, OddDblSpc, 3, 2 }, 2158466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3q32oddPseudo_UPD, ARM::VLD3q32_UPD, true, true, OddDblSpc, 3, 2 }, 2168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3q8Pseudo_UPD, ARM::VLD3q8_UPD, true, true, EvenDblSpc, 3, 8 }, 2177de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VLD3q8oddPseudo, ARM::VLD3q8, true, false, OddDblSpc, 3, 8 }, 2188466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD3q8oddPseudo_UPD, ARM::VLD3q8_UPD, true, true, OddDblSpc, 3, 8 }, 2198466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 2206c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson{ ARM::VLD4DUPd16Pseudo, ARM::VLD4DUPd16, true, false, SingleSpc, 4, 4}, 2216c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson{ ARM::VLD4DUPd16Pseudo_UPD, ARM::VLD4DUPd16_UPD, true, true, SingleSpc, 4, 4}, 2226c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson{ ARM::VLD4DUPd32Pseudo, ARM::VLD4DUPd32, true, false, SingleSpc, 4, 2}, 2236c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson{ ARM::VLD4DUPd32Pseudo_UPD, ARM::VLD4DUPd32_UPD, true, true, SingleSpc, 4, 2}, 2246c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson{ ARM::VLD4DUPd8Pseudo, ARM::VLD4DUPd8, true, false, SingleSpc, 4, 8}, 2256c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson{ ARM::VLD4DUPd8Pseudo_UPD, ARM::VLD4DUPd8_UPD, true, true, SingleSpc, 4, 8}, 2266c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson 2278466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4LNd16Pseudo, ARM::VLD4LNd16, true, false, SingleSpc, 4, 4 }, 2288466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4LNd16Pseudo_UPD, ARM::VLD4LNd16_UPD, true, true, SingleSpc, 4, 4 }, 2298466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4LNd32Pseudo, ARM::VLD4LNd32, true, false, SingleSpc, 4, 2 }, 2308466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4LNd32Pseudo_UPD, ARM::VLD4LNd32_UPD, true, true, SingleSpc, 4, 2 }, 2318466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4LNd8Pseudo, ARM::VLD4LNd8, true, false, SingleSpc, 4, 8 }, 2328466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4LNd8Pseudo_UPD, ARM::VLD4LNd8_UPD, true, true, SingleSpc, 4, 8 }, 2338466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4LNq16Pseudo, ARM::VLD4LNq16, true, false, EvenDblSpc, 4, 4 }, 2348466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4LNq16Pseudo_UPD, ARM::VLD4LNq16_UPD, true, true, EvenDblSpc, 4, 4 }, 2358466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4LNq32Pseudo, ARM::VLD4LNq32, true, false, EvenDblSpc, 4, 2 }, 2368466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4LNq32Pseudo_UPD, ARM::VLD4LNq32_UPD, true, true, EvenDblSpc, 4, 2 }, 2378466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 2388466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4d16Pseudo, ARM::VLD4d16, true, false, SingleSpc, 4, 4 }, 2398466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4d16Pseudo_UPD, ARM::VLD4d16_UPD, true, true, SingleSpc, 4, 4 }, 2408466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4d32Pseudo, ARM::VLD4d32, true, false, SingleSpc, 4, 2 }, 2418466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4d32Pseudo_UPD, ARM::VLD4d32_UPD, true, true, SingleSpc, 4, 2 }, 2428466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4d8Pseudo, ARM::VLD4d8, true, false, SingleSpc, 4, 8 }, 2438466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4d8Pseudo_UPD, ARM::VLD4d8_UPD, true, true, SingleSpc, 4, 8 }, 2448466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 2458466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4q16Pseudo_UPD, ARM::VLD4q16_UPD, true, true, EvenDblSpc, 4, 4 }, 2467de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VLD4q16oddPseudo, ARM::VLD4q16, true, false, OddDblSpc, 4, 4 }, 2478466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4q16oddPseudo_UPD, ARM::VLD4q16_UPD, true, true, OddDblSpc, 4, 4 }, 2488466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4q32Pseudo_UPD, ARM::VLD4q32_UPD, true, true, EvenDblSpc, 4, 2 }, 2497de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VLD4q32oddPseudo, ARM::VLD4q32, true, false, OddDblSpc, 4, 2 }, 2508466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4q32oddPseudo_UPD, ARM::VLD4q32_UPD, true, true, OddDblSpc, 4, 2 }, 2518466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4q8Pseudo_UPD, ARM::VLD4q8_UPD, true, true, EvenDblSpc, 4, 8 }, 2527de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VLD4q8oddPseudo, ARM::VLD4q8, true, false, OddDblSpc, 4, 8 }, 2538466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VLD4q8oddPseudo_UPD, ARM::VLD4q8_UPD, true, true, OddDblSpc, 4, 8 }, 2548466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 255d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson{ ARM::VST1LNq16Pseudo, ARM::VST1LNd16, false, false, EvenDblSpc, 1, 4 }, 256d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson{ ARM::VST1LNq16Pseudo_UPD, ARM::VST1LNd16_UPD,false, true, EvenDblSpc, 1, 4 }, 257d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson{ ARM::VST1LNq32Pseudo, ARM::VST1LNd32, false, false, EvenDblSpc, 1, 2 }, 258d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson{ ARM::VST1LNq32Pseudo_UPD, ARM::VST1LNd32_UPD,false, true, EvenDblSpc, 1, 2 }, 259d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson{ ARM::VST1LNq8Pseudo, ARM::VST1LNd8, false, false, EvenDblSpc, 1, 8 }, 260d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson{ ARM::VST1LNq8Pseudo_UPD, ARM::VST1LNd8_UPD, false, true, EvenDblSpc, 1, 8 }, 261d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson 2628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1d64QPseudo, ARM::VST1d64Q, false, false, SingleSpc, 4, 1 }, 2638466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1d64QPseudo_UPD, ARM::VST1d64Q_UPD, false, true, SingleSpc, 4, 1 }, 2648466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1d64TPseudo, ARM::VST1d64T, false, false, SingleSpc, 3, 1 }, 2658466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1d64TPseudo_UPD, ARM::VST1d64T_UPD, false, true, SingleSpc, 3, 1 }, 2668466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 2678466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1q16Pseudo, ARM::VST1q16, false, false, SingleSpc, 2, 4 }, 2688466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1q16Pseudo_UPD, ARM::VST1q16_UPD, false, true, SingleSpc, 2, 4 }, 2698466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1q32Pseudo, ARM::VST1q32, false, false, SingleSpc, 2, 2 }, 2708466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1q32Pseudo_UPD, ARM::VST1q32_UPD, false, true, SingleSpc, 2, 2 }, 2718466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1q64Pseudo, ARM::VST1q64, false, false, SingleSpc, 2, 1 }, 2728466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1q64Pseudo_UPD, ARM::VST1q64_UPD, false, true, SingleSpc, 2, 1 }, 2738466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1q8Pseudo, ARM::VST1q8, false, false, SingleSpc, 2, 8 }, 2748466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST1q8Pseudo_UPD, ARM::VST1q8_UPD, false, true, SingleSpc, 2, 8 }, 2758466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 2768466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2LNd16Pseudo, ARM::VST2LNd16, false, false, SingleSpc, 2, 4 }, 2778466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2LNd16Pseudo_UPD, ARM::VST2LNd16_UPD, false, true, SingleSpc, 2, 4 }, 2788466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2LNd32Pseudo, ARM::VST2LNd32, false, false, SingleSpc, 2, 2 }, 2798466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2LNd32Pseudo_UPD, ARM::VST2LNd32_UPD, false, true, SingleSpc, 2, 2 }, 2808466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2LNd8Pseudo, ARM::VST2LNd8, false, false, SingleSpc, 2, 8 }, 2818466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2LNd8Pseudo_UPD, ARM::VST2LNd8_UPD, false, true, SingleSpc, 2, 8 }, 2828466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2LNq16Pseudo, ARM::VST2LNq16, false, false, EvenDblSpc, 2, 4}, 2838466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2LNq16Pseudo_UPD, ARM::VST2LNq16_UPD, false, true, EvenDblSpc, 2, 4}, 2848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2LNq32Pseudo, ARM::VST2LNq32, false, false, EvenDblSpc, 2, 2}, 2858466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2LNq32Pseudo_UPD, ARM::VST2LNq32_UPD, false, true, EvenDblSpc, 2, 2}, 2868466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 2878466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2d16Pseudo, ARM::VST2d16, false, false, SingleSpc, 2, 4 }, 2888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2d16Pseudo_UPD, ARM::VST2d16_UPD, false, true, SingleSpc, 2, 4 }, 2898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2d32Pseudo, ARM::VST2d32, false, false, SingleSpc, 2, 2 }, 2908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2d32Pseudo_UPD, ARM::VST2d32_UPD, false, true, SingleSpc, 2, 2 }, 2918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2d8Pseudo, ARM::VST2d8, false, false, SingleSpc, 2, 8 }, 2928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2d8Pseudo_UPD, ARM::VST2d8_UPD, false, true, SingleSpc, 2, 8 }, 2938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 2948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2q16Pseudo, ARM::VST2q16, false, false, SingleSpc, 4, 4 }, 2958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2q16Pseudo_UPD, ARM::VST2q16_UPD, false, true, SingleSpc, 4, 4 }, 2968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2q32Pseudo, ARM::VST2q32, false, false, SingleSpc, 4, 2 }, 2978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2q32Pseudo_UPD, ARM::VST2q32_UPD, false, true, SingleSpc, 4, 2 }, 2988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2q8Pseudo, ARM::VST2q8, false, false, SingleSpc, 4, 8 }, 2998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST2q8Pseudo_UPD, ARM::VST2q8_UPD, false, true, SingleSpc, 4, 8 }, 3008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3LNd16Pseudo, ARM::VST3LNd16, false, false, SingleSpc, 3, 4 }, 3028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3LNd16Pseudo_UPD, ARM::VST3LNd16_UPD, false, true, SingleSpc, 3, 4 }, 3038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3LNd32Pseudo, ARM::VST3LNd32, false, false, SingleSpc, 3, 2 }, 3048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3LNd32Pseudo_UPD, ARM::VST3LNd32_UPD, false, true, SingleSpc, 3, 2 }, 3058466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3LNd8Pseudo, ARM::VST3LNd8, false, false, SingleSpc, 3, 8 }, 3068466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3LNd8Pseudo_UPD, ARM::VST3LNd8_UPD, false, true, SingleSpc, 3, 8 }, 3078466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3LNq16Pseudo, ARM::VST3LNq16, false, false, EvenDblSpc, 3, 4}, 3088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3LNq16Pseudo_UPD, ARM::VST3LNq16_UPD, false, true, EvenDblSpc, 3, 4}, 3098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3LNq32Pseudo, ARM::VST3LNq32, false, false, EvenDblSpc, 3, 2}, 3108466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3LNq32Pseudo_UPD, ARM::VST3LNq32_UPD, false, true, EvenDblSpc, 3, 2}, 3118466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3128466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3d16Pseudo, ARM::VST3d16, false, false, SingleSpc, 3, 4 }, 3138466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3d16Pseudo_UPD, ARM::VST3d16_UPD, false, true, SingleSpc, 3, 4 }, 3148466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3d32Pseudo, ARM::VST3d32, false, false, SingleSpc, 3, 2 }, 3158466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3d32Pseudo_UPD, ARM::VST3d32_UPD, false, true, SingleSpc, 3, 2 }, 3168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3d8Pseudo, ARM::VST3d8, false, false, SingleSpc, 3, 8 }, 3178466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3d8Pseudo_UPD, ARM::VST3d8_UPD, false, true, SingleSpc, 3, 8 }, 3188466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3198466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3q16Pseudo_UPD, ARM::VST3q16_UPD, false, true, EvenDblSpc, 3, 4 }, 3207de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VST3q16oddPseudo, ARM::VST3q16, false, false, OddDblSpc, 3, 4 }, 3218466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3q16oddPseudo_UPD, ARM::VST3q16_UPD, false, true, OddDblSpc, 3, 4 }, 3228466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3q32Pseudo_UPD, ARM::VST3q32_UPD, false, true, EvenDblSpc, 3, 2 }, 3237de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VST3q32oddPseudo, ARM::VST3q32, false, false, OddDblSpc, 3, 2 }, 3248466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3q32oddPseudo_UPD, ARM::VST3q32_UPD, false, true, OddDblSpc, 3, 2 }, 3258466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3q8Pseudo_UPD, ARM::VST3q8_UPD, false, true, EvenDblSpc, 3, 8 }, 3267de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VST3q8oddPseudo, ARM::VST3q8, false, false, OddDblSpc, 3, 8 }, 3278466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST3q8oddPseudo_UPD, ARM::VST3q8_UPD, false, true, OddDblSpc, 3, 8 }, 3288466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3298466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4LNd16Pseudo, ARM::VST4LNd16, false, false, SingleSpc, 4, 4 }, 3308466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4LNd16Pseudo_UPD, ARM::VST4LNd16_UPD, false, true, SingleSpc, 4, 4 }, 3318466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4LNd32Pseudo, ARM::VST4LNd32, false, false, SingleSpc, 4, 2 }, 3328466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4LNd32Pseudo_UPD, ARM::VST4LNd32_UPD, false, true, SingleSpc, 4, 2 }, 3338466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4LNd8Pseudo, ARM::VST4LNd8, false, false, SingleSpc, 4, 8 }, 3348466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4LNd8Pseudo_UPD, ARM::VST4LNd8_UPD, false, true, SingleSpc, 4, 8 }, 3358466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4LNq16Pseudo, ARM::VST4LNq16, false, false, EvenDblSpc, 4, 4}, 3368466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4LNq16Pseudo_UPD, ARM::VST4LNq16_UPD, false, true, EvenDblSpc, 4, 4}, 3378466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4LNq32Pseudo, ARM::VST4LNq32, false, false, EvenDblSpc, 4, 2}, 3388466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4LNq32Pseudo_UPD, ARM::VST4LNq32_UPD, false, true, EvenDblSpc, 4, 2}, 3398466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3408466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4d16Pseudo, ARM::VST4d16, false, false, SingleSpc, 4, 4 }, 3418466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4d16Pseudo_UPD, ARM::VST4d16_UPD, false, true, SingleSpc, 4, 4 }, 3428466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4d32Pseudo, ARM::VST4d32, false, false, SingleSpc, 4, 2 }, 3438466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4d32Pseudo_UPD, ARM::VST4d32_UPD, false, true, SingleSpc, 4, 2 }, 3448466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4d8Pseudo, ARM::VST4d8, false, false, SingleSpc, 4, 8 }, 3458466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4d8Pseudo_UPD, ARM::VST4d8_UPD, false, true, SingleSpc, 4, 8 }, 3468466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3478466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4q16Pseudo_UPD, ARM::VST4q16_UPD, false, true, EvenDblSpc, 4, 4 }, 3487de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VST4q16oddPseudo, ARM::VST4q16, false, false, OddDblSpc, 4, 4 }, 3498466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4q16oddPseudo_UPD, ARM::VST4q16_UPD, false, true, OddDblSpc, 4, 4 }, 3508466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4q32Pseudo_UPD, ARM::VST4q32_UPD, false, true, EvenDblSpc, 4, 2 }, 3517de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VST4q32oddPseudo, ARM::VST4q32, false, false, OddDblSpc, 4, 2 }, 3528466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4q32oddPseudo_UPD, ARM::VST4q32_UPD, false, true, OddDblSpc, 4, 2 }, 3538466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson{ ARM::VST4q8Pseudo_UPD, ARM::VST4q8_UPD, false, true, EvenDblSpc, 4, 8 }, 3547de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VST4q8oddPseudo, ARM::VST4q8, false, false, OddDblSpc, 4, 8 }, 3557de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson{ ARM::VST4q8oddPseudo_UPD, ARM::VST4q8_UPD, false, true, OddDblSpc, 4, 8 } 3568466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson}; 3578466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3588466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// LookupNEONLdSt - Search the NEONLdStTable for information about a NEON 3598466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// load or store pseudo instruction. 3608466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonstatic const NEONLdStTableEntry *LookupNEONLdSt(unsigned Opcode) { 3618466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumEntries = array_lengthof(NEONLdStTable); 3628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3638466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson#ifndef NDEBUG 3648466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Make sure the table is sorted. 3658466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson static bool TableChecked = false; 3668466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (!TableChecked) { 3678466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson for (unsigned i = 0; i != NumEntries-1; ++i) 3688466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(NEONLdStTable[i] < NEONLdStTable[i+1] && 3698466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson "NEONLdStTable is not sorted!"); 3708466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TableChecked = true; 3718466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 3728466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson#endif 3738466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3748466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *I = 3758466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson std::lower_bound(NEONLdStTable, NEONLdStTable + NumEntries, Opcode); 3768466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (I != NEONLdStTable + NumEntries && I->PseudoOpc == Opcode) 3778466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return I; 3788466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return NULL; 3798466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 3808466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3818466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// GetDSubRegs - Get 4 D subregisters of a Q, QQ, or QQQQ register, 3828466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// corresponding to the specified register spacing. Not all of the results 3838466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// are necessarily valid, e.g., a Q register only has 2 D subregisters. 3848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonstatic void GetDSubRegs(unsigned Reg, NEONRegSpacing RegSpc, 3858466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const TargetRegisterInfo *TRI, unsigned &D0, 3868466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned &D1, unsigned &D2, unsigned &D3) { 3878466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (RegSpc == SingleSpc) { 3888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D0 = TRI->getSubReg(Reg, ARM::dsub_0); 3898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D1 = TRI->getSubReg(Reg, ARM::dsub_1); 3908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D2 = TRI->getSubReg(Reg, ARM::dsub_2); 3918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D3 = TRI->getSubReg(Reg, ARM::dsub_3); 3928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } else if (RegSpc == EvenDblSpc) { 3938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D0 = TRI->getSubReg(Reg, ARM::dsub_0); 3948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D1 = TRI->getSubReg(Reg, ARM::dsub_2); 3958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D2 = TRI->getSubReg(Reg, ARM::dsub_4); 3968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D3 = TRI->getSubReg(Reg, ARM::dsub_6); 3978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } else { 3988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(RegSpc == OddDblSpc && "unknown register spacing"); 3998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D0 = TRI->getSubReg(Reg, ARM::dsub_1); 4008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D1 = TRI->getSubReg(Reg, ARM::dsub_3); 4018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D2 = TRI->getSubReg(Reg, ARM::dsub_5); 4028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D3 = TRI->getSubReg(Reg, ARM::dsub_7); 403bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson } 4048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 4058466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 40682a9c8480ecd41a1351274569f8d4e4de2723cf6Bob Wilson/// ExpandVLD - Translate VLD pseudo instructions with Q, QQ or QQQQ register 40782a9c8480ecd41a1351274569f8d4e4de2723cf6Bob Wilson/// operands to real VLD instructions with D register operands. 4088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonvoid ARMExpandPseudo::ExpandVLD(MachineBasicBlock::iterator &MBBI) { 409ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson MachineInstr &MI = *MBBI; 410ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 411ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 4128466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); 4138466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); 4148466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpc = TableEntry->RegSpacing; 4158466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumRegs = TableEntry->NumRegs; 4168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 4178466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 4188466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TII->get(TableEntry->RealOpc)); 419ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson unsigned OpIdx = 0; 420ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 421ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson bool DstIsDead = MI.getOperand(OpIdx).isDead(); 422ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson unsigned DstReg = MI.getOperand(OpIdx++).getReg(); 423ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson unsigned D0, D1, D2, D3; 4248466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3); 425f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)) 426f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson .addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); 427ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson if (NumRegs > 2) 428f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); 429ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson if (NumRegs > 3) 430f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); 431ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 4328466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->HasWriteBack) 43363569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 43463569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson 435ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson // Copy the addrmode6 operands. 43663569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 43763569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 43863569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson // Copy the am6offset operand. 4398466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->HasWriteBack) 44063569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 441ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 44219d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson // For an instruction writing double-spaced subregs, the pseudo instruction 443823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // has an extra operand that is a use of the super-register. Record the 444823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // operand index and skip over it. 445823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson unsigned SrcOpIdx = 0; 446823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson if (RegSpc == EvenDblSpc || RegSpc == OddDblSpc) 447823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson SrcOpIdx = OpIdx++; 448823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 449823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 450823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 451823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 452823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 453823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the super-register source operand used for double-spaced subregs over 45419d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson // to the new instruction as an implicit operand. 455823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson if (SrcOpIdx != 0) { 456823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MachineOperand MO = MI.getOperand(SrcOpIdx); 45719d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson MO.setImplicit(true); 45819d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson MIB.addOperand(MO); 45919d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson } 460f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson // Add an implicit def for the super-register. 461f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); 46219d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson TransferImpOps(MI, MIB, MIB); 463b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 464b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng // Transfer memoperands. 465d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 466b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 467ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson MI.eraseFromParent(); 468ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson} 469ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 47001ba461af7eafc9d181a5c349487691f2e801438Bob Wilson/// ExpandVST - Translate VST pseudo instructions with Q, QQ or QQQQ register 47101ba461af7eafc9d181a5c349487691f2e801438Bob Wilson/// operands to real VST instructions with D register operands. 4728466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonvoid ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) { 473709d59255a3100c7d440c93069efa1f726677a27Bob Wilson MachineInstr &MI = *MBBI; 474709d59255a3100c7d440c93069efa1f726677a27Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 475709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 4768466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); 4778466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); 4788466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpc = TableEntry->RegSpacing; 4798466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumRegs = TableEntry->NumRegs; 4808466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 4818466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 4828466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TII->get(TableEntry->RealOpc)); 483709d59255a3100c7d440c93069efa1f726677a27Bob Wilson unsigned OpIdx = 0; 4848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->HasWriteBack) 48563569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 48663569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson 487709d59255a3100c7d440c93069efa1f726677a27Bob Wilson // Copy the addrmode6 operands. 48863569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 48963569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 49063569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson // Copy the am6offset operand. 4918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->HasWriteBack) 49263569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 493709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 494709d59255a3100c7d440c93069efa1f726677a27Bob Wilson bool SrcIsKill = MI.getOperand(OpIdx).isKill(); 495823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); 496709d59255a3100c7d440c93069efa1f726677a27Bob Wilson unsigned D0, D1, D2, D3; 4978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3); 4987e701979ad20796bc930b21de3888ccfa0d8b33dBob Wilson MIB.addReg(D0).addReg(D1); 499e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson if (NumRegs > 2) 5007e701979ad20796bc930b21de3888ccfa0d8b33dBob Wilson MIB.addReg(D2); 50101ba461af7eafc9d181a5c349487691f2e801438Bob Wilson if (NumRegs > 3) 5027e701979ad20796bc930b21de3888ccfa0d8b33dBob Wilson MIB.addReg(D3); 503823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 504823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 505823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 506823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 507823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 508d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner if (SrcIsKill) // Add an implicit kill for the super-reg. 509d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->addRegisterKilled(SrcReg, TRI, true); 510bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson TransferImpOps(MI, MIB, MIB); 511b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 512b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng // Transfer memoperands. 513d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 514b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 515709d59255a3100c7d440c93069efa1f726677a27Bob Wilson MI.eraseFromParent(); 516709d59255a3100c7d440c93069efa1f726677a27Bob Wilson} 517709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 5188466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// ExpandLaneOp - Translate VLD*LN and VST*LN instructions with Q, QQ or QQQQ 5198466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// register operands to real instructions with D register operands. 5208466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonvoid ARMExpandPseudo::ExpandLaneOp(MachineBasicBlock::iterator &MBBI) { 5218466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstr &MI = *MBBI; 5228466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 5238466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5248466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); 5258466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(TableEntry && "NEONLdStTable lookup failed"); 5268466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpc = TableEntry->RegSpacing; 5278466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumRegs = TableEntry->NumRegs; 5288466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned RegElts = TableEntry->RegElts; 5298466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5308466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 5318466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TII->get(TableEntry->RealOpc)); 5328466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned OpIdx = 0; 5338466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // The lane operand is always the 3rd from last operand, before the 2 5348466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // predicate operands. 5358466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned Lane = MI.getOperand(MI.getDesc().getNumOperands() - 3).getImm(); 5368466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5378466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Adjust the lane and spacing as needed for Q registers. 5388466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(RegSpc != OddDblSpc && "unexpected register spacing for VLD/VST-lane"); 5398466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (RegSpc == EvenDblSpc && Lane >= RegElts) { 5408466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson RegSpc = OddDblSpc; 5418466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson Lane -= RegElts; 5428466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 5438466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(Lane < RegElts && "out of range lane for VLD/VST-lane"); 5448466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 545584520e8e2c1f8cc04bc8dd4dc4ea6c390627317Ted Kremenek unsigned D0 = 0, D1 = 0, D2 = 0, D3 = 0; 546fe3ac088ee0a536f60b3c30ad97703d5d6cd2167Bob Wilson unsigned DstReg = 0; 547fe3ac088ee0a536f60b3c30ad97703d5d6cd2167Bob Wilson bool DstIsDead = false; 5488466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->IsLoad) { 5498466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson DstIsDead = MI.getOperand(OpIdx).isDead(); 5508466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson DstReg = MI.getOperand(OpIdx++).getReg(); 5518466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3); 552b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); 553b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson if (NumRegs > 1) 554b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); 5558466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 2) 5568466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); 5578466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 3) 5588466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); 5598466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 5608466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5618466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->HasWriteBack) 5628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5638466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5648466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Copy the addrmode6 operands. 5658466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5668466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5678466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Copy the am6offset operand. 5688466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->HasWriteBack) 5698466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5708466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5718466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Grab the super-register source. 5728466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineOperand MO = MI.getOperand(OpIdx++); 5738466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (!TableEntry->IsLoad) 5748466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(MO.getReg(), RegSpc, TRI, D0, D1, D2, D3); 5758466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5768466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Add the subregs as sources of the new instruction. 5778466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned SrcFlags = (getUndefRegState(MO.isUndef()) | 5788466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson getKillRegState(MO.isKill())); 579b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D0, SrcFlags); 580b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson if (NumRegs > 1) 581b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D1, SrcFlags); 5828466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 2) 5838466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D2, SrcFlags); 5848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 3) 5858466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D3, SrcFlags); 5868466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5878466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Add the lane number operand. 5888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addImm(Lane); 589823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson OpIdx += 1; 590823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 591823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 592823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 593823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Copy the super-register source to be an implicit source. 5968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MO.setImplicit(true); 5978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MO); 5988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->IsLoad) 5998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Add an implicit def for the super-register. 6008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); 6018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TransferImpOps(MI, MIB, MIB); 6028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MI.eraseFromParent(); 6038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 6048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 605bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson/// ExpandVTBL - Translate VTBL and VTBX pseudo instructions with Q or QQ 606bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson/// register operands to real instructions with D register operands. 607bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilsonvoid ARMExpandPseudo::ExpandVTBL(MachineBasicBlock::iterator &MBBI, 608bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned Opc, bool IsExt, unsigned NumRegs) { 609bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MachineInstr &MI = *MBBI; 610bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 611bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 612bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); 613bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned OpIdx = 0; 614bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 615bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson // Transfer the destination register operand. 616bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 617bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson if (IsExt) 618bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 619bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 620bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson bool SrcIsKill = MI.getOperand(OpIdx).isKill(); 621bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); 622bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned D0, D1, D2, D3; 623bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson GetDSubRegs(SrcReg, SingleSpc, TRI, D0, D1, D2, D3); 624bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addReg(D0).addReg(D1); 625bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson if (NumRegs > 2) 626bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addReg(D2); 627bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson if (NumRegs > 3) 628bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addReg(D3); 629bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 630bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson // Copy the other source register operand. 631823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 632823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 633823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 634823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 635823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 636bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 637d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner if (SrcIsKill) // Add an implicit kill for the super-reg. 638d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->addRegisterKilled(SrcReg, TRI, true); 639bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson TransferImpOps(MI, MIB, MIB); 640bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MI.eraseFromParent(); 641bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson} 642bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 6439fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Chengvoid ARMExpandPseudo::ExpandMOV32BitImm(MachineBasicBlock &MBB, 6449fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator &MBBI) { 6459fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstr &MI = *MBBI; 6469fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Opcode = MI.getOpcode(); 6479fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned PredReg = 0; 6489fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng ARMCC::CondCodes Pred = llvm::getInstrPredicate(&MI, PredReg); 6499fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned DstReg = MI.getOperand(0).getReg(); 6509fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool DstIsDead = MI.getOperand(0).isDead(); 6519fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool isCC = Opcode == ARM::MOVCCi32imm || Opcode == ARM::t2MOVCCi32imm; 6529fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const MachineOperand &MO = MI.getOperand(isCC ? 2 : 1); 6539fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstrBuilder LO16, HI16; 6549fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 6559fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (!STI->hasV6T2Ops() && 6569fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng (Opcode == ARM::MOVi32imm || Opcode == ARM::MOVCCi32imm)) { 6579fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng // Expand into a movi + orr. 6589fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg); 6599fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::ORRri)) 6609fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 6619fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg); 6629fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 6639fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng assert (MO.isImm() && "MOVi32imm w/ non-immediate source operand!"); 6649fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned ImmVal = (unsigned)MO.getImm(); 6659fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned SOImmValV1 = ARM_AM::getSOImmTwoPartFirst(ImmVal); 6669fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned SOImmValV2 = ARM_AM::getSOImmTwoPartSecond(ImmVal); 6679fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = LO16.addImm(SOImmValV1); 6689fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = HI16.addImm(SOImmValV2); 669d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 670d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 6719fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16.addImm(Pred).addReg(PredReg).addReg(0); 6729fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16.addImm(Pred).addReg(PredReg).addReg(0); 6739fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TransferImpOps(MI, LO16, HI16); 6749fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MI.eraseFromParent(); 6759fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return; 6769fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 677b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 6789fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned LO16Opc = 0; 6799fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned HI16Opc = 0; 6809fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (Opcode == ARM::t2MOVi32imm || Opcode == ARM::t2MOVCCi32imm) { 6819fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16Opc = ARM::t2MOVi16; 6829fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16Opc = ARM::t2MOVTi16; 6839fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } else { 6849fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16Opc = ARM::MOVi16; 6859fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16Opc = ARM::MOVTi16; 6869fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 687b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 6889fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LO16Opc), DstReg); 6899fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc)) 6909fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 6919fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg); 6929fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 6939fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (MO.isImm()) { 6949fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Imm = MO.getImm(); 6959fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Lo16 = Imm & 0xffff; 6969fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Hi16 = (Imm >> 16) & 0xffff; 6979fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = LO16.addImm(Lo16); 6989fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = HI16.addImm(Hi16); 6999fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } else { 7009fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const GlobalValue *GV = MO.getGlobal(); 7019fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned TF = MO.getTargetFlags(); 7029fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = LO16.addGlobalAddress(GV, MO.getOffset(), TF | ARMII::MO_LO16); 7039fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = HI16.addGlobalAddress(GV, MO.getOffset(), TF | ARMII::MO_HI16); 7049fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 705709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 706d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 707d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 7089fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16.addImm(Pred).addReg(PredReg); 7099fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16.addImm(Pred).addReg(PredReg); 7109fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 7119fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TransferImpOps(MI, LO16, HI16); 7129fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MI.eraseFromParent(); 7139fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng} 7149fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 7159fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Chengbool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB, 7169fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator MBBI) { 7179fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstr &MI = *MBBI; 7189fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Opcode = MI.getOpcode(); 7199fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng switch (Opcode) { 7209fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng default: 7219fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return false; 722f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach case ARM::VMOVScc: 723f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach case ARM::VMOVDcc: { 724f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach unsigned newOpc = Opcode == ARM::VMOVScc ? ARM::VMOVS : ARM::VMOVD; 725f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(newOpc), 726f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach MI.getOperand(1).getReg()) 727f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach .addReg(MI.getOperand(2).getReg(), 728f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach getKillRegState(MI.getOperand(2).isKill())) 729f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 730f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach .addReg(MI.getOperand(4).getReg()); 731f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach 732f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach MI.eraseFromParent(); 733f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach return true; 734f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach } 735efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach case ARM::t2MOVCCr: 736d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach case ARM::MOVCCr: { 737efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach unsigned Opc = AFI->isThumbFunction() ? ARM::t2MOVr : ARM::MOVr; 738efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc), 739d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach MI.getOperand(1).getReg()) 740d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(2).getReg(), 741d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach getKillRegState(MI.getOperand(2).isKill())) 742d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 743d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(4).getReg()) 744d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(0); // 's' bit 745d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach 746d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach MI.eraseFromParent(); 747d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach return true; 748d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach } 749152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson case ARM::MOVCCsi: { 750152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi), 751152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson (MI.getOperand(1).getReg())) 752152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addReg(MI.getOperand(2).getReg(), 753152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson getKillRegState(MI.getOperand(2).isKill())) 754152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addImm(MI.getOperand(3).getImm()) 755152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addImm(MI.getOperand(4).getImm()) // 'pred' 756152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addReg(MI.getOperand(5).getReg()) 757152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addReg(0); // 's' bit 758152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson 759152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson MI.eraseFromParent(); 760152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson return true; 761152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson } 762152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson 76392a202213bb4c20301abf6ab64e46df3695e60bfOwen Anderson case ARM::MOVCCsr: { 764152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsr), 765d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach (MI.getOperand(1).getReg())) 766d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(2).getReg(), 767d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach getKillRegState(MI.getOperand(2).isKill())) 768d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(3).getReg(), 769d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach getKillRegState(MI.getOperand(3).isKill())) 770d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addImm(MI.getOperand(4).getImm()) 771d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addImm(MI.getOperand(5).getImm()) // 'pred' 772d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(6).getReg()) 773d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(0); // 's' bit 7743906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach 7753906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.eraseFromParent(); 7763906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach return true; 7773906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach } 7783906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach case ARM::MOVCCi16: { 7793906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi16), 7803906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.getOperand(1).getReg()) 7813906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(2).getImm()) 7823906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 7833906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addReg(MI.getOperand(4).getReg()); 7843906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach 7853906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.eraseFromParent(); 7863906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach return true; 7873906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach } 788efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach case ARM::t2MOVCCi: 7893906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach case ARM::MOVCCi: { 790efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach unsigned Opc = AFI->isThumbFunction() ? ARM::t2MOVi : ARM::MOVi; 791efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc), 7923906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.getOperand(1).getReg()) 7933906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(2).getImm()) 7943906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 7953906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addReg(MI.getOperand(4).getReg()) 7963906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addReg(0); // 's' bit 797e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach 798e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach MI.eraseFromParent(); 799e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach return true; 800e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach } 801e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach case ARM::MVNCCi: { 802e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MVNi), 803e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach MI.getOperand(1).getReg()) 804e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addImm(MI.getOperand(2).getImm()) 805e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 806e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addReg(MI.getOperand(4).getReg()) 807e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addReg(0); // 's' bit 808d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach 809d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach MI.eraseFromParent(); 810d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach return true; 811d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach } 812e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach case ARM::Int_eh_sjlj_dispatchsetup: { 813e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach MachineFunction &MF = *MI.getParent()->getParent(); 814e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach const ARMBaseInstrInfo *AII = 815e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach static_cast<const ARMBaseInstrInfo*>(TII); 816e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach const ARMBaseRegisterInfo &RI = AII->getRegisterInfo(); 817e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach // For functions using a base pointer, we rematerialize it (via the frame 818e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach // pointer) here since eh.sjlj.setjmp and eh.sjlj.longjmp don't do it 819e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach // for us. Otherwise, expand to nothing. 820e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach if (RI.hasBasePointer(MF)) { 821e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach int32_t NumBytes = AFI->getFramePtrSpillOffset(); 822e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach unsigned FramePtr = RI.getFrameRegister(MF); 82316c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov assert(MF.getTarget().getFrameLowering()->hasFP(MF) && 8247920d96964d707a3af85332c98d95b2fabc3d5c9Benjamin Kramer "base pointer without frame pointer?"); 825e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach 826e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach if (AFI->isThumb2Function()) { 827e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach llvm::emitT2RegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, 828e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach FramePtr, -NumBytes, ARMCC::AL, 0, *TII); 829e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } else if (AFI->isThumbFunction()) { 83057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov llvm::emitThumbRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, 83157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov FramePtr, -NumBytes, *TII, RI); 832e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } else { 833e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach llvm::emitARMRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, 834e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach FramePtr, -NumBytes, ARMCC::AL, 0, 835e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach *TII); 836e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } 8378b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach // If there's dynamic realignment, adjust for it. 838b8e67fc92b0a508e3782b782baa98a6d56d5d7eaJim Grosbach if (RI.needsStackRealignment(MF)) { 8398b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach MachineFrameInfo *MFI = MF.getFrameInfo(); 8408b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach unsigned MaxAlign = MFI->getMaxAlignment(); 8418b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach assert (!AFI->isThumb1OnlyFunction()); 8428b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach // Emit bic r6, r6, MaxAlign 8438b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach unsigned bicOpc = AFI->isThumbFunction() ? 8448b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach ARM::t2BICri : ARM::BICri; 8458b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), 8468b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach TII->get(bicOpc), ARM::R6) 8478b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach .addReg(ARM::R6, RegState::Kill) 8488b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach .addImm(MaxAlign-1))); 8498b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach } 850e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach 851e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } 852e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach MI.eraseFromParent(); 8539fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 854e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } 855e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach 8567032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach case ARM::MOVsrl_flag: 8577032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach case ARM::MOVsra_flag: { 8587032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach // These are just fancy MOVs insructions. 859152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi), 860dbbd99faf1d661f03a9dfc1551d7537c34d64beeDuncan Sands MI.getOperand(0).getReg()) 8619fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addOperand(MI.getOperand(1)) 862aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? 863aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach ARM_AM::lsr : ARM_AM::asr), 864aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach 1))) 8659fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(ARM::CPSR, RegState::Define); 8667032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MI.eraseFromParent(); 8679fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 8687032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach } 8697032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach case ARM::RRX: { 8707032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach // This encodes as "MOVs Rd, Rm, rrx 8717032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MachineInstrBuilder MIB = 8728e0c7697fd9b9354856074efc06eea9f6d80015cJim Grosbach AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),TII->get(ARM::MOVsi), 8737032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MI.getOperand(0).getReg()) 8749fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addOperand(MI.getOperand(1)) 8759fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addImm(ARM_AM::getSORegOpc(ARM_AM::rrx, 0))) 8767032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach .addReg(0); 8777032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach TransferImpOps(MI, MIB, MIB); 8787032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MI.eraseFromParent(); 8799fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 8807032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach } 881ff97eb0cf4394090570feaa327d1237ba4b935e2Jim Grosbach case ARM::tTPsoft: 882a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim case ARM::TPsoft: { 883971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson MachineInstrBuilder MIB = 884a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim BuildMI(MBB, MBBI, MI.getDebugLoc(), 885ff97eb0cf4394090570feaa327d1237ba4b935e2Jim Grosbach TII->get(Opcode == ARM::tTPsoft ? ARM::tBL : ARM::BL)) 886a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim .addExternalSymbol("__aeabi_read_tp", 0); 887a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim 888d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 889a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim TransferImpOps(MI, MIB, MIB); 890a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim MI.eraseFromParent(); 8919fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 8922fe813af23e682b418ecd477144fe070be325419Bill Wendling } 893bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson case ARM::tLDRpci_pic: 894b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng case ARM::t2LDRpci_pic: { 895b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng unsigned NewLdOpc = (Opcode == ARM::tLDRpci_pic) 896971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson ? ARM::tLDRpci : ARM::t2LDRpci; 897b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng unsigned DstReg = MI.getOperand(0).getReg(); 898431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng bool DstIsDead = MI.getOperand(0).isDead(); 899431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder MIB1 = 900971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), 901971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson TII->get(NewLdOpc), DstReg) 902971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson .addOperand(MI.getOperand(1))); 903d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB1->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 904431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 905431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng TII->get(ARM::tPICADD)) 90601b35c25deee3d4cab339e620c12c721e627d609Bob Wilson .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 907431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng .addReg(DstReg) 908431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng .addOperand(MI.getOperand(2)); 909431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng TransferImpOps(MI, MIB1, MIB2); 910b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng MI.eraseFromParent(); 9119fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 912b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng } 913431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng 91453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOV_ga_dyn: 91553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOV_ga_pcrel: 91653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOV_ga_pcrel_ldr: 91753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOV_ga_dyn: 91853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOV_ga_pcrel: { 91953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng // Expand into movw + movw. Also "add pc" / ldr [pc] in PIC mode. 9209fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned LabelId = AFI->createPICLabelUId(); 921b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng unsigned DstReg = MI.getOperand(0).getReg(); 922431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng bool DstIsDead = MI.getOperand(0).isDead(); 9239fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const MachineOperand &MO1 = MI.getOperand(1); 9249fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const GlobalValue *GV = MO1.getGlobal(); 9259fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned TF = MO1.getTargetFlags(); 926aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach bool isARM = (Opcode != ARM::t2MOV_ga_pcrel && Opcode!=ARM::t2MOV_ga_dyn); 92753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng bool isPIC = (Opcode != ARM::MOV_ga_dyn && Opcode != ARM::t2MOV_ga_dyn); 92853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned LO16Opc = isARM ? ARM::MOVi16_ga_pcrel : ARM::t2MOVi16_ga_pcrel; 929aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach unsigned HI16Opc = isARM ? ARM::MOVTi16_ga_pcrel :ARM::t2MOVTi16_ga_pcrel; 93053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned LO16TF = isPIC 93153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? ARMII::MO_LO16_NONLAZY_PIC : ARMII::MO_LO16_NONLAZY; 93253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned HI16TF = isPIC 93353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? ARMII::MO_HI16_NONLAZY_PIC : ARMII::MO_HI16_NONLAZY; 9349fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned PICAddOpc = isARM 93553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? (Opcode == ARM::MOV_ga_pcrel_ldr ? ARM::PICLDR : ARM::PICADD) 9369fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng : ARM::tPICADD; 9379fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstrBuilder MIB1 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 9389fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TII->get(LO16Opc), DstReg) 93953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng .addGlobalAddress(GV, MO1.getOffset(), TF | LO16TF) 9409fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addImm(LabelId); 94153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 94253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TII->get(HI16Opc), DstReg) 9439fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg) 94453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng .addGlobalAddress(GV, MO1.getOffset(), TF | HI16TF) 9459fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addImm(LabelId); 94653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (!isPIC) { 94753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TransferImpOps(MI, MIB1, MIB2); 94853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MI.eraseFromParent(); 94953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng return true; 95053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } 95153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng 95253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MachineInstrBuilder MIB3 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 9539fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TII->get(PICAddOpc)) 95401b35c25deee3d4cab339e620c12c721e627d609Bob Wilson .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 9559fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg).addImm(LabelId); 9569fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (isARM) { 95753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng AddDefaultPred(MIB3); 95853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (Opcode == ARM::MOV_ga_pcrel_ldr) 959d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB2->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 9605de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng } 96153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TransferImpOps(MI, MIB1, MIB3); 962b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng MI.eraseFromParent(); 9639fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 964d929f7773812535271ae6969331f8164c1f7f3b2Evan Cheng } 965d929f7773812535271ae6969331f8164c1f7f3b2Evan Cheng 9669fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::MOVi32imm: 9679fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::MOVCCi32imm: 9689fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::t2MOVi32imm: 9699fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::t2MOVCCi32imm: 9709fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng ExpandMOV32BitImm(MBB, MBBI); 9719fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 9729fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 973848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson case ARM::VLDMQIA: { 974848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson unsigned NewOpc = ARM::VLDMDIA; 9759d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MachineInstrBuilder MIB = 97673fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); 9779d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned OpIdx = 0; 97873fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 9799d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Grab the Q register destination. 9809d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson bool DstIsDead = MI.getOperand(OpIdx).isDead(); 9819d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned DstReg = MI.getOperand(OpIdx++).getReg(); 98273fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 98373fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling // Copy the source register. 9849d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 98573fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 9869d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Copy the predicate operands. 9879d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 9889d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 98973fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 9909d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Add the destination operands (D subregs). 9919d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D0 = TRI->getSubReg(DstReg, ARM::dsub_0); 9929d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D1 = TRI->getSubReg(DstReg, ARM::dsub_1); 9939d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)) 9949d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson .addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); 99573fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 9969d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Add an implicit def for the super-register. 9979d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); 9989d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson TransferImpOps(MI, MIB, MIB); 9999d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MI.eraseFromParent(); 10009fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 10019d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson } 10029d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson 1003848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson case ARM::VSTMQIA: { 1004848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson unsigned NewOpc = ARM::VSTMDIA; 10059d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MachineInstrBuilder MIB = 100673fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); 10079d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned OpIdx = 0; 100873fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10099d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Grab the Q register source. 10109d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson bool SrcIsKill = MI.getOperand(OpIdx).isKill(); 10119d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); 101273fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 101373fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling // Copy the destination register. 10149d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 101573fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10169d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Copy the predicate operands. 10179d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 10189d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 101973fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10209d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Add the source operands (D subregs). 10219d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D0 = TRI->getSubReg(SrcReg, ARM::dsub_0); 10229d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D1 = TRI->getSubReg(SrcReg, ARM::dsub_1); 10239d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addReg(D0).addReg(D1); 102473fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 1025d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner if (SrcIsKill) // Add an implicit kill for the Q register. 1026d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->addRegisterKilled(SrcReg, TRI, true); 102773fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10289d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson TransferImpOps(MI, MIB, MIB); 10299d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MI.eraseFromParent(); 10309fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 10319d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson } 103265dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach case ARM::VDUPfqf: 103365dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach case ARM::VDUPfdf:{ 10348b8515c225c799e9df69bde8ffffa3c72cec9445Jim Grosbach unsigned NewOpc = Opcode == ARM::VDUPfqf ? ARM::VDUPLN32q : 10358b8515c225c799e9df69bde8ffffa3c72cec9445Jim Grosbach ARM::VDUPLN32d; 103665dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MachineInstrBuilder MIB = 103765dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); 103865dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned OpIdx = 0; 103965dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned SrcReg = MI.getOperand(1).getReg(); 104065dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned Lane = getARMRegisterNumbering(SrcReg) & 1; 104165dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned DReg = TRI->getMatchingSuperReg(SrcReg, 1042b181ad34869c4fa19c527ab8dfd5d438ad8b9bb3Jim Grosbach Lane & 1 ? ARM::ssub_1 : ARM::ssub_0, 1043b181ad34869c4fa19c527ab8dfd5d438ad8b9bb3Jim Grosbach &ARM::DPR_VFP2RegClass); 104465dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // The lane is [0,1] for the containing DReg superregister. 104565dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // Copy the dst/src register operands. 104665dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addOperand(MI.getOperand(OpIdx++)); 104765dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addReg(DReg); 104865dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach ++OpIdx; 104965dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // Add the lane select operand. 105065dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addImm(Lane); 105165dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // Add the predicate operands. 105265dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addOperand(MI.getOperand(OpIdx++)); 105365dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addOperand(MI.getOperand(OpIdx++)); 105465dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach 105565dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach TransferImpOps(MI, MIB, MIB); 105665dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MI.eraseFromParent(); 10579fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 105865dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach } 10599d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson 1060ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q8Pseudo: 1061ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q16Pseudo: 1062ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q32Pseudo: 1063ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q64Pseudo: 1064ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q8Pseudo_UPD: 1065ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q16Pseudo_UPD: 1066ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q32Pseudo_UPD: 1067ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q64Pseudo_UPD: 1068ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d8Pseudo: 1069ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d16Pseudo: 1070ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d32Pseudo: 1071ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q8Pseudo: 1072ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q16Pseudo: 1073ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q32Pseudo: 1074ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d8Pseudo_UPD: 1075ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d16Pseudo_UPD: 1076ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d32Pseudo_UPD: 1077ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q8Pseudo_UPD: 1078ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q16Pseudo_UPD: 1079ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q32Pseudo_UPD: 1080f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d8Pseudo: 1081f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d16Pseudo: 1082f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d32Pseudo: 1083ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1d64TPseudo: 1084f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d8Pseudo_UPD: 1085f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d16Pseudo_UPD: 1086f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d32Pseudo_UPD: 1087ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1d64TPseudo_UPD: 1088f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q8Pseudo_UPD: 1089f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q16Pseudo_UPD: 1090f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q32Pseudo_UPD: 10917de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD3q8oddPseudo: 10927de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD3q16oddPseudo: 10937de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD3q32oddPseudo: 1094f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q8oddPseudo_UPD: 1095f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q16oddPseudo_UPD: 1096f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q32oddPseudo_UPD: 1097f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d8Pseudo: 1098f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d16Pseudo: 1099f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d32Pseudo: 1100ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1d64QPseudo: 1101f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d8Pseudo_UPD: 1102f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d16Pseudo_UPD: 1103f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d32Pseudo_UPD: 1104ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1d64QPseudo_UPD: 1105f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q8Pseudo_UPD: 1106f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q16Pseudo_UPD: 1107f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q32Pseudo_UPD: 11087de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD4q8oddPseudo: 11097de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD4q16oddPseudo: 11107de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD4q32oddPseudo: 1111f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q8oddPseudo_UPD: 1112f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q16oddPseudo_UPD: 1113f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q32oddPseudo_UPD: 11142a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq8Pseudo: 11152a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq16Pseudo: 11162a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq32Pseudo: 11172a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq8Pseudo_UPD: 11182a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq16Pseudo_UPD: 11192a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq32Pseudo_UPD: 1120b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd8Pseudo: 1121b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd16Pseudo: 1122b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd32Pseudo: 1123b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd8Pseudo_UPD: 1124b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd16Pseudo_UPD: 1125b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd32Pseudo_UPD: 112686c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd8Pseudo: 112786c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd16Pseudo: 112886c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd32Pseudo: 112986c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd8Pseudo_UPD: 113086c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd16Pseudo_UPD: 113186c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd32Pseudo_UPD: 11326c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd8Pseudo: 11336c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd16Pseudo: 11346c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd32Pseudo: 11356c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd8Pseudo_UPD: 11366c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd16Pseudo_UPD: 11376c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd32Pseudo_UPD: 11388466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson ExpandVLD(MBBI); 11399fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 1140ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 1141e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q8Pseudo: 1142e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q16Pseudo: 1143e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q32Pseudo: 1144e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q64Pseudo: 1145e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q8Pseudo_UPD: 1146e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q16Pseudo_UPD: 1147e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q32Pseudo_UPD: 1148e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q64Pseudo_UPD: 1149e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d8Pseudo: 1150e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d16Pseudo: 1151e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d32Pseudo: 1152e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q8Pseudo: 1153e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q16Pseudo: 1154e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q32Pseudo: 1155e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d8Pseudo_UPD: 1156e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d16Pseudo_UPD: 1157e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d32Pseudo_UPD: 1158e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q8Pseudo_UPD: 1159e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q16Pseudo_UPD: 1160e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q32Pseudo_UPD: 116101ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d8Pseudo: 116201ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d16Pseudo: 116301ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d32Pseudo: 116401ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST1d64TPseudo: 116501ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d8Pseudo_UPD: 116601ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d16Pseudo_UPD: 116701ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d32Pseudo_UPD: 116801ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST1d64TPseudo_UPD: 116901ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q8Pseudo_UPD: 117001ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q16Pseudo_UPD: 117101ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q32Pseudo_UPD: 11727de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST3q8oddPseudo: 11737de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST3q16oddPseudo: 11747de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST3q32oddPseudo: 117501ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q8oddPseudo_UPD: 117601ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q16oddPseudo_UPD: 117701ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q32oddPseudo_UPD: 1178709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d8Pseudo: 1179709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d16Pseudo: 1180709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d32Pseudo: 118170e48b23a3455e4689ee24cec4eb153d67223e86Bob Wilson case ARM::VST1d64QPseudo: 1182709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d8Pseudo_UPD: 1183709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d16Pseudo_UPD: 1184709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d32Pseudo_UPD: 118570e48b23a3455e4689ee24cec4eb153d67223e86Bob Wilson case ARM::VST1d64QPseudo_UPD: 1186709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q8Pseudo_UPD: 1187709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q16Pseudo_UPD: 1188709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q32Pseudo_UPD: 11897de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST4q8oddPseudo: 11907de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST4q16oddPseudo: 11917de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST4q32oddPseudo: 1192709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q8oddPseudo_UPD: 1193709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q16oddPseudo_UPD: 1194709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q32oddPseudo_UPD: 11958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson ExpandVST(MBBI); 11969fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 11978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1198b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq8Pseudo: 1199b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq16Pseudo: 1200b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq32Pseudo: 1201b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq8Pseudo_UPD: 1202b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq16Pseudo_UPD: 1203b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq32Pseudo_UPD: 12048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd8Pseudo: 12058466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd16Pseudo: 12068466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd32Pseudo: 12078466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq16Pseudo: 12088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq32Pseudo: 12098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd8Pseudo_UPD: 12108466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd16Pseudo_UPD: 12118466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd32Pseudo_UPD: 12128466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq16Pseudo_UPD: 12138466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq32Pseudo_UPD: 12148466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd8Pseudo: 12158466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd16Pseudo: 12168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd32Pseudo: 12178466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq16Pseudo: 12188466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq32Pseudo: 12198466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd8Pseudo_UPD: 12208466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd16Pseudo_UPD: 12218466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd32Pseudo_UPD: 12228466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq16Pseudo_UPD: 12238466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq32Pseudo_UPD: 12248466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd8Pseudo: 12258466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd16Pseudo: 12268466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd32Pseudo: 12278466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq16Pseudo: 12288466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq32Pseudo: 12298466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd8Pseudo_UPD: 12308466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd16Pseudo_UPD: 12318466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd32Pseudo_UPD: 12328466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq16Pseudo_UPD: 12338466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq32Pseudo_UPD: 1234d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq8Pseudo: 1235d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq16Pseudo: 1236d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq32Pseudo: 1237d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq8Pseudo_UPD: 1238d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq16Pseudo_UPD: 1239d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq32Pseudo_UPD: 12408466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd8Pseudo: 12418466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd16Pseudo: 12428466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd32Pseudo: 12438466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq16Pseudo: 12448466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq32Pseudo: 12458466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd8Pseudo_UPD: 12468466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd16Pseudo_UPD: 12478466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd32Pseudo_UPD: 12488466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq16Pseudo_UPD: 12498466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq32Pseudo_UPD: 12508466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd8Pseudo: 12518466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd16Pseudo: 12528466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd32Pseudo: 12538466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq16Pseudo: 12548466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq32Pseudo: 12558466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd8Pseudo_UPD: 12568466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd16Pseudo_UPD: 12578466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd32Pseudo_UPD: 12588466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq16Pseudo_UPD: 12598466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq32Pseudo_UPD: 12608466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd8Pseudo: 12618466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd16Pseudo: 12628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd32Pseudo: 12638466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq16Pseudo: 12648466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq32Pseudo: 12658466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd8Pseudo_UPD: 12668466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd16Pseudo_UPD: 12678466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd32Pseudo_UPD: 12688466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq16Pseudo_UPD: 12698466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq32Pseudo_UPD: 12708466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson ExpandLaneOp(MBBI); 12719fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 12729fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 12739fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBL2Pseudo: ExpandVTBL(MBBI, ARM::VTBL2, false, 2); return true; 12749fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBL3Pseudo: ExpandVTBL(MBBI, ARM::VTBL3, false, 3); return true; 12759fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBL4Pseudo: ExpandVTBL(MBBI, ARM::VTBL4, false, 4); return true; 12769fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBX2Pseudo: ExpandVTBL(MBBI, ARM::VTBX2, true, 2); return true; 12779fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBX3Pseudo: ExpandVTBL(MBBI, ARM::VTBX3, true, 3); return true; 12789fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBX4Pseudo: ExpandVTBL(MBBI, ARM::VTBX4, true, 4); return true; 12799fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 12809fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 12819fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return false; 12829fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng} 1283709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 12849fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Chengbool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) { 12859fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool Modified = false; 12869fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 12879fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); 12889fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng while (MBBI != E) { 12899fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator NMBBI = llvm::next(MBBI); 12909fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng Modified |= ExpandMI(MBB, MBBI); 1291b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng MBBI = NMBBI; 1292b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng } 1293b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1294b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return Modified; 1295b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 1296b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1297b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Chengbool ARMExpandPseudo::runOnMachineFunction(MachineFunction &MF) { 129853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const TargetMachine &TM = MF.getTarget(); 129953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TII = static_cast<const ARMBaseInstrInfo*>(TM.getInstrInfo()); 130053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TRI = TM.getRegisterInfo(); 130153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng STI = &TM.getSubtarget<ARMSubtarget>(); 13029fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng AFI = MF.getInfo<ARMFunctionInfo>(); 1303b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1304b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng bool Modified = false; 1305b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng for (MachineFunction::iterator MFI = MF.begin(), E = MF.end(); MFI != E; 1306b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng ++MFI) 1307b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng Modified |= ExpandMBB(*MFI); 1308e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen if (VerifyARMPseudo) 1309e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen MF.verify(this, "After expanding ARM pseudo instructions."); 1310b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return Modified; 1311b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 1312b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1313b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng/// createARMExpandPseudoPass - returns an instance of the pseudo instruction 1314b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng/// expansion pass. 1315b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan ChengFunctionPass *llvm::createARMExpandPseudoPass() { 1316b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return new ARMExpandPseudo(); 1317b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 1318