ARMExpandPseudoInsts.cpp revision a4e3c7fc4ba2d55695b0484480685698132eba20
1b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng//===-- ARMExpandPseudoInsts.cpp - Expand pseudo instructions -----*- C++ -*-=// 2b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 3b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// The LLVM Compiler Infrastructure 4b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 5b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// This file is distributed under the University of Illinois Open Source 6b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// License. See LICENSE.TXT for details. 7b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 8b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng//===----------------------------------------------------------------------===// 9b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 10656edcf138563068a2e7d52fb35f8de1375bad9aBob Wilson// This file contains a pass that expands pseudo instructions into target 11b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// instructions to allow proper scheduling, if-conversion, and other late 12b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// optimizations. This pass should be run after register allocation but before 13656edcf138563068a2e7d52fb35f8de1375bad9aBob Wilson// the post-regalloc scheduling pass. 14b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng// 15b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng//===----------------------------------------------------------------------===// 16b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 17b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#define DEBUG_TYPE "arm-pseudo" 18b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "ARM.h" 19b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "ARMBaseInstrInfo.h" 20e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "ARMBaseRegisterInfo.h" 21e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "ARMMachineFunctionInfo.h" 2265dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach#include "ARMRegisterInfo.h" 23ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng#include "MCTargetDesc/ARMAddressingModes.h" 24e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "llvm/CodeGen/MachineFrameInfo.h" 25b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "llvm/CodeGen/MachineFunctionPass.h" 26b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "llvm/CodeGen/MachineInstrBuilder.h" 2716c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov#include "llvm/Target/TargetFrameLowering.h" 284dbbe3433f7339ed277af55037ff6847f484e5abChris Lattner#include "llvm/Target/TargetRegisterInfo.h" 29e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen#include "llvm/Support/CommandLine.h" 30e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach#include "llvm/Support/raw_ostream.h" // FIXME: for debug only. remove! 31b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Chengusing namespace llvm; 32b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 33a67f14bf53737f9bb0afefa28e08c4aac6ec4804Benjamin Kramerstatic cl::opt<bool> 34e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund OlesenVerifyARMPseudo("verify-arm-pseudo-expand", cl::Hidden, 35e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen cl::desc("Verify machine code after expanding ARM pseudos")); 36e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen 37b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Chengnamespace { 38b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng class ARMExpandPseudo : public MachineFunctionPass { 39b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng public: 40b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng static char ID; 4190c579de5a383cee278acc3f7e7b9d0a656e6a35Owen Anderson ARMExpandPseudo() : MachineFunctionPass(ID) {} 42b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 43e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach const ARMBaseInstrInfo *TII; 44d929f7773812535271ae6969331f8164c1f7f3b2Evan Cheng const TargetRegisterInfo *TRI; 45893d7fe2098cc81ba1b4ce0ed71f6f614843961fEvan Cheng const ARMSubtarget *STI; 469fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng ARMFunctionInfo *AFI; 47b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 48b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng virtual bool runOnMachineFunction(MachineFunction &Fn); 49b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 50b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng virtual const char *getPassName() const { 51b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return "ARM pseudo instruction expansion pass"; 52b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng } 53b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 54b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng private: 55431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng void TransferImpOps(MachineInstr &OldMI, 56431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI); 579fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool ExpandMI(MachineBasicBlock &MBB, 589fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator MBBI); 59b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng bool ExpandMBB(MachineBasicBlock &MBB); 608466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson void ExpandVLD(MachineBasicBlock::iterator &MBBI); 618466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson void ExpandVST(MachineBasicBlock::iterator &MBBI); 628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson void ExpandLaneOp(MachineBasicBlock::iterator &MBBI); 63bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson void ExpandVTBL(MachineBasicBlock::iterator &MBBI, 64bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned Opc, bool IsExt, unsigned NumRegs); 659fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng void ExpandMOV32BitImm(MachineBasicBlock &MBB, 669fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator &MBBI); 67b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng }; 68b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng char ARMExpandPseudo::ID = 0; 69b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 70b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 71431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng/// TransferImpOps - Transfer implicit operands on the pseudo instruction to 72431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng/// the instructions created from the expansion. 73431300797b84600fc9b4eb8ca283277d3e0674ebEvan Chengvoid ARMExpandPseudo::TransferImpOps(MachineInstr &OldMI, 74431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder &UseMI, 75431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder &DefMI) { 76e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &Desc = OldMI.getDesc(); 77431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng for (unsigned i = Desc.getNumOperands(), e = OldMI.getNumOperands(); 78431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng i != e; ++i) { 79431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng const MachineOperand &MO = OldMI.getOperand(i); 80431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng assert(MO.isReg() && MO.getReg()); 81431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng if (MO.isUse()) 8263569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson UseMI.addOperand(MO); 83431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng else 8463569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson DefMI.addOperand(MO); 85431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng } 86431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng} 87431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng 888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonnamespace { 898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Constants for register spacing in NEON load/store instructions. 908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // For quad-register load-lane and store-lane pseudo instructors, the 918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // spacing is initially assumed to be EvenDblSpc, and that is changed to 928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // OddDblSpc depending on the lane number operand. 938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson enum NEONRegSpacing { 948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson SingleSpc, 958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson EvenDblSpc, 968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson OddDblSpc 978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson }; 988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Entries for NEON load/store information table. The table is sorted by 1008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // PseudoOpc for fast binary-search lookups. 1018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson struct NEONLdStTableEntry { 1028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned PseudoOpc; 1038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned RealOpc; 1048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson bool IsLoad; 105f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach bool isUpdating; 106f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach bool hasWritebackOperand; 1078466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpacing; 1088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned char NumRegs; // D registers loaded or stored 1098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned char RegElts; // elements per D register; used for lane ops 110280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach // FIXME: Temporary flag to denote whether the real instruction takes 111280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach // a single register (like the encoding) or all of the registers in 112280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach // the list (like the asm syntax and the isel DAG). When all definitions 113280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach // are converted to take only the single encoded register, this will 114280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach // go away. 115280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach bool copyAllListRegs; 1168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1178466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Comparison methods for binary search of the table. 1188466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson bool operator<(const NEONLdStTableEntry &TE) const { 1198466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return PseudoOpc < TE.PseudoOpc; 1208466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 1218466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson friend bool operator<(const NEONLdStTableEntry &TE, unsigned PseudoOpc) { 1228466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return TE.PseudoOpc < PseudoOpc; 1238466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 124100c267249d1d03c4f96eede9877a4f9f54f2247Chandler Carruth friend bool LLVM_ATTRIBUTE_UNUSED operator<(unsigned PseudoOpc, 125100c267249d1d03c4f96eede9877a4f9f54f2247Chandler Carruth const NEONLdStTableEntry &TE) { 1268466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return PseudoOpc < TE.PseudoOpc; 1278466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 1288466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson }; 1298466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 1308466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1318466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonstatic const NEONLdStTableEntry NEONLdStTable[] = { 13213af222bab6fdc77d8193eb38e78a9cbed1d9d1fJim Grosbach{ ARM::VLD1DUPq16Pseudo, ARM::VLD1DUPq16, true, false, false, SingleSpc, 2, 4,false}, 133096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach{ ARM::VLD1DUPq16PseudoWB_fixed, ARM::VLD1DUPq16wb_fixed, true, true, true, SingleSpc, 2, 4,false}, 134096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach{ ARM::VLD1DUPq16PseudoWB_register, ARM::VLD1DUPq16wb_register, true, true, true, SingleSpc, 2, 4,false}, 13513af222bab6fdc77d8193eb38e78a9cbed1d9d1fJim Grosbach{ ARM::VLD1DUPq32Pseudo, ARM::VLD1DUPq32, true, false, false, SingleSpc, 2, 2,false}, 136096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach{ ARM::VLD1DUPq32PseudoWB_fixed, ARM::VLD1DUPq32wb_fixed, true, true, false, SingleSpc, 2, 2,false}, 137096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach{ ARM::VLD1DUPq32PseudoWB_register, ARM::VLD1DUPq32wb_register, true, true, true, SingleSpc, 2, 2,false}, 13813af222bab6fdc77d8193eb38e78a9cbed1d9d1fJim Grosbach{ ARM::VLD1DUPq8Pseudo, ARM::VLD1DUPq8, true, false, false, SingleSpc, 2, 8,false}, 139096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach{ ARM::VLD1DUPq8PseudoWB_fixed, ARM::VLD1DUPq8wb_fixed, true, true, false, SingleSpc, 2, 8,false}, 140096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach{ ARM::VLD1DUPq8PseudoWB_register, ARM::VLD1DUPq8wb_register, true, true, true, SingleSpc, 2, 8,false}, 141f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 142f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq16Pseudo, ARM::VLD1LNd16, true, false, false, EvenDblSpc, 1, 4 ,true}, 143f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq16Pseudo_UPD, ARM::VLD1LNd16_UPD, true, true, true, EvenDblSpc, 1, 4 ,true}, 144f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq32Pseudo, ARM::VLD1LNd32, true, false, false, EvenDblSpc, 1, 2 ,true}, 145f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq32Pseudo_UPD, ARM::VLD1LNd32_UPD, true, true, true, EvenDblSpc, 1, 2 ,true}, 146f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq8Pseudo, ARM::VLD1LNd8, true, false, false, EvenDblSpc, 1, 8 ,true}, 147f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1LNq8Pseudo_UPD, ARM::VLD1LNd8_UPD, true, true, true, EvenDblSpc, 1, 8 ,true}, 148f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 149f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1d64QPseudo, ARM::VLD1d64Q, true, false, false, SingleSpc, 4, 1 ,false}, 150f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1d64TPseudo, ARM::VLD1d64T, true, false, false, SingleSpc, 3, 1 ,false}, 151f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q16Pseudo, ARM::VLD1q16, true, false, false, SingleSpc, 2, 4 ,false}, 152f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q16PseudoWB_fixed, ARM::VLD1q16wb_fixed,true,false,false,SingleSpc, 2, 4 ,false}, 153f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q16PseudoWB_register, ARM::VLD1q16wb_register, true, true, true, SingleSpc, 2, 4 ,false}, 154f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q32Pseudo, ARM::VLD1q32, true, false, false, SingleSpc, 2, 2 ,false}, 155f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q32PseudoWB_fixed, ARM::VLD1q32wb_fixed,true,false, false,SingleSpc, 2, 2 ,false}, 156f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q32PseudoWB_register, ARM::VLD1q32wb_register, true, true, true, SingleSpc, 2, 2 ,false}, 157f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q64Pseudo, ARM::VLD1q64, true, false, false, SingleSpc, 2, 1 ,false}, 158f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q64PseudoWB_fixed, ARM::VLD1q64wb_fixed,true,false, false,SingleSpc, 2, 2 ,false}, 159f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q64PseudoWB_register, ARM::VLD1q64wb_register, true, true, true, SingleSpc, 2, 1 ,false}, 160f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q8Pseudo, ARM::VLD1q8, true, false, false, SingleSpc, 2, 8 ,false}, 161f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q8PseudoWB_fixed, ARM::VLD1q8wb_fixed,true,false, false, SingleSpc, 2, 8 ,false}, 162f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD1q8PseudoWB_register, ARM::VLD1q8wb_register,true,true, true,SingleSpc,2,8,false}, 163f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 164f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd16Pseudo, ARM::VLD2DUPd16, true, false, false, SingleSpc, 2, 4,true}, 165f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd16Pseudo_UPD, ARM::VLD2DUPd16_UPD, true, true, true, SingleSpc, 2, 4,true}, 166f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd32Pseudo, ARM::VLD2DUPd32, true, false, false, SingleSpc, 2, 2,true}, 167f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd32Pseudo_UPD, ARM::VLD2DUPd32_UPD, true, true, true, SingleSpc, 2, 2,true}, 168f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd8Pseudo, ARM::VLD2DUPd8, true, false, false, SingleSpc, 2, 8,true}, 169f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2DUPd8Pseudo_UPD, ARM::VLD2DUPd8_UPD, true, true, true, SingleSpc, 2, 8,true}, 170f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 171f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd16Pseudo, ARM::VLD2LNd16, true, false, false, SingleSpc, 2, 4 ,true}, 172f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd16Pseudo_UPD, ARM::VLD2LNd16_UPD, true, true, true, SingleSpc, 2, 4 ,true}, 173f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd32Pseudo, ARM::VLD2LNd32, true, false, false, SingleSpc, 2, 2 ,true}, 174f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd32Pseudo_UPD, ARM::VLD2LNd32_UPD, true, true, true, SingleSpc, 2, 2 ,true}, 175f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd8Pseudo, ARM::VLD2LNd8, true, false, false, SingleSpc, 2, 8 ,true}, 176f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNd8Pseudo_UPD, ARM::VLD2LNd8_UPD, true, true, true, SingleSpc, 2, 8 ,true}, 177f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNq16Pseudo, ARM::VLD2LNq16, true, false, false, EvenDblSpc, 2, 4 ,true}, 178f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNq16Pseudo_UPD, ARM::VLD2LNq16_UPD, true, true, true, EvenDblSpc, 2, 4 ,true}, 179f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNq32Pseudo, ARM::VLD2LNq32, true, false, false, EvenDblSpc, 2, 2 ,true}, 180f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2LNq32Pseudo_UPD, ARM::VLD2LNq32_UPD, true, true, true, EvenDblSpc, 2, 2 ,true}, 181f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 182f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2d16Pseudo, ARM::VLD2d16, true, false, false, SingleSpc, 2, 4 ,false}, 183a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2d16PseudoWB_fixed, ARM::VLD2d16wb_fixed, true, true, false, SingleSpc, 2, 4 ,false}, 184a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2d16PseudoWB_register, ARM::VLD2d16wb_register, true, true, true, SingleSpc, 2, 4 ,false}, 185f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2d32Pseudo, ARM::VLD2d32, true, false, false, SingleSpc, 2, 2 ,false}, 186a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2d32PseudoWB_fixed, ARM::VLD2d32wb_fixed, true, true, false, SingleSpc, 2, 2 ,false}, 187a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2d32PseudoWB_register, ARM::VLD2d32wb_register, true, true, true, SingleSpc, 2, 2 ,false}, 188f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2d8Pseudo, ARM::VLD2d8, true, false, false, SingleSpc, 2, 8 ,false}, 189a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2d8PseudoWB_fixed, ARM::VLD2d8wb_fixed, true, true, false, SingleSpc, 2, 8 ,false}, 190a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2d8PseudoWB_register, ARM::VLD2d8wb_register, true, true, true, SingleSpc, 2, 8 ,false}, 191f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 192f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2q16Pseudo, ARM::VLD2q16, true, false, false, SingleSpc, 4, 4 ,false}, 193a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2q16PseudoWB_fixed, ARM::VLD2q16wb_fixed, true, true, false, SingleSpc, 4, 4 ,false}, 194a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2q16PseudoWB_register, ARM::VLD2q16wb_register, true, true, true, SingleSpc, 4, 4 ,false}, 195f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2q32Pseudo, ARM::VLD2q32, true, false, false, SingleSpc, 4, 2 ,false}, 196a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2q32PseudoWB_fixed, ARM::VLD2q32wb_fixed, true, true, false, SingleSpc, 4, 2 ,false}, 197a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2q32PseudoWB_register, ARM::VLD2q32wb_register, true, true, true, SingleSpc, 4, 2 ,false}, 198f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD2q8Pseudo, ARM::VLD2q8, true, false, false, SingleSpc, 4, 8 ,false}, 199a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2q8PseudoWB_fixed, ARM::VLD2q8wb_fixed, true, true, false, SingleSpc, 4, 8 ,false}, 200a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach{ ARM::VLD2q8PseudoWB_register, ARM::VLD2q8wb_register, true, true, true, SingleSpc, 4, 8 ,false}, 201f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 202f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd16Pseudo, ARM::VLD3DUPd16, true, false, false, SingleSpc, 3, 4,true}, 203f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd16Pseudo_UPD, ARM::VLD3DUPd16_UPD, true, true, true, SingleSpc, 3, 4,true}, 204f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd32Pseudo, ARM::VLD3DUPd32, true, false, false, SingleSpc, 3, 2,true}, 205f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd32Pseudo_UPD, ARM::VLD3DUPd32_UPD, true, true, true, SingleSpc, 3, 2,true}, 206f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd8Pseudo, ARM::VLD3DUPd8, true, false, false, SingleSpc, 3, 8,true}, 207f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3DUPd8Pseudo_UPD, ARM::VLD3DUPd8_UPD, true, true, true, SingleSpc, 3, 8,true}, 208f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 209f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd16Pseudo, ARM::VLD3LNd16, true, false, false, SingleSpc, 3, 4 ,true}, 210f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd16Pseudo_UPD, ARM::VLD3LNd16_UPD, true, true, true, SingleSpc, 3, 4 ,true}, 211f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd32Pseudo, ARM::VLD3LNd32, true, false, false, SingleSpc, 3, 2 ,true}, 212f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd32Pseudo_UPD, ARM::VLD3LNd32_UPD, true, true, true, SingleSpc, 3, 2 ,true}, 213f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd8Pseudo, ARM::VLD3LNd8, true, false, false, SingleSpc, 3, 8 ,true}, 214f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNd8Pseudo_UPD, ARM::VLD3LNd8_UPD, true, true, true, SingleSpc, 3, 8 ,true}, 215f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNq16Pseudo, ARM::VLD3LNq16, true, false, false, EvenDblSpc, 3, 4 ,true}, 216f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNq16Pseudo_UPD, ARM::VLD3LNq16_UPD, true, true, true, EvenDblSpc, 3, 4 ,true}, 217f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNq32Pseudo, ARM::VLD3LNq32, true, false, false, EvenDblSpc, 3, 2 ,true}, 218f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3LNq32Pseudo_UPD, ARM::VLD3LNq32_UPD, true, true, true, EvenDblSpc, 3, 2 ,true}, 219f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 220f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d16Pseudo, ARM::VLD3d16, true, false, false, SingleSpc, 3, 4 ,true}, 221f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d16Pseudo_UPD, ARM::VLD3d16_UPD, true, true, true, SingleSpc, 3, 4 ,true}, 222f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d32Pseudo, ARM::VLD3d32, true, false, false, SingleSpc, 3, 2 ,true}, 223f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d32Pseudo_UPD, ARM::VLD3d32_UPD, true, true, true, SingleSpc, 3, 2 ,true}, 224f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d8Pseudo, ARM::VLD3d8, true, false, false, SingleSpc, 3, 8 ,true}, 225f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3d8Pseudo_UPD, ARM::VLD3d8_UPD, true, true, true, SingleSpc, 3, 8 ,true}, 226f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 227f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q16Pseudo_UPD, ARM::VLD3q16_UPD, true, true, true, EvenDblSpc, 3, 4 ,true}, 228f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q16oddPseudo, ARM::VLD3q16, true, false, false, OddDblSpc, 3, 4 ,true}, 229f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q16oddPseudo_UPD, ARM::VLD3q16_UPD, true, true, true, OddDblSpc, 3, 4 ,true}, 230f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q32Pseudo_UPD, ARM::VLD3q32_UPD, true, true, true, EvenDblSpc, 3, 2 ,true}, 231f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q32oddPseudo, ARM::VLD3q32, true, false, false, OddDblSpc, 3, 2 ,true}, 232f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q32oddPseudo_UPD, ARM::VLD3q32_UPD, true, true, true, OddDblSpc, 3, 2 ,true}, 233f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q8Pseudo_UPD, ARM::VLD3q8_UPD, true, true, true, EvenDblSpc, 3, 8 ,true}, 234f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q8oddPseudo, ARM::VLD3q8, true, false, false, OddDblSpc, 3, 8 ,true}, 235f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD3q8oddPseudo_UPD, ARM::VLD3q8_UPD, true, true, true, OddDblSpc, 3, 8 ,true}, 236f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 237f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd16Pseudo, ARM::VLD4DUPd16, true, false, false, SingleSpc, 4, 4,true}, 238f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd16Pseudo_UPD, ARM::VLD4DUPd16_UPD, true, true, true, SingleSpc, 4, 4,true}, 239f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd32Pseudo, ARM::VLD4DUPd32, true, false, false, SingleSpc, 4, 2,true}, 240f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd32Pseudo_UPD, ARM::VLD4DUPd32_UPD, true, true, true, SingleSpc, 4, 2,true}, 241f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd8Pseudo, ARM::VLD4DUPd8, true, false, false, SingleSpc, 4, 8,true}, 242f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4DUPd8Pseudo_UPD, ARM::VLD4DUPd8_UPD, true, true, true, SingleSpc, 4, 8,true}, 243f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 244f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd16Pseudo, ARM::VLD4LNd16, true, false, false, SingleSpc, 4, 4 ,true}, 245f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd16Pseudo_UPD, ARM::VLD4LNd16_UPD, true, true, true, SingleSpc, 4, 4 ,true}, 246f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd32Pseudo, ARM::VLD4LNd32, true, false, false, SingleSpc, 4, 2 ,true}, 247f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd32Pseudo_UPD, ARM::VLD4LNd32_UPD, true, true, true, SingleSpc, 4, 2 ,true}, 248f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd8Pseudo, ARM::VLD4LNd8, true, false, false, SingleSpc, 4, 8 ,true}, 249f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNd8Pseudo_UPD, ARM::VLD4LNd8_UPD, true, true, true, SingleSpc, 4, 8 ,true}, 250f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNq16Pseudo, ARM::VLD4LNq16, true, false, false, EvenDblSpc, 4, 4 ,true}, 251f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNq16Pseudo_UPD, ARM::VLD4LNq16_UPD, true, true, true, EvenDblSpc, 4, 4 ,true}, 252f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNq32Pseudo, ARM::VLD4LNq32, true, false, false, EvenDblSpc, 4, 2 ,true}, 253f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4LNq32Pseudo_UPD, ARM::VLD4LNq32_UPD, true, true, true, EvenDblSpc, 4, 2 ,true}, 254f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 255f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d16Pseudo, ARM::VLD4d16, true, false, false, SingleSpc, 4, 4 ,true}, 256f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d16Pseudo_UPD, ARM::VLD4d16_UPD, true, true, true, SingleSpc, 4, 4 ,true}, 257f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d32Pseudo, ARM::VLD4d32, true, false, false, SingleSpc, 4, 2 ,true}, 258f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d32Pseudo_UPD, ARM::VLD4d32_UPD, true, true, true, SingleSpc, 4, 2 ,true}, 259f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d8Pseudo, ARM::VLD4d8, true, false, false, SingleSpc, 4, 8 ,true}, 260f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4d8Pseudo_UPD, ARM::VLD4d8_UPD, true, true, true, SingleSpc, 4, 8 ,true}, 261f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 262f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q16Pseudo_UPD, ARM::VLD4q16_UPD, true, true, true, EvenDblSpc, 4, 4 ,true}, 263f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q16oddPseudo, ARM::VLD4q16, true, false, false, OddDblSpc, 4, 4 ,true}, 264f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q16oddPseudo_UPD, ARM::VLD4q16_UPD, true, true, true, OddDblSpc, 4, 4 ,true}, 265f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q32Pseudo_UPD, ARM::VLD4q32_UPD, true, true, true, EvenDblSpc, 4, 2 ,true}, 266f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q32oddPseudo, ARM::VLD4q32, true, false, false, OddDblSpc, 4, 2 ,true}, 267f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q32oddPseudo_UPD, ARM::VLD4q32_UPD, true, true, true, OddDblSpc, 4, 2 ,true}, 268f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q8Pseudo_UPD, ARM::VLD4q8_UPD, true, true, true, EvenDblSpc, 4, 8 ,true}, 269f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q8oddPseudo, ARM::VLD4q8, true, false, false, OddDblSpc, 4, 8 ,true}, 270f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VLD4q8oddPseudo_UPD, ARM::VLD4q8_UPD, true, true, true, OddDblSpc, 4, 8 ,true}, 271f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 272f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq16Pseudo, ARM::VST1LNd16, false, false, false, EvenDblSpc, 1, 4 ,true}, 273f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq16Pseudo_UPD, ARM::VST1LNd16_UPD, false, true, true, EvenDblSpc, 1, 4 ,true}, 274f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq32Pseudo, ARM::VST1LNd32, false, false, false, EvenDblSpc, 1, 2 ,true}, 275f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq32Pseudo_UPD, ARM::VST1LNd32_UPD, false, true, true, EvenDblSpc, 1, 2 ,true}, 276f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq8Pseudo, ARM::VST1LNd8, false, false, false, EvenDblSpc, 1, 8 ,true}, 277f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST1LNq8Pseudo_UPD, ARM::VST1LNd8_UPD, false, true, true, EvenDblSpc, 1, 8 ,true}, 278f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 2794c7edb3ad8bd513c59190f6ebee9bee34af7d247Jim Grosbach{ ARM::VST1d64QPseudo, ARM::VST1d64Q, false, false, false, SingleSpc, 4, 1 ,false}, 2804c7edb3ad8bd513c59190f6ebee9bee34af7d247Jim Grosbach{ ARM::VST1d64QPseudoWB_fixed, ARM::VST1d64Qwb_fixed, false, true, false, SingleSpc, 4, 1 ,false}, 2814c7edb3ad8bd513c59190f6ebee9bee34af7d247Jim Grosbach{ ARM::VST1d64QPseudoWB_register, ARM::VST1d64Qwb_register, false, true, true, SingleSpc, 4, 1 ,false}, 282d5ca201891d238ca2185831524a1e3f2670224dfJim Grosbach{ ARM::VST1d64TPseudo, ARM::VST1d64T, false, false, false, SingleSpc, 3, 1 ,false}, 283d5ca201891d238ca2185831524a1e3f2670224dfJim Grosbach{ ARM::VST1d64TPseudoWB_fixed, ARM::VST1d64Twb_fixed, false, true, false, SingleSpc, 3, 1 ,false}, 284d5ca201891d238ca2185831524a1e3f2670224dfJim Grosbach{ ARM::VST1d64TPseudoWB_register, ARM::VST1d64Twb_register, false, true, true, SingleSpc, 3, 1 ,false}, 285f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 286742c4bac07e2800275a69259296fba7c3e3f651bJim Grosbach{ ARM::VST1q16Pseudo, ARM::VST1q16, false, false, false, SingleSpc, 2, 4 ,false}, 2874334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q16PseudoWB_fixed, ARM::VST1q16wb_fixed, false, true, false, SingleSpc, 2, 4 ,false}, 2884334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q16PseudoWB_register, ARM::VST1q16wb_register, false, true, true, SingleSpc, 2, 4 ,false}, 289742c4bac07e2800275a69259296fba7c3e3f651bJim Grosbach{ ARM::VST1q32Pseudo, ARM::VST1q32, false, false, false, SingleSpc, 2, 2 ,false}, 2904334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q32PseudoWB_fixed, ARM::VST1q32wb_fixed, false, true, false, SingleSpc, 2, 2 ,false}, 2914334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q32PseudoWB_register, ARM::VST1q32wb_register, false, true, true, SingleSpc, 2, 2 ,false}, 292742c4bac07e2800275a69259296fba7c3e3f651bJim Grosbach{ ARM::VST1q64Pseudo, ARM::VST1q64, false, false, false, SingleSpc, 2, 1 ,false}, 2934334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q64PseudoWB_fixed, ARM::VST1q64wb_fixed, false, true, false, SingleSpc, 2, 1 ,false}, 2944334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q64PseudoWB_register, ARM::VST1q64wb_register, false, true, true, SingleSpc, 2, 1 ,false}, 295742c4bac07e2800275a69259296fba7c3e3f651bJim Grosbach{ ARM::VST1q8Pseudo, ARM::VST1q8, false, false, false, SingleSpc, 2, 8 ,false}, 2964334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q8PseudoWB_fixed, ARM::VST1q8wb_fixed, false, true, false, SingleSpc, 2, 8 ,false}, 2974334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach{ ARM::VST1q8PseudoWB_register, ARM::VST1q8wb_register, false, true, true, SingleSpc, 2, 8 ,false}, 298f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 299f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd16Pseudo, ARM::VST2LNd16, false, false, false, SingleSpc, 2, 4 ,true}, 300f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd16Pseudo_UPD, ARM::VST2LNd16_UPD, false, true, true, SingleSpc, 2, 4 ,true}, 301f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd32Pseudo, ARM::VST2LNd32, false, false, false, SingleSpc, 2, 2 ,true}, 302f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd32Pseudo_UPD, ARM::VST2LNd32_UPD, false, true, true, SingleSpc, 2, 2 ,true}, 303f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd8Pseudo, ARM::VST2LNd8, false, false, false, SingleSpc, 2, 8 ,true}, 304f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNd8Pseudo_UPD, ARM::VST2LNd8_UPD, false, true, true, SingleSpc, 2, 8 ,true}, 305f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNq16Pseudo, ARM::VST2LNq16, false, false, false, EvenDblSpc, 2, 4,true}, 306f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNq16Pseudo_UPD, ARM::VST2LNq16_UPD, false, true, true, EvenDblSpc, 2, 4,true}, 307f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNq32Pseudo, ARM::VST2LNq32, false, false, false, EvenDblSpc, 2, 2,true}, 308f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2LNq32Pseudo_UPD, ARM::VST2LNq32_UPD, false, true, true, EvenDblSpc, 2, 2,true}, 309f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 310f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d16Pseudo, ARM::VST2d16, false, false, false, SingleSpc, 2, 4 ,true}, 311f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d16Pseudo_UPD, ARM::VST2d16_UPD, false, true, true, SingleSpc, 2, 4 ,true}, 312f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d32Pseudo, ARM::VST2d32, false, false, false, SingleSpc, 2, 2 ,true}, 313f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d32Pseudo_UPD, ARM::VST2d32_UPD, false, true, true, SingleSpc, 2, 2 ,true}, 314f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d8Pseudo, ARM::VST2d8, false, false, false, SingleSpc, 2, 8 ,true}, 315f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2d8Pseudo_UPD, ARM::VST2d8_UPD, false, true, true, SingleSpc, 2, 8 ,true}, 316f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 317f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q16Pseudo, ARM::VST2q16, false, false, false, SingleSpc, 4, 4 ,true}, 318f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q16Pseudo_UPD, ARM::VST2q16_UPD, false, true, true, SingleSpc, 4, 4 ,true}, 319f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q32Pseudo, ARM::VST2q32, false, false, false, SingleSpc, 4, 2 ,true}, 320f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q32Pseudo_UPD, ARM::VST2q32_UPD, false, true, true, SingleSpc, 4, 2 ,true}, 321f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q8Pseudo, ARM::VST2q8, false, false, false, SingleSpc, 4, 8 ,true}, 322f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST2q8Pseudo_UPD, ARM::VST2q8_UPD, false, true, true, SingleSpc, 4, 8 ,true}, 323f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 324f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd16Pseudo, ARM::VST3LNd16, false, false, false, SingleSpc, 3, 4 ,true}, 325f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd16Pseudo_UPD, ARM::VST3LNd16_UPD, false, true, true, SingleSpc, 3, 4 ,true}, 326f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd32Pseudo, ARM::VST3LNd32, false, false, false, SingleSpc, 3, 2 ,true}, 327f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd32Pseudo_UPD, ARM::VST3LNd32_UPD, false, true, true, SingleSpc, 3, 2 ,true}, 328f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd8Pseudo, ARM::VST3LNd8, false, false, false, SingleSpc, 3, 8 ,true}, 329f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNd8Pseudo_UPD, ARM::VST3LNd8_UPD, false, true, true, SingleSpc, 3, 8 ,true}, 330f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNq16Pseudo, ARM::VST3LNq16, false, false, false, EvenDblSpc, 3, 4,true}, 331f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNq16Pseudo_UPD, ARM::VST3LNq16_UPD, false, true, true, EvenDblSpc, 3, 4,true}, 332f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNq32Pseudo, ARM::VST3LNq32, false, false, false, EvenDblSpc, 3, 2,true}, 333f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3LNq32Pseudo_UPD, ARM::VST3LNq32_UPD, false, true, true, EvenDblSpc, 3, 2,true}, 334f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 335f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d16Pseudo, ARM::VST3d16, false, false, false, SingleSpc, 3, 4 ,true}, 336f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d16Pseudo_UPD, ARM::VST3d16_UPD, false, true, true, SingleSpc, 3, 4 ,true}, 337f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d32Pseudo, ARM::VST3d32, false, false, false, SingleSpc, 3, 2 ,true}, 338f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d32Pseudo_UPD, ARM::VST3d32_UPD, false, true, true, SingleSpc, 3, 2 ,true}, 339f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d8Pseudo, ARM::VST3d8, false, false, false, SingleSpc, 3, 8 ,true}, 340f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3d8Pseudo_UPD, ARM::VST3d8_UPD, false, true, true, SingleSpc, 3, 8 ,true}, 341f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 342f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q16Pseudo_UPD, ARM::VST3q16_UPD, false, true, true, EvenDblSpc, 3, 4 ,true}, 343f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q16oddPseudo, ARM::VST3q16, false, false, false, OddDblSpc, 3, 4 ,true}, 344f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q16oddPseudo_UPD, ARM::VST3q16_UPD, false, true, true, OddDblSpc, 3, 4 ,true}, 345f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q32Pseudo_UPD, ARM::VST3q32_UPD, false, true, true, EvenDblSpc, 3, 2 ,true}, 346f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q32oddPseudo, ARM::VST3q32, false, false, false, OddDblSpc, 3, 2 ,true}, 347f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q32oddPseudo_UPD, ARM::VST3q32_UPD, false, true, true, OddDblSpc, 3, 2 ,true}, 348f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q8Pseudo_UPD, ARM::VST3q8_UPD, false, true, true, EvenDblSpc, 3, 8 ,true}, 349f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q8oddPseudo, ARM::VST3q8, false, false, false, OddDblSpc, 3, 8 ,true}, 350f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST3q8oddPseudo_UPD, ARM::VST3q8_UPD, false, true, true, OddDblSpc, 3, 8 ,true}, 351f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 352f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd16Pseudo, ARM::VST4LNd16, false, false, false, SingleSpc, 4, 4 ,true}, 353f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd16Pseudo_UPD, ARM::VST4LNd16_UPD, false, true, true, SingleSpc, 4, 4 ,true}, 354f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd32Pseudo, ARM::VST4LNd32, false, false, false, SingleSpc, 4, 2 ,true}, 355f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd32Pseudo_UPD, ARM::VST4LNd32_UPD, false, true, true, SingleSpc, 4, 2 ,true}, 356f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd8Pseudo, ARM::VST4LNd8, false, false, false, SingleSpc, 4, 8 ,true}, 357f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNd8Pseudo_UPD, ARM::VST4LNd8_UPD, false, true, true, SingleSpc, 4, 8 ,true}, 358f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNq16Pseudo, ARM::VST4LNq16, false, false, false, EvenDblSpc, 4, 4,true}, 359f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNq16Pseudo_UPD, ARM::VST4LNq16_UPD, false, true, true, EvenDblSpc, 4, 4,true}, 360f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNq32Pseudo, ARM::VST4LNq32, false, false, false, EvenDblSpc, 4, 2,true}, 361f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4LNq32Pseudo_UPD, ARM::VST4LNq32_UPD, false, true, true, EvenDblSpc, 4, 2,true}, 362f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 363f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d16Pseudo, ARM::VST4d16, false, false, false, SingleSpc, 4, 4 ,true}, 364f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d16Pseudo_UPD, ARM::VST4d16_UPD, false, true, true, SingleSpc, 4, 4 ,true}, 365f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d32Pseudo, ARM::VST4d32, false, false, false, SingleSpc, 4, 2 ,true}, 366f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d32Pseudo_UPD, ARM::VST4d32_UPD, false, true, true, SingleSpc, 4, 2 ,true}, 367f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d8Pseudo, ARM::VST4d8, false, false, false, SingleSpc, 4, 8 ,true}, 368f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4d8Pseudo_UPD, ARM::VST4d8_UPD, false, true, true, SingleSpc, 4, 8 ,true}, 369f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach 370f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q16Pseudo_UPD, ARM::VST4q16_UPD, false, true, true, EvenDblSpc, 4, 4 ,true}, 371f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q16oddPseudo, ARM::VST4q16, false, false, false, OddDblSpc, 4, 4 ,true}, 372f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q16oddPseudo_UPD, ARM::VST4q16_UPD, false, true, true, OddDblSpc, 4, 4 ,true}, 373f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q32Pseudo_UPD, ARM::VST4q32_UPD, false, true, true, EvenDblSpc, 4, 2 ,true}, 374f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q32oddPseudo, ARM::VST4q32, false, false, false, OddDblSpc, 4, 2 ,true}, 375f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q32oddPseudo_UPD, ARM::VST4q32_UPD, false, true, true, OddDblSpc, 4, 2 ,true}, 376f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q8Pseudo_UPD, ARM::VST4q8_UPD, false, true, true, EvenDblSpc, 4, 8 ,true}, 377f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q8oddPseudo, ARM::VST4q8, false, false, false, OddDblSpc, 4, 8 ,true}, 378f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach{ ARM::VST4q8oddPseudo_UPD, ARM::VST4q8_UPD, false, true, true, OddDblSpc, 4, 8 ,true} 3798466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson}; 3808466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3818466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// LookupNEONLdSt - Search the NEONLdStTable for information about a NEON 3828466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// load or store pseudo instruction. 3838466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonstatic const NEONLdStTableEntry *LookupNEONLdSt(unsigned Opcode) { 3848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumEntries = array_lengthof(NEONLdStTable); 3858466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3868466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson#ifndef NDEBUG 3878466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Make sure the table is sorted. 3888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson static bool TableChecked = false; 3898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (!TableChecked) { 3908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson for (unsigned i = 0; i != NumEntries-1; ++i) 3918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(NEONLdStTable[i] < NEONLdStTable[i+1] && 3928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson "NEONLdStTable is not sorted!"); 3938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TableChecked = true; 3948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 3958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson#endif 3968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 3978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *I = 3988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson std::lower_bound(NEONLdStTable, NEONLdStTable + NumEntries, Opcode); 3998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (I != NEONLdStTable + NumEntries && I->PseudoOpc == Opcode) 4008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return I; 4018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson return NULL; 4028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 4038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 4048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// GetDSubRegs - Get 4 D subregisters of a Q, QQ, or QQQQ register, 4058466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// corresponding to the specified register spacing. Not all of the results 4068466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// are necessarily valid, e.g., a Q register only has 2 D subregisters. 4078466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonstatic void GetDSubRegs(unsigned Reg, NEONRegSpacing RegSpc, 4088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const TargetRegisterInfo *TRI, unsigned &D0, 4098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned &D1, unsigned &D2, unsigned &D3) { 4108466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (RegSpc == SingleSpc) { 4118466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D0 = TRI->getSubReg(Reg, ARM::dsub_0); 4128466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D1 = TRI->getSubReg(Reg, ARM::dsub_1); 4138466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D2 = TRI->getSubReg(Reg, ARM::dsub_2); 4148466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D3 = TRI->getSubReg(Reg, ARM::dsub_3); 4158466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } else if (RegSpc == EvenDblSpc) { 4168466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D0 = TRI->getSubReg(Reg, ARM::dsub_0); 4178466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D1 = TRI->getSubReg(Reg, ARM::dsub_2); 4188466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D2 = TRI->getSubReg(Reg, ARM::dsub_4); 4198466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D3 = TRI->getSubReg(Reg, ARM::dsub_6); 4208466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } else { 4218466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(RegSpc == OddDblSpc && "unknown register spacing"); 4228466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D0 = TRI->getSubReg(Reg, ARM::dsub_1); 4238466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D1 = TRI->getSubReg(Reg, ARM::dsub_3); 4248466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D2 = TRI->getSubReg(Reg, ARM::dsub_5); 4258466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson D3 = TRI->getSubReg(Reg, ARM::dsub_7); 426bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson } 4278466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 4288466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 42982a9c8480ecd41a1351274569f8d4e4de2723cf6Bob Wilson/// ExpandVLD - Translate VLD pseudo instructions with Q, QQ or QQQQ register 43082a9c8480ecd41a1351274569f8d4e4de2723cf6Bob Wilson/// operands to real VLD instructions with D register operands. 4318466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonvoid ARMExpandPseudo::ExpandVLD(MachineBasicBlock::iterator &MBBI) { 432ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson MachineInstr &MI = *MBBI; 433ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 434ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 4358466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); 4368466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); 4378466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpc = TableEntry->RegSpacing; 4388466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumRegs = TableEntry->NumRegs; 4398466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 4408466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 4418466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TII->get(TableEntry->RealOpc)); 442ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson unsigned OpIdx = 0; 443ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 444ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson bool DstIsDead = MI.getOperand(OpIdx).isDead(); 445ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson unsigned DstReg = MI.getOperand(OpIdx++).getReg(); 446ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson unsigned D0, D1, D2, D3; 4478466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3); 448280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); 449280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach if (NumRegs > 1 && TableEntry->copyAllListRegs) 450280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); 451280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach if (NumRegs > 2 && TableEntry->copyAllListRegs) 452f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); 453280dfad48940a0a51726308dd3daa3b1b0d18705Jim Grosbach if (NumRegs > 3 && TableEntry->copyAllListRegs) 454f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); 455ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 456f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->isUpdating) 45763569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 45863569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson 459ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson // Copy the addrmode6 operands. 46063569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 46163569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 46263569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson // Copy the am6offset operand. 463f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->hasWritebackOperand) 46463569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 465ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 46619d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson // For an instruction writing double-spaced subregs, the pseudo instruction 467823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // has an extra operand that is a use of the super-register. Record the 468823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // operand index and skip over it. 469823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson unsigned SrcOpIdx = 0; 470823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson if (RegSpc == EvenDblSpc || RegSpc == OddDblSpc) 471823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson SrcOpIdx = OpIdx++; 472823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 473823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 474823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 475823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 476823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 477823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the super-register source operand used for double-spaced subregs over 47819d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson // to the new instruction as an implicit operand. 479823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson if (SrcOpIdx != 0) { 480823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MachineOperand MO = MI.getOperand(SrcOpIdx); 48119d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson MO.setImplicit(true); 48219d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson MIB.addOperand(MO); 48319d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson } 484f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson // Add an implicit def for the super-register. 485f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); 48619d644d5a9cd6699e5f9f1999deb3c77b2bbdca4Bob Wilson TransferImpOps(MI, MIB, MIB); 487b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 488b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng // Transfer memoperands. 489d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 490b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 491ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson MI.eraseFromParent(); 492ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson} 493ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 49401ba461af7eafc9d181a5c349487691f2e801438Bob Wilson/// ExpandVST - Translate VST pseudo instructions with Q, QQ or QQQQ register 49501ba461af7eafc9d181a5c349487691f2e801438Bob Wilson/// operands to real VST instructions with D register operands. 4968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonvoid ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) { 497709d59255a3100c7d440c93069efa1f726677a27Bob Wilson MachineInstr &MI = *MBBI; 498709d59255a3100c7d440c93069efa1f726677a27Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 499709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 5008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); 5018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); 5028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpc = TableEntry->RegSpacing; 5038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumRegs = TableEntry->NumRegs; 5048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5058466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 5068466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TII->get(TableEntry->RealOpc)); 507709d59255a3100c7d440c93069efa1f726677a27Bob Wilson unsigned OpIdx = 0; 508f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->isUpdating) 50963569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 51063569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson 511709d59255a3100c7d440c93069efa1f726677a27Bob Wilson // Copy the addrmode6 operands. 51263569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 51363569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 51463569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson // Copy the am6offset operand. 515f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->hasWritebackOperand) 51663569c99ec944210d0edc687d7411b5c687e97a7Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 517709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 518709d59255a3100c7d440c93069efa1f726677a27Bob Wilson bool SrcIsKill = MI.getOperand(OpIdx).isKill(); 519823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); 520709d59255a3100c7d440c93069efa1f726677a27Bob Wilson unsigned D0, D1, D2, D3; 5218466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3); 5224334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach MIB.addReg(D0); 5234334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach if (NumRegs > 1 && TableEntry->copyAllListRegs) 5244334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach MIB.addReg(D1); 5254334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach if (NumRegs > 2 && TableEntry->copyAllListRegs) 5267e701979ad20796bc930b21de3888ccfa0d8b33dBob Wilson MIB.addReg(D2); 5274334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach if (NumRegs > 3 && TableEntry->copyAllListRegs) 5287e701979ad20796bc930b21de3888ccfa0d8b33dBob Wilson MIB.addReg(D3); 529823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 530823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 531823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 532823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 533823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 534d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner if (SrcIsKill) // Add an implicit kill for the super-reg. 535d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->addRegisterKilled(SrcReg, TRI, true); 536bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson TransferImpOps(MI, MIB, MIB); 537b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 538b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng // Transfer memoperands. 539d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 540b58a340fa2affa0da27a46c94dd49ba079c9343cEvan Cheng 541709d59255a3100c7d440c93069efa1f726677a27Bob Wilson MI.eraseFromParent(); 542709d59255a3100c7d440c93069efa1f726677a27Bob Wilson} 543709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 5448466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// ExpandLaneOp - Translate VLD*LN and VST*LN instructions with Q, QQ or QQQQ 5458466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson/// register operands to real instructions with D register operands. 5468466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilsonvoid ARMExpandPseudo::ExpandLaneOp(MachineBasicBlock::iterator &MBBI) { 5478466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstr &MI = *MBBI; 5488466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 5498466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5508466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); 5518466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(TableEntry && "NEONLdStTable lookup failed"); 5528466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson NEONRegSpacing RegSpc = TableEntry->RegSpacing; 5538466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned NumRegs = TableEntry->NumRegs; 5548466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned RegElts = TableEntry->RegElts; 5558466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5568466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 5578466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TII->get(TableEntry->RealOpc)); 5588466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned OpIdx = 0; 5598466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // The lane operand is always the 3rd from last operand, before the 2 5608466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // predicate operands. 5618466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned Lane = MI.getOperand(MI.getDesc().getNumOperands() - 3).getImm(); 5628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5638466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Adjust the lane and spacing as needed for Q registers. 5648466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(RegSpc != OddDblSpc && "unexpected register spacing for VLD/VST-lane"); 5658466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (RegSpc == EvenDblSpc && Lane >= RegElts) { 5668466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson RegSpc = OddDblSpc; 5678466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson Lane -= RegElts; 5688466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 5698466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson assert(Lane < RegElts && "out of range lane for VLD/VST-lane"); 5708466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 571584520e8e2c1f8cc04bc8dd4dc4ea6c390627317Ted Kremenek unsigned D0 = 0, D1 = 0, D2 = 0, D3 = 0; 572fe3ac088ee0a536f60b3c30ad97703d5d6cd2167Bob Wilson unsigned DstReg = 0; 573fe3ac088ee0a536f60b3c30ad97703d5d6cd2167Bob Wilson bool DstIsDead = false; 5748466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->IsLoad) { 5758466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson DstIsDead = MI.getOperand(OpIdx).isDead(); 5768466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson DstReg = MI.getOperand(OpIdx++).getReg(); 5778466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(DstReg, RegSpc, TRI, D0, D1, D2, D3); 578b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); 579b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson if (NumRegs > 1) 580b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); 5818466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 2) 5828466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); 5838466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 3) 5848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); 5858466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson } 5868466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 587f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->isUpdating) 5888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Copy the addrmode6 operands. 5918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Copy the am6offset operand. 594f9f5a765adf8465530fe1aced6455ca9438bb29aJim Grosbach if (TableEntry->hasWritebackOperand) 5958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 5968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 5978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Grab the super-register source. 5988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MachineOperand MO = MI.getOperand(OpIdx++); 5998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (!TableEntry->IsLoad) 6008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson GetDSubRegs(MO.getReg(), RegSpc, TRI, D0, D1, D2, D3); 6018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 6028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Add the subregs as sources of the new instruction. 6038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson unsigned SrcFlags = (getUndefRegState(MO.isUndef()) | 6048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson getKillRegState(MO.isKill())); 605b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D0, SrcFlags); 606b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson if (NumRegs > 1) 607b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson MIB.addReg(D1, SrcFlags); 6088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 2) 6098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D2, SrcFlags); 6108466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (NumRegs > 3) 6118466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(D3, SrcFlags); 6128466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 6138466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Add the lane number operand. 6148466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addImm(Lane); 615823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson OpIdx += 1; 616823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 617823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 618823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 619823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 6208466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 6218466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Copy the super-register source to be an implicit source. 6228466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MO.setImplicit(true); 6238466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addOperand(MO); 6248466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson if (TableEntry->IsLoad) 6258466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson // Add an implicit def for the super-register. 6268466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); 6278466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson TransferImpOps(MI, MIB, MIB); 6288466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson MI.eraseFromParent(); 6298466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson} 6308466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 631bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson/// ExpandVTBL - Translate VTBL and VTBX pseudo instructions with Q or QQ 632bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson/// register operands to real instructions with D register operands. 633bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilsonvoid ARMExpandPseudo::ExpandVTBL(MachineBasicBlock::iterator &MBBI, 634bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned Opc, bool IsExt, unsigned NumRegs) { 635bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MachineInstr &MI = *MBBI; 636bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MachineBasicBlock &MBB = *MI.getParent(); 637bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 638bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); 639bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned OpIdx = 0; 640bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 641bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson // Transfer the destination register operand. 642bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 643bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson if (IsExt) 644bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 645bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 646bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson bool SrcIsKill = MI.getOperand(OpIdx).isKill(); 647bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); 648bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson unsigned D0, D1, D2, D3; 649bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson GetDSubRegs(SrcReg, SingleSpc, TRI, D0, D1, D2, D3); 650bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addReg(D0).addReg(D1); 651bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson if (NumRegs > 2) 652bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addReg(D2); 653bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson if (NumRegs > 3) 654bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MIB.addReg(D3); 655bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 656bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson // Copy the other source register operand. 657823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 658823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson 659823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson // Copy the predicate operands. 660823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 661823611bfba4fb2c1abbba2e59d68432c6d0a9e9aBob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 662bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 663d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner if (SrcIsKill) // Add an implicit kill for the super-reg. 664d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->addRegisterKilled(SrcReg, TRI, true); 665bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson TransferImpOps(MI, MIB, MIB); 666bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson MI.eraseFromParent(); 667bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson} 668bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson 6699fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Chengvoid ARMExpandPseudo::ExpandMOV32BitImm(MachineBasicBlock &MBB, 6709fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator &MBBI) { 6719fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstr &MI = *MBBI; 6729fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Opcode = MI.getOpcode(); 6739fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned PredReg = 0; 6749fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng ARMCC::CondCodes Pred = llvm::getInstrPredicate(&MI, PredReg); 6759fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned DstReg = MI.getOperand(0).getReg(); 6769fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool DstIsDead = MI.getOperand(0).isDead(); 6779fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool isCC = Opcode == ARM::MOVCCi32imm || Opcode == ARM::t2MOVCCi32imm; 6789fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const MachineOperand &MO = MI.getOperand(isCC ? 2 : 1); 6799fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstrBuilder LO16, HI16; 6809fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 6819fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (!STI->hasV6T2Ops() && 6829fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng (Opcode == ARM::MOVi32imm || Opcode == ARM::MOVCCi32imm)) { 6839fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng // Expand into a movi + orr. 6849fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg); 6859fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::ORRri)) 6869fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 6879fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg); 6889fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 6899fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng assert (MO.isImm() && "MOVi32imm w/ non-immediate source operand!"); 6909fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned ImmVal = (unsigned)MO.getImm(); 6919fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned SOImmValV1 = ARM_AM::getSOImmTwoPartFirst(ImmVal); 6929fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned SOImmValV2 = ARM_AM::getSOImmTwoPartSecond(ImmVal); 6939fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = LO16.addImm(SOImmValV1); 6949fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = HI16.addImm(SOImmValV2); 695d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 696d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 6979fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16.addImm(Pred).addReg(PredReg).addReg(0); 6989fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16.addImm(Pred).addReg(PredReg).addReg(0); 6999fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TransferImpOps(MI, LO16, HI16); 7009fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MI.eraseFromParent(); 7019fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return; 7029fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 703b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 7049fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned LO16Opc = 0; 7059fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned HI16Opc = 0; 7069fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (Opcode == ARM::t2MOVi32imm || Opcode == ARM::t2MOVCCi32imm) { 7079fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16Opc = ARM::t2MOVi16; 7089fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16Opc = ARM::t2MOVTi16; 7099fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } else { 7109fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16Opc = ARM::MOVi16; 7119fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16Opc = ARM::MOVTi16; 7129fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 713b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 7149fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LO16Opc), DstReg); 7159fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc)) 7169fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 7179fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg); 7189fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 7199fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (MO.isImm()) { 7209fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Imm = MO.getImm(); 7219fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Lo16 = Imm & 0xffff; 7229fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Hi16 = (Imm >> 16) & 0xffff; 7239fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = LO16.addImm(Lo16); 7249fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = HI16.addImm(Hi16); 7259fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } else { 7269fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const GlobalValue *GV = MO.getGlobal(); 7279fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned TF = MO.getTargetFlags(); 7289fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16 = LO16.addGlobalAddress(GV, MO.getOffset(), TF | ARMII::MO_LO16); 7299fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16 = HI16.addGlobalAddress(GV, MO.getOffset(), TF | ARMII::MO_HI16); 7309fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 731709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 732d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 733d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 7349fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng LO16.addImm(Pred).addReg(PredReg); 7359fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng HI16.addImm(Pred).addReg(PredReg); 7369fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 7379fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TransferImpOps(MI, LO16, HI16); 7389fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MI.eraseFromParent(); 7399fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng} 7409fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 7419fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Chengbool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB, 7429fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator MBBI) { 7439fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstr &MI = *MBBI; 7449fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned Opcode = MI.getOpcode(); 7459fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng switch (Opcode) { 7469fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng default: 7479fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return false; 748f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach case ARM::VMOVScc: 749f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach case ARM::VMOVDcc: { 750f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach unsigned newOpc = Opcode == ARM::VMOVScc ? ARM::VMOVS : ARM::VMOVD; 751f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(newOpc), 752f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach MI.getOperand(1).getReg()) 753f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach .addReg(MI.getOperand(2).getReg(), 754f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach getKillRegState(MI.getOperand(2).isKill())) 755f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 756f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach .addReg(MI.getOperand(4).getReg()); 757f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach 758f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach MI.eraseFromParent(); 759f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach return true; 760f219f3135d0ec939acd42801766c17fad41c0173Jim Grosbach } 761efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach case ARM::t2MOVCCr: 762d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach case ARM::MOVCCr: { 763efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach unsigned Opc = AFI->isThumbFunction() ? ARM::t2MOVr : ARM::MOVr; 764efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc), 765d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach MI.getOperand(1).getReg()) 766d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(2).getReg(), 767d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach getKillRegState(MI.getOperand(2).isKill())) 768d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 769d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(4).getReg()) 770d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(0); // 's' bit 771d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach 772d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach MI.eraseFromParent(); 773d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach return true; 774d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach } 775152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson case ARM::MOVCCsi: { 776152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi), 777152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson (MI.getOperand(1).getReg())) 778152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addReg(MI.getOperand(2).getReg(), 779152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson getKillRegState(MI.getOperand(2).isKill())) 780152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addImm(MI.getOperand(3).getImm()) 781152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addImm(MI.getOperand(4).getImm()) // 'pred' 782152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addReg(MI.getOperand(5).getReg()) 783152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson .addReg(0); // 's' bit 784152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson 785152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson MI.eraseFromParent(); 786152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson return true; 787152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson } 788152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson 78992a202213bb4c20301abf6ab64e46df3695e60bfOwen Anderson case ARM::MOVCCsr: { 790152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsr), 791d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach (MI.getOperand(1).getReg())) 792d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(2).getReg(), 793d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach getKillRegState(MI.getOperand(2).isKill())) 794d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(3).getReg(), 795d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach getKillRegState(MI.getOperand(3).isKill())) 796d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addImm(MI.getOperand(4).getImm()) 797d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addImm(MI.getOperand(5).getImm()) // 'pred' 798d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(MI.getOperand(6).getReg()) 799d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach .addReg(0); // 's' bit 8003906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach 8013906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.eraseFromParent(); 8023906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach return true; 8033906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach } 8043906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach case ARM::MOVCCi16: { 8053906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi16), 8063906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.getOperand(1).getReg()) 8073906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(2).getImm()) 8083906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 8093906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addReg(MI.getOperand(4).getReg()); 8103906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach 8113906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.eraseFromParent(); 8123906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach return true; 8133906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach } 814efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach case ARM::t2MOVCCi: 8153906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach case ARM::MOVCCi: { 816efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach unsigned Opc = AFI->isThumbFunction() ? ARM::t2MOVi : ARM::MOVi; 817efeedceb41cc0c5ff7918cad870d5820de84b03dJim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc), 8183906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach MI.getOperand(1).getReg()) 8193906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(2).getImm()) 8203906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 8213906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addReg(MI.getOperand(4).getReg()) 8223906276a8d4b308a19675d5a67b2d6ab3e3b9b6fJim Grosbach .addReg(0); // 's' bit 823e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach 824e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach MI.eraseFromParent(); 825e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach return true; 826e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach } 827e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach case ARM::MVNCCi: { 828e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MVNi), 829e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach MI.getOperand(1).getReg()) 830e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addImm(MI.getOperand(2).getImm()) 831e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addImm(MI.getOperand(3).getImm()) // 'pred' 832e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addReg(MI.getOperand(4).getReg()) 833e672ff84308434ad5517a5c6fc36e691893fca96Jim Grosbach .addReg(0); // 's' bit 834d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach 835d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach MI.eraseFromParent(); 836d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach return true; 837d4a16ad85d991ff12487b40ef248833448047eadJim Grosbach } 838eaab6ef6eb12fc950f1d4371b297d9b7ca9d4c66Bob Wilson case ARM::eh_sjlj_dispatchsetup: { 839e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach MachineFunction &MF = *MI.getParent()->getParent(); 840e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach const ARMBaseInstrInfo *AII = 841e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach static_cast<const ARMBaseInstrInfo*>(TII); 842e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach const ARMBaseRegisterInfo &RI = AII->getRegisterInfo(); 843e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach // For functions using a base pointer, we rematerialize it (via the frame 844e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach // pointer) here since eh.sjlj.setjmp and eh.sjlj.longjmp don't do it 845e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach // for us. Otherwise, expand to nothing. 846e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach if (RI.hasBasePointer(MF)) { 847e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach int32_t NumBytes = AFI->getFramePtrSpillOffset(); 848e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach unsigned FramePtr = RI.getFrameRegister(MF); 84916c29b5f285f375be53dabaa73e3e91107485fe4Anton Korobeynikov assert(MF.getTarget().getFrameLowering()->hasFP(MF) && 8507920d96964d707a3af85332c98d95b2fabc3d5c9Benjamin Kramer "base pointer without frame pointer?"); 851e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach 852e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach if (AFI->isThumb2Function()) { 853e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach llvm::emitT2RegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, 854e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach FramePtr, -NumBytes, ARMCC::AL, 0, *TII); 855e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } else if (AFI->isThumbFunction()) { 85657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov llvm::emitThumbRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, 85757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov FramePtr, -NumBytes, *TII, RI); 858e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } else { 859e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach llvm::emitARMRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, 860e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach FramePtr, -NumBytes, ARMCC::AL, 0, 861e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach *TII); 862e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } 8638b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach // If there's dynamic realignment, adjust for it. 864b8e67fc92b0a508e3782b782baa98a6d56d5d7eaJim Grosbach if (RI.needsStackRealignment(MF)) { 8658b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach MachineFrameInfo *MFI = MF.getFrameInfo(); 8668b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach unsigned MaxAlign = MFI->getMaxAlignment(); 8678b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach assert (!AFI->isThumb1OnlyFunction()); 8688b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach // Emit bic r6, r6, MaxAlign 8698b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach unsigned bicOpc = AFI->isThumbFunction() ? 8708b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach ARM::t2BICri : ARM::BICri; 8718b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), 8728b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach TII->get(bicOpc), ARM::R6) 8738b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach .addReg(ARM::R6, RegState::Kill) 8748b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach .addImm(MaxAlign-1))); 8758b95c3ebfbd492c2ac863df93e40c11fc2e914fdJim Grosbach } 876e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach 877e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } 878e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach MI.eraseFromParent(); 8799fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 880e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach } 881e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach 8827032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach case ARM::MOVsrl_flag: 8837032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach case ARM::MOVsra_flag: { 8847032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach // These are just fancy MOVs insructions. 885152d4a4bb6b75de740b4b8a9f48abb9069d50c17Owen Anderson AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi), 886dbbd99faf1d661f03a9dfc1551d7537c34d64beeDuncan Sands MI.getOperand(0).getReg()) 8879fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addOperand(MI.getOperand(1)) 888aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? 889aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach ARM_AM::lsr : ARM_AM::asr), 890aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach 1))) 8919fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(ARM::CPSR, RegState::Define); 8927032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MI.eraseFromParent(); 8939fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 8947032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach } 8957032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach case ARM::RRX: { 8967032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach // This encodes as "MOVs Rd, Rm, rrx 8977032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MachineInstrBuilder MIB = 8988e0c7697fd9b9354856074efc06eea9f6d80015cJim Grosbach AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),TII->get(ARM::MOVsi), 8997032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MI.getOperand(0).getReg()) 9009fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addOperand(MI.getOperand(1)) 9019fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addImm(ARM_AM::getSORegOpc(ARM_AM::rrx, 0))) 9027032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach .addReg(0); 9037032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach TransferImpOps(MI, MIB, MIB); 9047032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach MI.eraseFromParent(); 9059fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 9067032f922b12746b73d6316578b0aea2d812b07b4Jim Grosbach } 907ff97eb0cf4394090570feaa327d1237ba4b935e2Jim Grosbach case ARM::tTPsoft: 908a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim case ARM::TPsoft: { 909971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson MachineInstrBuilder MIB = 910a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim BuildMI(MBB, MBBI, MI.getDebugLoc(), 911ff97eb0cf4394090570feaa327d1237ba4b935e2Jim Grosbach TII->get(Opcode == ARM::tTPsoft ? ARM::tBL : ARM::BL)) 912a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim .addExternalSymbol("__aeabi_read_tp", 0); 913a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim 914d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 915a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim TransferImpOps(MI, MIB, MIB); 916a0871e79270b2a05f93c9df73bbe24c587faa94eJason W Kim MI.eraseFromParent(); 9179fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 9182fe813af23e682b418ecd477144fe070be325419Bill Wendling } 919bd916c54b7989ddbab373c61eb1ed2556ca44d27Bob Wilson case ARM::tLDRpci_pic: 920b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng case ARM::t2LDRpci_pic: { 921b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng unsigned NewLdOpc = (Opcode == ARM::tLDRpci_pic) 922971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson ? ARM::tLDRpci : ARM::t2LDRpci; 923b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng unsigned DstReg = MI.getOperand(0).getReg(); 924431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng bool DstIsDead = MI.getOperand(0).isDead(); 925431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder MIB1 = 926971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), 927971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson TII->get(NewLdOpc), DstReg) 928971b83b67a9812556cdb97bb58aa96fb37af458dOwen Anderson .addOperand(MI.getOperand(1))); 929d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB1->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 930431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 931431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng TII->get(ARM::tPICADD)) 93201b35c25deee3d4cab339e620c12c721e627d609Bob Wilson .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 933431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng .addReg(DstReg) 934431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng .addOperand(MI.getOperand(2)); 935431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng TransferImpOps(MI, MIB1, MIB2); 936b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng MI.eraseFromParent(); 9379fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 938b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng } 939431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng 94053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOV_ga_dyn: 94153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOV_ga_pcrel: 94253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOV_ga_pcrel_ldr: 94353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOV_ga_dyn: 94453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOV_ga_pcrel: { 94553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng // Expand into movw + movw. Also "add pc" / ldr [pc] in PIC mode. 9469fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned LabelId = AFI->createPICLabelUId(); 947b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng unsigned DstReg = MI.getOperand(0).getReg(); 948431300797b84600fc9b4eb8ca283277d3e0674ebEvan Cheng bool DstIsDead = MI.getOperand(0).isDead(); 9499fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const MachineOperand &MO1 = MI.getOperand(1); 9509fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const GlobalValue *GV = MO1.getGlobal(); 9519fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned TF = MO1.getTargetFlags(); 952aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach bool isARM = (Opcode != ARM::t2MOV_ga_pcrel && Opcode!=ARM::t2MOV_ga_dyn); 95353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng bool isPIC = (Opcode != ARM::MOV_ga_dyn && Opcode != ARM::t2MOV_ga_dyn); 95453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned LO16Opc = isARM ? ARM::MOVi16_ga_pcrel : ARM::t2MOVi16_ga_pcrel; 955aa4cc1a6d75f621cbc5eb1db692068db072fbeccJim Grosbach unsigned HI16Opc = isARM ? ARM::MOVTi16_ga_pcrel :ARM::t2MOVTi16_ga_pcrel; 95653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned LO16TF = isPIC 95753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? ARMII::MO_LO16_NONLAZY_PIC : ARMII::MO_LO16_NONLAZY; 95853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned HI16TF = isPIC 95953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? ARMII::MO_HI16_NONLAZY_PIC : ARMII::MO_HI16_NONLAZY; 9609fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng unsigned PICAddOpc = isARM 96153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? (Opcode == ARM::MOV_ga_pcrel_ldr ? ARM::PICLDR : ARM::PICADD) 9629fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng : ARM::tPICADD; 9639fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineInstrBuilder MIB1 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 9649fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TII->get(LO16Opc), DstReg) 96553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng .addGlobalAddress(GV, MO1.getOffset(), TF | LO16TF) 9669fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addImm(LabelId); 96753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 96853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TII->get(HI16Opc), DstReg) 9699fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg) 97053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng .addGlobalAddress(GV, MO1.getOffset(), TF | HI16TF) 9719fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addImm(LabelId); 97253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (!isPIC) { 97353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TransferImpOps(MI, MIB1, MIB2); 97453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MI.eraseFromParent(); 97553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng return true; 97653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } 97753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng 97853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MachineInstrBuilder MIB3 = BuildMI(MBB, MBBI, MI.getDebugLoc(), 9799fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng TII->get(PICAddOpc)) 98001b35c25deee3d4cab339e620c12c721e627d609Bob Wilson .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) 9819fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng .addReg(DstReg).addImm(LabelId); 9829fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng if (isARM) { 98353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng AddDefaultPred(MIB3); 98453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (Opcode == ARM::MOV_ga_pcrel_ldr) 985d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB2->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); 9865de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng } 98753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TransferImpOps(MI, MIB1, MIB3); 988b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng MI.eraseFromParent(); 9899fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 990d929f7773812535271ae6969331f8164c1f7f3b2Evan Cheng } 991d929f7773812535271ae6969331f8164c1f7f3b2Evan Cheng 9929fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::MOVi32imm: 9939fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::MOVCCi32imm: 9949fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::t2MOVi32imm: 9959fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::t2MOVCCi32imm: 9969fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng ExpandMOV32BitImm(MBB, MBBI); 9979fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 9989fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 999848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson case ARM::VLDMQIA: { 1000848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson unsigned NewOpc = ARM::VLDMDIA; 10019d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MachineInstrBuilder MIB = 100273fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); 10039d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned OpIdx = 0; 100473fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10059d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Grab the Q register destination. 10069d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson bool DstIsDead = MI.getOperand(OpIdx).isDead(); 10079d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned DstReg = MI.getOperand(OpIdx++).getReg(); 100873fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 100973fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling // Copy the source register. 10109d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 101173fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10129d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Copy the predicate operands. 10139d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 10149d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 101573fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10169d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Add the destination operands (D subregs). 10179d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D0 = TRI->getSubReg(DstReg, ARM::dsub_0); 10189d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D1 = TRI->getSubReg(DstReg, ARM::dsub_1); 10199d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)) 10209d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson .addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); 102173fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10229d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Add an implicit def for the super-register. 10239d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); 10249d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson TransferImpOps(MI, MIB, MIB); 10259d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MI.eraseFromParent(); 10269fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 10279d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson } 10289d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson 1029848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson case ARM::VSTMQIA: { 1030848b0c39b11801614c47e460248b60e8d40eb257Owen Anderson unsigned NewOpc = ARM::VSTMDIA; 10319d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MachineInstrBuilder MIB = 103273fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); 10339d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned OpIdx = 0; 103473fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10359d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Grab the Q register source. 10369d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson bool SrcIsKill = MI.getOperand(OpIdx).isKill(); 10379d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); 103873fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 103973fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling // Copy the destination register. 10409d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 104173fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10429d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Copy the predicate operands. 10439d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 10449d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addOperand(MI.getOperand(OpIdx++)); 104573fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10469d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson // Add the source operands (D subregs). 10479d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D0 = TRI->getSubReg(SrcReg, ARM::dsub_0); 10489d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson unsigned D1 = TRI->getSubReg(SrcReg, ARM::dsub_1); 10499d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MIB.addReg(D0).addReg(D1); 105073fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 1051d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner if (SrcIsKill) // Add an implicit kill for the Q register. 1052d7d030a44796adc73a6eaa939cd17e52047734c1Chris Lattner MIB->addRegisterKilled(SrcReg, TRI, true); 105373fe34a3ee866867d5028f4a9afa2c3b8efebcbaBill Wendling 10549d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson TransferImpOps(MI, MIB, MIB); 10559d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson MI.eraseFromParent(); 10569fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 10579d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson } 105865dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach case ARM::VDUPfqf: 105965dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach case ARM::VDUPfdf:{ 10608b8515c225c799e9df69bde8ffffa3c72cec9445Jim Grosbach unsigned NewOpc = Opcode == ARM::VDUPfqf ? ARM::VDUPLN32q : 10618b8515c225c799e9df69bde8ffffa3c72cec9445Jim Grosbach ARM::VDUPLN32d; 106265dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MachineInstrBuilder MIB = 106365dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); 106465dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned OpIdx = 0; 106565dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned SrcReg = MI.getOperand(1).getReg(); 106665dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned Lane = getARMRegisterNumbering(SrcReg) & 1; 106765dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach unsigned DReg = TRI->getMatchingSuperReg(SrcReg, 1068b181ad34869c4fa19c527ab8dfd5d438ad8b9bb3Jim Grosbach Lane & 1 ? ARM::ssub_1 : ARM::ssub_0, 1069b181ad34869c4fa19c527ab8dfd5d438ad8b9bb3Jim Grosbach &ARM::DPR_VFP2RegClass); 107065dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // The lane is [0,1] for the containing DReg superregister. 107165dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // Copy the dst/src register operands. 107265dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addOperand(MI.getOperand(OpIdx++)); 107365dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addReg(DReg); 107465dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach ++OpIdx; 107565dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // Add the lane select operand. 107665dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addImm(Lane); 107765dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach // Add the predicate operands. 107865dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addOperand(MI.getOperand(OpIdx++)); 107965dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MIB.addOperand(MI.getOperand(OpIdx++)); 108065dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach 108165dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach TransferImpOps(MI, MIB, MIB); 108265dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach MI.eraseFromParent(); 10839fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 108465dc30340cf874307eae11ec1195a1cd6d27fb13Jim Grosbach } 10859d4ebc0eb80c770aab5b51ca459748a6ac8f1699Bob Wilson 1086ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q8Pseudo: 1087ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q16Pseudo: 1088ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q32Pseudo: 1089ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1q64Pseudo: 109010b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q8PseudoWB_register: 109110b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q16PseudoWB_register: 109210b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q32PseudoWB_register: 109310b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q64PseudoWB_register: 109410b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q8PseudoWB_fixed: 109510b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q16PseudoWB_fixed: 109610b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q32PseudoWB_fixed: 109710b90a9bbf7dcae1568c03a03f9606f5395f2144Jim Grosbach case ARM::VLD1q64PseudoWB_fixed: 1098ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d8Pseudo: 1099ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d16Pseudo: 1100ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2d32Pseudo: 1101ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q8Pseudo: 1102ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q16Pseudo: 1103ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD2q32Pseudo: 1104a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2d8PseudoWB_fixed: 1105a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2d16PseudoWB_fixed: 1106a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2d32PseudoWB_fixed: 1107a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2q8PseudoWB_fixed: 1108a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2q16PseudoWB_fixed: 1109a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2q32PseudoWB_fixed: 1110a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2d8PseudoWB_register: 1111a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2d16PseudoWB_register: 1112a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2d32PseudoWB_register: 1113a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2q8PseudoWB_register: 1114a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2q16PseudoWB_register: 1115a4e3c7fc4ba2d55695b0484480685698132eba20Jim Grosbach case ARM::VLD2q32PseudoWB_register: 1116f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d8Pseudo: 1117f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d16Pseudo: 1118f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d32Pseudo: 1119ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1d64TPseudo: 1120f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d8Pseudo_UPD: 1121f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d16Pseudo_UPD: 1122f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3d32Pseudo_UPD: 1123f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q8Pseudo_UPD: 1124f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q16Pseudo_UPD: 1125f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q32Pseudo_UPD: 11267de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD3q8oddPseudo: 11277de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD3q16oddPseudo: 11287de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD3q32oddPseudo: 1129f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q8oddPseudo_UPD: 1130f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q16oddPseudo_UPD: 1131f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD3q32oddPseudo_UPD: 1132f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d8Pseudo: 1133f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d16Pseudo: 1134f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d32Pseudo: 1135ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson case ARM::VLD1d64QPseudo: 1136f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d8Pseudo_UPD: 1137f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d16Pseudo_UPD: 1138f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4d32Pseudo_UPD: 1139f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q8Pseudo_UPD: 1140f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q16Pseudo_UPD: 1141f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q32Pseudo_UPD: 11427de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD4q8oddPseudo: 11437de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD4q16oddPseudo: 11447de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VLD4q32oddPseudo: 1145f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q8oddPseudo_UPD: 1146f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q16oddPseudo_UPD: 1147f572191fe43025bd85ab5d398a5b53305fdc6b8bBob Wilson case ARM::VLD4q32oddPseudo_UPD: 11482a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq8Pseudo: 11492a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq16Pseudo: 11502a0e97431ecef2aa6a24a16ced207d5b53fcfc2dBob Wilson case ARM::VLD1DUPq32Pseudo: 1151096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach case ARM::VLD1DUPq8PseudoWB_fixed: 1152096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach case ARM::VLD1DUPq16PseudoWB_fixed: 1153096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach case ARM::VLD1DUPq32PseudoWB_fixed: 1154096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach case ARM::VLD1DUPq8PseudoWB_register: 1155096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach case ARM::VLD1DUPq16PseudoWB_register: 1156096334e25ea68ac970942ecb680a82fbb8ad206cJim Grosbach case ARM::VLD1DUPq32PseudoWB_register: 1157b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd8Pseudo: 1158b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd16Pseudo: 1159b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd32Pseudo: 1160b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd8Pseudo_UPD: 1161b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd16Pseudo_UPD: 1162b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson case ARM::VLD2DUPd32Pseudo_UPD: 116386c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd8Pseudo: 116486c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd16Pseudo: 116586c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd32Pseudo: 116686c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd8Pseudo_UPD: 116786c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd16Pseudo_UPD: 116886c6d80a7a20fa7decc3e914be5d1cb0f7f29a6fBob Wilson case ARM::VLD3DUPd32Pseudo_UPD: 11696c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd8Pseudo: 11706c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd16Pseudo: 11716c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd32Pseudo: 11726c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd8Pseudo_UPD: 11736c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd16Pseudo_UPD: 11746c4c982f83eea655e0f14610d2689fad722aeb7dBob Wilson case ARM::VLD4DUPd32Pseudo_UPD: 11758466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson ExpandVLD(MBBI); 11769fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 1177ffde080ae615906545eb33dab30e7bc47c2ac838Bob Wilson 1178e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q8Pseudo: 1179e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q16Pseudo: 1180e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q32Pseudo: 1181e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST1q64Pseudo: 11824334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q8PseudoWB_fixed: 11834334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q16PseudoWB_fixed: 11844334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q32PseudoWB_fixed: 11854334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q64PseudoWB_fixed: 11864334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q8PseudoWB_register: 11874334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q16PseudoWB_register: 11884334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q32PseudoWB_register: 11894334e032525d6c9038605f3871b945e8cbe6fab7Jim Grosbach case ARM::VST1q64PseudoWB_register: 1190e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d8Pseudo: 1191e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d16Pseudo: 1192e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d32Pseudo: 1193e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q8Pseudo: 1194e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q16Pseudo: 1195e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q32Pseudo: 1196e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d8Pseudo_UPD: 1197e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d16Pseudo_UPD: 1198e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2d32Pseudo_UPD: 1199e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q8Pseudo_UPD: 1200e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q16Pseudo_UPD: 1201e5ce4f68c786696a96acf1f1aa5431652abb6ce7Bob Wilson case ARM::VST2q32Pseudo_UPD: 120201ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d8Pseudo: 120301ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d16Pseudo: 120401ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d32Pseudo: 120501ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST1d64TPseudo: 120601ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d8Pseudo_UPD: 120701ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d16Pseudo_UPD: 120801ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3d32Pseudo_UPD: 1209d5ca201891d238ca2185831524a1e3f2670224dfJim Grosbach case ARM::VST1d64TPseudoWB_fixed: 1210d5ca201891d238ca2185831524a1e3f2670224dfJim Grosbach case ARM::VST1d64TPseudoWB_register: 121101ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q8Pseudo_UPD: 121201ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q16Pseudo_UPD: 121301ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q32Pseudo_UPD: 12147de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST3q8oddPseudo: 12157de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST3q16oddPseudo: 12167de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST3q32oddPseudo: 121701ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q8oddPseudo_UPD: 121801ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q16oddPseudo_UPD: 121901ba461af7eafc9d181a5c349487691f2e801438Bob Wilson case ARM::VST3q32oddPseudo_UPD: 1220709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d8Pseudo: 1221709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d16Pseudo: 1222709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d32Pseudo: 122370e48b23a3455e4689ee24cec4eb153d67223e86Bob Wilson case ARM::VST1d64QPseudo: 1224709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d8Pseudo_UPD: 1225709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d16Pseudo_UPD: 1226709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4d32Pseudo_UPD: 12274c7edb3ad8bd513c59190f6ebee9bee34af7d247Jim Grosbach case ARM::VST1d64QPseudoWB_fixed: 12284c7edb3ad8bd513c59190f6ebee9bee34af7d247Jim Grosbach case ARM::VST1d64QPseudoWB_register: 1229709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q8Pseudo_UPD: 1230709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q16Pseudo_UPD: 1231709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q32Pseudo_UPD: 12327de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST4q8oddPseudo: 12337de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST4q16oddPseudo: 12347de6814405ab02591235f0826b8e6d98fd76c8baBob Wilson case ARM::VST4q32oddPseudo: 1235709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q8oddPseudo_UPD: 1236709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q16oddPseudo_UPD: 1237709d59255a3100c7d440c93069efa1f726677a27Bob Wilson case ARM::VST4q32oddPseudo_UPD: 12388466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson ExpandVST(MBBI); 12399fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 12408466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson 1241b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq8Pseudo: 1242b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq16Pseudo: 1243b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq32Pseudo: 1244b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq8Pseudo_UPD: 1245b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq16Pseudo_UPD: 1246b796bbb6de19872c0c1921b8b3f05206dd33c97dBob Wilson case ARM::VLD1LNq32Pseudo_UPD: 12478466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd8Pseudo: 12488466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd16Pseudo: 12498466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd32Pseudo: 12508466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq16Pseudo: 12518466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq32Pseudo: 12528466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd8Pseudo_UPD: 12538466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd16Pseudo_UPD: 12548466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNd32Pseudo_UPD: 12558466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq16Pseudo_UPD: 12568466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD2LNq32Pseudo_UPD: 12578466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd8Pseudo: 12588466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd16Pseudo: 12598466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd32Pseudo: 12608466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq16Pseudo: 12618466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq32Pseudo: 12628466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd8Pseudo_UPD: 12638466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd16Pseudo_UPD: 12648466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNd32Pseudo_UPD: 12658466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq16Pseudo_UPD: 12668466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD3LNq32Pseudo_UPD: 12678466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd8Pseudo: 12688466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd16Pseudo: 12698466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd32Pseudo: 12708466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq16Pseudo: 12718466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq32Pseudo: 12728466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd8Pseudo_UPD: 12738466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd16Pseudo_UPD: 12748466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNd32Pseudo_UPD: 12758466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq16Pseudo_UPD: 12768466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VLD4LNq32Pseudo_UPD: 1277d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq8Pseudo: 1278d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq16Pseudo: 1279d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq32Pseudo: 1280d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq8Pseudo_UPD: 1281d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq16Pseudo_UPD: 1282d0c6bc220433fab06bc1507f963ea5883fdc4f69Bob Wilson case ARM::VST1LNq32Pseudo_UPD: 12838466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd8Pseudo: 12848466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd16Pseudo: 12858466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd32Pseudo: 12868466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq16Pseudo: 12878466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq32Pseudo: 12888466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd8Pseudo_UPD: 12898466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd16Pseudo_UPD: 12908466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNd32Pseudo_UPD: 12918466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq16Pseudo_UPD: 12928466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST2LNq32Pseudo_UPD: 12938466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd8Pseudo: 12948466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd16Pseudo: 12958466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd32Pseudo: 12968466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq16Pseudo: 12978466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq32Pseudo: 12988466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd8Pseudo_UPD: 12998466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd16Pseudo_UPD: 13008466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNd32Pseudo_UPD: 13018466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq16Pseudo_UPD: 13028466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST3LNq32Pseudo_UPD: 13038466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd8Pseudo: 13048466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd16Pseudo: 13058466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd32Pseudo: 13068466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq16Pseudo: 13078466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq32Pseudo: 13088466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd8Pseudo_UPD: 13098466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd16Pseudo_UPD: 13108466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNd32Pseudo_UPD: 13118466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq16Pseudo_UPD: 13128466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson case ARM::VST4LNq32Pseudo_UPD: 13138466fa1842ad4f2d6fadcf5c23c15319ae96b972Bob Wilson ExpandLaneOp(MBBI); 13149fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return true; 13159fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 13169fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBL2Pseudo: ExpandVTBL(MBBI, ARM::VTBL2, false, 2); return true; 13179fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBL3Pseudo: ExpandVTBL(MBBI, ARM::VTBL3, false, 3); return true; 13189fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBL4Pseudo: ExpandVTBL(MBBI, ARM::VTBL4, false, 4); return true; 13199fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBX2Pseudo: ExpandVTBL(MBBI, ARM::VTBX2, true, 2); return true; 13209fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBX3Pseudo: ExpandVTBL(MBBI, ARM::VTBX3, true, 3); return true; 13219fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng case ARM::VTBX4Pseudo: ExpandVTBL(MBBI, ARM::VTBX4, true, 4); return true; 13229fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng } 13239fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 13249fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng return false; 13259fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng} 1326709d59255a3100c7d440c93069efa1f726677a27Bob Wilson 13279fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Chengbool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) { 13289fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng bool Modified = false; 13299fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng 13309fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); 13319fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng while (MBBI != E) { 13329fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng MachineBasicBlock::iterator NMBBI = llvm::next(MBBI); 13339fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng Modified |= ExpandMI(MBB, MBBI); 1334b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng MBBI = NMBBI; 1335b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng } 1336b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1337b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return Modified; 1338b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 1339b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1340b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Chengbool ARMExpandPseudo::runOnMachineFunction(MachineFunction &MF) { 134153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const TargetMachine &TM = MF.getTarget(); 134253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TII = static_cast<const ARMBaseInstrInfo*>(TM.getInstrInfo()); 134353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TRI = TM.getRegisterInfo(); 134453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng STI = &TM.getSubtarget<ARMSubtarget>(); 13459fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng AFI = MF.getInfo<ARMFunctionInfo>(); 1346b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1347b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng bool Modified = false; 1348b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng for (MachineFunction::iterator MFI = MF.begin(), E = MF.end(); MFI != E; 1349b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng ++MFI) 1350b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng Modified |= ExpandMBB(*MFI); 1351e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen if (VerifyARMPseudo) 1352e69438fb87623dd6fdeeb99b647a46e877eb6183Jakob Stoklund Olesen MF.verify(this, "After expanding ARM pseudo instructions."); 1353b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return Modified; 1354b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 1355b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng 1356b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng/// createARMExpandPseudoPass - returns an instance of the pseudo instruction 1357b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng/// expansion pass. 1358b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan ChengFunctionPass *llvm::createARMExpandPseudoPass() { 1359b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng return new ARMExpandPseudo(); 1360b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng} 1361