MipsAsmPrinter.cpp revision f5b6a47bb57fb5ffc734416d4d5d993e1a06273b
1//===-- MipsAsmPrinter.cpp - Mips LLVM assembly writer --------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a printer that converts from our internal representation
11// of machine-dependent LLVM code to GAS-format MIPS assembly language.
12//
13//===----------------------------------------------------------------------===//
14
15#define DEBUG_TYPE "mips-asm-printer"
16
17#include "Mips.h"
18#include "MipsSubtarget.h"
19#include "MipsInstrInfo.h"
20#include "MipsTargetMachine.h"
21#include "MipsMachineFunction.h"
22#include "llvm/Constants.h"
23#include "llvm/DerivedTypes.h"
24#include "llvm/Module.h"
25#include "llvm/CodeGen/AsmPrinter.h"
26#include "llvm/CodeGen/MachineFunctionPass.h"
27#include "llvm/CodeGen/MachineConstantPool.h"
28#include "llvm/CodeGen/MachineFrameInfo.h"
29#include "llvm/CodeGen/MachineInstr.h"
30#include "llvm/Target/TargetAsmInfo.h"
31#include "llvm/Target/TargetData.h"
32#include "llvm/Target/TargetMachine.h"
33#include "llvm/Target/TargetOptions.h"
34#include "llvm/Support/Mangler.h"
35#include "llvm/ADT/Statistic.h"
36#include "llvm/ADT/StringExtras.h"
37#include "llvm/Support/Debug.h"
38#include "llvm/Support/CommandLine.h"
39#include "llvm/Support/MathExtras.h"
40#include <cctype>
41
42using namespace llvm;
43
44STATISTIC(EmittedInsts, "Number of machine instrs printed");
45
46namespace {
47  struct VISIBILITY_HIDDEN MipsAsmPrinter : public AsmPrinter {
48
49    const MipsSubtarget *Subtarget;
50
51    MipsAsmPrinter(std::ostream &O, MipsTargetMachine &TM,
52                   const TargetAsmInfo *T):
53                   AsmPrinter(O, TM, T) {
54      Subtarget = &TM.getSubtarget<MipsSubtarget>();
55    }
56
57    virtual const char *getPassName() const {
58      return "Mips Assembly Printer";
59    }
60
61    virtual std::string getSectionForFunction(const Function &F) const;
62    bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
63                         unsigned AsmVariant, const char *ExtraCode);
64    void printOperand(const MachineInstr *MI, int opNum);
65    void printMemOperand(const MachineInstr *MI, int opNum,
66                         const char *Modifier = 0);
67    void printFCCOperand(const MachineInstr *MI, int opNum,
68                         const char *Modifier = 0);
69    void printModuleLevelGV(const GlobalVariable* GVar);
70    void printSavedRegsBitmask(MachineFunction &MF);
71    void printHex32(unsigned int Value);
72
73    const char *emitCurrentABIString(void);
74    void emitFunctionStart(MachineFunction &MF);
75    void emitFunctionEnd(MachineFunction &MF);
76    void emitFrameDirective(MachineFunction &MF);
77
78    bool printInstruction(const MachineInstr *MI);  // autogenerated.
79    bool runOnMachineFunction(MachineFunction &F);
80    bool doInitialization(Module &M);
81    bool doFinalization(Module &M);
82  };
83} // end of anonymous namespace
84
85#include "MipsGenAsmWriter.inc"
86
87/// createMipsCodePrinterPass - Returns a pass that prints the MIPS
88/// assembly code for a MachineFunction to the given output stream,
89/// using the given target machine description.  This should work
90/// regardless of whether the function is in SSA form.
91FunctionPass *llvm::createMipsCodePrinterPass(std::ostream &o,
92                                              MipsTargetMachine &tm)
93{
94  return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo());
95}
96
97//===----------------------------------------------------------------------===//
98//
99//  Mips Asm Directives
100//
101//  -- Frame directive "frame Stackpointer, Stacksize, RARegister"
102//  Describe the stack frame.
103//
104//  -- Mask directives "(f)mask  bitmask, offset"
105//  Tells the assembler which registers are saved and where.
106//  bitmask - contain a little endian bitset indicating which registers are
107//            saved on function prologue (e.g. with a 0x80000000 mask, the
108//            assembler knows the register 31 (RA) is saved at prologue.
109//  offset  - the position before stack pointer subtraction indicating where
110//            the first saved register on prologue is located. (e.g. with a
111//
112//  Consider the following function prologue:
113//
114//    .frame  $fp,48,$ra
115//    .mask   0xc0000000,-8
116//       addiu $sp, $sp, -48
117//       sw $ra, 40($sp)
118//       sw $fp, 36($sp)
119//
120//    With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
121//    30 (FP) are saved at prologue. As the save order on prologue is from
122//    left to right, RA is saved first. A -8 offset means that after the
123//    stack pointer subtration, the first register in the mask (RA) will be
124//    saved at address 48-8=40.
125//
126//===----------------------------------------------------------------------===//
127
128//===----------------------------------------------------------------------===//
129// Mask directives
130//===----------------------------------------------------------------------===//
131
132// Create a bitmask with all callee saved registers for CPU or Floating Point
133// registers. For CPU registers consider RA, GP and FP for saving if necessary.
134void MipsAsmPrinter::
135printSavedRegsBitmask(MachineFunction &MF)
136{
137  const TargetRegisterInfo &RI = *TM.getRegisterInfo();
138  MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
139
140  // CPU and FPU Saved Registers Bitmasks
141  unsigned int CPUBitmask = 0;
142  unsigned int FPUBitmask = 0;
143
144  // Set the CPU and FPU Bitmasks
145  MachineFrameInfo *MFI = MF.getFrameInfo();
146  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
147  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
148    unsigned RegNum = MipsRegisterInfo::getRegisterNumbering(CSI[i].getReg());
149    if (CSI[i].getRegClass() == Mips::CPURegsRegisterClass)
150      CPUBitmask |= (1 << RegNum);
151    else
152      FPUBitmask |= (1 << RegNum);
153  }
154
155  // Return Address and Frame registers must also be set in CPUBitmask.
156  if (RI.hasFP(MF))
157    CPUBitmask |= (1 << MipsRegisterInfo::
158                getRegisterNumbering(RI.getFrameRegister(MF)));
159
160  if (MF.getFrameInfo()->hasCalls())
161    CPUBitmask |= (1 << MipsRegisterInfo::
162                getRegisterNumbering(RI.getRARegister()));
163
164  // Print CPUBitmask
165  O << "\t.mask \t"; printHex32(CPUBitmask); O << ','
166    << MipsFI->getCPUTopSavedRegOff() << '\n';
167
168  // Print FPUBitmask
169  O << "\t.fmask\t"; printHex32(FPUBitmask); O << ","
170    << MipsFI->getFPUTopSavedRegOff() << '\n';
171}
172
173// Print a 32 bit hex number with all numbers.
174void MipsAsmPrinter::
175printHex32(unsigned int Value)
176{
177  O << "0x" << std::hex;
178  for (int i = 7; i >= 0; i--)
179    O << std::hex << ( (Value & (0xF << (i*4))) >> (i*4) );
180  O << std::dec;
181}
182
183//===----------------------------------------------------------------------===//
184// Frame and Set directives
185//===----------------------------------------------------------------------===//
186
187/// Frame Directive
188void MipsAsmPrinter::
189emitFrameDirective(MachineFunction &MF)
190{
191  const TargetRegisterInfo &RI = *TM.getRegisterInfo();
192
193  unsigned stackReg  = RI.getFrameRegister(MF);
194  unsigned returnReg = RI.getRARegister();
195  unsigned stackSize = MF.getFrameInfo()->getStackSize();
196
197
198  O << "\t.frame\t" << '$' << LowercaseString(RI.get(stackReg).AsmName)
199                    << ',' << stackSize << ','
200                    << '$' << LowercaseString(RI.get(returnReg).AsmName)
201                    << '\n';
202}
203
204/// Emit Set directives.
205const char * MipsAsmPrinter::
206emitCurrentABIString(void)
207{
208  switch(Subtarget->getTargetABI()) {
209    case MipsSubtarget::O32:  return "abi32";
210    case MipsSubtarget::O64:  return "abiO64";
211    case MipsSubtarget::N32:  return "abiN32";
212    case MipsSubtarget::N64:  return "abi64";
213    case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
214    default: break;
215  }
216
217  assert(0 && "Unknown Mips ABI");
218  return NULL;
219}
220
221// Substitute old hook with new one temporary
222std::string MipsAsmPrinter::getSectionForFunction(const Function &F) const {
223  return TAI->SectionForGlobal(&F);
224}
225
226/// Emit the directives used by GAS on the start of functions
227void MipsAsmPrinter::
228emitFunctionStart(MachineFunction &MF)
229{
230  // Print out the label for the function.
231  const Function *F = MF.getFunction();
232  SwitchToTextSection(TAI->SectionForGlobal(F).c_str());
233
234  // 2 bits aligned
235  EmitAlignment(2, F);
236
237  O << "\t.globl\t"  << CurrentFnName << '\n';
238  O << "\t.ent\t"    << CurrentFnName << '\n';
239
240  printVisibility(CurrentFnName, F->getVisibility());
241
242  if ((TAI->hasDotTypeDotSizeDirective()) && Subtarget->isLinux())
243    O << "\t.type\t"   << CurrentFnName << ", @function\n";
244
245  O << CurrentFnName << ":\n";
246
247  emitFrameDirective(MF);
248  printSavedRegsBitmask(MF);
249
250  O << '\n';
251}
252
253/// Emit the directives used by GAS on the end of functions
254void MipsAsmPrinter::
255emitFunctionEnd(MachineFunction &MF)
256{
257  // There are instruction for this macros, but they must
258  // always be at the function end, and we can't emit and
259  // break with BB logic.
260  O << "\t.set\tmacro\n";
261  O << "\t.set\treorder\n";
262
263  O << "\t.end\t" << CurrentFnName << '\n';
264  if (TAI->hasDotTypeDotSizeDirective() && !Subtarget->isLinux())
265    O << "\t.size\t" << CurrentFnName << ", .-" << CurrentFnName << '\n';
266}
267
268/// runOnMachineFunction - This uses the printMachineInstruction()
269/// method to print assembly for each instruction.
270bool MipsAsmPrinter::
271runOnMachineFunction(MachineFunction &MF)
272{
273  SetupMachineFunction(MF);
274
275  // Print out constants referenced by the function
276  EmitConstantPool(MF.getConstantPool());
277
278  // Print out jump tables referenced by the function
279  EmitJumpTableInfo(MF.getJumpTableInfo(), MF);
280
281  O << "\n\n";
282
283  // What's my mangled name?
284  CurrentFnName = Mang->getValueName(MF.getFunction());
285
286  // Emit the function start directives
287  emitFunctionStart(MF);
288
289  // Print out code for the function.
290  for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
291       I != E; ++I) {
292
293    // Print a label for the basic block.
294    if (I != MF.begin()) {
295      printBasicBlockLabel(I, true, true);
296      O << '\n';
297    }
298
299    for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
300         II != E; ++II) {
301      // Print the assembly for the instruction.
302      printInstruction(II);
303      ++EmittedInsts;
304    }
305
306    // Each Basic Block is separated by a newline
307    O << '\n';
308  }
309
310  // Emit function end directives
311  emitFunctionEnd(MF);
312
313  // We didn't modify anything.
314  return false;
315}
316
317// Print out an operand for an inline asm expression.
318bool MipsAsmPrinter::
319PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
320                unsigned AsmVariant, const char *ExtraCode)
321{
322  // Does this asm operand have a single letter operand modifier?
323  if (ExtraCode && ExtraCode[0])
324    return true; // Unknown modifier.
325
326  printOperand(MI, OpNo);
327  return false;
328}
329
330void MipsAsmPrinter::
331printOperand(const MachineInstr *MI, int opNum)
332{
333  const MachineOperand &MO = MI->getOperand(opNum);
334  const TargetRegisterInfo  &RI = *TM.getRegisterInfo();
335  bool closeP = false;
336  bool isPIC = (TM.getRelocationModel() == Reloc::PIC_);
337  bool isCodeLarge = (TM.getCodeModel() == CodeModel::Large);
338
339  // %hi and %lo used on mips gas to load global addresses on
340  // static code. %got is used to load global addresses when
341  // using PIC_. %call16 is used to load direct call targets
342  // on PIC_ and small code size. %call_lo and %call_hi load
343  // direct call targets on PIC_ and large code size.
344  if (MI->getOpcode() == Mips::LUi && !MO.isRegister()
345      && !MO.isImmediate()) {
346    if ((isPIC) && (isCodeLarge))
347      O << "%call_hi(";
348    else
349      O << "%hi(";
350    closeP = true;
351  } else if ((MI->getOpcode() == Mips::ADDiu) && !MO.isRegister()
352             && !MO.isImmediate()) {
353    const MachineOperand &firstMO = MI->getOperand(opNum-1);
354    if (firstMO.getReg() == Mips::GP)
355      O << "%gp_rel(";
356    else
357      O << "%lo(";
358    closeP = true;
359  } else if ((isPIC) && (MI->getOpcode() == Mips::LW)
360             && (!MO.isRegister()) && (!MO.isImmediate())) {
361    const MachineOperand &firstMO = MI->getOperand(opNum-1);
362    const MachineOperand &lastMO  = MI->getOperand(opNum+1);
363    if ((firstMO.isRegister()) && (lastMO.isRegister())) {
364      if ((firstMO.getReg() == Mips::T9) && (lastMO.getReg() == Mips::GP)
365          && (!isCodeLarge))
366        O << "%call16(";
367      else if ((firstMO.getReg() != Mips::T9) && (lastMO.getReg() == Mips::GP))
368        O << "%got(";
369      else if ((firstMO.getReg() == Mips::T9) && (lastMO.getReg() != Mips::GP)
370               && (isCodeLarge))
371        O << "%call_lo(";
372      closeP = true;
373    }
374  }
375
376  switch (MO.getType())
377  {
378    case MachineOperand::MO_Register:
379      if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
380        O << '$' << LowercaseString (RI.get(MO.getReg()).AsmName);
381      else
382        O << '$' << MO.getReg();
383      break;
384
385    case MachineOperand::MO_Immediate:
386      if ((MI->getOpcode() == Mips::SLTiu) || (MI->getOpcode() == Mips::ORi) ||
387          (MI->getOpcode() == Mips::LUi)   || (MI->getOpcode() == Mips::ANDi))
388        O << (unsigned short int)MO.getImm();
389      else
390        O << (short int)MO.getImm();
391      break;
392
393    case MachineOperand::MO_MachineBasicBlock:
394      printBasicBlockLabel(MO.getMBB());
395      return;
396
397    case MachineOperand::MO_GlobalAddress:
398      O << Mang->getValueName(MO.getGlobal());
399      break;
400
401    case MachineOperand::MO_ExternalSymbol:
402      O << MO.getSymbolName();
403      break;
404
405    case MachineOperand::MO_JumpTableIndex:
406      O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
407      << '_' << MO.getIndex();
408      break;
409
410    // FIXME: Verify correct
411    case MachineOperand::MO_ConstantPoolIndex:
412      O << TAI->getPrivateGlobalPrefix() << "CPI"
413        << getFunctionNumber() << "_" << MO.getIndex();
414      break;
415
416    default:
417      O << "<unknown operand type>"; abort (); break;
418  }
419
420  if (closeP) O << ")";
421}
422
423void MipsAsmPrinter::
424printMemOperand(const MachineInstr *MI, int opNum, const char *Modifier)
425{
426  // when using stack locations for not load/store instructions
427  // print the same way as all normal 3 operand instructions.
428  if (Modifier && !strcmp(Modifier, "stackloc")) {
429    printOperand(MI, opNum+1);
430    O << ", ";
431    printOperand(MI, opNum);
432    return;
433  }
434
435  // Load/Store memory operands -- imm($reg)
436  // If PIC target the target is loaded as the
437  // pattern lw $25,%call16($28)
438  printOperand(MI, opNum);
439  O << "(";
440  printOperand(MI, opNum+1);
441  O << ")";
442}
443
444void MipsAsmPrinter::
445printFCCOperand(const MachineInstr *MI, int opNum, const char *Modifier)
446{
447  const MachineOperand& MO = MI->getOperand(opNum);
448  O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm());
449}
450
451bool MipsAsmPrinter::
452doInitialization(Module &M)
453{
454  Mang = new Mangler(M);
455
456  // Tell the assembler which ABI we are using
457  O << "\t.section .mdebug." << emitCurrentABIString() << '\n';
458
459  // TODO: handle O64 ABI
460  if (Subtarget->isABI_EABI())
461    O << "\t.section .gcc_compiled_long" <<
462      (Subtarget->isGP32bit() ? "32" : "64") << '\n';
463
464  // return to previous section
465  O << "\t.previous" << '\n';
466
467  return false; // success
468}
469
470void MipsAsmPrinter::
471printModuleLevelGV(const GlobalVariable* GVar) {
472  const TargetData *TD = TM.getTargetData();
473
474  if (!GVar->hasInitializer())
475    return;   // External global require no code
476
477  // Check to see if this is a special global used by LLVM, if so, emit it.
478  if (EmitSpecialLLVMGlobal(GVar))
479    return;
480
481  O << "\n\n";
482  std::string SectionName = TAI->SectionForGlobal(GVar);
483  std::string name = Mang->getValueName(GVar);
484  Constant *C = GVar->getInitializer();
485  const Type *CTy = C->getType();
486  unsigned Size = TD->getABITypeSize(CTy);
487  const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
488  bool printSizeAndType = true;
489
490  // A data structure or array is aligned in memory to the largest
491  // alignment boundary required by any data type inside it (this matches
492  // the Preferred Type Alignment). For integral types, the alignment is
493  // the type size.
494  unsigned Align;
495  if (CTy->getTypeID() == Type::IntegerTyID ||
496      CTy->getTypeID() == Type::VoidTyID) {
497    assert(!(Size & (Size-1)) && "Alignment is not a power of two!");
498    Align = Log2_32(Size);
499  } else
500    Align = TD->getPreferredTypeAlignmentShift(CTy);
501
502  printVisibility(name, GVar->getVisibility());
503
504  SwitchToDataSection(SectionName.c_str());
505
506  if (C->isNullValue() && !GVar->hasSection()) {
507    if (!GVar->isThreadLocal() &&
508        (GVar->hasInternalLinkage() || GVar->isWeakForLinker())) {
509      if (Size == 0) Size = 1;   // .comm Foo, 0 is undefined, avoid it.
510
511      if (GVar->hasInternalLinkage())
512        O << "\t.local\t" << name << '\n';
513
514      O << TAI->getCOMMDirective() << name << ',' << Size;
515      if (TAI->getCOMMDirectiveTakesAlignment())
516        O << ',' << (1 << Align);
517
518      O << '\n';
519      return;
520    }
521  }
522  switch (GVar->getLinkage()) {
523   case GlobalValue::LinkOnceLinkage:
524   case GlobalValue::CommonLinkage:
525   case GlobalValue::WeakLinkage:
526    // FIXME: Verify correct for weak.
527    // Nonnull linkonce -> weak
528    O << "\t.weak " << name << '\n';
529    break;
530   case GlobalValue::AppendingLinkage:
531    // FIXME: appending linkage variables should go into a section of their name
532    // or something.  For now, just emit them as external.
533   case GlobalValue::ExternalLinkage:
534    // If external or appending, declare as a global symbol
535    O << TAI->getGlobalDirective() << name << '\n';
536    // Fall Through
537   case GlobalValue::InternalLinkage:
538    if (CVA && CVA->isCString())
539      printSizeAndType = false;
540    break;
541   case GlobalValue::GhostLinkage:
542    cerr << "Should not have any unmaterialized functions!\n";
543    abort();
544   case GlobalValue::DLLImportLinkage:
545    cerr << "DLLImport linkage is not supported by this target!\n";
546    abort();
547   case GlobalValue::DLLExportLinkage:
548    cerr << "DLLExport linkage is not supported by this target!\n";
549    abort();
550   default:
551    assert(0 && "Unknown linkage type!");
552  }
553
554  EmitAlignment(Align, GVar);
555
556  if (TAI->hasDotTypeDotSizeDirective() && printSizeAndType) {
557    O << "\t.type " << name << ",@object\n";
558    O << "\t.size " << name << ',' << Size << '\n';
559  }
560
561  O << name << ":\n";
562  EmitGlobalConstant(C);
563}
564
565bool MipsAsmPrinter::
566doFinalization(Module &M)
567{
568  // Print out module-level global variables here.
569  for (Module::const_global_iterator I = M.global_begin(),
570         E = M.global_end(); I != E; ++I)
571    printModuleLevelGV(I);
572
573  O << '\n';
574
575  return AsmPrinter::doFinalization(M);
576}
577