History log of /external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
cd81d94322a39503e4a3e87b6ee03d4fcb3465fb 21-Jul-2014 Stephen Hines <srhines@google.com> Update LLVM for rebase to r212749.

Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls

Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
a87a147ee7bb9adb4caea631ff0ba7e66bb9b0b5 20-Nov-2013 Bill Wendling <isanbard@gmail.com> Merging r195152:
------------------------------------------------------------------------
r195152 | jacksprat | 2013-11-19 12:53:28 -0800 (Tue, 19 Nov 2013) | 1 line

reverts 195057 per request
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195220 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
e53969b4758274ee833ce3acef37134bcf6554ea 19-Nov-2013 Jack Carter <jack.carter@imgtec.com> [Mips] Support for MicroMips STO refactoring.

No true functional changes.

Change the "hack" name of emitMipsHackSTOCG to emitSymSTO.

Remove demonstration code in AsmParser for emitMipsHackSTOCG and
emitMipsHackELFFlags. The STO field is in an ELF symbol and is not
an explicit directive. That said, we are missing the compliment call
in AsmParser and that will need to be addressed soon.

XFAIL dummy tests for emitMipsHackELFFlags and emitMipsHackELFFlags.
These will built out with following patches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
9e2838e29b0820afc35f6ef2d465d4aca9ed402a 12-Nov-2013 Daniel Sanders <daniel.sanders@imgtec.com> [mips][msa] Enable inlinse assembly for MSA.

Like GCC, this re-uses the 'f' constraint and a new 'w' print-modifier:
asm ("ldi.w %w0, 1", "=f"(result));

Unlike GCC, the 'w' print-modifer is not _required_ to produce the intended
output. This is a consequence of differences in the internal handling of
the registers in each compiler. To be source-compatible between the
compilers, users must use the 'w' print-modifier.

MSA registers (including control registers) are supported in clobber lists.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194476 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
bb47fd04c9b1616c0371eb2c488c5f0f665c25f8 12-Nov-2013 Daniel Sanders <daniel.sanders@imgtec.com> [mips][msa] Added support for matching bclr, and bclri from normal IR (i.e. not intrinsics)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
ffc7dca885151ed42642c2d6733e8db75d276621 29-Oct-2013 Rafael Espindola <rafael.espindola@gmail.com> Add a helper getSymbol to AsmPrinter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193627 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
a300b1cc29020b7dfaf7bfe443d38af8fbec7433 29-Oct-2013 Rafael Espindola <rafael.espindola@gmail.com> The asm printer has a mangler. Use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193618 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
cb2280e4c7c5a07104306cc73265ff64fa8dd973 27-Oct-2013 Reed Kotler <rkotler@mips.com> Make first substantial checkin of my port of ARM constant islands code to Mips.
Before I just ported the shell of the pass. I've tried to keep everything
nearly identical to the ARM version. I think it will be very easy to eventually
merge these two and create a new more general pass that other targets can
use. I have some improvements I would like to make to allow pools to
be shared across functions and some other things. When I'm all done we
can think about making a more general pass. More to be ported but the
basic mechanism works now almost as good as gcc mips16.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193509 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
320296a4cfe414ce59f406b8a5ce15272f563103 08-Oct-2013 Rafael Espindola <rafael.espindola@gmail.com> Add a MCTargetStreamer interface.

This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.

The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.

I will send an email to llvmdev with instructions on how to use this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192181 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
5e195a4c8d8cd4498ab7e0aa16a3b6f273daf457 05-Oct-2013 Rafael Espindola <rafael.espindola@gmail.com> Remove some really nasty uses of hasRawTextSupport.

When MC was first added, targets could use hasRawTextSupport to keep features
working before they were added to the MC interface.

The design goal of MC is to provide an uniform api for printing assembly and
object files. Short of relaxations and other corner cases, a object file is
just another representation of the assembly.

It was never the intention that targets would keep doing things like

if (hasRawTextSupport())
Set flags in one way.
else
Set flags in another way.

When they do that they create two code paths and the object file is no longer
just another representation of the assembly. This also then requires testing
with llc -filetype=obj, which is extremelly brittle.

This patch removes some of these hacks by replacing them with smaller ones.
The ARM flag setting is trivial, so I just moved it to the constructor. For
Mips, the patch adds two temporary hack directives that allow the assembly
to represent the same things as the object file was already able to.

The hope is that the mips developers will replace the hack directives with
the same ones that gas uses and drop the -print-hack-directives flag.

I will also try to implement a target streamer interface, so that we can
move this out of the common code.

In summary, for any new work, two rules of the thumb are
* Don't use "llc -filetype=obj" in tests.
* Don't add calls to hasRawTextSupport.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192035 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
6d389f5ebae9aa08309c5795234cf155054b6b39 05-Oct-2013 Jack Carter <jack.carter@imgtec.com> reverting per request

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191992 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
8e48edcf3dd7dea9fec58b05a6ace6fbd0260d7c 04-Oct-2013 Jack Carter <jack.carter@imgtec.com> [MC][AsmParser] Hook for post assembly file processing

This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file
directive processing.

Mips assembly requires processing inline directives that directly and
indirectly affect the output ELF header flags. This patch handles one
".abicalls".

To process these directives we are following the model the code generator
uses by storing state in a container as we go through processing and when
we detect the end of input file processing, AsmParser is notified and we
update the ELF header flags through a MipsELFStreamer method with a call from
MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer).

This patch will allow other targets the same functionality.

Jack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191982 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
1858786285139b87961d9ca08de91dcd59364afb 07-Aug-2013 Akira Hatanaka <ahatanaka@mips.com> [mips] Rename register classes CPURegs and CPU64Regs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187832 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
842cfc91f29f6446bb675891f7abc127f9fbe768 26-Jun-2013 Akira Hatanaka <ahatanaka@mips.com> [mips] Do not emit ".option pic0" if target is mips64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
571dd98ea4d6bf911c3b46a20ca3b5e3b341b21f 18-Jun-2013 Jack Carter <jack.carter@imgtec.com> Mips ELF: Mark object file as ABI compliant

When producing objects that are abi compliant we are
marking neither the object file nor the assembly file
correctly and thus generate warnings.

We need to set the EF_CPIC flag in the ELF header when
generating direct object.

Note that the warning is only generated when compiling without PIC.

When compiling with clang the warning will be suppressed by supplying:

-Wa,-mno-shared -Wa,-call_nonpic

Also the following directive should also be added:

.option pic0

when compiling without PIC, This eliminates the need for supplying:

-mno-shared -call_nonpic

on the assembler command line.

Patch by Douglas Gilmore


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184220 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
0187e7a9ba5c50b4559e0c2e0afceb6d5cd32190 16-Jun-2013 David Blaikie <dblaikie@gmail.com> DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs

Frame index handling is now target-agnostic, so delete the target hooks
for creation & asm printing of target-specific addressing in DBG_VALUEs
and any related functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
2bb955a6931580c9bb0472aa29b3fbbabe263295 04-May-2013 Reed Kotler <rkotler@mips.com> Remove some uneeded pseudos in the presence of the naked function attribute.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181072 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
a9a5c537ad0bf5ab68ed79c163500a4fcb3fc3ff 10-Apr-2013 Jack Carter <jack.carter@imgtec.com> Mips specific inline asm operand modifier 'D'

Modifier 'D' is to use the second word of a double integer.

We had previously implemented the pure register varient of
the modifier and this patch implements the memory reference.



#include "stdio.h"

int b[8] = {0,1,2,3,4,5,6,7};
void main()
{
int i;

// The first word. Notice, no 'D'
{asm (
"lw %0,%1;"
: "=r" (i)
: "m" (*(b+4))
);}

printf("%d\n",i);

// The second word
{asm (
"lw %0,%D1;"
: "=r" (i)
: "m" (*(b+4))
);}

printf("%d\n",i);
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179135 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
a430cb613b6e93c05f128b04323c57acfd08686d 09-Apr-2013 Reed Kotler <rkotler@mips.com> This patch enables llvm to switch between compiling for mips32/mips64
and mips16 on a per function basis.

Because this patch is somewhat involved I have provide an overview of the
key pieces of it.

The patch is written so as to not change the behavior of the non mixed
mode. We have tested this a lot but it is something new to switch subtargets
so we don't want any chance of regression in the mainline compiler until
we have more confidence in this.

Mips32/64 are very different from Mip16 as is the case of ARM vs Thumb1.
For that reason there are derived versions of the register info, frame info,
instruction info and instruction selection classes.

Now we register three separate passes for instruction selection.
One which is used to switch subtargets (MipsModuleISelDAGToDAG.cpp) and then
one for each of the current subtargets (Mips16ISelDAGToDAG.cpp and
MipsSEISelDAGToDAG.cpp).

When the ModuleISel pass runs, it determines if there is a need to switch
subtargets and if so, the owning pointers in MipsTargetMachine are
appropriately changed.

When 16Isel or SEIsel is run, they will return immediately without doing
any work if the current subtarget mode does not apply to them.

In addition, MipsAsmPrinter needs to be reset on a function basis.

The pass BasicTargetTransformInfo is substituted with a null pass since the
pass is immutable and really needs to be a function pass for it to be
used with changing subtargets. This will be fixed in a follow on patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179118 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
ccb3c9c2702f548fd0a7d60a622e6f4fdf0940e7 19-Feb-2013 Jack Carter <jcarter@mips.com> ELF symbol table field st_other support,
excluding visibility bits.

Mips (MicroMips) specific STO handling .

The st_other field settig for STO_MIPS_MICROMIPS

Contributer: Zoran Jovanovic




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175564 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
79cd4118090a3c0bc80cafc699a51abf1d6299f3 15-Feb-2013 Reed Kotler <rkotler@mips.com> Remove a final dependency on the form field in tablegen; which is a remnant
of the old jit and which we don't intend to support in mips16 or micromips.
This dependency is for the testing of whether an instruction is a pseudo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175297 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
5cf38fd7633bee4a0ff627593cc1fd63ab0868d8 15-Feb-2013 Reed Kotler <rkotler@mips.com> Fix minor mips16 issues in directives for function prologue. Probably this does
not matter but makes it more gcc compatible which avoids possible subtle
problems. Also, turned back on a disabled check in helloworld.ll.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175237 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
6c59c9f57c8428e477ed592ee3537323d287d96f 06-Feb-2013 Akira Hatanaka <ahatanaka@mips.com> [mips] Make NOP a pseudo instruction and expand it to "sll $zero, $zero, 0".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174546 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
9c5b94b6be08afe22b576d007353a0002603cef1 05-Feb-2013 Jack Carter <jcarter@mips.com> This patch changes a static_cast to dyn_cast
for MipsELFStreamer objects.

Contributer: Jack Carter



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174354 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
dba14301f0098f9fc5c0d244bf334f55a6a21960 30-Jan-2013 Jack Carter <jcarter@mips.com> This patch implements runtime Mips specific
setting of ELF header e_flags.

Contributer: Jack Carter



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
c91cbb9b0c90a480299cc7deaef166d47a61d9df 18-Jan-2013 Jack Carter <jcarter@mips.com> This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
Support for Mips register information sections.

Mips ELF object files have a section that is dedicated
to register use info. Some of this information such as
the assumed Global Pointer value is used by the linker
in relocation resolution.

The register info file is .reginfo in o32 and .MIPS.options
in 64 and n32 abi files.

This patch contains the changes needed to create the sections,
but leaves the actual register accounting for a future patch.


Contributer: Jack Carter



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172847 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
0b8c9a80f20772c3793201ab5b251d3520b9cea3 02-Jan-2013 Chandler Carruth <chandlerc@gmail.com> Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
e8068692f924a1577075bd2d7b72b44820e0ffb2 10-Dec-2012 Akira Hatanaka <ahatanaka@mips.com> [mips] Set HWEncoding field of registers. Use delete function
getMipsRegisterNumbering and use MCRegisterInfo::getEncodingValue instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169760 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
d04a8d4b33ff316ca4cf961e06c9e312eff8e64f 03-Dec-2012 Chandler Carruth <chandlerc@gmail.com> Use the new script to sort the includes of every file under lib.

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
173192fa71a45ee87479c0eb7753bf116bce36b8 02-Nov-2012 Akira Hatanaka <ahatanaka@mips.com> [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive
"set .noat" so that the assembler doesn't issue warnings when register $AT is
used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
3574eca1b02600bac4e625297f4ecf745f4c4f32 08-Oct-2012 Micah Villmow <villmow@gmail.com> Move TargetData to DataLayout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165402 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
8e71e617c9b1e42737ffd00984a5025ec90c734c 03-Oct-2012 Jack Carter <jcarter@mips.com> The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.

If the code is generated as assembler, this transformation does not occur assuming that it will occur later in the assembler.

This code was originally called from MipsAsmPrinter.cpp and we needed to check for OutStreamer.hasRawTextSupport(). This was not a good place for it and has been moved to MCTargetDesc/MipsMCCodeEmitter.cpp where both direct object and the assembler use it it automagically.

The test cases have been checked in for a number of weeks now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
cc46fe591af10c193c17323547a3dd7cc00c925d 27-Sep-2012 Akira Hatanaka <ahatanaka@mips.com> MIPS DSP: add code necessary for pseudo instruction lowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
2de0572caec55e3779857cae0bbcd962af2e495d 10-Sep-2012 Dmitri Gribenko <gribozavr@gmail.com> Remove redundant semicolons which are null statements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163547 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
a7570a3d8686a1fe2075b5bee01650490fa52b26 06-Sep-2012 Jack Carter <jcarter@mips.com> There are some Mips instructions that are lowered by the
assembler such as shifts greater than 32. In the case
of direct object, the code gen needs to do this lowering
since the assembler is not involved.

With the advent of the llvm-mc assembler, it also needs
to do the same lowering.

This patch makes that specific lowering code accessible
to both the direct object output and the assembler.

This patch does not affect generated output.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163287 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
3185f9a2ea80afec30064b7cd095f82c31dc154e 31-Aug-2012 Jack Carter <jcarter@mips.com> The instruction DINS may be transformed into DINSU or DEXTM depending
on the size of the extraction and its position in the 64 bit word.

This patch allows support of the dext transformations with mips64 direct
object output.

0 <= msb < 32 0 <= lsb < 32 0 <= pos < 32 1 <= size <= 32
DINS
The field is entirely contained in the right-most word of the doubleword

32 <= msb < 64 0 <= lsb < 32 0 <= pos < 32 2 <= size <= 64
DINSM
The field straddles the words of the doubleword

32 <= msb < 64 32 <= lsb < 64 32 <= pos < 64 1 <= size <= 32
DINSU
The field is entirely contained in the left-most word of the doubleword



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163010 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
714313b4828cec98b086b54b356407540aa775c4 28-Aug-2012 Jack Carter <jcarter@mips.com> The instruction DEXT may be transformed into DEXTU or DEXTM depending
on the size of the extraction and its position in the 64 bit word.

This patch allows support of the dext transformations with mips64 direct
object output.

0 <= msb < 32 0 <= lsb < 32 0 <= pos < 32 1 <= size <= 32
DINS
The field is entirely contained in the right-most word of the doubleword

32 <= msb < 64 0 <= lsb < 32 0 <= pos < 32 2 <= size <= 64
DINSM
The field straddles the words of the doubleword

32 <= msb < 64 32 <= lsb < 64 32 <= pos < 64 1 <= size <= 32
DINSU
The field is entirely contained in the left-most word of the doubleword



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
69dba7e20476ec0e64791e47b498ae3a69619f7d 28-Aug-2012 Jack Carter <jcarter@mips.com> Some instructions are passed to the assembler to be
transformed to the final instruction variant. An
example would be dsrll which is transformed into
dsll32 if the shift value is greater than 32.

For direct object output we need to do this transformation
in the codegen. If the instruction was inside branch
delay slot, it was being missed. This patch corrects this
oversight.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
a0f14afee16ca976fef79c64df9a678e7f26cf43 18-Jul-2012 Jack Carter <jcarter@mips.com> Mips specific inline asm operand modifier 'M':

Print the high order register of a double word register operand.

In 32 bit mode, a 64 bit double word integer will be represented
by 2 32 bit registers. This modifier causes the high order register
to be used in the asm expression. It is useful if you are using
doubles in assembler and continue to control register to variable
relationships.

This patch also fixes a related bug in a previous patch:

case 'D': // Second part of a double word register operand
case 'L': // Low order register of a double word register operand
case 'M': // High order register of a double word register operand

I got 'D' and 'M' confused. The second part of a double word operand
will only match 'M' for one of the endianesses. I had 'L' and 'D'
be the opposite twins when 'L' and 'M' are.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160429 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
e035f65b16956cdb7ba29e741b7e3c04a8ce4d24 16-Jul-2012 Jack Carter <jcarter@mips.com> Doubleword Shift Left Logical Plus 32

Mips shift instructions DSLL, DSRL and DSRA are transformed into
DSLL32, DSRL32 and DSRA32 respectively if the shift amount is between
32 and 63

Here is a description of DSLL:

Purpose: Doubleword Shift Left Logical Plus 32
To execute a left-shift of a doubleword by a fixed amount--32 to 63 bits

Description: GPR[rd] <- GPR[rt] << (sa+32)

The 64-bit doubleword contents of GPR rt are shifted left, inserting
zeros into the emptied bits; the result is placed in
GPR rd. The bit-shift amount in the range 0 to 31 is specified by sa.

This patch implements the direct object output of these instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160277 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
9a1199459d54b7b3cbe444480ae75d286e362d01 11-Jul-2012 Jack Carter <jcarter@mips.com> This change removes an "initialization" warning.

Even though variable in question could not
be initialized before use, the code was such that
the compiler had no way of knowing that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160081 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
bb78930489aceab797eecffe6771c6e52ff0c80c 11-Jul-2012 Jack Carter <jcarter@mips.com> Mips specific inline asm operand modifier 'L'.

Low order register of a double word register operand. Operands
are defined by the name of the variable they are marked with in
the inline assembler code. This is a way to specify that the
operand just refers to the low order register for that variable.

It is the opposite of modifier 'D' which specifies the high order
register.

Example:

main()
{

long long ll_input = 0x1111222233334444LL;
long long ll_val = 3;
int i_result = 0;

__asm__ __volatile__(
"or %0, %L1, %2"
: "=r" (i_result)
: "r" (ll_input), "r" (ll_val));
}

Which results in:

lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addiu $sp, $sp, -8
addu $2, $2, $25
sw $2, 0($sp)
lui $2, 13107
ori $3, $2, 17476 <-- Low 32 bits of ll_input
lui $2, 4369
ori $4, $2, 8738 <-- High 32 bits of ll_input
addiu $5, $zero, 3 <-- Low 32 bits of ll_val
addiu $2, $zero, 0 <-- High 32 bits of ll_val
#APP
or $3, $4, $5 <-- or i_result, high 32 ll_input, low 32 of ll_val
#NO_APP
addiu $sp, $sp, 8
jr $ra

If not direction is done for the long long for 32 bit variables results
in using the low 32 bits as ll_val shows.

There is an existing bug if 'L' or 'D' is used for the destination register
for 32 bit long longs in that the target value will be updated incorrectly
for the non-specified part unless explicitly set within the inline asm code.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160028 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
020f07f571fd1ae060becb2ecf8da2b220a9d47d 06-Jul-2012 Jack Carter <jcarter@mips.com> Changes per review of commit 159787

Mips specific inline asm operand modifier D.

Comment changes and predicate change.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
244a84ee57cc73509a0e85cc92585cb567d0b72c 06-Jul-2012 Jack Carter <jcarter@mips.com> Mips specific inline asm operand modifier D.

Print the second half of a double word operand.

The include list was cleaned up a bit as well.

Also the test case was modified to test for both
big and little patterns.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159787 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
f38ad8efd0f313a51307f700a2699ae57608ddd4 28-Jun-2012 Jack Carter <jcarter@mips.com> Changed the formatting sequence of a curly brace to
the comment per code review feedback.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
7c3cd4d24edf125bafc9aa258fc8e8ae1b00a4df 28-Jun-2012 Jack Carter <jcarter@mips.com> The Mips specific inline asm operand modifier 'z' has the
following description in the gnu sources:

Print $0 if operand is zero otherwise print the op normally.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
0bcbd1df7a204e1e512f1a27066d725309de1b13 28-Jun-2012 Bill Wendling <isanbard@gmail.com> Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and
include/llvm/Analysis/DebugInfo.h to include/llvm/DebugInfo.h.

The reasoning is because the DebugInfo module is simply an interface to the
debug info MDNodes and has nothing to do with analysis.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159312 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
d5e11ad51a3966c0b80ce2119946cd1aa3558aec 21-Jun-2012 Jack Carter <jcarter@mips.com> The inline asm operand modifier 'c' is suppose
to be generic across architectures. It has the
following description in the gnu sources:

Substitute immediate value without immediate syntax

Several Architectures such as x86 have local implementations
of operand modifier 'c' which go beyond the above description
slightly. To make use of the generic modifiers without overriding
local implementation one can make a call to the base class method
for AsmPrinter::PrintAsmOperand() in the locally derived method's
"default" case in the switch statement. That way if it is already
defined locally the generic version will never get called.

This change is needed when test/CodeGen/generic/asm-large-immediate.ll
failed on a native Mips board. The test was assuming a generic
implementation was in place.

Affected files:

lib/Target/Mips/MipsAsmPrinter.cpp:
Changed the default case to call the base method.
lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
Added 'c' to the switch cases.
test/CodeGen/Mips/asm-large-immediate.ll
Mips compiled version of the generic one

Contributer: Jack Carter



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158925 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
864f66085cd9543070ef01b9f7371c110ecd7898 14-Jun-2012 Akira Hatanaka <ahatanaka@mips.com> Fix coding style violations. Remove white spaces and tabs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
63b37f122d592c7451090ea32281686de967fcd4 14-Jun-2012 Akira Hatanaka <ahatanaka@mips.com> Remove code in MipsAsmPrinter and MipsMCInstLower.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
158413930f25ecdd0902e1cc11bb8dc3683b94f8 14-Jun-2012 Akira Hatanaka <ahatanaka@mips.com> Bundle jump/branch instructions with the instructions in the delay slot in
delay slot filler pass of MIPS, per suggestion of Jakob Stoklund Olesen.

This change, along with the fix in r158154, enables machine verification
to be run after delay slot filling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158426 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
942918d13e5d6e7401e6b6d5c7443974d591db61 13-Jun-2012 Akira Hatanaka <ahatanaka@mips.com> disable use of directive .set nomicromips
until this directive is pushed in gas to open source fsf

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
4c8acecfe3351084b5856a8131f77cc9df4fbfec 02-Jun-2012 Akira Hatanaka <ahatanaka@mips.com> Remove code which is no longer needed in MipsAsmPrinter and MipsMCInstLower.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157867 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
6ab75b4dcbac0a2538177ed34819704f5e5373ee 30-May-2012 Eric Christopher <echristo@apple.com> Add support for the mips inline asm 'm' output modifier.

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157709 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
6a1a2b139562bb2b17771a88f68dcb7dd006b4d4 25-May-2012 Akira Hatanaka <ahatanaka@mips.com> Remove the code that emits MIPS' .cprestore directive.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157493 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
c784395a79ba44f12816ab71b6468e40c2c29ccb 24-May-2012 Akira Hatanaka <ahatanaka@mips.com> Turn on mips16 pseudo op when compiling for mips16.
Expand test case for this.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157410 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
75f89b54b588521e9e5aac113e3c4f7088bb6106 19-May-2012 Eric Christopher <echristo@apple.com> Add support for the 'd' mips inline asm output modifier.

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157093 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
550c25e9746c298012aa71ba3f6ecaecf7fbd243 18-May-2012 Eric Christopher <echristo@apple.com> Add support for the mips 'x' inline asm modifier.

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157057 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
4147e4d054b62eb2ea8259db0385791ec23c460b 12-May-2012 Akira Hatanaka <ahatanaka@mips.com> Make the following changes in MipsAsmPrinter.cpp:

- Remove code which lowers pseudo SETGP01.
- Fix LowerSETGP01. The first two of the three instructions that are emitted to
initialize the global pointer register now use register $2.
- Stop emitting .cpload directive.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156689 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
05b7a50210c1ebdd88fd7799c3d32b8fe1a0ce29 10-May-2012 Eric Christopher <echristo@apple.com> Add support for the 'X' inline asm operand modifier.

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156577 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
420761a0f193e87d08ee1c51b26bba23ab4bac7f 20-Apr-2012 Craig Topper <craig.topper@gmail.com> Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
f93b86306683f8e860c8824efb717995cb072a70 28-Mar-2012 Akira Hatanaka <ahatanaka@mips.com> Emit all directives except for ".cprestore" during asm printing rather than emit
them as machine instructions. Directives ".set noat" and ".set at" are now
emitted only at the beginning and end of a function except in the case where
they are emitted to enclose .cpload with an immediate operand that doesn't fit
in 16-bit field or unaligned load/stores.

Also, make the following changes:
- Remove function isUnalignedLoadStore and use a switch-case statement to
determine whether an instruction is an unaligned load or store.

- Define helper function CreateMCInst which generates an instance of an MCInst
from an opcode and a list of operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153552 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
79aa3417eb6f58d668aadfedf075240a41d35a26 17-Mar-2012 Craig Topper <craig.topper@gmail.com> Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
6e1beea6bfb668b48c1aca7185a75bf207bcc16c 10-Mar-2012 Akira Hatanaka <ahatanaka@mips.com> Remove unused header files.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152447 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
bb481f882093fb738d2bb15610c79364bada5496 28-Feb-2012 Jia Liu <proljc@gmail.com> remove blanks, and some code format

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
648f00c2f0eb29c0ae2a333fa0bfa55970059f08 24-Feb-2012 Akira Hatanaka <ahatanaka@mips.com> Add an option to use a virtual register as the global base register instead of
reserving a physical register ($gp or $28) for that purpose.

This will completely eliminate loads that restore the value of $gp after every
function call, if the register allocator assigns a callee-saved register, or
eliminate unnecessary loads if it assigns a temporary register.

example:

.cpload $25 // set $gp.
...
.cprestore 16 // store $gp to stack slot 16($sp).
...
jalr $25 // function call. clobbers $gp.
lw $gp, 16($sp) // not emitted if callee-saved reg is chosen.
...
lw $2, 4($gp)
...
jalr $25 // function call.
lw $gp, 16($sp) // not emitted if $gp is not live after this instruction.
...



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151402 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
b0934ab7d811e23bf530371976b8b35f3242169c 19-Feb-2012 Ahmed Charles <ace2001ac@gmail.com> Remove dead code. Improve llvm_unreachable text. Simplify some control flow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150918 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
c5707112e7635d1dd2f2cc9c4f42e79a51302cca 17-Feb-2012 Jia Liu <proljc@gmail.com> remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150805 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
8f5e8c1cd69fa77bea20140a7132ee2dea166c6d 17-Feb-2012 Jia Liu <proljc@gmail.com> add Emacs tag and fix some comment error in file headers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150775 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
ce8524c0160787fc727c16816979302df42b914a 30-Dec-2011 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Cleanup Mips code and rename some variables. Patch by Jack Carter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147383 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
9dfd4399a957f4a1a0c0111f0134554891b98021 24-Dec-2011 Akira Hatanaka <ahatanaka@mips.com> Detect unaligned loads/stores that have been added for Mips64 support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147234 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
82099683060abb1f74453d06e78a3729a75ef7ee 19-Dec-2011 Akira Hatanaka <ahatanaka@mips.com> Tidy up. Simplify logic. No functional change intended.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146896 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
044a784fa586cf92bb712c6dc54f925f539e19d1 13-Dec-2011 Akira Hatanaka <ahatanaka@mips.com> Expand .cprestore directive to multiple instructions if the offset does not fit
in a 16-bit field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146469 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd 07-Dec-2011 Evan Cheng <evan.cheng@apple.com> Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
421455f1ea081e2e1767e782ac0d57ca55976e9b 23-Nov-2011 Akira Hatanaka <ahatanaka@mips.com> This patch makes the following changes necessary for MIPS' direct code emission.

- lower unaligned loads/stores.
- encode the size operand of instructions INS and EXT.
- emit relocation information needed for JAL (jump-and-link).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
73c38f0aa2412e62ad848376a1dd05367755bab0 15-Nov-2011 Akira Hatanaka <ahatanaka@mips.com> Remove MipsMCSymbolRefExpr.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144654 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
47b92f3d8362518596d57269dc53d985bc13323a 11-Nov-2011 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Mips MC object code emission improvements:

"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144414 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
ce1a538ab5b7ae7e0ed48d18c02571280fe105aa 08-Nov-2011 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Properly handle Mips MC relocations and lower cpload and cprestore macros to MCInsts.

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144139 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
590853667345d6fb191764b9d0bd2ff13589e3a3 06-Nov-2011 Benjamin Kramer <benny.kra@googlemail.com> Replace (Lower|Upper)caseString in favor of StringRef's newest methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143891 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
68ad5673e80d51add854a7336752e56e3e22afa0 12-Oct-2011 Akira Hatanaka <ahatanaka@mips.com> Fix function isUnalignedLoadStore.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141722 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
cb518ee5dd41b5c648cff2d4f258a6f26572598c 08-Oct-2011 Akira Hatanaka <ahatanaka@mips.com> Add patterns for unaligned load and store instructions and enable the
instruction selector to generate them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
e33ca9ce1f978b8129972922f1ac0c16eec9e5f1 22-Sep-2011 Akira Hatanaka <ahatanak@gmail.com> Add enums and functions for symbols Mips64 uses.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140295 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
2464810ac27af8dd8b11da7519b719c254854c19 21-Sep-2011 Akira Hatanaka <ahatanak@gmail.com> Add a base class for Mips TargetMachines and add Mips64 TargetMachines.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
46ac94ba8b22f1c24100765c4da9d65d7e858410 10-Sep-2011 Akira Hatanaka <ahatanak@gmail.com> O64 will not be supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139421 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
8ddf6531b88937dec35bf2bb3a55245b1af9cbf5 09-Sep-2011 Akira Hatanaka <ahatanak@gmail.com> Drop support for Mips1 and Mips2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139405 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
3e74d6fdd248e20a280f1dff3da9a6c689c2c4c3 24-Aug-2011 Evan Cheng <evan.cheng@apple.com> Move TargetRegistry and TargetSelect from Target to Support where they belong.
These are strictly utilities for registering targets and components.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
511961a44ce4f1947ebb1e476f5cb38c223d4833 17-Aug-2011 Akira Hatanaka <ahatanak@gmail.com> Add support for half-word unaligned loads and stores.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137848 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
614051a1c534aff052152b0162a414b3271e8fca 16-Aug-2011 Akira Hatanaka <ahatanak@gmail.com> Fix handling of double precision loads and stores when Mips1 is targeted.

Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.

Without the changes made in this patch, llc produces code that has the same
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137711 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
5c21c9e78ebbb5b766fac31bf30433926dcc2a5d 12-Aug-2011 Akira Hatanaka <ahatanak@gmail.com> Define unaligned load and store.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137515 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
4b64e8a9e13ba782da2034e1dee52f077bdb759c 25-Jul-2011 Evan Cheng <evan.cheng@apple.com> Separate MCInstPrinter registration from AsmPrinter registration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135974 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
794bf17cbe0bac301ef9e52fb4a0295bfdfe0cab 08-Jul-2011 Akira Hatanaka <ahatanak@gmail.com> Lower MachineInstr to MC Inst and print to .s files.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134661 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
03236be44af1d98eb8daa57e8eb8b7bdd7884523 07-Jul-2011 Akira Hatanaka <ahatanak@gmail.com> Rather than having printMemOperand change the way memory operands are printed
based on a modifier, split it into two functions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134637 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
aa08ea0530a2baa7d1d74c492b1bd5af3518ad60 07-Jul-2011 Akira Hatanaka <ahatanak@gmail.com> Change visibility of MipsAsmPrinter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134630 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
d3ac47f80551d95c64cb41c3f94e888d7e13275b 07-Jul-2011 Akira Hatanaka <ahatanak@gmail.com> Reverse order of operands of address operand mem so that the base operand comes
before the offset. This change will enable simplification of function
MipsRegisterInfo::eliminateFrameIndex.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134625 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
e280519ba61d613f43d8edce0e9e64115ceec37f 07-Jul-2011 Akira Hatanaka <ahatanak@gmail.com> Add missing return statement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134622 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
c4f24eb584f6b4dba3caba2ed766c7c4bf1bf8af 01-Jul-2011 Akira Hatanaka <ahatanak@gmail.com> Improve Mips back-end's handling of DBG_VALUE.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134224 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
21afc63ea7b8227ccb1b735255be55bf422136d6 21-Jun-2011 Akira Hatanaka <ahatanak@gmail.com> Re-apply 132758 and 132768 which were speculatively reverted in 132777.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133494 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
6f3661fdcd10a33d225502f8b112dc5b7968ef74 09-Jun-2011 Eric Christopher <echristo@apple.com> Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132777 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
c53cc48ca98c86a9ccb9de632c77890c5f7ea2d5 09-Jun-2011 Akira Hatanaka <ahatanak@gmail.com> Initial support for inline asm memory operand constraints.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132768 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
d979686bb47f2dcdca60f0a088f59d1964346453 31-May-2011 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> This patch implements the thread local storage. Implemented are General
Dynamic, Initial Exec and Local Exec TLS models.

Patch by Sasa Stankovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132322 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
ce98deb9f512070fe82518594550dd030b26dd96 24-May-2011 Akira Hatanaka <ahatanak@gmail.com> Enable printing of immediates that do not fit in 16-bit. .cprestore can have
offsets that are larger than 0x10000.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132003 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
f8928c07e7ab43847770421393da6ad3922e5c8a 23-May-2011 Akira Hatanaka <ahatanak@gmail.com> Fix MipsAsmPrinter::printSavedRegsBitmaskChange. Remove functions and variables
in MipsFunctionInfo that are no longer used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131917 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
4552c9a3b34ad9b2085635266348d0d9b95514a6 15-Apr-2011 Akira Hatanaka <ahatanak@gmail.com> Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129612 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
0bf3dfbef60e36827df9c7e12b62503f1e345cd0 15-Apr-2011 Akira Hatanaka <ahatanak@gmail.com> Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129606 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
dc1652fd311073492a169101b8b6e1d725dca280 02-Apr-2011 Akira Hatanaka <ahatanak@gmail.com> Insert space before ';' to prevent warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128750 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
e2e436a6bc44deb2f989a39514f482b4932b93bc 01-Apr-2011 Akira Hatanaka <ahatanak@gmail.com> Simplifies logic for printing target flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128741 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
a4485c49641a492688276a061ddd0cb38d38e270 01-Apr-2011 Akira Hatanaka <ahatanak@gmail.com> Modifies MipsAsmPrinter::isBlockOnlyReachableByFallthrough so that it handles delay slots correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128724 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
ca8a2aa921ec8966b1f0708d77e4dc0a6f1a32f8 04-Mar-2011 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Lowers block address. Currently asserts when relocation model is not PIC. Patch by Akira Hatanaka

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127027 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
81092dc20abe5253a5b4d48a75997baa84dde196 04-Mar-2011 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Remove (hopefully) all trailing whitespaces from the mips backend. Patch by Hatanaka, Akira



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127003 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
16c29b5f285f375be53dabaa73e3e91107485fe4 10-Jan-2011 Anton Korobeynikov <asl@math.spbu.ru> Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
ab8d53a56ae707db3f8490b7727eeb05140954c6 07-Dec-2010 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Match a pattern generated by a dag combiner opt where:

(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))

Thanks to Akira for pointing that.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121163 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
d0c38176690e9602a93a20a43f1bd084564a8116 18-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> Move hasFP() and few related hooks to TargetFrameInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119740 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
1139691e3aadff751c035f38f835d436ec6cf10a 14-Nov-2010 Chris Lattner <sabre@nondot.org> move all the target's asmprinters into the main target. The piece
that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119056 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
6c5cfec73e209d0a89f05253bcc2f9e7263bdcb9 03-Apr-2009 Anton Korobeynikov <asl@math.spbu.ru> Separate MIPS asmprinter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68383 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
42bf74be1402df7409efbea089310d4c276fde37 25-Mar-2009 Evan Cheng <evan.cheng@apple.com> CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
4dc2b39bf89d7c87868008ef8a0f807e0419aca6 11-Mar-2009 Duncan Sands <baldrick@free.fr> It makes no sense to have a ODR version of common
linkage, so remove it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66690 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
667d4b8de6dea70195ff12ef39a4deebffa2f5c7 07-Mar-2009 Duncan Sands <baldrick@free.fr> Introduce new linkage types linkonce_odr, weak_odr, common_odr
and extern_weak_odr. These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global. In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time. This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function. If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body. The
code generators on the other hand map weak and weak_odr linkage
to the same thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
57f0db833dc30404f1f5d28b23df326e520698ec 24-Feb-2009 Bill Wendling <isanbard@gmail.com> Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
machine function when calling "runOnMachineFunction" in the asm printers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
cb819f13d785ff6efcacfbd7d0fa9f3f67e5494d 19-Feb-2009 Bill Wendling <isanbard@gmail.com> Put code that generates debug labels into TableGen so that it can be used by
everyone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64978 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
bb46f52027416598a662dc1c58f48d9d56b1a65b 15-Jan-2009 Rafael Espindola <rafael.espindola@gmail.com> Add the private linkage.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
ceb4d1aecb9deffe59b3dcdc9a783ffde8477be9 12-Jan-2009 Duncan Sands <baldrick@free.fr> Rename getABITypeSize to getTypePaddedSize, as
suggested by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
d735b8019b0f297d7c14b55adcd887af24d8e602 03-Oct-2008 Dan Gohman <gohman@apple.com> Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
5df3186f598163258fabf3448d9372843804d1ab 29-Sep-2008 Duncan Sands <baldrick@free.fr> Rename isWeakForLinker to mayBeOverridden. Use it
instead of hasWeakLinkage in a bunch of optimization
passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
c25e1ea5e9aa54952b6736a9579e25a5c2d8139f 25-Sep-2008 Anton Korobeynikov <asl@math.spbu.ru> Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56573 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
0c8e80607bc3296a4775f05c02f0d11df8e5cb04 25-Sep-2008 Anton Korobeynikov <asl@math.spbu.ru> Drop obsolete hook and change all usage to new interface

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56572 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
cb3718832375a581c5ea23f15918f3ea447a446c 21-Aug-2008 Owen Anderson <resistor@mac.com> Use raw_ostream throughout the AsmPrinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
739e441311410796d66e6d72426ef0344e0be98f 13-Aug-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Removed SELECT_CC custom lowering. This is not needed anymore, the SELECT node
is lowered properly and covers everything LowerSELECT_CC did.
Added method printUnsignedImm in AsmPrinter to print uimm16 operands. This
avoid the ugly instruction by instruction checking in printOperand.
Added a swap instruction present in the allegrex core.
Added two conditional instructions present in the allegrex core : MOVZ and MOVN.
They both allow a more efficient SELECT operation for integers.
Also added SELECT patterns to optimize MOVZ and MOVN usage.
The brcond and setcc patterns were cleaned: redundant and suboptimal patterns
were
removed. The suboptimals were replaced by more efficient ones.
Fixed some instructions that were using immZExt16 instead of immSExt16.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54724 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
f5b6a47bb57fb5ffc734416d4d5d993e1a06273b 08-Aug-2008 Anton Korobeynikov <asl@math.spbu.ru> Handle visibility printing with all generality. Remove bunch of duplicate code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54540 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
fcd99bb42817eb9a12f871b04b3b892429afe169 07-Aug-2008 Anton Korobeynikov <asl@math.spbu.ru> Use EmitAlignment consistently

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54456 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
bbe51362d53a532942997903a49faa7b5b50ad1f 06-Aug-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Added support for fp callee saved registers.
Added fp register clobbering during calls.
Added AsmPrinter support for "fmask", a bitmask that indicates where on the
stack the fp callee saved registers are.

Fixed the stack frame layout for Mips, now the callee saved regs
are in the right stack location (a little documentation about how this
stack frame must look like is present in MipsRegisterInfo.cpp).
This was done using the method MipsRegisterInfo::adjustMipsStackFrame
To be more clear, these are examples of what is solves :

1) FP and RA are also callee saved, and despite they aren't in CSI they
must be saved before the fp callee saved registers.
2) The ABI requires that local varibles are allocated before the callee
saved register area, the opposite behavior from the default allocation.
3) CPU and FPU saved register area must be aligned independent of each
other.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54403 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
91ef849e6cb01a019dc50ed4e95c058e01616062 02-Aug-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Improved asm inline for hi,lo results
Added hi,lo registers to be used,def implicitly. This provides better handle of
instructions which use hi/lo.
Fixes a small BranchAnalysis bug


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
85e31e3a5301c31947e35258dce7efa8e788bd51 28-Jul-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Added floating point lowering for setcc and brcond.
Fixed COMM asm directive usage.
ConstantPool using custom FourByteConstantSection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54139 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
91fd532eb9a18c0fd8d91b975226ef6b41c772ec 21-Jul-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Added initial support for small sections on Mips.
Added gp_rel relocations to support addressing small section contents.
Added command line to specify small section threshold in bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53869 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
055a76bb51801e5dc06d05b60242be16d0508df4 19-Jul-2008 Anton Korobeynikov <asl@math.spbu.ru> Use chars, where possible

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53791 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
ae408e6f1e4e2e7658b76b8dec679aeae9a9df99 19-Jul-2008 Anton Korobeynikov <asl@math.spbu.ru> Switch MIPS to new ELFTargetAsmInfo. Add few FIXMEs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53790 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
b27cb55923024907f7dba43d24ec37408ef1f574 15-Jul-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Fixed call stack alignment. Improved AsmPrinter alignment issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53585 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
43d526d162c69f29a1cc6734014576eade49529b 14-Jul-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Added Subtarget support into RegisterInfo
Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and
-mno-shared). HasAbsoluteCall is not implemented but HasABICall is the
default for o32 ABI. Now, both should help into a more accurate
relocation types implementation.
Added IsLinux is needed to choose between asm directives.
Instruction name strings cleanup.
AsmPrinter improved.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53551 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
7b76da145be2b3b7518ca42b43a903eabd52e1b7 09-Jul-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Fixe typos and 80 column size problems

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53272 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
225ca9cdd70de3d12641b0aba7daf6cb568a7ebd 05-Jul-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Several changes to Mips backend, experimental fp support being the most
important.
- Cleanup in the Subtarget info with addition of new features, not all support
yet, but they allow the future inclusion of features easier. Among new features,
we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
integer
and float registers, allegrex vector FPU (VFPU), single float only support.
- TargetMachine now detects allegrex core.
- Added allegrex (Mips32r2) sext_inreg instructions.
- *Added Float Point Instructions*, handling single float only, and
aliased accesses for 32-bit FPUs.
- Some cleanup in FP instruction formats and FP register classes.
- Calling conventions improved to support mips 32-bit EABI.
- Added Asm Printer support for fp cond codes.
- Added support for sret copy to a return register.
- EABI support added into LowerCALL and FORMAL_ARGS.
- MipsFunctionInfo now keeps a virtual register per function to track the
sret on function entry until function ret.
- MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
FP cond codes mapping and initial FP Branch Analysis.
- Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
FPCmp
- MipsTargetLowering : handling different FP classes, Allegrex support, sret
return copy, no homing location within EABI, non 32-bit stack objects
arguments, and asm constraint for float.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53146 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
082e7c12a111625219842c9d567fffc73bf0a960 19-Jun-2008 Evan Cheng <evan.cheng@apple.com> Unneeded include's.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52478 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
d2947ee33e810b24a016b944b375d34910f8f5dd 04-Jun-2008 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Some Mips minor fixes
Added support for mips little endian arch => mipsel



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51923 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
aafce77b17d340aace52bcd49d1944109d82f14a 14-May-2008 Dale Johannesen <dalej@apple.com> Add CommonLinkage; currently tentative definitions
are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both. The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51118 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
fb8075d03f5c87bd57dcc9c5f2304f6b13c55aad 28-Feb-2008 Evan Cheng <evan.cheng@apple.com> Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
6ef781f3ce0d0311004adba9d1e7dbd7950918dd 27-Feb-2008 Bill Wendling <isanbard@gmail.com> Final de-tabification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47663 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
74ab84c31ef64538a1b56e1f282e49303412ad17 26-Feb-2008 Bill Wendling <isanbard@gmail.com> Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
6f0d024a534af18d9e60b3ea757376cd8a3a980e 10-Feb-2008 Dan Gohman <gohman@apple.com> Rename MRegisterInfo to TargetRegisterInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
4eecdeb3faf5df864790175da5d58301b751ec11 02-Feb-2008 Evan Cheng <evan.cheng@apple.com> Get rid of the annoying blank lines before labels.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
8aa797aa51cd4ea1ec6f46f4891a6897944b75b2 31-Dec-2007 Chris Lattner <sabre@nondot.org> Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
9a1ceaedc282f0cae31f2723f4d6c00c7b88fe90 30-Dec-2007 Chris Lattner <sabre@nondot.org> Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
4ee451de366474b9c228b4e5fa573795a715216d 29-Dec-2007 Chris Lattner <sabre@nondot.org> Remove attribution from file headers, per discussion on llvmdev.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
753a98740bfe3164fd0961a1959306c46135cf19 12-Nov-2007 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Added JumpTable support
Fixed some AsmPrinter issues
Added GLOBAL_OFFSET_TABLE Node handle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
c7db5618f9e5e708b87d9ae6595b3fd510a2a0c0 05-Nov-2007 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Added support for PIC code with "explicit relocations" *only*.
Removed all macro code for PIC (goodbye "la").
Support tested with shootout bench.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43697 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
ca0ed744852a7d9625572fbb793f65e81225a3e8 05-Nov-2007 Duncan Sands <baldrick@free.fr> Eliminate the remaining uses of getTypeSize. This
should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43688 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
347d39f1fd8ad825a7ec5b8a3dce816723a56d42 14-Oct-2007 Evan Cheng <evan.cheng@apple.com> Revert 42908 for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
8ddde0a151c5297ae5694a4b9201b2d3fe56b196 12-Oct-2007 Dan Gohman <gohman@apple.com> Change the names used for internal labels to use the current
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42908 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
0a6040063fd9419041a81ada8f75b389381eb6b9 09-Oct-2007 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Position Independent Code (PIC) support [2]
- Added a function to hold the stack location
where GP must be stored during LowerCALL
- AsmPrinter now emits directives based on
relocation type
- PIC_ set to default relocation type (same as GCC)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
b42abebe36f1dfbd0c779fd1471618c42ed3fec5 24-Sep-2007 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Added "LoadEffective" pattern to handle stack locations.
Fixed some comments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42271 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
dc0c04c0ed8a8792e6e5a838f4d5b8c8a0d1988d 28-Aug-2007 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Mask directive completed with CalleeSave info
Comments for Mips directives added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41526 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
250a1714be749ee14998986b5e0a57a3ec20a04d 18-Aug-2007 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Couple of small changes. Delay Slot handle header declared.
Newline added after macros at function init on generated asm!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41157 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
b8275a3f6f6497889653cb2452d82a46f92b4926 25-Jul-2007 Dan Gohman <gohman@apple.com> Don't ignore the return value of AsmPrinter::doInitialization and
AsmPrinter::doFinalization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40487 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
a4e8200366805c665bb1424d8af5550f5d3d6863 12-Jul-2007 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Added support for Mips specific GAS directives
Fixed print immediate
Fixed Identation on MipsISelDAGToDAG.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
972f5896e417d8e81cf400083fab15a37b6d4277 06-Jun-2007 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Initial Mips support, here we go! =)
- Modifications from the last patch included
(issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37461 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsAsmPrinter.cpp