MipsISelDAGToDAG.cpp revision cacff672dd532d882727a51e73c96f19fde45828 
1//===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines an instruction selector for the MIPS target.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "mips-isel"
15#include "MipsISelDAGToDAG.h"
16#include "Mips16ISelDAGToDAG.h"
17#include "MipsSEISelDAGToDAG.h"
18#include "Mips.h"
19#include "MCTargetDesc/MipsBaseInfo.h"
20#include "MipsAnalyzeImmediate.h"
21#include "MipsMachineFunction.h"
22#include "MipsRegisterInfo.h"
23#include "llvm/CodeGen/MachineConstantPool.h"
24#include "llvm/CodeGen/MachineFrameInfo.h"
25#include "llvm/CodeGen/MachineFunction.h"
26#include "llvm/CodeGen/MachineInstrBuilder.h"
27#include "llvm/CodeGen/MachineRegisterInfo.h"
28#include "llvm/CodeGen/SelectionDAGNodes.h"
29#include "llvm/IR/GlobalValue.h"
30#include "llvm/IR/Instructions.h"
31#include "llvm/IR/Intrinsics.h"
32#include "llvm/IR/Type.h"
33#include "llvm/Support/CFG.h"
34#include "llvm/Support/Debug.h"
35#include "llvm/Support/ErrorHandling.h"
36#include "llvm/Support/raw_ostream.h"
37#include "llvm/Target/TargetMachine.h"
38using namespace llvm;
39
40//===----------------------------------------------------------------------===//
41// Instruction Selector Implementation
42//===----------------------------------------------------------------------===//
43
44//===----------------------------------------------------------------------===//
45// MipsDAGToDAGISel - MIPS specific code to select MIPS machine
46// instructions for SelectionDAG operations.
47//===----------------------------------------------------------------------===//
48
49bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
50  bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
51
52  processFunctionAfterISel(MF);
53
54  return Ret;
55}
56
57/// getGlobalBaseReg - Output the instructions required to put the
58/// GOT address into a register.
59SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
60  unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
61  return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
62}
63
64/// ComplexPattern used on MipsInstrInfo
65/// Used on Mips Load/Store instructions
66bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
67                                        SDValue &Offset) const {
68  llvm_unreachable("Unimplemented function.");
69  return false;
70}
71
72bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
73                                         SDValue &Offset) const {
74  llvm_unreachable("Unimplemented function.");
75  return false;
76}
77
78bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
79                                     SDValue &Offset) const {
80  llvm_unreachable("Unimplemented function.");
81  return false;
82}
83
84bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
85                                    SDValue &Offset, SDValue &Alias) {
86  llvm_unreachable("Unimplemented function.");
87  return false;
88}
89
90/// Select instructions not customized! Used for
91/// expanded, promoted and normal instructions
92SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
93  unsigned Opcode = Node->getOpcode();
94
95  // Dump information about the Node being selected
96  DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
97
98  // If we have a custom node, we already have selected!
99  if (Node->isMachineOpcode()) {
100    DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
101    return NULL;
102  }
103
104  // See if subclasses can handle this node.
105  std::pair<bool, SDNode*> Ret = selectNode(Node);
106
107  if (Ret.first)
108    return Ret.second;
109
110  switch(Opcode) {
111  default: break;
112
113  // Get target GOT address.
114  case ISD::GLOBAL_OFFSET_TABLE:
115    return getGlobalBaseReg();
116
117#ifndef NDEBUG
118  case ISD::LOAD:
119  case ISD::STORE:
120    assert(cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
121           cast<MemSDNode>(Node)->getAlignment() &&
122           "Unexpected unaligned loads/stores.");
123    break;
124#endif
125  }
126
127  // Select the default instruction
128  SDNode *ResNode = SelectCode(Node);
129
130  DEBUG(errs() << "=> ");
131  if (ResNode == NULL || ResNode == Node)
132    DEBUG(Node->dump(CurDAG));
133  else
134    DEBUG(ResNode->dump(CurDAG));
135  DEBUG(errs() << "\n");
136  return ResNode;
137}
138
139bool MipsDAGToDAGISel::
140SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
141                             std::vector<SDValue> &OutOps) {
142  assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
143  OutOps.push_back(Op);
144  return false;
145}
146
147/// createMipsISelDag - This pass converts a legalized DAG into a
148/// MIPS-specific DAG, ready for instruction scheduling.
149FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
150  if (TM.getSubtargetImpl()->inMips16Mode())
151    return llvm::createMips16ISelDag(TM);
152
153  return llvm::createMipsSEISelDag(TM);
154}
155