MipsMSAInstrInfo.td revision 1327c089221da78b1bfd61067162023e520085ed
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm3 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm4 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm8 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def simm5 : Operand<i32>; 77 78def simm10 : Operand<i32>; 79 80def vsplat_uimm3 : Operand<vAny> { 81 let PrintMethod = "printUnsignedImm"; 82} 83 84def vsplat_uimm4 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm"; 86} 87 88def vsplat_uimm5 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm"; 90} 91 92def vsplat_uimm6 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm8 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_simm5 : Operand<vAny>; 101 102def vsplat_simm10 : Operand<vAny>; 103 104// Pattern fragments 105def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 106 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 107def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 108 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 109def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 110 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 111 112def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 113 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 114def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 115 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 116def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 117 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 118 119def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 120 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 121def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 122 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 123def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 124 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 125 126class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 127 PatFrag<(ops node:$lhs, node:$rhs), 128 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 129 130// ISD::SETFALSE cannot occur 131def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 132def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 133def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 134def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 135def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 136def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 137def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 138def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 139def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 140def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 141def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 142def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 143def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 144def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 145def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 146def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 147def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 148def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 149def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 150def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 151def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 152def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 153def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 154def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 155def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 156def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 157def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 158def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 159// ISD::SETTRUE cannot occur 160// ISD::SETFALSE2 cannot occur 161// ISD::SETTRUE2 cannot occur 162 163class vsetcc_type<ValueType ResTy, CondCode CC> : 164 PatFrag<(ops node:$lhs, node:$rhs), 165 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 166 167def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 168def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 169def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 170def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 171def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 172def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 173def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 174def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 175def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 176def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 177def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 178def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 179def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 180def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 181def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 182def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 183def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 184def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 185def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 186def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 187 188def vsplati8 : PatFrag<(ops node:$e0), 189 (v16i8 (build_vector node:$e0, node:$e0, 190 node:$e0, node:$e0, 191 node:$e0, node:$e0, 192 node:$e0, node:$e0, 193 node:$e0, node:$e0, 194 node:$e0, node:$e0, 195 node:$e0, node:$e0, 196 node:$e0, node:$e0))>; 197def vsplati16 : PatFrag<(ops node:$e0), 198 (v8i16 (build_vector node:$e0, node:$e0, 199 node:$e0, node:$e0, 200 node:$e0, node:$e0, 201 node:$e0, node:$e0))>; 202def vsplati32 : PatFrag<(ops node:$e0), 203 (v4i32 (build_vector node:$e0, node:$e0, 204 node:$e0, node:$e0))>; 205def vsplati64 : PatFrag<(ops node:$e0), 206 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 207 208class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 209 SDNodeXForm xform = NOOP_SDNodeXForm> 210 : PatLeaf<frag, pred, xform> { 211 Operand OpClass = opclass; 212} 213 214class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 215 list<SDNode> roots = [], 216 list<SDNodeProperty> props = []> : 217 ComplexPattern<ty, numops, fn, roots, props> { 218 Operand OpClass = opclass; 219} 220 221def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 222 "selectVSplatUimm3", 223 [build_vector, bitconvert]>; 224 225def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 226 "selectVSplatUimm5", 227 [build_vector, bitconvert]>; 228 229def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 230 "selectVSplatUimm8", 231 [build_vector, bitconvert]>; 232 233def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 234 "selectVSplatSimm5", 235 [build_vector, bitconvert]>; 236 237def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 238 "selectVSplatUimm4", 239 [build_vector, bitconvert]>; 240 241def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 242 "selectVSplatUimm5", 243 [build_vector, bitconvert]>; 244 245def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 246 "selectVSplatSimm5", 247 [build_vector, bitconvert]>; 248 249def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 250 "selectVSplatUimm5", 251 [build_vector, bitconvert]>; 252 253def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 254 "selectVSplatSimm5", 255 [build_vector, bitconvert]>; 256 257def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 258 "selectVSplatUimm5", 259 [build_vector, bitconvert]>; 260 261def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 262 "selectVSplatUimm6", 263 [build_vector, bitconvert]>; 264 265def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 266 "selectVSplatSimm5", 267 [build_vector, bitconvert]>; 268 269// Any build_vector that is a constant splat with a value that is an exact 270// power of 2 271def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 272 [build_vector, bitconvert]>; 273 274// Immediates 275def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 276def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 277 278// Instruction encoding. 279class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 280class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 281class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 282class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 283 284class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 285class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 286class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 287class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 288 289class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 290class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 291class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 292class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 293 294class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 295class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 296class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 297class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 298 299class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 300class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 301class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 302class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 303 304class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 305class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 306class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 307class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 308 309class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 310 311class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 312 313class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 314class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 315class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 316class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 317 318class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 319class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 320class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 321class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 322 323class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 324class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 325class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 326class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 327 328class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 329class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 330class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 331class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 332 333class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 334class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 335class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 336class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 337 338class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 339class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 340class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 341class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 342 343class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 344class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 345class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 346class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 347 348class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 349class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 350class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 351class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 352 353class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 354class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 355class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 356class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 357 358class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 359class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 360class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 361class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 362 363class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 364class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 365class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 366class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 367 368class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 369class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 370class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 371class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 372 373class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 374 375class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 376 377class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 378 379class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 380 381class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 382class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 383class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 384class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 385 386class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 387class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 388class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 389class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 390 391class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 392class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 393class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 394class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 395 396class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 397 398class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 399 400class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 401 402class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 403class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 404class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 405class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 406 407class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 408class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 409class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 410class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 411 412class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 413class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 414class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 415class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 416 417class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 418 419class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 420class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 421class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 422class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 423 424class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 425class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 426class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 427class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 428 429class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 430 431class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 432class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 433class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 434class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 435 436class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 437class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 438class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 439class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 440 441class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 442class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 443class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 444class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 445 446class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 447class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 448class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 449class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 450 451class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 452class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 453class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 454class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 455 456class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 457class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 458class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 459class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 460 461class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 462class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 463class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 464class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 465 466class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 467class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 468class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 469class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 470 471class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 472class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 473class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 474 475class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 476class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 477class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 478 479class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 480 481class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 482class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 483class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 484class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 485 486class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 487class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 488class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 489class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 490 491class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 492class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 493class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 494 495class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 496class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 497class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 498 499class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 500class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 501class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 502 503class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 504class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 505class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 506 507class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 508class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 509class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 510 511class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 512class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 513class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 514 515class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 516class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 517 518class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 519class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 520 521class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 522class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 523 524class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 525class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 526 527class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 528class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 529 530class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 531class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 532 533class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 534class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 535 536class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 537class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 538 539class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 540class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 541 542class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 543class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 544 545class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 546class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 547 548class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 549class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 550 551class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 552class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 553 554class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 555class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 556 557class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 558class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 559 560class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 561class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 562 563class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 564class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 565 566class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 567class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 568 569class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 570class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 571 572class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 573class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 574 575class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 576class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 577 578class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 579class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 580 581class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 582class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 583class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 584 585class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 586class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 587 588class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 589class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 590 591class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 592class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 593 594class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 595class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 596 597class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 598class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 599 600class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 601class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 602 603class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 604class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 605 606class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 607class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 608 609class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 610class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 611 612class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 613class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 614 615class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 616class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 617 618class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 619class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 620 621class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 622class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 623 624class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 625class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 626 627class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 628class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 629 630class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 631class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 632 633class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 634class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 635 636class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 637class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 638 639class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 640class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 641 642class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 643class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 644 645class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 646class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 647 648class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 649class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 650 651class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 652class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 653 654class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 655class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 656 657class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 658class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 659 660class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 661class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 662 663class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 664class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 665 666class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 667class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 668 669class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 670class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 671 672class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 673class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 674class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 675 676class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 677class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 678class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 679 680class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 681class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 682class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 683 684class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 685class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 686class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 687 688class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 689class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 690class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 691class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 692 693class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 694class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 695class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 696class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 697 698class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 699class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 700class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 701class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 702 703class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 704class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 705class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 706class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 707 708class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 709class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 710class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 711 712class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 713class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 714class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 715class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 716 717class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 718class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 719class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 720class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 721 722class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 723class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 724class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 725class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 726 727class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 728class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 729class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 730class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 731 732class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 733class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 734 735class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 736class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 737 738class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 739class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 740class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 741class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 742 743class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 744class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 745class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 746class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 747 748class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 749class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 750class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 751class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 752 753class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 754class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 755class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 756class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 757 758class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 759class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 760class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 761class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 762 763class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 764class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 765class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 766class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 767 768class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 769class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 770class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 771class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 772 773class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 774class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 775class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 776class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 777 778class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 779class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 780class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 781class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 782 783class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 784class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 785class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 786class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 787 788class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 789class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 790class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 791class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 792 793class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 794class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 795class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 796class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 797 798class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 799class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 800class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 801class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 802 803class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 804 805class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 806class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 807 808class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 809class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 810 811class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 812class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 813class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 814class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 815 816class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 817class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 818 819class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 820class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 821 822class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 823class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 824class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 825class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 826 827class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 828class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 829class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 830class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 831 832class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 833class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 834class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 835class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 836 837class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 838 839class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 840 841class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 842 843class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 844 845class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 846class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 847class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 848class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 849 850class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 851class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 852class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 853class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 854 855class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 856class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 857class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 858class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 859 860class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 861class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 862class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 863class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 864 865class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 866class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 867class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 868class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 869 870class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 871class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 872class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 873 874class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 875class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 876class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 877class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 878 879class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 880class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 881class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 882class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 883 884class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 885class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 886class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 887class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 888 889class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 890class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 891class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 892class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 893 894class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 895class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 896class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 897class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 898 899class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 900class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 901class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 902class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 903 904class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 905class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 906class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 907class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 908 909class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 910class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 911class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 912class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 913 914class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 915class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 916class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 917class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 918 919class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 920class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 921class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 922class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 923 924class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 925class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 926class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 927class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 928 929class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 930class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 931class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 932class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 933 934class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 935class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 936class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 937class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 938 939class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 940class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 941class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 942class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 943 944class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 945class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 946class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 947class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 948 949class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 950class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 951class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 952class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 953 954class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 955class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 956class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 957class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 958 959class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 960class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 961class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 962class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 963 964class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 965class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 966class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 967class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 968 969class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 970class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 971class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 972class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 973 974class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 975class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 976class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 977class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 978 979class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 980class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 981class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 982class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 983 984class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 985class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 986class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 987class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 988 989class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 990 991class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 992 993// Instruction desc. 994class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 995 RegisterClass RCWD, RegisterClass RCWS = RCWD, 996 InstrItinClass itin = NoItinerary> { 997 dag OutOperandList = (outs RCWD:$wd); 998 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 999 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 1000 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 1001 InstrItinClass Itinerary = itin; 1002} 1003 1004class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1005 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1006 InstrItinClass itin = NoItinerary> { 1007 dag OutOperandList = (outs RCWD:$wd); 1008 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 1009 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 1010 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 1011 InstrItinClass Itinerary = itin; 1012} 1013 1014class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1015 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1016 InstrItinClass itin = NoItinerary> { 1017 dag OutOperandList = (outs RCWD:$wd); 1018 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 1019 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 1020 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 1021 InstrItinClass Itinerary = itin; 1022} 1023 1024class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1025 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1026 InstrItinClass itin = NoItinerary> { 1027 dag OutOperandList = (outs RCWD:$wd); 1028 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 1029 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 1030 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 1031 InstrItinClass Itinerary = itin; 1032} 1033 1034class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1035 SplatComplexPattern SplatImm, RegisterClass RCWD, 1036 RegisterClass RCWS = RCWD, 1037 InstrItinClass itin = NoItinerary> { 1038 dag OutOperandList = (outs RCWD:$wd); 1039 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u); 1040 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u"); 1041 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))]; 1042 InstrItinClass Itinerary = itin; 1043} 1044 1045class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1046 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS, 1047 InstrItinClass itin = NoItinerary> { 1048 dag OutOperandList = (outs RCD:$rd); 1049 dag InOperandList = (ins RCWS:$ws, uimm4:$n); 1050 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1051 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; 1052 InstrItinClass Itinerary = itin; 1053} 1054 1055class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1056 SplatComplexPattern SplatImm, RegisterClass RCWD, 1057 RegisterClass RCWS = RCWD, 1058 InstrItinClass itin = NoItinerary> { 1059 dag OutOperandList = (outs RCWD:$wd); 1060 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$imm); 1061 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1062 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$imm))]; 1063 InstrItinClass Itinerary = itin; 1064} 1065 1066class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1067 SplatComplexPattern SplatImm, RegisterClass RCWD, 1068 RegisterClass RCWS = RCWD, 1069 InstrItinClass itin = NoItinerary> { 1070 dag OutOperandList = (outs RCWD:$wd); 1071 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u8); 1072 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1073 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u8))]; 1074 InstrItinClass Itinerary = itin; 1075} 1076 1077// This class is deprecated and will be removed in the next few patches 1078class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1079 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1080 InstrItinClass itin = NoItinerary> { 1081 dag OutOperandList = (outs RCWD:$wd); 1082 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1083 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1084 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 1085 InstrItinClass Itinerary = itin; 1086} 1087 1088class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterClass RCWD, 1089 RegisterClass RCWS = RCWD, 1090 InstrItinClass itin = NoItinerary> { 1091 dag OutOperandList = (outs RCWD:$wd); 1092 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1093 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1094 list<dag> Pattern = [(set RCWD:$wd, (MipsSHF immZExt8:$u8, RCWS:$ws))]; 1095 InstrItinClass Itinerary = itin; 1096} 1097 1098class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1099 InstrItinClass itin = NoItinerary> { 1100 dag OutOperandList = (outs RCWD:$wd); 1101 dag InOperandList = (ins vsplat_simm10:$i10); 1102 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1103 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1104 list<dag> Pattern = []; 1105 bit hasSideEffects = 0; 1106 InstrItinClass Itinerary = itin; 1107} 1108 1109class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1110 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1111 InstrItinClass itin = NoItinerary> { 1112 dag OutOperandList = (outs RCWD:$wd); 1113 dag InOperandList = (ins RCWS:$ws); 1114 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1115 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 1116 InstrItinClass Itinerary = itin; 1117} 1118 1119class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1120 SDPatternOperator OpNode, RegisterClass RCWD, 1121 RegisterClass RCWS = RCWD, 1122 InstrItinClass itin = NoItinerary> { 1123 dag OutOperandList = (outs RCWD:$wd); 1124 dag InOperandList = (ins RCWS:$ws); 1125 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1126 list<dag> Pattern = [(set RCWD:$wd, (VT (OpNode RCWS:$ws)))]; 1127 InstrItinClass Itinerary = itin; 1128} 1129 1130class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1131 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1132 InstrItinClass itin = NoItinerary> { 1133 dag OutOperandList = (outs ROWD:$wd); 1134 dag InOperandList = (ins ROWS:$ws); 1135 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1136 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1137 InstrItinClass Itinerary = itin; 1138} 1139 1140class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1141 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1142 RegisterOperand ROWT = ROWD, 1143 InstrItinClass itin = NoItinerary> { 1144 dag OutOperandList = (outs ROWD:$wd); 1145 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1146 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1147 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1148 InstrItinClass Itinerary = itin; 1149} 1150 1151class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1152 RegisterOperand ROWS = ROWD, 1153 RegisterOperand ROWT = ROWD, 1154 InstrItinClass itin = NoItinerary> { 1155 dag OutOperandList = (outs ROWD:$wd); 1156 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1157 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1158 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1159 ROWT:$wt))]; 1160 string Constraints = "$wd = $wd_in"; 1161 InstrItinClass Itinerary = itin; 1162} 1163 1164class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1165 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1166 RegisterOperand ROWT = ROWD, 1167 InstrItinClass itin = NoItinerary> { 1168 dag OutOperandList = (outs ROWD:$wd); 1169 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1170 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1171 list<dag> Pattern = [(set ROWD:$wd, 1172 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1173 InstrItinClass Itinerary = itin; 1174 string Constraints = "$wd = $wd_in"; 1175} 1176 1177class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1178 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1179 RegisterOperand ROWT = ROWD, 1180 InstrItinClass itin = NoItinerary> : 1181 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1182 1183class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1184 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1185 RegisterOperand ROWT = ROWD, 1186 InstrItinClass itin = NoItinerary> : 1187 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1188 1189class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1190 dag OutOperandList = (outs); 1191 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1192 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1193 list<dag> Pattern = []; 1194 InstrItinClass Itinerary = IIBranch; 1195 bit isBranch = 1; 1196 bit isTerminator = 1; 1197 bit hasDelaySlot = 1; 1198 list<Register> Defs = [AT]; 1199} 1200 1201class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1202 RegisterClass RCD, RegisterClass RCWS, 1203 InstrItinClass itin = NoItinerary> { 1204 dag OutOperandList = (outs RCD:$wd); 1205 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n); 1206 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1207 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 1208 RCWS:$rs, 1209 immZExt6:$n))]; 1210 InstrItinClass Itinerary = itin; 1211 string Constraints = "$wd = $wd_in"; 1212} 1213 1214class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1215 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1216 InstrItinClass itin = NoItinerary> { 1217 dag OutOperandList = (outs RCWD:$wd); 1218 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 1219 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1220 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1221 immZExt6:$n, 1222 RCWS:$ws))]; 1223 InstrItinClass Itinerary = itin; 1224 string Constraints = "$wd = $wd_in"; 1225} 1226 1227class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1228 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1229 RegisterClass RCWT = RCWD, 1230 InstrItinClass itin = NoItinerary> { 1231 dag OutOperandList = (outs RCWD:$wd); 1232 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1233 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1234 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1235 InstrItinClass Itinerary = itin; 1236} 1237 1238class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 1239 RegisterClass RCWS = RCWD, 1240 RegisterClass RCWT = RCWD> : 1241 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 1242 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 1243 1244class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1245 IsCommutable; 1246class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1247 IsCommutable; 1248class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1249 IsCommutable; 1250class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1251 IsCommutable; 1252 1253class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1254 MSA128BOpnd>, IsCommutable; 1255class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1256 MSA128HOpnd>, IsCommutable; 1257class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1258 MSA128WOpnd>, IsCommutable; 1259class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1260 MSA128DOpnd>, IsCommutable; 1261 1262class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1263 MSA128BOpnd>, IsCommutable; 1264class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1265 MSA128HOpnd>, IsCommutable; 1266class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1267 MSA128WOpnd>, IsCommutable; 1268class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1269 MSA128DOpnd>, IsCommutable; 1270 1271class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1272 MSA128BOpnd>, IsCommutable; 1273class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1274 MSA128HOpnd>, IsCommutable; 1275class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1276 MSA128WOpnd>, IsCommutable; 1277class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1278 MSA128DOpnd>, IsCommutable; 1279 1280class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1281class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1282class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1283class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1284 1285class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, MSA128B>; 1286class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, MSA128H>; 1287class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, MSA128W>; 1288class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, MSA128D>; 1289 1290class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1291class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1292class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1293class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1294 1295class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, MSA128B>; 1296 1297class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1298 MSA128BOpnd>; 1299class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1300 MSA128HOpnd>; 1301class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1302 MSA128WOpnd>; 1303class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1304 MSA128DOpnd>; 1305 1306class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1307 MSA128BOpnd>; 1308class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1309 MSA128HOpnd>; 1310class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1311 MSA128WOpnd>; 1312class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1313 MSA128DOpnd>; 1314 1315class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1316 IsCommutable; 1317class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1318 IsCommutable; 1319class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1320 IsCommutable; 1321class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1322 IsCommutable; 1323 1324class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1325 IsCommutable; 1326class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1327 IsCommutable; 1328class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1329 IsCommutable; 1330class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1331 IsCommutable; 1332 1333class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1334 MSA128BOpnd>, IsCommutable; 1335class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1336 MSA128HOpnd>, IsCommutable; 1337class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1338 MSA128WOpnd>, IsCommutable; 1339class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1340 MSA128DOpnd>, IsCommutable; 1341 1342class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1343 MSA128BOpnd>, IsCommutable; 1344class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1345 MSA128HOpnd>, IsCommutable; 1346class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1347 MSA128WOpnd>, IsCommutable; 1348class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1349 MSA128DOpnd>, IsCommutable; 1350 1351class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1352class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1353class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1354class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1355 1356class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1357class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1358class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1359class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1360 1361class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1362class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1363class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1364class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1365 1366class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1367 MSA128B>; 1368class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1369 MSA128H>; 1370class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1371 MSA128W>; 1372class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1373 MSA128D>; 1374 1375class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1376class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1377class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1378class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1379 1380class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1381 MSA128B>; 1382class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1383 MSA128H>; 1384class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1385 MSA128W>; 1386class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1387 MSA128D>; 1388 1389class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1390 1391class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1392 1393class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1394 1395class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1396 1397class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1398class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1399class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1400class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1401 1402class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1403class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1404class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1405class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1406 1407class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1408class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1409class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1410class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1411 1412class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1413 1414class BSEL_V_DESC { 1415 dag OutOperandList = (outs MSA128B:$wd); 1416 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt); 1417 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1418 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws, 1419 MSA128B:$wt))]; 1420 InstrItinClass Itinerary = NoItinerary; 1421 string Constraints = "$wd = $wd_in"; 1422} 1423 1424class BSELI_B_DESC { 1425 dag OutOperandList = (outs MSA128B:$wd); 1426 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, vsplat_uimm8:$u8); 1427 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1428 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, 1429 MSA128B:$ws, 1430 vsplati8_uimm8:$u8))]; 1431 InstrItinClass Itinerary = NoItinerary; 1432 string Constraints = "$wd = $wd_in"; 1433} 1434 1435class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1436class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1437class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1438class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1439 1440class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1441class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1442class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1443class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1444 1445class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1446class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1447class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1448class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1449 1450class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1451 1452class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1453 IsCommutable; 1454class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1455 IsCommutable; 1456class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1457 IsCommutable; 1458class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1459 IsCommutable; 1460 1461class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1462 MSA128B>; 1463class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1464 MSA128H>; 1465class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1466 MSA128W>; 1467class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1468 MSA128D>; 1469 1470class CFCMSA_DESC { 1471 dag OutOperandList = (outs GPR32:$rd); 1472 dag InOperandList = (ins MSACtrl:$cs); 1473 string AsmString = "cfcmsa\t$rd, $cs"; 1474 InstrItinClass Itinerary = NoItinerary; 1475 bit hasSideEffects = 1; 1476} 1477 1478class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1479class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1480class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1481class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1482 1483class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1484class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1485class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1486class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1487 1488class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1489 vsplati8_simm5, MSA128B>; 1490class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1491 vsplati16_simm5, MSA128H>; 1492class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1493 vsplati32_simm5, MSA128W>; 1494class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1495 vsplati64_simm5, MSA128D>; 1496 1497class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1498 vsplati8_uimm5, MSA128B>; 1499class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1500 vsplati16_uimm5, MSA128H>; 1501class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1502 vsplati32_uimm5, MSA128W>; 1503class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1504 vsplati64_uimm5, MSA128D>; 1505 1506class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1507class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1508class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1509class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1510 1511class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1512class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1513class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1514class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1515 1516class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1517 vsplati8_simm5, MSA128B>; 1518class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1519 vsplati16_simm5, MSA128H>; 1520class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1521 vsplati32_simm5, MSA128W>; 1522class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1523 vsplati64_simm5, MSA128D>; 1524 1525class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1526 vsplati8_uimm5, MSA128B>; 1527class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1528 vsplati16_uimm5, MSA128H>; 1529class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1530 vsplati32_uimm5, MSA128W>; 1531class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1532 vsplati64_uimm5, MSA128D>; 1533 1534class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1535 GPR32, MSA128B>; 1536class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1537 GPR32, MSA128H>; 1538class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1539 GPR32, MSA128W>; 1540 1541class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1542 GPR32, MSA128B>; 1543class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1544 GPR32, MSA128H>; 1545class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1546 GPR32, MSA128W>; 1547 1548class CTCMSA_DESC { 1549 dag OutOperandList = (outs); 1550 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1551 string AsmString = "ctcmsa\t$cd, $rs"; 1552 InstrItinClass Itinerary = NoItinerary; 1553 bit hasSideEffects = 1; 1554} 1555 1556class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1557class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1558class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1559class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1560 1561class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1562class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1563class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1564class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1565 1566class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1567 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1568 IsCommutable; 1569class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1570 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1571 IsCommutable; 1572class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1573 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1574 IsCommutable; 1575 1576class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1577 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1578 IsCommutable; 1579class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1580 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1581 IsCommutable; 1582class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1583 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1584 IsCommutable; 1585 1586class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1587 MSA128HOpnd, MSA128BOpnd, 1588 MSA128BOpnd>, IsCommutable; 1589class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1590 MSA128WOpnd, MSA128HOpnd, 1591 MSA128HOpnd>, IsCommutable; 1592class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1593 MSA128DOpnd, MSA128WOpnd, 1594 MSA128WOpnd>, IsCommutable; 1595 1596class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1597 MSA128HOpnd, MSA128BOpnd, 1598 MSA128BOpnd>, IsCommutable; 1599class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1600 MSA128WOpnd, MSA128HOpnd, 1601 MSA128HOpnd>, IsCommutable; 1602class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1603 MSA128DOpnd, MSA128WOpnd, 1604 MSA128WOpnd>, IsCommutable; 1605 1606class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1607 MSA128HOpnd, MSA128BOpnd, 1608 MSA128BOpnd>; 1609class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1610 MSA128WOpnd, MSA128HOpnd, 1611 MSA128HOpnd>; 1612class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1613 MSA128DOpnd, MSA128WOpnd, 1614 MSA128WOpnd>; 1615 1616class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1617 MSA128HOpnd, MSA128BOpnd, 1618 MSA128BOpnd>; 1619class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1620 MSA128WOpnd, MSA128HOpnd, 1621 MSA128HOpnd>; 1622class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1623 MSA128DOpnd, MSA128WOpnd, 1624 MSA128WOpnd>; 1625 1626class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1627 IsCommutable; 1628class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1629 IsCommutable; 1630 1631class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1632 IsCommutable; 1633class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1634 IsCommutable; 1635 1636class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1637 IsCommutable; 1638class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1639 IsCommutable; 1640 1641class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1642 MSA128WOpnd>; 1643class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1644 MSA128DOpnd>; 1645 1646class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1647class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1648 1649class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1650class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1651 1652class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1653 IsCommutable; 1654class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1655 IsCommutable; 1656 1657class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1658 IsCommutable; 1659class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1660 IsCommutable; 1661 1662class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1663 IsCommutable; 1664class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1665 IsCommutable; 1666 1667class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1668 IsCommutable; 1669class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1670 IsCommutable; 1671 1672class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1673 IsCommutable; 1674class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1675 IsCommutable; 1676 1677class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1678 IsCommutable; 1679class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1680 IsCommutable; 1681 1682class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1683 IsCommutable; 1684class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1685 IsCommutable; 1686 1687class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1688class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1689 1690class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1691 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1692class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1693 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1694 1695class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, 1696 MSA128WOpnd>; 1697class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, 1698 MSA128DOpnd>; 1699 1700class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1701 MSA128WOpnd, MSA128HOpnd>; 1702class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1703 MSA128DOpnd, MSA128WOpnd>; 1704 1705class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1706 MSA128WOpnd, MSA128HOpnd>; 1707class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1708 MSA128DOpnd, MSA128WOpnd>; 1709 1710class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1711 MSA128WOpnd>; 1712class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1713 MSA128DOpnd>; 1714 1715class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1716 MSA128WOpnd>; 1717class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1718 MSA128DOpnd>; 1719 1720class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1721 MSA128WOpnd, MSA128HOpnd>; 1722class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1723 MSA128DOpnd, MSA128WOpnd>; 1724 1725class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1726 MSA128WOpnd, MSA128HOpnd>; 1727class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1728 MSA128DOpnd, MSA128WOpnd>; 1729 1730class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, MSA128B, 1731 GPR32>; 1732class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, MSA128H, 1733 GPR32>; 1734class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, MSA128W, 1735 GPR32>; 1736 1737class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1738class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1739 1740class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1741 MSA128WOpnd>; 1742class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1743 MSA128DOpnd>; 1744 1745class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1746class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1747 1748class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1749 MSA128WOpnd>; 1750class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1751 MSA128DOpnd>; 1752 1753class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1754class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1755 1756class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1757 MSA128WOpnd>; 1758class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1759 MSA128DOpnd>; 1760 1761class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1762 MSA128WOpnd>; 1763class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1764 MSA128DOpnd>; 1765 1766class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1767class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1768 1769class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1770class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1771 1772class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1773class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1774 1775class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1776 MSA128WOpnd>; 1777class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1778 MSA128DOpnd>; 1779 1780class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1781class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1782 1783class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1784class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1785 1786class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1787class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1788 1789class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1790class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1791 1792class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1793class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1794 1795class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1796class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1797 1798class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1799class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1800 1801class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1802class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1803 1804class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1805 MSA128WOpnd>; 1806class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1807 MSA128DOpnd>; 1808 1809class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1810 MSA128WOpnd>; 1811class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1812 MSA128DOpnd>; 1813 1814class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1815 MSA128WOpnd>; 1816class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1817 MSA128DOpnd>; 1818 1819class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1820 MSA128WOpnd>; 1821class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1822 MSA128DOpnd>; 1823 1824class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1825 MSA128WOpnd>; 1826class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1827 MSA128DOpnd>; 1828 1829class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1830 MSA128WOpnd>; 1831class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1832 MSA128DOpnd>; 1833 1834class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1835 MSA128WOpnd>; 1836class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1837 MSA128DOpnd>; 1838 1839class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1840 MSA128WOpnd>; 1841class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1842 MSA128DOpnd>; 1843 1844class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1845 MSA128WOpnd>; 1846class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1847 MSA128DOpnd>; 1848 1849class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1850 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1851class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1852 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1853 1854class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 1855 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1856class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 1857 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1858class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 1859 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1860 1861class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 1862 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1863class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 1864 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1865class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 1866 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1867 1868class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 1869 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1870class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 1871 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1872class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 1873 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1874 1875class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 1876 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1877class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 1878 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1879class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 1880 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1881 1882class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 1883class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 1884class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 1885class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 1886 1887class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 1888class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 1889class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 1890class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 1891 1892class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 1893class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 1894class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 1895class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 1896 1897class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 1898class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 1899class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 1900class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 1901 1902class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B, 1903 GPR32>; 1904class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H, 1905 GPR32>; 1906class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W, 1907 GPR32>; 1908 1909class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1910class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1911class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1912class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1913 1914class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1915 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 1916 ComplexPattern Addr = addrRegImm, 1917 InstrItinClass itin = NoItinerary> { 1918 dag OutOperandList = (outs RCWD:$wd); 1919 dag InOperandList = (ins MemOpnd:$addr); 1920 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1921 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1922 InstrItinClass Itinerary = itin; 1923} 1924 1925class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1926class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1927class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1928class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1929 1930class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 1931class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 1932class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 1933class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 1934 1935class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1936 ValueType TyNode, RegisterClass RCWD, 1937 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1938 InstrItinClass itin = NoItinerary> { 1939 dag OutOperandList = (outs RCWD:$wd); 1940 dag InOperandList = (ins MemOpnd:$addr); 1941 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1942 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1943 InstrItinClass Itinerary = itin; 1944} 1945 1946class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1947class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1948class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1949class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1950 1951class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1952 MSA128HOpnd>; 1953class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1954 MSA128WOpnd>; 1955 1956class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1957 MSA128HOpnd>; 1958class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1959 MSA128WOpnd>; 1960 1961class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, 1962 MSA128BOpnd>; 1963class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, 1964 MSA128HOpnd>; 1965class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, 1966 MSA128WOpnd>; 1967class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, 1968 MSA128DOpnd>; 1969 1970class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 1971class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 1972class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 1973class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 1974 1975class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 1976class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 1977class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 1978class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 1979 1980class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 1981class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 1982class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 1983class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 1984 1985class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 1986 MSA128B>; 1987class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 1988 MSA128H>; 1989class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 1990 MSA128W>; 1991class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 1992 MSA128D>; 1993 1994class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 1995 MSA128B>; 1996class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 1997 MSA128H>; 1998class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 1999 MSA128W>; 2000class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2001 MSA128D>; 2002 2003class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2004class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2005class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2006class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2007 2008class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2009class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2010class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2011class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2012 2013class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2014class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2015class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2016class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2017 2018class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2019 MSA128B>; 2020class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2021 MSA128H>; 2022class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2023 MSA128W>; 2024class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2025 MSA128D>; 2026 2027class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2028 MSA128B>; 2029class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2030 MSA128H>; 2031class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2032 MSA128W>; 2033class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2034 MSA128D>; 2035 2036class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128BOpnd>; 2037class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128HOpnd>; 2038class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128WOpnd>; 2039class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128DOpnd>; 2040 2041class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128BOpnd>; 2042class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128HOpnd>; 2043class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128WOpnd>; 2044class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128DOpnd>; 2045 2046class MOVE_V_DESC { 2047 dag OutOperandList = (outs MSA128B:$wd); 2048 dag InOperandList = (ins MSA128B:$ws); 2049 string AsmString = "move.v\t$wd, $ws"; 2050 list<dag> Pattern = []; 2051 InstrItinClass Itinerary = NoItinerary; 2052} 2053 2054class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2055 MSA128HOpnd>; 2056class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2057 MSA128WOpnd>; 2058 2059class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2060 MSA128HOpnd>; 2061class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2062 MSA128WOpnd>; 2063 2064class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, 2065 MSA128BOpnd>; 2066class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, 2067 MSA128HOpnd>; 2068class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, 2069 MSA128WOpnd>; 2070class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, 2071 MSA128DOpnd>; 2072 2073class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2074 MSA128HOpnd>; 2075class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2076 MSA128WOpnd>; 2077 2078class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2079 MSA128HOpnd>; 2080class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2081 MSA128WOpnd>; 2082 2083class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2084class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2085class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2086class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2087 2088class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 2089class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 2090class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 2091class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 2092 2093class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; 2094class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; 2095class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; 2096class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; 2097 2098class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 2099class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 2100class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 2101class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 2102 2103class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2104 MSA128B>; 2105 2106class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 2107class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 2108class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 2109class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 2110 2111class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128B>; 2112 2113class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2114class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2115class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2116class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2117 2118class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2119class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2120class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2121class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2122 2123class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>; 2124class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>; 2125class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>; 2126class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>; 2127 2128class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 2129class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 2130class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 2131class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 2132 2133class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 2134class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 2135class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 2136class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 2137 2138class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128B>; 2139class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128H>; 2140class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128W>; 2141 2142class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2143class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2144class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2145class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2146 2147class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 2148class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 2149class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 2150class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 2151 2152class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2153class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2154class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2155class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2156 2157class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2158 MSA128B>; 2159class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2160 MSA128H>; 2161class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2162 MSA128W>; 2163class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2164 MSA128D>; 2165 2166class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd, 2167 MSA128BOpnd, GPR32Opnd>; 2168class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd, 2169 MSA128HOpnd, GPR32Opnd>; 2170class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd, 2171 MSA128WOpnd, GPR32Opnd>; 2172class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, 2173 MSA128DOpnd, GPR32Opnd>; 2174 2175class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b, 2176 MSA128B>; 2177class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h, 2178 MSA128H>; 2179class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w, 2180 MSA128W>; 2181class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d, 2182 MSA128D>; 2183 2184class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2185class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2186class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2187class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2188 2189class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2190 MSA128B>; 2191class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2192 MSA128H>; 2193class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2194 MSA128W>; 2195class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2196 MSA128D>; 2197 2198class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2199class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2200class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2201class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2202 2203class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 2204class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 2205class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 2206class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 2207 2208class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2209class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2210class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2211class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2212 2213class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2214 MSA128B>; 2215class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2216 MSA128H>; 2217class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2218 MSA128W>; 2219class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2220 MSA128D>; 2221 2222class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2223class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2224class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2225class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2226 2227class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 2228class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 2229class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 2230class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 2231 2232class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2233 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2234 ComplexPattern Addr = addrRegImm, 2235 InstrItinClass itin = NoItinerary> { 2236 dag OutOperandList = (outs); 2237 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2238 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2239 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2240 InstrItinClass Itinerary = itin; 2241} 2242 2243class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2244class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2245class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2246class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2247 2248class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2249 ValueType TyNode, RegisterClass RCWD, 2250 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2251 InstrItinClass itin = NoItinerary> { 2252 dag OutOperandList = (outs); 2253 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2254 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2255 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2256 InstrItinClass Itinerary = itin; 2257} 2258 2259class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2260class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2261class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2262class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2263 2264class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2265 MSA128BOpnd>; 2266class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2267 MSA128HOpnd>; 2268class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2269 MSA128WOpnd>; 2270class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2271 MSA128DOpnd>; 2272 2273class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2274 MSA128BOpnd>; 2275class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2276 MSA128HOpnd>; 2277class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2278 MSA128WOpnd>; 2279class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2280 MSA128DOpnd>; 2281 2282class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2283 MSA128BOpnd>; 2284class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2285 MSA128HOpnd>; 2286class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2287 MSA128WOpnd>; 2288class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2289 MSA128DOpnd>; 2290 2291class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2292 MSA128BOpnd>; 2293class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2294 MSA128HOpnd>; 2295class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2296 MSA128WOpnd>; 2297class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2298 MSA128DOpnd>; 2299 2300class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2301class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2302class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2303class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2304 2305class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, MSA128B>; 2306class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, MSA128H>; 2307class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, MSA128W>; 2308class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, MSA128D>; 2309 2310class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2311class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2312class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2313class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2314 2315class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 2316class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 2317class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 2318class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 2319 2320class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, MSA128B>; 2321 2322// Instruction defs. 2323def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2324def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2325def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2326def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2327 2328def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2329def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2330def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2331def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2332 2333def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2334def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2335def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2336def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2337 2338def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2339def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2340def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2341def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2342 2343def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2344def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2345def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2346def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2347 2348def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2349def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2350def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2351def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2352 2353def AND_V : AND_V_ENC, AND_V_DESC; 2354def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2355 PseudoInstExpansion<(AND_V MSA128B:$wd, 2356 MSA128B:$ws, MSA128B:$wt)>; 2357def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2358 PseudoInstExpansion<(AND_V MSA128B:$wd, 2359 MSA128B:$ws, MSA128B:$wt)>; 2360def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2361 PseudoInstExpansion<(AND_V MSA128B:$wd, 2362 MSA128B:$ws, MSA128B:$wt)>; 2363 2364def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2365 2366def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2367def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2368def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2369def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2370 2371def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2372def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2373def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2374def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2375 2376def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2377def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2378def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2379def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2380 2381def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2382def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2383def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2384def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2385 2386def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2387def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2388def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2389def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2390 2391def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2392def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2393def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2394def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2395 2396def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2397def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2398def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2399def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2400 2401def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2402def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2403def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2404def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2405 2406def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2407def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2408def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2409def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2410 2411def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2412def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2413def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2414def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2415 2416def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2417def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2418def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2419def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2420 2421def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2422def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2423def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2424def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2425 2426def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2427 2428def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2429 2430def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2431 2432def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2433 2434def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2435def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2436def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2437def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2438 2439def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2440def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2441def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2442def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2443 2444def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2445def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2446def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2447def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2448 2449def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2450 2451def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2452 2453class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> : 2454 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt), 2455 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>, 2456 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws, 2457 MSA128B:$wt)> { 2458 let Constraints = "$wd_in = $wd"; 2459} 2460 2461def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>; 2462def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>; 2463def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>; 2464def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>; 2465def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>; 2466 2467def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2468 2469def BSET_B : BSET_B_ENC, BSET_B_DESC; 2470def BSET_H : BSET_H_ENC, BSET_H_DESC; 2471def BSET_W : BSET_W_ENC, BSET_W_DESC; 2472def BSET_D : BSET_D_ENC, BSET_D_DESC; 2473 2474def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2475def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2476def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2477def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2478 2479def BZ_B : BZ_B_ENC, BZ_B_DESC; 2480def BZ_H : BZ_H_ENC, BZ_H_DESC; 2481def BZ_W : BZ_W_ENC, BZ_W_DESC; 2482def BZ_D : BZ_D_ENC, BZ_D_DESC; 2483 2484def BZ_V : BZ_V_ENC, BZ_V_DESC; 2485 2486def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2487def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2488def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2489def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2490 2491def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2492def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2493def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2494def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2495 2496def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2497 2498def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2499def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2500def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2501def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2502 2503def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2504def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2505def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2506def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2507 2508def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2509def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2510def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2511def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2512 2513def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2514def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2515def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2516def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2517 2518def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2519def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2520def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2521def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2522 2523def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2524def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2525def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2526def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2527 2528def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2529def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2530def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2531def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2532 2533def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2534def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2535def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2536def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2537 2538def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2539def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2540def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2541 2542def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2543def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2544def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2545 2546def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2547 2548def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2549def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2550def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2551def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2552 2553def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2554def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2555def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2556def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2557 2558def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2559def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2560def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2561 2562def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2563def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2564def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2565 2566def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2567def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2568def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2569 2570def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2571def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2572def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2573 2574def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2575def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2576def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2577 2578def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2579def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2580def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2581 2582def FADD_W : FADD_W_ENC, FADD_W_DESC; 2583def FADD_D : FADD_D_ENC, FADD_D_DESC; 2584 2585def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2586def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2587 2588def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2589def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2590 2591def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2592def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2593 2594def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2595def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2596 2597def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2598def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2599 2600def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2601def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2602 2603def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2604def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2605 2606def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2607def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2608 2609def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2610def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2611 2612def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2613def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2614 2615def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2616def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2617 2618def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2619def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2620 2621def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2622def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2623 2624def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2625def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2626 2627def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2628def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2629 2630def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2631def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2632 2633def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2634def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2635 2636def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2637def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2638 2639def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2640def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2641 2642def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2643def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2644 2645def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2646def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2647 2648def FILL_B : FILL_B_ENC, FILL_B_DESC; 2649def FILL_H : FILL_H_ENC, FILL_H_DESC; 2650def FILL_W : FILL_W_ENC, FILL_W_DESC; 2651 2652def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2653def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2654 2655def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2656def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2657 2658def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2659def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2660 2661def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2662def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2663 2664def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2665def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2666 2667def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2668def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2669 2670def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2671def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2672 2673def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2674def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2675 2676def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2677def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2678 2679def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2680def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2681 2682def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2683def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2684 2685def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2686def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2687 2688def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2689def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2690 2691def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2692def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2693 2694def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2695def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2696 2697def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2698def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2699 2700def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2701def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2702 2703def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2704def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2705 2706def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2707def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2708 2709def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2710def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2711 2712def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2713def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2714 2715def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2716def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2717 2718def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2719def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2720 2721def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2722def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2723 2724def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2725def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2726 2727def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2728def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2729 2730def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2731def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2732 2733def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2734def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2735 2736def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2737def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2738 2739def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2740def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2741def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2742 2743def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2744def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2745def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2746 2747def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2748def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2749def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2750 2751def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2752def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2753def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2754 2755def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2756def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2757def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2758def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2759 2760def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2761def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2762def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2763def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2764 2765def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2766def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2767def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2768def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2769 2770def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2771def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2772def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2773def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2774 2775def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2776def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2777def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2778 2779def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2780def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2781def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2782def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2783 2784def LD_B: LD_B_ENC, LD_B_DESC; 2785def LD_H: LD_H_ENC, LD_H_DESC; 2786def LD_W: LD_W_ENC, LD_W_DESC; 2787def LD_D: LD_D_ENC, LD_D_DESC; 2788 2789def LDI_B : LDI_B_ENC, LDI_B_DESC; 2790def LDI_H : LDI_H_ENC, LDI_H_DESC; 2791def LDI_W : LDI_W_ENC, LDI_W_DESC; 2792def LDI_D : LDI_D_ENC, LDI_D_DESC; 2793 2794def LDX_B: LDX_B_ENC, LDX_B_DESC; 2795def LDX_H: LDX_H_ENC, LDX_H_DESC; 2796def LDX_W: LDX_W_ENC, LDX_W_DESC; 2797def LDX_D: LDX_D_ENC, LDX_D_DESC; 2798 2799def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2800def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2801 2802def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2803def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2804 2805def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2806def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2807def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2808def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2809 2810def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2811def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2812def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2813def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2814 2815def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2816def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2817def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2818def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2819 2820def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2821def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2822def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2823def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2824 2825def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2826def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2827def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2828def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2829 2830def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2831def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2832def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2833def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2834 2835def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2836def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2837def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2838def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2839 2840def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2841def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2842def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2843def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2844 2845def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2846def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2847def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2848def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2849 2850def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2851def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2852def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2853def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2854 2855def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2856def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2857def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2858def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2859 2860def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2861def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2862def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2863def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2864 2865def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2866def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2867def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2868def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2869 2870def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2871 2872def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2873def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2874 2875def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2876def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2877 2878def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2879def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2880def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2881def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2882 2883def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2884def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2885 2886def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2887def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2888 2889def MULV_B : MULV_B_ENC, MULV_B_DESC; 2890def MULV_H : MULV_H_ENC, MULV_H_DESC; 2891def MULV_W : MULV_W_ENC, MULV_W_DESC; 2892def MULV_D : MULV_D_ENC, MULV_D_DESC; 2893 2894def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2895def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2896def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2897def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2898 2899def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2900def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2901def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2902def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2903 2904def NOR_V : NOR_V_ENC, NOR_V_DESC; 2905def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2906 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2907 MSA128B:$ws, MSA128B:$wt)>; 2908def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2909 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2910 MSA128B:$ws, MSA128B:$wt)>; 2911def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2912 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2913 MSA128B:$ws, MSA128B:$wt)>; 2914 2915def NORI_B : NORI_B_ENC, NORI_B_DESC; 2916 2917def OR_V : OR_V_ENC, OR_V_DESC; 2918def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2919 PseudoInstExpansion<(OR_V MSA128B:$wd, 2920 MSA128B:$ws, MSA128B:$wt)>; 2921def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2922 PseudoInstExpansion<(OR_V MSA128B:$wd, 2923 MSA128B:$ws, MSA128B:$wt)>; 2924def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 2925 PseudoInstExpansion<(OR_V MSA128B:$wd, 2926 MSA128B:$ws, MSA128B:$wt)>; 2927 2928def ORI_B : ORI_B_ENC, ORI_B_DESC; 2929 2930def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2931def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2932def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2933def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2934 2935def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2936def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2937def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2938def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2939 2940def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2941def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2942def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2943def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2944 2945def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2946def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2947def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2948def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2949 2950def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2951def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2952def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2953def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2954 2955def SHF_B : SHF_B_ENC, SHF_B_DESC; 2956def SHF_H : SHF_H_ENC, SHF_H_DESC; 2957def SHF_W : SHF_W_ENC, SHF_W_DESC; 2958 2959def SLD_B : SLD_B_ENC, SLD_B_DESC; 2960def SLD_H : SLD_H_ENC, SLD_H_DESC; 2961def SLD_W : SLD_W_ENC, SLD_W_DESC; 2962def SLD_D : SLD_D_ENC, SLD_D_DESC; 2963 2964def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 2965def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 2966def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 2967def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 2968 2969def SLL_B : SLL_B_ENC, SLL_B_DESC; 2970def SLL_H : SLL_H_ENC, SLL_H_DESC; 2971def SLL_W : SLL_W_ENC, SLL_W_DESC; 2972def SLL_D : SLL_D_ENC, SLL_D_DESC; 2973 2974def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 2975def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 2976def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 2977def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 2978 2979def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 2980def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 2981def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 2982def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 2983 2984def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 2985def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 2986def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 2987def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 2988 2989def SRA_B : SRA_B_ENC, SRA_B_DESC; 2990def SRA_H : SRA_H_ENC, SRA_H_DESC; 2991def SRA_W : SRA_W_ENC, SRA_W_DESC; 2992def SRA_D : SRA_D_ENC, SRA_D_DESC; 2993 2994def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 2995def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 2996def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 2997def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 2998 2999def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3000def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3001def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3002def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3003 3004def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3005def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3006def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3007def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3008 3009def SRL_B : SRL_B_ENC, SRL_B_DESC; 3010def SRL_H : SRL_H_ENC, SRL_H_DESC; 3011def SRL_W : SRL_W_ENC, SRL_W_DESC; 3012def SRL_D : SRL_D_ENC, SRL_D_DESC; 3013 3014def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3015def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3016def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3017def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3018 3019def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3020def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3021def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3022def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3023 3024def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3025def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3026def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3027def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3028 3029def ST_B: ST_B_ENC, ST_B_DESC; 3030def ST_H: ST_H_ENC, ST_H_DESC; 3031def ST_W: ST_W_ENC, ST_W_DESC; 3032def ST_D: ST_D_ENC, ST_D_DESC; 3033 3034def STX_B: STX_B_ENC, STX_B_DESC; 3035def STX_H: STX_H_ENC, STX_H_DESC; 3036def STX_W: STX_W_ENC, STX_W_DESC; 3037def STX_D: STX_D_ENC, STX_D_DESC; 3038 3039def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3040def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3041def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3042def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3043 3044def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3045def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3046def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3047def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3048 3049def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3050def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3051def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3052def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3053 3054def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3055def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3056def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3057def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3058 3059def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3060def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3061def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3062def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3063 3064def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3065def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3066def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3067def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3068 3069def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3070def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3071def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3072def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3073 3074def XOR_V : XOR_V_ENC, XOR_V_DESC; 3075def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3076 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3077 MSA128B:$ws, MSA128B:$wt)>; 3078def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3079 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3080 MSA128B:$ws, MSA128B:$wt)>; 3081def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3082 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3083 MSA128B:$ws, MSA128B:$wt)>; 3084 3085def XORI_B : XORI_B_ENC, XORI_B_DESC; 3086 3087// Patterns. 3088class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3089 Pat<pattern, result>, Requires<pred>; 3090 3091def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3092 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3093 3094def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3095def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3096def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3097def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3098def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3099def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3100def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3101 3102def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3103def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3104def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3105 3106def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3107 (ST_B MSA128B:$ws, addr:$addr)>; 3108def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3109 (ST_H MSA128H:$ws, addr:$addr)>; 3110def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3111 (ST_W MSA128W:$ws, addr:$addr)>; 3112def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3113 (ST_D MSA128D:$ws, addr:$addr)>; 3114def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3115 (ST_H MSA128H:$ws, addr:$addr)>; 3116def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3117 (ST_W MSA128W:$ws, addr:$addr)>; 3118def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3119 (ST_D MSA128D:$ws, addr:$addr)>; 3120 3121def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3122 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3123def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3124 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3125def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3126 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3127 3128class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3129 RegisterOperand ROWS = ROWD, 3130 InstrItinClass itin = NoItinerary> : 3131 MipsPseudo<(outs ROWD:$wd), 3132 (ins ROWS:$ws), 3133 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3134 InstrItinClass Itinerary = itin; 3135} 3136def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3137 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3138 MSA128WOpnd:$ws)>; 3139def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3140 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3141 MSA128DOpnd:$ws)>; 3142 3143class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3144 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3145 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3146 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3147 3148// These are endian-independant because the element size doesnt change 3149def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3150def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3151def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3152def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3153def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3154def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3155 3156// Little endian bitcasts are always no-ops 3157def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3158def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3159def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3160def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3161def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3162def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3163 3164def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3165def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3166def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3167def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3168def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3169 3170def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3171def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3172def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3173def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3174def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3175 3176def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3177def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3178def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3179def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3180def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3181 3182def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3183def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3184def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3185def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3186def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3187 3188def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3189def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3190def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3191def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3192def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3193 3194// Big endian bitcasts expand to shuffle instructions. 3195// This is because bitcast is defined to be a store/load sequence and the 3196// vector store/load instructions are mixed-endian with respect to the vector 3197// as a whole (little endian with respect to element order, but big endian 3198// elements). 3199 3200class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3201 RegisterClass DstRC, MSAInst Insn, 3202 RegisterClass ViaRC> : 3203 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3204 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3205 DstRC), 3206 [HasMSA, IsBE]>; 3207 3208class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3209 RegisterClass DstRC, MSAInst Insn, 3210 RegisterClass ViaRC> : 3211 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3212 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3213 DstRC), 3214 [HasMSA, IsBE]>; 3215 3216class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3217 RegisterClass DstRC> : 3218 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3219 3220class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3221 RegisterClass DstRC> : 3222 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3223 3224class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3225 RegisterClass DstRC> : 3226 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3227 (COPY_TO_REGCLASS 3228 (SHF_W 3229 (COPY_TO_REGCLASS 3230 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3231 MSA128W), 177), 3232 DstRC), 3233 [HasMSA, IsBE]>; 3234 3235class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3236 RegisterClass DstRC> : 3237 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3238 3239class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3240 RegisterClass DstRC> : 3241 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3242 3243class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3244 RegisterClass DstRC> : 3245 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3246 3247def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3248def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3249def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3250def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3251def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3252def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3253 3254def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3255def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3256def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3257def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3258def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3259 3260def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3261def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3262def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3263def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3264def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3265 3266def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3267def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3268def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3269def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3270def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3271 3272def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3273def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3274def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3275def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3276def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3277 3278def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3279def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3280def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3281def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3282def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3283 3284def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3285def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3286def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3287def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3288def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3289 3290// Pseudos used to implement BNZ.df, and BZ.df 3291 3292class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3293 RegisterClass RCWS, 3294 InstrItinClass itin = NoItinerary> : 3295 MipsPseudo<(outs GPR32:$dst), 3296 (ins RCWS:$ws), 3297 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3298 bit usesCustomInserter = 1; 3299} 3300 3301def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3302 MSA128B, NoItinerary>; 3303def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3304 MSA128H, NoItinerary>; 3305def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3306 MSA128W, NoItinerary>; 3307def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3308 MSA128D, NoItinerary>; 3309def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3310 MSA128B, NoItinerary>; 3311 3312def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3313 MSA128B, NoItinerary>; 3314def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3315 MSA128H, NoItinerary>; 3316def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3317 MSA128W, NoItinerary>; 3318def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3319 MSA128D, NoItinerary>; 3320def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3321 MSA128B, NoItinerary>; 3322