MipsMSAInstrInfo.td revision 2ac128292150c7ebb469d137877eaa3c6d26a8bb
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15 16def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 17def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 18def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 19def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 20 21// Immediates 22def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 23def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 24 25def uimm3 : Operand<i32> { 26 let PrintMethod = "printUnsignedImm"; 27} 28 29def uimm4 : Operand<i32> { 30 let PrintMethod = "printUnsignedImm"; 31} 32 33def uimm8 : Operand<i32> { 34 let PrintMethod = "printUnsignedImm"; 35} 36 37def simm5 : Operand<i32>; 38 39def simm10 : Operand<i32>; 40 41// Instruction encoding. 42class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 43class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 44class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 45class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 46 47class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 48class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 49class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 50class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 51 52class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 53class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 54class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 55class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 56 57class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 58class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 59class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 60class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 61 62class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 63class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 64class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 65class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 66 67class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 68class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 69class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 70class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 71 72class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 73 74class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 75 76class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 77class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 78class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 79class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 80 81class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 82class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 83class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 84class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 85 86class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 87class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 88class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 89class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 90 91class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 92class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 93class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 94class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 95 96class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 97class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 98class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 99class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 100 101class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 102class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 103class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 104class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 105 106class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 107class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 108class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 109class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 110 111class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 112class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 113class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 114class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 115 116class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 117class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 118class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 119class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 120 121class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 122class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 123class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 124class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 125 126class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 127class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 128class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 129class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 130 131class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 132class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 133class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 134class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 135 136class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 137 138class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 139 140class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 141 142class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 143 144class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 145class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 146class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 147class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 148 149class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 150class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 151class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 152class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 153 154class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 155class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 156class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 157class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 158 159class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 160 161class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 162 163class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 164 165class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 166class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 167class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 168class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 169 170class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 171class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 172class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 173class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 174 175class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 176class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 177class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 178class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 179 180class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 181 182class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 183class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 184class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 185class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 186 187class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 188class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 189class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 190class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 191 192class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 193 194class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 195class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 196class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 197class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 198 199class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 200class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 201class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 202class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 203 204class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 205class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 206class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 207class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 208 209class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 210class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 211class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 212class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 213 214class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 215class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 216class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 217class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 218 219class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 220class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 221class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 222class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 223 224class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 225class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 226class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 227class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 228 229class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 230class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 231class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 232class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 233 234class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 235class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 236class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 237 238class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 239class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 240class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 241 242class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 243 244class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 245class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 246class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 247class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 248 249class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 250class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 251class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 252class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 253 254class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 255class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 256class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 257 258class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 259class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 260class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 261 262class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 263class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 264class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 265 266class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 267class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 268class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 269 270class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 271class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 272class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 273 274class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 275class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 276class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 277 278class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 279class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 280 281class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 282class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 283 284class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 285class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 286 287class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 288class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 289 290class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 291class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 292 293class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 294class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 295 296class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 297class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 298 299class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 300class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 301 302class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 303class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 304 305class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 306class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 307 308class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 309class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 310 311class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 312class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 313 314class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 315class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 316 317class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 318class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 319 320class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 321class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 322 323class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 324class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 325 326class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 327class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 328 329class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 330class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 331 332class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 333class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 334 335class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 336class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 337 338class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 339class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 340 341class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 342class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 343 344class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 345class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 346class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 347 348class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 349class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 350 351class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 352class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 353 354class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 355class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 356 357class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 358class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 359 360class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 361class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 362 363class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 364class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 365 366class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 367class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 368 369class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 370class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 371 372class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 373class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 374 375class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 376class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 377 378class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 379class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 380 381class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 382class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 383 384class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 385class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 386 387class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 388class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 389 390class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 391class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 392 393class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 394class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 395 396class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 397class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 398 399class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 400class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 401 402class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 403class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 404 405class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 406class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 407 408class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 409class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 410 411class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 412class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 413 414class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 415class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 416 417class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 418class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 419 420class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>; 421class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>; 422 423class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>; 424class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>; 425 426class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 427class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 428 429class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 430class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 431 432class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 433class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 434 435class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 436class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 437class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 438 439class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 440class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 441class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 442 443class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 444class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 445class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 446 447class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 448class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 449class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 450 451class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 452class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 453class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 454class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 455 456class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 457class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 458class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 459class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 460 461class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 462class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 463class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 464class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 465 466class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 467class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 468class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 469class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 470 471class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 472class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 473class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 474 475class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 476class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 477class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 478class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 479 480class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 481class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 482class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 483class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 484 485class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 486class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 487class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 488class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 489 490class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 491class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 492class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 493class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 494 495class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 496class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 497 498class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 499class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 500 501class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 502class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 503class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 504class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 505 506class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 507class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 508class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 509class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 510 511class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 512class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 513class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 514class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 515 516class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 517class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 518class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 519class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 520 521class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 522class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 523class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 524class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 525 526class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 527class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 528class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 529class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 530 531class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 532class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 533class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 534class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 535 536class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 537class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 538class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 539class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 540 541class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 542class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 543class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 544class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 545 546class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 547class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 548class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 549class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 550 551class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 552class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 553class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 554class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 555 556class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 557class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 558class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 559class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 560 561class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 562class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 563class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 564class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 565 566class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 567 568class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 569class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 570 571class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 572class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 573 574class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 575class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 576class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 577class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 578 579class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>; 580class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>; 581 582class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 583class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 584 585class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 586class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 587class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 588class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 589 590class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 591class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 592class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 593class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 594 595class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 596class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 597class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 598class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 599 600class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 601 602class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 603 604class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 605 606class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 607 608class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 609class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 610class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 611class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 612 613class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 614class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 615class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 616class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 617 618class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 619class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 620class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 621class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 622 623class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 624class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 625class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 626class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 627 628class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 629class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 630class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 631class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 632 633class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 634class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 635class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 636 637class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 638class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 639class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 640class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 641 642class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 643class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 644class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 645class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 646 647class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 648class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 649class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 650class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 651 652class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 653class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 654class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 655class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 656 657class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 658class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 659class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 660class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 661 662class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 663class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 664class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 665class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 666 667class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 668class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 669class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 670class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 671 672class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 673class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 674class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 675class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 676 677class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 678class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 679class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 680class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 681 682class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 683class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 684class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 685class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 686 687class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 688class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 689class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 690class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 691 692class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 693class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 694class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 695class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 696 697class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 698class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 699class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 700class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 701 702class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 703class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 704class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 705class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 706 707class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 708class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 709class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 710class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 711 712class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 713class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 714class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 715class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 716 717class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 718class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 719class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 720class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 721 722class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 723class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 724class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 725class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 726 727class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 728class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 729class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 730class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 731 732class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 733class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 734class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 735class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 736 737class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 738class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 739class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 740class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 741 742class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 743class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 744class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 745class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 746 747class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 748class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 749class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 750class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 751 752class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 753 754class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 755 756// Instruction desc. 757class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 758 RegisterClass RCWD, RegisterClass RCWS = RCWD, 759 InstrItinClass itin = NoItinerary> { 760 dag OutOperandList = (outs RCWD:$wd); 761 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 762 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 763 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 764 InstrItinClass Itinerary = itin; 765} 766 767class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 768 RegisterClass RCWD, RegisterClass RCWS = RCWD, 769 InstrItinClass itin = NoItinerary> { 770 dag OutOperandList = (outs RCWD:$wd); 771 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 772 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 773 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 774 InstrItinClass Itinerary = itin; 775} 776 777class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 778 RegisterClass RCWD, RegisterClass RCWS = RCWD, 779 InstrItinClass itin = NoItinerary> { 780 dag OutOperandList = (outs RCWD:$wd); 781 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 782 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 783 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 784 InstrItinClass Itinerary = itin; 785} 786 787class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 788 RegisterClass RCWD, RegisterClass RCWS = RCWD, 789 InstrItinClass itin = NoItinerary> { 790 dag OutOperandList = (outs RCWD:$wd); 791 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 792 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 793 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 794 InstrItinClass Itinerary = itin; 795} 796 797class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 798 RegisterClass RCD, RegisterClass RCWS, 799 InstrItinClass itin = NoItinerary> { 800 dag OutOperandList = (outs RCD:$rd); 801 dag InOperandList = (ins RCWS:$ws, uimm6:$n); 802 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 803 list<dag> Pattern = [(set RCD:$rd, (OpNode RCWS:$ws, immZExt6:$n))]; 804 InstrItinClass Itinerary = itin; 805} 806 807class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 808 RegisterClass RCWD, RegisterClass RCWS = RCWD, 809 InstrItinClass itin = NoItinerary> { 810 dag OutOperandList = (outs RCWD:$wd); 811 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 812 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 813 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 814 InstrItinClass Itinerary = itin; 815} 816 817class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 818 RegisterClass RCWD, RegisterClass RCWS = RCWD, 819 InstrItinClass itin = NoItinerary> { 820 dag OutOperandList = (outs RCWD:$wd); 821 dag InOperandList = (ins RCWS:$ws, simm5:$s5); 822 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5"); 823 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immSExt5:$s5))]; 824 InstrItinClass Itinerary = itin; 825} 826 827class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 828 RegisterClass RCWD, RegisterClass RCWS = RCWD, 829 InstrItinClass itin = NoItinerary> { 830 dag OutOperandList = (outs RCWD:$wd); 831 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 832 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 833 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 834 InstrItinClass Itinerary = itin; 835} 836 837class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 838 RegisterClass RCWD, 839 InstrItinClass itin = NoItinerary> { 840 dag OutOperandList = (outs RCWD:$wd); 841 dag InOperandList = (ins simm10:$i10); 842 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 843 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))]; 844 InstrItinClass Itinerary = itin; 845} 846 847class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 848 RegisterClass RCWD, RegisterClass RCWS = RCWD, 849 InstrItinClass itin = NoItinerary> { 850 dag OutOperandList = (outs RCWD:$wd); 851 dag InOperandList = (ins RCWS:$ws); 852 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 853 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 854 InstrItinClass Itinerary = itin; 855} 856 857class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 858 RegisterClass RCWD, RegisterClass RCWS = RCWD, 859 InstrItinClass itin = NoItinerary> : 860 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>; 861 862 863class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 864 RegisterClass RCWD, RegisterClass RCWS = RCWD, 865 RegisterClass RCWT = RCWD, 866 InstrItinClass itin = NoItinerary> { 867 dag OutOperandList = (outs RCWD:$wd); 868 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 869 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 870 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 871 InstrItinClass Itinerary = itin; 872} 873 874class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 875 RegisterClass RCWD, RegisterClass RCWS = RCWD, 876 RegisterClass RCWT = RCWD, 877 InstrItinClass itin = NoItinerary> { 878 dag OutOperandList = (outs RCWD:$wd); 879 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 880 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 881 list<dag> Pattern = [(set RCWD:$wd, 882 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))]; 883 InstrItinClass Itinerary = itin; 884 string Constraints = "$wd = $wd_in"; 885} 886 887class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 888 RegisterClass RCWD, RegisterClass RCWS = RCWD, 889 RegisterClass RCWT = RCWD, 890 InstrItinClass itin = NoItinerary> : 891 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 892 893class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 894 RegisterClass RCWD, RegisterClass RCWS = RCWD, 895 RegisterClass RCWT = RCWD, 896 InstrItinClass itin = NoItinerary> : 897 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 898 899class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 900 dag OutOperandList = (outs); 901 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 902 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 903 list<dag> Pattern = []; 904 InstrItinClass Itinerary = IIBranch; 905 bit isBranch = 1; 906 bit isTerminator = 1; 907 bit hasDelaySlot = 1; 908 list<Register> Defs = [AT]; 909} 910 911class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 912 RegisterClass RCD, RegisterClass RCWS, 913 InstrItinClass itin = NoItinerary> { 914 dag OutOperandList = (outs RCD:$wd); 915 dag InOperandList = (ins RCD:$wd_in, uimm6:$n, RCWS:$rs); 916 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 917 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 918 immZExt6:$n, 919 RCWS:$rs))]; 920 InstrItinClass Itinerary = itin; 921 string Constraints = "$wd = $wd_in"; 922} 923 924class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 925 RegisterClass RCWD, RegisterClass RCWS = RCWD, 926 InstrItinClass itin = NoItinerary> { 927 dag OutOperandList = (outs RCWD:$wd); 928 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 929 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 930 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 931 immZExt6:$n, 932 RCWS:$ws))]; 933 InstrItinClass Itinerary = itin; 934 string Constraints = "$wd = $wd_in"; 935} 936 937class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 938 RegisterClass RCWD, RegisterClass RCWS = RCWD, 939 RegisterClass RCWT = RCWD, 940 InstrItinClass itin = NoItinerary> { 941 dag OutOperandList = (outs RCWD:$wd); 942 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 943 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 944 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 945 InstrItinClass Itinerary = itin; 946} 947 948class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>, 949 IsCommutable; 950class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>, 951 IsCommutable; 952class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>, 953 IsCommutable; 954class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>, 955 IsCommutable; 956 957class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>, 958 IsCommutable; 959class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>, 960 IsCommutable; 961class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>, 962 IsCommutable; 963class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>, 964 IsCommutable; 965 966class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>, 967 IsCommutable; 968class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>, 969 IsCommutable; 970class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>, 971 IsCommutable; 972class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>, 973 IsCommutable; 974 975class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>, 976 IsCommutable; 977class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>, 978 IsCommutable; 979class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>, 980 IsCommutable; 981class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>, 982 IsCommutable; 983 984class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable; 985class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable; 986class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable; 987class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable; 988 989class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", int_mips_addvi_b, MSA128B>; 990class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", int_mips_addvi_h, MSA128H>; 991class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", int_mips_addvi_w, MSA128W>; 992class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", int_mips_addvi_d, MSA128D>; 993 994class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", int_mips_and_v, MSA128B>; 995 996class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, MSA128B>; 997 998class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>; 999class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>; 1000class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>; 1001class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>; 1002 1003class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>; 1004class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>; 1005class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>; 1006class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>; 1007 1008class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>, 1009 IsCommutable; 1010class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>, 1011 IsCommutable; 1012class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>, 1013 IsCommutable; 1014class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>, 1015 IsCommutable; 1016 1017class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>, 1018 IsCommutable; 1019class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>, 1020 IsCommutable; 1021class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>, 1022 IsCommutable; 1023class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>, 1024 IsCommutable; 1025 1026class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>, 1027 IsCommutable; 1028class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>, 1029 IsCommutable; 1030class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>, 1031 IsCommutable; 1032class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>, 1033 IsCommutable; 1034 1035class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>, 1036 IsCommutable; 1037class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>, 1038 IsCommutable; 1039class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>, 1040 IsCommutable; 1041class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>, 1042 IsCommutable; 1043 1044class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>; 1045class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>; 1046class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>; 1047class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>; 1048 1049class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1050class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1051class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1052class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1053 1054class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>; 1055class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>; 1056class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>; 1057class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>; 1058 1059class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1060 MSA128B>; 1061class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1062 MSA128H>; 1063class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1064 MSA128W>; 1065class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1066 MSA128D>; 1067 1068class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>; 1069class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>; 1070class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>; 1071class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>; 1072 1073class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1074 MSA128B>; 1075class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1076 MSA128H>; 1077class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1078 MSA128W>; 1079class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1080 MSA128D>; 1081 1082class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1083 1084class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1085 1086class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1087 1088class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1089 1090class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>; 1091class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>; 1092class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>; 1093class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>; 1094 1095class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1096class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1097class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1098class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1099 1100class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1101class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1102class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1103class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1104 1105class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1106 1107class BSEL_V_DESC : MSA_VEC_DESC_BASE<"bsel.v", int_mips_bsel_v, MSA128B>; 1108 1109class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, MSA128B>; 1110 1111class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>; 1112class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>; 1113class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>; 1114class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>; 1115 1116class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1117class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1118class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1119class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1120 1121class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1122class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1123class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1124class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1125 1126class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1127 1128class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", int_mips_ceq_b, MSA128B>, 1129 IsCommutable; 1130class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", int_mips_ceq_h, MSA128H>, 1131 IsCommutable; 1132class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", int_mips_ceq_w, MSA128W>, 1133 IsCommutable; 1134class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", int_mips_ceq_d, MSA128D>, 1135 IsCommutable; 1136 1137class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", int_mips_ceqi_b, MSA128B>; 1138class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", int_mips_ceqi_h, MSA128H>; 1139class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", int_mips_ceqi_w, MSA128W>; 1140class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", int_mips_ceqi_d, MSA128D>; 1141 1142class CFCMSA_DESC { 1143 dag OutOperandList = (outs GPR32:$rd); 1144 dag InOperandList = (ins MSACtrl:$cs); 1145 string AsmString = "cfcmsa\t$rd, $cs"; 1146 InstrItinClass Itinerary = NoItinerary; 1147 bit hasSideEffects = 1; 1148} 1149 1150class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", int_mips_cle_s_b, MSA128B>; 1151class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", int_mips_cle_s_h, MSA128H>; 1152class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", int_mips_cle_s_w, MSA128W>; 1153class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", int_mips_cle_s_d, MSA128D>; 1154 1155class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", int_mips_cle_u_b, MSA128B>; 1156class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", int_mips_cle_u_h, MSA128H>; 1157class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", int_mips_cle_u_w, MSA128W>; 1158class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", int_mips_cle_u_d, MSA128D>; 1159 1160class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", int_mips_clei_s_b, 1161 MSA128B>; 1162class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", int_mips_clei_s_h, 1163 MSA128H>; 1164class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", int_mips_clei_s_w, 1165 MSA128W>; 1166class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", int_mips_clei_s_d, 1167 MSA128D>; 1168 1169class CLEI_U_B_DESC : MSA_SI5_DESC_BASE<"clei_u.b", int_mips_clei_u_b, 1170 MSA128B>; 1171class CLEI_U_H_DESC : MSA_SI5_DESC_BASE<"clei_u.h", int_mips_clei_u_h, 1172 MSA128H>; 1173class CLEI_U_W_DESC : MSA_SI5_DESC_BASE<"clei_u.w", int_mips_clei_u_w, 1174 MSA128W>; 1175class CLEI_U_D_DESC : MSA_SI5_DESC_BASE<"clei_u.d", int_mips_clei_u_d, 1176 MSA128D>; 1177 1178class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", int_mips_clt_s_b, MSA128B>; 1179class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", int_mips_clt_s_h, MSA128H>; 1180class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", int_mips_clt_s_w, MSA128W>; 1181class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", int_mips_clt_s_d, MSA128D>; 1182 1183class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", int_mips_clt_u_b, MSA128B>; 1184class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", int_mips_clt_u_h, MSA128H>; 1185class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", int_mips_clt_u_w, MSA128W>; 1186class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", int_mips_clt_u_d, MSA128D>; 1187 1188class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", int_mips_clti_s_b, 1189 MSA128B>; 1190class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", int_mips_clti_s_h, 1191 MSA128H>; 1192class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", int_mips_clti_s_w, 1193 MSA128W>; 1194class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", int_mips_clti_s_d, 1195 MSA128D>; 1196 1197class CLTI_U_B_DESC : MSA_SI5_DESC_BASE<"clti_u.b", int_mips_clti_u_b, 1198 MSA128B>; 1199class CLTI_U_H_DESC : MSA_SI5_DESC_BASE<"clti_u.h", int_mips_clti_u_h, 1200 MSA128H>; 1201class CLTI_U_W_DESC : MSA_SI5_DESC_BASE<"clti_u.w", int_mips_clti_u_w, 1202 MSA128W>; 1203class CLTI_U_D_DESC : MSA_SI5_DESC_BASE<"clti_u.d", int_mips_clti_u_d, 1204 MSA128D>; 1205 1206class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", int_mips_copy_s_b, 1207 GPR32, MSA128B>; 1208class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", int_mips_copy_s_h, 1209 GPR32, MSA128H>; 1210class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", int_mips_copy_s_w, 1211 GPR32, MSA128W>; 1212 1213class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", int_mips_copy_u_b, 1214 GPR32, MSA128B>; 1215class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", int_mips_copy_u_h, 1216 GPR32, MSA128H>; 1217class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", int_mips_copy_u_w, 1218 GPR32, MSA128W>; 1219 1220class CTCMSA_DESC { 1221 dag OutOperandList = (outs); 1222 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1223 string AsmString = "ctcmsa\t$cd, $rs"; 1224 InstrItinClass Itinerary = NoItinerary; 1225 bit hasSideEffects = 1; 1226} 1227 1228class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>; 1229class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>; 1230class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>; 1231class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>; 1232 1233class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>; 1234class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>; 1235class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>; 1236class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>; 1237 1238class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H, 1239 MSA128B, MSA128B>, IsCommutable; 1240class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W, 1241 MSA128H, MSA128H>, IsCommutable; 1242class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D, 1243 MSA128W, MSA128W>, IsCommutable; 1244 1245class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H, 1246 MSA128B, MSA128B>, IsCommutable; 1247class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W, 1248 MSA128H, MSA128H>, IsCommutable; 1249class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D, 1250 MSA128W, MSA128W>, IsCommutable; 1251 1252class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1253 MSA128H, MSA128B, MSA128B>, 1254 IsCommutable; 1255class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1256 MSA128W, MSA128H, MSA128H>, 1257 IsCommutable; 1258class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1259 MSA128D, MSA128W, MSA128W>, 1260 IsCommutable; 1261 1262class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1263 MSA128H, MSA128B, MSA128B>, 1264 IsCommutable; 1265class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1266 MSA128W, MSA128H, MSA128H>, 1267 IsCommutable; 1268class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1269 MSA128D, MSA128W, MSA128W>, 1270 IsCommutable; 1271 1272class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1273 MSA128H, MSA128B, MSA128B>; 1274class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1275 MSA128W, MSA128H, MSA128H>; 1276class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1277 MSA128D, MSA128W, MSA128W>; 1278 1279class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1280 MSA128H, MSA128B, MSA128B>; 1281class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1282 MSA128W, MSA128H, MSA128H>; 1283class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1284 MSA128D, MSA128W, MSA128W>; 1285 1286class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable; 1287class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable; 1288 1289class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>, 1290 IsCommutable; 1291class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>, 1292 IsCommutable; 1293 1294class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", int_mips_fceq_w, MSA128W>, 1295 IsCommutable; 1296class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", int_mips_fceq_d, MSA128D>, 1297 IsCommutable; 1298 1299class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1300 MSA128W>; 1301class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1302 MSA128D>; 1303 1304class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", int_mips_fcle_w, MSA128W>; 1305class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", int_mips_fcle_d, MSA128D>; 1306 1307class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", int_mips_fclt_w, MSA128W>; 1308class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", int_mips_fclt_d, MSA128D>; 1309 1310class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", int_mips_fcne_w, MSA128W>, 1311 IsCommutable; 1312class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", int_mips_fcne_d, MSA128D>, 1313 IsCommutable; 1314 1315class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", int_mips_fcor_w, MSA128W>, 1316 IsCommutable; 1317class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", int_mips_fcor_d, MSA128D>, 1318 IsCommutable; 1319 1320class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", int_mips_fcueq_w, MSA128W>, 1321 IsCommutable; 1322class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", int_mips_fcueq_d, MSA128D>, 1323 IsCommutable; 1324 1325class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", int_mips_fcule_w, MSA128W>, 1326 IsCommutable; 1327class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", int_mips_fcule_d, MSA128D>, 1328 IsCommutable; 1329 1330class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", int_mips_fcult_w, MSA128W>, 1331 IsCommutable; 1332class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", int_mips_fcult_d, MSA128D>, 1333 IsCommutable; 1334 1335class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", int_mips_fcun_w, MSA128W>, 1336 IsCommutable; 1337class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", int_mips_fcun_d, MSA128D>, 1338 IsCommutable; 1339 1340class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", int_mips_fcune_w, MSA128W>, 1341 IsCommutable; 1342class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", int_mips_fcune_d, MSA128D>, 1343 IsCommutable; 1344 1345class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>; 1346class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>; 1347 1348class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1349 MSA128H, MSA128W, MSA128W>; 1350class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1351 MSA128W, MSA128D, MSA128D>; 1352 1353class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>; 1354class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>; 1355 1356class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1357 MSA128W, MSA128H>; 1358class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1359 MSA128D, MSA128W>; 1360 1361class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1362 MSA128W, MSA128H>; 1363class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1364 MSA128D, MSA128W>; 1365 1366class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1367 MSA128W>; 1368class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1369 MSA128D>; 1370 1371class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1372 MSA128W>; 1373class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1374 MSA128D>; 1375 1376class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1377 MSA128W, MSA128H>; 1378class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1379 MSA128D, MSA128W>; 1380 1381class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1382 MSA128W, MSA128H>; 1383class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1384 MSA128D, MSA128W>; 1385 1386class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", int_mips_fill_b, 1387 MSA128B, GPR32>; 1388class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", int_mips_fill_h, 1389 MSA128H, GPR32>; 1390class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", int_mips_fill_w, 1391 MSA128W, GPR32>; 1392 1393class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>; 1394class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>; 1395 1396class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1397 MSA128W>; 1398class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1399 MSA128D>; 1400 1401class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>; 1402class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>; 1403 1404class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1405 MSA128W>; 1406class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1407 MSA128D>; 1408 1409class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>; 1410class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>; 1411 1412class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1413 MSA128W>; 1414class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1415 MSA128D>; 1416 1417class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1418 MSA128W>; 1419class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1420 MSA128D>; 1421 1422class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>; 1423class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>; 1424 1425class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>; 1426class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>; 1427 1428class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>; 1429class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>; 1430 1431class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1432 MSA128W>; 1433class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1434 MSA128D>; 1435 1436class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>; 1437class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>; 1438 1439class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>; 1440class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>; 1441 1442class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>; 1443class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>; 1444 1445class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>; 1446class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>; 1447 1448class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>; 1449class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>; 1450 1451class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>; 1452class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>; 1453 1454class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>; 1455class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>; 1456 1457class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>; 1458class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>; 1459 1460class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>; 1461class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>; 1462 1463class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>; 1464class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>; 1465 1466class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>; 1467class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>; 1468 1469class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>; 1470class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>; 1471 1472class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>; 1473class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>; 1474 1475class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1476 MSA128W>; 1477class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1478 MSA128D>; 1479 1480class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1481 MSA128W>; 1482class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1483 MSA128D>; 1484 1485class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1486 MSA128W>; 1487class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1488 MSA128D>; 1489 1490class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1491 MSA128W>; 1492class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1493 MSA128D>; 1494 1495class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1496 MSA128H, MSA128W, MSA128W>; 1497class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1498 MSA128W, MSA128D, MSA128D>; 1499 1500class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H, 1501 MSA128B, MSA128B>; 1502class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W, 1503 MSA128H, MSA128H>; 1504class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D, 1505 MSA128W, MSA128W>; 1506 1507class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H, 1508 MSA128B, MSA128B>; 1509class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W, 1510 MSA128H, MSA128H>; 1511class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D, 1512 MSA128W, MSA128W>; 1513 1514class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H, 1515 MSA128B, MSA128B>; 1516class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W, 1517 MSA128H, MSA128H>; 1518class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D, 1519 MSA128W, MSA128W>; 1520 1521class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H, 1522 MSA128B, MSA128B>; 1523class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W, 1524 MSA128H, MSA128H>; 1525class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D, 1526 MSA128W, MSA128W>; 1527 1528class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>; 1529class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>; 1530class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>; 1531class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>; 1532 1533class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>; 1534class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>; 1535class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>; 1536class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>; 1537 1538class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>; 1539class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>; 1540class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>; 1541class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>; 1542 1543class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>; 1544class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>; 1545class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>; 1546class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>; 1547 1548class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", int_mips_insert_b, 1549 MSA128B, GPR32>; 1550class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", int_mips_insert_h, 1551 MSA128H, GPR32>; 1552class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", int_mips_insert_w, 1553 MSA128W, GPR32>; 1554 1555class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1556class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1557class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1558class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1559 1560class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1561 ValueType TyNode, RegisterClass RCWD, 1562 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 1563 InstrItinClass itin = NoItinerary> { 1564 dag OutOperandList = (outs RCWD:$wd); 1565 dag InOperandList = (ins MemOpnd:$addr); 1566 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1567 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1568 InstrItinClass Itinerary = itin; 1569} 1570 1571class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1572class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1573class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1574class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1575 1576class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", int_mips_ldi_b, MSA128B>; 1577class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", int_mips_ldi_h, MSA128H>; 1578class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", int_mips_ldi_w, MSA128W>; 1579class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", int_mips_ldi_d, MSA128D>; 1580 1581class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1582 ValueType TyNode, RegisterClass RCWD, 1583 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1584 InstrItinClass itin = NoItinerary> { 1585 dag OutOperandList = (outs RCWD:$wd); 1586 dag InOperandList = (ins MemOpnd:$addr); 1587 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1588 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1589 InstrItinClass Itinerary = itin; 1590} 1591 1592class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1593class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1594class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1595class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1596 1597class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1598 MSA128H>; 1599class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1600 MSA128W>; 1601 1602class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1603 MSA128H>; 1604class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1605 MSA128W>; 1606 1607class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>; 1608class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>; 1609class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>; 1610class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>; 1611 1612class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>; 1613class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>; 1614class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>; 1615class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>; 1616 1617class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", int_mips_max_s_b, MSA128B>; 1618class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", int_mips_max_s_h, MSA128H>; 1619class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", int_mips_max_s_w, MSA128W>; 1620class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", int_mips_max_s_d, MSA128D>; 1621 1622class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", int_mips_max_u_b, MSA128B>; 1623class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", int_mips_max_u_h, MSA128H>; 1624class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", int_mips_max_u_w, MSA128W>; 1625class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", int_mips_max_u_d, MSA128D>; 1626 1627class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", int_mips_maxi_s_b, MSA128B>; 1628class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", int_mips_maxi_s_h, MSA128H>; 1629class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", int_mips_maxi_s_w, MSA128W>; 1630class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", int_mips_maxi_s_d, MSA128D>; 1631 1632class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", int_mips_maxi_u_b, MSA128B>; 1633class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", int_mips_maxi_u_h, MSA128H>; 1634class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", int_mips_maxi_u_w, MSA128W>; 1635class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", int_mips_maxi_u_d, MSA128D>; 1636 1637class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>; 1638class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>; 1639class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>; 1640class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>; 1641 1642class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", int_mips_min_s_b, MSA128B>; 1643class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", int_mips_min_s_h, MSA128H>; 1644class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", int_mips_min_s_w, MSA128W>; 1645class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", int_mips_min_s_d, MSA128D>; 1646 1647class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", int_mips_min_u_b, MSA128B>; 1648class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", int_mips_min_u_h, MSA128H>; 1649class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", int_mips_min_u_w, MSA128W>; 1650class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", int_mips_min_u_d, MSA128D>; 1651 1652class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", int_mips_mini_s_b, MSA128B>; 1653class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", int_mips_mini_s_h, MSA128H>; 1654class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", int_mips_mini_s_w, MSA128W>; 1655class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", int_mips_mini_s_d, MSA128D>; 1656 1657class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", int_mips_mini_u_b, MSA128B>; 1658class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", int_mips_mini_u_h, MSA128H>; 1659class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", int_mips_mini_u_w, MSA128W>; 1660class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", int_mips_mini_u_d, MSA128D>; 1661 1662class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>; 1663class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>; 1664class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>; 1665class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>; 1666 1667class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>; 1668class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>; 1669class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>; 1670class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>; 1671 1672class MOVE_V_DESC { 1673 dag OutOperandList = (outs MSA128B:$wd); 1674 dag InOperandList = (ins MSA128B:$ws); 1675 string AsmString = "move.v\t$wd, $ws"; 1676 list<dag> Pattern = []; 1677 InstrItinClass Itinerary = NoItinerary; 1678} 1679 1680class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 1681 MSA128H>; 1682class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 1683 MSA128W>; 1684 1685class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 1686 MSA128H>; 1687class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 1688 MSA128W>; 1689 1690class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>; 1691class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>; 1692class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>; 1693class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>; 1694 1695class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>; 1696class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>; 1697 1698class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 1699 MSA128H>; 1700class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 1701 MSA128W>; 1702 1703class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", int_mips_mulv_b, MSA128B>; 1704class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", int_mips_mulv_h, MSA128H>; 1705class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", int_mips_mulv_w, MSA128W>; 1706class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", int_mips_mulv_d, MSA128D>; 1707 1708class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 1709class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 1710class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 1711class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 1712 1713class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", int_mips_nlzc_b, MSA128B>; 1714class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", int_mips_nlzc_h, MSA128H>; 1715class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", int_mips_nlzc_w, MSA128W>; 1716class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", int_mips_nlzc_d, MSA128D>; 1717 1718class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", int_mips_nor_v, MSA128B>; 1719 1720class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, MSA128B>; 1721 1722class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", int_mips_or_v, MSA128B>; 1723 1724class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, MSA128B>; 1725 1726class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>; 1727class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>; 1728class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>; 1729class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>; 1730 1731class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>; 1732class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>; 1733class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>; 1734class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>; 1735 1736class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", int_mips_pcnt_b, MSA128B>; 1737class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", int_mips_pcnt_h, MSA128H>; 1738class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", int_mips_pcnt_w, MSA128W>; 1739class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", int_mips_pcnt_d, MSA128D>; 1740 1741class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 1742class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 1743class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 1744class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 1745 1746class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 1747class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 1748class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 1749class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 1750 1751class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>; 1752class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>; 1753class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>; 1754 1755class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>; 1756class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>; 1757class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>; 1758class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>; 1759 1760class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 1761class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 1762class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 1763class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 1764 1765class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", int_mips_sll_b, MSA128B>; 1766class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", int_mips_sll_h, MSA128H>; 1767class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", int_mips_sll_w, MSA128W>; 1768class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", int_mips_sll_d, MSA128D>; 1769 1770class SLLI_B_DESC : MSA_BIT_B_DESC_BASE<"slli.b", int_mips_slli_b, MSA128B>; 1771class SLLI_H_DESC : MSA_BIT_H_DESC_BASE<"slli.h", int_mips_slli_h, MSA128H>; 1772class SLLI_W_DESC : MSA_BIT_W_DESC_BASE<"slli.w", int_mips_slli_w, MSA128W>; 1773class SLLI_D_DESC : MSA_BIT_D_DESC_BASE<"slli.d", int_mips_slli_d, MSA128D>; 1774 1775class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B, 1776 MSA128B, GPR32>; 1777class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H, 1778 MSA128H, GPR32>; 1779class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W, 1780 MSA128W, GPR32>; 1781class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D, 1782 MSA128D, GPR32>; 1783 1784class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b, 1785 MSA128B>; 1786class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h, 1787 MSA128H>; 1788class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w, 1789 MSA128W>; 1790class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d, 1791 MSA128D>; 1792 1793class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", int_mips_sra_b, MSA128B>; 1794class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", int_mips_sra_h, MSA128H>; 1795class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", int_mips_sra_w, MSA128W>; 1796class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", int_mips_sra_d, MSA128D>; 1797 1798class SRAI_B_DESC : MSA_BIT_B_DESC_BASE<"srai.b", int_mips_srai_b, MSA128B>; 1799class SRAI_H_DESC : MSA_BIT_H_DESC_BASE<"srai.h", int_mips_srai_h, MSA128H>; 1800class SRAI_W_DESC : MSA_BIT_W_DESC_BASE<"srai.w", int_mips_srai_w, MSA128W>; 1801class SRAI_D_DESC : MSA_BIT_D_DESC_BASE<"srai.d", int_mips_srai_d, MSA128D>; 1802 1803class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>; 1804class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>; 1805class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>; 1806class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>; 1807 1808class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 1809class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 1810class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 1811class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 1812 1813class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", int_mips_srl_b, MSA128B>; 1814class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", int_mips_srl_h, MSA128H>; 1815class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", int_mips_srl_w, MSA128W>; 1816class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", int_mips_srl_d, MSA128D>; 1817 1818class SRLI_B_DESC : MSA_BIT_B_DESC_BASE<"srli.b", int_mips_srli_b, MSA128B>; 1819class SRLI_H_DESC : MSA_BIT_H_DESC_BASE<"srli.h", int_mips_srli_h, MSA128H>; 1820class SRLI_W_DESC : MSA_BIT_W_DESC_BASE<"srli.w", int_mips_srli_w, MSA128W>; 1821class SRLI_D_DESC : MSA_BIT_D_DESC_BASE<"srli.d", int_mips_srli_d, MSA128D>; 1822 1823class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>; 1824class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>; 1825class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>; 1826class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>; 1827 1828class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 1829class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 1830class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 1831class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 1832 1833class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1834 ValueType TyNode, RegisterClass RCWD, 1835 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 1836 InstrItinClass itin = NoItinerary> { 1837 dag OutOperandList = (outs); 1838 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 1839 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1840 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 1841 InstrItinClass Itinerary = itin; 1842} 1843 1844class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 1845class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 1846class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 1847class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 1848 1849class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1850 ValueType TyNode, RegisterClass RCWD, 1851 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1852 InstrItinClass itin = NoItinerary> { 1853 dag OutOperandList = (outs); 1854 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 1855 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1856 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 1857 InstrItinClass Itinerary = itin; 1858} 1859 1860class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 1861class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 1862class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 1863class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 1864 1865class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>; 1866class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>; 1867class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>; 1868class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>; 1869 1870class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>; 1871class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>; 1872class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>; 1873class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>; 1874 1875class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 1876 MSA128B>; 1877class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 1878 MSA128H>; 1879class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 1880 MSA128W>; 1881class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 1882 MSA128D>; 1883 1884class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 1885 MSA128B>; 1886class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 1887 MSA128H>; 1888class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 1889 MSA128W>; 1890class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 1891 MSA128D>; 1892 1893class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", int_mips_subv_b, MSA128B>; 1894class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", int_mips_subv_h, MSA128H>; 1895class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", int_mips_subv_w, MSA128W>; 1896class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", int_mips_subv_d, MSA128D>; 1897 1898class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", int_mips_subvi_b, MSA128B>; 1899class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", int_mips_subvi_h, MSA128H>; 1900class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", int_mips_subvi_w, MSA128W>; 1901class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", int_mips_subvi_d, MSA128D>; 1902 1903class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>; 1904class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>; 1905class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>; 1906class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>; 1907 1908class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", int_mips_xor_v, MSA128B>; 1909 1910class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, MSA128B>; 1911 1912// Instruction defs. 1913def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 1914def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 1915def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 1916def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 1917 1918def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 1919def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 1920def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 1921def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 1922 1923def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 1924def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 1925def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 1926def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 1927 1928def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 1929def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 1930def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 1931def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 1932 1933def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 1934def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 1935def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 1936def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 1937 1938def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 1939def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 1940def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 1941def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 1942 1943def AND_V : AND_V_ENC, AND_V_DESC; 1944 1945def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 1946 1947def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 1948def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 1949def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 1950def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 1951 1952def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 1953def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 1954def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 1955def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 1956 1957def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 1958def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 1959def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 1960def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 1961 1962def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 1963def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 1964def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 1965def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 1966 1967def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 1968def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 1969def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 1970def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 1971 1972def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 1973def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 1974def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 1975def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 1976 1977def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 1978def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 1979def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 1980def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 1981 1982def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 1983def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 1984def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 1985def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 1986 1987def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 1988def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 1989def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 1990def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 1991 1992def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 1993def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 1994def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 1995def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 1996 1997def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 1998def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 1999def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2000def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2001 2002def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2003def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2004def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2005def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2006 2007def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2008 2009def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2010 2011def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2012 2013def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2014 2015def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2016def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2017def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2018def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2019 2020def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2021def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2022def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2023def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2024 2025def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2026def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2027def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2028def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2029 2030def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2031 2032def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2033 2034def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2035 2036def BSET_B : BSET_B_ENC, BSET_B_DESC; 2037def BSET_H : BSET_H_ENC, BSET_H_DESC; 2038def BSET_W : BSET_W_ENC, BSET_W_DESC; 2039def BSET_D : BSET_D_ENC, BSET_D_DESC; 2040 2041def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2042def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2043def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2044def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2045 2046def BZ_B : BZ_B_ENC, BZ_B_DESC; 2047def BZ_H : BZ_H_ENC, BZ_H_DESC; 2048def BZ_W : BZ_W_ENC, BZ_W_DESC; 2049def BZ_D : BZ_D_ENC, BZ_D_DESC; 2050 2051def BZ_V : BZ_V_ENC, BZ_V_DESC; 2052 2053def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2054def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2055def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2056def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2057 2058def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2059def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2060def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2061def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2062 2063def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2064 2065def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2066def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2067def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2068def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2069 2070def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2071def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2072def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2073def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2074 2075def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2076def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2077def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2078def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2079 2080def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2081def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2082def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2083def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2084 2085def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2086def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2087def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2088def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2089 2090def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2091def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2092def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2093def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2094 2095def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2096def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2097def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2098def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2099 2100def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2101def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2102def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2103def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2104 2105def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2106def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2107def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2108 2109def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2110def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2111def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2112 2113def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2114 2115def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2116def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2117def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2118def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2119 2120def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2121def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2122def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2123def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2124 2125def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2126def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2127def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2128 2129def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2130def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2131def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2132 2133def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2134def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2135def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2136 2137def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2138def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2139def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2140 2141def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2142def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2143def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2144 2145def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2146def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2147def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2148 2149def FADD_W : FADD_W_ENC, FADD_W_DESC; 2150def FADD_D : FADD_D_ENC, FADD_D_DESC; 2151 2152def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2153def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2154 2155def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2156def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2157 2158def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2159def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2160 2161def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2162def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2163 2164def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2165def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2166 2167def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2168def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2169 2170def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2171def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2172 2173def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2174def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2175 2176def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2177def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2178 2179def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2180def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2181 2182def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2183def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2184 2185def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2186def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2187 2188def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2189def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2190 2191def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2192def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2193 2194def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2195def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2196 2197def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2198def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2199 2200def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2201def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2202 2203def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2204def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2205 2206def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2207def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2208 2209def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2210def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2211 2212def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2213def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2214 2215def FILL_B : FILL_B_ENC, FILL_B_DESC; 2216def FILL_H : FILL_H_ENC, FILL_H_DESC; 2217def FILL_W : FILL_W_ENC, FILL_W_DESC; 2218 2219def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2220def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2221 2222def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2223def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2224 2225def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2226def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2227 2228def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2229def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2230 2231def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2232def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2233 2234def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2235def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2236 2237def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2238def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2239 2240def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2241def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2242 2243def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2244def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2245 2246def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2247def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2248 2249def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2250def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2251 2252def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2253def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2254 2255def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2256def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2257 2258def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2259def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2260 2261def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2262def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2263 2264def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2265def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2266 2267def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2268def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2269 2270def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2271def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2272 2273def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2274def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2275 2276def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2277def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2278 2279def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2280def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2281 2282def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2283def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2284 2285def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2286def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2287 2288def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2289def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2290 2291def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2292def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2293 2294def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2295def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2296 2297def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2298def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2299 2300def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2301def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2302 2303def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2304def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2305 2306def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2307def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2308def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2309 2310def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2311def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2312def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2313 2314def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2315def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2316def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2317 2318def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2319def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2320def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2321 2322def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2323def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2324def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2325def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2326 2327def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2328def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2329def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2330def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2331 2332def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2333def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2334def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2335def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2336 2337def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2338def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2339def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2340def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2341 2342def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2343def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2344def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2345 2346def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2347def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2348def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2349def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2350 2351def LD_B: LD_B_ENC, LD_B_DESC; 2352def LD_H: LD_H_ENC, LD_H_DESC; 2353def LD_W: LD_W_ENC, LD_W_DESC; 2354def LD_D: LD_D_ENC, LD_D_DESC; 2355 2356def LDI_B : LDI_B_ENC, LDI_B_DESC; 2357def LDI_H : LDI_H_ENC, LDI_H_DESC; 2358def LDI_W : LDI_W_ENC, LDI_W_DESC; 2359 2360def LDX_B: LDX_B_ENC, LDX_B_DESC; 2361def LDX_H: LDX_H_ENC, LDX_H_DESC; 2362def LDX_W: LDX_W_ENC, LDX_W_DESC; 2363def LDX_D: LDX_D_ENC, LDX_D_DESC; 2364 2365def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2366def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2367 2368def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2369def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2370 2371def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2372def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2373def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2374def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2375 2376def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2377def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2378def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2379def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2380 2381def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2382def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2383def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2384def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2385 2386def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2387def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2388def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2389def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2390 2391def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2392def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2393def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2394def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2395 2396def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2397def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2398def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2399def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2400 2401def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2402def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2403def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2404def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2405 2406def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2407def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2408def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2409def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2410 2411def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2412def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2413def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2414def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2415 2416def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2417def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2418def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2419def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2420 2421def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2422def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2423def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2424def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2425 2426def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2427def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2428def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2429def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2430 2431def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2432def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2433def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2434def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2435 2436def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2437 2438def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2439def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2440 2441def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2442def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2443 2444def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2445def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2446def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2447def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2448 2449def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2450def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2451 2452def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2453def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2454 2455def MULV_B : MULV_B_ENC, MULV_B_DESC; 2456def MULV_H : MULV_H_ENC, MULV_H_DESC; 2457def MULV_W : MULV_W_ENC, MULV_W_DESC; 2458def MULV_D : MULV_D_ENC, MULV_D_DESC; 2459 2460def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2461def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2462def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2463def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2464 2465def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2466def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2467def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2468def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2469 2470def NOR_V : NOR_V_ENC, NOR_V_DESC; 2471 2472def NORI_B : NORI_B_ENC, NORI_B_DESC; 2473 2474def OR_V : OR_V_ENC, OR_V_DESC; 2475 2476def ORI_B : ORI_B_ENC, ORI_B_DESC; 2477 2478def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2479def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2480def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2481def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2482 2483def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2484def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2485def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2486def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2487 2488def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2489def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2490def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2491def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2492 2493def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2494def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2495def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2496def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2497 2498def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2499def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2500def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2501def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2502 2503def SHF_B : SHF_B_ENC, SHF_B_DESC; 2504def SHF_H : SHF_H_ENC, SHF_H_DESC; 2505def SHF_W : SHF_W_ENC, SHF_W_DESC; 2506 2507def SLD_B : SLD_B_ENC, SLD_B_DESC; 2508def SLD_H : SLD_H_ENC, SLD_H_DESC; 2509def SLD_W : SLD_W_ENC, SLD_W_DESC; 2510def SLD_D : SLD_D_ENC, SLD_D_DESC; 2511 2512def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 2513def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 2514def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 2515def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 2516 2517def SLL_B : SLL_B_ENC, SLL_B_DESC; 2518def SLL_H : SLL_H_ENC, SLL_H_DESC; 2519def SLL_W : SLL_W_ENC, SLL_W_DESC; 2520def SLL_D : SLL_D_ENC, SLL_D_DESC; 2521 2522def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 2523def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 2524def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 2525def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 2526 2527def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 2528def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 2529def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 2530def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 2531 2532def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 2533def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 2534def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 2535def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 2536 2537def SRA_B : SRA_B_ENC, SRA_B_DESC; 2538def SRA_H : SRA_H_ENC, SRA_H_DESC; 2539def SRA_W : SRA_W_ENC, SRA_W_DESC; 2540def SRA_D : SRA_D_ENC, SRA_D_DESC; 2541 2542def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 2543def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 2544def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 2545def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 2546 2547def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 2548def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 2549def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 2550def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 2551 2552def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 2553def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 2554def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 2555def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 2556 2557def SRL_B : SRL_B_ENC, SRL_B_DESC; 2558def SRL_H : SRL_H_ENC, SRL_H_DESC; 2559def SRL_W : SRL_W_ENC, SRL_W_DESC; 2560def SRL_D : SRL_D_ENC, SRL_D_DESC; 2561 2562def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 2563def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 2564def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 2565def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 2566 2567def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 2568def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 2569def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 2570def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 2571 2572def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 2573def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 2574def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 2575def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 2576 2577def ST_B: ST_B_ENC, ST_B_DESC; 2578def ST_H: ST_H_ENC, ST_H_DESC; 2579def ST_W: ST_W_ENC, ST_W_DESC; 2580def ST_D: ST_D_ENC, ST_D_DESC; 2581 2582def STX_B: STX_B_ENC, STX_B_DESC; 2583def STX_H: STX_H_ENC, STX_H_DESC; 2584def STX_W: STX_W_ENC, STX_W_DESC; 2585def STX_D: STX_D_ENC, STX_D_DESC; 2586 2587def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 2588def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 2589def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 2590def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 2591 2592def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 2593def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 2594def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 2595def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 2596 2597def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 2598def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 2599def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 2600def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 2601 2602def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 2603def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 2604def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 2605def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 2606 2607def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 2608def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 2609def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 2610def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 2611 2612def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 2613def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 2614def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 2615def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 2616 2617def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 2618def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 2619def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 2620def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 2621 2622def XOR_V : XOR_V_ENC, XOR_V_DESC; 2623 2624def XORI_B : XORI_B_ENC, XORI_B_DESC; 2625 2626// Patterns. 2627class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 2628 Pat<pattern, result>, Requires<pred>; 2629 2630def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 2631def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 2632def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 2633def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 2634def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 2635def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 2636def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 2637 2638def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 2639def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 2640def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 2641 2642def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 2643 (ST_B MSA128B:$ws, addr:$addr)>; 2644def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 2645 (ST_H MSA128H:$ws, addr:$addr)>; 2646def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 2647 (ST_W MSA128W:$ws, addr:$addr)>; 2648def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 2649 (ST_D MSA128D:$ws, addr:$addr)>; 2650def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 2651 (ST_H MSA128H:$ws, addr:$addr)>; 2652def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 2653 (ST_W MSA128W:$ws, addr:$addr)>; 2654def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 2655 (ST_D MSA128D:$ws, addr:$addr)>; 2656 2657def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 2658 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 2659def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 2660 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 2661def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 2662 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 2663 2664class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 2665 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 2666 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2667 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 2668 2669// These are endian-independant because the element size doesnt change 2670def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 2671def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 2672def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 2673def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 2674def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 2675def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 2676 2677// Little endian bitcasts are always no-ops 2678def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 2679def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 2680def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 2681def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 2682def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 2683def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 2684 2685def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 2686def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 2687def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 2688def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 2689def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 2690 2691def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 2692def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 2693def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 2694def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 2695def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 2696 2697def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 2698def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 2699def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 2700def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 2701def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 2702 2703def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 2704def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 2705def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 2706def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 2707def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 2708 2709def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 2710def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 2711def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 2712def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 2713def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 2714 2715// Big endian bitcasts expand to shuffle instructions. 2716// This is because bitcast is defined to be a store/load sequence and the 2717// vector store/load instructions are mixed-endian with respect to the vector 2718// as a whole (little endian with respect to element order, but big endian 2719// elements). 2720 2721class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 2722 RegisterClass DstRC, MSAInst Insn, 2723 RegisterClass ViaRC> : 2724 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2725 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 2726 DstRC), 2727 [HasMSA, IsBE]>; 2728 2729class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 2730 RegisterClass DstRC, MSAInst Insn, 2731 RegisterClass ViaRC> : 2732 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2733 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 2734 DstRC), 2735 [HasMSA, IsBE]>; 2736 2737class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 2738 RegisterClass DstRC> : 2739 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 2740 2741class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 2742 RegisterClass DstRC> : 2743 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 2744 2745class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 2746 RegisterClass DstRC> : 2747 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2748 (COPY_TO_REGCLASS 2749 (SHF_W 2750 (COPY_TO_REGCLASS 2751 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 2752 MSA128W), 177), 2753 DstRC), 2754 [HasMSA, IsBE]>; 2755 2756class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 2757 RegisterClass DstRC> : 2758 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 2759 2760class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 2761 RegisterClass DstRC> : 2762 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 2763 2764class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 2765 RegisterClass DstRC> : 2766 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 2767 2768def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 2769def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 2770def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 2771def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 2772def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 2773def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 2774 2775def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 2776def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 2777def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 2778def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 2779def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 2780 2781def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 2782def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 2783def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 2784def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 2785def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 2786 2787def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 2788def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 2789def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 2790def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 2791def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 2792 2793def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 2794def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 2795def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 2796def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 2797def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 2798 2799def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 2800def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 2801def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 2802def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 2803def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 2804 2805def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 2806def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 2807def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 2808def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 2809def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 2810 2811// Pseudos used to implement BNZ.df, and BZ.df 2812 2813class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 2814 RegisterClass RCWS, 2815 InstrItinClass itin = NoItinerary> : 2816 MipsPseudo<(outs GPR32:$dst), 2817 (ins RCWS:$ws), 2818 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 2819 bit usesCustomInserter = 1; 2820} 2821 2822def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 2823 MSA128B, NoItinerary>; 2824def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 2825 MSA128H, NoItinerary>; 2826def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 2827 MSA128W, NoItinerary>; 2828def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 2829 MSA128D, NoItinerary>; 2830def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 2831 MSA128B, NoItinerary>; 2832 2833def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 2834 MSA128B, NoItinerary>; 2835def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 2836 MSA128H, NoItinerary>; 2837def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 2838 MSA128W, NoItinerary>; 2839def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 2840 MSA128D, NoItinerary>; 2841def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 2842 MSA128B, NoItinerary>; 2843