MipsMSAInstrInfo.td revision 6ff1ef9931b50763a40e9ae8696cfab9e25cf4de
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm2 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm3 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm4 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def uimm8 : Operand<i32> { 77 let PrintMethod = "printUnsignedImm"; 78} 79 80def simm5 : Operand<i32>; 81 82def simm10 : Operand<i32>; 83 84def vsplat_uimm1 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm2 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm8"; 90} 91 92def vsplat_uimm3 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm4 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm5 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm6 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_uimm8 : Operand<vAny> { 109 let PrintMethod = "printUnsignedImm"; 110} 111 112def vsplat_simm5 : Operand<vAny>; 113 114def vsplat_simm10 : Operand<vAny>; 115 116def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>; 117 118// Pattern fragments 119def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 120 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 121def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 122 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 123def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 124 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 125 126def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 127 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 128def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 129 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 130def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 131 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 132 133def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 134 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 135def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 136 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 137def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 138 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 139 140class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 141 PatFrag<(ops node:$lhs, node:$rhs), 142 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 143 144// ISD::SETFALSE cannot occur 145def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 146def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 147def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 148def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 149def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 150def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 151def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 152def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 153def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 154def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 155def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 156def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 157def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 158def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 159def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 160def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 161def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 162def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 163def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 164def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 165def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 166def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 167def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 168def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 169def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 170def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 171def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 172def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 173// ISD::SETTRUE cannot occur 174// ISD::SETFALSE2 cannot occur 175// ISD::SETTRUE2 cannot occur 176 177class vsetcc_type<ValueType ResTy, CondCode CC> : 178 PatFrag<(ops node:$lhs, node:$rhs), 179 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 180 181def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 182def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 183def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 184def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 185def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 186def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 187def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 188def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 189def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 190def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 191def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 192def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 193def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 194def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 195def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 196def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 197def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 198def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 199def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 200def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 201 202def vsplati8 : PatFrag<(ops node:$e0), 203 (v16i8 (build_vector node:$e0, node:$e0, 204 node:$e0, node:$e0, 205 node:$e0, node:$e0, 206 node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0, 210 node:$e0, node:$e0))>; 211def vsplati16 : PatFrag<(ops node:$e0), 212 (v8i16 (build_vector node:$e0, node:$e0, 213 node:$e0, node:$e0, 214 node:$e0, node:$e0, 215 node:$e0, node:$e0))>; 216def vsplati32 : PatFrag<(ops node:$e0), 217 (v4i32 (build_vector node:$e0, node:$e0, 218 node:$e0, node:$e0))>; 219def vsplati64 : PatFrag<(ops node:$e0), 220 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 221def vsplatf32 : PatFrag<(ops node:$e0), 222 (v4f32 (build_vector node:$e0, node:$e0, 223 node:$e0, node:$e0))>; 224def vsplatf64 : PatFrag<(ops node:$e0), 225 (v2f64 (build_vector node:$e0, node:$e0))>; 226 227def vsplati8_elt : PatFrag<(ops node:$v, node:$i), 228 (MipsVSHF (vsplati8 node:$i), node:$v, node:$v)>; 229def vsplati16_elt : PatFrag<(ops node:$v, node:$i), 230 (MipsVSHF (vsplati16 node:$i), node:$v, node:$v)>; 231def vsplati32_elt : PatFrag<(ops node:$v, node:$i), 232 (MipsVSHF (vsplati32 node:$i), node:$v, node:$v)>; 233def vsplati64_elt : PatFrag<(ops node:$v, node:$i), 234 (MipsVSHF (vsplati64 node:$i), node:$v, node:$v)>; 235 236class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 237 SDNodeXForm xform = NOOP_SDNodeXForm> 238 : PatLeaf<frag, pred, xform> { 239 Operand OpClass = opclass; 240} 241 242class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 243 list<SDNode> roots = [], 244 list<SDNodeProperty> props = []> : 245 ComplexPattern<ty, numops, fn, roots, props> { 246 Operand OpClass = opclass; 247} 248 249def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 250 "selectVSplatUimm3", 251 [build_vector, bitconvert]>; 252 253def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 254 "selectVSplatUimm4", 255 [build_vector, bitconvert]>; 256 257def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 258 "selectVSplatUimm5", 259 [build_vector, bitconvert]>; 260 261def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 262 "selectVSplatUimm8", 263 [build_vector, bitconvert]>; 264 265def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 266 "selectVSplatSimm5", 267 [build_vector, bitconvert]>; 268 269def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 270 "selectVSplatUimm3", 271 [build_vector, bitconvert]>; 272 273def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 274 "selectVSplatUimm4", 275 [build_vector, bitconvert]>; 276 277def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 278 "selectVSplatUimm5", 279 [build_vector, bitconvert]>; 280 281def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 282 "selectVSplatSimm5", 283 [build_vector, bitconvert]>; 284 285def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 286 "selectVSplatUimm2", 287 [build_vector, bitconvert]>; 288 289def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 290 "selectVSplatUimm5", 291 [build_vector, bitconvert]>; 292 293def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 294 "selectVSplatSimm5", 295 [build_vector, bitconvert]>; 296 297def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 298 "selectVSplatUimm1", 299 [build_vector, bitconvert]>; 300 301def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 302 "selectVSplatUimm5", 303 [build_vector, bitconvert]>; 304 305def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 306 "selectVSplatUimm6", 307 [build_vector, bitconvert]>; 308 309def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 310 "selectVSplatSimm5", 311 [build_vector, bitconvert]>; 312 313// Any build_vector that is a constant splat with a value that is an exact 314// power of 2 315def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 316 [build_vector, bitconvert]>; 317 318// Any build_vector that is a constant splat with only a consecutive sequence 319// of left-most bits set. 320def vsplat_maskl_bits : SplatComplexPattern<vsplat_uimm8, vAny, 1, 321 "selectVSplatMaskL", 322 [build_vector, bitconvert]>; 323 324// Any build_vector that is a constant splat with only a consecutive sequence 325// of right-most bits set. 326def vsplat_maskr_bits : SplatComplexPattern<vsplat_uimm8, vAny, 1, 327 "selectVSplatMaskR", 328 [build_vector, bitconvert]>; 329 330def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt), 331 (fsub node:$wd, (fmul node:$ws, node:$wt))>; 332 333def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt), 334 (add node:$wd, (mul node:$ws, node:$wt))>; 335 336def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt), 337 (sub node:$wd, (mul node:$ws, node:$wt))>; 338 339def mul_fexp2 : PatFrag<(ops node:$ws, node:$wt), 340 (fmul node:$ws, (fexp2 node:$wt))>; 341 342// Immediates 343def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 344def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 345 346// Instruction encoding. 347class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 348class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 349class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 350class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 351 352class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 353class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 354class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 355class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 356 357class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 358class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 359class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 360class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 361 362class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 363class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 364class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 365class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 366 367class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 368class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 369class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 370class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 371 372class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 373class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 374class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 375class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 376 377class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 378 379class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 380 381class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 382class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 383class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 384class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 385 386class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 387class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 388class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 389class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 390 391class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 392class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 393class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 394class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 395 396class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 397class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 398class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 399class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 400 401class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 402class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 403class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 404class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 405 406class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 407class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 408class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 409class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 410 411class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 412class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 413class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 414class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 415 416class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 417class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 418class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 419class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 420 421class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 422class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 423class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 424class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 425 426class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 427class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 428class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 429class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 430 431class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 432class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 433class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 434class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 435 436class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 437class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 438class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 439class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 440 441class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 442 443class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 444 445class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 446 447class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 448 449class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 450class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 451class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 452class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 453 454class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 455class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 456class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 457class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 458 459class BNZ_B_ENC : MSA_CBRANCH_FMT<0b111, 0b00>; 460class BNZ_H_ENC : MSA_CBRANCH_FMT<0b111, 0b01>; 461class BNZ_W_ENC : MSA_CBRANCH_FMT<0b111, 0b10>; 462class BNZ_D_ENC : MSA_CBRANCH_FMT<0b111, 0b11>; 463 464class BNZ_V_ENC : MSA_CBRANCH_V_FMT<0b01000>; 465 466class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>; 467 468class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 469 470class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 471class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 472class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 473class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 474 475class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 476class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 477class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 478class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 479 480class BZ_B_ENC : MSA_CBRANCH_FMT<0b110, 0b00>; 481class BZ_H_ENC : MSA_CBRANCH_FMT<0b110, 0b01>; 482class BZ_W_ENC : MSA_CBRANCH_FMT<0b110, 0b10>; 483class BZ_D_ENC : MSA_CBRANCH_FMT<0b110, 0b11>; 484 485class BZ_V_ENC : MSA_CBRANCH_V_FMT<0b01011>; 486 487class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 488class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 489class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 490class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 491 492class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 493class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 494class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 495class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 496 497class CFCMSA_ENC : MSA_ELM_CFCMSA_FMT<0b0001111110, 0b011001>; 498 499class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 500class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 501class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 502class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 503 504class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 505class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 506class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 507class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 508 509class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 510class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 511class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 512class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 513 514class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 515class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 516class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 517class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 518 519class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 520class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 521class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 522class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 523 524class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 525class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 526class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 527class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 528 529class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 530class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 531class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 532class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 533 534class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 535class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 536class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 537class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 538 539class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>; 540class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>; 541class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>; 542 543class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; 544class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; 545class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; 546 547class CTCMSA_ENC : MSA_ELM_CTCMSA_FMT<0b0000111110, 0b011001>; 548 549class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 550class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 551class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 552class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 553 554class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 555class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 556class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 557class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 558 559class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 560class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 561class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 562 563class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 564class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 565class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 566 567class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 568class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 569class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 570 571class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 572class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 573class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 574 575class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 576class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 577class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 578 579class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 580class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 581class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 582 583class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 584class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 585 586class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 587class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 588 589class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 590class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 591 592class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 593class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 594 595class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 596class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 597 598class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 599class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 600 601class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 602class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 603 604class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 605class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 606 607class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 608class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 609 610class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 611class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 612 613class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 614class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 615 616class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 617class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 618 619class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 620class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 621 622class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 623class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 624 625class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 626class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 627 628class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 629class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 630 631class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 632class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 633 634class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 635class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 636 637class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 638class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 639 640class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 641class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 642 643class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 644class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 645 646class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 647class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 648 649class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 650class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 651class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 652 653class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 654class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 655 656class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 657class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 658 659class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 660class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 661 662class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 663class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 664 665class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 666class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 667 668class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 669class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 670 671class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 672class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 673 674class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 675class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 676 677class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 678class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 679 680class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 681class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 682 683class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 684class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 685 686class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 687class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 688 689class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 690class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 691 692class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 693class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 694 695class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 696class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 697 698class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 699class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 700 701class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 702class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 703 704class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 705class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 706 707class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 708class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 709 710class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 711class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 712 713class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 714class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 715 716class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 717class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 718 719class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 720class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 721 722class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 723class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 724 725class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 726class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 727 728class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 729class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 730 731class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 732class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 733 734class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 735class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 736 737class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 738class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 739 740class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 741class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 742class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 743 744class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 745class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 746class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 747 748class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 749class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 750class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 751 752class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 753class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 754class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 755 756class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 757class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 758class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 759class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 760 761class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 762class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 763class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 764class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 765 766class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 767class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 768class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 769class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 770 771class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 772class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 773class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 774class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 775 776class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>; 777class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>; 778class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>; 779 780class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 781class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 782class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 783class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 784 785class LD_B_ENC : MSA_MI10_FMT<0b00, 0b1000>; 786class LD_H_ENC : MSA_MI10_FMT<0b01, 0b1000>; 787class LD_W_ENC : MSA_MI10_FMT<0b10, 0b1000>; 788class LD_D_ENC : MSA_MI10_FMT<0b11, 0b1000>; 789 790class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 791class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 792class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 793class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 794 795class LSA_ENC : SPECIAL_LSA_FMT<0b000101>; 796 797class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 798class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 799 800class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 801class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 802 803class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 804class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 805class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 806class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 807 808class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 809class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 810class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 811class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 812 813class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 814class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 815class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 816class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 817 818class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 819class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 820class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 821class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 822 823class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 824class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 825class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 826class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 827 828class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 829class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 830class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 831class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 832 833class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 834class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 835class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 836class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 837 838class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 839class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 840class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 841class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 842 843class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 844class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 845class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 846class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 847 848class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 849class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 850class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 851class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 852 853class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 854class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 855class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 856class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 857 858class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 859class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 860class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 861class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 862 863class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 864class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 865class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 866class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 867 868class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 869 870class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 871class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 872 873class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 874class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 875 876class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 877class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 878class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 879class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 880 881class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 882class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 883 884class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 885class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 886 887class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 888class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 889class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 890class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 891 892class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 893class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 894class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 895class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 896 897class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 898class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 899class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 900class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 901 902class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 903 904class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 905 906class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 907 908class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 909 910class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 911class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 912class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 913class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 914 915class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 916class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 917class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 918class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 919 920class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 921class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 922class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 923class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 924 925class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 926class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 927class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 928class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 929 930class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 931class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 932class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 933class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 934 935class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 936class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 937class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 938 939class SLD_B_ENC : MSA_3R_INDEX_FMT<0b000, 0b00, 0b010100>; 940class SLD_H_ENC : MSA_3R_INDEX_FMT<0b000, 0b01, 0b010100>; 941class SLD_W_ENC : MSA_3R_INDEX_FMT<0b000, 0b10, 0b010100>; 942class SLD_D_ENC : MSA_3R_INDEX_FMT<0b000, 0b11, 0b010100>; 943 944class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 945class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 946class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 947class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 948 949class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 950class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 951class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 952class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 953 954class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 955class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 956class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 957class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 958 959class SPLAT_B_ENC : MSA_3R_INDEX_FMT<0b001, 0b00, 0b010100>; 960class SPLAT_H_ENC : MSA_3R_INDEX_FMT<0b001, 0b01, 0b010100>; 961class SPLAT_W_ENC : MSA_3R_INDEX_FMT<0b001, 0b10, 0b010100>; 962class SPLAT_D_ENC : MSA_3R_INDEX_FMT<0b001, 0b11, 0b010100>; 963 964class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 965class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 966class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 967class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 968 969class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 970class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 971class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 972class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 973 974class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 975class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 976class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 977class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 978 979class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 980class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 981class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 982class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 983 984class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 985class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 986class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 987class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 988 989class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 990class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 991class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 992class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 993 994class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 995class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 996class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 997class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 998 999class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 1000class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 1001class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 1002class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 1003 1004class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 1005class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 1006class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 1007class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 1008 1009class ST_B_ENC : MSA_MI10_FMT<0b00, 0b1001>; 1010class ST_H_ENC : MSA_MI10_FMT<0b01, 0b1001>; 1011class ST_W_ENC : MSA_MI10_FMT<0b10, 0b1001>; 1012class ST_D_ENC : MSA_MI10_FMT<0b11, 0b1001>; 1013 1014class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 1015class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 1016class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 1017class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 1018 1019class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 1020class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 1021class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 1022class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 1023 1024class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 1025class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 1026class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 1027class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 1028 1029class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 1030class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 1031class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 1032class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 1033 1034class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 1035class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1036class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1037class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1038 1039class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1040class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1041class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1042class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1043 1044class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1045class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1046class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1047class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1048 1049class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1050 1051class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1052 1053// Instruction desc. 1054class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1055 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1056 InstrItinClass itin = NoItinerary> { 1057 dag OutOperandList = (outs ROWD:$wd); 1058 dag InOperandList = (ins ROWS:$ws, uimm3:$m); 1059 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1060 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))]; 1061 InstrItinClass Itinerary = itin; 1062} 1063 1064class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1065 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1066 InstrItinClass itin = NoItinerary> { 1067 dag OutOperandList = (outs ROWD:$wd); 1068 dag InOperandList = (ins ROWS:$ws, uimm4:$m); 1069 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1070 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))]; 1071 InstrItinClass Itinerary = itin; 1072} 1073 1074class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1075 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1076 InstrItinClass itin = NoItinerary> { 1077 dag OutOperandList = (outs ROWD:$wd); 1078 dag InOperandList = (ins ROWS:$ws, uimm5:$m); 1079 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1080 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))]; 1081 InstrItinClass Itinerary = itin; 1082} 1083 1084class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1085 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1086 InstrItinClass itin = NoItinerary> { 1087 dag OutOperandList = (outs ROWD:$wd); 1088 dag InOperandList = (ins ROWS:$ws, uimm6:$m); 1089 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1090 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))]; 1091 InstrItinClass Itinerary = itin; 1092} 1093 1094class MSA_BIT_BINSXI_DESC_BASE<string instr_asm, ValueType Ty, 1095 ComplexPattern Mask, RegisterOperand ROWD, 1096 RegisterOperand ROWS = ROWD, 1097 InstrItinClass itin = NoItinerary> { 1098 dag OutOperandList = (outs ROWD:$wd); 1099 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, vsplat_uimm8:$m); 1100 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1101 list<dag> Pattern = [(set ROWD:$wd, (vselect (Ty Mask:$m), (Ty ROWD:$wd_in), 1102 ROWS:$ws))]; 1103 InstrItinClass Itinerary = itin; 1104 string Constraints = "$wd = $wd_in"; 1105} 1106 1107class MSA_BIT_BINSLI_DESC_BASE<string instr_asm, ValueType Ty, 1108 RegisterOperand ROWD, 1109 RegisterOperand ROWS = ROWD, 1110 InstrItinClass itin = NoItinerary> : 1111 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, vsplat_maskl_bits, ROWD, ROWS, itin>; 1112 1113class MSA_BIT_BINSRI_DESC_BASE<string instr_asm, ValueType Ty, 1114 RegisterOperand ROWD, 1115 RegisterOperand ROWS = ROWD, 1116 InstrItinClass itin = NoItinerary> : 1117 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, vsplat_maskr_bits, ROWD, ROWS, itin>; 1118 1119class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1120 SplatComplexPattern SplatImm, 1121 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1122 InstrItinClass itin = NoItinerary> { 1123 dag OutOperandList = (outs ROWD:$wd); 1124 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m); 1125 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1126 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))]; 1127 InstrItinClass Itinerary = itin; 1128} 1129 1130class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1131 ValueType VecTy, RegisterOperand ROD, 1132 RegisterOperand ROWS, 1133 InstrItinClass itin = NoItinerary> { 1134 dag OutOperandList = (outs ROD:$rd); 1135 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1136 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1137 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))]; 1138 InstrItinClass Itinerary = itin; 1139} 1140 1141class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1142 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1143 InstrItinClass itin = NoItinerary> { 1144 dag OutOperandList = (outs ROWD:$wd); 1145 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1146 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1147 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))]; 1148 InstrItinClass Itinerary = itin; 1149} 1150 1151class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1152 RegisterClass RCD, RegisterClass RCWS> : 1153 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1154 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1155 bit usesCustomInserter = 1; 1156} 1157 1158class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1159 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1160 RegisterOperand ROWS = ROWD, 1161 InstrItinClass itin = NoItinerary> { 1162 dag OutOperandList = (outs ROWD:$wd); 1163 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1164 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1165 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1166 InstrItinClass Itinerary = itin; 1167} 1168 1169class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1170 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1171 RegisterOperand ROWS = ROWD, 1172 InstrItinClass itin = NoItinerary> { 1173 dag OutOperandList = (outs ROWD:$wd); 1174 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1175 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1176 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1177 InstrItinClass Itinerary = itin; 1178} 1179 1180// This class is deprecated and will be removed in the next few patches 1181class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1182 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1183 InstrItinClass itin = NoItinerary> { 1184 dag OutOperandList = (outs ROWD:$wd); 1185 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1186 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1187 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1188 InstrItinClass Itinerary = itin; 1189} 1190 1191class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1192 RegisterOperand ROWS = ROWD, 1193 InstrItinClass itin = NoItinerary> { 1194 dag OutOperandList = (outs ROWD:$wd); 1195 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1196 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1197 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1198 InstrItinClass Itinerary = itin; 1199} 1200 1201class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1202 InstrItinClass itin = NoItinerary> { 1203 dag OutOperandList = (outs ROWD:$wd); 1204 dag InOperandList = (ins vsplat_simm10:$s10); 1205 string AsmString = !strconcat(instr_asm, "\t$wd, $s10"); 1206 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1207 list<dag> Pattern = []; 1208 bit hasSideEffects = 0; 1209 InstrItinClass Itinerary = itin; 1210} 1211 1212class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1213 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1214 InstrItinClass itin = NoItinerary> { 1215 dag OutOperandList = (outs ROWD:$wd); 1216 dag InOperandList = (ins ROWS:$ws); 1217 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1218 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1219 InstrItinClass Itinerary = itin; 1220} 1221 1222class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1223 SDPatternOperator OpNode, RegisterOperand ROWD, 1224 RegisterOperand ROS = ROWD, 1225 InstrItinClass itin = NoItinerary> { 1226 dag OutOperandList = (outs ROWD:$wd); 1227 dag InOperandList = (ins ROS:$rs); 1228 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1229 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))]; 1230 InstrItinClass Itinerary = itin; 1231} 1232 1233class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode, 1234 RegisterClass RCWD, RegisterClass RCWS = RCWD> : 1235 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs), 1236 [(set RCWD:$wd, (OpNode RCWS:$fs))]> { 1237 let usesCustomInserter = 1; 1238} 1239 1240class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1241 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1242 InstrItinClass itin = NoItinerary> { 1243 dag OutOperandList = (outs ROWD:$wd); 1244 dag InOperandList = (ins ROWS:$ws); 1245 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1246 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1247 InstrItinClass Itinerary = itin; 1248} 1249 1250class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1251 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1252 RegisterOperand ROWT = ROWD, 1253 InstrItinClass itin = NoItinerary> { 1254 dag OutOperandList = (outs ROWD:$wd); 1255 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1256 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1257 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1258 InstrItinClass Itinerary = itin; 1259} 1260 1261class MSA_3R_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1262 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1263 InstrItinClass itin = NoItinerary> { 1264 dag OutOperandList = (outs ROWD:$wd); 1265 dag InOperandList = (ins ROWS:$ws, GPR32:$rt); 1266 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]"); 1267 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, GPR32:$rt))]; 1268 InstrItinClass Itinerary = itin; 1269} 1270 1271class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1272 RegisterOperand ROWS = ROWD, 1273 RegisterOperand ROWT = ROWD, 1274 InstrItinClass itin = NoItinerary> { 1275 dag OutOperandList = (outs ROWD:$wd); 1276 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1277 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1278 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1279 ROWT:$wt))]; 1280 string Constraints = "$wd = $wd_in"; 1281 InstrItinClass Itinerary = itin; 1282} 1283 1284class MSA_3R_SLD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1285 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1286 InstrItinClass itin = NoItinerary> { 1287 dag OutOperandList = (outs ROWD:$wd); 1288 dag InOperandList = (ins ROWS:$ws, GPR32:$rt); 1289 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]"); 1290 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, GPR32:$rt))]; 1291 InstrItinClass Itinerary = itin; 1292} 1293 1294class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1295 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1296 RegisterOperand ROWT = ROWD, 1297 InstrItinClass itin = NoItinerary> { 1298 dag OutOperandList = (outs ROWD:$wd); 1299 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1300 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1301 list<dag> Pattern = [(set ROWD:$wd, 1302 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1303 InstrItinClass Itinerary = itin; 1304 string Constraints = "$wd = $wd_in"; 1305} 1306 1307class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1308 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1309 RegisterOperand ROWT = ROWD, 1310 InstrItinClass itin = NoItinerary> : 1311 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1312 1313class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1314 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1315 RegisterOperand ROWT = ROWD, 1316 InstrItinClass itin = NoItinerary> : 1317 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1318 1319class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterOperand ROWD> { 1320 dag OutOperandList = (outs); 1321 dag InOperandList = (ins ROWD:$wt, brtarget:$offset); 1322 string AsmString = !strconcat(instr_asm, "\t$wt, $offset"); 1323 list<dag> Pattern = []; 1324 InstrItinClass Itinerary = IIBranch; 1325 bit isBranch = 1; 1326 bit isTerminator = 1; 1327 bit hasDelaySlot = 1; 1328 list<Register> Defs = [AT]; 1329} 1330 1331class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1332 RegisterOperand ROWD, RegisterOperand ROS, 1333 InstrItinClass itin = NoItinerary> { 1334 dag OutOperandList = (outs ROWD:$wd); 1335 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n); 1336 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1337 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1338 ROS:$rs, 1339 immZExt6:$n))]; 1340 InstrItinClass Itinerary = itin; 1341 string Constraints = "$wd = $wd_in"; 1342} 1343 1344class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1345 RegisterOperand ROWD, RegisterOperand ROFS> : 1346 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs), 1347 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs, 1348 immZExt6:$n))]> { 1349 bit usesCustomInserter = 1; 1350 string Constraints = "$wd = $wd_in"; 1351} 1352 1353class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1354 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1355 InstrItinClass itin = NoItinerary> { 1356 dag OutOperandList = (outs ROWD:$wd); 1357 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws); 1358 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1359 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1360 immZExt6:$n, 1361 ROWS:$ws))]; 1362 InstrItinClass Itinerary = itin; 1363 string Constraints = "$wd = $wd_in"; 1364} 1365 1366class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1367 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1368 RegisterOperand ROWT = ROWD, 1369 InstrItinClass itin = NoItinerary> { 1370 dag OutOperandList = (outs ROWD:$wd); 1371 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1372 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1373 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1374 InstrItinClass Itinerary = itin; 1375} 1376 1377class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1378 RegisterOperand ROWD, 1379 RegisterOperand ROWS = ROWD, 1380 InstrItinClass itin = NoItinerary> { 1381 dag OutOperandList = (outs ROWD:$wd); 1382 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n); 1383 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1384 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws, 1385 ROWS:$ws))]; 1386 InstrItinClass Itinerary = itin; 1387} 1388 1389class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD, 1390 RegisterOperand ROWS = ROWD, 1391 RegisterOperand ROWT = ROWD> : 1392 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt), 1393 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>; 1394 1395class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1396 IsCommutable; 1397class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1398 IsCommutable; 1399class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1400 IsCommutable; 1401class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1402 IsCommutable; 1403 1404class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1405 MSA128BOpnd>, IsCommutable; 1406class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1407 MSA128HOpnd>, IsCommutable; 1408class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1409 MSA128WOpnd>, IsCommutable; 1410class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1411 MSA128DOpnd>, IsCommutable; 1412 1413class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1414 MSA128BOpnd>, IsCommutable; 1415class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1416 MSA128HOpnd>, IsCommutable; 1417class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1418 MSA128WOpnd>, IsCommutable; 1419class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1420 MSA128DOpnd>, IsCommutable; 1421 1422class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1423 MSA128BOpnd>, IsCommutable; 1424class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1425 MSA128HOpnd>, IsCommutable; 1426class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1427 MSA128WOpnd>, IsCommutable; 1428class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1429 MSA128DOpnd>, IsCommutable; 1430 1431class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1432class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1433class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1434class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1435 1436class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1437 MSA128BOpnd>; 1438class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1439 MSA128HOpnd>; 1440class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1441 MSA128WOpnd>; 1442class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1443 MSA128DOpnd>; 1444 1445class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>; 1446class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>; 1447class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>; 1448class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>; 1449 1450class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1451 MSA128BOpnd>; 1452 1453class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1454 MSA128BOpnd>; 1455class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1456 MSA128HOpnd>; 1457class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1458 MSA128WOpnd>; 1459class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1460 MSA128DOpnd>; 1461 1462class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1463 MSA128BOpnd>; 1464class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1465 MSA128HOpnd>; 1466class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1467 MSA128WOpnd>; 1468class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1469 MSA128DOpnd>; 1470 1471class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1472 IsCommutable; 1473class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1474 IsCommutable; 1475class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1476 IsCommutable; 1477class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1478 IsCommutable; 1479 1480class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1481 IsCommutable; 1482class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1483 IsCommutable; 1484class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1485 IsCommutable; 1486class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1487 IsCommutable; 1488 1489class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1490 MSA128BOpnd>, IsCommutable; 1491class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1492 MSA128HOpnd>, IsCommutable; 1493class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1494 MSA128WOpnd>, IsCommutable; 1495class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1496 MSA128DOpnd>, IsCommutable; 1497 1498class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1499 MSA128BOpnd>, IsCommutable; 1500class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1501 MSA128HOpnd>, IsCommutable; 1502class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1503 MSA128WOpnd>, IsCommutable; 1504class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1505 MSA128DOpnd>, IsCommutable; 1506 1507class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1508class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1509class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1510class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1511 1512class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, 1513 MSA128BOpnd>; 1514class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, 1515 MSA128HOpnd>; 1516class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, 1517 MSA128WOpnd>; 1518class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, 1519 MSA128DOpnd>; 1520 1521class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1522class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1523class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1524class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1525 1526class BINSLI_B_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.b", v16i8, MSA128BOpnd>; 1527class BINSLI_H_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.h", v8i16, MSA128HOpnd>; 1528class BINSLI_W_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.w", v4i32, MSA128WOpnd>; 1529class BINSLI_D_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.d", v2i64, MSA128DOpnd>; 1530 1531class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1532class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1533class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1534class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1535 1536class BINSRI_B_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.b", v16i8, MSA128BOpnd>; 1537class BINSRI_H_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.h", v8i16, MSA128HOpnd>; 1538class BINSRI_W_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.w", v4i32, MSA128WOpnd>; 1539class BINSRI_D_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.d", v2i64, MSA128DOpnd>; 1540 1541class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>; 1542 1543class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, 1544 MSA128BOpnd>; 1545 1546class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>; 1547 1548class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>; 1549 1550class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1551class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1552class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1553class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1554 1555class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, 1556 MSA128BOpnd>; 1557class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, 1558 MSA128HOpnd>; 1559class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, 1560 MSA128WOpnd>; 1561class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, 1562 MSA128DOpnd>; 1563 1564class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128BOpnd>; 1565class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128HOpnd>; 1566class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128WOpnd>; 1567class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128DOpnd>; 1568 1569class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128BOpnd>; 1570 1571class BSEL_V_DESC { 1572 dag OutOperandList = (outs MSA128BOpnd:$wd); 1573 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1574 MSA128BOpnd:$wt); 1575 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1576 list<dag> Pattern = [(set MSA128BOpnd:$wd, 1577 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1578 MSA128BOpnd:$wt))]; 1579 InstrItinClass Itinerary = NoItinerary; 1580 string Constraints = "$wd = $wd_in"; 1581} 1582 1583class BSELI_B_DESC { 1584 dag OutOperandList = (outs MSA128BOpnd:$wd); 1585 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1586 vsplat_uimm8:$u8); 1587 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1588 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1589 MSA128BOpnd:$ws, 1590 vsplati8_uimm8:$u8))]; 1591 InstrItinClass Itinerary = NoItinerary; 1592 string Constraints = "$wd = $wd_in"; 1593} 1594 1595class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1596class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1597class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1598class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1599 1600class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, 1601 MSA128BOpnd>; 1602class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, 1603 MSA128HOpnd>; 1604class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, 1605 MSA128WOpnd>; 1606class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, 1607 MSA128DOpnd>; 1608 1609class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128BOpnd>; 1610class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128HOpnd>; 1611class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128WOpnd>; 1612class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128DOpnd>; 1613 1614class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128BOpnd>; 1615 1616class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1617 IsCommutable; 1618class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1619 IsCommutable; 1620class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1621 IsCommutable; 1622class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1623 IsCommutable; 1624 1625class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1626 MSA128BOpnd>; 1627class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1628 MSA128HOpnd>; 1629class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1630 MSA128WOpnd>; 1631class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1632 MSA128DOpnd>; 1633 1634class CFCMSA_DESC { 1635 dag OutOperandList = (outs GPR32Opnd:$rd); 1636 dag InOperandList = (ins MSA128CROpnd:$cs); 1637 string AsmString = "cfcmsa\t$rd, $cs"; 1638 InstrItinClass Itinerary = NoItinerary; 1639 bit hasSideEffects = 1; 1640} 1641 1642class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1643class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1644class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1645class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1646 1647class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1648class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1649class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1650class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1651 1652class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1653 vsplati8_simm5, MSA128BOpnd>; 1654class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1655 vsplati16_simm5, MSA128HOpnd>; 1656class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1657 vsplati32_simm5, MSA128WOpnd>; 1658class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1659 vsplati64_simm5, MSA128DOpnd>; 1660 1661class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1662 vsplati8_uimm5, MSA128BOpnd>; 1663class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1664 vsplati16_uimm5, MSA128HOpnd>; 1665class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1666 vsplati32_uimm5, MSA128WOpnd>; 1667class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1668 vsplati64_uimm5, MSA128DOpnd>; 1669 1670class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1671class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1672class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1673class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1674 1675class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1676class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1677class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1678class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1679 1680class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1681 vsplati8_simm5, MSA128BOpnd>; 1682class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1683 vsplati16_simm5, MSA128HOpnd>; 1684class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1685 vsplati32_simm5, MSA128WOpnd>; 1686class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1687 vsplati64_simm5, MSA128DOpnd>; 1688 1689class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1690 vsplati8_uimm5, MSA128BOpnd>; 1691class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1692 vsplati16_uimm5, MSA128HOpnd>; 1693class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1694 vsplati32_uimm5, MSA128WOpnd>; 1695class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1696 vsplati64_uimm5, MSA128DOpnd>; 1697 1698class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1699 GPR32Opnd, MSA128BOpnd>; 1700class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1701 GPR32Opnd, MSA128HOpnd>; 1702class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1703 GPR32Opnd, MSA128WOpnd>; 1704 1705class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1706 GPR32Opnd, MSA128BOpnd>; 1707class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1708 GPR32Opnd, MSA128HOpnd>; 1709class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1710 GPR32Opnd, MSA128WOpnd>; 1711 1712class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1713 MSA128W>; 1714class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1715 MSA128D>; 1716 1717class CTCMSA_DESC { 1718 dag OutOperandList = (outs); 1719 dag InOperandList = (ins MSA128CROpnd:$cd, GPR32Opnd:$rs); 1720 string AsmString = "ctcmsa\t$cd, $rs"; 1721 InstrItinClass Itinerary = NoItinerary; 1722 bit hasSideEffects = 1; 1723} 1724 1725class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1726class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1727class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1728class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1729 1730class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1731class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1732class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1733class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1734 1735class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1736 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1737 IsCommutable; 1738class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1739 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1740 IsCommutable; 1741class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1742 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1743 IsCommutable; 1744 1745class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1746 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1747 IsCommutable; 1748class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1749 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1750 IsCommutable; 1751class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1752 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1753 IsCommutable; 1754 1755class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1756 MSA128HOpnd, MSA128BOpnd, 1757 MSA128BOpnd>, IsCommutable; 1758class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1759 MSA128WOpnd, MSA128HOpnd, 1760 MSA128HOpnd>, IsCommutable; 1761class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1762 MSA128DOpnd, MSA128WOpnd, 1763 MSA128WOpnd>, IsCommutable; 1764 1765class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1766 MSA128HOpnd, MSA128BOpnd, 1767 MSA128BOpnd>, IsCommutable; 1768class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1769 MSA128WOpnd, MSA128HOpnd, 1770 MSA128HOpnd>, IsCommutable; 1771class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1772 MSA128DOpnd, MSA128WOpnd, 1773 MSA128WOpnd>, IsCommutable; 1774 1775class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1776 MSA128HOpnd, MSA128BOpnd, 1777 MSA128BOpnd>; 1778class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1779 MSA128WOpnd, MSA128HOpnd, 1780 MSA128HOpnd>; 1781class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1782 MSA128DOpnd, MSA128WOpnd, 1783 MSA128WOpnd>; 1784 1785class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1786 MSA128HOpnd, MSA128BOpnd, 1787 MSA128BOpnd>; 1788class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1789 MSA128WOpnd, MSA128HOpnd, 1790 MSA128HOpnd>; 1791class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1792 MSA128DOpnd, MSA128WOpnd, 1793 MSA128WOpnd>; 1794 1795class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1796 IsCommutable; 1797class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1798 IsCommutable; 1799 1800class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1801 IsCommutable; 1802class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1803 IsCommutable; 1804 1805class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1806 IsCommutable; 1807class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1808 IsCommutable; 1809 1810class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1811 MSA128WOpnd>; 1812class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1813 MSA128DOpnd>; 1814 1815class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1816class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1817 1818class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1819class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1820 1821class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1822 IsCommutable; 1823class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1824 IsCommutable; 1825 1826class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1827 IsCommutable; 1828class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1829 IsCommutable; 1830 1831class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1832 IsCommutable; 1833class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1834 IsCommutable; 1835 1836class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1837 IsCommutable; 1838class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1839 IsCommutable; 1840 1841class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1842 IsCommutable; 1843class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1844 IsCommutable; 1845 1846class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1847 IsCommutable; 1848class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1849 IsCommutable; 1850 1851class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1852 IsCommutable; 1853class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1854 IsCommutable; 1855 1856class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1857class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1858 1859class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1860 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1861class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1862 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1863 1864// The fexp2.df instruction multiplies the first operand by 2 to the power of 1865// the second operand. We therefore need a pseudo-insn in order to invent the 1866// 1.0 when we only need to match ISD::FEXP2. 1867class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", mul_fexp2, MSA128WOpnd>; 1868class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", mul_fexp2, MSA128DOpnd>; 1869let usesCustomInserter = 1 in { 1870 class FEXP2_W_1_PSEUDO_DESC : 1871 MipsPseudo<(outs MSA128W:$wd), (ins MSA128W:$ws), 1872 [(set MSA128W:$wd, (fexp2 MSA128W:$ws))]>; 1873 class FEXP2_D_1_PSEUDO_DESC : 1874 MipsPseudo<(outs MSA128D:$wd), (ins MSA128D:$ws), 1875 [(set MSA128D:$wd, (fexp2 MSA128D:$ws))]>; 1876} 1877 1878class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1879 MSA128WOpnd, MSA128HOpnd>; 1880class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1881 MSA128DOpnd, MSA128WOpnd>; 1882 1883class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1884 MSA128WOpnd, MSA128HOpnd>; 1885class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1886 MSA128DOpnd, MSA128WOpnd>; 1887 1888class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 1889class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 1890 1891class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 1892class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 1893 1894class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1895 MSA128WOpnd, MSA128HOpnd>; 1896class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1897 MSA128DOpnd, MSA128WOpnd>; 1898 1899class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1900 MSA128WOpnd, MSA128HOpnd>; 1901class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1902 MSA128DOpnd, MSA128WOpnd>; 1903 1904class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 1905 MSA128BOpnd, GPR32Opnd>; 1906class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 1907 MSA128HOpnd, GPR32Opnd>; 1908class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 1909 MSA128WOpnd, GPR32Opnd>; 1910 1911class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W, 1912 FGR32>; 1913class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D, 1914 FGR64>; 1915 1916class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1917class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1918 1919class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 1920class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 1921 1922class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1923class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1924 1925class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1926 MSA128WOpnd>; 1927class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1928 MSA128DOpnd>; 1929 1930class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1931class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1932 1933class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1934 MSA128WOpnd>; 1935class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1936 MSA128DOpnd>; 1937 1938class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>; 1939class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>; 1940 1941class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1942class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1943 1944class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1945class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1946 1947class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1948class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1949 1950class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1951 MSA128WOpnd>; 1952class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1953 MSA128DOpnd>; 1954 1955class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1956class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1957 1958class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1959class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1960 1961class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1962class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1963 1964class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1965class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1966 1967class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1968class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1969 1970class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1971class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1972 1973class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1974class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1975 1976class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1977class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1978 1979class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1980 MSA128WOpnd>; 1981class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1982 MSA128DOpnd>; 1983 1984class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1985 MSA128WOpnd>; 1986class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1987 MSA128DOpnd>; 1988 1989class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1990 MSA128WOpnd>; 1991class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1992 MSA128DOpnd>; 1993 1994class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1995 MSA128WOpnd>; 1996class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1997 MSA128DOpnd>; 1998 1999class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 2000 MSA128WOpnd>; 2001class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 2002 MSA128DOpnd>; 2003 2004class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 2005 MSA128WOpnd>; 2006class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 2007 MSA128DOpnd>; 2008 2009class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 2010 MSA128WOpnd>; 2011class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 2012 MSA128DOpnd>; 2013 2014class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 2015 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 2016class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 2017 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 2018 2019class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 2020 MSA128WOpnd>; 2021class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 2022 MSA128DOpnd>; 2023 2024class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 2025 MSA128WOpnd>; 2026class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 2027 MSA128DOpnd>; 2028 2029class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 2030 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2031class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 2032 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2033class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 2034 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2035 2036class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 2037 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2038class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 2039 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2040class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 2041 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2042 2043class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 2044 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2045class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 2046 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2047class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 2048 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2049 2050class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 2051 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2052class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 2053 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2054class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 2055 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2056 2057class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 2058class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 2059class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 2060class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 2061 2062class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 2063class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 2064class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 2065class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 2066 2067class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 2068class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 2069class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 2070class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 2071 2072class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 2073class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 2074class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 2075class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 2076 2077class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, 2078 MSA128BOpnd, GPR32Opnd>; 2079class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, 2080 MSA128HOpnd, GPR32Opnd>; 2081class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, 2082 MSA128WOpnd, GPR32Opnd>; 2083 2084class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 2085 MSA128WOpnd, FGR32Opnd>; 2086class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 2087 MSA128DOpnd, FGR64Opnd>; 2088 2089class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, 2090 MSA128BOpnd>; 2091class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, 2092 MSA128HOpnd>; 2093class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, 2094 MSA128WOpnd>; 2095class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, 2096 MSA128DOpnd>; 2097 2098class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2099 ValueType TyNode, RegisterOperand ROWD, 2100 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 2101 InstrItinClass itin = NoItinerary> { 2102 dag OutOperandList = (outs ROWD:$wd); 2103 dag InOperandList = (ins MemOpnd:$addr); 2104 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2105 list<dag> Pattern = [(set ROWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2106 InstrItinClass Itinerary = itin; 2107 string DecoderMethod = "DecodeMSA128Mem"; 2108} 2109 2110class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128BOpnd>; 2111class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128HOpnd>; 2112class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128WOpnd>; 2113class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128DOpnd>; 2114 2115class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128BOpnd>; 2116class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128HOpnd>; 2117class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128WOpnd>; 2118class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128DOpnd>; 2119 2120class LSA_DESC { 2121 dag OutOperandList = (outs GPR32Opnd:$rd); 2122 dag InOperandList = (ins GPR32Opnd:$rs, GPR32Opnd:$rt, uimm2:$sa); 2123 string AsmString = "lsa\t$rd, $rs, $rt, $sa"; 2124 list<dag> Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rs, 2125 (shl GPR32Opnd:$rt, 2126 immZExt2Lsa:$sa)))]; 2127 InstrItinClass Itinerary = NoItinerary; 2128} 2129 2130class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2131 MSA128HOpnd>; 2132class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2133 MSA128WOpnd>; 2134 2135class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2136 MSA128HOpnd>; 2137class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2138 MSA128WOpnd>; 2139 2140class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>; 2141class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>; 2142class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>; 2143class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>; 2144 2145class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2146class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2147class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2148class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2149 2150class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2151class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2152class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2153class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2154 2155class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2156class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2157class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2158class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2159 2160class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2161 MSA128BOpnd>; 2162class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2163 MSA128HOpnd>; 2164class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2165 MSA128WOpnd>; 2166class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2167 MSA128DOpnd>; 2168 2169class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2170 MSA128BOpnd>; 2171class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2172 MSA128HOpnd>; 2173class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2174 MSA128WOpnd>; 2175class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2176 MSA128DOpnd>; 2177 2178class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2179class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2180class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2181class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2182 2183class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2184class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2185class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2186class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2187 2188class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2189class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2190class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2191class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2192 2193class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2194 MSA128BOpnd>; 2195class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2196 MSA128HOpnd>; 2197class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2198 MSA128WOpnd>; 2199class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2200 MSA128DOpnd>; 2201 2202class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2203 MSA128BOpnd>; 2204class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2205 MSA128HOpnd>; 2206class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2207 MSA128WOpnd>; 2208class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2209 MSA128DOpnd>; 2210 2211class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2212class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2213class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2214class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2215 2216class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2217class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2218class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2219class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2220 2221class MOVE_V_DESC { 2222 dag OutOperandList = (outs MSA128BOpnd:$wd); 2223 dag InOperandList = (ins MSA128BOpnd:$ws); 2224 string AsmString = "move.v\t$wd, $ws"; 2225 list<dag> Pattern = []; 2226 InstrItinClass Itinerary = NoItinerary; 2227} 2228 2229class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2230 MSA128HOpnd>; 2231class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2232 MSA128WOpnd>; 2233 2234class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2235 MSA128HOpnd>; 2236class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2237 MSA128WOpnd>; 2238 2239class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>; 2240class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>; 2241class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>; 2242class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>; 2243 2244class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2245 MSA128HOpnd>; 2246class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2247 MSA128WOpnd>; 2248 2249class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2250 MSA128HOpnd>; 2251class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2252 MSA128WOpnd>; 2253 2254class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2255class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2256class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2257class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2258 2259class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2260class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2261class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2262class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2263 2264class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2265class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2266class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2267class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2268 2269class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>; 2270class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>; 2271class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>; 2272class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>; 2273 2274class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2275 MSA128BOpnd>; 2276 2277class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>; 2278class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>; 2279class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>; 2280class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>; 2281 2282class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2283 2284class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2285class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2286class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2287class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2288 2289class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2290class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2291class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2292class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2293 2294class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2295class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2296class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2297class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2298 2299class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, 2300 MSA128BOpnd>; 2301class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, 2302 MSA128HOpnd>; 2303class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, 2304 MSA128WOpnd>; 2305class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, 2306 MSA128DOpnd>; 2307 2308class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, 2309 MSA128BOpnd>; 2310class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, 2311 MSA128HOpnd>; 2312class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, 2313 MSA128WOpnd>; 2314class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, 2315 MSA128DOpnd>; 2316 2317class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2318class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2319class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2320 2321class SLD_B_DESC : MSA_3R_SLD_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2322class SLD_H_DESC : MSA_3R_SLD_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2323class SLD_W_DESC : MSA_3R_SLD_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2324class SLD_D_DESC : MSA_3R_SLD_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2325 2326class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>; 2327class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>; 2328class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>; 2329class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>; 2330 2331class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2332class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2333class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2334class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2335 2336class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2337 MSA128BOpnd>; 2338class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2339 MSA128HOpnd>; 2340class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2341 MSA128WOpnd>; 2342class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2343 MSA128DOpnd>; 2344 2345class SPLAT_B_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.b", vsplati8_elt, 2346 MSA128BOpnd>; 2347class SPLAT_H_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.h", vsplati16_elt, 2348 MSA128HOpnd>; 2349class SPLAT_W_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.w", vsplati32_elt, 2350 MSA128WOpnd>; 2351class SPLAT_D_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.d", vsplati64_elt, 2352 MSA128DOpnd>; 2353 2354class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2355 MSA128BOpnd>; 2356class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2357 MSA128HOpnd>; 2358class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2359 MSA128WOpnd>; 2360class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2361 MSA128DOpnd>; 2362 2363class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2364class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2365class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2366class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2367 2368class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2369 MSA128BOpnd>; 2370class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2371 MSA128HOpnd>; 2372class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2373 MSA128WOpnd>; 2374class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2375 MSA128DOpnd>; 2376 2377class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2378class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2379class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2380class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2381 2382class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, 2383 MSA128BOpnd>; 2384class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, 2385 MSA128HOpnd>; 2386class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, 2387 MSA128WOpnd>; 2388class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, 2389 MSA128DOpnd>; 2390 2391class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2392class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2393class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2394class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2395 2396class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2397 MSA128BOpnd>; 2398class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2399 MSA128HOpnd>; 2400class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2401 MSA128WOpnd>; 2402class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2403 MSA128DOpnd>; 2404 2405class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2406class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2407class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2408class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2409 2410class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, 2411 MSA128BOpnd>; 2412class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, 2413 MSA128HOpnd>; 2414class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, 2415 MSA128WOpnd>; 2416class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, 2417 MSA128DOpnd>; 2418 2419class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2420 ValueType TyNode, RegisterOperand ROWD, 2421 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 2422 InstrItinClass itin = NoItinerary> { 2423 dag OutOperandList = (outs); 2424 dag InOperandList = (ins ROWD:$wd, MemOpnd:$addr); 2425 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2426 list<dag> Pattern = [(OpNode (TyNode ROWD:$wd), Addr:$addr)]; 2427 InstrItinClass Itinerary = itin; 2428 string DecoderMethod = "DecodeMSA128Mem"; 2429} 2430 2431class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128BOpnd>; 2432class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128HOpnd>; 2433class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128WOpnd>; 2434class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128DOpnd>; 2435 2436class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2437 MSA128BOpnd>; 2438class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2439 MSA128HOpnd>; 2440class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2441 MSA128WOpnd>; 2442class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2443 MSA128DOpnd>; 2444 2445class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2446 MSA128BOpnd>; 2447class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2448 MSA128HOpnd>; 2449class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2450 MSA128WOpnd>; 2451class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2452 MSA128DOpnd>; 2453 2454class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2455 MSA128BOpnd>; 2456class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2457 MSA128HOpnd>; 2458class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2459 MSA128WOpnd>; 2460class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2461 MSA128DOpnd>; 2462 2463class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2464 MSA128BOpnd>; 2465class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2466 MSA128HOpnd>; 2467class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2468 MSA128WOpnd>; 2469class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2470 MSA128DOpnd>; 2471 2472class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2473class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2474class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2475class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2476 2477class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2478 MSA128BOpnd>; 2479class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2480 MSA128HOpnd>; 2481class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2482 MSA128WOpnd>; 2483class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2484 MSA128DOpnd>; 2485 2486class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2487class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2488class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2489class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2490 2491class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>; 2492class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>; 2493class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>; 2494class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>; 2495 2496class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2497 MSA128BOpnd>; 2498 2499// Instruction defs. 2500def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2501def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2502def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2503def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2504 2505def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2506def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2507def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2508def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2509 2510def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2511def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2512def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2513def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2514 2515def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2516def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2517def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2518def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2519 2520def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2521def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2522def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2523def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2524 2525def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2526def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2527def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2528def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2529 2530def AND_V : AND_V_ENC, AND_V_DESC; 2531def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2532 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2533 MSA128BOpnd:$ws, 2534 MSA128BOpnd:$wt)>; 2535def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2536 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2537 MSA128BOpnd:$ws, 2538 MSA128BOpnd:$wt)>; 2539def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2540 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2541 MSA128BOpnd:$ws, 2542 MSA128BOpnd:$wt)>; 2543 2544def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2545 2546def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2547def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2548def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2549def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2550 2551def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2552def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2553def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2554def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2555 2556def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2557def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2558def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2559def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2560 2561def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2562def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2563def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2564def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2565 2566def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2567def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2568def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2569def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2570 2571def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2572def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2573def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2574def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2575 2576def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2577def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2578def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2579def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2580 2581def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2582def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2583def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2584def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2585 2586def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2587def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2588def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2589def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2590 2591def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2592def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2593def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2594def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2595 2596def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2597def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2598def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2599def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2600 2601def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2602def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2603def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2604def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2605 2606def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2607 2608def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2609 2610def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2611 2612def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2613 2614def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2615def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2616def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2617def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2618 2619def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2620def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2621def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2622def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2623 2624def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2625def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2626def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2627def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2628 2629def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2630 2631def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2632 2633class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> : 2634 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt), 2635 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>, 2636 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in, 2637 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> { 2638 let Constraints = "$wd_in = $wd"; 2639} 2640 2641def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>; 2642def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>; 2643def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>; 2644def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>; 2645def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>; 2646 2647def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2648 2649def BSET_B : BSET_B_ENC, BSET_B_DESC; 2650def BSET_H : BSET_H_ENC, BSET_H_DESC; 2651def BSET_W : BSET_W_ENC, BSET_W_DESC; 2652def BSET_D : BSET_D_ENC, BSET_D_DESC; 2653 2654def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2655def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2656def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2657def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2658 2659def BZ_B : BZ_B_ENC, BZ_B_DESC; 2660def BZ_H : BZ_H_ENC, BZ_H_DESC; 2661def BZ_W : BZ_W_ENC, BZ_W_DESC; 2662def BZ_D : BZ_D_ENC, BZ_D_DESC; 2663 2664def BZ_V : BZ_V_ENC, BZ_V_DESC; 2665 2666def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2667def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2668def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2669def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2670 2671def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2672def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2673def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2674def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2675 2676def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2677 2678def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2679def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2680def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2681def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2682 2683def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2684def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2685def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2686def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2687 2688def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2689def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2690def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2691def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2692 2693def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2694def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2695def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2696def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2697 2698def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2699def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2700def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2701def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2702 2703def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2704def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2705def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2706def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2707 2708def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2709def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2710def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2711def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2712 2713def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2714def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2715def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2716def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2717 2718def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2719def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2720def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2721 2722def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2723def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2724def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2725 2726def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2727def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2728 2729def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2730 2731def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2732def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2733def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2734def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2735 2736def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2737def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2738def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2739def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2740 2741def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2742def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2743def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2744 2745def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2746def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2747def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2748 2749def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2750def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2751def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2752 2753def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2754def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2755def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2756 2757def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2758def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2759def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2760 2761def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2762def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2763def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2764 2765def FADD_W : FADD_W_ENC, FADD_W_DESC; 2766def FADD_D : FADD_D_ENC, FADD_D_DESC; 2767 2768def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2769def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2770 2771def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2772def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2773 2774def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2775def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2776 2777def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2778def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2779 2780def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2781def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2782 2783def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2784def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2785 2786def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2787def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2788 2789def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2790def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2791 2792def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2793def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2794 2795def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2796def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2797 2798def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2799def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2800 2801def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2802def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2803 2804def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2805def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2806 2807def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2808def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2809 2810def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2811def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2812def FEXP2_W_1_PSEUDO : FEXP2_W_1_PSEUDO_DESC; 2813def FEXP2_D_1_PSEUDO : FEXP2_D_1_PSEUDO_DESC; 2814 2815def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2816def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2817 2818def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2819def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2820 2821def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2822def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2823 2824def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2825def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2826 2827def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2828def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2829 2830def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2831def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2832 2833def FILL_B : FILL_B_ENC, FILL_B_DESC; 2834def FILL_H : FILL_H_ENC, FILL_H_DESC; 2835def FILL_W : FILL_W_ENC, FILL_W_DESC; 2836def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC; 2837def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC; 2838 2839def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2840def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2841 2842def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2843def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2844 2845def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2846def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2847 2848def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2849def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2850 2851def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2852def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2853 2854def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2855def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2856 2857def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2858def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2859 2860def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2861def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2862 2863def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2864def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2865 2866def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2867def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2868 2869def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2870def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2871 2872def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2873def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2874 2875def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2876def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2877 2878def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2879def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2880 2881def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2882def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2883 2884def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2885def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2886 2887def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2888def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2889 2890def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2891def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2892 2893def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2894def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2895 2896def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2897def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2898 2899def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2900def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2901 2902def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2903def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2904 2905def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2906def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2907 2908def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2909def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2910 2911def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2912def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2913 2914def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2915def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2916 2917def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2918def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2919 2920def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2921def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2922 2923def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2924def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2925 2926def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2927def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2928def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2929 2930def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2931def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2932def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2933 2934def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2935def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2936def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2937 2938def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2939def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2940def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2941 2942def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2943def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2944def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2945def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2946 2947def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2948def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2949def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2950def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2951 2952def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2953def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2954def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2955def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2956 2957def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2958def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2959def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2960def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2961 2962def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2963def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2964def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2965 2966// INSERT_FW_PSEUDO defined after INSVE_W 2967// INSERT_FD_PSEUDO defined after INSVE_D 2968 2969def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2970def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2971def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2972def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2973 2974def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 2975def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 2976 2977def LD_B: LD_B_ENC, LD_B_DESC; 2978def LD_H: LD_H_ENC, LD_H_DESC; 2979def LD_W: LD_W_ENC, LD_W_DESC; 2980def LD_D: LD_D_ENC, LD_D_DESC; 2981 2982def LDI_B : LDI_B_ENC, LDI_B_DESC; 2983def LDI_H : LDI_H_ENC, LDI_H_DESC; 2984def LDI_W : LDI_W_ENC, LDI_W_DESC; 2985def LDI_D : LDI_D_ENC, LDI_D_DESC; 2986 2987def LSA : LSA_ENC, LSA_DESC; 2988 2989def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2990def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2991 2992def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2993def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2994 2995def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2996def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2997def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2998def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2999 3000def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 3001def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 3002def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 3003def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 3004 3005def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 3006def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 3007def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 3008def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 3009 3010def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 3011def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 3012def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 3013def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 3014 3015def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 3016def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 3017def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 3018def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 3019 3020def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 3021def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 3022def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 3023def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 3024 3025def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 3026def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 3027def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 3028def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 3029 3030def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 3031def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 3032def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 3033def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 3034 3035def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 3036def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 3037def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 3038def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 3039 3040def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 3041def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 3042def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 3043def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 3044 3045def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 3046def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 3047def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 3048def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 3049 3050def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 3051def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 3052def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 3053def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 3054 3055def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 3056def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 3057def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 3058def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 3059 3060def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 3061 3062def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 3063def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 3064 3065def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 3066def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 3067 3068def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 3069def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 3070def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 3071def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 3072 3073def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 3074def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 3075 3076def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 3077def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 3078 3079def MULV_B : MULV_B_ENC, MULV_B_DESC; 3080def MULV_H : MULV_H_ENC, MULV_H_DESC; 3081def MULV_W : MULV_W_ENC, MULV_W_DESC; 3082def MULV_D : MULV_D_ENC, MULV_D_DESC; 3083 3084def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 3085def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 3086def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 3087def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 3088 3089def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 3090def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 3091def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 3092def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 3093 3094def NOR_V : NOR_V_ENC, NOR_V_DESC; 3095def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 3096 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3097 MSA128BOpnd:$ws, 3098 MSA128BOpnd:$wt)>; 3099def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 3100 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3101 MSA128BOpnd:$ws, 3102 MSA128BOpnd:$wt)>; 3103def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 3104 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3105 MSA128BOpnd:$ws, 3106 MSA128BOpnd:$wt)>; 3107 3108def NORI_B : NORI_B_ENC, NORI_B_DESC; 3109 3110def OR_V : OR_V_ENC, OR_V_DESC; 3111def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 3112 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3113 MSA128BOpnd:$ws, 3114 MSA128BOpnd:$wt)>; 3115def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 3116 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3117 MSA128BOpnd:$ws, 3118 MSA128BOpnd:$wt)>; 3119def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3120 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3121 MSA128BOpnd:$ws, 3122 MSA128BOpnd:$wt)>; 3123 3124def ORI_B : ORI_B_ENC, ORI_B_DESC; 3125 3126def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3127def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3128def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3129def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3130 3131def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3132def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3133def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3134def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3135 3136def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3137def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3138def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3139def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3140 3141def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3142def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3143def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3144def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3145 3146def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3147def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3148def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3149def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3150 3151def SHF_B : SHF_B_ENC, SHF_B_DESC; 3152def SHF_H : SHF_H_ENC, SHF_H_DESC; 3153def SHF_W : SHF_W_ENC, SHF_W_DESC; 3154 3155def SLD_B : SLD_B_ENC, SLD_B_DESC; 3156def SLD_H : SLD_H_ENC, SLD_H_DESC; 3157def SLD_W : SLD_W_ENC, SLD_W_DESC; 3158def SLD_D : SLD_D_ENC, SLD_D_DESC; 3159 3160def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3161def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3162def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3163def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3164 3165def SLL_B : SLL_B_ENC, SLL_B_DESC; 3166def SLL_H : SLL_H_ENC, SLL_H_DESC; 3167def SLL_W : SLL_W_ENC, SLL_W_DESC; 3168def SLL_D : SLL_D_ENC, SLL_D_DESC; 3169 3170def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3171def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3172def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3173def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3174 3175def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3176def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3177def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3178def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3179 3180def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3181def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3182def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3183def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3184 3185def SRA_B : SRA_B_ENC, SRA_B_DESC; 3186def SRA_H : SRA_H_ENC, SRA_H_DESC; 3187def SRA_W : SRA_W_ENC, SRA_W_DESC; 3188def SRA_D : SRA_D_ENC, SRA_D_DESC; 3189 3190def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3191def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3192def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3193def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3194 3195def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3196def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3197def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3198def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3199 3200def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3201def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3202def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3203def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3204 3205def SRL_B : SRL_B_ENC, SRL_B_DESC; 3206def SRL_H : SRL_H_ENC, SRL_H_DESC; 3207def SRL_W : SRL_W_ENC, SRL_W_DESC; 3208def SRL_D : SRL_D_ENC, SRL_D_DESC; 3209 3210def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3211def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3212def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3213def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3214 3215def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3216def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3217def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3218def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3219 3220def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3221def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3222def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3223def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3224 3225def ST_B: ST_B_ENC, ST_B_DESC; 3226def ST_H: ST_H_ENC, ST_H_DESC; 3227def ST_W: ST_W_ENC, ST_W_DESC; 3228def ST_D: ST_D_ENC, ST_D_DESC; 3229 3230def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3231def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3232def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3233def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3234 3235def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3236def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3237def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3238def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3239 3240def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3241def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3242def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3243def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3244 3245def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3246def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3247def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3248def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3249 3250def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3251def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3252def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3253def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3254 3255def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3256def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3257def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3258def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3259 3260def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3261def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3262def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3263def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3264 3265def XOR_V : XOR_V_ENC, XOR_V_DESC; 3266def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3267 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3268 MSA128BOpnd:$ws, 3269 MSA128BOpnd:$wt)>; 3270def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3271 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3272 MSA128BOpnd:$ws, 3273 MSA128BOpnd:$wt)>; 3274def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3275 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3276 MSA128BOpnd:$ws, 3277 MSA128BOpnd:$wt)>; 3278 3279def XORI_B : XORI_B_ENC, XORI_B_DESC; 3280 3281// Patterns. 3282class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3283 Pat<pattern, result>, Requires<pred>; 3284 3285def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3286 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3287 3288def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3289def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3290def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3291def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3292def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3293def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3294def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3295 3296def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3297def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3298def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3299 3300def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3301 (ST_B MSA128B:$ws, addr:$addr)>; 3302def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3303 (ST_H MSA128H:$ws, addr:$addr)>; 3304def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3305 (ST_W MSA128W:$ws, addr:$addr)>; 3306def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3307 (ST_D MSA128D:$ws, addr:$addr)>; 3308def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3309 (ST_H MSA128H:$ws, addr:$addr)>; 3310def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3311 (ST_W MSA128W:$ws, addr:$addr)>; 3312def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3313 (ST_D MSA128D:$ws, addr:$addr)>; 3314 3315def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3316 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3317def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3318 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3319def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3320 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3321 3322class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3323 RegisterOperand ROWS = ROWD, 3324 InstrItinClass itin = NoItinerary> : 3325 MipsPseudo<(outs ROWD:$wd), 3326 (ins ROWS:$ws), 3327 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3328 InstrItinClass Itinerary = itin; 3329} 3330def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3331 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3332 MSA128WOpnd:$ws)>; 3333def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3334 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3335 MSA128DOpnd:$ws)>; 3336 3337class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3338 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3339 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3340 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3341 3342// These are endian-independant because the element size doesnt change 3343def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3344def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3345def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3346def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3347def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3348def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3349 3350// Little endian bitcasts are always no-ops 3351def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3352def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3353def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3354def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3355def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3356def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3357 3358def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3359def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3360def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3361def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3362def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3363 3364def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3365def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3366def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3367def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3368def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3369 3370def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3371def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3372def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3373def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3374def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3375 3376def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3377def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3378def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3379def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3380def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3381 3382def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3383def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3384def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3385def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3386def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3387 3388// Big endian bitcasts expand to shuffle instructions. 3389// This is because bitcast is defined to be a store/load sequence and the 3390// vector store/load instructions are mixed-endian with respect to the vector 3391// as a whole (little endian with respect to element order, but big endian 3392// elements). 3393 3394class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3395 RegisterClass DstRC, MSAInst Insn, 3396 RegisterClass ViaRC> : 3397 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3398 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3399 DstRC), 3400 [HasMSA, IsBE]>; 3401 3402class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3403 RegisterClass DstRC, MSAInst Insn, 3404 RegisterClass ViaRC> : 3405 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3406 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3407 DstRC), 3408 [HasMSA, IsBE]>; 3409 3410class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3411 RegisterClass DstRC> : 3412 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3413 3414class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3415 RegisterClass DstRC> : 3416 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3417 3418class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3419 RegisterClass DstRC> : 3420 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3421 (COPY_TO_REGCLASS 3422 (SHF_W 3423 (COPY_TO_REGCLASS 3424 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3425 MSA128W), 177), 3426 DstRC), 3427 [HasMSA, IsBE]>; 3428 3429class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3430 RegisterClass DstRC> : 3431 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3432 3433class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3434 RegisterClass DstRC> : 3435 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3436 3437class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3438 RegisterClass DstRC> : 3439 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3440 3441def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3442def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3443def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3444def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3445def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3446def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3447 3448def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3449def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3450def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3451def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3452def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3453 3454def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3455def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3456def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3457def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3458def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3459 3460def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3461def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3462def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3463def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3464def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3465 3466def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3467def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3468def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3469def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3470def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3471 3472def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3473def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3474def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3475def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3476def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3477 3478def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3479def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3480def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3481def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3482def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3483 3484// Pseudos used to implement BNZ.df, and BZ.df 3485 3486class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3487 RegisterClass RCWS, 3488 InstrItinClass itin = NoItinerary> : 3489 MipsPseudo<(outs GPR32:$dst), 3490 (ins RCWS:$ws), 3491 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3492 bit usesCustomInserter = 1; 3493} 3494 3495def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3496 MSA128B, NoItinerary>; 3497def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3498 MSA128H, NoItinerary>; 3499def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3500 MSA128W, NoItinerary>; 3501def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3502 MSA128D, NoItinerary>; 3503def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3504 MSA128B, NoItinerary>; 3505 3506def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3507 MSA128B, NoItinerary>; 3508def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3509 MSA128H, NoItinerary>; 3510def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3511 MSA128W, NoItinerary>; 3512def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3513 MSA128D, NoItinerary>; 3514def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3515 MSA128B, NoItinerary>; 3516