MipsMSAInstrInfo.td revision 93d995719e2459a6e9ccdb2c93a8ede8fa88c899
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28 29def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 30def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 31def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 32def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 33def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 34 [SDNPCommutative, SDNPAssociative]>; 35def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 44def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 45 46def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 47def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 48 49def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 50 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 51def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 52 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 53 54// Operands 55 56def uimm3 : Operand<i32> { 57 let PrintMethod = "printUnsignedImm"; 58} 59 60def uimm4 : Operand<i32> { 61 let PrintMethod = "printUnsignedImm"; 62} 63 64def uimm8 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def simm5 : Operand<i32>; 69 70def simm10 : Operand<i32>; 71 72def vsplat_uimm3 : Operand<vAny> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def vsplat_uimm4 : Operand<vAny> { 77 let PrintMethod = "printUnsignedImm"; 78} 79 80def vsplat_uimm5 : Operand<vAny> { 81 let PrintMethod = "printUnsignedImm"; 82} 83 84def vsplat_uimm6 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm"; 86} 87 88def vsplat_uimm8 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm"; 90} 91 92def vsplat_simm5 : Operand<vAny>; 93 94def vsplat_simm10 : Operand<vAny>; 95 96// Pattern fragments 97def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 98 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 99def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 100 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 101def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 102 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 103 104def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 105 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 106def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 107 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 108def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 109 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 110 111def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 112 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 113def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 114 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 115def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 116 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 117 118class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 119 PatFrag<(ops node:$lhs, node:$rhs), 120 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 121 122// ISD::SETFALSE cannot occur 123def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 124def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 125def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 126def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 127def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 128def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 129def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 130def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 131def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 132def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 133def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 134def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 135def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 136def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 137def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 138def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 139def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 140def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 141def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 142def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 143def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 144def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 145def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 146def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 147def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 148def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 149def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 150def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 151// ISD::SETTRUE cannot occur 152// ISD::SETFALSE2 cannot occur 153// ISD::SETTRUE2 cannot occur 154 155class vsetcc_type<ValueType ResTy, CondCode CC> : 156 PatFrag<(ops node:$lhs, node:$rhs), 157 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 158 159def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 160def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 161def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 162def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 163def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 164def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 165def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 166def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 167def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 168def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 169def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 170def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 171def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 172def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 173def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 174def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 175def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 176def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 177def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 178def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 179 180def vsplati8 : PatFrag<(ops node:$e0), 181 (v16i8 (build_vector node:$e0, node:$e0, 182 node:$e0, node:$e0, 183 node:$e0, node:$e0, 184 node:$e0, node:$e0, 185 node:$e0, node:$e0, 186 node:$e0, node:$e0, 187 node:$e0, node:$e0, 188 node:$e0, node:$e0))>; 189def vsplati16 : PatFrag<(ops node:$e0), 190 (v8i16 (build_vector node:$e0, node:$e0, 191 node:$e0, node:$e0, 192 node:$e0, node:$e0, 193 node:$e0, node:$e0))>; 194def vsplati32 : PatFrag<(ops node:$e0), 195 (v4i32 (build_vector node:$e0, node:$e0, 196 node:$e0, node:$e0))>; 197def vsplati64 : PatFrag<(ops node:$e0), 198 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 199 200class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 201 SDNodeXForm xform = NOOP_SDNodeXForm> 202 : PatLeaf<frag, pred, xform> { 203 Operand OpClass = opclass; 204} 205 206class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 207 list<SDNode> roots = [], 208 list<SDNodeProperty> props = []> : 209 ComplexPattern<ty, numops, fn, roots, props> { 210 Operand OpClass = opclass; 211} 212 213def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 214 "selectVSplatUimm3", 215 [build_vector, bitconvert]>; 216 217def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 218 "selectVSplatUimm5", 219 [build_vector, bitconvert]>; 220 221def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 222 "selectVSplatUimm8", 223 [build_vector, bitconvert]>; 224 225def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 226 "selectVSplatSimm5", 227 [build_vector, bitconvert]>; 228 229def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 230 "selectVSplatUimm4", 231 [build_vector, bitconvert]>; 232 233def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 234 "selectVSplatUimm5", 235 [build_vector, bitconvert]>; 236 237def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 238 "selectVSplatSimm5", 239 [build_vector, bitconvert]>; 240 241def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 242 "selectVSplatUimm5", 243 [build_vector, bitconvert]>; 244 245def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 246 "selectVSplatSimm5", 247 [build_vector, bitconvert]>; 248 249def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 250 "selectVSplatUimm5", 251 [build_vector, bitconvert]>; 252 253def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 254 "selectVSplatUimm6", 255 [build_vector, bitconvert]>; 256 257def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 258 "selectVSplatSimm5", 259 [build_vector, bitconvert]>; 260 261// Any build_vector that is a constant splat with a value that is an exact 262// power of 2 263def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 264 [build_vector, bitconvert]>; 265 266// Immediates 267def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 268def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 269 270// Instruction encoding. 271class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 272class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 273class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 274class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 275 276class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 277class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 278class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 279class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 280 281class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 282class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 283class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 284class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 285 286class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 287class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 288class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 289class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 290 291class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 292class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 293class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 294class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 295 296class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 297class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 298class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 299class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 300 301class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 302 303class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 304 305class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 306class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 307class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 308class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 309 310class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 311class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 312class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 313class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 314 315class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 316class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 317class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 318class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 319 320class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 321class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 322class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 323class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 324 325class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 326class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 327class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 328class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 329 330class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 331class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 332class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 333class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 334 335class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 336class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 337class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 338class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 339 340class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 341class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 342class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 343class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 344 345class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 346class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 347class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 348class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 349 350class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 351class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 352class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 353class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 354 355class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 356class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 357class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 358class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 359 360class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 361class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 362class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 363class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 364 365class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 366 367class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 368 369class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 370 371class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 372 373class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 374class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 375class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 376class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 377 378class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 379class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 380class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 381class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 382 383class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 384class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 385class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 386class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 387 388class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 389 390class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 391 392class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 393 394class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 395class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 396class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 397class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 398 399class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 400class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 401class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 402class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 403 404class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 405class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 406class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 407class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 408 409class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 410 411class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 412class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 413class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 414class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 415 416class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 417class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 418class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 419class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 420 421class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 422 423class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 424class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 425class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 426class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 427 428class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 429class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 430class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 431class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 432 433class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 434class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 435class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 436class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 437 438class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 439class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 440class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 441class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 442 443class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 444class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 445class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 446class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 447 448class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 449class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 450class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 451class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 452 453class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 454class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 455class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 456class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 457 458class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 459class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 460class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 461class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 462 463class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 464class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 465class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 466 467class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 468class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 469class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 470 471class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 472 473class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 474class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 475class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 476class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 477 478class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 479class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 480class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 481class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 482 483class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 484class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 485class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 486 487class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 488class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 489class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 490 491class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 492class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 493class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 494 495class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 496class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 497class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 498 499class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 500class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 501class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 502 503class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 504class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 505class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 506 507class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 508class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 509 510class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 511class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 512 513class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 514class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 515 516class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 517class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 518 519class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 520class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 521 522class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 523class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 524 525class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 526class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 527 528class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 529class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 530 531class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 532class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 533 534class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 535class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 536 537class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 538class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 539 540class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 541class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 542 543class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 544class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 545 546class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 547class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 548 549class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 550class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 551 552class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 553class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 554 555class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 556class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 557 558class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 559class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 560 561class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 562class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 563 564class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 565class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 566 567class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 568class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 569 570class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 571class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 572 573class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 574class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 575class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 576 577class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 578class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 579 580class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 581class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 582 583class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 584class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 585 586class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 587class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 588 589class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 590class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 591 592class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 593class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 594 595class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 596class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 597 598class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 599class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 600 601class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 602class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 603 604class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 605class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 606 607class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 608class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 609 610class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 611class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 612 613class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 614class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 615 616class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 617class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 618 619class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 620class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 621 622class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 623class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 624 625class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 626class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 627 628class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 629class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 630 631class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 632class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 633 634class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 635class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 636 637class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 638class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 639 640class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 641class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 642 643class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 644class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 645 646class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 647class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 648 649class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>; 650class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>; 651 652class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>; 653class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>; 654 655class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 656class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 657 658class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 659class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 660 661class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 662class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 663 664class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 665class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 666class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 667 668class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 669class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 670class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 671 672class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 673class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 674class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 675 676class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 677class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 678class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 679 680class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 681class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 682class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 683class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 684 685class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 686class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 687class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 688class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 689 690class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 691class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 692class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 693class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 694 695class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 696class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 697class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 698class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 699 700class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 701class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 702class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 703 704class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 705class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 706class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 707class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 708 709class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 710class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 711class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 712class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 713 714class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 715class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 716class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 717class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 718 719class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 720class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 721class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 722class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 723 724class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 725class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 726 727class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 728class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 729 730class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 731class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 732class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 733class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 734 735class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 736class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 737class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 738class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 739 740class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 741class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 742class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 743class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 744 745class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 746class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 747class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 748class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 749 750class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 751class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 752class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 753class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 754 755class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 756class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 757class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 758class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 759 760class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 761class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 762class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 763class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 764 765class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 766class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 767class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 768class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 769 770class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 771class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 772class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 773class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 774 775class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 776class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 777class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 778class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 779 780class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 781class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 782class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 783class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 784 785class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 786class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 787class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 788class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 789 790class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 791class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 792class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 793class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 794 795class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 796 797class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 798class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 799 800class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 801class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 802 803class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 804class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 805class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 806class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 807 808class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>; 809class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>; 810 811class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 812class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 813 814class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 815class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 816class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 817class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 818 819class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 820class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 821class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 822class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 823 824class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 825class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 826class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 827class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 828 829class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 830 831class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 832 833class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 834 835class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 836 837class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 838class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 839class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 840class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 841 842class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 843class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 844class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 845class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 846 847class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 848class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 849class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 850class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 851 852class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 853class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 854class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 855class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 856 857class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 858class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 859class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 860class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 861 862class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 863class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 864class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 865 866class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 867class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 868class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 869class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 870 871class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 872class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 873class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 874class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 875 876class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 877class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 878class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 879class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 880 881class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 882class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 883class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 884class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 885 886class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 887class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 888class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 889class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 890 891class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 892class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 893class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 894class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 895 896class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 897class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 898class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 899class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 900 901class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 902class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 903class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 904class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 905 906class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 907class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 908class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 909class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 910 911class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 912class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 913class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 914class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 915 916class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 917class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 918class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 919class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 920 921class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 922class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 923class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 924class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 925 926class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 927class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 928class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 929class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 930 931class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 932class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 933class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 934class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 935 936class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 937class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 938class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 939class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 940 941class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 942class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 943class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 944class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 945 946class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 947class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 948class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 949class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 950 951class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 952class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 953class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 954class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 955 956class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 957class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 958class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 959class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 960 961class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 962class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 963class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 964class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 965 966class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 967class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 968class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 969class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 970 971class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 972class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 973class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 974class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 975 976class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 977class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 978class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 979class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 980 981class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 982 983class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 984 985// Instruction desc. 986class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 987 RegisterClass RCWD, RegisterClass RCWS = RCWD, 988 InstrItinClass itin = NoItinerary> { 989 dag OutOperandList = (outs RCWD:$wd); 990 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 991 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 992 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 993 InstrItinClass Itinerary = itin; 994} 995 996class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 997 RegisterClass RCWD, RegisterClass RCWS = RCWD, 998 InstrItinClass itin = NoItinerary> { 999 dag OutOperandList = (outs RCWD:$wd); 1000 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 1001 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 1002 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 1003 InstrItinClass Itinerary = itin; 1004} 1005 1006class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1007 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1008 InstrItinClass itin = NoItinerary> { 1009 dag OutOperandList = (outs RCWD:$wd); 1010 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 1011 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 1012 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 1013 InstrItinClass Itinerary = itin; 1014} 1015 1016class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1017 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1018 InstrItinClass itin = NoItinerary> { 1019 dag OutOperandList = (outs RCWD:$wd); 1020 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 1021 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 1022 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 1023 InstrItinClass Itinerary = itin; 1024} 1025 1026class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1027 SplatComplexPattern SplatImm, RegisterClass RCWD, 1028 RegisterClass RCWS = RCWD, 1029 InstrItinClass itin = NoItinerary> { 1030 dag OutOperandList = (outs RCWD:$wd); 1031 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u); 1032 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u"); 1033 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))]; 1034 InstrItinClass Itinerary = itin; 1035} 1036 1037class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1038 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS, 1039 InstrItinClass itin = NoItinerary> { 1040 dag OutOperandList = (outs RCD:$rd); 1041 dag InOperandList = (ins RCWS:$ws, uimm4:$n); 1042 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1043 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; 1044 InstrItinClass Itinerary = itin; 1045} 1046 1047class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1048 SplatComplexPattern SplatImm, RegisterClass RCWD, 1049 RegisterClass RCWS = RCWD, 1050 InstrItinClass itin = NoItinerary> { 1051 dag OutOperandList = (outs RCWD:$wd); 1052 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$imm); 1053 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1054 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$imm))]; 1055 InstrItinClass Itinerary = itin; 1056} 1057 1058class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1059 SplatComplexPattern SplatImm, RegisterClass RCWD, 1060 RegisterClass RCWS = RCWD, 1061 InstrItinClass itin = NoItinerary> { 1062 dag OutOperandList = (outs RCWD:$wd); 1063 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u8); 1064 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1065 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u8))]; 1066 InstrItinClass Itinerary = itin; 1067} 1068 1069// This class is deprecated and will be removed in the next few patches 1070class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1071 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1072 InstrItinClass itin = NoItinerary> { 1073 dag OutOperandList = (outs RCWD:$wd); 1074 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1075 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1076 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 1077 InstrItinClass Itinerary = itin; 1078} 1079 1080class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterClass RCWD, 1081 RegisterClass RCWS = RCWD, 1082 InstrItinClass itin = NoItinerary> { 1083 dag OutOperandList = (outs RCWD:$wd); 1084 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1085 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1086 list<dag> Pattern = [(set RCWD:$wd, (MipsSHF immZExt8:$u8, RCWS:$ws))]; 1087 InstrItinClass Itinerary = itin; 1088} 1089 1090class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1091 InstrItinClass itin = NoItinerary> { 1092 dag OutOperandList = (outs RCWD:$wd); 1093 dag InOperandList = (ins vsplat_simm10:$i10); 1094 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1095 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1096 list<dag> Pattern = []; 1097 bit hasSideEffects = 0; 1098 InstrItinClass Itinerary = itin; 1099} 1100 1101class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1102 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1103 InstrItinClass itin = NoItinerary> { 1104 dag OutOperandList = (outs RCWD:$wd); 1105 dag InOperandList = (ins RCWS:$ws); 1106 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1107 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 1108 InstrItinClass Itinerary = itin; 1109} 1110 1111class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1112 SDPatternOperator OpNode, RegisterClass RCWD, 1113 RegisterClass RCWS = RCWD, 1114 InstrItinClass itin = NoItinerary> { 1115 dag OutOperandList = (outs RCWD:$wd); 1116 dag InOperandList = (ins RCWS:$ws); 1117 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1118 list<dag> Pattern = [(set RCWD:$wd, (VT (OpNode RCWS:$ws)))]; 1119 InstrItinClass Itinerary = itin; 1120} 1121 1122class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1123 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1124 InstrItinClass itin = NoItinerary> : 1125 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>; 1126 1127 1128class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1129 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1130 RegisterClass RCWT = RCWD, 1131 InstrItinClass itin = NoItinerary> { 1132 dag OutOperandList = (outs RCWD:$wd); 1133 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1134 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1135 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1136 InstrItinClass Itinerary = itin; 1137} 1138 1139class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterClass RCWD, 1140 RegisterClass RCWS = RCWD, 1141 RegisterClass RCWT = RCWD, 1142 InstrItinClass itin = NoItinerary> { 1143 dag OutOperandList = (outs RCWD:$wd); 1144 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 1145 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1146 list<dag> Pattern = [(set RCWD:$wd, (MipsVSHF RCWD:$wd_in, RCWS:$ws, 1147 RCWT:$wt))]; 1148 string Constraints = "$wd = $wd_in"; 1149 InstrItinClass Itinerary = itin; 1150} 1151 1152class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1153 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1154 RegisterClass RCWT = RCWD, 1155 InstrItinClass itin = NoItinerary> { 1156 dag OutOperandList = (outs RCWD:$wd); 1157 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 1158 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1159 list<dag> Pattern = [(set RCWD:$wd, 1160 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))]; 1161 InstrItinClass Itinerary = itin; 1162 string Constraints = "$wd = $wd_in"; 1163} 1164 1165class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1166 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1167 RegisterClass RCWT = RCWD, 1168 InstrItinClass itin = NoItinerary> : 1169 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1170 1171class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1172 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1173 RegisterClass RCWT = RCWD, 1174 InstrItinClass itin = NoItinerary> : 1175 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1176 1177class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1178 dag OutOperandList = (outs); 1179 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1180 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1181 list<dag> Pattern = []; 1182 InstrItinClass Itinerary = IIBranch; 1183 bit isBranch = 1; 1184 bit isTerminator = 1; 1185 bit hasDelaySlot = 1; 1186 list<Register> Defs = [AT]; 1187} 1188 1189class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1190 RegisterClass RCD, RegisterClass RCWS, 1191 InstrItinClass itin = NoItinerary> { 1192 dag OutOperandList = (outs RCD:$wd); 1193 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n); 1194 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1195 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 1196 RCWS:$rs, 1197 immZExt6:$n))]; 1198 InstrItinClass Itinerary = itin; 1199 string Constraints = "$wd = $wd_in"; 1200} 1201 1202class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1203 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1204 InstrItinClass itin = NoItinerary> { 1205 dag OutOperandList = (outs RCWD:$wd); 1206 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 1207 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1208 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1209 immZExt6:$n, 1210 RCWS:$ws))]; 1211 InstrItinClass Itinerary = itin; 1212 string Constraints = "$wd = $wd_in"; 1213} 1214 1215class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1216 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1217 RegisterClass RCWT = RCWD, 1218 InstrItinClass itin = NoItinerary> { 1219 dag OutOperandList = (outs RCWD:$wd); 1220 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1221 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1222 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1223 InstrItinClass Itinerary = itin; 1224} 1225 1226class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 1227 RegisterClass RCWS = RCWD, 1228 RegisterClass RCWT = RCWD> : 1229 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 1230 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 1231 1232class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>, 1233 IsCommutable; 1234class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>, 1235 IsCommutable; 1236class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>, 1237 IsCommutable; 1238class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>, 1239 IsCommutable; 1240 1241class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>, 1242 IsCommutable; 1243class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>, 1244 IsCommutable; 1245class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>, 1246 IsCommutable; 1247class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>, 1248 IsCommutable; 1249 1250class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>, 1251 IsCommutable; 1252class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>, 1253 IsCommutable; 1254class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>, 1255 IsCommutable; 1256class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>, 1257 IsCommutable; 1258 1259class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>, 1260 IsCommutable; 1261class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>, 1262 IsCommutable; 1263class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>, 1264 IsCommutable; 1265class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>, 1266 IsCommutable; 1267 1268class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable; 1269class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable; 1270class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable; 1271class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable; 1272 1273class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, MSA128B>; 1274class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, MSA128H>; 1275class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, MSA128W>; 1276class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, MSA128D>; 1277 1278class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1279class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1280class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1281class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1282 1283class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, MSA128B>; 1284 1285class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>; 1286class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>; 1287class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>; 1288class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>; 1289 1290class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>; 1291class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>; 1292class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>; 1293class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>; 1294 1295class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>, 1296 IsCommutable; 1297class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>, 1298 IsCommutable; 1299class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>, 1300 IsCommutable; 1301class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>, 1302 IsCommutable; 1303 1304class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>, 1305 IsCommutable; 1306class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>, 1307 IsCommutable; 1308class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>, 1309 IsCommutable; 1310class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>, 1311 IsCommutable; 1312 1313class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>, 1314 IsCommutable; 1315class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>, 1316 IsCommutable; 1317class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>, 1318 IsCommutable; 1319class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>, 1320 IsCommutable; 1321 1322class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>, 1323 IsCommutable; 1324class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>, 1325 IsCommutable; 1326class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>, 1327 IsCommutable; 1328class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>, 1329 IsCommutable; 1330 1331class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>; 1332class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>; 1333class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>; 1334class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>; 1335 1336class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1337class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1338class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1339class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1340 1341class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>; 1342class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>; 1343class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>; 1344class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>; 1345 1346class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1347 MSA128B>; 1348class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1349 MSA128H>; 1350class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1351 MSA128W>; 1352class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1353 MSA128D>; 1354 1355class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>; 1356class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>; 1357class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>; 1358class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>; 1359 1360class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1361 MSA128B>; 1362class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1363 MSA128H>; 1364class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1365 MSA128W>; 1366class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1367 MSA128D>; 1368 1369class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1370 1371class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1372 1373class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1374 1375class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1376 1377class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>; 1378class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>; 1379class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>; 1380class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>; 1381 1382class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1383class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1384class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1385class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1386 1387class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1388class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1389class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1390class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1391 1392class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1393 1394class BSEL_V_DESC { 1395 dag OutOperandList = (outs MSA128B:$wd); 1396 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt); 1397 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1398 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws, 1399 MSA128B:$wt))]; 1400 InstrItinClass Itinerary = NoItinerary; 1401 string Constraints = "$wd = $wd_in"; 1402} 1403 1404class BSELI_B_DESC { 1405 dag OutOperandList = (outs MSA128B:$wd); 1406 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, vsplat_uimm8:$u8); 1407 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1408 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, 1409 MSA128B:$ws, 1410 vsplati8_uimm8:$u8))]; 1411 InstrItinClass Itinerary = NoItinerary; 1412 string Constraints = "$wd = $wd_in"; 1413} 1414 1415class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>; 1416class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>; 1417class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>; 1418class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>; 1419 1420class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1421class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1422class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1423class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1424 1425class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1426class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1427class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1428class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1429 1430class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1431 1432class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128B>, 1433 IsCommutable; 1434class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128H>, 1435 IsCommutable; 1436class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128W>, 1437 IsCommutable; 1438class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128D>, 1439 IsCommutable; 1440 1441class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1442 MSA128B>; 1443class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1444 MSA128H>; 1445class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1446 MSA128W>; 1447class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1448 MSA128D>; 1449 1450class CFCMSA_DESC { 1451 dag OutOperandList = (outs GPR32:$rd); 1452 dag InOperandList = (ins MSACtrl:$cs); 1453 string AsmString = "cfcmsa\t$rd, $cs"; 1454 InstrItinClass Itinerary = NoItinerary; 1455 bit hasSideEffects = 1; 1456} 1457 1458class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128B>; 1459class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128H>; 1460class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128W>; 1461class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128D>; 1462 1463class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128B>; 1464class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128H>; 1465class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128W>; 1466class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128D>; 1467 1468class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1469 vsplati8_simm5, MSA128B>; 1470class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1471 vsplati16_simm5, MSA128H>; 1472class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1473 vsplati32_simm5, MSA128W>; 1474class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1475 vsplati64_simm5, MSA128D>; 1476 1477class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1478 vsplati8_uimm5, MSA128B>; 1479class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1480 vsplati16_uimm5, MSA128H>; 1481class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1482 vsplati32_uimm5, MSA128W>; 1483class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1484 vsplati64_uimm5, MSA128D>; 1485 1486class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128B>; 1487class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128H>; 1488class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128W>; 1489class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128D>; 1490 1491class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128B>; 1492class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128H>; 1493class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128W>; 1494class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128D>; 1495 1496class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1497 vsplati8_simm5, MSA128B>; 1498class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1499 vsplati16_simm5, MSA128H>; 1500class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1501 vsplati32_simm5, MSA128W>; 1502class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1503 vsplati64_simm5, MSA128D>; 1504 1505class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1506 vsplati8_uimm5, MSA128B>; 1507class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1508 vsplati16_uimm5, MSA128H>; 1509class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1510 vsplati32_uimm5, MSA128W>; 1511class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1512 vsplati64_uimm5, MSA128D>; 1513 1514class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1515 GPR32, MSA128B>; 1516class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1517 GPR32, MSA128H>; 1518class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1519 GPR32, MSA128W>; 1520 1521class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1522 GPR32, MSA128B>; 1523class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1524 GPR32, MSA128H>; 1525class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1526 GPR32, MSA128W>; 1527 1528class CTCMSA_DESC { 1529 dag OutOperandList = (outs); 1530 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1531 string AsmString = "ctcmsa\t$cd, $rs"; 1532 InstrItinClass Itinerary = NoItinerary; 1533 bit hasSideEffects = 1; 1534} 1535 1536class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>; 1537class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>; 1538class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>; 1539class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>; 1540 1541class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>; 1542class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>; 1543class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>; 1544class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>; 1545 1546class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H, 1547 MSA128B, MSA128B>, IsCommutable; 1548class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W, 1549 MSA128H, MSA128H>, IsCommutable; 1550class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D, 1551 MSA128W, MSA128W>, IsCommutable; 1552 1553class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H, 1554 MSA128B, MSA128B>, IsCommutable; 1555class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W, 1556 MSA128H, MSA128H>, IsCommutable; 1557class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D, 1558 MSA128W, MSA128W>, IsCommutable; 1559 1560class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1561 MSA128H, MSA128B, MSA128B>, 1562 IsCommutable; 1563class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1564 MSA128W, MSA128H, MSA128H>, 1565 IsCommutable; 1566class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1567 MSA128D, MSA128W, MSA128W>, 1568 IsCommutable; 1569 1570class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1571 MSA128H, MSA128B, MSA128B>, 1572 IsCommutable; 1573class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1574 MSA128W, MSA128H, MSA128H>, 1575 IsCommutable; 1576class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1577 MSA128D, MSA128W, MSA128W>, 1578 IsCommutable; 1579 1580class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1581 MSA128H, MSA128B, MSA128B>; 1582class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1583 MSA128W, MSA128H, MSA128H>; 1584class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1585 MSA128D, MSA128W, MSA128W>; 1586 1587class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1588 MSA128H, MSA128B, MSA128B>; 1589class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1590 MSA128W, MSA128H, MSA128H>; 1591class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1592 MSA128D, MSA128W, MSA128W>; 1593 1594class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable; 1595class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable; 1596 1597class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>, 1598 IsCommutable; 1599class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>, 1600 IsCommutable; 1601 1602class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128W>, 1603 IsCommutable; 1604class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128D>, 1605 IsCommutable; 1606 1607class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1608 MSA128W>; 1609class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1610 MSA128D>; 1611 1612class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128W>; 1613class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128D>; 1614 1615class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128W>; 1616class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128D>; 1617 1618class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128W>, 1619 IsCommutable; 1620class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128D>, 1621 IsCommutable; 1622 1623class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128W>, 1624 IsCommutable; 1625class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128D>, 1626 IsCommutable; 1627 1628class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128W>, 1629 IsCommutable; 1630class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128D>, 1631 IsCommutable; 1632 1633class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128W>, 1634 IsCommutable; 1635class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128D>, 1636 IsCommutable; 1637 1638class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128W>, 1639 IsCommutable; 1640class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128D>, 1641 IsCommutable; 1642 1643class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128W>, 1644 IsCommutable; 1645class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128D>, 1646 IsCommutable; 1647 1648class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128W>, 1649 IsCommutable; 1650class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128D>, 1651 IsCommutable; 1652 1653class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>; 1654class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>; 1655 1656class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1657 MSA128H, MSA128W, MSA128W>; 1658class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1659 MSA128W, MSA128D, MSA128D>; 1660 1661class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>; 1662class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>; 1663 1664class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1665 MSA128W, MSA128H>; 1666class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1667 MSA128D, MSA128W>; 1668 1669class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1670 MSA128W, MSA128H>; 1671class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1672 MSA128D, MSA128W>; 1673 1674class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1675 MSA128W>; 1676class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1677 MSA128D>; 1678 1679class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1680 MSA128W>; 1681class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1682 MSA128D>; 1683 1684class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1685 MSA128W, MSA128H>; 1686class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1687 MSA128D, MSA128W>; 1688 1689class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1690 MSA128W, MSA128H>; 1691class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1692 MSA128D, MSA128W>; 1693 1694class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, MSA128B, 1695 GPR32>; 1696class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, MSA128H, 1697 GPR32>; 1698class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, MSA128W, 1699 GPR32>; 1700 1701class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>; 1702class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>; 1703 1704class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1705 MSA128W>; 1706class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1707 MSA128D>; 1708 1709class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>; 1710class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>; 1711 1712class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1713 MSA128W>; 1714class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1715 MSA128D>; 1716 1717class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>; 1718class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>; 1719 1720class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1721 MSA128W>; 1722class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1723 MSA128D>; 1724 1725class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1726 MSA128W>; 1727class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1728 MSA128D>; 1729 1730class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>; 1731class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>; 1732 1733class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>; 1734class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>; 1735 1736class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>; 1737class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>; 1738 1739class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1740 MSA128W>; 1741class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1742 MSA128D>; 1743 1744class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>; 1745class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>; 1746 1747class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>; 1748class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>; 1749 1750class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>; 1751class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>; 1752 1753class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>; 1754class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>; 1755 1756class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>; 1757class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>; 1758 1759class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>; 1760class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>; 1761 1762class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>; 1763class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>; 1764 1765class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>; 1766class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>; 1767 1768class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>; 1769class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>; 1770 1771class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>; 1772class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>; 1773 1774class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>; 1775class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>; 1776 1777class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>; 1778class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>; 1779 1780class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>; 1781class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>; 1782 1783class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1784 MSA128W>; 1785class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1786 MSA128D>; 1787 1788class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1789 MSA128W>; 1790class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1791 MSA128D>; 1792 1793class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1794 MSA128W>; 1795class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1796 MSA128D>; 1797 1798class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1799 MSA128W>; 1800class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1801 MSA128D>; 1802 1803class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1804 MSA128H, MSA128W, MSA128W>; 1805class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1806 MSA128W, MSA128D, MSA128D>; 1807 1808class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H, 1809 MSA128B, MSA128B>; 1810class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W, 1811 MSA128H, MSA128H>; 1812class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D, 1813 MSA128W, MSA128W>; 1814 1815class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H, 1816 MSA128B, MSA128B>; 1817class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W, 1818 MSA128H, MSA128H>; 1819class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D, 1820 MSA128W, MSA128W>; 1821 1822class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H, 1823 MSA128B, MSA128B>; 1824class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W, 1825 MSA128H, MSA128H>; 1826class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D, 1827 MSA128W, MSA128W>; 1828 1829class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H, 1830 MSA128B, MSA128B>; 1831class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W, 1832 MSA128H, MSA128H>; 1833class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D, 1834 MSA128W, MSA128W>; 1835 1836class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>; 1837class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>; 1838class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>; 1839class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>; 1840 1841class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>; 1842class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>; 1843class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>; 1844class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>; 1845 1846class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>; 1847class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>; 1848class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>; 1849class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>; 1850 1851class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>; 1852class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>; 1853class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>; 1854class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>; 1855 1856class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B, 1857 GPR32>; 1858class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H, 1859 GPR32>; 1860class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W, 1861 GPR32>; 1862 1863class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1864class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1865class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1866class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1867 1868class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1869 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 1870 ComplexPattern Addr = addrRegImm, 1871 InstrItinClass itin = NoItinerary> { 1872 dag OutOperandList = (outs RCWD:$wd); 1873 dag InOperandList = (ins MemOpnd:$addr); 1874 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1875 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1876 InstrItinClass Itinerary = itin; 1877} 1878 1879class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1880class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1881class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1882class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1883 1884class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 1885class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 1886class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 1887class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 1888 1889class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1890 ValueType TyNode, RegisterClass RCWD, 1891 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1892 InstrItinClass itin = NoItinerary> { 1893 dag OutOperandList = (outs RCWD:$wd); 1894 dag InOperandList = (ins MemOpnd:$addr); 1895 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1896 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1897 InstrItinClass Itinerary = itin; 1898} 1899 1900class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1901class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1902class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1903class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1904 1905class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1906 MSA128H>; 1907class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1908 MSA128W>; 1909 1910class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1911 MSA128H>; 1912class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1913 MSA128W>; 1914 1915class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>; 1916class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>; 1917class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>; 1918class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>; 1919 1920class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>; 1921class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>; 1922class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>; 1923class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>; 1924 1925class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128B>; 1926class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128H>; 1927class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128W>; 1928class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128D>; 1929 1930class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128B>; 1931class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128H>; 1932class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128W>; 1933class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128D>; 1934 1935class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 1936 MSA128B>; 1937class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 1938 MSA128H>; 1939class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 1940 MSA128W>; 1941class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 1942 MSA128D>; 1943 1944class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 1945 MSA128B>; 1946class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 1947 MSA128H>; 1948class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 1949 MSA128W>; 1950class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 1951 MSA128D>; 1952 1953class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>; 1954class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>; 1955class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>; 1956class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>; 1957 1958class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128B>; 1959class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128H>; 1960class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128W>; 1961class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128D>; 1962 1963class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128B>; 1964class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128H>; 1965class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128W>; 1966class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128D>; 1967 1968class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 1969 MSA128B>; 1970class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 1971 MSA128H>; 1972class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 1973 MSA128W>; 1974class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 1975 MSA128D>; 1976 1977class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 1978 MSA128B>; 1979class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 1980 MSA128H>; 1981class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 1982 MSA128W>; 1983class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 1984 MSA128D>; 1985 1986class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>; 1987class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>; 1988class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>; 1989class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>; 1990 1991class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>; 1992class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>; 1993class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>; 1994class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>; 1995 1996class MOVE_V_DESC { 1997 dag OutOperandList = (outs MSA128B:$wd); 1998 dag InOperandList = (ins MSA128B:$ws); 1999 string AsmString = "move.v\t$wd, $ws"; 2000 list<dag> Pattern = []; 2001 InstrItinClass Itinerary = NoItinerary; 2002} 2003 2004class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2005 MSA128H>; 2006class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2007 MSA128W>; 2008 2009class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2010 MSA128H>; 2011class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2012 MSA128W>; 2013 2014class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>; 2015class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>; 2016class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>; 2017class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>; 2018 2019class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>; 2020class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>; 2021 2022class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2023 MSA128H>; 2024class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2025 MSA128W>; 2026 2027class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>; 2028class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>; 2029class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>; 2030class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>; 2031 2032class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 2033class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 2034class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 2035class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 2036 2037class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; 2038class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; 2039class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; 2040class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; 2041 2042class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 2043class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 2044class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 2045class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 2046 2047class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2048 MSA128B>; 2049 2050class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 2051class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 2052class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 2053class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 2054 2055class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128B>; 2056 2057class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>; 2058class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>; 2059class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>; 2060class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>; 2061 2062class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>; 2063class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>; 2064class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>; 2065class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>; 2066 2067class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>; 2068class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>; 2069class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>; 2070class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>; 2071 2072class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 2073class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 2074class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 2075class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 2076 2077class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 2078class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 2079class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 2080class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 2081 2082class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128B>; 2083class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128H>; 2084class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128W>; 2085 2086class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>; 2087class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>; 2088class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>; 2089class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>; 2090 2091class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 2092class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 2093class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 2094class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 2095 2096class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>; 2097class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>; 2098class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>; 2099class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>; 2100 2101class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2102 MSA128B>; 2103class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2104 MSA128H>; 2105class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2106 MSA128W>; 2107class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2108 MSA128D>; 2109 2110class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B, 2111 MSA128B, GPR32>; 2112class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H, 2113 MSA128H, GPR32>; 2114class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W, 2115 MSA128W, GPR32>; 2116class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D, 2117 MSA128D, GPR32>; 2118 2119class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b, 2120 MSA128B>; 2121class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h, 2122 MSA128H>; 2123class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w, 2124 MSA128W>; 2125class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d, 2126 MSA128D>; 2127 2128class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>; 2129class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>; 2130class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>; 2131class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>; 2132 2133class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2134 MSA128B>; 2135class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2136 MSA128H>; 2137class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2138 MSA128W>; 2139class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2140 MSA128D>; 2141 2142class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>; 2143class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>; 2144class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>; 2145class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>; 2146 2147class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 2148class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 2149class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 2150class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 2151 2152class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>; 2153class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>; 2154class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>; 2155class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>; 2156 2157class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2158 MSA128B>; 2159class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2160 MSA128H>; 2161class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2162 MSA128W>; 2163class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2164 MSA128D>; 2165 2166class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>; 2167class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>; 2168class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>; 2169class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>; 2170 2171class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 2172class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 2173class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 2174class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 2175 2176class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2177 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2178 ComplexPattern Addr = addrRegImm, 2179 InstrItinClass itin = NoItinerary> { 2180 dag OutOperandList = (outs); 2181 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2182 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2183 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2184 InstrItinClass Itinerary = itin; 2185} 2186 2187class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2188class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2189class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2190class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2191 2192class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2193 ValueType TyNode, RegisterClass RCWD, 2194 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2195 InstrItinClass itin = NoItinerary> { 2196 dag OutOperandList = (outs); 2197 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2198 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2199 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2200 InstrItinClass Itinerary = itin; 2201} 2202 2203class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2204class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2205class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2206class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2207 2208class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>; 2209class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>; 2210class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>; 2211class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>; 2212 2213class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>; 2214class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>; 2215class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>; 2216class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>; 2217 2218class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2219 MSA128B>; 2220class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2221 MSA128H>; 2222class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2223 MSA128W>; 2224class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2225 MSA128D>; 2226 2227class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2228 MSA128B>; 2229class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2230 MSA128H>; 2231class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2232 MSA128W>; 2233class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2234 MSA128D>; 2235 2236class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>; 2237class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>; 2238class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>; 2239class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>; 2240 2241class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, MSA128B>; 2242class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, MSA128H>; 2243class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, MSA128W>; 2244class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, MSA128D>; 2245 2246class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128B>; 2247class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128H>; 2248class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128W>; 2249class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128D>; 2250 2251class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 2252class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 2253class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 2254class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 2255 2256class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, MSA128B>; 2257 2258// Instruction defs. 2259def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2260def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2261def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2262def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2263 2264def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2265def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2266def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2267def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2268 2269def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2270def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2271def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2272def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2273 2274def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2275def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2276def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2277def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2278 2279def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2280def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2281def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2282def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2283 2284def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2285def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2286def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2287def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2288 2289def AND_V : AND_V_ENC, AND_V_DESC; 2290def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2291 PseudoInstExpansion<(AND_V MSA128B:$wd, 2292 MSA128B:$ws, MSA128B:$wt)>; 2293def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2294 PseudoInstExpansion<(AND_V MSA128B:$wd, 2295 MSA128B:$ws, MSA128B:$wt)>; 2296def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2297 PseudoInstExpansion<(AND_V MSA128B:$wd, 2298 MSA128B:$ws, MSA128B:$wt)>; 2299 2300def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2301 2302def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2303def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2304def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2305def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2306 2307def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2308def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2309def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2310def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2311 2312def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2313def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2314def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2315def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2316 2317def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2318def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2319def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2320def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2321 2322def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2323def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2324def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2325def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2326 2327def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2328def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2329def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2330def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2331 2332def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2333def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2334def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2335def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2336 2337def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2338def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2339def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2340def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2341 2342def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2343def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2344def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2345def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2346 2347def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2348def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2349def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2350def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2351 2352def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2353def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2354def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2355def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2356 2357def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2358def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2359def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2360def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2361 2362def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2363 2364def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2365 2366def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2367 2368def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2369 2370def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2371def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2372def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2373def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2374 2375def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2376def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2377def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2378def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2379 2380def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2381def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2382def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2383def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2384 2385def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2386 2387def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2388 2389class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> : 2390 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt), 2391 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>, 2392 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws, 2393 MSA128B:$wt)> { 2394 let Constraints = "$wd_in = $wd"; 2395} 2396 2397def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>; 2398def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>; 2399def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>; 2400def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>; 2401def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>; 2402 2403def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2404 2405def BSET_B : BSET_B_ENC, BSET_B_DESC; 2406def BSET_H : BSET_H_ENC, BSET_H_DESC; 2407def BSET_W : BSET_W_ENC, BSET_W_DESC; 2408def BSET_D : BSET_D_ENC, BSET_D_DESC; 2409 2410def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2411def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2412def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2413def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2414 2415def BZ_B : BZ_B_ENC, BZ_B_DESC; 2416def BZ_H : BZ_H_ENC, BZ_H_DESC; 2417def BZ_W : BZ_W_ENC, BZ_W_DESC; 2418def BZ_D : BZ_D_ENC, BZ_D_DESC; 2419 2420def BZ_V : BZ_V_ENC, BZ_V_DESC; 2421 2422def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2423def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2424def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2425def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2426 2427def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2428def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2429def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2430def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2431 2432def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2433 2434def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2435def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2436def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2437def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2438 2439def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2440def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2441def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2442def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2443 2444def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2445def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2446def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2447def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2448 2449def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2450def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2451def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2452def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2453 2454def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2455def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2456def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2457def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2458 2459def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2460def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2461def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2462def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2463 2464def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2465def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2466def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2467def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2468 2469def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2470def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2471def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2472def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2473 2474def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2475def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2476def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2477 2478def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2479def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2480def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2481 2482def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2483 2484def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2485def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2486def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2487def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2488 2489def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2490def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2491def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2492def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2493 2494def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2495def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2496def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2497 2498def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2499def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2500def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2501 2502def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2503def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2504def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2505 2506def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2507def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2508def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2509 2510def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2511def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2512def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2513 2514def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2515def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2516def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2517 2518def FADD_W : FADD_W_ENC, FADD_W_DESC; 2519def FADD_D : FADD_D_ENC, FADD_D_DESC; 2520 2521def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2522def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2523 2524def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2525def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2526 2527def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2528def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2529 2530def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2531def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2532 2533def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2534def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2535 2536def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2537def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2538 2539def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2540def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2541 2542def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2543def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2544 2545def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2546def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2547 2548def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2549def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2550 2551def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2552def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2553 2554def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2555def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2556 2557def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2558def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2559 2560def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2561def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2562 2563def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2564def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2565 2566def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2567def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2568 2569def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2570def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2571 2572def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2573def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2574 2575def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2576def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2577 2578def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2579def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2580 2581def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2582def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2583 2584def FILL_B : FILL_B_ENC, FILL_B_DESC; 2585def FILL_H : FILL_H_ENC, FILL_H_DESC; 2586def FILL_W : FILL_W_ENC, FILL_W_DESC; 2587 2588def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2589def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2590 2591def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2592def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2593 2594def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2595def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2596 2597def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2598def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2599 2600def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2601def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2602 2603def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2604def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2605 2606def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2607def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2608 2609def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2610def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2611 2612def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2613def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2614 2615def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2616def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2617 2618def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2619def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2620 2621def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2622def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2623 2624def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2625def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2626 2627def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2628def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2629 2630def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2631def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2632 2633def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2634def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2635 2636def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2637def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2638 2639def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2640def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2641 2642def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2643def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2644 2645def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2646def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2647 2648def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2649def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2650 2651def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2652def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2653 2654def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2655def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2656 2657def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2658def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2659 2660def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2661def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2662 2663def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2664def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2665 2666def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2667def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2668 2669def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2670def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2671 2672def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2673def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2674 2675def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2676def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2677def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2678 2679def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2680def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2681def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2682 2683def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2684def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2685def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2686 2687def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2688def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2689def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2690 2691def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2692def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2693def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2694def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2695 2696def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2697def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2698def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2699def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2700 2701def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2702def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2703def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2704def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2705 2706def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2707def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2708def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2709def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2710 2711def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2712def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2713def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2714 2715def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2716def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2717def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2718def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2719 2720def LD_B: LD_B_ENC, LD_B_DESC; 2721def LD_H: LD_H_ENC, LD_H_DESC; 2722def LD_W: LD_W_ENC, LD_W_DESC; 2723def LD_D: LD_D_ENC, LD_D_DESC; 2724 2725def LDI_B : LDI_B_ENC, LDI_B_DESC; 2726def LDI_H : LDI_H_ENC, LDI_H_DESC; 2727def LDI_W : LDI_W_ENC, LDI_W_DESC; 2728def LDI_D : LDI_D_ENC, LDI_D_DESC; 2729 2730def LDX_B: LDX_B_ENC, LDX_B_DESC; 2731def LDX_H: LDX_H_ENC, LDX_H_DESC; 2732def LDX_W: LDX_W_ENC, LDX_W_DESC; 2733def LDX_D: LDX_D_ENC, LDX_D_DESC; 2734 2735def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2736def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2737 2738def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2739def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2740 2741def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2742def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2743def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2744def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2745 2746def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2747def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2748def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2749def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2750 2751def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2752def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2753def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2754def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2755 2756def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2757def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2758def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2759def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2760 2761def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2762def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2763def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2764def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2765 2766def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2767def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2768def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2769def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2770 2771def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2772def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2773def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2774def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2775 2776def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2777def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2778def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2779def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2780 2781def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2782def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2783def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2784def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2785 2786def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2787def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2788def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2789def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2790 2791def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2792def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2793def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2794def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2795 2796def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2797def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2798def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2799def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2800 2801def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2802def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2803def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2804def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2805 2806def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2807 2808def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2809def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2810 2811def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2812def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2813 2814def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2815def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2816def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2817def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2818 2819def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2820def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2821 2822def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2823def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2824 2825def MULV_B : MULV_B_ENC, MULV_B_DESC; 2826def MULV_H : MULV_H_ENC, MULV_H_DESC; 2827def MULV_W : MULV_W_ENC, MULV_W_DESC; 2828def MULV_D : MULV_D_ENC, MULV_D_DESC; 2829 2830def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2831def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2832def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2833def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2834 2835def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2836def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2837def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2838def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2839 2840def NOR_V : NOR_V_ENC, NOR_V_DESC; 2841def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2842 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2843 MSA128B:$ws, MSA128B:$wt)>; 2844def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2845 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2846 MSA128B:$ws, MSA128B:$wt)>; 2847def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2848 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2849 MSA128B:$ws, MSA128B:$wt)>; 2850 2851def NORI_B : NORI_B_ENC, NORI_B_DESC; 2852 2853def OR_V : OR_V_ENC, OR_V_DESC; 2854def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2855 PseudoInstExpansion<(OR_V MSA128B:$wd, 2856 MSA128B:$ws, MSA128B:$wt)>; 2857def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2858 PseudoInstExpansion<(OR_V MSA128B:$wd, 2859 MSA128B:$ws, MSA128B:$wt)>; 2860def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 2861 PseudoInstExpansion<(OR_V MSA128B:$wd, 2862 MSA128B:$ws, MSA128B:$wt)>; 2863 2864def ORI_B : ORI_B_ENC, ORI_B_DESC; 2865 2866def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2867def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2868def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2869def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2870 2871def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2872def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2873def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2874def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2875 2876def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2877def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2878def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2879def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2880 2881def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2882def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2883def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2884def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2885 2886def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2887def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2888def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2889def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2890 2891def SHF_B : SHF_B_ENC, SHF_B_DESC; 2892def SHF_H : SHF_H_ENC, SHF_H_DESC; 2893def SHF_W : SHF_W_ENC, SHF_W_DESC; 2894 2895def SLD_B : SLD_B_ENC, SLD_B_DESC; 2896def SLD_H : SLD_H_ENC, SLD_H_DESC; 2897def SLD_W : SLD_W_ENC, SLD_W_DESC; 2898def SLD_D : SLD_D_ENC, SLD_D_DESC; 2899 2900def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 2901def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 2902def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 2903def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 2904 2905def SLL_B : SLL_B_ENC, SLL_B_DESC; 2906def SLL_H : SLL_H_ENC, SLL_H_DESC; 2907def SLL_W : SLL_W_ENC, SLL_W_DESC; 2908def SLL_D : SLL_D_ENC, SLL_D_DESC; 2909 2910def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 2911def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 2912def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 2913def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 2914 2915def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 2916def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 2917def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 2918def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 2919 2920def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 2921def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 2922def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 2923def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 2924 2925def SRA_B : SRA_B_ENC, SRA_B_DESC; 2926def SRA_H : SRA_H_ENC, SRA_H_DESC; 2927def SRA_W : SRA_W_ENC, SRA_W_DESC; 2928def SRA_D : SRA_D_ENC, SRA_D_DESC; 2929 2930def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 2931def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 2932def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 2933def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 2934 2935def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 2936def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 2937def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 2938def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 2939 2940def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 2941def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 2942def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 2943def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 2944 2945def SRL_B : SRL_B_ENC, SRL_B_DESC; 2946def SRL_H : SRL_H_ENC, SRL_H_DESC; 2947def SRL_W : SRL_W_ENC, SRL_W_DESC; 2948def SRL_D : SRL_D_ENC, SRL_D_DESC; 2949 2950def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 2951def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 2952def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 2953def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 2954 2955def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 2956def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 2957def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 2958def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 2959 2960def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 2961def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 2962def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 2963def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 2964 2965def ST_B: ST_B_ENC, ST_B_DESC; 2966def ST_H: ST_H_ENC, ST_H_DESC; 2967def ST_W: ST_W_ENC, ST_W_DESC; 2968def ST_D: ST_D_ENC, ST_D_DESC; 2969 2970def STX_B: STX_B_ENC, STX_B_DESC; 2971def STX_H: STX_H_ENC, STX_H_DESC; 2972def STX_W: STX_W_ENC, STX_W_DESC; 2973def STX_D: STX_D_ENC, STX_D_DESC; 2974 2975def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 2976def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 2977def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 2978def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 2979 2980def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 2981def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 2982def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 2983def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 2984 2985def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 2986def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 2987def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 2988def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 2989 2990def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 2991def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 2992def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 2993def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 2994 2995def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 2996def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 2997def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 2998def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 2999 3000def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3001def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3002def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3003def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3004 3005def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3006def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3007def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3008def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3009 3010def XOR_V : XOR_V_ENC, XOR_V_DESC; 3011def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3012 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3013 MSA128B:$ws, MSA128B:$wt)>; 3014def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3015 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3016 MSA128B:$ws, MSA128B:$wt)>; 3017def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3018 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3019 MSA128B:$ws, MSA128B:$wt)>; 3020 3021def XORI_B : XORI_B_ENC, XORI_B_DESC; 3022 3023// Patterns. 3024class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3025 Pat<pattern, result>, Requires<pred>; 3026 3027def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3028 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3029 3030def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3031def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3032def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3033def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3034def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3035def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3036def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3037 3038def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3039def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3040def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3041 3042def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3043 (ST_B MSA128B:$ws, addr:$addr)>; 3044def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3045 (ST_H MSA128H:$ws, addr:$addr)>; 3046def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3047 (ST_W MSA128W:$ws, addr:$addr)>; 3048def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3049 (ST_D MSA128D:$ws, addr:$addr)>; 3050def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3051 (ST_H MSA128H:$ws, addr:$addr)>; 3052def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3053 (ST_W MSA128W:$ws, addr:$addr)>; 3054def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3055 (ST_D MSA128D:$ws, addr:$addr)>; 3056 3057def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3058 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3059def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3060 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3061def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3062 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3063 3064class MSA_FABS_PSEUDO_DESC_BASE<RegisterClass RCWD, RegisterClass RCWS = RCWD, 3065 InstrItinClass itin = NoItinerary> : 3066 MipsPseudo<(outs RCWD:$wd), 3067 (ins RCWS:$ws), 3068 [(set RCWD:$wd, (fabs RCWS:$ws))]> { 3069 InstrItinClass Itinerary = itin; 3070} 3071def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128W>, 3072 PseudoInstExpansion<(FMAX_A_W MSA128W:$wd, MSA128W:$ws, 3073 MSA128W:$ws)>; 3074def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128D>, 3075 PseudoInstExpansion<(FMAX_A_D MSA128D:$wd, MSA128D:$ws, 3076 MSA128D:$ws)>; 3077 3078class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3079 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3080 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3081 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3082 3083// These are endian-independant because the element size doesnt change 3084def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3085def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3086def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3087def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3088def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3089def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3090 3091// Little endian bitcasts are always no-ops 3092def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3093def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3094def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3095def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3096def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3097def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3098 3099def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3100def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3101def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3102def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3103def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3104 3105def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3106def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3107def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3108def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3109def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3110 3111def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3112def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3113def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3114def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3115def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3116 3117def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3118def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3119def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3120def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3121def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3122 3123def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3124def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3125def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3126def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3127def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3128 3129// Big endian bitcasts expand to shuffle instructions. 3130// This is because bitcast is defined to be a store/load sequence and the 3131// vector store/load instructions are mixed-endian with respect to the vector 3132// as a whole (little endian with respect to element order, but big endian 3133// elements). 3134 3135class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3136 RegisterClass DstRC, MSAInst Insn, 3137 RegisterClass ViaRC> : 3138 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3139 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3140 DstRC), 3141 [HasMSA, IsBE]>; 3142 3143class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3144 RegisterClass DstRC, MSAInst Insn, 3145 RegisterClass ViaRC> : 3146 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3147 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3148 DstRC), 3149 [HasMSA, IsBE]>; 3150 3151class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3152 RegisterClass DstRC> : 3153 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3154 3155class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3156 RegisterClass DstRC> : 3157 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3158 3159class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3160 RegisterClass DstRC> : 3161 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3162 (COPY_TO_REGCLASS 3163 (SHF_W 3164 (COPY_TO_REGCLASS 3165 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3166 MSA128W), 177), 3167 DstRC), 3168 [HasMSA, IsBE]>; 3169 3170class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3171 RegisterClass DstRC> : 3172 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3173 3174class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3175 RegisterClass DstRC> : 3176 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3177 3178class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3179 RegisterClass DstRC> : 3180 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3181 3182def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3183def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3184def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3185def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3186def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3187def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3188 3189def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3190def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3191def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3192def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3193def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3194 3195def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3196def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3197def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3198def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3199def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3200 3201def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3202def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3203def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3204def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3205def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3206 3207def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3208def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3209def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3210def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3211def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3212 3213def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3214def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3215def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3216def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3217def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3218 3219def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3220def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3221def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3222def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3223def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3224 3225// Pseudos used to implement BNZ.df, and BZ.df 3226 3227class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3228 RegisterClass RCWS, 3229 InstrItinClass itin = NoItinerary> : 3230 MipsPseudo<(outs GPR32:$dst), 3231 (ins RCWS:$ws), 3232 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3233 bit usesCustomInserter = 1; 3234} 3235 3236def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3237 MSA128B, NoItinerary>; 3238def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3239 MSA128H, NoItinerary>; 3240def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3241 MSA128W, NoItinerary>; 3242def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3243 MSA128D, NoItinerary>; 3244def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3245 MSA128B, NoItinerary>; 3246 3247def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3248 MSA128B, NoItinerary>; 3249def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3250 MSA128H, NoItinerary>; 3251def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3252 MSA128W, NoItinerary>; 3253def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3254 MSA128D, NoItinerary>; 3255def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3256 MSA128B, NoItinerary>; 3257