MipsMSAInstrInfo.td revision 95adf91f29980e374bf094e15bc3f2764ef9baf4
1b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// 3b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// The LLVM Compiler Infrastructure 4b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// 5b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// This file is distributed under the University of Illinois Open Source 6b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// License. See LICENSE.TXT for details. 7b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// 8b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org//===----------------------------------------------------------------------===// 9b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// 10b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// This file describes Mips MSA ASE instructions. 110f224ffecd2f1190744b5bc5c97f4ce373ba0adetommi@webrtc.org// 120f224ffecd2f1190744b5bc5c97f4ce373ba0adetommi@webrtc.org//===----------------------------------------------------------------------===// 13b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 14b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 1687c29b570711208c5f74bf9eaffbea549de866c7pbos@webrtc.org SDTCisInt<1>, 17b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org SDTCisSameAs<1, 2>, 18b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org SDTCisVT<3, OtherVT>]>; 19b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org SDTCisFP<1>, 21b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org SDTCisSameAs<1, 2>, 22b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org SDTCisVT<3, OtherVT>]>; 23b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org SDTCisInt<1>, SDTCisVec<1>, 25b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 31b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.orgdef MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org [SDNPCommutative, SDNPAssociative]>; 37b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.org [SDNPCommutative, SDNPAssociative]>; 39f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.orgdef MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.org [SDNPCommutative, SDNPAssociative]>; 41f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.orgdef MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.org [SDNPCommutative, SDNPAssociative]>; 43f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.orgdef MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org [SDNPCommutative, SDNPAssociative]>; 45b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 54b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.org 57f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.orgdef MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.org SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.orgdef MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.org SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 62b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// Operands 63b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 64b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef uimm2 : Operand<i32> { 65b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let PrintMethod = "printUnsignedImm"; 66f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.org} 67b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 68b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// The immediate of an LSA instruction needs special handling 69b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org// as the encoded value should be subtracted by one. 70b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef uimm2LSAAsmOperand : AsmOperandClass { 71b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let Name = "LSAImm"; 72b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let ParserMethod = "parseLSAImm"; 73b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let RenderMethod = "addImmOperands"; 74b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org} 75b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 76b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef LSAImm : Operand<i32> { 77b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let PrintMethod = "printUnsignedImm"; 78b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let EncoderMethod = "getLSAImmEncoding"; 79b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let DecoderMethod = "DecodeLSAImm"; 80b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let ParserMatchClass = uimm2LSAAsmOperand; 81b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org} 82b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 83b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef uimm3 : Operand<i32> { 84b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let PrintMethod = "printUnsignedImm8"; 85b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org} 86b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 87b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef uimm4 : Operand<i32> { 88b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let PrintMethod = "printUnsignedImm8"; 89b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org} 90b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 91b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef uimm8 : Operand<i32> { 92b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org let PrintMethod = "printUnsignedImm8"; 93b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org} 94b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.org 95b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef simm5 : Operand<i32>; 96f7e44d647cd0f893a185dfbe043cb313cab29fd0pbos@webrtc.org 97b015cbede88899f67a53fbbe581b02ce8e32794andrew@webrtc.orgdef simm10 : Operand<i32>; 983b89e10f31160da35b408fd00cb8f89d2b08862dpbos@webrtc.org 993b89e10f31160da35b408fd00cb8f89d2b08862dpbos@webrtc.orgdef vsplat_uimm1 : Operand<vAny> { 1000f224ffecd2f1190744b5bc5c97f4ce373ba0adetommi@webrtc.org let PrintMethod = "printUnsignedImm8"; 101} 102 103def vsplat_uimm2 : Operand<vAny> { 104 let PrintMethod = "printUnsignedImm8"; 105} 106 107def vsplat_uimm3 : Operand<vAny> { 108 let PrintMethod = "printUnsignedImm8"; 109} 110 111def vsplat_uimm4 : Operand<vAny> { 112 let PrintMethod = "printUnsignedImm8"; 113} 114 115def vsplat_uimm5 : Operand<vAny> { 116 let PrintMethod = "printUnsignedImm8"; 117} 118 119def vsplat_uimm6 : Operand<vAny> { 120 let PrintMethod = "printUnsignedImm8"; 121} 122 123def vsplat_uimm8 : Operand<vAny> { 124 let PrintMethod = "printUnsignedImm8"; 125} 126 127def vsplat_simm5 : Operand<vAny>; 128 129def vsplat_simm10 : Operand<vAny>; 130 131def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>; 132 133// Pattern fragments 134def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 135 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 136def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 137 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 138def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 139 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 140 141def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 142 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 143def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 144 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 145def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 146 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 147 148def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 149 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 150def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 151 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 152def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 153 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 154 155class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 156 PatFrag<(ops node:$lhs, node:$rhs), 157 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 158 159// ISD::SETFALSE cannot occur 160def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 161def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 162def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 163def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 164def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 165def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 166def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 167def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 168def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 169def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 170def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 171def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 172def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 173def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 174def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 175def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 176def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 177def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 178def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 179def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 180def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 181def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 182def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 183def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 184def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 185def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 186def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 187def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 188// ISD::SETTRUE cannot occur 189// ISD::SETFALSE2 cannot occur 190// ISD::SETTRUE2 cannot occur 191 192class vsetcc_type<ValueType ResTy, CondCode CC> : 193 PatFrag<(ops node:$lhs, node:$rhs), 194 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 195 196def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 197def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 198def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 199def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 200def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 201def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 202def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 203def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 204def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 205def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 206def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 207def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 208def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 209def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 210def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 211def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 212def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 213def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 214def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 215def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 216 217def vsplati8 : PatFrag<(ops node:$e0), 218 (v16i8 (build_vector node:$e0, node:$e0, 219 node:$e0, node:$e0, 220 node:$e0, node:$e0, 221 node:$e0, node:$e0, 222 node:$e0, node:$e0, 223 node:$e0, node:$e0, 224 node:$e0, node:$e0, 225 node:$e0, node:$e0))>; 226def vsplati16 : PatFrag<(ops node:$e0), 227 (v8i16 (build_vector node:$e0, node:$e0, 228 node:$e0, node:$e0, 229 node:$e0, node:$e0, 230 node:$e0, node:$e0))>; 231def vsplati32 : PatFrag<(ops node:$e0), 232 (v4i32 (build_vector node:$e0, node:$e0, 233 node:$e0, node:$e0))>; 234def vsplati64 : PatFrag<(ops node:$e0), 235 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 236def vsplatf32 : PatFrag<(ops node:$e0), 237 (v4f32 (build_vector node:$e0, node:$e0, 238 node:$e0, node:$e0))>; 239def vsplatf64 : PatFrag<(ops node:$e0), 240 (v2f64 (build_vector node:$e0, node:$e0))>; 241 242def vsplati8_elt : PatFrag<(ops node:$v, node:$i), 243 (MipsVSHF (vsplati8 node:$i), node:$v, node:$v)>; 244def vsplati16_elt : PatFrag<(ops node:$v, node:$i), 245 (MipsVSHF (vsplati16 node:$i), node:$v, node:$v)>; 246def vsplati32_elt : PatFrag<(ops node:$v, node:$i), 247 (MipsVSHF (vsplati32 node:$i), node:$v, node:$v)>; 248def vsplati64_elt : PatFrag<(ops node:$v, node:$i), 249 (MipsVSHF (vsplati64 node:$i), node:$v, node:$v)>; 250 251class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 252 SDNodeXForm xform = NOOP_SDNodeXForm> 253 : PatLeaf<frag, pred, xform> { 254 Operand OpClass = opclass; 255} 256 257class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 258 list<SDNode> roots = [], 259 list<SDNodeProperty> props = []> : 260 ComplexPattern<ty, numops, fn, roots, props> { 261 Operand OpClass = opclass; 262} 263 264def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 265 "selectVSplatUimm3", 266 [build_vector, bitconvert]>; 267 268def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 269 "selectVSplatUimm4", 270 [build_vector, bitconvert]>; 271 272def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 273 "selectVSplatUimm5", 274 [build_vector, bitconvert]>; 275 276def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 277 "selectVSplatUimm8", 278 [build_vector, bitconvert]>; 279 280def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 281 "selectVSplatSimm5", 282 [build_vector, bitconvert]>; 283 284def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 285 "selectVSplatUimm3", 286 [build_vector, bitconvert]>; 287 288def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 289 "selectVSplatUimm4", 290 [build_vector, bitconvert]>; 291 292def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 293 "selectVSplatUimm5", 294 [build_vector, bitconvert]>; 295 296def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 297 "selectVSplatSimm5", 298 [build_vector, bitconvert]>; 299 300def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 301 "selectVSplatUimm2", 302 [build_vector, bitconvert]>; 303 304def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 305 "selectVSplatUimm5", 306 [build_vector, bitconvert]>; 307 308def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 309 "selectVSplatSimm5", 310 [build_vector, bitconvert]>; 311 312def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 313 "selectVSplatUimm1", 314 [build_vector, bitconvert]>; 315 316def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 317 "selectVSplatUimm5", 318 [build_vector, bitconvert]>; 319 320def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 321 "selectVSplatUimm6", 322 [build_vector, bitconvert]>; 323 324def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 325 "selectVSplatSimm5", 326 [build_vector, bitconvert]>; 327 328// Any build_vector that is a constant splat with a value that is an exact 329// power of 2 330def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 331 [build_vector, bitconvert]>; 332 333// Any build_vector that is a constant splat with a value that is the bitwise 334// inverse of an exact power of 2 335def vsplat_uimm_inv_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmInvPow2", 336 [build_vector, bitconvert]>; 337 338// Any build_vector that is a constant splat with only a consecutive sequence 339// of left-most bits set. 340def vsplat_maskl_bits : SplatComplexPattern<vsplat_uimm8, vAny, 1, 341 "selectVSplatMaskL", 342 [build_vector, bitconvert]>; 343 344// Any build_vector that is a constant splat with only a consecutive sequence 345// of right-most bits set. 346def vsplat_maskr_bits : SplatComplexPattern<vsplat_uimm8, vAny, 1, 347 "selectVSplatMaskR", 348 [build_vector, bitconvert]>; 349 350// Any build_vector that is a constant splat with a value that equals 1 351// FIXME: These should be a ComplexPattern but we can't use them because the 352// ISel generator requires the uses to have a name, but providing a name 353// causes other errors ("used in pattern but not operand list") 354def vsplat_imm_eq_1 : PatLeaf<(build_vector), [{ 355 APInt Imm; 356 EVT EltTy = N->getValueType(0).getVectorElementType(); 357 358 return selectVSplat (N, Imm) && 359 Imm.getBitWidth() == EltTy.getSizeInBits() && Imm == 1; 360}]>; 361 362def vsplati64_imm_eq_1 : PatLeaf<(bitconvert (v4i32 (build_vector))), [{ 363 APInt Imm; 364 SDNode *BV = N->getOperand(0).getNode(); 365 EVT EltTy = N->getValueType(0).getVectorElementType(); 366 367 return selectVSplat (BV, Imm) && 368 Imm.getBitWidth() == EltTy.getSizeInBits() && Imm == 1; 369}]>; 370 371def vbclr_b : PatFrag<(ops node:$ws, node:$wt), 372 (and node:$ws, (xor (shl vsplat_imm_eq_1, node:$wt), 373 immAllOnesV))>; 374def vbclr_h : PatFrag<(ops node:$ws, node:$wt), 375 (and node:$ws, (xor (shl vsplat_imm_eq_1, node:$wt), 376 immAllOnesV))>; 377def vbclr_w : PatFrag<(ops node:$ws, node:$wt), 378 (and node:$ws, (xor (shl vsplat_imm_eq_1, node:$wt), 379 immAllOnesV))>; 380def vbclr_d : PatFrag<(ops node:$ws, node:$wt), 381 (and node:$ws, (xor (shl (v2i64 vsplati64_imm_eq_1), 382 node:$wt), 383 (bitconvert (v4i32 immAllOnesV))))>; 384 385def vbneg_b : PatFrag<(ops node:$ws, node:$wt), 386 (xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>; 387def vbneg_h : PatFrag<(ops node:$ws, node:$wt), 388 (xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>; 389def vbneg_w : PatFrag<(ops node:$ws, node:$wt), 390 (xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>; 391def vbneg_d : PatFrag<(ops node:$ws, node:$wt), 392 (xor node:$ws, (shl (v2i64 vsplati64_imm_eq_1), 393 node:$wt))>; 394 395def vbset_b : PatFrag<(ops node:$ws, node:$wt), 396 (or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>; 397def vbset_h : PatFrag<(ops node:$ws, node:$wt), 398 (or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>; 399def vbset_w : PatFrag<(ops node:$ws, node:$wt), 400 (or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>; 401def vbset_d : PatFrag<(ops node:$ws, node:$wt), 402 (or node:$ws, (shl (v2i64 vsplati64_imm_eq_1), 403 node:$wt))>; 404 405def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt), 406 (fsub node:$wd, (fmul node:$ws, node:$wt))>; 407 408def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt), 409 (add node:$wd, (mul node:$ws, node:$wt))>; 410 411def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt), 412 (sub node:$wd, (mul node:$ws, node:$wt))>; 413 414def mul_fexp2 : PatFrag<(ops node:$ws, node:$wt), 415 (fmul node:$ws, (fexp2 node:$wt))>; 416 417// Immediates 418def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 419def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 420 421// Instruction encoding. 422class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 423class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 424class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 425class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 426 427class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 428class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 429class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 430class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 431 432class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 433class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 434class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 435class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 436 437class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 438class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 439class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 440class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 441 442class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 443class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 444class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 445class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 446 447class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 448class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 449class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 450class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 451 452class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 453 454class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 455 456class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 457class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 458class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 459class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 460 461class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 462class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 463class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 464class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 465 466class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 467class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 468class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 469class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 470 471class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 472class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 473class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 474class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 475 476class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 477class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 478class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 479class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 480 481class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 482class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 483class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 484class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 485 486class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 487class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 488class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 489class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 490 491class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 492class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 493class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 494class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 495 496class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 497class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 498class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 499class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 500 501class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 502class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 503class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 504class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 505 506class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 507class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 508class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 509class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 510 511class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 512class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 513class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 514class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 515 516class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 517 518class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 519 520class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 521 522class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 523 524class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 525class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 526class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 527class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 528 529class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 530class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 531class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 532class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 533 534class BNZ_B_ENC : MSA_CBRANCH_FMT<0b111, 0b00>; 535class BNZ_H_ENC : MSA_CBRANCH_FMT<0b111, 0b01>; 536class BNZ_W_ENC : MSA_CBRANCH_FMT<0b111, 0b10>; 537class BNZ_D_ENC : MSA_CBRANCH_FMT<0b111, 0b11>; 538 539class BNZ_V_ENC : MSA_CBRANCH_V_FMT<0b01000>; 540 541class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>; 542 543class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 544 545class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 546class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 547class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 548class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 549 550class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 551class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 552class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 553class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 554 555class BZ_B_ENC : MSA_CBRANCH_FMT<0b110, 0b00>; 556class BZ_H_ENC : MSA_CBRANCH_FMT<0b110, 0b01>; 557class BZ_W_ENC : MSA_CBRANCH_FMT<0b110, 0b10>; 558class BZ_D_ENC : MSA_CBRANCH_FMT<0b110, 0b11>; 559 560class BZ_V_ENC : MSA_CBRANCH_V_FMT<0b01011>; 561 562class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 563class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 564class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 565class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 566 567class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 568class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 569class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 570class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 571 572class CFCMSA_ENC : MSA_ELM_CFCMSA_FMT<0b0001111110, 0b011001>; 573 574class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 575class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 576class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 577class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 578 579class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 580class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 581class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 582class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 583 584class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 585class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 586class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 587class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 588 589class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 590class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 591class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 592class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 593 594class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 595class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 596class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 597class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 598 599class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 600class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 601class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 602class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 603 604class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 605class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 606class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 607class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 608 609class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 610class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 611class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 612class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 613 614class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>; 615class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>; 616class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>; 617 618class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; 619class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; 620class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; 621 622class CTCMSA_ENC : MSA_ELM_CTCMSA_FMT<0b0000111110, 0b011001>; 623 624class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 625class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 626class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 627class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 628 629class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 630class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 631class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 632class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 633 634class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 635class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 636class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 637 638class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 639class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 640class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 641 642class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 643class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 644class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 645 646class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 647class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 648class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 649 650class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 651class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 652class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 653 654class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 655class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 656class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 657 658class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 659class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 660 661class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 662class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 663 664class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 665class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 666 667class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 668class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 669 670class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 671class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 672 673class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 674class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 675 676class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 677class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 678 679class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 680class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 681 682class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 683class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 684 685class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 686class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 687 688class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 689class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 690 691class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 692class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 693 694class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 695class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 696 697class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 698class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 699 700class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 701class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 702 703class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 704class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 705 706class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 707class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 708 709class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 710class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 711 712class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 713class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 714 715class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 716class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 717 718class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 719class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 720 721class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 722class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 723 724class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 725class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 726class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 727 728class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 729class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 730 731class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 732class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 733 734class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 735class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 736 737class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 738class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 739 740class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 741class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 742 743class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 744class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 745 746class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 747class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 748 749class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 750class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 751 752class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 753class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 754 755class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 756class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 757 758class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 759class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 760 761class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 762class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 763 764class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 765class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 766 767class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 768class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 769 770class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 771class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 772 773class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 774class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 775 776class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 777class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 778 779class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 780class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 781 782class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 783class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 784 785class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 786class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 787 788class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 789class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 790 791class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 792class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 793 794class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 795class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 796 797class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 798class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 799 800class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 801class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 802 803class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 804class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 805 806class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 807class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 808 809class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 810class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 811 812class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 813class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 814 815class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 816class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 817class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 818 819class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 820class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 821class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 822 823class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 824class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 825class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 826 827class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 828class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 829class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 830 831class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 832class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 833class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 834class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 835 836class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 837class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 838class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 839class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 840 841class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 842class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 843class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 844class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 845 846class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 847class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 848class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 849class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 850 851class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>; 852class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>; 853class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>; 854 855class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 856class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 857class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 858class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 859 860class LD_B_ENC : MSA_MI10_FMT<0b00, 0b1000>; 861class LD_H_ENC : MSA_MI10_FMT<0b01, 0b1000>; 862class LD_W_ENC : MSA_MI10_FMT<0b10, 0b1000>; 863class LD_D_ENC : MSA_MI10_FMT<0b11, 0b1000>; 864 865class LDI_B_ENC : MSA_I10_FMT<0b110, 0b00, 0b000111>; 866class LDI_H_ENC : MSA_I10_FMT<0b110, 0b01, 0b000111>; 867class LDI_W_ENC : MSA_I10_FMT<0b110, 0b10, 0b000111>; 868class LDI_D_ENC : MSA_I10_FMT<0b110, 0b11, 0b000111>; 869 870class LSA_ENC : SPECIAL_LSA_FMT<0b000101>; 871 872class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 873class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 874 875class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 876class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 877 878class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 879class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 880class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 881class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 882 883class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 884class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 885class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 886class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 887 888class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 889class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 890class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 891class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 892 893class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 894class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 895class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 896class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 897 898class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 899class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 900class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 901class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 902 903class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 904class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 905class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 906class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 907 908class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 909class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 910class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 911class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 912 913class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 914class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 915class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 916class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 917 918class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 919class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 920class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 921class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 922 923class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 924class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 925class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 926class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 927 928class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 929class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 930class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 931class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 932 933class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 934class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 935class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 936class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 937 938class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 939class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 940class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 941class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 942 943class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 944 945class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 946class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 947 948class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 949class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 950 951class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 952class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 953class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 954class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 955 956class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 957class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 958 959class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 960class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 961 962class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 963class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 964class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 965class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 966 967class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 968class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 969class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 970class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 971 972class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 973class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 974class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 975class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 976 977class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 978 979class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 980 981class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 982 983class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 984 985class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 986class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 987class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 988class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 989 990class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 991class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 992class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 993class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 994 995class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 996class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 997class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 998class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 999 1000class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 1001class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 1002class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 1003class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 1004 1005class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 1006class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 1007class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 1008class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 1009 1010class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 1011class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 1012class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 1013 1014class SLD_B_ENC : MSA_3R_INDEX_FMT<0b000, 0b00, 0b010100>; 1015class SLD_H_ENC : MSA_3R_INDEX_FMT<0b000, 0b01, 0b010100>; 1016class SLD_W_ENC : MSA_3R_INDEX_FMT<0b000, 0b10, 0b010100>; 1017class SLD_D_ENC : MSA_3R_INDEX_FMT<0b000, 0b11, 0b010100>; 1018 1019class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 1020class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 1021class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 1022class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 1023 1024class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 1025class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 1026class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 1027class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 1028 1029class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 1030class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 1031class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 1032class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 1033 1034class SPLAT_B_ENC : MSA_3R_INDEX_FMT<0b001, 0b00, 0b010100>; 1035class SPLAT_H_ENC : MSA_3R_INDEX_FMT<0b001, 0b01, 0b010100>; 1036class SPLAT_W_ENC : MSA_3R_INDEX_FMT<0b001, 0b10, 0b010100>; 1037class SPLAT_D_ENC : MSA_3R_INDEX_FMT<0b001, 0b11, 0b010100>; 1038 1039class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 1040class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 1041class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 1042class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 1043 1044class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 1045class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 1046class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 1047class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 1048 1049class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 1050class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 1051class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 1052class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 1053 1054class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 1055class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 1056class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 1057class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 1058 1059class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 1060class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 1061class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 1062class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 1063 1064class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 1065class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 1066class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 1067class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 1068 1069class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 1070class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 1071class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 1072class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 1073 1074class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 1075class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 1076class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 1077class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 1078 1079class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 1080class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 1081class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 1082class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 1083 1084class ST_B_ENC : MSA_MI10_FMT<0b00, 0b1001>; 1085class ST_H_ENC : MSA_MI10_FMT<0b01, 0b1001>; 1086class ST_W_ENC : MSA_MI10_FMT<0b10, 0b1001>; 1087class ST_D_ENC : MSA_MI10_FMT<0b11, 0b1001>; 1088 1089class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 1090class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 1091class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 1092class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 1093 1094class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 1095class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 1096class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 1097class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 1098 1099class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 1100class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 1101class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 1102class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 1103 1104class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 1105class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 1106class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 1107class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 1108 1109class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 1110class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1111class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1112class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1113 1114class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1115class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1116class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1117class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1118 1119class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1120class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1121class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1122class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1123 1124class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1125 1126class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1127 1128// Instruction desc. 1129class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1130 ComplexPattern Imm, RegisterOperand ROWD, 1131 RegisterOperand ROWS = ROWD, 1132 InstrItinClass itin = NoItinerary> { 1133 dag OutOperandList = (outs ROWD:$wd); 1134 dag InOperandList = (ins ROWS:$ws, vsplat_uimm3:$m); 1135 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1136 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))]; 1137 InstrItinClass Itinerary = itin; 1138} 1139 1140class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1141 ComplexPattern Imm, RegisterOperand ROWD, 1142 RegisterOperand ROWS = ROWD, 1143 InstrItinClass itin = NoItinerary> { 1144 dag OutOperandList = (outs ROWD:$wd); 1145 dag InOperandList = (ins ROWS:$ws, vsplat_uimm4:$m); 1146 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1147 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))]; 1148 InstrItinClass Itinerary = itin; 1149} 1150 1151class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1152 ComplexPattern Imm, RegisterOperand ROWD, 1153 RegisterOperand ROWS = ROWD, 1154 InstrItinClass itin = NoItinerary> { 1155 dag OutOperandList = (outs ROWD:$wd); 1156 dag InOperandList = (ins ROWS:$ws, vsplat_uimm5:$m); 1157 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1158 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))]; 1159 InstrItinClass Itinerary = itin; 1160} 1161 1162class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1163 ComplexPattern Imm, RegisterOperand ROWD, 1164 RegisterOperand ROWS = ROWD, 1165 InstrItinClass itin = NoItinerary> { 1166 dag OutOperandList = (outs ROWD:$wd); 1167 dag InOperandList = (ins ROWS:$ws, vsplat_uimm6:$m); 1168 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1169 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, Imm:$m))]; 1170 InstrItinClass Itinerary = itin; 1171} 1172 1173// This class is deprecated and will be removed soon. 1174class MSA_BIT_B_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1175 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1176 InstrItinClass itin = NoItinerary> { 1177 dag OutOperandList = (outs ROWD:$wd); 1178 dag InOperandList = (ins ROWS:$ws, uimm3:$m); 1179 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1180 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))]; 1181 InstrItinClass Itinerary = itin; 1182} 1183 1184// This class is deprecated and will be removed soon. 1185class MSA_BIT_H_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1186 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1187 InstrItinClass itin = NoItinerary> { 1188 dag OutOperandList = (outs ROWD:$wd); 1189 dag InOperandList = (ins ROWS:$ws, uimm4:$m); 1190 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1191 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))]; 1192 InstrItinClass Itinerary = itin; 1193} 1194 1195// This class is deprecated and will be removed soon. 1196class MSA_BIT_W_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1197 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1198 InstrItinClass itin = NoItinerary> { 1199 dag OutOperandList = (outs ROWD:$wd); 1200 dag InOperandList = (ins ROWS:$ws, uimm5:$m); 1201 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1202 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))]; 1203 InstrItinClass Itinerary = itin; 1204} 1205 1206// This class is deprecated and will be removed soon. 1207class MSA_BIT_D_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1208 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1209 InstrItinClass itin = NoItinerary> { 1210 dag OutOperandList = (outs ROWD:$wd); 1211 dag InOperandList = (ins ROWS:$ws, uimm6:$m); 1212 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1213 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))]; 1214 InstrItinClass Itinerary = itin; 1215} 1216 1217class MSA_BIT_BINSXI_DESC_BASE<string instr_asm, ValueType Ty, 1218 ComplexPattern Mask, RegisterOperand ROWD, 1219 RegisterOperand ROWS = ROWD, 1220 InstrItinClass itin = NoItinerary> { 1221 dag OutOperandList = (outs ROWD:$wd); 1222 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, vsplat_uimm8:$m); 1223 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1224 list<dag> Pattern = [(set ROWD:$wd, (vselect (Ty Mask:$m), (Ty ROWD:$wd_in), 1225 ROWS:$ws))]; 1226 InstrItinClass Itinerary = itin; 1227 string Constraints = "$wd = $wd_in"; 1228} 1229 1230class MSA_BIT_BINSLI_DESC_BASE<string instr_asm, ValueType Ty, 1231 RegisterOperand ROWD, 1232 RegisterOperand ROWS = ROWD, 1233 InstrItinClass itin = NoItinerary> : 1234 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, vsplat_maskl_bits, ROWD, ROWS, itin>; 1235 1236class MSA_BIT_BINSRI_DESC_BASE<string instr_asm, ValueType Ty, 1237 RegisterOperand ROWD, 1238 RegisterOperand ROWS = ROWD, 1239 InstrItinClass itin = NoItinerary> : 1240 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, vsplat_maskr_bits, ROWD, ROWS, itin>; 1241 1242class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1243 SplatComplexPattern SplatImm, 1244 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1245 InstrItinClass itin = NoItinerary> { 1246 dag OutOperandList = (outs ROWD:$wd); 1247 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m); 1248 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1249 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))]; 1250 InstrItinClass Itinerary = itin; 1251} 1252 1253class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1254 ValueType VecTy, RegisterOperand ROD, 1255 RegisterOperand ROWS, 1256 InstrItinClass itin = NoItinerary> { 1257 dag OutOperandList = (outs ROD:$rd); 1258 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1259 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1260 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))]; 1261 InstrItinClass Itinerary = itin; 1262} 1263 1264class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1265 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1266 InstrItinClass itin = NoItinerary> { 1267 dag OutOperandList = (outs ROWD:$wd); 1268 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1269 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1270 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))]; 1271 InstrItinClass Itinerary = itin; 1272} 1273 1274class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1275 RegisterClass RCD, RegisterClass RCWS> : 1276 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1277 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1278 bit usesCustomInserter = 1; 1279} 1280 1281class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1282 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1283 RegisterOperand ROWS = ROWD, 1284 InstrItinClass itin = NoItinerary> { 1285 dag OutOperandList = (outs ROWD:$wd); 1286 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1287 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1288 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1289 InstrItinClass Itinerary = itin; 1290} 1291 1292class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1293 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1294 RegisterOperand ROWS = ROWD, 1295 InstrItinClass itin = NoItinerary> { 1296 dag OutOperandList = (outs ROWD:$wd); 1297 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1298 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1299 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1300 InstrItinClass Itinerary = itin; 1301} 1302 1303// This class is deprecated and will be removed in the next few patches 1304class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1305 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1306 InstrItinClass itin = NoItinerary> { 1307 dag OutOperandList = (outs ROWD:$wd); 1308 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1309 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1310 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1311 InstrItinClass Itinerary = itin; 1312} 1313 1314class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1315 RegisterOperand ROWS = ROWD, 1316 InstrItinClass itin = NoItinerary> { 1317 dag OutOperandList = (outs ROWD:$wd); 1318 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1319 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1320 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1321 InstrItinClass Itinerary = itin; 1322} 1323 1324class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1325 InstrItinClass itin = NoItinerary> { 1326 dag OutOperandList = (outs ROWD:$wd); 1327 dag InOperandList = (ins vsplat_simm10:$s10); 1328 string AsmString = !strconcat(instr_asm, "\t$wd, $s10"); 1329 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1330 list<dag> Pattern = []; 1331 bit hasSideEffects = 0; 1332 InstrItinClass Itinerary = itin; 1333} 1334 1335class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1336 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1337 InstrItinClass itin = NoItinerary> { 1338 dag OutOperandList = (outs ROWD:$wd); 1339 dag InOperandList = (ins ROWS:$ws); 1340 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1341 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1342 InstrItinClass Itinerary = itin; 1343} 1344 1345class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1346 SDPatternOperator OpNode, RegisterOperand ROWD, 1347 RegisterOperand ROS = ROWD, 1348 InstrItinClass itin = NoItinerary> { 1349 dag OutOperandList = (outs ROWD:$wd); 1350 dag InOperandList = (ins ROS:$rs); 1351 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1352 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))]; 1353 InstrItinClass Itinerary = itin; 1354} 1355 1356class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode, 1357 RegisterClass RCWD, RegisterClass RCWS = RCWD> : 1358 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs), 1359 [(set RCWD:$wd, (OpNode RCWS:$fs))]> { 1360 let usesCustomInserter = 1; 1361} 1362 1363class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1364 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1365 InstrItinClass itin = NoItinerary> { 1366 dag OutOperandList = (outs ROWD:$wd); 1367 dag InOperandList = (ins ROWS:$ws); 1368 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1369 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1370 InstrItinClass Itinerary = itin; 1371} 1372 1373class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1374 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1375 RegisterOperand ROWT = ROWD, 1376 InstrItinClass itin = NoItinerary> { 1377 dag OutOperandList = (outs ROWD:$wd); 1378 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1379 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1380 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1381 InstrItinClass Itinerary = itin; 1382} 1383 1384class MSA_3R_BINSX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1385 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1386 RegisterOperand ROWT = ROWD, 1387 InstrItinClass itin = NoItinerary> { 1388 dag OutOperandList = (outs ROWD:$wd); 1389 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1390 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1391 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, ROWS:$ws, 1392 ROWT:$wt))]; 1393 string Constraints = "$wd = $wd_in"; 1394 InstrItinClass Itinerary = itin; 1395} 1396 1397class MSA_3R_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1398 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1399 InstrItinClass itin = NoItinerary> { 1400 dag OutOperandList = (outs ROWD:$wd); 1401 dag InOperandList = (ins ROWS:$ws, GPR32:$rt); 1402 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]"); 1403 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, GPR32:$rt))]; 1404 InstrItinClass Itinerary = itin; 1405} 1406 1407class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1408 RegisterOperand ROWS = ROWD, 1409 RegisterOperand ROWT = ROWD, 1410 InstrItinClass itin = NoItinerary> { 1411 dag OutOperandList = (outs ROWD:$wd); 1412 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1413 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1414 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1415 ROWT:$wt))]; 1416 string Constraints = "$wd = $wd_in"; 1417 InstrItinClass Itinerary = itin; 1418} 1419 1420class MSA_3R_SLD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1421 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1422 InstrItinClass itin = NoItinerary> { 1423 dag OutOperandList = (outs ROWD:$wd); 1424 dag InOperandList = (ins ROWS:$ws, GPR32:$rt); 1425 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]"); 1426 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, GPR32:$rt))]; 1427 InstrItinClass Itinerary = itin; 1428} 1429 1430class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1431 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1432 RegisterOperand ROWT = ROWD, 1433 InstrItinClass itin = NoItinerary> { 1434 dag OutOperandList = (outs ROWD:$wd); 1435 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1436 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1437 list<dag> Pattern = [(set ROWD:$wd, 1438 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1439 InstrItinClass Itinerary = itin; 1440 string Constraints = "$wd = $wd_in"; 1441} 1442 1443class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1444 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1445 RegisterOperand ROWT = ROWD, 1446 InstrItinClass itin = NoItinerary> : 1447 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1448 1449class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1450 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1451 RegisterOperand ROWT = ROWD, 1452 InstrItinClass itin = NoItinerary> : 1453 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1454 1455class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterOperand ROWD> { 1456 dag OutOperandList = (outs); 1457 dag InOperandList = (ins ROWD:$wt, brtarget:$offset); 1458 string AsmString = !strconcat(instr_asm, "\t$wt, $offset"); 1459 list<dag> Pattern = []; 1460 InstrItinClass Itinerary = IIBranch; 1461 bit isBranch = 1; 1462 bit isTerminator = 1; 1463 bit hasDelaySlot = 1; 1464 list<Register> Defs = [AT]; 1465} 1466 1467class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1468 RegisterOperand ROWD, RegisterOperand ROS, 1469 InstrItinClass itin = NoItinerary> { 1470 dag OutOperandList = (outs ROWD:$wd); 1471 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n); 1472 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1473 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1474 ROS:$rs, 1475 immZExt6:$n))]; 1476 InstrItinClass Itinerary = itin; 1477 string Constraints = "$wd = $wd_in"; 1478} 1479 1480class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1481 RegisterOperand ROWD, RegisterOperand ROFS> : 1482 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs), 1483 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs, 1484 immZExt6:$n))]> { 1485 bit usesCustomInserter = 1; 1486 string Constraints = "$wd = $wd_in"; 1487} 1488 1489class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1490 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1491 InstrItinClass itin = NoItinerary> { 1492 dag OutOperandList = (outs ROWD:$wd); 1493 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws); 1494 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1495 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1496 immZExt6:$n, 1497 ROWS:$ws))]; 1498 InstrItinClass Itinerary = itin; 1499 string Constraints = "$wd = $wd_in"; 1500} 1501 1502class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1503 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1504 RegisterOperand ROWT = ROWD, 1505 InstrItinClass itin = NoItinerary> { 1506 dag OutOperandList = (outs ROWD:$wd); 1507 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1508 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1509 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1510 InstrItinClass Itinerary = itin; 1511} 1512 1513class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1514 RegisterOperand ROWD, 1515 RegisterOperand ROWS = ROWD, 1516 InstrItinClass itin = NoItinerary> { 1517 dag OutOperandList = (outs ROWD:$wd); 1518 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n); 1519 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1520 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws, 1521 ROWS:$ws))]; 1522 InstrItinClass Itinerary = itin; 1523} 1524 1525class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD, 1526 RegisterOperand ROWS = ROWD, 1527 RegisterOperand ROWT = ROWD> : 1528 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt), 1529 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>; 1530 1531class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1532 IsCommutable; 1533class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1534 IsCommutable; 1535class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1536 IsCommutable; 1537class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1538 IsCommutable; 1539 1540class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1541 MSA128BOpnd>, IsCommutable; 1542class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1543 MSA128HOpnd>, IsCommutable; 1544class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1545 MSA128WOpnd>, IsCommutable; 1546class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1547 MSA128DOpnd>, IsCommutable; 1548 1549class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1550 MSA128BOpnd>, IsCommutable; 1551class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1552 MSA128HOpnd>, IsCommutable; 1553class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1554 MSA128WOpnd>, IsCommutable; 1555class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1556 MSA128DOpnd>, IsCommutable; 1557 1558class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1559 MSA128BOpnd>, IsCommutable; 1560class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1561 MSA128HOpnd>, IsCommutable; 1562class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1563 MSA128WOpnd>, IsCommutable; 1564class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1565 MSA128DOpnd>, IsCommutable; 1566 1567class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1568class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1569class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1570class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1571 1572class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1573 MSA128BOpnd>; 1574class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1575 MSA128HOpnd>; 1576class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1577 MSA128WOpnd>; 1578class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1579 MSA128DOpnd>; 1580 1581class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>; 1582class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>; 1583class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>; 1584class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>; 1585 1586class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1587 MSA128BOpnd>; 1588 1589class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1590 MSA128BOpnd>; 1591class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1592 MSA128HOpnd>; 1593class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1594 MSA128WOpnd>; 1595class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1596 MSA128DOpnd>; 1597 1598class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1599 MSA128BOpnd>; 1600class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1601 MSA128HOpnd>; 1602class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1603 MSA128WOpnd>; 1604class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1605 MSA128DOpnd>; 1606 1607class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1608 IsCommutable; 1609class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1610 IsCommutable; 1611class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1612 IsCommutable; 1613class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1614 IsCommutable; 1615 1616class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1617 IsCommutable; 1618class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1619 IsCommutable; 1620class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1621 IsCommutable; 1622class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1623 IsCommutable; 1624 1625class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1626 MSA128BOpnd>, IsCommutable; 1627class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1628 MSA128HOpnd>, IsCommutable; 1629class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1630 MSA128WOpnd>, IsCommutable; 1631class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1632 MSA128DOpnd>, IsCommutable; 1633 1634class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1635 MSA128BOpnd>, IsCommutable; 1636class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1637 MSA128HOpnd>, IsCommutable; 1638class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1639 MSA128WOpnd>, IsCommutable; 1640class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1641 MSA128DOpnd>, IsCommutable; 1642 1643class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", vbclr_b, MSA128BOpnd>; 1644class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", vbclr_h, MSA128HOpnd>; 1645class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", vbclr_w, MSA128WOpnd>; 1646class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", vbclr_d, MSA128DOpnd>; 1647 1648class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", and, vsplat_uimm_inv_pow2, 1649 MSA128BOpnd>; 1650class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", and, vsplat_uimm_inv_pow2, 1651 MSA128HOpnd>; 1652class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", and, vsplat_uimm_inv_pow2, 1653 MSA128WOpnd>; 1654class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", and, vsplat_uimm_inv_pow2, 1655 MSA128DOpnd>; 1656 1657class BINSL_B_DESC : MSA_3R_BINSX_DESC_BASE<"binsl.b", int_mips_binsl_b, 1658 MSA128BOpnd>; 1659class BINSL_H_DESC : MSA_3R_BINSX_DESC_BASE<"binsl.h", int_mips_binsl_h, 1660 MSA128HOpnd>; 1661class BINSL_W_DESC : MSA_3R_BINSX_DESC_BASE<"binsl.w", int_mips_binsl_w, 1662 MSA128WOpnd>; 1663class BINSL_D_DESC : MSA_3R_BINSX_DESC_BASE<"binsl.d", int_mips_binsl_d, 1664 MSA128DOpnd>; 1665 1666class BINSLI_B_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.b", v16i8, MSA128BOpnd>; 1667class BINSLI_H_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.h", v8i16, MSA128HOpnd>; 1668class BINSLI_W_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.w", v4i32, MSA128WOpnd>; 1669class BINSLI_D_DESC : MSA_BIT_BINSLI_DESC_BASE<"binsli.d", v2i64, MSA128DOpnd>; 1670 1671class BINSR_B_DESC : MSA_3R_BINSX_DESC_BASE<"binsr.b", int_mips_binsr_b, 1672 MSA128BOpnd>; 1673class BINSR_H_DESC : MSA_3R_BINSX_DESC_BASE<"binsr.h", int_mips_binsr_h, 1674 MSA128HOpnd>; 1675class BINSR_W_DESC : MSA_3R_BINSX_DESC_BASE<"binsr.w", int_mips_binsr_w, 1676 MSA128WOpnd>; 1677class BINSR_D_DESC : MSA_3R_BINSX_DESC_BASE<"binsr.d", int_mips_binsr_d, 1678 MSA128DOpnd>; 1679 1680class BINSRI_B_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.b", v16i8, MSA128BOpnd>; 1681class BINSRI_H_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.h", v8i16, MSA128HOpnd>; 1682class BINSRI_W_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.w", v4i32, MSA128WOpnd>; 1683class BINSRI_D_DESC : MSA_BIT_BINSRI_DESC_BASE<"binsri.d", v2i64, MSA128DOpnd>; 1684 1685class BMNZ_V_DESC { 1686 dag OutOperandList = (outs MSA128BOpnd:$wd); 1687 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1688 MSA128BOpnd:$wt); 1689 string AsmString = "bmnz.v\t$wd, $ws, $wt"; 1690 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wt, 1691 MSA128BOpnd:$ws, 1692 MSA128BOpnd:$wd_in))]; 1693 InstrItinClass Itinerary = NoItinerary; 1694 string Constraints = "$wd = $wd_in"; 1695} 1696 1697class BMNZI_B_DESC { 1698 dag OutOperandList = (outs MSA128BOpnd:$wd); 1699 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1700 vsplat_uimm8:$u8); 1701 string AsmString = "bmnzi.b\t$wd, $ws, $u8"; 1702 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect vsplati8_uimm8:$u8, 1703 MSA128BOpnd:$ws, 1704 MSA128BOpnd:$wd_in))]; 1705 InstrItinClass Itinerary = NoItinerary; 1706 string Constraints = "$wd = $wd_in"; 1707} 1708 1709class BMZ_V_DESC { 1710 dag OutOperandList = (outs MSA128BOpnd:$wd); 1711 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1712 MSA128BOpnd:$wt); 1713 string AsmString = "bmz.v\t$wd, $ws, $wt"; 1714 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wt, 1715 MSA128BOpnd:$wd_in, 1716 MSA128BOpnd:$ws))]; 1717 InstrItinClass Itinerary = NoItinerary; 1718 string Constraints = "$wd = $wd_in"; 1719} 1720 1721class BMZI_B_DESC { 1722 dag OutOperandList = (outs MSA128BOpnd:$wd); 1723 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1724 vsplat_uimm8:$u8); 1725 string AsmString = "bmzi.b\t$wd, $ws, $u8"; 1726 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect vsplati8_uimm8:$u8, 1727 MSA128BOpnd:$wd_in, 1728 MSA128BOpnd:$ws))]; 1729 InstrItinClass Itinerary = NoItinerary; 1730 string Constraints = "$wd = $wd_in"; 1731} 1732 1733class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", vbneg_b, MSA128BOpnd>; 1734class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", vbneg_h, MSA128HOpnd>; 1735class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", vbneg_w, MSA128WOpnd>; 1736class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", vbneg_d, MSA128DOpnd>; 1737 1738class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", xor, vsplat_uimm_pow2, MSA128BOpnd>; 1739class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", xor, vsplat_uimm_pow2, MSA128HOpnd>; 1740class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", xor, vsplat_uimm_pow2, MSA128WOpnd>; 1741class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", xor, vsplat_uimm_pow2, MSA128DOpnd>; 1742 1743class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128BOpnd>; 1744class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128HOpnd>; 1745class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128WOpnd>; 1746class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128DOpnd>; 1747 1748class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128BOpnd>; 1749 1750class BSEL_V_DESC { 1751 dag OutOperandList = (outs MSA128BOpnd:$wd); 1752 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1753 MSA128BOpnd:$wt); 1754 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1755 list<dag> Pattern = [(set MSA128BOpnd:$wd, 1756 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1757 MSA128BOpnd:$wt))]; 1758 InstrItinClass Itinerary = NoItinerary; 1759 string Constraints = "$wd = $wd_in"; 1760} 1761 1762class BSELI_B_DESC { 1763 dag OutOperandList = (outs MSA128BOpnd:$wd); 1764 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1765 vsplat_uimm8:$u8); 1766 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1767 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1768 MSA128BOpnd:$ws, 1769 vsplati8_uimm8:$u8))]; 1770 InstrItinClass Itinerary = NoItinerary; 1771 string Constraints = "$wd = $wd_in"; 1772} 1773 1774class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", vbset_b, MSA128BOpnd>; 1775class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", vbset_h, MSA128HOpnd>; 1776class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", vbset_w, MSA128WOpnd>; 1777class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", vbset_d, MSA128DOpnd>; 1778 1779class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", or, vsplat_uimm_pow2, 1780 MSA128BOpnd>; 1781class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", or, vsplat_uimm_pow2, 1782 MSA128HOpnd>; 1783class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", or, vsplat_uimm_pow2, 1784 MSA128WOpnd>; 1785class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", or, vsplat_uimm_pow2, 1786 MSA128DOpnd>; 1787 1788class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128BOpnd>; 1789class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128HOpnd>; 1790class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128WOpnd>; 1791class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128DOpnd>; 1792 1793class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128BOpnd>; 1794 1795class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1796 IsCommutable; 1797class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1798 IsCommutable; 1799class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1800 IsCommutable; 1801class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1802 IsCommutable; 1803 1804class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1805 MSA128BOpnd>; 1806class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1807 MSA128HOpnd>; 1808class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1809 MSA128WOpnd>; 1810class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1811 MSA128DOpnd>; 1812 1813class CFCMSA_DESC { 1814 dag OutOperandList = (outs GPR32Opnd:$rd); 1815 dag InOperandList = (ins MSA128CROpnd:$cs); 1816 string AsmString = "cfcmsa\t$rd, $cs"; 1817 InstrItinClass Itinerary = NoItinerary; 1818 bit hasSideEffects = 1; 1819} 1820 1821class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1822class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1823class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1824class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1825 1826class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1827class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1828class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1829class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1830 1831class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1832 vsplati8_simm5, MSA128BOpnd>; 1833class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1834 vsplati16_simm5, MSA128HOpnd>; 1835class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1836 vsplati32_simm5, MSA128WOpnd>; 1837class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1838 vsplati64_simm5, MSA128DOpnd>; 1839 1840class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1841 vsplati8_uimm5, MSA128BOpnd>; 1842class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1843 vsplati16_uimm5, MSA128HOpnd>; 1844class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1845 vsplati32_uimm5, MSA128WOpnd>; 1846class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1847 vsplati64_uimm5, MSA128DOpnd>; 1848 1849class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1850class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1851class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1852class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1853 1854class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1855class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1856class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1857class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1858 1859class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1860 vsplati8_simm5, MSA128BOpnd>; 1861class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1862 vsplati16_simm5, MSA128HOpnd>; 1863class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1864 vsplati32_simm5, MSA128WOpnd>; 1865class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1866 vsplati64_simm5, MSA128DOpnd>; 1867 1868class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1869 vsplati8_uimm5, MSA128BOpnd>; 1870class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1871 vsplati16_uimm5, MSA128HOpnd>; 1872class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1873 vsplati32_uimm5, MSA128WOpnd>; 1874class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1875 vsplati64_uimm5, MSA128DOpnd>; 1876 1877class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1878 GPR32Opnd, MSA128BOpnd>; 1879class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1880 GPR32Opnd, MSA128HOpnd>; 1881class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1882 GPR32Opnd, MSA128WOpnd>; 1883 1884class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1885 GPR32Opnd, MSA128BOpnd>; 1886class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1887 GPR32Opnd, MSA128HOpnd>; 1888class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1889 GPR32Opnd, MSA128WOpnd>; 1890 1891class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1892 MSA128W>; 1893class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1894 MSA128D>; 1895 1896class CTCMSA_DESC { 1897 dag OutOperandList = (outs); 1898 dag InOperandList = (ins MSA128CROpnd:$cd, GPR32Opnd:$rs); 1899 string AsmString = "ctcmsa\t$cd, $rs"; 1900 InstrItinClass Itinerary = NoItinerary; 1901 bit hasSideEffects = 1; 1902} 1903 1904class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1905class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1906class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1907class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1908 1909class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1910class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1911class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1912class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1913 1914class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1915 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1916 IsCommutable; 1917class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1918 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1919 IsCommutable; 1920class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1921 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1922 IsCommutable; 1923 1924class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1925 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1926 IsCommutable; 1927class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1928 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1929 IsCommutable; 1930class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1931 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1932 IsCommutable; 1933 1934class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1935 MSA128HOpnd, MSA128BOpnd, 1936 MSA128BOpnd>, IsCommutable; 1937class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1938 MSA128WOpnd, MSA128HOpnd, 1939 MSA128HOpnd>, IsCommutable; 1940class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1941 MSA128DOpnd, MSA128WOpnd, 1942 MSA128WOpnd>, IsCommutable; 1943 1944class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1945 MSA128HOpnd, MSA128BOpnd, 1946 MSA128BOpnd>, IsCommutable; 1947class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1948 MSA128WOpnd, MSA128HOpnd, 1949 MSA128HOpnd>, IsCommutable; 1950class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1951 MSA128DOpnd, MSA128WOpnd, 1952 MSA128WOpnd>, IsCommutable; 1953 1954class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1955 MSA128HOpnd, MSA128BOpnd, 1956 MSA128BOpnd>; 1957class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1958 MSA128WOpnd, MSA128HOpnd, 1959 MSA128HOpnd>; 1960class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1961 MSA128DOpnd, MSA128WOpnd, 1962 MSA128WOpnd>; 1963 1964class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1965 MSA128HOpnd, MSA128BOpnd, 1966 MSA128BOpnd>; 1967class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1968 MSA128WOpnd, MSA128HOpnd, 1969 MSA128HOpnd>; 1970class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1971 MSA128DOpnd, MSA128WOpnd, 1972 MSA128WOpnd>; 1973 1974class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1975 IsCommutable; 1976class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1977 IsCommutable; 1978 1979class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1980 IsCommutable; 1981class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1982 IsCommutable; 1983 1984class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1985 IsCommutable; 1986class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1987 IsCommutable; 1988 1989class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1990 MSA128WOpnd>; 1991class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1992 MSA128DOpnd>; 1993 1994class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1995class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1996 1997class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1998class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1999 2000class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 2001 IsCommutable; 2002class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 2003 IsCommutable; 2004 2005class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 2006 IsCommutable; 2007class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 2008 IsCommutable; 2009 2010class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 2011 IsCommutable; 2012class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 2013 IsCommutable; 2014 2015class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 2016 IsCommutable; 2017class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 2018 IsCommutable; 2019 2020class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 2021 IsCommutable; 2022class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 2023 IsCommutable; 2024 2025class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 2026 IsCommutable; 2027class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 2028 IsCommutable; 2029 2030class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 2031 IsCommutable; 2032class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 2033 IsCommutable; 2034 2035class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 2036class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 2037 2038class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 2039 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 2040class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 2041 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 2042 2043// The fexp2.df instruction multiplies the first operand by 2 to the power of 2044// the second operand. We therefore need a pseudo-insn in order to invent the 2045// 1.0 when we only need to match ISD::FEXP2. 2046class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", mul_fexp2, MSA128WOpnd>; 2047class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", mul_fexp2, MSA128DOpnd>; 2048let usesCustomInserter = 1 in { 2049 class FEXP2_W_1_PSEUDO_DESC : 2050 MipsPseudo<(outs MSA128W:$wd), (ins MSA128W:$ws), 2051 [(set MSA128W:$wd, (fexp2 MSA128W:$ws))]>; 2052 class FEXP2_D_1_PSEUDO_DESC : 2053 MipsPseudo<(outs MSA128D:$wd), (ins MSA128D:$ws), 2054 [(set MSA128D:$wd, (fexp2 MSA128D:$ws))]>; 2055} 2056 2057class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 2058 MSA128WOpnd, MSA128HOpnd>; 2059class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 2060 MSA128DOpnd, MSA128WOpnd>; 2061 2062class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 2063 MSA128WOpnd, MSA128HOpnd>; 2064class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 2065 MSA128DOpnd, MSA128WOpnd>; 2066 2067class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 2068class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 2069 2070class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 2071class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 2072 2073class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 2074 MSA128WOpnd, MSA128HOpnd>; 2075class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 2076 MSA128DOpnd, MSA128WOpnd>; 2077 2078class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 2079 MSA128WOpnd, MSA128HOpnd>; 2080class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 2081 MSA128DOpnd, MSA128WOpnd>; 2082 2083class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 2084 MSA128BOpnd, GPR32Opnd>; 2085class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 2086 MSA128HOpnd, GPR32Opnd>; 2087class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 2088 MSA128WOpnd, GPR32Opnd>; 2089 2090class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W, 2091 FGR32>; 2092class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D, 2093 FGR64>; 2094 2095class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 2096class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 2097 2098class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 2099class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 2100 2101class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 2102class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 2103 2104class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 2105 MSA128WOpnd>; 2106class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 2107 MSA128DOpnd>; 2108 2109class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 2110class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 2111 2112class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 2113 MSA128WOpnd>; 2114class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 2115 MSA128DOpnd>; 2116 2117class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>; 2118class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>; 2119 2120class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 2121class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 2122 2123class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 2124class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 2125 2126class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 2127class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 2128 2129class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 2130 MSA128WOpnd>; 2131class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 2132 MSA128DOpnd>; 2133 2134class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 2135class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 2136 2137class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 2138class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 2139 2140class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 2141class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 2142 2143class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 2144class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 2145 2146class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 2147class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 2148 2149class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 2150class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 2151 2152class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 2153class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 2154 2155class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 2156class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 2157 2158class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 2159 MSA128WOpnd>; 2160class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 2161 MSA128DOpnd>; 2162 2163class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 2164 MSA128WOpnd>; 2165class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 2166 MSA128DOpnd>; 2167 2168class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 2169 MSA128WOpnd>; 2170class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 2171 MSA128DOpnd>; 2172 2173class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 2174 MSA128WOpnd>; 2175class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 2176 MSA128DOpnd>; 2177 2178class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 2179 MSA128WOpnd>; 2180class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 2181 MSA128DOpnd>; 2182 2183class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 2184 MSA128WOpnd>; 2185class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 2186 MSA128DOpnd>; 2187 2188class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 2189 MSA128WOpnd>; 2190class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 2191 MSA128DOpnd>; 2192 2193class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 2194 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 2195class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 2196 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 2197 2198class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 2199 MSA128WOpnd>; 2200class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 2201 MSA128DOpnd>; 2202 2203class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 2204 MSA128WOpnd>; 2205class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 2206 MSA128DOpnd>; 2207 2208class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 2209 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2210class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 2211 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2212class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 2213 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2214 2215class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 2216 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2217class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 2218 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2219class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 2220 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2221 2222class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 2223 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2224class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 2225 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2226class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 2227 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2228 2229class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 2230 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2231class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 2232 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2233class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 2234 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2235 2236class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 2237class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 2238class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 2239class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 2240 2241class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 2242class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 2243class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 2244class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 2245 2246class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 2247class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 2248class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 2249class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 2250 2251class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 2252class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 2253class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 2254class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 2255 2256class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, 2257 MSA128BOpnd, GPR32Opnd>; 2258class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, 2259 MSA128HOpnd, GPR32Opnd>; 2260class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, 2261 MSA128WOpnd, GPR32Opnd>; 2262 2263class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 2264 MSA128WOpnd, FGR32Opnd>; 2265class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 2266 MSA128DOpnd, FGR64Opnd>; 2267 2268class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, 2269 MSA128BOpnd>; 2270class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, 2271 MSA128HOpnd>; 2272class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, 2273 MSA128WOpnd>; 2274class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, 2275 MSA128DOpnd>; 2276 2277class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2278 ValueType TyNode, RegisterOperand ROWD, 2279 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 2280 InstrItinClass itin = NoItinerary> { 2281 dag OutOperandList = (outs ROWD:$wd); 2282 dag InOperandList = (ins MemOpnd:$addr); 2283 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2284 list<dag> Pattern = [(set ROWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2285 InstrItinClass Itinerary = itin; 2286 string DecoderMethod = "DecodeMSA128Mem"; 2287} 2288 2289class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128BOpnd>; 2290class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128HOpnd>; 2291class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128WOpnd>; 2292class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128DOpnd>; 2293 2294class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128BOpnd>; 2295class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128HOpnd>; 2296class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128WOpnd>; 2297class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128DOpnd>; 2298 2299class LSA_DESC { 2300 dag OutOperandList = (outs GPR32Opnd:$rd); 2301 dag InOperandList = (ins GPR32Opnd:$rs, GPR32Opnd:$rt, LSAImm:$sa); 2302 string AsmString = "lsa\t$rd, $rs, $rt, $sa"; 2303 list<dag> Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rs, 2304 (shl GPR32Opnd:$rt, 2305 immZExt2Lsa:$sa)))]; 2306 InstrItinClass Itinerary = NoItinerary; 2307} 2308 2309class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2310 MSA128HOpnd>; 2311class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2312 MSA128WOpnd>; 2313 2314class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2315 MSA128HOpnd>; 2316class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2317 MSA128WOpnd>; 2318 2319class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>; 2320class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>; 2321class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>; 2322class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>; 2323 2324class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2325class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2326class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2327class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2328 2329class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2330class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2331class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2332class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2333 2334class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2335class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2336class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2337class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2338 2339class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2340 MSA128BOpnd>; 2341class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2342 MSA128HOpnd>; 2343class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2344 MSA128WOpnd>; 2345class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2346 MSA128DOpnd>; 2347 2348class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2349 MSA128BOpnd>; 2350class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2351 MSA128HOpnd>; 2352class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2353 MSA128WOpnd>; 2354class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2355 MSA128DOpnd>; 2356 2357class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2358class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2359class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2360class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2361 2362class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2363class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2364class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2365class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2366 2367class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2368class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2369class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2370class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2371 2372class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2373 MSA128BOpnd>; 2374class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2375 MSA128HOpnd>; 2376class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2377 MSA128WOpnd>; 2378class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2379 MSA128DOpnd>; 2380 2381class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2382 MSA128BOpnd>; 2383class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2384 MSA128HOpnd>; 2385class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2386 MSA128WOpnd>; 2387class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2388 MSA128DOpnd>; 2389 2390class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2391class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2392class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2393class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2394 2395class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2396class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2397class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2398class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2399 2400class MOVE_V_DESC { 2401 dag OutOperandList = (outs MSA128BOpnd:$wd); 2402 dag InOperandList = (ins MSA128BOpnd:$ws); 2403 string AsmString = "move.v\t$wd, $ws"; 2404 list<dag> Pattern = []; 2405 InstrItinClass Itinerary = NoItinerary; 2406} 2407 2408class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2409 MSA128HOpnd>; 2410class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2411 MSA128WOpnd>; 2412 2413class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2414 MSA128HOpnd>; 2415class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2416 MSA128WOpnd>; 2417 2418class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>; 2419class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>; 2420class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>; 2421class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>; 2422 2423class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2424 MSA128HOpnd>; 2425class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2426 MSA128WOpnd>; 2427 2428class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2429 MSA128HOpnd>; 2430class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2431 MSA128WOpnd>; 2432 2433class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2434class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2435class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2436class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2437 2438class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2439class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2440class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2441class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2442 2443class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2444class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2445class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2446class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2447 2448class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>; 2449class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>; 2450class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>; 2451class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>; 2452 2453class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2454 MSA128BOpnd>; 2455 2456class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>; 2457class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>; 2458class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>; 2459class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>; 2460 2461class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2462 2463class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2464class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2465class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2466class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2467 2468class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2469class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2470class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2471class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2472 2473class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2474class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2475class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2476class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2477 2478class SAT_S_B_DESC : MSA_BIT_B_X_DESC_BASE<"sat_s.b", int_mips_sat_s_b, 2479 MSA128BOpnd>; 2480class SAT_S_H_DESC : MSA_BIT_H_X_DESC_BASE<"sat_s.h", int_mips_sat_s_h, 2481 MSA128HOpnd>; 2482class SAT_S_W_DESC : MSA_BIT_W_X_DESC_BASE<"sat_s.w", int_mips_sat_s_w, 2483 MSA128WOpnd>; 2484class SAT_S_D_DESC : MSA_BIT_D_X_DESC_BASE<"sat_s.d", int_mips_sat_s_d, 2485 MSA128DOpnd>; 2486 2487class SAT_U_B_DESC : MSA_BIT_B_X_DESC_BASE<"sat_u.b", int_mips_sat_u_b, 2488 MSA128BOpnd>; 2489class SAT_U_H_DESC : MSA_BIT_H_X_DESC_BASE<"sat_u.h", int_mips_sat_u_h, 2490 MSA128HOpnd>; 2491class SAT_U_W_DESC : MSA_BIT_W_X_DESC_BASE<"sat_u.w", int_mips_sat_u_w, 2492 MSA128WOpnd>; 2493class SAT_U_D_DESC : MSA_BIT_D_X_DESC_BASE<"sat_u.d", int_mips_sat_u_d, 2494 MSA128DOpnd>; 2495 2496class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2497class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2498class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2499 2500class SLD_B_DESC : MSA_3R_SLD_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2501class SLD_H_DESC : MSA_3R_SLD_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2502class SLD_W_DESC : MSA_3R_SLD_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2503class SLD_D_DESC : MSA_3R_SLD_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2504 2505class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>; 2506class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>; 2507class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>; 2508class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>; 2509 2510class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2511class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2512class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2513class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2514 2515class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2516 MSA128BOpnd>; 2517class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2518 MSA128HOpnd>; 2519class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2520 MSA128WOpnd>; 2521class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2522 MSA128DOpnd>; 2523 2524class SPLAT_B_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.b", vsplati8_elt, 2525 MSA128BOpnd>; 2526class SPLAT_H_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.h", vsplati16_elt, 2527 MSA128HOpnd>; 2528class SPLAT_W_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.w", vsplati32_elt, 2529 MSA128WOpnd>; 2530class SPLAT_D_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.d", vsplati64_elt, 2531 MSA128DOpnd>; 2532 2533class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2534 MSA128BOpnd>; 2535class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2536 MSA128HOpnd>; 2537class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2538 MSA128WOpnd>; 2539class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2540 MSA128DOpnd>; 2541 2542class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2543class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2544class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2545class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2546 2547class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2548 MSA128BOpnd>; 2549class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2550 MSA128HOpnd>; 2551class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2552 MSA128WOpnd>; 2553class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2554 MSA128DOpnd>; 2555 2556class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2557class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2558class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2559class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2560 2561class SRARI_B_DESC : MSA_BIT_B_X_DESC_BASE<"srari.b", int_mips_srari_b, 2562 MSA128BOpnd>; 2563class SRARI_H_DESC : MSA_BIT_H_X_DESC_BASE<"srari.h", int_mips_srari_h, 2564 MSA128HOpnd>; 2565class SRARI_W_DESC : MSA_BIT_W_X_DESC_BASE<"srari.w", int_mips_srari_w, 2566 MSA128WOpnd>; 2567class SRARI_D_DESC : MSA_BIT_D_X_DESC_BASE<"srari.d", int_mips_srari_d, 2568 MSA128DOpnd>; 2569 2570class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2571class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2572class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2573class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2574 2575class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2576 MSA128BOpnd>; 2577class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2578 MSA128HOpnd>; 2579class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2580 MSA128WOpnd>; 2581class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2582 MSA128DOpnd>; 2583 2584class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2585class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2586class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2587class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2588 2589class SRLRI_B_DESC : MSA_BIT_B_X_DESC_BASE<"srlri.b", int_mips_srlri_b, 2590 MSA128BOpnd>; 2591class SRLRI_H_DESC : MSA_BIT_H_X_DESC_BASE<"srlri.h", int_mips_srlri_h, 2592 MSA128HOpnd>; 2593class SRLRI_W_DESC : MSA_BIT_W_X_DESC_BASE<"srlri.w", int_mips_srlri_w, 2594 MSA128WOpnd>; 2595class SRLRI_D_DESC : MSA_BIT_D_X_DESC_BASE<"srlri.d", int_mips_srlri_d, 2596 MSA128DOpnd>; 2597 2598class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2599 ValueType TyNode, RegisterOperand ROWD, 2600 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 2601 InstrItinClass itin = NoItinerary> { 2602 dag OutOperandList = (outs); 2603 dag InOperandList = (ins ROWD:$wd, MemOpnd:$addr); 2604 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2605 list<dag> Pattern = [(OpNode (TyNode ROWD:$wd), Addr:$addr)]; 2606 InstrItinClass Itinerary = itin; 2607 string DecoderMethod = "DecodeMSA128Mem"; 2608} 2609 2610class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128BOpnd>; 2611class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128HOpnd>; 2612class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128WOpnd>; 2613class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128DOpnd>; 2614 2615class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2616 MSA128BOpnd>; 2617class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2618 MSA128HOpnd>; 2619class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2620 MSA128WOpnd>; 2621class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2622 MSA128DOpnd>; 2623 2624class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2625 MSA128BOpnd>; 2626class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2627 MSA128HOpnd>; 2628class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2629 MSA128WOpnd>; 2630class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2631 MSA128DOpnd>; 2632 2633class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2634 MSA128BOpnd>; 2635class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2636 MSA128HOpnd>; 2637class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2638 MSA128WOpnd>; 2639class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2640 MSA128DOpnd>; 2641 2642class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2643 MSA128BOpnd>; 2644class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2645 MSA128HOpnd>; 2646class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2647 MSA128WOpnd>; 2648class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2649 MSA128DOpnd>; 2650 2651class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2652class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2653class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2654class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2655 2656class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2657 MSA128BOpnd>; 2658class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2659 MSA128HOpnd>; 2660class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2661 MSA128WOpnd>; 2662class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2663 MSA128DOpnd>; 2664 2665class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2666class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2667class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2668class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2669 2670class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>; 2671class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>; 2672class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>; 2673class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>; 2674 2675class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2676 MSA128BOpnd>; 2677 2678// Instruction defs. 2679def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2680def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2681def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2682def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2683 2684def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2685def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2686def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2687def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2688 2689def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2690def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2691def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2692def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2693 2694def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2695def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2696def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2697def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2698 2699def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2700def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2701def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2702def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2703 2704def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2705def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2706def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2707def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2708 2709def AND_V : AND_V_ENC, AND_V_DESC; 2710def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2711 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2712 MSA128BOpnd:$ws, 2713 MSA128BOpnd:$wt)>; 2714def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2715 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2716 MSA128BOpnd:$ws, 2717 MSA128BOpnd:$wt)>; 2718def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2719 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2720 MSA128BOpnd:$ws, 2721 MSA128BOpnd:$wt)>; 2722 2723def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2724 2725def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2726def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2727def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2728def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2729 2730def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2731def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2732def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2733def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2734 2735def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2736def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2737def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2738def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2739 2740def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2741def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2742def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2743def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2744 2745def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2746def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2747def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2748def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2749 2750def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2751def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2752def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2753def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2754 2755def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2756def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2757def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2758def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2759 2760def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2761def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2762def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2763def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2764 2765def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2766def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2767def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2768def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2769 2770def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2771def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2772def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2773def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2774 2775def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2776def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2777def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2778def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2779 2780def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2781def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2782def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2783def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2784 2785def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2786 2787def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2788 2789def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2790 2791def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2792 2793def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2794def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2795def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2796def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2797 2798def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2799def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2800def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2801def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2802 2803def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2804def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2805def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2806def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2807 2808def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2809 2810def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2811 2812class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> : 2813 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt), 2814 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>, 2815 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in, 2816 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> { 2817 let Constraints = "$wd_in = $wd"; 2818} 2819 2820def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>; 2821def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>; 2822def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>; 2823def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>; 2824def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>; 2825 2826def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2827 2828def BSET_B : BSET_B_ENC, BSET_B_DESC; 2829def BSET_H : BSET_H_ENC, BSET_H_DESC; 2830def BSET_W : BSET_W_ENC, BSET_W_DESC; 2831def BSET_D : BSET_D_ENC, BSET_D_DESC; 2832 2833def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2834def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2835def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2836def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2837 2838def BZ_B : BZ_B_ENC, BZ_B_DESC; 2839def BZ_H : BZ_H_ENC, BZ_H_DESC; 2840def BZ_W : BZ_W_ENC, BZ_W_DESC; 2841def BZ_D : BZ_D_ENC, BZ_D_DESC; 2842 2843def BZ_V : BZ_V_ENC, BZ_V_DESC; 2844 2845def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2846def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2847def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2848def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2849 2850def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2851def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2852def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2853def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2854 2855def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2856 2857def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2858def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2859def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2860def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2861 2862def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2863def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2864def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2865def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2866 2867def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2868def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2869def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2870def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2871 2872def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2873def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2874def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2875def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2876 2877def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2878def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2879def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2880def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2881 2882def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2883def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2884def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2885def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2886 2887def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2888def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2889def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2890def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2891 2892def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2893def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2894def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2895def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2896 2897def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2898def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2899def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2900 2901def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2902def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2903def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2904 2905def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2906def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2907 2908def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2909 2910def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2911def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2912def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2913def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2914 2915def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2916def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2917def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2918def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2919 2920def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2921def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2922def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2923 2924def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2925def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2926def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2927 2928def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2929def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2930def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2931 2932def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2933def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2934def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2935 2936def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2937def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2938def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2939 2940def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2941def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2942def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2943 2944def FADD_W : FADD_W_ENC, FADD_W_DESC; 2945def FADD_D : FADD_D_ENC, FADD_D_DESC; 2946 2947def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2948def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2949 2950def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2951def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2952 2953def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2954def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2955 2956def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2957def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2958 2959def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2960def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2961 2962def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2963def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2964 2965def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2966def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2967 2968def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2969def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2970 2971def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2972def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2973 2974def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2975def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2976 2977def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2978def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2979 2980def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2981def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2982 2983def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2984def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2985 2986def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2987def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2988 2989def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2990def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2991def FEXP2_W_1_PSEUDO : FEXP2_W_1_PSEUDO_DESC; 2992def FEXP2_D_1_PSEUDO : FEXP2_D_1_PSEUDO_DESC; 2993 2994def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2995def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2996 2997def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2998def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2999 3000def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 3001def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 3002 3003def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 3004def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 3005 3006def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 3007def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 3008 3009def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 3010def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 3011 3012def FILL_B : FILL_B_ENC, FILL_B_DESC; 3013def FILL_H : FILL_H_ENC, FILL_H_DESC; 3014def FILL_W : FILL_W_ENC, FILL_W_DESC; 3015def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC; 3016def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC; 3017 3018def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 3019def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 3020 3021def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 3022def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 3023 3024def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 3025def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 3026 3027def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 3028def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 3029 3030def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 3031def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 3032 3033def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 3034def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 3035 3036def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 3037def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 3038 3039def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 3040def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 3041 3042def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 3043def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 3044 3045def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 3046def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 3047 3048def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 3049def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 3050 3051def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 3052def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 3053 3054def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 3055def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 3056 3057def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 3058def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 3059 3060def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 3061def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 3062 3063def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 3064def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 3065 3066def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 3067def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 3068 3069def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 3070def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 3071 3072def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 3073def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 3074 3075def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 3076def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 3077 3078def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 3079def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 3080 3081def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 3082def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 3083 3084def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 3085def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 3086 3087def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 3088def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 3089 3090def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 3091def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 3092 3093def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 3094def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 3095 3096def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 3097def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 3098 3099def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 3100def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 3101 3102def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 3103def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 3104 3105def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 3106def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 3107def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 3108 3109def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 3110def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 3111def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 3112 3113def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 3114def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 3115def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 3116 3117def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 3118def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 3119def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 3120 3121def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 3122def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 3123def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 3124def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 3125 3126def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 3127def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 3128def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 3129def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 3130 3131def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 3132def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 3133def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 3134def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 3135 3136def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 3137def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 3138def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 3139def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 3140 3141def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 3142def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 3143def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 3144 3145// INSERT_FW_PSEUDO defined after INSVE_W 3146// INSERT_FD_PSEUDO defined after INSVE_D 3147 3148def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 3149def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 3150def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 3151def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 3152 3153def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 3154def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 3155 3156def LD_B: LD_B_ENC, LD_B_DESC; 3157def LD_H: LD_H_ENC, LD_H_DESC; 3158def LD_W: LD_W_ENC, LD_W_DESC; 3159def LD_D: LD_D_ENC, LD_D_DESC; 3160 3161def LDI_B : LDI_B_ENC, LDI_B_DESC; 3162def LDI_H : LDI_H_ENC, LDI_H_DESC; 3163def LDI_W : LDI_W_ENC, LDI_W_DESC; 3164def LDI_D : LDI_D_ENC, LDI_D_DESC; 3165 3166def LSA : LSA_ENC, LSA_DESC; 3167 3168def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 3169def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 3170 3171def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 3172def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 3173 3174def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 3175def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 3176def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 3177def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 3178 3179def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 3180def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 3181def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 3182def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 3183 3184def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 3185def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 3186def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 3187def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 3188 3189def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 3190def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 3191def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 3192def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 3193 3194def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 3195def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 3196def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 3197def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 3198 3199def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 3200def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 3201def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 3202def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 3203 3204def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 3205def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 3206def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 3207def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 3208 3209def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 3210def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 3211def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 3212def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 3213 3214def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 3215def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 3216def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 3217def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 3218 3219def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 3220def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 3221def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 3222def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 3223 3224def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 3225def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 3226def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 3227def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 3228 3229def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 3230def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 3231def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 3232def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 3233 3234def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 3235def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 3236def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 3237def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 3238 3239def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 3240 3241def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 3242def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 3243 3244def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 3245def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 3246 3247def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 3248def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 3249def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 3250def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 3251 3252def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 3253def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 3254 3255def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 3256def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 3257 3258def MULV_B : MULV_B_ENC, MULV_B_DESC; 3259def MULV_H : MULV_H_ENC, MULV_H_DESC; 3260def MULV_W : MULV_W_ENC, MULV_W_DESC; 3261def MULV_D : MULV_D_ENC, MULV_D_DESC; 3262 3263def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 3264def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 3265def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 3266def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 3267 3268def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 3269def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 3270def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 3271def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 3272 3273def NOR_V : NOR_V_ENC, NOR_V_DESC; 3274def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 3275 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3276 MSA128BOpnd:$ws, 3277 MSA128BOpnd:$wt)>; 3278def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 3279 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3280 MSA128BOpnd:$ws, 3281 MSA128BOpnd:$wt)>; 3282def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 3283 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3284 MSA128BOpnd:$ws, 3285 MSA128BOpnd:$wt)>; 3286 3287def NORI_B : NORI_B_ENC, NORI_B_DESC; 3288 3289def OR_V : OR_V_ENC, OR_V_DESC; 3290def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 3291 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3292 MSA128BOpnd:$ws, 3293 MSA128BOpnd:$wt)>; 3294def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 3295 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3296 MSA128BOpnd:$ws, 3297 MSA128BOpnd:$wt)>; 3298def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3299 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3300 MSA128BOpnd:$ws, 3301 MSA128BOpnd:$wt)>; 3302 3303def ORI_B : ORI_B_ENC, ORI_B_DESC; 3304 3305def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3306def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3307def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3308def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3309 3310def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3311def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3312def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3313def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3314 3315def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3316def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3317def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3318def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3319 3320def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3321def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3322def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3323def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3324 3325def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3326def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3327def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3328def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3329 3330def SHF_B : SHF_B_ENC, SHF_B_DESC; 3331def SHF_H : SHF_H_ENC, SHF_H_DESC; 3332def SHF_W : SHF_W_ENC, SHF_W_DESC; 3333 3334def SLD_B : SLD_B_ENC, SLD_B_DESC; 3335def SLD_H : SLD_H_ENC, SLD_H_DESC; 3336def SLD_W : SLD_W_ENC, SLD_W_DESC; 3337def SLD_D : SLD_D_ENC, SLD_D_DESC; 3338 3339def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3340def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3341def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3342def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3343 3344def SLL_B : SLL_B_ENC, SLL_B_DESC; 3345def SLL_H : SLL_H_ENC, SLL_H_DESC; 3346def SLL_W : SLL_W_ENC, SLL_W_DESC; 3347def SLL_D : SLL_D_ENC, SLL_D_DESC; 3348 3349def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3350def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3351def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3352def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3353 3354def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3355def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3356def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3357def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3358 3359def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3360def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3361def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3362def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3363 3364def SRA_B : SRA_B_ENC, SRA_B_DESC; 3365def SRA_H : SRA_H_ENC, SRA_H_DESC; 3366def SRA_W : SRA_W_ENC, SRA_W_DESC; 3367def SRA_D : SRA_D_ENC, SRA_D_DESC; 3368 3369def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3370def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3371def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3372def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3373 3374def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3375def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3376def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3377def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3378 3379def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3380def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3381def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3382def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3383 3384def SRL_B : SRL_B_ENC, SRL_B_DESC; 3385def SRL_H : SRL_H_ENC, SRL_H_DESC; 3386def SRL_W : SRL_W_ENC, SRL_W_DESC; 3387def SRL_D : SRL_D_ENC, SRL_D_DESC; 3388 3389def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3390def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3391def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3392def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3393 3394def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3395def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3396def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3397def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3398 3399def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3400def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3401def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3402def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3403 3404def ST_B: ST_B_ENC, ST_B_DESC; 3405def ST_H: ST_H_ENC, ST_H_DESC; 3406def ST_W: ST_W_ENC, ST_W_DESC; 3407def ST_D: ST_D_ENC, ST_D_DESC; 3408 3409def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3410def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3411def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3412def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3413 3414def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3415def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3416def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3417def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3418 3419def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3420def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3421def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3422def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3423 3424def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3425def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3426def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3427def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3428 3429def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3430def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3431def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3432def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3433 3434def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3435def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3436def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3437def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3438 3439def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3440def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3441def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3442def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3443 3444def XOR_V : XOR_V_ENC, XOR_V_DESC; 3445def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3446 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3447 MSA128BOpnd:$ws, 3448 MSA128BOpnd:$wt)>; 3449def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3450 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3451 MSA128BOpnd:$ws, 3452 MSA128BOpnd:$wt)>; 3453def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3454 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3455 MSA128BOpnd:$ws, 3456 MSA128BOpnd:$wt)>; 3457 3458def XORI_B : XORI_B_ENC, XORI_B_DESC; 3459 3460// Patterns. 3461class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3462 Pat<pattern, result>, Requires<pred>; 3463 3464def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3465 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3466 3467def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3468def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3469def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3470def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3471def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3472def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3473def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3474 3475def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3476def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3477def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3478 3479def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3480 (ST_B MSA128B:$ws, addr:$addr)>; 3481def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3482 (ST_H MSA128H:$ws, addr:$addr)>; 3483def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3484 (ST_W MSA128W:$ws, addr:$addr)>; 3485def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3486 (ST_D MSA128D:$ws, addr:$addr)>; 3487def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3488 (ST_H MSA128H:$ws, addr:$addr)>; 3489def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3490 (ST_W MSA128W:$ws, addr:$addr)>; 3491def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3492 (ST_D MSA128D:$ws, addr:$addr)>; 3493 3494def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3495 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3496def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3497 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3498def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3499 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3500 3501class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3502 RegisterOperand ROWS = ROWD, 3503 InstrItinClass itin = NoItinerary> : 3504 MipsPseudo<(outs ROWD:$wd), 3505 (ins ROWS:$ws), 3506 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3507 InstrItinClass Itinerary = itin; 3508} 3509def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3510 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3511 MSA128WOpnd:$ws)>; 3512def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3513 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3514 MSA128DOpnd:$ws)>; 3515 3516class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3517 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3518 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3519 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3520 3521// These are endian-independant because the element size doesnt change 3522def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3523def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3524def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3525def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3526def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3527def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3528 3529// Little endian bitcasts are always no-ops 3530def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3531def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3532def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3533def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3534def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3535def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3536 3537def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3538def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3539def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3540def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3541def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3542 3543def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3544def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3545def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3546def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3547def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3548 3549def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3550def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3551def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3552def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3553def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3554 3555def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3556def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3557def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3558def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3559def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3560 3561def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3562def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3563def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3564def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3565def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3566 3567// Big endian bitcasts expand to shuffle instructions. 3568// This is because bitcast is defined to be a store/load sequence and the 3569// vector store/load instructions are mixed-endian with respect to the vector 3570// as a whole (little endian with respect to element order, but big endian 3571// elements). 3572 3573class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3574 RegisterClass DstRC, MSAInst Insn, 3575 RegisterClass ViaRC> : 3576 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3577 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3578 DstRC), 3579 [HasMSA, IsBE]>; 3580 3581class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3582 RegisterClass DstRC, MSAInst Insn, 3583 RegisterClass ViaRC> : 3584 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3585 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3586 DstRC), 3587 [HasMSA, IsBE]>; 3588 3589class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3590 RegisterClass DstRC> : 3591 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3592 3593class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3594 RegisterClass DstRC> : 3595 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3596 3597class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3598 RegisterClass DstRC> : 3599 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3600 (COPY_TO_REGCLASS 3601 (SHF_W 3602 (COPY_TO_REGCLASS 3603 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3604 MSA128W), 177), 3605 DstRC), 3606 [HasMSA, IsBE]>; 3607 3608class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3609 RegisterClass DstRC> : 3610 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3611 3612class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3613 RegisterClass DstRC> : 3614 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3615 3616class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3617 RegisterClass DstRC> : 3618 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3619 3620def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3621def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3622def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3623def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3624def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3625def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3626 3627def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3628def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3629def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3630def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3631def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3632 3633def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3634def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3635def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3636def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3637def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3638 3639def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3640def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3641def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3642def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3643def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3644 3645def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3646def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3647def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3648def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3649def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3650 3651def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3652def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3653def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3654def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3655def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3656 3657def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3658def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3659def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3660def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3661def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3662 3663// Pseudos used to implement BNZ.df, and BZ.df 3664 3665class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3666 RegisterClass RCWS, 3667 InstrItinClass itin = NoItinerary> : 3668 MipsPseudo<(outs GPR32:$dst), 3669 (ins RCWS:$ws), 3670 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3671 bit usesCustomInserter = 1; 3672} 3673 3674def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3675 MSA128B, NoItinerary>; 3676def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3677 MSA128H, NoItinerary>; 3678def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3679 MSA128W, NoItinerary>; 3680def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3681 MSA128D, NoItinerary>; 3682def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3683 MSA128B, NoItinerary>; 3684 3685def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3686 MSA128B, NoItinerary>; 3687def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3688 MSA128H, NoItinerary>; 3689def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3690 MSA128W, NoItinerary>; 3691def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3692 MSA128D, NoItinerary>; 3693def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3694 MSA128B, NoItinerary>; 3695