MipsMSAInstrInfo.td revision a399d698a84ffd22c7d1f121c24cbc147c6f4e06
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsSplat : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisInt<1>]>; 15def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 16 17def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 18def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 19def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 20def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 21def MipsVSplat : SDNode<"MipsISD::VSPLAT", SDT_MipsSplat>; 22def MipsVSplatD : SDNode<"MipsISD::VSPLATD", SDT_MipsSplat>; 23def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 24 [SDNPCommutative, SDNPAssociative]>; 25 26def vsplati8 : PatFrag<(ops node:$in), (v16i8 (MipsVSplat (i32 node:$in)))>; 27def vsplati16 : PatFrag<(ops node:$in), (v8i16 (MipsVSplat (i32 node:$in)))>; 28def vsplati32 : PatFrag<(ops node:$in), (v4i32 (MipsVSplat (i32 node:$in)))>; 29def vsplati64 : PatFrag<(ops node:$in), (v2i64 (MipsVSplatD (i32 node:$in)))>; 30 31// Immediates 32def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 33def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 34 35def uimm3 : Operand<i32> { 36 let PrintMethod = "printUnsignedImm"; 37} 38 39def uimm4 : Operand<i32> { 40 let PrintMethod = "printUnsignedImm"; 41} 42 43def uimm8 : Operand<i32> { 44 let PrintMethod = "printUnsignedImm"; 45} 46 47def simm5 : Operand<i32>; 48 49def simm10 : Operand<i32>; 50 51// Instruction encoding. 52class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 53class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 54class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 55class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 56 57class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 58class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 59class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 60class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 61 62class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 63class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 64class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 65class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 66 67class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 68class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 69class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 70class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 71 72class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 73class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 74class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 75class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 76 77class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 78class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 79class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 80class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 81 82class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 83 84class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 85 86class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 87class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 88class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 89class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 90 91class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 92class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 93class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 94class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 95 96class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 97class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 98class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 99class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 100 101class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 102class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 103class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 104class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 105 106class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 107class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 108class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 109class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 110 111class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 112class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 113class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 114class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 115 116class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 117class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 118class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 119class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 120 121class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 122class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 123class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 124class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 125 126class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 127class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 128class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 129class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 130 131class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 132class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 133class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 134class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 135 136class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 137class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 138class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 139class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 140 141class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 142class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 143class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 144class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 145 146class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 147 148class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 149 150class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 151 152class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 153 154class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 155class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 156class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 157class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 158 159class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 160class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 161class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 162class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 163 164class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 165class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 166class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 167class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 168 169class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 170 171class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 172 173class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 174 175class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 176class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 177class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 178class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 179 180class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 181class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 182class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 183class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 184 185class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 186class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 187class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 188class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 189 190class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 191 192class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 193class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 194class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 195class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 196 197class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 198class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 199class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 200class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 201 202class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 203 204class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 205class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 206class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 207class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 208 209class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 210class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 211class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 212class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 213 214class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 215class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 216class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 217class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 218 219class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 220class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 221class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 222class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 223 224class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 225class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 226class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 227class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 228 229class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 230class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 231class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 232class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 233 234class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 235class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 236class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 237class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 238 239class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 240class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 241class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 242class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 243 244class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 245class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 246class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 247 248class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 249class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 250class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 251 252class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 253 254class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 255class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 256class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 257class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 258 259class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 260class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 261class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 262class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 263 264class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 265class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 266class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 267 268class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 269class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 270class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 271 272class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 273class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 274class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 275 276class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 277class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 278class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 279 280class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 281class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 282class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 283 284class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 285class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 286class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 287 288class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 289class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 290 291class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 292class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 293 294class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 295class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 296 297class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 298class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 299 300class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 301class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 302 303class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 304class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 305 306class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 307class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 308 309class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 310class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 311 312class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 313class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 314 315class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 316class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 317 318class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 319class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 320 321class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 322class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 323 324class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 325class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 326 327class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 328class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 329 330class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 331class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 332 333class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 334class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 335 336class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 337class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 338 339class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 340class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 341 342class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 343class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 344 345class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 346class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 347 348class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 349class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 350 351class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 352class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 353 354class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 355class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 356class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 357 358class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 359class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 360 361class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 362class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 363 364class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 365class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 366 367class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 368class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 369 370class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 371class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 372 373class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 374class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 375 376class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 377class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 378 379class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 380class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 381 382class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 383class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 384 385class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 386class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 387 388class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 389class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 390 391class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 392class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 393 394class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 395class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 396 397class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 398class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 399 400class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 401class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 402 403class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 404class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 405 406class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 407class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 408 409class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 410class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 411 412class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 413class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 414 415class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 416class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 417 418class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 419class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 420 421class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 422class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 423 424class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 425class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 426 427class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 428class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 429 430class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>; 431class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>; 432 433class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>; 434class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>; 435 436class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 437class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 438 439class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 440class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 441 442class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 443class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 444 445class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 446class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 447class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 448 449class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 450class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 451class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 452 453class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 454class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 455class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 456 457class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 458class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 459class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 460 461class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 462class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 463class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 464class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 465 466class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 467class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 468class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 469class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 470 471class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 472class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 473class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 474class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 475 476class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 477class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 478class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 479class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 480 481class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 482class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 483class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 484 485class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 486class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 487class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 488class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 489 490class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 491class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 492class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 493class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 494 495class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 496class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 497class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 498class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 499 500class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 501class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 502class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 503class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 504 505class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 506class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 507 508class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 509class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 510 511class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 512class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 513class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 514class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 515 516class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 517class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 518class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 519class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 520 521class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 522class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 523class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 524class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 525 526class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 527class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 528class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 529class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 530 531class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 532class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 533class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 534class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 535 536class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 537class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 538class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 539class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 540 541class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 542class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 543class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 544class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 545 546class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 547class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 548class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 549class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 550 551class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 552class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 553class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 554class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 555 556class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 557class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 558class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 559class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 560 561class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 562class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 563class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 564class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 565 566class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 567class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 568class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 569class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 570 571class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 572class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 573class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 574class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 575 576class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 577 578class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 579class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 580 581class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 582class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 583 584class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 585class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 586class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 587class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 588 589class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>; 590class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>; 591 592class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 593class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 594 595class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 596class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 597class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 598class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 599 600class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 601class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 602class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 603class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 604 605class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 606class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 607class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 608class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 609 610class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 611 612class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 613 614class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 615 616class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 617 618class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 619class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 620class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 621class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 622 623class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 624class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 625class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 626class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 627 628class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 629class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 630class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 631class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 632 633class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 634class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 635class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 636class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 637 638class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 639class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 640class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 641class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 642 643class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 644class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 645class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 646 647class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 648class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 649class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 650class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 651 652class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 653class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 654class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 655class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 656 657class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 658class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 659class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 660class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 661 662class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 663class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 664class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 665class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 666 667class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 668class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 669class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 670class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 671 672class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 673class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 674class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 675class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 676 677class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 678class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 679class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 680class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 681 682class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 683class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 684class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 685class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 686 687class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 688class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 689class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 690class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 691 692class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 693class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 694class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 695class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 696 697class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 698class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 699class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 700class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 701 702class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 703class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 704class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 705class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 706 707class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 708class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 709class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 710class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 711 712class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 713class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 714class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 715class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 716 717class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 718class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 719class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 720class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 721 722class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 723class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 724class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 725class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 726 727class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 728class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 729class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 730class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 731 732class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 733class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 734class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 735class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 736 737class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 738class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 739class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 740class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 741 742class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 743class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 744class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 745class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 746 747class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 748class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 749class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 750class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 751 752class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 753class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 754class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 755class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 756 757class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 758class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 759class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 760class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 761 762class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 763 764class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 765 766// Instruction desc. 767class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 768 RegisterClass RCWD, RegisterClass RCWS = RCWD, 769 InstrItinClass itin = NoItinerary> { 770 dag OutOperandList = (outs RCWD:$wd); 771 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 772 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 773 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 774 InstrItinClass Itinerary = itin; 775} 776 777class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 778 RegisterClass RCWD, RegisterClass RCWS = RCWD, 779 InstrItinClass itin = NoItinerary> { 780 dag OutOperandList = (outs RCWD:$wd); 781 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 782 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 783 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 784 InstrItinClass Itinerary = itin; 785} 786 787class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 788 RegisterClass RCWD, RegisterClass RCWS = RCWD, 789 InstrItinClass itin = NoItinerary> { 790 dag OutOperandList = (outs RCWD:$wd); 791 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 792 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 793 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 794 InstrItinClass Itinerary = itin; 795} 796 797class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 798 RegisterClass RCWD, RegisterClass RCWS = RCWD, 799 InstrItinClass itin = NoItinerary> { 800 dag OutOperandList = (outs RCWD:$wd); 801 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 802 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 803 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 804 InstrItinClass Itinerary = itin; 805} 806 807class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 808 RegisterClass RCD, RegisterClass RCWS, 809 InstrItinClass itin = NoItinerary> { 810 dag OutOperandList = (outs RCD:$rd); 811 dag InOperandList = (ins RCWS:$ws, uimm6:$n); 812 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 813 list<dag> Pattern = [(set RCD:$rd, (OpNode RCWS:$ws, immZExt6:$n))]; 814 InstrItinClass Itinerary = itin; 815} 816 817class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 818 RegisterClass RCWD, RegisterClass RCWS = RCWD, 819 InstrItinClass itin = NoItinerary> { 820 dag OutOperandList = (outs RCWD:$wd); 821 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 822 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 823 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 824 InstrItinClass Itinerary = itin; 825} 826 827class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 828 RegisterClass RCWD, RegisterClass RCWS = RCWD, 829 InstrItinClass itin = NoItinerary> { 830 dag OutOperandList = (outs RCWD:$wd); 831 dag InOperandList = (ins RCWS:$ws, simm5:$s5); 832 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5"); 833 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immSExt5:$s5))]; 834 InstrItinClass Itinerary = itin; 835} 836 837class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 838 RegisterClass RCWD, RegisterClass RCWS = RCWD, 839 InstrItinClass itin = NoItinerary> { 840 dag OutOperandList = (outs RCWD:$wd); 841 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 842 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 843 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 844 InstrItinClass Itinerary = itin; 845} 846 847class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 848 RegisterClass RCWD, 849 InstrItinClass itin = NoItinerary> { 850 dag OutOperandList = (outs RCWD:$wd); 851 dag InOperandList = (ins simm10:$i10); 852 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 853 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))]; 854 InstrItinClass Itinerary = itin; 855} 856 857class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 858 RegisterClass RCWD, RegisterClass RCWS = RCWD, 859 InstrItinClass itin = NoItinerary> { 860 dag OutOperandList = (outs RCWD:$wd); 861 dag InOperandList = (ins RCWS:$ws); 862 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 863 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 864 InstrItinClass Itinerary = itin; 865} 866 867class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 868 RegisterClass RCWD, RegisterClass RCWS = RCWD, 869 InstrItinClass itin = NoItinerary> : 870 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>; 871 872 873class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 874 RegisterClass RCWD, RegisterClass RCWS = RCWD, 875 RegisterClass RCWT = RCWD, 876 InstrItinClass itin = NoItinerary> { 877 dag OutOperandList = (outs RCWD:$wd); 878 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 879 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 880 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 881 InstrItinClass Itinerary = itin; 882} 883 884class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 885 RegisterClass RCWD, RegisterClass RCWS = RCWD, 886 RegisterClass RCWT = RCWD, 887 InstrItinClass itin = NoItinerary> { 888 dag OutOperandList = (outs RCWD:$wd); 889 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 890 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 891 list<dag> Pattern = [(set RCWD:$wd, 892 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))]; 893 InstrItinClass Itinerary = itin; 894 string Constraints = "$wd = $wd_in"; 895} 896 897class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 898 RegisterClass RCWD, RegisterClass RCWS = RCWD, 899 RegisterClass RCWT = RCWD, 900 InstrItinClass itin = NoItinerary> : 901 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 902 903class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 904 RegisterClass RCWD, RegisterClass RCWS = RCWD, 905 RegisterClass RCWT = RCWD, 906 InstrItinClass itin = NoItinerary> : 907 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 908 909class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 910 dag OutOperandList = (outs); 911 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 912 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 913 list<dag> Pattern = []; 914 InstrItinClass Itinerary = IIBranch; 915 bit isBranch = 1; 916 bit isTerminator = 1; 917 bit hasDelaySlot = 1; 918 list<Register> Defs = [AT]; 919} 920 921class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 922 RegisterClass RCD, RegisterClass RCWS, 923 InstrItinClass itin = NoItinerary> { 924 dag OutOperandList = (outs RCD:$wd); 925 dag InOperandList = (ins RCD:$wd_in, uimm6:$n, RCWS:$rs); 926 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 927 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 928 immZExt6:$n, 929 RCWS:$rs))]; 930 InstrItinClass Itinerary = itin; 931 string Constraints = "$wd = $wd_in"; 932} 933 934class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 935 RegisterClass RCWD, RegisterClass RCWS = RCWD, 936 InstrItinClass itin = NoItinerary> { 937 dag OutOperandList = (outs RCWD:$wd); 938 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 939 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 940 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 941 immZExt6:$n, 942 RCWS:$ws))]; 943 InstrItinClass Itinerary = itin; 944 string Constraints = "$wd = $wd_in"; 945} 946 947class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 948 RegisterClass RCWD, RegisterClass RCWS = RCWD, 949 RegisterClass RCWT = RCWD, 950 InstrItinClass itin = NoItinerary> { 951 dag OutOperandList = (outs RCWD:$wd); 952 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 953 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 954 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 955 InstrItinClass Itinerary = itin; 956} 957 958class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 959 RegisterClass RCWS = RCWD, 960 RegisterClass RCWT = RCWD> : 961 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 962 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 963 964class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>, 965 IsCommutable; 966class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>, 967 IsCommutable; 968class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>, 969 IsCommutable; 970class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>, 971 IsCommutable; 972 973class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>, 974 IsCommutable; 975class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>, 976 IsCommutable; 977class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>, 978 IsCommutable; 979class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>, 980 IsCommutable; 981 982class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>, 983 IsCommutable; 984class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>, 985 IsCommutable; 986class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>, 987 IsCommutable; 988class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>, 989 IsCommutable; 990 991class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>, 992 IsCommutable; 993class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>, 994 IsCommutable; 995class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>, 996 IsCommutable; 997class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>, 998 IsCommutable; 999 1000class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable; 1001class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable; 1002class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable; 1003class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable; 1004 1005class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", int_mips_addvi_b, MSA128B>; 1006class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", int_mips_addvi_h, MSA128H>; 1007class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", int_mips_addvi_w, MSA128W>; 1008class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", int_mips_addvi_d, MSA128D>; 1009 1010class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1011class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1012class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1013class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1014 1015class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, MSA128B>; 1016 1017class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>; 1018class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>; 1019class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>; 1020class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>; 1021 1022class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>; 1023class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>; 1024class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>; 1025class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>; 1026 1027class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>, 1028 IsCommutable; 1029class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>, 1030 IsCommutable; 1031class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>, 1032 IsCommutable; 1033class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>, 1034 IsCommutable; 1035 1036class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>, 1037 IsCommutable; 1038class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>, 1039 IsCommutable; 1040class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>, 1041 IsCommutable; 1042class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>, 1043 IsCommutable; 1044 1045class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>, 1046 IsCommutable; 1047class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>, 1048 IsCommutable; 1049class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>, 1050 IsCommutable; 1051class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>, 1052 IsCommutable; 1053 1054class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>, 1055 IsCommutable; 1056class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>, 1057 IsCommutable; 1058class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>, 1059 IsCommutable; 1060class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>, 1061 IsCommutable; 1062 1063class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>; 1064class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>; 1065class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>; 1066class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>; 1067 1068class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1069class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1070class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1071class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1072 1073class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>; 1074class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>; 1075class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>; 1076class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>; 1077 1078class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1079 MSA128B>; 1080class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1081 MSA128H>; 1082class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1083 MSA128W>; 1084class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1085 MSA128D>; 1086 1087class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>; 1088class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>; 1089class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>; 1090class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>; 1091 1092class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1093 MSA128B>; 1094class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1095 MSA128H>; 1096class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1097 MSA128W>; 1098class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1099 MSA128D>; 1100 1101class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1102 1103class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1104 1105class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1106 1107class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1108 1109class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>; 1110class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>; 1111class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>; 1112class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>; 1113 1114class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1115class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1116class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1117class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1118 1119class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1120class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1121class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1122class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1123 1124class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1125 1126class BSEL_V_DESC : MSA_VEC_DESC_BASE<"bsel.v", int_mips_bsel_v, MSA128B>; 1127 1128class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, MSA128B>; 1129 1130class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>; 1131class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>; 1132class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>; 1133class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>; 1134 1135class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1136class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1137class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1138class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1139 1140class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1141class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1142class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1143class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1144 1145class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1146 1147class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", int_mips_ceq_b, MSA128B>, 1148 IsCommutable; 1149class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", int_mips_ceq_h, MSA128H>, 1150 IsCommutable; 1151class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", int_mips_ceq_w, MSA128W>, 1152 IsCommutable; 1153class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", int_mips_ceq_d, MSA128D>, 1154 IsCommutable; 1155 1156class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", int_mips_ceqi_b, MSA128B>; 1157class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", int_mips_ceqi_h, MSA128H>; 1158class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", int_mips_ceqi_w, MSA128W>; 1159class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", int_mips_ceqi_d, MSA128D>; 1160 1161class CFCMSA_DESC { 1162 dag OutOperandList = (outs GPR32:$rd); 1163 dag InOperandList = (ins MSACtrl:$cs); 1164 string AsmString = "cfcmsa\t$rd, $cs"; 1165 InstrItinClass Itinerary = NoItinerary; 1166 bit hasSideEffects = 1; 1167} 1168 1169class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", int_mips_cle_s_b, MSA128B>; 1170class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", int_mips_cle_s_h, MSA128H>; 1171class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", int_mips_cle_s_w, MSA128W>; 1172class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", int_mips_cle_s_d, MSA128D>; 1173 1174class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", int_mips_cle_u_b, MSA128B>; 1175class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", int_mips_cle_u_h, MSA128H>; 1176class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", int_mips_cle_u_w, MSA128W>; 1177class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", int_mips_cle_u_d, MSA128D>; 1178 1179class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", int_mips_clei_s_b, 1180 MSA128B>; 1181class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", int_mips_clei_s_h, 1182 MSA128H>; 1183class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", int_mips_clei_s_w, 1184 MSA128W>; 1185class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", int_mips_clei_s_d, 1186 MSA128D>; 1187 1188class CLEI_U_B_DESC : MSA_SI5_DESC_BASE<"clei_u.b", int_mips_clei_u_b, 1189 MSA128B>; 1190class CLEI_U_H_DESC : MSA_SI5_DESC_BASE<"clei_u.h", int_mips_clei_u_h, 1191 MSA128H>; 1192class CLEI_U_W_DESC : MSA_SI5_DESC_BASE<"clei_u.w", int_mips_clei_u_w, 1193 MSA128W>; 1194class CLEI_U_D_DESC : MSA_SI5_DESC_BASE<"clei_u.d", int_mips_clei_u_d, 1195 MSA128D>; 1196 1197class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", int_mips_clt_s_b, MSA128B>; 1198class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", int_mips_clt_s_h, MSA128H>; 1199class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", int_mips_clt_s_w, MSA128W>; 1200class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", int_mips_clt_s_d, MSA128D>; 1201 1202class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", int_mips_clt_u_b, MSA128B>; 1203class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", int_mips_clt_u_h, MSA128H>; 1204class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", int_mips_clt_u_w, MSA128W>; 1205class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", int_mips_clt_u_d, MSA128D>; 1206 1207class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", int_mips_clti_s_b, 1208 MSA128B>; 1209class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", int_mips_clti_s_h, 1210 MSA128H>; 1211class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", int_mips_clti_s_w, 1212 MSA128W>; 1213class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", int_mips_clti_s_d, 1214 MSA128D>; 1215 1216class CLTI_U_B_DESC : MSA_SI5_DESC_BASE<"clti_u.b", int_mips_clti_u_b, 1217 MSA128B>; 1218class CLTI_U_H_DESC : MSA_SI5_DESC_BASE<"clti_u.h", int_mips_clti_u_h, 1219 MSA128H>; 1220class CLTI_U_W_DESC : MSA_SI5_DESC_BASE<"clti_u.w", int_mips_clti_u_w, 1221 MSA128W>; 1222class CLTI_U_D_DESC : MSA_SI5_DESC_BASE<"clti_u.d", int_mips_clti_u_d, 1223 MSA128D>; 1224 1225class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", int_mips_copy_s_b, 1226 GPR32, MSA128B>; 1227class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", int_mips_copy_s_h, 1228 GPR32, MSA128H>; 1229class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", int_mips_copy_s_w, 1230 GPR32, MSA128W>; 1231 1232class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", int_mips_copy_u_b, 1233 GPR32, MSA128B>; 1234class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", int_mips_copy_u_h, 1235 GPR32, MSA128H>; 1236class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", int_mips_copy_u_w, 1237 GPR32, MSA128W>; 1238 1239class CTCMSA_DESC { 1240 dag OutOperandList = (outs); 1241 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1242 string AsmString = "ctcmsa\t$cd, $rs"; 1243 InstrItinClass Itinerary = NoItinerary; 1244 bit hasSideEffects = 1; 1245} 1246 1247class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>; 1248class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>; 1249class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>; 1250class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>; 1251 1252class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>; 1253class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>; 1254class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>; 1255class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>; 1256 1257class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H, 1258 MSA128B, MSA128B>, IsCommutable; 1259class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W, 1260 MSA128H, MSA128H>, IsCommutable; 1261class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D, 1262 MSA128W, MSA128W>, IsCommutable; 1263 1264class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H, 1265 MSA128B, MSA128B>, IsCommutable; 1266class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W, 1267 MSA128H, MSA128H>, IsCommutable; 1268class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D, 1269 MSA128W, MSA128W>, IsCommutable; 1270 1271class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1272 MSA128H, MSA128B, MSA128B>, 1273 IsCommutable; 1274class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1275 MSA128W, MSA128H, MSA128H>, 1276 IsCommutable; 1277class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1278 MSA128D, MSA128W, MSA128W>, 1279 IsCommutable; 1280 1281class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1282 MSA128H, MSA128B, MSA128B>, 1283 IsCommutable; 1284class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1285 MSA128W, MSA128H, MSA128H>, 1286 IsCommutable; 1287class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1288 MSA128D, MSA128W, MSA128W>, 1289 IsCommutable; 1290 1291class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1292 MSA128H, MSA128B, MSA128B>; 1293class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1294 MSA128W, MSA128H, MSA128H>; 1295class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1296 MSA128D, MSA128W, MSA128W>; 1297 1298class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1299 MSA128H, MSA128B, MSA128B>; 1300class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1301 MSA128W, MSA128H, MSA128H>; 1302class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1303 MSA128D, MSA128W, MSA128W>; 1304 1305class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable; 1306class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable; 1307 1308class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>, 1309 IsCommutable; 1310class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>, 1311 IsCommutable; 1312 1313class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", int_mips_fceq_w, MSA128W>, 1314 IsCommutable; 1315class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", int_mips_fceq_d, MSA128D>, 1316 IsCommutable; 1317 1318class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1319 MSA128W>; 1320class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1321 MSA128D>; 1322 1323class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", int_mips_fcle_w, MSA128W>; 1324class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", int_mips_fcle_d, MSA128D>; 1325 1326class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", int_mips_fclt_w, MSA128W>; 1327class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", int_mips_fclt_d, MSA128D>; 1328 1329class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", int_mips_fcne_w, MSA128W>, 1330 IsCommutable; 1331class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", int_mips_fcne_d, MSA128D>, 1332 IsCommutable; 1333 1334class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", int_mips_fcor_w, MSA128W>, 1335 IsCommutable; 1336class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", int_mips_fcor_d, MSA128D>, 1337 IsCommutable; 1338 1339class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", int_mips_fcueq_w, MSA128W>, 1340 IsCommutable; 1341class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", int_mips_fcueq_d, MSA128D>, 1342 IsCommutable; 1343 1344class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", int_mips_fcule_w, MSA128W>, 1345 IsCommutable; 1346class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", int_mips_fcule_d, MSA128D>, 1347 IsCommutable; 1348 1349class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", int_mips_fcult_w, MSA128W>, 1350 IsCommutable; 1351class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", int_mips_fcult_d, MSA128D>, 1352 IsCommutable; 1353 1354class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", int_mips_fcun_w, MSA128W>, 1355 IsCommutable; 1356class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", int_mips_fcun_d, MSA128D>, 1357 IsCommutable; 1358 1359class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", int_mips_fcune_w, MSA128W>, 1360 IsCommutable; 1361class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", int_mips_fcune_d, MSA128D>, 1362 IsCommutable; 1363 1364class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>; 1365class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>; 1366 1367class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1368 MSA128H, MSA128W, MSA128W>; 1369class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1370 MSA128W, MSA128D, MSA128D>; 1371 1372class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>; 1373class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>; 1374 1375class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1376 MSA128W, MSA128H>; 1377class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1378 MSA128D, MSA128W>; 1379 1380class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1381 MSA128W, MSA128H>; 1382class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1383 MSA128D, MSA128W>; 1384 1385class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1386 MSA128W>; 1387class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1388 MSA128D>; 1389 1390class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1391 MSA128W>; 1392class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1393 MSA128D>; 1394 1395class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1396 MSA128W, MSA128H>; 1397class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1398 MSA128D, MSA128W>; 1399 1400class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1401 MSA128W, MSA128H>; 1402class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1403 MSA128D, MSA128W>; 1404 1405class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", vsplati8, MSA128B, GPR32>; 1406class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", vsplati16, MSA128H, GPR32>; 1407class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", vsplati32, MSA128W, GPR32>; 1408 1409class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>; 1410class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>; 1411 1412class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1413 MSA128W>; 1414class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1415 MSA128D>; 1416 1417class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>; 1418class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>; 1419 1420class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1421 MSA128W>; 1422class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1423 MSA128D>; 1424 1425class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>; 1426class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>; 1427 1428class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1429 MSA128W>; 1430class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1431 MSA128D>; 1432 1433class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1434 MSA128W>; 1435class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1436 MSA128D>; 1437 1438class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>; 1439class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>; 1440 1441class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>; 1442class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>; 1443 1444class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>; 1445class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>; 1446 1447class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1448 MSA128W>; 1449class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1450 MSA128D>; 1451 1452class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>; 1453class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>; 1454 1455class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>; 1456class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>; 1457 1458class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>; 1459class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>; 1460 1461class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>; 1462class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>; 1463 1464class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>; 1465class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>; 1466 1467class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>; 1468class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>; 1469 1470class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>; 1471class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>; 1472 1473class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>; 1474class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>; 1475 1476class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>; 1477class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>; 1478 1479class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>; 1480class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>; 1481 1482class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>; 1483class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>; 1484 1485class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>; 1486class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>; 1487 1488class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>; 1489class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>; 1490 1491class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1492 MSA128W>; 1493class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1494 MSA128D>; 1495 1496class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1497 MSA128W>; 1498class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1499 MSA128D>; 1500 1501class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1502 MSA128W>; 1503class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1504 MSA128D>; 1505 1506class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1507 MSA128W>; 1508class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1509 MSA128D>; 1510 1511class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1512 MSA128H, MSA128W, MSA128W>; 1513class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1514 MSA128W, MSA128D, MSA128D>; 1515 1516class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H, 1517 MSA128B, MSA128B>; 1518class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W, 1519 MSA128H, MSA128H>; 1520class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D, 1521 MSA128W, MSA128W>; 1522 1523class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H, 1524 MSA128B, MSA128B>; 1525class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W, 1526 MSA128H, MSA128H>; 1527class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D, 1528 MSA128W, MSA128W>; 1529 1530class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H, 1531 MSA128B, MSA128B>; 1532class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W, 1533 MSA128H, MSA128H>; 1534class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D, 1535 MSA128W, MSA128W>; 1536 1537class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H, 1538 MSA128B, MSA128B>; 1539class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W, 1540 MSA128H, MSA128H>; 1541class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D, 1542 MSA128W, MSA128W>; 1543 1544class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>; 1545class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>; 1546class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>; 1547class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>; 1548 1549class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>; 1550class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>; 1551class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>; 1552class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>; 1553 1554class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>; 1555class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>; 1556class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>; 1557class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>; 1558 1559class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>; 1560class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>; 1561class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>; 1562class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>; 1563 1564class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", int_mips_insert_b, 1565 MSA128B, GPR32>; 1566class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", int_mips_insert_h, 1567 MSA128H, GPR32>; 1568class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", int_mips_insert_w, 1569 MSA128W, GPR32>; 1570 1571class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1572class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1573class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1574class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1575 1576class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1577 ValueType TyNode, RegisterClass RCWD, 1578 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 1579 InstrItinClass itin = NoItinerary> { 1580 dag OutOperandList = (outs RCWD:$wd); 1581 dag InOperandList = (ins MemOpnd:$addr); 1582 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1583 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1584 InstrItinClass Itinerary = itin; 1585} 1586 1587class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1588class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1589class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1590class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1591 1592class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", vsplati8, MSA128B>; 1593class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", vsplati16, MSA128H>; 1594class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", vsplati32, MSA128W>; 1595class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", vsplati64, MSA128D>; 1596 1597class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1598 ValueType TyNode, RegisterClass RCWD, 1599 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1600 InstrItinClass itin = NoItinerary> { 1601 dag OutOperandList = (outs RCWD:$wd); 1602 dag InOperandList = (ins MemOpnd:$addr); 1603 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1604 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1605 InstrItinClass Itinerary = itin; 1606} 1607 1608class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1609class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1610class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1611class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1612 1613class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1614 MSA128H>; 1615class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1616 MSA128W>; 1617 1618class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1619 MSA128H>; 1620class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1621 MSA128W>; 1622 1623class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>; 1624class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>; 1625class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>; 1626class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>; 1627 1628class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>; 1629class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>; 1630class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>; 1631class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>; 1632 1633class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", int_mips_max_s_b, MSA128B>; 1634class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", int_mips_max_s_h, MSA128H>; 1635class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", int_mips_max_s_w, MSA128W>; 1636class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", int_mips_max_s_d, MSA128D>; 1637 1638class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", int_mips_max_u_b, MSA128B>; 1639class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", int_mips_max_u_h, MSA128H>; 1640class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", int_mips_max_u_w, MSA128W>; 1641class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", int_mips_max_u_d, MSA128D>; 1642 1643class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", int_mips_maxi_s_b, MSA128B>; 1644class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", int_mips_maxi_s_h, MSA128H>; 1645class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", int_mips_maxi_s_w, MSA128W>; 1646class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", int_mips_maxi_s_d, MSA128D>; 1647 1648class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", int_mips_maxi_u_b, MSA128B>; 1649class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", int_mips_maxi_u_h, MSA128H>; 1650class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", int_mips_maxi_u_w, MSA128W>; 1651class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", int_mips_maxi_u_d, MSA128D>; 1652 1653class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>; 1654class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>; 1655class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>; 1656class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>; 1657 1658class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", int_mips_min_s_b, MSA128B>; 1659class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", int_mips_min_s_h, MSA128H>; 1660class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", int_mips_min_s_w, MSA128W>; 1661class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", int_mips_min_s_d, MSA128D>; 1662 1663class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", int_mips_min_u_b, MSA128B>; 1664class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", int_mips_min_u_h, MSA128H>; 1665class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", int_mips_min_u_w, MSA128W>; 1666class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", int_mips_min_u_d, MSA128D>; 1667 1668class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", int_mips_mini_s_b, MSA128B>; 1669class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", int_mips_mini_s_h, MSA128H>; 1670class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", int_mips_mini_s_w, MSA128W>; 1671class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", int_mips_mini_s_d, MSA128D>; 1672 1673class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", int_mips_mini_u_b, MSA128B>; 1674class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", int_mips_mini_u_h, MSA128H>; 1675class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", int_mips_mini_u_w, MSA128W>; 1676class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", int_mips_mini_u_d, MSA128D>; 1677 1678class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>; 1679class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>; 1680class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>; 1681class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>; 1682 1683class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>; 1684class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>; 1685class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>; 1686class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>; 1687 1688class MOVE_V_DESC { 1689 dag OutOperandList = (outs MSA128B:$wd); 1690 dag InOperandList = (ins MSA128B:$ws); 1691 string AsmString = "move.v\t$wd, $ws"; 1692 list<dag> Pattern = []; 1693 InstrItinClass Itinerary = NoItinerary; 1694} 1695 1696class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 1697 MSA128H>; 1698class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 1699 MSA128W>; 1700 1701class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 1702 MSA128H>; 1703class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 1704 MSA128W>; 1705 1706class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>; 1707class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>; 1708class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>; 1709class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>; 1710 1711class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>; 1712class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>; 1713 1714class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 1715 MSA128H>; 1716class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 1717 MSA128W>; 1718 1719class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>; 1720class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>; 1721class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>; 1722class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>; 1723 1724class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 1725class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 1726class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 1727class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 1728 1729class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; 1730class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; 1731class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; 1732class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; 1733 1734class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 1735class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 1736class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 1737class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 1738 1739class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, MSA128B>; 1740 1741class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 1742class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 1743class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 1744class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 1745 1746class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, MSA128B>; 1747 1748class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>; 1749class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>; 1750class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>; 1751class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>; 1752 1753class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>; 1754class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>; 1755class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>; 1756class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>; 1757 1758class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>; 1759class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>; 1760class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>; 1761class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>; 1762 1763class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 1764class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 1765class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 1766class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 1767 1768class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 1769class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 1770class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 1771class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 1772 1773class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>; 1774class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>; 1775class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>; 1776 1777class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>; 1778class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>; 1779class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>; 1780class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>; 1781 1782class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 1783class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 1784class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 1785class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 1786 1787class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>; 1788class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>; 1789class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>; 1790class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>; 1791 1792class SLLI_B_DESC : MSA_BIT_B_DESC_BASE<"slli.b", int_mips_slli_b, MSA128B>; 1793class SLLI_H_DESC : MSA_BIT_H_DESC_BASE<"slli.h", int_mips_slli_h, MSA128H>; 1794class SLLI_W_DESC : MSA_BIT_W_DESC_BASE<"slli.w", int_mips_slli_w, MSA128W>; 1795class SLLI_D_DESC : MSA_BIT_D_DESC_BASE<"slli.d", int_mips_slli_d, MSA128D>; 1796 1797class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B, 1798 MSA128B, GPR32>; 1799class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H, 1800 MSA128H, GPR32>; 1801class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W, 1802 MSA128W, GPR32>; 1803class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D, 1804 MSA128D, GPR32>; 1805 1806class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b, 1807 MSA128B>; 1808class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h, 1809 MSA128H>; 1810class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w, 1811 MSA128W>; 1812class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d, 1813 MSA128D>; 1814 1815class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>; 1816class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>; 1817class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>; 1818class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>; 1819 1820class SRAI_B_DESC : MSA_BIT_B_DESC_BASE<"srai.b", int_mips_srai_b, MSA128B>; 1821class SRAI_H_DESC : MSA_BIT_H_DESC_BASE<"srai.h", int_mips_srai_h, MSA128H>; 1822class SRAI_W_DESC : MSA_BIT_W_DESC_BASE<"srai.w", int_mips_srai_w, MSA128W>; 1823class SRAI_D_DESC : MSA_BIT_D_DESC_BASE<"srai.d", int_mips_srai_d, MSA128D>; 1824 1825class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>; 1826class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>; 1827class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>; 1828class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>; 1829 1830class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 1831class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 1832class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 1833class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 1834 1835class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>; 1836class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>; 1837class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>; 1838class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>; 1839 1840class SRLI_B_DESC : MSA_BIT_B_DESC_BASE<"srli.b", int_mips_srli_b, MSA128B>; 1841class SRLI_H_DESC : MSA_BIT_H_DESC_BASE<"srli.h", int_mips_srli_h, MSA128H>; 1842class SRLI_W_DESC : MSA_BIT_W_DESC_BASE<"srli.w", int_mips_srli_w, MSA128W>; 1843class SRLI_D_DESC : MSA_BIT_D_DESC_BASE<"srli.d", int_mips_srli_d, MSA128D>; 1844 1845class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>; 1846class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>; 1847class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>; 1848class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>; 1849 1850class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 1851class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 1852class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 1853class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 1854 1855class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1856 ValueType TyNode, RegisterClass RCWD, 1857 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 1858 InstrItinClass itin = NoItinerary> { 1859 dag OutOperandList = (outs); 1860 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 1861 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1862 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 1863 InstrItinClass Itinerary = itin; 1864} 1865 1866class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 1867class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 1868class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 1869class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 1870 1871class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1872 ValueType TyNode, RegisterClass RCWD, 1873 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1874 InstrItinClass itin = NoItinerary> { 1875 dag OutOperandList = (outs); 1876 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 1877 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1878 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 1879 InstrItinClass Itinerary = itin; 1880} 1881 1882class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 1883class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 1884class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 1885class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 1886 1887class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>; 1888class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>; 1889class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>; 1890class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>; 1891 1892class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>; 1893class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>; 1894class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>; 1895class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>; 1896 1897class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 1898 MSA128B>; 1899class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 1900 MSA128H>; 1901class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 1902 MSA128W>; 1903class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 1904 MSA128D>; 1905 1906class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 1907 MSA128B>; 1908class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 1909 MSA128H>; 1910class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 1911 MSA128W>; 1912class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 1913 MSA128D>; 1914 1915class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>; 1916class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>; 1917class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>; 1918class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>; 1919 1920class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", int_mips_subvi_b, MSA128B>; 1921class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", int_mips_subvi_h, MSA128H>; 1922class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", int_mips_subvi_w, MSA128W>; 1923class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", int_mips_subvi_d, MSA128D>; 1924 1925class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>; 1926class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>; 1927class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>; 1928class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>; 1929 1930class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 1931class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 1932class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 1933class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 1934 1935class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, MSA128B>; 1936 1937// Instruction defs. 1938def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 1939def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 1940def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 1941def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 1942 1943def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 1944def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 1945def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 1946def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 1947 1948def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 1949def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 1950def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 1951def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 1952 1953def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 1954def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 1955def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 1956def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 1957 1958def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 1959def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 1960def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 1961def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 1962 1963def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 1964def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 1965def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 1966def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 1967 1968def AND_V : AND_V_ENC, AND_V_DESC; 1969def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 1970 PseudoInstExpansion<(AND_V MSA128B:$wd, 1971 MSA128B:$ws, MSA128B:$wt)>; 1972def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 1973 PseudoInstExpansion<(AND_V MSA128B:$wd, 1974 MSA128B:$ws, MSA128B:$wt)>; 1975def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 1976 PseudoInstExpansion<(AND_V MSA128B:$wd, 1977 MSA128B:$ws, MSA128B:$wt)>; 1978 1979def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 1980 1981def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 1982def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 1983def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 1984def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 1985 1986def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 1987def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 1988def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 1989def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 1990 1991def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 1992def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 1993def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 1994def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 1995 1996def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 1997def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 1998def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 1999def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2000 2001def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2002def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2003def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2004def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2005 2006def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2007def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2008def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2009def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2010 2011def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2012def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2013def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2014def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2015 2016def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2017def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2018def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2019def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2020 2021def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2022def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2023def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2024def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2025 2026def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2027def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2028def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2029def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2030 2031def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2032def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2033def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2034def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2035 2036def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2037def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2038def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2039def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2040 2041def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2042 2043def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2044 2045def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2046 2047def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2048 2049def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2050def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2051def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2052def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2053 2054def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2055def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2056def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2057def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2058 2059def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2060def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2061def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2062def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2063 2064def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2065 2066def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2067 2068def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2069 2070def BSET_B : BSET_B_ENC, BSET_B_DESC; 2071def BSET_H : BSET_H_ENC, BSET_H_DESC; 2072def BSET_W : BSET_W_ENC, BSET_W_DESC; 2073def BSET_D : BSET_D_ENC, BSET_D_DESC; 2074 2075def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2076def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2077def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2078def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2079 2080def BZ_B : BZ_B_ENC, BZ_B_DESC; 2081def BZ_H : BZ_H_ENC, BZ_H_DESC; 2082def BZ_W : BZ_W_ENC, BZ_W_DESC; 2083def BZ_D : BZ_D_ENC, BZ_D_DESC; 2084 2085def BZ_V : BZ_V_ENC, BZ_V_DESC; 2086 2087def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2088def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2089def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2090def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2091 2092def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2093def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2094def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2095def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2096 2097def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2098 2099def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2100def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2101def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2102def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2103 2104def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2105def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2106def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2107def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2108 2109def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2110def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2111def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2112def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2113 2114def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2115def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2116def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2117def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2118 2119def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2120def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2121def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2122def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2123 2124def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2125def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2126def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2127def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2128 2129def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2130def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2131def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2132def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2133 2134def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2135def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2136def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2137def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2138 2139def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2140def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2141def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2142 2143def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2144def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2145def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2146 2147def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2148 2149def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2150def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2151def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2152def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2153 2154def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2155def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2156def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2157def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2158 2159def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2160def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2161def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2162 2163def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2164def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2165def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2166 2167def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2168def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2169def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2170 2171def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2172def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2173def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2174 2175def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2176def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2177def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2178 2179def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2180def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2181def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2182 2183def FADD_W : FADD_W_ENC, FADD_W_DESC; 2184def FADD_D : FADD_D_ENC, FADD_D_DESC; 2185 2186def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2187def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2188 2189def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2190def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2191 2192def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2193def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2194 2195def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2196def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2197 2198def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2199def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2200 2201def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2202def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2203 2204def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2205def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2206 2207def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2208def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2209 2210def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2211def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2212 2213def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2214def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2215 2216def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2217def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2218 2219def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2220def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2221 2222def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2223def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2224 2225def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2226def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2227 2228def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2229def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2230 2231def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2232def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2233 2234def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2235def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2236 2237def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2238def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2239 2240def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2241def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2242 2243def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2244def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2245 2246def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2247def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2248 2249def FILL_B : FILL_B_ENC, FILL_B_DESC; 2250def FILL_H : FILL_H_ENC, FILL_H_DESC; 2251def FILL_W : FILL_W_ENC, FILL_W_DESC; 2252 2253def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2254def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2255 2256def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2257def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2258 2259def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2260def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2261 2262def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2263def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2264 2265def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2266def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2267 2268def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2269def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2270 2271def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2272def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2273 2274def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2275def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2276 2277def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2278def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2279 2280def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2281def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2282 2283def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2284def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2285 2286def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2287def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2288 2289def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2290def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2291 2292def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2293def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2294 2295def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2296def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2297 2298def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2299def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2300 2301def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2302def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2303 2304def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2305def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2306 2307def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2308def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2309 2310def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2311def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2312 2313def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2314def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2315 2316def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2317def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2318 2319def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2320def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2321 2322def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2323def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2324 2325def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2326def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2327 2328def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2329def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2330 2331def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2332def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2333 2334def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2335def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2336 2337def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2338def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2339 2340def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2341def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2342def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2343 2344def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2345def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2346def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2347 2348def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2349def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2350def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2351 2352def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2353def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2354def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2355 2356def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2357def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2358def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2359def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2360 2361def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2362def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2363def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2364def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2365 2366def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2367def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2368def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2369def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2370 2371def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2372def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2373def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2374def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2375 2376def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2377def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2378def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2379 2380def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2381def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2382def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2383def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2384 2385def LD_B: LD_B_ENC, LD_B_DESC; 2386def LD_H: LD_H_ENC, LD_H_DESC; 2387def LD_W: LD_W_ENC, LD_W_DESC; 2388def LD_D: LD_D_ENC, LD_D_DESC; 2389 2390def LDI_B : LDI_B_ENC, LDI_B_DESC; 2391def LDI_H : LDI_H_ENC, LDI_H_DESC; 2392def LDI_W : LDI_W_ENC, LDI_W_DESC; 2393def LDI_D : LDI_D_ENC, LDI_D_DESC; 2394 2395def LDX_B: LDX_B_ENC, LDX_B_DESC; 2396def LDX_H: LDX_H_ENC, LDX_H_DESC; 2397def LDX_W: LDX_W_ENC, LDX_W_DESC; 2398def LDX_D: LDX_D_ENC, LDX_D_DESC; 2399 2400def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2401def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2402 2403def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2404def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2405 2406def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2407def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2408def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2409def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2410 2411def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2412def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2413def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2414def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2415 2416def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2417def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2418def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2419def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2420 2421def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2422def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2423def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2424def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2425 2426def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2427def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2428def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2429def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2430 2431def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2432def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2433def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2434def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2435 2436def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2437def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2438def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2439def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2440 2441def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2442def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2443def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2444def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2445 2446def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2447def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2448def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2449def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2450 2451def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2452def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2453def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2454def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2455 2456def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2457def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2458def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2459def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2460 2461def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2462def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2463def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2464def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2465 2466def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2467def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2468def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2469def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2470 2471def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2472 2473def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2474def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2475 2476def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2477def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2478 2479def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2480def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2481def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2482def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2483 2484def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2485def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2486 2487def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2488def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2489 2490def MULV_B : MULV_B_ENC, MULV_B_DESC; 2491def MULV_H : MULV_H_ENC, MULV_H_DESC; 2492def MULV_W : MULV_W_ENC, MULV_W_DESC; 2493def MULV_D : MULV_D_ENC, MULV_D_DESC; 2494 2495def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2496def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2497def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2498def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2499 2500def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2501def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2502def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2503def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2504 2505def NOR_V : NOR_V_ENC, NOR_V_DESC; 2506def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2507 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2508 MSA128B:$ws, MSA128B:$wt)>; 2509def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2510 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2511 MSA128B:$ws, MSA128B:$wt)>; 2512def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2513 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2514 MSA128B:$ws, MSA128B:$wt)>; 2515 2516def NORI_B : NORI_B_ENC, NORI_B_DESC; 2517 2518def OR_V : OR_V_ENC, OR_V_DESC; 2519def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2520 PseudoInstExpansion<(OR_V MSA128B:$wd, 2521 MSA128B:$ws, MSA128B:$wt)>; 2522def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2523 PseudoInstExpansion<(OR_V MSA128B:$wd, 2524 MSA128B:$ws, MSA128B:$wt)>; 2525def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 2526 PseudoInstExpansion<(OR_V MSA128B:$wd, 2527 MSA128B:$ws, MSA128B:$wt)>; 2528 2529def ORI_B : ORI_B_ENC, ORI_B_DESC; 2530 2531def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2532def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2533def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2534def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2535 2536def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2537def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2538def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2539def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2540 2541def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2542def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2543def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2544def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2545 2546def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2547def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2548def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2549def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2550 2551def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2552def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2553def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2554def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2555 2556def SHF_B : SHF_B_ENC, SHF_B_DESC; 2557def SHF_H : SHF_H_ENC, SHF_H_DESC; 2558def SHF_W : SHF_W_ENC, SHF_W_DESC; 2559 2560def SLD_B : SLD_B_ENC, SLD_B_DESC; 2561def SLD_H : SLD_H_ENC, SLD_H_DESC; 2562def SLD_W : SLD_W_ENC, SLD_W_DESC; 2563def SLD_D : SLD_D_ENC, SLD_D_DESC; 2564 2565def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 2566def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 2567def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 2568def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 2569 2570def SLL_B : SLL_B_ENC, SLL_B_DESC; 2571def SLL_H : SLL_H_ENC, SLL_H_DESC; 2572def SLL_W : SLL_W_ENC, SLL_W_DESC; 2573def SLL_D : SLL_D_ENC, SLL_D_DESC; 2574 2575def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 2576def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 2577def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 2578def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 2579 2580def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 2581def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 2582def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 2583def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 2584 2585def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 2586def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 2587def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 2588def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 2589 2590def SRA_B : SRA_B_ENC, SRA_B_DESC; 2591def SRA_H : SRA_H_ENC, SRA_H_DESC; 2592def SRA_W : SRA_W_ENC, SRA_W_DESC; 2593def SRA_D : SRA_D_ENC, SRA_D_DESC; 2594 2595def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 2596def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 2597def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 2598def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 2599 2600def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 2601def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 2602def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 2603def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 2604 2605def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 2606def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 2607def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 2608def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 2609 2610def SRL_B : SRL_B_ENC, SRL_B_DESC; 2611def SRL_H : SRL_H_ENC, SRL_H_DESC; 2612def SRL_W : SRL_W_ENC, SRL_W_DESC; 2613def SRL_D : SRL_D_ENC, SRL_D_DESC; 2614 2615def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 2616def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 2617def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 2618def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 2619 2620def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 2621def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 2622def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 2623def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 2624 2625def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 2626def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 2627def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 2628def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 2629 2630def ST_B: ST_B_ENC, ST_B_DESC; 2631def ST_H: ST_H_ENC, ST_H_DESC; 2632def ST_W: ST_W_ENC, ST_W_DESC; 2633def ST_D: ST_D_ENC, ST_D_DESC; 2634 2635def STX_B: STX_B_ENC, STX_B_DESC; 2636def STX_H: STX_H_ENC, STX_H_DESC; 2637def STX_W: STX_W_ENC, STX_W_DESC; 2638def STX_D: STX_D_ENC, STX_D_DESC; 2639 2640def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 2641def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 2642def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 2643def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 2644 2645def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 2646def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 2647def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 2648def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 2649 2650def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 2651def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 2652def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 2653def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 2654 2655def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 2656def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 2657def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 2658def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 2659 2660def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 2661def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 2662def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 2663def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 2664 2665def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 2666def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 2667def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 2668def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 2669 2670def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 2671def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 2672def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 2673def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 2674 2675def XOR_V : XOR_V_ENC, XOR_V_DESC; 2676def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 2677 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2678 MSA128B:$ws, MSA128B:$wt)>; 2679def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 2680 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2681 MSA128B:$ws, MSA128B:$wt)>; 2682def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 2683 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2684 MSA128B:$ws, MSA128B:$wt)>; 2685 2686def XORI_B : XORI_B_ENC, XORI_B_DESC; 2687 2688// Patterns. 2689class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 2690 Pat<pattern, result>, Requires<pred>; 2691 2692def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 2693def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 2694def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 2695def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 2696def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 2697def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 2698def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 2699 2700def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 2701def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 2702def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 2703 2704def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 2705 (ST_B MSA128B:$ws, addr:$addr)>; 2706def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 2707 (ST_H MSA128H:$ws, addr:$addr)>; 2708def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 2709 (ST_W MSA128W:$ws, addr:$addr)>; 2710def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 2711 (ST_D MSA128D:$ws, addr:$addr)>; 2712def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 2713 (ST_H MSA128H:$ws, addr:$addr)>; 2714def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 2715 (ST_W MSA128W:$ws, addr:$addr)>; 2716def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 2717 (ST_D MSA128D:$ws, addr:$addr)>; 2718 2719def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 2720 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 2721def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 2722 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 2723def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 2724 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 2725 2726class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 2727 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 2728 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2729 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 2730 2731// These are endian-independant because the element size doesnt change 2732def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 2733def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 2734def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 2735def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 2736def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 2737def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 2738 2739// Little endian bitcasts are always no-ops 2740def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 2741def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 2742def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 2743def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 2744def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 2745def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 2746 2747def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 2748def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 2749def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 2750def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 2751def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 2752 2753def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 2754def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 2755def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 2756def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 2757def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 2758 2759def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 2760def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 2761def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 2762def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 2763def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 2764 2765def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 2766def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 2767def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 2768def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 2769def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 2770 2771def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 2772def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 2773def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 2774def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 2775def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 2776 2777// Big endian bitcasts expand to shuffle instructions. 2778// This is because bitcast is defined to be a store/load sequence and the 2779// vector store/load instructions are mixed-endian with respect to the vector 2780// as a whole (little endian with respect to element order, but big endian 2781// elements). 2782 2783class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 2784 RegisterClass DstRC, MSAInst Insn, 2785 RegisterClass ViaRC> : 2786 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2787 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 2788 DstRC), 2789 [HasMSA, IsBE]>; 2790 2791class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 2792 RegisterClass DstRC, MSAInst Insn, 2793 RegisterClass ViaRC> : 2794 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2795 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 2796 DstRC), 2797 [HasMSA, IsBE]>; 2798 2799class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 2800 RegisterClass DstRC> : 2801 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 2802 2803class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 2804 RegisterClass DstRC> : 2805 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 2806 2807class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 2808 RegisterClass DstRC> : 2809 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2810 (COPY_TO_REGCLASS 2811 (SHF_W 2812 (COPY_TO_REGCLASS 2813 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 2814 MSA128W), 177), 2815 DstRC), 2816 [HasMSA, IsBE]>; 2817 2818class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 2819 RegisterClass DstRC> : 2820 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 2821 2822class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 2823 RegisterClass DstRC> : 2824 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 2825 2826class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 2827 RegisterClass DstRC> : 2828 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 2829 2830def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 2831def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 2832def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 2833def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 2834def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 2835def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 2836 2837def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 2838def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 2839def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 2840def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 2841def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 2842 2843def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 2844def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 2845def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 2846def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 2847def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 2848 2849def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 2850def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 2851def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 2852def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 2853def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 2854 2855def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 2856def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 2857def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 2858def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 2859def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 2860 2861def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 2862def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 2863def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 2864def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 2865def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 2866 2867def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 2868def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 2869def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 2870def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 2871def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 2872 2873// Pseudos used to implement BNZ.df, and BZ.df 2874 2875class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 2876 RegisterClass RCWS, 2877 InstrItinClass itin = NoItinerary> : 2878 MipsPseudo<(outs GPR32:$dst), 2879 (ins RCWS:$ws), 2880 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 2881 bit usesCustomInserter = 1; 2882} 2883 2884def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 2885 MSA128B, NoItinerary>; 2886def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 2887 MSA128H, NoItinerary>; 2888def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 2889 MSA128W, NoItinerary>; 2890def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 2891 MSA128D, NoItinerary>; 2892def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 2893 MSA128B, NoItinerary>; 2894 2895def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 2896 MSA128B, NoItinerary>; 2897def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 2898 MSA128H, NoItinerary>; 2899def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 2900 MSA128W, NoItinerary>; 2901def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 2902 MSA128D, NoItinerary>; 2903def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 2904 MSA128B, NoItinerary>; 2905