MipsMSAInstrInfo.td revision f7b6bac2629c09b5dcdf9dd926c02490d2c81cd2
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm2 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm3 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm4 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def uimm8 : Operand<i32> { 77 let PrintMethod = "printUnsignedImm"; 78} 79 80def simm5 : Operand<i32>; 81 82def simm10 : Operand<i32>; 83 84def vsplat_uimm1 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm2 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm8"; 90} 91 92def vsplat_uimm3 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm4 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm5 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm6 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_uimm8 : Operand<vAny> { 109 let PrintMethod = "printUnsignedImm"; 110} 111 112def vsplat_simm5 : Operand<vAny>; 113 114def vsplat_simm10 : Operand<vAny>; 115 116def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>; 117 118// Pattern fragments 119def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 120 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 121def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 122 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 123def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 124 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 125 126def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 127 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 128def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 129 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 130def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 131 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 132 133def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 134 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 135def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 136 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 137def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 138 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 139 140class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 141 PatFrag<(ops node:$lhs, node:$rhs), 142 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 143 144// ISD::SETFALSE cannot occur 145def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 146def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 147def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 148def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 149def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 150def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 151def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 152def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 153def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 154def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 155def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 156def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 157def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 158def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 159def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 160def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 161def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 162def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 163def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 164def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 165def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 166def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 167def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 168def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 169def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 170def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 171def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 172def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 173// ISD::SETTRUE cannot occur 174// ISD::SETFALSE2 cannot occur 175// ISD::SETTRUE2 cannot occur 176 177class vsetcc_type<ValueType ResTy, CondCode CC> : 178 PatFrag<(ops node:$lhs, node:$rhs), 179 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 180 181def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 182def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 183def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 184def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 185def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 186def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 187def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 188def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 189def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 190def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 191def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 192def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 193def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 194def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 195def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 196def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 197def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 198def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 199def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 200def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 201 202def vsplati8 : PatFrag<(ops node:$e0), 203 (v16i8 (build_vector node:$e0, node:$e0, 204 node:$e0, node:$e0, 205 node:$e0, node:$e0, 206 node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0, 210 node:$e0, node:$e0))>; 211def vsplati16 : PatFrag<(ops node:$e0), 212 (v8i16 (build_vector node:$e0, node:$e0, 213 node:$e0, node:$e0, 214 node:$e0, node:$e0, 215 node:$e0, node:$e0))>; 216def vsplati32 : PatFrag<(ops node:$e0), 217 (v4i32 (build_vector node:$e0, node:$e0, 218 node:$e0, node:$e0))>; 219def vsplati64 : PatFrag<(ops node:$e0), 220 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 221def vsplatf32 : PatFrag<(ops node:$e0), 222 (v4f32 (build_vector node:$e0, node:$e0, 223 node:$e0, node:$e0))>; 224def vsplatf64 : PatFrag<(ops node:$e0), 225 (v2f64 (build_vector node:$e0, node:$e0))>; 226 227class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 228 SDNodeXForm xform = NOOP_SDNodeXForm> 229 : PatLeaf<frag, pred, xform> { 230 Operand OpClass = opclass; 231} 232 233class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 234 list<SDNode> roots = [], 235 list<SDNodeProperty> props = []> : 236 ComplexPattern<ty, numops, fn, roots, props> { 237 Operand OpClass = opclass; 238} 239 240def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 241 "selectVSplatUimm3", 242 [build_vector, bitconvert]>; 243 244def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 245 "selectVSplatUimm4", 246 [build_vector, bitconvert]>; 247 248def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 249 "selectVSplatUimm5", 250 [build_vector, bitconvert]>; 251 252def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 253 "selectVSplatUimm8", 254 [build_vector, bitconvert]>; 255 256def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 257 "selectVSplatSimm5", 258 [build_vector, bitconvert]>; 259 260def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 261 "selectVSplatUimm3", 262 [build_vector, bitconvert]>; 263 264def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 265 "selectVSplatUimm4", 266 [build_vector, bitconvert]>; 267 268def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 269 "selectVSplatUimm5", 270 [build_vector, bitconvert]>; 271 272def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 273 "selectVSplatSimm5", 274 [build_vector, bitconvert]>; 275 276def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 277 "selectVSplatUimm2", 278 [build_vector, bitconvert]>; 279 280def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 281 "selectVSplatUimm5", 282 [build_vector, bitconvert]>; 283 284def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 285 "selectVSplatSimm5", 286 [build_vector, bitconvert]>; 287 288def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 289 "selectVSplatUimm1", 290 [build_vector, bitconvert]>; 291 292def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 293 "selectVSplatUimm5", 294 [build_vector, bitconvert]>; 295 296def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 297 "selectVSplatUimm6", 298 [build_vector, bitconvert]>; 299 300def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 301 "selectVSplatSimm5", 302 [build_vector, bitconvert]>; 303 304// Any build_vector that is a constant splat with a value that is an exact 305// power of 2 306def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 307 [build_vector, bitconvert]>; 308 309def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt), 310 (fsub node:$wd, (fmul node:$ws, node:$wt))>; 311 312def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt), 313 (add node:$wd, (mul node:$ws, node:$wt))>; 314 315def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt), 316 (sub node:$wd, (mul node:$ws, node:$wt))>; 317 318def mul_fexp2 : PatFrag<(ops node:$ws, node:$wt), 319 (fmul node:$ws, (fexp2 node:$wt))>; 320 321// Immediates 322def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 323def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 324 325// Instruction encoding. 326class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 327class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 328class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 329class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 330 331class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 332class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 333class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 334class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 335 336class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 337class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 338class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 339class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 340 341class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 342class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 343class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 344class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 345 346class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 347class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 348class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 349class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 350 351class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 352class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 353class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 354class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 355 356class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 357 358class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 359 360class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 361class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 362class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 363class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 364 365class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 366class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 367class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 368class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 369 370class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 371class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 372class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 373class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 374 375class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 376class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 377class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 378class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 379 380class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 381class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 382class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 383class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 384 385class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 386class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 387class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 388class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 389 390class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 391class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 392class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 393class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 394 395class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 396class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 397class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 398class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 399 400class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 401class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 402class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 403class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 404 405class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 406class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 407class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 408class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 409 410class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 411class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 412class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 413class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 414 415class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 416class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 417class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 418class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 419 420class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 421 422class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 423 424class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 425 426class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 427 428class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 429class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 430class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 431class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 432 433class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 434class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 435class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 436class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 437 438class BNZ_B_ENC : MSA_CBRANCH_FMT<0b111, 0b00>; 439class BNZ_H_ENC : MSA_CBRANCH_FMT<0b111, 0b01>; 440class BNZ_W_ENC : MSA_CBRANCH_FMT<0b111, 0b10>; 441class BNZ_D_ENC : MSA_CBRANCH_FMT<0b111, 0b11>; 442 443class BNZ_V_ENC : MSA_CBRANCH_V_FMT<0b01000>; 444 445class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>; 446 447class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 448 449class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 450class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 451class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 452class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 453 454class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 455class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 456class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 457class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 458 459class BZ_B_ENC : MSA_CBRANCH_FMT<0b110, 0b00>; 460class BZ_H_ENC : MSA_CBRANCH_FMT<0b110, 0b01>; 461class BZ_W_ENC : MSA_CBRANCH_FMT<0b110, 0b10>; 462class BZ_D_ENC : MSA_CBRANCH_FMT<0b110, 0b11>; 463 464class BZ_V_ENC : MSA_CBRANCH_V_FMT<0b01011>; 465 466class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 467class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 468class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 469class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 470 471class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 472class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 473class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 474class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 475 476class CFCMSA_ENC : MSA_ELM_CFCMSA_FMT<0b0001111110, 0b011001>; 477 478class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 479class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 480class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 481class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 482 483class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 484class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 485class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 486class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 487 488class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 489class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 490class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 491class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 492 493class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 494class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 495class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 496class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 497 498class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 499class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 500class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 501class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 502 503class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 504class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 505class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 506class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 507 508class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 509class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 510class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 511class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 512 513class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 514class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 515class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 516class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 517 518class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>; 519class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>; 520class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>; 521 522class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; 523class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; 524class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; 525 526class CTCMSA_ENC : MSA_ELM_CTCMSA_FMT<0b0000111110, 0b011001>; 527 528class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 529class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 530class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 531class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 532 533class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 534class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 535class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 536class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 537 538class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 539class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 540class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 541 542class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 543class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 544class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 545 546class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 547class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 548class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 549 550class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 551class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 552class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 553 554class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 555class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 556class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 557 558class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 559class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 560class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 561 562class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 563class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 564 565class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 566class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 567 568class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 569class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 570 571class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 572class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 573 574class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 575class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 576 577class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 578class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 579 580class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 581class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 582 583class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 584class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 585 586class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 587class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 588 589class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 590class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 591 592class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 593class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 594 595class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 596class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 597 598class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 599class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 600 601class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 602class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 603 604class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 605class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 606 607class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 608class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 609 610class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 611class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 612 613class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 614class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 615 616class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 617class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 618 619class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 620class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 621 622class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 623class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 624 625class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 626class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 627 628class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 629class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 630class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 631 632class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 633class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 634 635class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 636class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 637 638class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 639class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 640 641class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 642class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 643 644class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 645class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 646 647class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 648class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 649 650class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 651class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 652 653class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 654class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 655 656class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 657class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 658 659class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 660class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 661 662class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 663class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 664 665class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 666class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 667 668class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 669class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 670 671class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 672class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 673 674class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 675class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 676 677class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 678class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 679 680class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 681class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 682 683class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 684class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 685 686class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 687class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 688 689class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 690class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 691 692class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 693class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 694 695class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 696class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 697 698class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 699class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 700 701class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 702class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 703 704class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 705class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 706 707class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 708class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 709 710class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 711class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 712 713class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 714class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 715 716class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 717class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 718 719class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 720class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 721class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 722 723class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 724class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 725class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 726 727class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 728class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 729class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 730 731class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 732class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 733class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 734 735class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 736class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 737class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 738class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 739 740class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 741class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 742class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 743class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 744 745class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 746class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 747class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 748class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 749 750class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 751class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 752class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 753class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 754 755class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>; 756class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>; 757class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>; 758 759class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 760class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 761class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 762class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 763 764class LD_B_ENC : MSA_MI10_FMT<0b00, 0b1000>; 765class LD_H_ENC : MSA_MI10_FMT<0b01, 0b1000>; 766class LD_W_ENC : MSA_MI10_FMT<0b10, 0b1000>; 767class LD_D_ENC : MSA_MI10_FMT<0b11, 0b1000>; 768 769class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 770class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 771class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 772class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 773 774class LSA_ENC : SPECIAL_LSA_FMT<0b000101>; 775 776class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 777class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 778 779class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 780class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 781 782class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 783class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 784class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 785class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 786 787class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 788class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 789class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 790class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 791 792class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 793class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 794class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 795class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 796 797class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 798class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 799class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 800class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 801 802class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 803class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 804class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 805class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 806 807class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 808class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 809class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 810class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 811 812class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 813class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 814class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 815class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 816 817class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 818class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 819class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 820class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 821 822class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 823class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 824class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 825class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 826 827class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 828class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 829class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 830class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 831 832class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 833class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 834class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 835class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 836 837class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 838class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 839class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 840class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 841 842class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 843class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 844class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 845class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 846 847class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 848 849class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 850class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 851 852class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 853class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 854 855class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 856class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 857class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 858class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 859 860class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 861class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 862 863class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 864class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 865 866class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 867class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 868class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 869class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 870 871class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 872class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 873class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 874class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 875 876class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 877class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 878class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 879class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 880 881class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 882 883class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 884 885class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 886 887class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 888 889class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 890class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 891class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 892class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 893 894class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 895class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 896class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 897class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 898 899class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 900class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 901class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 902class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 903 904class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 905class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 906class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 907class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 908 909class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 910class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 911class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 912class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 913 914class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 915class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 916class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 917 918class SLD_B_ENC : MSA_3R_INDEX_FMT<0b000, 0b00, 0b010100>; 919class SLD_H_ENC : MSA_3R_INDEX_FMT<0b000, 0b01, 0b010100>; 920class SLD_W_ENC : MSA_3R_INDEX_FMT<0b000, 0b10, 0b010100>; 921class SLD_D_ENC : MSA_3R_INDEX_FMT<0b000, 0b11, 0b010100>; 922 923class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 924class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 925class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 926class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 927 928class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 929class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 930class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 931class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 932 933class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 934class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 935class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 936class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 937 938class SPLAT_B_ENC : MSA_3R_INDEX_FMT<0b001, 0b00, 0b010100>; 939class SPLAT_H_ENC : MSA_3R_INDEX_FMT<0b001, 0b01, 0b010100>; 940class SPLAT_W_ENC : MSA_3R_INDEX_FMT<0b001, 0b10, 0b010100>; 941class SPLAT_D_ENC : MSA_3R_INDEX_FMT<0b001, 0b11, 0b010100>; 942 943class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 944class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 945class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 946class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 947 948class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 949class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 950class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 951class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 952 953class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 954class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 955class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 956class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 957 958class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 959class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 960class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 961class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 962 963class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 964class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 965class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 966class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 967 968class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 969class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 970class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 971class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 972 973class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 974class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 975class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 976class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 977 978class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 979class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 980class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 981class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 982 983class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 984class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 985class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 986class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 987 988class ST_B_ENC : MSA_MI10_FMT<0b00, 0b1001>; 989class ST_H_ENC : MSA_MI10_FMT<0b01, 0b1001>; 990class ST_W_ENC : MSA_MI10_FMT<0b10, 0b1001>; 991class ST_D_ENC : MSA_MI10_FMT<0b11, 0b1001>; 992 993class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 994class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 995class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 996class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 997 998class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 999class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 1000class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 1001class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 1002 1003class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 1004class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 1005class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 1006class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 1007 1008class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 1009class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 1010class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 1011class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 1012 1013class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 1014class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1015class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1016class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1017 1018class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1019class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1020class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1021class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1022 1023class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1024class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1025class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1026class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1027 1028class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1029 1030class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1031 1032// Instruction desc. 1033class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1034 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1035 InstrItinClass itin = NoItinerary> { 1036 dag OutOperandList = (outs ROWD:$wd); 1037 dag InOperandList = (ins ROWS:$ws, uimm3:$m); 1038 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1039 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))]; 1040 InstrItinClass Itinerary = itin; 1041} 1042 1043class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1044 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1045 InstrItinClass itin = NoItinerary> { 1046 dag OutOperandList = (outs ROWD:$wd); 1047 dag InOperandList = (ins ROWS:$ws, uimm4:$m); 1048 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1049 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))]; 1050 InstrItinClass Itinerary = itin; 1051} 1052 1053class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1054 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1055 InstrItinClass itin = NoItinerary> { 1056 dag OutOperandList = (outs ROWD:$wd); 1057 dag InOperandList = (ins ROWS:$ws, uimm5:$m); 1058 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1059 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))]; 1060 InstrItinClass Itinerary = itin; 1061} 1062 1063class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1064 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1065 InstrItinClass itin = NoItinerary> { 1066 dag OutOperandList = (outs ROWD:$wd); 1067 dag InOperandList = (ins ROWS:$ws, uimm6:$m); 1068 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1069 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))]; 1070 InstrItinClass Itinerary = itin; 1071} 1072 1073class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1074 SplatComplexPattern SplatImm, 1075 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1076 InstrItinClass itin = NoItinerary> { 1077 dag OutOperandList = (outs ROWD:$wd); 1078 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m); 1079 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1080 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))]; 1081 InstrItinClass Itinerary = itin; 1082} 1083 1084class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1085 ValueType VecTy, RegisterOperand ROD, 1086 RegisterOperand ROWS, 1087 InstrItinClass itin = NoItinerary> { 1088 dag OutOperandList = (outs ROD:$rd); 1089 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1090 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1091 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))]; 1092 InstrItinClass Itinerary = itin; 1093} 1094 1095class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1096 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1097 InstrItinClass itin = NoItinerary> { 1098 dag OutOperandList = (outs ROWD:$wd); 1099 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1100 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1101 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))]; 1102 InstrItinClass Itinerary = itin; 1103} 1104 1105class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1106 RegisterClass RCD, RegisterClass RCWS> : 1107 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1108 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1109 bit usesCustomInserter = 1; 1110} 1111 1112class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1113 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1114 RegisterOperand ROWS = ROWD, 1115 InstrItinClass itin = NoItinerary> { 1116 dag OutOperandList = (outs ROWD:$wd); 1117 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1118 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1119 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1120 InstrItinClass Itinerary = itin; 1121} 1122 1123class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1124 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1125 RegisterOperand ROWS = ROWD, 1126 InstrItinClass itin = NoItinerary> { 1127 dag OutOperandList = (outs ROWD:$wd); 1128 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1129 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1130 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1131 InstrItinClass Itinerary = itin; 1132} 1133 1134// This class is deprecated and will be removed in the next few patches 1135class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1136 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1137 InstrItinClass itin = NoItinerary> { 1138 dag OutOperandList = (outs ROWD:$wd); 1139 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1140 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1141 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1142 InstrItinClass Itinerary = itin; 1143} 1144 1145class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1146 RegisterOperand ROWS = ROWD, 1147 InstrItinClass itin = NoItinerary> { 1148 dag OutOperandList = (outs ROWD:$wd); 1149 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1150 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1151 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1152 InstrItinClass Itinerary = itin; 1153} 1154 1155class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1156 InstrItinClass itin = NoItinerary> { 1157 dag OutOperandList = (outs ROWD:$wd); 1158 dag InOperandList = (ins vsplat_simm10:$s10); 1159 string AsmString = !strconcat(instr_asm, "\t$wd, $s10"); 1160 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1161 list<dag> Pattern = []; 1162 bit hasSideEffects = 0; 1163 InstrItinClass Itinerary = itin; 1164} 1165 1166class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1167 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1168 InstrItinClass itin = NoItinerary> { 1169 dag OutOperandList = (outs ROWD:$wd); 1170 dag InOperandList = (ins ROWS:$ws); 1171 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1172 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1173 InstrItinClass Itinerary = itin; 1174} 1175 1176class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1177 SDPatternOperator OpNode, RegisterOperand ROWD, 1178 RegisterOperand ROS = ROWD, 1179 InstrItinClass itin = NoItinerary> { 1180 dag OutOperandList = (outs ROWD:$wd); 1181 dag InOperandList = (ins ROS:$rs); 1182 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1183 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))]; 1184 InstrItinClass Itinerary = itin; 1185} 1186 1187class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode, 1188 RegisterClass RCWD, RegisterClass RCWS = RCWD> : 1189 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs), 1190 [(set RCWD:$wd, (OpNode RCWS:$fs))]> { 1191 let usesCustomInserter = 1; 1192} 1193 1194class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1195 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1196 InstrItinClass itin = NoItinerary> { 1197 dag OutOperandList = (outs ROWD:$wd); 1198 dag InOperandList = (ins ROWS:$ws); 1199 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1200 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1201 InstrItinClass Itinerary = itin; 1202} 1203 1204class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1205 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1206 RegisterOperand ROWT = ROWD, 1207 InstrItinClass itin = NoItinerary> { 1208 dag OutOperandList = (outs ROWD:$wd); 1209 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1210 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1211 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1212 InstrItinClass Itinerary = itin; 1213} 1214 1215class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1216 RegisterOperand ROWS = ROWD, 1217 RegisterOperand ROWT = ROWD, 1218 InstrItinClass itin = NoItinerary> { 1219 dag OutOperandList = (outs ROWD:$wd); 1220 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1221 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1222 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1223 ROWT:$wt))]; 1224 string Constraints = "$wd = $wd_in"; 1225 InstrItinClass Itinerary = itin; 1226} 1227 1228class MSA_3R_INDEX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1229 RegisterOperand ROWD, RegisterOperand ROWS, 1230 RegisterOperand RORT, 1231 InstrItinClass itin = NoItinerary> { 1232 dag OutOperandList = (outs ROWD:$wd); 1233 dag InOperandList = (ins ROWS:$ws, RORT:$rt); 1234 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]"); 1235 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, RORT:$rt))]; 1236 InstrItinClass Itinerary = itin; 1237} 1238 1239class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1240 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1241 RegisterOperand ROWT = ROWD, 1242 InstrItinClass itin = NoItinerary> { 1243 dag OutOperandList = (outs ROWD:$wd); 1244 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1245 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1246 list<dag> Pattern = [(set ROWD:$wd, 1247 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1248 InstrItinClass Itinerary = itin; 1249 string Constraints = "$wd = $wd_in"; 1250} 1251 1252class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1253 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1254 RegisterOperand ROWT = ROWD, 1255 InstrItinClass itin = NoItinerary> : 1256 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1257 1258class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1259 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1260 RegisterOperand ROWT = ROWD, 1261 InstrItinClass itin = NoItinerary> : 1262 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1263 1264class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterOperand ROWD> { 1265 dag OutOperandList = (outs); 1266 dag InOperandList = (ins ROWD:$wt, brtarget:$offset); 1267 string AsmString = !strconcat(instr_asm, "\t$wt, $offset"); 1268 list<dag> Pattern = []; 1269 InstrItinClass Itinerary = IIBranch; 1270 bit isBranch = 1; 1271 bit isTerminator = 1; 1272 bit hasDelaySlot = 1; 1273 list<Register> Defs = [AT]; 1274} 1275 1276class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1277 RegisterOperand ROWD, RegisterOperand ROS, 1278 InstrItinClass itin = NoItinerary> { 1279 dag OutOperandList = (outs ROWD:$wd); 1280 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n); 1281 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1282 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1283 ROS:$rs, 1284 immZExt6:$n))]; 1285 InstrItinClass Itinerary = itin; 1286 string Constraints = "$wd = $wd_in"; 1287} 1288 1289class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1290 RegisterOperand ROWD, RegisterOperand ROFS> : 1291 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs), 1292 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs, 1293 immZExt6:$n))]> { 1294 bit usesCustomInserter = 1; 1295 string Constraints = "$wd = $wd_in"; 1296} 1297 1298class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1299 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1300 InstrItinClass itin = NoItinerary> { 1301 dag OutOperandList = (outs ROWD:$wd); 1302 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws); 1303 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1304 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1305 immZExt6:$n, 1306 ROWS:$ws))]; 1307 InstrItinClass Itinerary = itin; 1308 string Constraints = "$wd = $wd_in"; 1309} 1310 1311class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1312 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1313 RegisterOperand ROWT = ROWD, 1314 InstrItinClass itin = NoItinerary> { 1315 dag OutOperandList = (outs ROWD:$wd); 1316 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1317 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1318 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1319 InstrItinClass Itinerary = itin; 1320} 1321 1322class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1323 RegisterOperand ROWD, 1324 RegisterOperand ROWS = ROWD, 1325 InstrItinClass itin = NoItinerary> { 1326 dag OutOperandList = (outs ROWD:$wd); 1327 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n); 1328 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1329 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws, 1330 ROWS:$ws))]; 1331 InstrItinClass Itinerary = itin; 1332} 1333 1334class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD, 1335 RegisterOperand ROWS = ROWD, 1336 RegisterOperand ROWT = ROWD> : 1337 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt), 1338 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>; 1339 1340class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1341 IsCommutable; 1342class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1343 IsCommutable; 1344class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1345 IsCommutable; 1346class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1347 IsCommutable; 1348 1349class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1350 MSA128BOpnd>, IsCommutable; 1351class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1352 MSA128HOpnd>, IsCommutable; 1353class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1354 MSA128WOpnd>, IsCommutable; 1355class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1356 MSA128DOpnd>, IsCommutable; 1357 1358class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1359 MSA128BOpnd>, IsCommutable; 1360class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1361 MSA128HOpnd>, IsCommutable; 1362class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1363 MSA128WOpnd>, IsCommutable; 1364class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1365 MSA128DOpnd>, IsCommutable; 1366 1367class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1368 MSA128BOpnd>, IsCommutable; 1369class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1370 MSA128HOpnd>, IsCommutable; 1371class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1372 MSA128WOpnd>, IsCommutable; 1373class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1374 MSA128DOpnd>, IsCommutable; 1375 1376class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1377class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1378class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1379class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1380 1381class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1382 MSA128BOpnd>; 1383class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1384 MSA128HOpnd>; 1385class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1386 MSA128WOpnd>; 1387class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1388 MSA128DOpnd>; 1389 1390class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>; 1391class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>; 1392class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>; 1393class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>; 1394 1395class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1396 MSA128BOpnd>; 1397 1398class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1399 MSA128BOpnd>; 1400class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1401 MSA128HOpnd>; 1402class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1403 MSA128WOpnd>; 1404class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1405 MSA128DOpnd>; 1406 1407class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1408 MSA128BOpnd>; 1409class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1410 MSA128HOpnd>; 1411class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1412 MSA128WOpnd>; 1413class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1414 MSA128DOpnd>; 1415 1416class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1417 IsCommutable; 1418class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1419 IsCommutable; 1420class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1421 IsCommutable; 1422class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1423 IsCommutable; 1424 1425class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1426 IsCommutable; 1427class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1428 IsCommutable; 1429class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1430 IsCommutable; 1431class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1432 IsCommutable; 1433 1434class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1435 MSA128BOpnd>, IsCommutable; 1436class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1437 MSA128HOpnd>, IsCommutable; 1438class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1439 MSA128WOpnd>, IsCommutable; 1440class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1441 MSA128DOpnd>, IsCommutable; 1442 1443class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1444 MSA128BOpnd>, IsCommutable; 1445class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1446 MSA128HOpnd>, IsCommutable; 1447class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1448 MSA128WOpnd>, IsCommutable; 1449class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1450 MSA128DOpnd>, IsCommutable; 1451 1452class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1453class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1454class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1455class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1456 1457class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, 1458 MSA128BOpnd>; 1459class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, 1460 MSA128HOpnd>; 1461class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, 1462 MSA128WOpnd>; 1463class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, 1464 MSA128DOpnd>; 1465 1466class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1467class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1468class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1469class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1470 1471class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1472 MSA128BOpnd>; 1473class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1474 MSA128HOpnd>; 1475class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1476 MSA128WOpnd>; 1477class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1478 MSA128DOpnd>; 1479 1480class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1481class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1482class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1483class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1484 1485class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1486 MSA128BOpnd>; 1487class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1488 MSA128HOpnd>; 1489class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1490 MSA128WOpnd>; 1491class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1492 MSA128DOpnd>; 1493 1494class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>; 1495 1496class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, 1497 MSA128BOpnd>; 1498 1499class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>; 1500 1501class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>; 1502 1503class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1504class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1505class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1506class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1507 1508class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, 1509 MSA128BOpnd>; 1510class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, 1511 MSA128HOpnd>; 1512class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, 1513 MSA128WOpnd>; 1514class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, 1515 MSA128DOpnd>; 1516 1517class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128BOpnd>; 1518class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128HOpnd>; 1519class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128WOpnd>; 1520class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128DOpnd>; 1521 1522class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128BOpnd>; 1523 1524class BSEL_V_DESC { 1525 dag OutOperandList = (outs MSA128BOpnd:$wd); 1526 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1527 MSA128BOpnd:$wt); 1528 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1529 list<dag> Pattern = [(set MSA128BOpnd:$wd, 1530 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1531 MSA128BOpnd:$wt))]; 1532 InstrItinClass Itinerary = NoItinerary; 1533 string Constraints = "$wd = $wd_in"; 1534} 1535 1536class BSELI_B_DESC { 1537 dag OutOperandList = (outs MSA128BOpnd:$wd); 1538 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1539 vsplat_uimm8:$u8); 1540 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1541 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1542 MSA128BOpnd:$ws, 1543 vsplati8_uimm8:$u8))]; 1544 InstrItinClass Itinerary = NoItinerary; 1545 string Constraints = "$wd = $wd_in"; 1546} 1547 1548class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1549class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1550class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1551class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1552 1553class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, 1554 MSA128BOpnd>; 1555class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, 1556 MSA128HOpnd>; 1557class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, 1558 MSA128WOpnd>; 1559class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, 1560 MSA128DOpnd>; 1561 1562class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128BOpnd>; 1563class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128HOpnd>; 1564class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128WOpnd>; 1565class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128DOpnd>; 1566 1567class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128BOpnd>; 1568 1569class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1570 IsCommutable; 1571class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1572 IsCommutable; 1573class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1574 IsCommutable; 1575class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1576 IsCommutable; 1577 1578class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1579 MSA128BOpnd>; 1580class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1581 MSA128HOpnd>; 1582class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1583 MSA128WOpnd>; 1584class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1585 MSA128DOpnd>; 1586 1587class CFCMSA_DESC { 1588 dag OutOperandList = (outs GPR32Opnd:$rd); 1589 dag InOperandList = (ins MSA128CROpnd:$cs); 1590 string AsmString = "cfcmsa\t$rd, $cs"; 1591 InstrItinClass Itinerary = NoItinerary; 1592 bit hasSideEffects = 1; 1593} 1594 1595class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1596class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1597class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1598class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1599 1600class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1601class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1602class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1603class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1604 1605class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1606 vsplati8_simm5, MSA128BOpnd>; 1607class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1608 vsplati16_simm5, MSA128HOpnd>; 1609class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1610 vsplati32_simm5, MSA128WOpnd>; 1611class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1612 vsplati64_simm5, MSA128DOpnd>; 1613 1614class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1615 vsplati8_uimm5, MSA128BOpnd>; 1616class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1617 vsplati16_uimm5, MSA128HOpnd>; 1618class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1619 vsplati32_uimm5, MSA128WOpnd>; 1620class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1621 vsplati64_uimm5, MSA128DOpnd>; 1622 1623class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1624class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1625class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1626class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1627 1628class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1629class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1630class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1631class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1632 1633class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1634 vsplati8_simm5, MSA128BOpnd>; 1635class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1636 vsplati16_simm5, MSA128HOpnd>; 1637class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1638 vsplati32_simm5, MSA128WOpnd>; 1639class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1640 vsplati64_simm5, MSA128DOpnd>; 1641 1642class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1643 vsplati8_uimm5, MSA128BOpnd>; 1644class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1645 vsplati16_uimm5, MSA128HOpnd>; 1646class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1647 vsplati32_uimm5, MSA128WOpnd>; 1648class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1649 vsplati64_uimm5, MSA128DOpnd>; 1650 1651class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1652 GPR32Opnd, MSA128BOpnd>; 1653class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1654 GPR32Opnd, MSA128HOpnd>; 1655class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1656 GPR32Opnd, MSA128WOpnd>; 1657 1658class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1659 GPR32Opnd, MSA128BOpnd>; 1660class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1661 GPR32Opnd, MSA128HOpnd>; 1662class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1663 GPR32Opnd, MSA128WOpnd>; 1664 1665class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1666 MSA128W>; 1667class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1668 MSA128D>; 1669 1670class CTCMSA_DESC { 1671 dag OutOperandList = (outs); 1672 dag InOperandList = (ins MSA128CROpnd:$cd, GPR32Opnd:$rs); 1673 string AsmString = "ctcmsa\t$cd, $rs"; 1674 InstrItinClass Itinerary = NoItinerary; 1675 bit hasSideEffects = 1; 1676} 1677 1678class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1679class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1680class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1681class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1682 1683class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1684class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1685class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1686class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1687 1688class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1689 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1690 IsCommutable; 1691class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1692 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1693 IsCommutable; 1694class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1695 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1696 IsCommutable; 1697 1698class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1699 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1700 IsCommutable; 1701class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1702 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1703 IsCommutable; 1704class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1705 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1706 IsCommutable; 1707 1708class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1709 MSA128HOpnd, MSA128BOpnd, 1710 MSA128BOpnd>, IsCommutable; 1711class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1712 MSA128WOpnd, MSA128HOpnd, 1713 MSA128HOpnd>, IsCommutable; 1714class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1715 MSA128DOpnd, MSA128WOpnd, 1716 MSA128WOpnd>, IsCommutable; 1717 1718class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1719 MSA128HOpnd, MSA128BOpnd, 1720 MSA128BOpnd>, IsCommutable; 1721class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1722 MSA128WOpnd, MSA128HOpnd, 1723 MSA128HOpnd>, IsCommutable; 1724class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1725 MSA128DOpnd, MSA128WOpnd, 1726 MSA128WOpnd>, IsCommutable; 1727 1728class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1729 MSA128HOpnd, MSA128BOpnd, 1730 MSA128BOpnd>; 1731class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1732 MSA128WOpnd, MSA128HOpnd, 1733 MSA128HOpnd>; 1734class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1735 MSA128DOpnd, MSA128WOpnd, 1736 MSA128WOpnd>; 1737 1738class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1739 MSA128HOpnd, MSA128BOpnd, 1740 MSA128BOpnd>; 1741class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1742 MSA128WOpnd, MSA128HOpnd, 1743 MSA128HOpnd>; 1744class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1745 MSA128DOpnd, MSA128WOpnd, 1746 MSA128WOpnd>; 1747 1748class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1749 IsCommutable; 1750class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1751 IsCommutable; 1752 1753class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1754 IsCommutable; 1755class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1756 IsCommutable; 1757 1758class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1759 IsCommutable; 1760class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1761 IsCommutable; 1762 1763class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1764 MSA128WOpnd>; 1765class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1766 MSA128DOpnd>; 1767 1768class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1769class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1770 1771class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1772class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1773 1774class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1775 IsCommutable; 1776class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1777 IsCommutable; 1778 1779class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1780 IsCommutable; 1781class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1782 IsCommutable; 1783 1784class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1785 IsCommutable; 1786class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1787 IsCommutable; 1788 1789class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1790 IsCommutable; 1791class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1792 IsCommutable; 1793 1794class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1795 IsCommutable; 1796class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1797 IsCommutable; 1798 1799class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1800 IsCommutable; 1801class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1802 IsCommutable; 1803 1804class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1805 IsCommutable; 1806class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1807 IsCommutable; 1808 1809class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1810class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1811 1812class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1813 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1814class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1815 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1816 1817// The fexp2.df instruction multiplies the first operand by 2 to the power of 1818// the second operand. We therefore need a pseudo-insn in order to invent the 1819// 1.0 when we only need to match ISD::FEXP2. 1820class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", mul_fexp2, MSA128WOpnd>; 1821class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", mul_fexp2, MSA128DOpnd>; 1822let usesCustomInserter = 1 in { 1823 class FEXP2_W_1_PSEUDO_DESC : 1824 MipsPseudo<(outs MSA128W:$wd), (ins MSA128W:$ws), 1825 [(set MSA128W:$wd, (fexp2 MSA128W:$ws))]>; 1826 class FEXP2_D_1_PSEUDO_DESC : 1827 MipsPseudo<(outs MSA128D:$wd), (ins MSA128D:$ws), 1828 [(set MSA128D:$wd, (fexp2 MSA128D:$ws))]>; 1829} 1830 1831class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1832 MSA128WOpnd, MSA128HOpnd>; 1833class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1834 MSA128DOpnd, MSA128WOpnd>; 1835 1836class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1837 MSA128WOpnd, MSA128HOpnd>; 1838class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1839 MSA128DOpnd, MSA128WOpnd>; 1840 1841class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 1842class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 1843 1844class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 1845class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 1846 1847class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1848 MSA128WOpnd, MSA128HOpnd>; 1849class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1850 MSA128DOpnd, MSA128WOpnd>; 1851 1852class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1853 MSA128WOpnd, MSA128HOpnd>; 1854class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1855 MSA128DOpnd, MSA128WOpnd>; 1856 1857class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 1858 MSA128BOpnd, GPR32Opnd>; 1859class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 1860 MSA128HOpnd, GPR32Opnd>; 1861class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 1862 MSA128WOpnd, GPR32Opnd>; 1863 1864class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W, 1865 FGR32>; 1866class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D, 1867 FGR64>; 1868 1869class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1870class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1871 1872class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 1873class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 1874 1875class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1876class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1877 1878class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1879 MSA128WOpnd>; 1880class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1881 MSA128DOpnd>; 1882 1883class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1884class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1885 1886class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1887 MSA128WOpnd>; 1888class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1889 MSA128DOpnd>; 1890 1891class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>; 1892class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>; 1893 1894class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1895class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1896 1897class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1898class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1899 1900class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1901class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1902 1903class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1904 MSA128WOpnd>; 1905class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1906 MSA128DOpnd>; 1907 1908class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1909class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1910 1911class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1912class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1913 1914class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1915class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1916 1917class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1918class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1919 1920class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1921class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1922 1923class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1924class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1925 1926class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1927class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1928 1929class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1930class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1931 1932class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1933 MSA128WOpnd>; 1934class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1935 MSA128DOpnd>; 1936 1937class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1938 MSA128WOpnd>; 1939class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1940 MSA128DOpnd>; 1941 1942class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1943 MSA128WOpnd>; 1944class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1945 MSA128DOpnd>; 1946 1947class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1948 MSA128WOpnd>; 1949class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1950 MSA128DOpnd>; 1951 1952class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1953 MSA128WOpnd>; 1954class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1955 MSA128DOpnd>; 1956 1957class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1958 MSA128WOpnd>; 1959class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1960 MSA128DOpnd>; 1961 1962class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1963 MSA128WOpnd>; 1964class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1965 MSA128DOpnd>; 1966 1967class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1968 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1969class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1970 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1971 1972class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 1973 MSA128WOpnd>; 1974class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 1975 MSA128DOpnd>; 1976 1977class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 1978 MSA128WOpnd>; 1979class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 1980 MSA128DOpnd>; 1981 1982class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 1983 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1984class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 1985 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1986class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 1987 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1988 1989class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 1990 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1991class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 1992 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1993class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 1994 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1995 1996class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 1997 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1998class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 1999 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2000class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 2001 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2002 2003class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 2004 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2005class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 2006 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2007class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 2008 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2009 2010class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 2011class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 2012class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 2013class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 2014 2015class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 2016class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 2017class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 2018class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 2019 2020class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 2021class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 2022class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 2023class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 2024 2025class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 2026class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 2027class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 2028class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 2029 2030class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, 2031 MSA128BOpnd, GPR32Opnd>; 2032class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, 2033 MSA128HOpnd, GPR32Opnd>; 2034class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, 2035 MSA128WOpnd, GPR32Opnd>; 2036 2037class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 2038 MSA128WOpnd, FGR32Opnd>; 2039class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 2040 MSA128DOpnd, FGR64Opnd>; 2041 2042class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, 2043 MSA128BOpnd>; 2044class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, 2045 MSA128HOpnd>; 2046class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, 2047 MSA128WOpnd>; 2048class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, 2049 MSA128DOpnd>; 2050 2051class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2052 ValueType TyNode, RegisterOperand ROWD, 2053 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 2054 InstrItinClass itin = NoItinerary> { 2055 dag OutOperandList = (outs ROWD:$wd); 2056 dag InOperandList = (ins MemOpnd:$addr); 2057 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2058 list<dag> Pattern = [(set ROWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2059 InstrItinClass Itinerary = itin; 2060 string DecoderMethod = "DecodeMSA128Mem"; 2061} 2062 2063class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128BOpnd>; 2064class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128HOpnd>; 2065class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128WOpnd>; 2066class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128DOpnd>; 2067 2068class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128BOpnd>; 2069class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128HOpnd>; 2070class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128WOpnd>; 2071class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128DOpnd>; 2072 2073class LSA_DESC { 2074 dag OutOperandList = (outs GPR32Opnd:$rd); 2075 dag InOperandList = (ins GPR32Opnd:$rs, GPR32Opnd:$rt, uimm2:$sa); 2076 string AsmString = "lsa\t$rd, $rs, $rt, $sa"; 2077 list<dag> Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rs, 2078 (shl GPR32Opnd:$rt, 2079 immZExt2Lsa:$sa)))]; 2080 InstrItinClass Itinerary = NoItinerary; 2081} 2082 2083class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2084 MSA128HOpnd>; 2085class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2086 MSA128WOpnd>; 2087 2088class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2089 MSA128HOpnd>; 2090class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2091 MSA128WOpnd>; 2092 2093class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>; 2094class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>; 2095class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>; 2096class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>; 2097 2098class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2099class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2100class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2101class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2102 2103class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2104class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2105class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2106class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2107 2108class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2109class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2110class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2111class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2112 2113class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2114 MSA128BOpnd>; 2115class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2116 MSA128HOpnd>; 2117class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2118 MSA128WOpnd>; 2119class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2120 MSA128DOpnd>; 2121 2122class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2123 MSA128BOpnd>; 2124class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2125 MSA128HOpnd>; 2126class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2127 MSA128WOpnd>; 2128class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2129 MSA128DOpnd>; 2130 2131class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2132class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2133class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2134class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2135 2136class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2137class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2138class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2139class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2140 2141class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2142class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2143class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2144class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2145 2146class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2147 MSA128BOpnd>; 2148class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2149 MSA128HOpnd>; 2150class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2151 MSA128WOpnd>; 2152class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2153 MSA128DOpnd>; 2154 2155class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2156 MSA128BOpnd>; 2157class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2158 MSA128HOpnd>; 2159class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2160 MSA128WOpnd>; 2161class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2162 MSA128DOpnd>; 2163 2164class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2165class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2166class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2167class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2168 2169class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2170class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2171class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2172class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2173 2174class MOVE_V_DESC { 2175 dag OutOperandList = (outs MSA128BOpnd:$wd); 2176 dag InOperandList = (ins MSA128BOpnd:$ws); 2177 string AsmString = "move.v\t$wd, $ws"; 2178 list<dag> Pattern = []; 2179 InstrItinClass Itinerary = NoItinerary; 2180} 2181 2182class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2183 MSA128HOpnd>; 2184class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2185 MSA128WOpnd>; 2186 2187class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2188 MSA128HOpnd>; 2189class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2190 MSA128WOpnd>; 2191 2192class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>; 2193class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>; 2194class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>; 2195class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>; 2196 2197class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2198 MSA128HOpnd>; 2199class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2200 MSA128WOpnd>; 2201 2202class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2203 MSA128HOpnd>; 2204class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2205 MSA128WOpnd>; 2206 2207class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2208class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2209class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2210class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2211 2212class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2213class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2214class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2215class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2216 2217class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2218class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2219class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2220class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2221 2222class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>; 2223class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>; 2224class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>; 2225class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>; 2226 2227class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2228 MSA128BOpnd>; 2229 2230class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>; 2231class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>; 2232class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>; 2233class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>; 2234 2235class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2236 2237class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2238class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2239class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2240class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2241 2242class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2243class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2244class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2245class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2246 2247class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2248class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2249class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2250class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2251 2252class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, 2253 MSA128BOpnd>; 2254class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, 2255 MSA128HOpnd>; 2256class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, 2257 MSA128WOpnd>; 2258class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, 2259 MSA128DOpnd>; 2260 2261class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, 2262 MSA128BOpnd>; 2263class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, 2264 MSA128HOpnd>; 2265class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, 2266 MSA128WOpnd>; 2267class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, 2268 MSA128DOpnd>; 2269 2270class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2271class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2272class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2273 2274class SLD_B_DESC : MSA_3R_INDEX_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd, 2275 MSA128BOpnd, GPR32Opnd>; 2276class SLD_H_DESC : MSA_3R_INDEX_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd, 2277 MSA128HOpnd, GPR32Opnd>; 2278class SLD_W_DESC : MSA_3R_INDEX_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd, 2279 MSA128WOpnd, GPR32Opnd>; 2280class SLD_D_DESC : MSA_3R_INDEX_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd, 2281 MSA128DOpnd, GPR32Opnd>; 2282 2283class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>; 2284class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>; 2285class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>; 2286class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>; 2287 2288class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2289class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2290class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2291class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2292 2293class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2294 MSA128BOpnd>; 2295class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2296 MSA128HOpnd>; 2297class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2298 MSA128WOpnd>; 2299class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2300 MSA128DOpnd>; 2301 2302class SPLAT_B_DESC : MSA_3R_INDEX_DESC_BASE<"splat.b", int_mips_splat_b, 2303 MSA128BOpnd, MSA128BOpnd, 2304 GPR32Opnd>; 2305class SPLAT_H_DESC : MSA_3R_INDEX_DESC_BASE<"splat.h", int_mips_splat_h, 2306 MSA128HOpnd, MSA128HOpnd, 2307 GPR32Opnd>; 2308class SPLAT_W_DESC : MSA_3R_INDEX_DESC_BASE<"splat.w", int_mips_splat_w, 2309 MSA128WOpnd, MSA128WOpnd, 2310 GPR32Opnd>; 2311class SPLAT_D_DESC : MSA_3R_INDEX_DESC_BASE<"splat.d", int_mips_splat_d, 2312 MSA128DOpnd, MSA128DOpnd, 2313 GPR32Opnd>; 2314 2315class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2316 MSA128BOpnd>; 2317class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2318 MSA128HOpnd>; 2319class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2320 MSA128WOpnd>; 2321class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2322 MSA128DOpnd>; 2323 2324class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2325class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2326class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2327class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2328 2329class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2330 MSA128BOpnd>; 2331class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2332 MSA128HOpnd>; 2333class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2334 MSA128WOpnd>; 2335class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2336 MSA128DOpnd>; 2337 2338class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2339class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2340class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2341class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2342 2343class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, 2344 MSA128BOpnd>; 2345class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, 2346 MSA128HOpnd>; 2347class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, 2348 MSA128WOpnd>; 2349class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, 2350 MSA128DOpnd>; 2351 2352class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2353class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2354class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2355class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2356 2357class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2358 MSA128BOpnd>; 2359class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2360 MSA128HOpnd>; 2361class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2362 MSA128WOpnd>; 2363class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2364 MSA128DOpnd>; 2365 2366class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2367class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2368class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2369class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2370 2371class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, 2372 MSA128BOpnd>; 2373class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, 2374 MSA128HOpnd>; 2375class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, 2376 MSA128WOpnd>; 2377class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, 2378 MSA128DOpnd>; 2379 2380class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2381 ValueType TyNode, RegisterOperand ROWD, 2382 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 2383 InstrItinClass itin = NoItinerary> { 2384 dag OutOperandList = (outs); 2385 dag InOperandList = (ins ROWD:$wd, MemOpnd:$addr); 2386 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2387 list<dag> Pattern = [(OpNode (TyNode ROWD:$wd), Addr:$addr)]; 2388 InstrItinClass Itinerary = itin; 2389 string DecoderMethod = "DecodeMSA128Mem"; 2390} 2391 2392class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128BOpnd>; 2393class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128HOpnd>; 2394class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128WOpnd>; 2395class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128DOpnd>; 2396 2397class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2398 MSA128BOpnd>; 2399class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2400 MSA128HOpnd>; 2401class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2402 MSA128WOpnd>; 2403class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2404 MSA128DOpnd>; 2405 2406class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2407 MSA128BOpnd>; 2408class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2409 MSA128HOpnd>; 2410class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2411 MSA128WOpnd>; 2412class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2413 MSA128DOpnd>; 2414 2415class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2416 MSA128BOpnd>; 2417class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2418 MSA128HOpnd>; 2419class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2420 MSA128WOpnd>; 2421class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2422 MSA128DOpnd>; 2423 2424class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2425 MSA128BOpnd>; 2426class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2427 MSA128HOpnd>; 2428class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2429 MSA128WOpnd>; 2430class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2431 MSA128DOpnd>; 2432 2433class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2434class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2435class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2436class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2437 2438class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2439 MSA128BOpnd>; 2440class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2441 MSA128HOpnd>; 2442class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2443 MSA128WOpnd>; 2444class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2445 MSA128DOpnd>; 2446 2447class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2448class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2449class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2450class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2451 2452class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>; 2453class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>; 2454class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>; 2455class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>; 2456 2457class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2458 MSA128BOpnd>; 2459 2460// Instruction defs. 2461def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2462def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2463def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2464def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2465 2466def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2467def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2468def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2469def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2470 2471def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2472def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2473def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2474def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2475 2476def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2477def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2478def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2479def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2480 2481def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2482def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2483def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2484def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2485 2486def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2487def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2488def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2489def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2490 2491def AND_V : AND_V_ENC, AND_V_DESC; 2492def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2493 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2494 MSA128BOpnd:$ws, 2495 MSA128BOpnd:$wt)>; 2496def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2497 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2498 MSA128BOpnd:$ws, 2499 MSA128BOpnd:$wt)>; 2500def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2501 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2502 MSA128BOpnd:$ws, 2503 MSA128BOpnd:$wt)>; 2504 2505def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2506 2507def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2508def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2509def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2510def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2511 2512def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2513def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2514def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2515def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2516 2517def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2518def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2519def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2520def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2521 2522def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2523def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2524def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2525def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2526 2527def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2528def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2529def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2530def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2531 2532def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2533def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2534def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2535def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2536 2537def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2538def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2539def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2540def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2541 2542def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2543def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2544def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2545def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2546 2547def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2548def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2549def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2550def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2551 2552def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2553def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2554def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2555def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2556 2557def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2558def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2559def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2560def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2561 2562def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2563def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2564def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2565def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2566 2567def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2568 2569def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2570 2571def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2572 2573def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2574 2575def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2576def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2577def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2578def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2579 2580def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2581def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2582def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2583def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2584 2585def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2586def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2587def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2588def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2589 2590def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2591 2592def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2593 2594class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> : 2595 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt), 2596 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>, 2597 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in, 2598 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> { 2599 let Constraints = "$wd_in = $wd"; 2600} 2601 2602def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>; 2603def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>; 2604def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>; 2605def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>; 2606def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>; 2607 2608def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2609 2610def BSET_B : BSET_B_ENC, BSET_B_DESC; 2611def BSET_H : BSET_H_ENC, BSET_H_DESC; 2612def BSET_W : BSET_W_ENC, BSET_W_DESC; 2613def BSET_D : BSET_D_ENC, BSET_D_DESC; 2614 2615def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2616def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2617def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2618def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2619 2620def BZ_B : BZ_B_ENC, BZ_B_DESC; 2621def BZ_H : BZ_H_ENC, BZ_H_DESC; 2622def BZ_W : BZ_W_ENC, BZ_W_DESC; 2623def BZ_D : BZ_D_ENC, BZ_D_DESC; 2624 2625def BZ_V : BZ_V_ENC, BZ_V_DESC; 2626 2627def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2628def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2629def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2630def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2631 2632def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2633def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2634def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2635def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2636 2637def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2638 2639def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2640def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2641def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2642def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2643 2644def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2645def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2646def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2647def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2648 2649def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2650def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2651def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2652def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2653 2654def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2655def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2656def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2657def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2658 2659def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2660def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2661def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2662def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2663 2664def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2665def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2666def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2667def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2668 2669def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2670def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2671def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2672def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2673 2674def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2675def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2676def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2677def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2678 2679def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2680def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2681def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2682 2683def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2684def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2685def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2686 2687def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2688def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2689 2690def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2691 2692def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2693def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2694def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2695def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2696 2697def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2698def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2699def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2700def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2701 2702def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2703def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2704def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2705 2706def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2707def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2708def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2709 2710def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2711def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2712def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2713 2714def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2715def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2716def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2717 2718def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2719def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2720def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2721 2722def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2723def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2724def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2725 2726def FADD_W : FADD_W_ENC, FADD_W_DESC; 2727def FADD_D : FADD_D_ENC, FADD_D_DESC; 2728 2729def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2730def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2731 2732def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2733def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2734 2735def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2736def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2737 2738def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2739def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2740 2741def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2742def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2743 2744def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2745def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2746 2747def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2748def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2749 2750def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2751def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2752 2753def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2754def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2755 2756def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2757def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2758 2759def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2760def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2761 2762def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2763def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2764 2765def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2766def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2767 2768def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2769def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2770 2771def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2772def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2773def FEXP2_W_1_PSEUDO : FEXP2_W_1_PSEUDO_DESC; 2774def FEXP2_D_1_PSEUDO : FEXP2_D_1_PSEUDO_DESC; 2775 2776def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2777def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2778 2779def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2780def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2781 2782def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2783def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2784 2785def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2786def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2787 2788def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2789def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2790 2791def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2792def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2793 2794def FILL_B : FILL_B_ENC, FILL_B_DESC; 2795def FILL_H : FILL_H_ENC, FILL_H_DESC; 2796def FILL_W : FILL_W_ENC, FILL_W_DESC; 2797def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC; 2798def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC; 2799 2800def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2801def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2802 2803def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2804def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2805 2806def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2807def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2808 2809def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2810def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2811 2812def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2813def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2814 2815def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2816def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2817 2818def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2819def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2820 2821def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2822def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2823 2824def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2825def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2826 2827def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2828def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2829 2830def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2831def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2832 2833def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2834def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2835 2836def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2837def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2838 2839def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2840def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2841 2842def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2843def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2844 2845def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2846def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2847 2848def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2849def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2850 2851def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2852def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2853 2854def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2855def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2856 2857def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2858def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2859 2860def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2861def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2862 2863def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2864def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2865 2866def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2867def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2868 2869def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2870def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2871 2872def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2873def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2874 2875def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2876def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2877 2878def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2879def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2880 2881def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2882def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2883 2884def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2885def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2886 2887def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2888def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2889def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2890 2891def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2892def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2893def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2894 2895def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2896def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2897def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2898 2899def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2900def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2901def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2902 2903def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2904def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2905def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2906def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2907 2908def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2909def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2910def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2911def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2912 2913def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2914def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2915def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2916def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2917 2918def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2919def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2920def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2921def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2922 2923def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2924def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2925def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2926 2927// INSERT_FW_PSEUDO defined after INSVE_W 2928// INSERT_FD_PSEUDO defined after INSVE_D 2929 2930def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2931def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2932def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2933def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2934 2935def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 2936def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 2937 2938def LD_B: LD_B_ENC, LD_B_DESC; 2939def LD_H: LD_H_ENC, LD_H_DESC; 2940def LD_W: LD_W_ENC, LD_W_DESC; 2941def LD_D: LD_D_ENC, LD_D_DESC; 2942 2943def LDI_B : LDI_B_ENC, LDI_B_DESC; 2944def LDI_H : LDI_H_ENC, LDI_H_DESC; 2945def LDI_W : LDI_W_ENC, LDI_W_DESC; 2946def LDI_D : LDI_D_ENC, LDI_D_DESC; 2947 2948def LSA : LSA_ENC, LSA_DESC; 2949 2950def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2951def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2952 2953def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2954def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2955 2956def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2957def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2958def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2959def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2960 2961def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2962def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2963def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2964def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2965 2966def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2967def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2968def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2969def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2970 2971def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2972def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2973def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2974def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2975 2976def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2977def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2978def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2979def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2980 2981def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2982def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2983def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2984def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2985 2986def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2987def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2988def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2989def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2990 2991def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2992def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2993def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2994def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2995 2996def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2997def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2998def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2999def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 3000 3001def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 3002def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 3003def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 3004def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 3005 3006def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 3007def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 3008def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 3009def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 3010 3011def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 3012def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 3013def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 3014def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 3015 3016def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 3017def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 3018def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 3019def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 3020 3021def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 3022 3023def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 3024def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 3025 3026def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 3027def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 3028 3029def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 3030def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 3031def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 3032def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 3033 3034def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 3035def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 3036 3037def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 3038def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 3039 3040def MULV_B : MULV_B_ENC, MULV_B_DESC; 3041def MULV_H : MULV_H_ENC, MULV_H_DESC; 3042def MULV_W : MULV_W_ENC, MULV_W_DESC; 3043def MULV_D : MULV_D_ENC, MULV_D_DESC; 3044 3045def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 3046def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 3047def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 3048def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 3049 3050def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 3051def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 3052def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 3053def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 3054 3055def NOR_V : NOR_V_ENC, NOR_V_DESC; 3056def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 3057 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3058 MSA128BOpnd:$ws, 3059 MSA128BOpnd:$wt)>; 3060def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 3061 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3062 MSA128BOpnd:$ws, 3063 MSA128BOpnd:$wt)>; 3064def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 3065 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3066 MSA128BOpnd:$ws, 3067 MSA128BOpnd:$wt)>; 3068 3069def NORI_B : NORI_B_ENC, NORI_B_DESC; 3070 3071def OR_V : OR_V_ENC, OR_V_DESC; 3072def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 3073 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3074 MSA128BOpnd:$ws, 3075 MSA128BOpnd:$wt)>; 3076def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 3077 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3078 MSA128BOpnd:$ws, 3079 MSA128BOpnd:$wt)>; 3080def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3081 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3082 MSA128BOpnd:$ws, 3083 MSA128BOpnd:$wt)>; 3084 3085def ORI_B : ORI_B_ENC, ORI_B_DESC; 3086 3087def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3088def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3089def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3090def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3091 3092def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3093def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3094def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3095def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3096 3097def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3098def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3099def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3100def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3101 3102def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3103def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3104def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3105def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3106 3107def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3108def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3109def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3110def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3111 3112def SHF_B : SHF_B_ENC, SHF_B_DESC; 3113def SHF_H : SHF_H_ENC, SHF_H_DESC; 3114def SHF_W : SHF_W_ENC, SHF_W_DESC; 3115 3116def SLD_B : SLD_B_ENC, SLD_B_DESC; 3117def SLD_H : SLD_H_ENC, SLD_H_DESC; 3118def SLD_W : SLD_W_ENC, SLD_W_DESC; 3119def SLD_D : SLD_D_ENC, SLD_D_DESC; 3120 3121def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3122def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3123def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3124def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3125 3126def SLL_B : SLL_B_ENC, SLL_B_DESC; 3127def SLL_H : SLL_H_ENC, SLL_H_DESC; 3128def SLL_W : SLL_W_ENC, SLL_W_DESC; 3129def SLL_D : SLL_D_ENC, SLL_D_DESC; 3130 3131def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3132def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3133def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3134def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3135 3136def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3137def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3138def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3139def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3140 3141def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3142def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3143def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3144def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3145 3146def SRA_B : SRA_B_ENC, SRA_B_DESC; 3147def SRA_H : SRA_H_ENC, SRA_H_DESC; 3148def SRA_W : SRA_W_ENC, SRA_W_DESC; 3149def SRA_D : SRA_D_ENC, SRA_D_DESC; 3150 3151def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3152def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3153def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3154def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3155 3156def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3157def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3158def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3159def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3160 3161def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3162def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3163def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3164def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3165 3166def SRL_B : SRL_B_ENC, SRL_B_DESC; 3167def SRL_H : SRL_H_ENC, SRL_H_DESC; 3168def SRL_W : SRL_W_ENC, SRL_W_DESC; 3169def SRL_D : SRL_D_ENC, SRL_D_DESC; 3170 3171def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3172def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3173def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3174def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3175 3176def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3177def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3178def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3179def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3180 3181def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3182def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3183def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3184def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3185 3186def ST_B: ST_B_ENC, ST_B_DESC; 3187def ST_H: ST_H_ENC, ST_H_DESC; 3188def ST_W: ST_W_ENC, ST_W_DESC; 3189def ST_D: ST_D_ENC, ST_D_DESC; 3190 3191def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3192def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3193def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3194def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3195 3196def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3197def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3198def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3199def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3200 3201def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3202def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3203def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3204def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3205 3206def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3207def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3208def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3209def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3210 3211def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3212def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3213def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3214def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3215 3216def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3217def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3218def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3219def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3220 3221def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3222def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3223def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3224def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3225 3226def XOR_V : XOR_V_ENC, XOR_V_DESC; 3227def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3228 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3229 MSA128BOpnd:$ws, 3230 MSA128BOpnd:$wt)>; 3231def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3232 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3233 MSA128BOpnd:$ws, 3234 MSA128BOpnd:$wt)>; 3235def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3236 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3237 MSA128BOpnd:$ws, 3238 MSA128BOpnd:$wt)>; 3239 3240def XORI_B : XORI_B_ENC, XORI_B_DESC; 3241 3242// Patterns. 3243class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3244 Pat<pattern, result>, Requires<pred>; 3245 3246def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3247 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3248 3249def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3250def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3251def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3252def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3253def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3254def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3255def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3256 3257def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3258def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3259def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3260 3261def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3262 (ST_B MSA128B:$ws, addr:$addr)>; 3263def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3264 (ST_H MSA128H:$ws, addr:$addr)>; 3265def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3266 (ST_W MSA128W:$ws, addr:$addr)>; 3267def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3268 (ST_D MSA128D:$ws, addr:$addr)>; 3269def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3270 (ST_H MSA128H:$ws, addr:$addr)>; 3271def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3272 (ST_W MSA128W:$ws, addr:$addr)>; 3273def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3274 (ST_D MSA128D:$ws, addr:$addr)>; 3275 3276def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3277 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3278def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3279 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3280def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3281 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3282 3283class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3284 RegisterOperand ROWS = ROWD, 3285 InstrItinClass itin = NoItinerary> : 3286 MipsPseudo<(outs ROWD:$wd), 3287 (ins ROWS:$ws), 3288 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3289 InstrItinClass Itinerary = itin; 3290} 3291def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3292 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3293 MSA128WOpnd:$ws)>; 3294def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3295 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3296 MSA128DOpnd:$ws)>; 3297 3298class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3299 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3300 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3301 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3302 3303// These are endian-independant because the element size doesnt change 3304def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3305def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3306def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3307def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3308def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3309def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3310 3311// Little endian bitcasts are always no-ops 3312def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3313def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3314def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3315def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3316def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3317def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3318 3319def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3320def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3321def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3322def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3323def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3324 3325def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3326def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3327def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3328def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3329def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3330 3331def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3332def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3333def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3334def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3335def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3336 3337def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3338def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3339def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3340def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3341def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3342 3343def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3344def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3345def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3346def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3347def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3348 3349// Big endian bitcasts expand to shuffle instructions. 3350// This is because bitcast is defined to be a store/load sequence and the 3351// vector store/load instructions are mixed-endian with respect to the vector 3352// as a whole (little endian with respect to element order, but big endian 3353// elements). 3354 3355class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3356 RegisterClass DstRC, MSAInst Insn, 3357 RegisterClass ViaRC> : 3358 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3359 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3360 DstRC), 3361 [HasMSA, IsBE]>; 3362 3363class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3364 RegisterClass DstRC, MSAInst Insn, 3365 RegisterClass ViaRC> : 3366 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3367 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3368 DstRC), 3369 [HasMSA, IsBE]>; 3370 3371class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3372 RegisterClass DstRC> : 3373 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3374 3375class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3376 RegisterClass DstRC> : 3377 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3378 3379class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3380 RegisterClass DstRC> : 3381 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3382 (COPY_TO_REGCLASS 3383 (SHF_W 3384 (COPY_TO_REGCLASS 3385 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3386 MSA128W), 177), 3387 DstRC), 3388 [HasMSA, IsBE]>; 3389 3390class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3391 RegisterClass DstRC> : 3392 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3393 3394class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3395 RegisterClass DstRC> : 3396 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3397 3398class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3399 RegisterClass DstRC> : 3400 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3401 3402def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3403def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3404def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3405def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3406def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3407def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3408 3409def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3410def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3411def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3412def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3413def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3414 3415def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3416def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3417def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3418def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3419def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3420 3421def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3422def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3423def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3424def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3425def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3426 3427def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3428def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3429def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3430def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3431def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3432 3433def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3434def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3435def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3436def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3437def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3438 3439def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3440def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3441def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3442def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3443def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3444 3445// Pseudos used to implement BNZ.df, and BZ.df 3446 3447class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3448 RegisterClass RCWS, 3449 InstrItinClass itin = NoItinerary> : 3450 MipsPseudo<(outs GPR32:$dst), 3451 (ins RCWS:$ws), 3452 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3453 bit usesCustomInserter = 1; 3454} 3455 3456def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3457 MSA128B, NoItinerary>; 3458def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3459 MSA128H, NoItinerary>; 3460def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3461 MSA128W, NoItinerary>; 3462def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3463 MSA128D, NoItinerary>; 3464def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3465 MSA128B, NoItinerary>; 3466 3467def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3468 MSA128B, NoItinerary>; 3469def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3470 MSA128H, NoItinerary>; 3471def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3472 MSA128W, NoItinerary>; 3473def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3474 MSA128D, NoItinerary>; 3475def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3476 MSA128B, NoItinerary>; 3477