MipsSEFrameLowering.cpp revision 11a45c214c26bdc49ef58c0eb214df5200867cee 
1//===-- MipsSEFrameLowering.cpp - Mips32/64 Frame Information -------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the Mips32/64 implementation of TargetFrameLowering class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "MipsSEFrameLowering.h"
15#include "MipsAnalyzeImmediate.h"
16#include "MipsSEInstrInfo.h"
17#include "MipsMachineFunction.h"
18#include "MCTargetDesc/MipsBaseInfo.h"
19#include "llvm/Function.h"
20#include "llvm/CodeGen/MachineFrameInfo.h"
21#include "llvm/CodeGen/MachineFunction.h"
22#include "llvm/CodeGen/MachineInstrBuilder.h"
23#include "llvm/CodeGen/MachineModuleInfo.h"
24#include "llvm/CodeGen/MachineRegisterInfo.h"
25#include "llvm/CodeGen/RegisterScavenging.h"
26#include "llvm/DataLayout.h"
27#include "llvm/Target/TargetOptions.h"
28#include "llvm/Support/CommandLine.h"
29
30using namespace llvm;
31
32void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const {
33  MachineBasicBlock &MBB   = MF.front();
34  MachineFrameInfo *MFI    = MF.getFrameInfo();
35  const MipsRegisterInfo *RegInfo =
36    static_cast<const MipsRegisterInfo*>(MF.getTarget().getRegisterInfo());
37  const MipsSEInstrInfo &TII =
38    *static_cast<const MipsSEInstrInfo*>(MF.getTarget().getInstrInfo());
39  MachineBasicBlock::iterator MBBI = MBB.begin();
40  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
41  unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
42  unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
43  unsigned ZERO = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;
44  unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
45
46  // First, compute final stack size.
47  uint64_t StackSize = MFI->getStackSize();
48
49  // No need to allocate space on the stack.
50  if (StackSize == 0 && !MFI->adjustsStack()) return;
51
52  MachineModuleInfo &MMI = MF.getMMI();
53  std::vector<MachineMove> &Moves = MMI.getFrameMoves();
54  MachineLocation DstML, SrcML;
55
56  // Adjust stack.
57  TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);
58
59  // emit ".cfi_def_cfa_offset StackSize"
60  MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
61  BuildMI(MBB, MBBI, dl,
62          TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel);
63  DstML = MachineLocation(MachineLocation::VirtualFP);
64  SrcML = MachineLocation(MachineLocation::VirtualFP, -StackSize);
65  Moves.push_back(MachineMove(AdjustSPLabel, DstML, SrcML));
66
67  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
68
69  if (CSI.size()) {
70    // Find the instruction past the last instruction that saves a callee-saved
71    // register to the stack.
72    for (unsigned i = 0; i < CSI.size(); ++i)
73      ++MBBI;
74
75    // Iterate over list of callee-saved registers and emit .cfi_offset
76    // directives.
77    MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
78    BuildMI(MBB, MBBI, dl,
79            TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
80
81    for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
82           E = CSI.end(); I != E; ++I) {
83      int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
84      unsigned Reg = I->getReg();
85
86      // If Reg is a double precision register, emit two cfa_offsets,
87      // one for each of the paired single precision registers.
88      if (Mips::AFGR64RegClass.contains(Reg)) {
89        MachineLocation DstML0(MachineLocation::VirtualFP, Offset);
90        MachineLocation DstML1(MachineLocation::VirtualFP, Offset + 4);
91        MachineLocation SrcML0(RegInfo->getSubReg(Reg, Mips::sub_fpeven));
92        MachineLocation SrcML1(RegInfo->getSubReg(Reg, Mips::sub_fpodd));
93
94        if (!STI.isLittle())
95          std::swap(SrcML0, SrcML1);
96
97        Moves.push_back(MachineMove(CSLabel, DstML0, SrcML0));
98        Moves.push_back(MachineMove(CSLabel, DstML1, SrcML1));
99      } else {
100        // Reg is either in CPURegs or FGR32.
101        DstML = MachineLocation(MachineLocation::VirtualFP, Offset);
102        SrcML = MachineLocation(Reg);
103        Moves.push_back(MachineMove(CSLabel, DstML, SrcML));
104      }
105    }
106  }
107
108  // if framepointer enabled, set it to point to the stack pointer.
109  if (hasFP(MF)) {
110    // Insert instruction "move $fp, $sp" at this location.
111    BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO);
112
113    // emit ".cfi_def_cfa_register $fp"
114    MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol();
115    BuildMI(MBB, MBBI, dl,
116            TII.get(TargetOpcode::PROLOG_LABEL)).addSym(SetFPLabel);
117    DstML = MachineLocation(FP);
118    SrcML = MachineLocation(MachineLocation::VirtualFP);
119    Moves.push_back(MachineMove(SetFPLabel, DstML, SrcML));
120  }
121}
122
123void MipsSEFrameLowering::emitEpilogue(MachineFunction &MF,
124                                       MachineBasicBlock &MBB) const {
125  MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
126  MachineFrameInfo *MFI            = MF.getFrameInfo();
127  const MipsSEInstrInfo &TII =
128    *static_cast<const MipsSEInstrInfo*>(MF.getTarget().getInstrInfo());
129  DebugLoc dl = MBBI->getDebugLoc();
130  unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
131  unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
132  unsigned ZERO = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;
133  unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
134
135  // if framepointer enabled, restore the stack pointer.
136  if (hasFP(MF)) {
137    // Find the first instruction that restores a callee-saved register.
138    MachineBasicBlock::iterator I = MBBI;
139
140    for (unsigned i = 0; i < MFI->getCalleeSavedInfo().size(); ++i)
141      --I;
142
143    // Insert instruction "move $sp, $fp" at this location.
144    BuildMI(MBB, I, dl, TII.get(ADDu), SP).addReg(FP).addReg(ZERO);
145  }
146
147  // Get the number of bytes from FrameInfo
148  uint64_t StackSize = MFI->getStackSize();
149
150  if (!StackSize)
151    return;
152
153  // Adjust stack.
154  TII.adjustStackPtr(SP, StackSize, MBB, MBBI);
155}
156
157bool MipsSEFrameLowering::
158spillCalleeSavedRegisters(MachineBasicBlock &MBB,
159                          MachineBasicBlock::iterator MI,
160                          const std::vector<CalleeSavedInfo> &CSI,
161                          const TargetRegisterInfo *TRI) const {
162  MachineFunction *MF = MBB.getParent();
163  MachineBasicBlock *EntryBlock = MF->begin();
164  const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
165
166  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
167    // Add the callee-saved register as live-in. Do not add if the register is
168    // RA and return address is taken, because it has already been added in
169    // method MipsTargetLowering::LowerRETURNADDR.
170    // It's killed at the spill, unless the register is RA and return address
171    // is taken.
172    unsigned Reg = CSI[i].getReg();
173    bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA || Reg == Mips::RA_64)
174        && MF->getFrameInfo()->isReturnAddressTaken();
175    if (!IsRAAndRetAddrIsTaken)
176      EntryBlock->addLiveIn(Reg);
177
178    // Insert the spill to the stack frame.
179    bool IsKill = !IsRAAndRetAddrIsTaken;
180    const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
181    TII.storeRegToStackSlot(*EntryBlock, MI, Reg, IsKill,
182                            CSI[i].getFrameIdx(), RC, TRI);
183  }
184
185  return true;
186}
187
188bool
189MipsSEFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
190  const MachineFrameInfo *MFI = MF.getFrameInfo();
191
192  // Reserve call frame if the size of the maximum call frame fits into 16-bit
193  // immediate field and there are no variable sized objects on the stack.
194  return isInt<16>(MFI->getMaxCallFrameSize()) && !MFI->hasVarSizedObjects();
195}
196
197void MipsSEFrameLowering::
198processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
199                                     RegScavenger *RS) const {
200  MachineRegisterInfo &MRI = MF.getRegInfo();
201  unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
202
203  // Mark $fp as used if function has dedicated frame pointer.
204  if (hasFP(MF))
205    MRI.setPhysRegUsed(FP);
206
207  // Set scavenging frame index if necessary.
208  uint64_t MaxSPOffset = MF.getInfo<MipsFunctionInfo>()->getIncomingArgSize() +
209    estimateStackSize(MF);
210
211  if (isInt<16>(MaxSPOffset))
212    return;
213
214  const TargetRegisterClass *RC = STI.isABI_N64() ?
215    &Mips::CPU64RegsRegClass : &Mips::CPURegsRegClass;
216  int FI = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
217                                                RC->getAlignment(), false);
218  RS->setScavengingFrameIndex(FI);
219}
220
221const MipsFrameLowering *
222llvm::createMipsSEFrameLowering(const MipsSubtarget &ST) {
223  return new MipsSEFrameLowering(ST);
224}
225