PPCHazardRecognizers.h revision 88d211f82304e53694ece666d4a2507b170e4582 
1//===-- PPCHazardRecognizers.h - PowerPC Hazard Recognizers -----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by Chris Lattner and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines hazard recognizers for scheduling on PowerPC processors.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef PPCHAZRECS_H
15#define PPCHAZRECS_H
16
17#include "llvm/CodeGen/ScheduleDAG.h"
18#include "PPCInstrInfo.h"
19
20namespace llvm {
21
22/// PPCHazardRecognizer970 - This class defines a finite state automata that
23/// models the dispatch logic on the PowerPC 970 (aka G5) processor.  This
24/// promotes good dispatch group formation and implements noop insertion to
25/// avoid structural hazards that cause significant performance penalties (e.g.
26/// setting the CTR register then branching through it within a dispatch group),
27/// or storing then loading from the same address within a dispatch group.
28class PPCHazardRecognizer970 : public HazardRecognizer {
29  const TargetInstrInfo &TII;
30
31  unsigned NumIssued;  // Number of insts issued, including advanced cycles.
32
33  // Various things that can cause a structural hazard.
34
35  // HasCTRSet - If the CTR register is set in this group, disallow BCTRL.
36  bool HasCTRSet;
37
38  // StoredPtr - Keep track of the address of any store.  If we see a load from
39  // the same address (or one that aliases it), disallow the store.  We can have
40  // up to four stores in one dispatch group, hence we track up to 4.
41  //
42  // This is null if we haven't seen a store yet.  We keep track of both
43  // operands of the store here, since we support [r+r] and [r+i] addressing.
44  SDOperand StorePtr1[4], StorePtr2[4];
45  unsigned  StoreSize[4];
46  unsigned NumStores;
47
48public:
49  PPCHazardRecognizer970(const TargetInstrInfo &TII);
50  virtual HazardType getHazardType(SDNode *Node);
51  virtual void EmitInstruction(SDNode *Node);
52  virtual void AdvanceCycle();
53  virtual void EmitNoop();
54
55private:
56  /// EndDispatchGroup - Called when we are finishing a new dispatch group.
57  ///
58  void EndDispatchGroup();
59
60  /// GetInstrType - Classify the specified powerpc opcode according to its
61  /// pipeline.
62  PPCII::PPC970_Unit GetInstrType(unsigned Opcode,
63                                  bool &isFirst, bool &isSingle,
64                                  bool &isLoad, bool &isStore);
65
66  bool isLoadOfStoredAddress(unsigned LoadSize,
67                             SDOperand Ptr1, SDOperand Ptr2) const;
68};
69
70} // end namespace llvm
71
72#endif
73
74