AMDGPUSubtarget.cpp revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===-- AMDGPUSubtarget.cpp - AMDGPU Subtarget Information ----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief Implements the AMDGPU specific subclass of TargetSubtarget.
12//
13//===----------------------------------------------------------------------===//
14
15#include "AMDGPUSubtarget.h"
16
17using namespace llvm;
18
19#define GET_SUBTARGETINFO_ENUM
20#define GET_SUBTARGETINFO_TARGET_DESC
21#define GET_SUBTARGETINFO_CTOR
22#include "AMDGPUGenSubtargetInfo.inc"
23
24AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
25  AMDGPUGenSubtargetInfo(TT, CPU, FS), DumpCode(false) {
26    InstrItins = getInstrItineraryForCPU(CPU);
27
28  // Default card
29  StringRef GPU = CPU;
30  Is64bit = false;
31  DefaultSize[0] = 64;
32  DefaultSize[1] = 1;
33  DefaultSize[2] = 1;
34  HasVertexCache = false;
35  TexVTXClauseSize = 0;
36  Gen = AMDGPUSubtarget::R600;
37  FP64 = false;
38  CaymanISA = false;
39  EnableIRStructurizer = true;
40  EnableIfCvt = true;
41  WavefrontSize = 0;
42  CFALUBug = false;
43  ParseSubtargetFeatures(GPU, FS);
44  DevName = GPU;
45}
46
47bool
48AMDGPUSubtarget::is64bit() const  {
49  return Is64bit;
50}
51bool
52AMDGPUSubtarget::hasVertexCache() const {
53  return HasVertexCache;
54}
55short
56AMDGPUSubtarget::getTexVTXClauseSize() const {
57  return TexVTXClauseSize;
58}
59enum AMDGPUSubtarget::Generation
60AMDGPUSubtarget::getGeneration() const {
61  return Gen;
62}
63bool
64AMDGPUSubtarget::hasHWFP64() const {
65  return FP64;
66}
67bool
68AMDGPUSubtarget::hasCaymanISA() const {
69  return CaymanISA;
70}
71bool
72AMDGPUSubtarget::IsIRStructurizerEnabled() const {
73  return EnableIRStructurizer;
74}
75bool
76AMDGPUSubtarget::isIfCvtEnabled() const {
77  return EnableIfCvt;
78}
79unsigned
80AMDGPUSubtarget::getWavefrontSize() const {
81  return WavefrontSize;
82}
83unsigned
84AMDGPUSubtarget::getStackEntrySize() const {
85  assert(getGeneration() <= NORTHERN_ISLANDS);
86  switch(getWavefrontSize()) {
87  case 16:
88    return 8;
89  case 32:
90    if (hasCaymanISA())
91      return 4;
92    else
93      return 8;
94  case 64:
95    return 4;
96  default:
97    llvm_unreachable("Illegal wavefront size.");
98  }
99}
100bool
101AMDGPUSubtarget::hasCFAluBug() const {
102  assert(getGeneration() <= NORTHERN_ISLANDS);
103  return CFALUBug;
104}
105bool
106AMDGPUSubtarget::isTargetELF() const {
107  return false;
108}
109size_t
110AMDGPUSubtarget::getDefaultSize(uint32_t dim) const {
111  if (dim > 2) {
112    return 1;
113  } else {
114    return DefaultSize[dim];
115  }
116}
117
118std::string
119AMDGPUSubtarget::getDeviceName() const {
120  return DevName;
121}
122