SparcAsmPrinter.cpp revision c178308b23f796b6f5c15c8b3f742cc7b3336d6b 
1//===-- SparcAsmPrinter.cpp - Sparc LLVM assembly writer ------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a printer that converts from our internal representation
11// of machine-dependent LLVM code to GAS-format SPARC assembly language.
12//
13//===----------------------------------------------------------------------===//
14
15#define DEBUG_TYPE "asm-printer"
16#include "Sparc.h"
17#include "SparcInstrInfo.h"
18#include "SparcTargetMachine.h"
19#include "llvm/CodeGen/AsmPrinter.h"
20#include "llvm/CodeGen/MachineInstr.h"
21#include "llvm/MC/MCAsmInfo.h"
22#include "llvm/MC/MCStreamer.h"
23#include "llvm/MC/MCSymbol.h"
24#include "llvm/Target/Mangler.h"
25#include "llvm/Target/TargetRegistry.h"
26#include "llvm/ADT/SmallString.h"
27#include "llvm/ADT/StringExtras.h"
28#include "llvm/Support/raw_ostream.h"
29using namespace llvm;
30
31namespace {
32  class SparcAsmPrinter : public AsmPrinter {
33  public:
34    explicit SparcAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
35      : AsmPrinter(TM, Streamer) {}
36
37    virtual const char *getPassName() const {
38      return "Sparc Assembly Printer";
39    }
40
41    void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
42    void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS,
43                         const char *Modifier = 0);
44    void printCCOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
45
46    virtual void EmitInstruction(const MachineInstr *MI) {
47      SmallString<128> Str;
48      raw_svector_ostream OS(Str);
49      printInstruction(MI, OS);
50      OutStreamer.EmitRawText(OS.str());
51    }
52    void printInstruction(const MachineInstr *MI, raw_ostream &OS);// autogen'd.
53    static const char *getRegisterName(unsigned RegNo);
54
55    bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
56                         unsigned AsmVariant, const char *ExtraCode,
57                         raw_ostream &O);
58    bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
59                               unsigned AsmVariant, const char *ExtraCode,
60                               raw_ostream &O);
61
62    bool printGetPCX(const MachineInstr *MI, unsigned OpNo, raw_ostream &OS);
63
64    virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB)
65                       const;
66  };
67} // end of anonymous namespace
68
69#include "SparcGenAsmWriter.inc"
70
71void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
72                                   raw_ostream &O) {
73  const MachineOperand &MO = MI->getOperand (opNum);
74  bool CloseParen = false;
75  if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
76    O << "%hi(";
77    CloseParen = true;
78  } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) &&
79             !MO.isReg() && !MO.isImm()) {
80    O << "%lo(";
81    CloseParen = true;
82  }
83  switch (MO.getType()) {
84  case MachineOperand::MO_Register:
85    O << "%" << LowercaseString(getRegisterName(MO.getReg()));
86    break;
87
88  case MachineOperand::MO_Immediate:
89    O << (int)MO.getImm();
90    break;
91  case MachineOperand::MO_MachineBasicBlock:
92    O << *MO.getMBB()->getSymbol();
93    return;
94  case MachineOperand::MO_GlobalAddress:
95    O << *Mang->getSymbol(MO.getGlobal());
96    break;
97  case MachineOperand::MO_ExternalSymbol:
98    O << MO.getSymbolName();
99    break;
100  case MachineOperand::MO_ConstantPoolIndex:
101    O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
102      << MO.getIndex();
103    break;
104  default:
105    llvm_unreachable("<unknown operand type>");
106  }
107  if (CloseParen) O << ")";
108}
109
110void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
111                                      raw_ostream &O, const char *Modifier) {
112  printOperand(MI, opNum, O);
113
114  // If this is an ADD operand, emit it like normal operands.
115  if (Modifier && !strcmp(Modifier, "arith")) {
116    O << ", ";
117    printOperand(MI, opNum+1, O);
118    return;
119  }
120
121  if (MI->getOperand(opNum+1).isReg() &&
122      MI->getOperand(opNum+1).getReg() == SP::G0)
123    return;   // don't print "+%g0"
124  if (MI->getOperand(opNum+1).isImm() &&
125      MI->getOperand(opNum+1).getImm() == 0)
126    return;   // don't print "+0"
127
128  O << "+";
129  if (MI->getOperand(opNum+1).isGlobal() ||
130      MI->getOperand(opNum+1).isCPI()) {
131    O << "%lo(";
132    printOperand(MI, opNum+1, O);
133    O << ")";
134  } else {
135    printOperand(MI, opNum+1, O);
136  }
137}
138
139bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum,
140                                  raw_ostream &O) {
141  std::string operand = "";
142  const MachineOperand &MO = MI->getOperand(opNum);
143  switch (MO.getType()) {
144  default: assert(0 && "Operand is not a register ");
145  case MachineOperand::MO_Register:
146    assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
147           "Operand is not a physical register ");
148    assert(MO.getReg() != SP::O7 &&
149           "%o7 is assigned as destination for getpcx!");
150    operand = "%" + LowercaseString(getRegisterName(MO.getReg()));
151    break;
152  }
153
154  unsigned mfNum = MI->getParent()->getParent()->getFunctionNumber();
155  unsigned bbNum = MI->getParent()->getNumber();
156
157  O << '\n' << ".LLGETPCH" << mfNum << '_' << bbNum << ":\n";
158  O << "\tcall\t.LLGETPC" << mfNum << '_' << bbNum << '\n' ;
159
160  O << "\t  sethi\t"
161    << "%hi(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum
162    << ")), "  << operand << '\n' ;
163
164  O << ".LLGETPC" << mfNum << '_' << bbNum << ":\n" ;
165  O << "\tor\t" << operand
166    << ", %lo(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum
167    << ")), " << operand << '\n';
168  O << "\tadd\t" << operand << ", %o7, " << operand << '\n';
169
170  return true;
171}
172
173void SparcAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum,
174                                     raw_ostream &O) {
175  int CC = (int)MI->getOperand(opNum).getImm();
176  O << SPARCCondCodeToString((SPCC::CondCodes)CC);
177}
178
179/// PrintAsmOperand - Print out an operand for an inline asm expression.
180///
181bool SparcAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
182                                      unsigned AsmVariant,
183                                      const char *ExtraCode,
184                                      raw_ostream &O) {
185  if (ExtraCode && ExtraCode[0]) {
186    if (ExtraCode[1] != 0) return true; // Unknown modifier.
187
188    switch (ExtraCode[0]) {
189    default: return true;  // Unknown modifier.
190    case 'r':
191     break;
192    }
193  }
194
195  printOperand(MI, OpNo, O);
196
197  return false;
198}
199
200bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
201                                            unsigned OpNo, unsigned AsmVariant,
202                                            const char *ExtraCode,
203                                            raw_ostream &O) {
204  if (ExtraCode && ExtraCode[0])
205    return true;  // Unknown modifier
206
207  O << '[';
208  printMemOperand(MI, OpNo, O);
209  O << ']';
210
211  return false;
212}
213
214/// isBlockOnlyReachableByFallthough - Return true if the basic block has
215/// exactly one predecessor and the control transfer mechanism between
216/// the predecessor and this block is a fall-through.
217///
218/// This overrides AsmPrinter's implementation to handle delay slots.
219bool SparcAsmPrinter::
220isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
221  // If this is a landing pad, it isn't a fall through.  If it has no preds,
222  // then nothing falls through to it.
223  if (MBB->isLandingPad() || MBB->pred_empty())
224    return false;
225
226  // If there isn't exactly one predecessor, it can't be a fall through.
227  MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI;
228  ++PI2;
229  if (PI2 != MBB->pred_end())
230    return false;
231
232  // The predecessor has to be immediately before this block.
233  const MachineBasicBlock *Pred = *PI;
234
235  if (!Pred->isLayoutSuccessor(MBB))
236    return false;
237
238  // Check if the last terminator is an unconditional branch.
239  MachineBasicBlock::const_iterator I = Pred->end();
240  while (I != Pred->begin() && !(--I)->getDesc().isTerminator())
241    ; // Noop
242  return I == Pred->end() || !I->getDesc().isBarrier();
243}
244
245
246
247// Force static initialization.
248extern "C" void LLVMInitializeSparcAsmPrinter() {
249  RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
250  RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);
251}
252